drivers:net: Convert dma_alloc_coherent(...__GFP_ZERO) to dma_zalloc_coherent
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
1da177e4
LT
32#include <asm/uaccess.h>
33
8328c38f
AK
34enum {NETDEV_STATS, E1000_STATS};
35
1da177e4
LT
36struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
8328c38f 38 int type;
1da177e4
LT
39 int sizeof_stat;
40 int stat_offset;
41};
42
8328c38f
AK
43#define E1000_STAT(m) E1000_STATS, \
44 sizeof(((struct e1000_adapter *)0)->m), \
45 offsetof(struct e1000_adapter, m)
46#define E1000_NETDEV_STAT(m) NETDEV_STATS, \
47 sizeof(((struct net_device *)0)->m), \
48 offsetof(struct net_device, m)
49
1da177e4 50static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW
51 { "rx_packets", E1000_STAT(stats.gprc) },
52 { "tx_packets", E1000_STAT(stats.gptc) },
53 { "rx_bytes", E1000_STAT(stats.gorcl) },
54 { "tx_bytes", E1000_STAT(stats.gotcl) },
55 { "rx_broadcast", E1000_STAT(stats.bprc) },
56 { "tx_broadcast", E1000_STAT(stats.bptc) },
57 { "rx_multicast", E1000_STAT(stats.mprc) },
58 { "tx_multicast", E1000_STAT(stats.mptc) },
59 { "rx_errors", E1000_STAT(stats.rxerrc) },
60 { "tx_errors", E1000_STAT(stats.txerrc) },
5fe31def 61 { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
49559854
MW
62 { "multicast", E1000_STAT(stats.mprc) },
63 { "collisions", E1000_STAT(stats.colc) },
64 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
5fe31def 65 { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
49559854 66 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
5fe31def 67 { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
2648345f 68 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW
69 { "rx_missed_errors", E1000_STAT(stats.mpc) },
70 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
71 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
5fe31def
AK
72 { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
73 { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
49559854 74 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT
75 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
76 { "tx_deferred_ok", E1000_STAT(stats.dc) },
77 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
78 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 79 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 80 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT
81 { "rx_long_length_errors", E1000_STAT(stats.roc) },
82 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
83 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
84 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
85 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
86 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
87 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
88 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
89 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
90 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
91 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9 92 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
6b7660cd 93 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG
94 { "tx_smbus", E1000_STAT(stats.mgptc) },
95 { "rx_smbus", E1000_STAT(stats.mgprc) },
96 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 97};
7bfa4816 98
7bfa4816 99#define E1000_QUEUE_STATS_LEN 0
ff8ac609 100#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 101#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
102static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
103 "Register test (offline)", "Eeprom test (offline)",
104 "Interrupt test (offline)", "Loopback test (offline)",
105 "Link test (on/offline)"
106};
4c3616cd 107#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4 108
64798845
JP
109static int e1000_get_settings(struct net_device *netdev,
110 struct ethtool_cmd *ecmd)
1da177e4 111{
60490fe0 112 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
113 struct e1000_hw *hw = &adapter->hw;
114
96838a40 115 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
116
117 ecmd->supported = (SUPPORTED_10baseT_Half |
6cfbd97b
JK
118 SUPPORTED_10baseT_Full |
119 SUPPORTED_100baseT_Half |
120 SUPPORTED_100baseT_Full |
121 SUPPORTED_1000baseT_Full|
122 SUPPORTED_Autoneg |
123 SUPPORTED_TP);
1da177e4
LT
124 ecmd->advertising = ADVERTISED_TP;
125
96838a40 126 if (hw->autoneg == 1) {
1da177e4 127 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 128 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT
129 ecmd->advertising |= hw->autoneg_advertised;
130 }
131
132 ecmd->port = PORT_TP;
133 ecmd->phy_address = hw->phy_addr;
134
96838a40 135 if (hw->mac_type == e1000_82543)
1da177e4
LT
136 ecmd->transceiver = XCVR_EXTERNAL;
137 else
138 ecmd->transceiver = XCVR_INTERNAL;
139
140 } else {
141 ecmd->supported = (SUPPORTED_1000baseT_Full |
142 SUPPORTED_FIBRE |
143 SUPPORTED_Autoneg);
144
012609a8
MC
145 ecmd->advertising = (ADVERTISED_1000baseT_Full |
146 ADVERTISED_FIBRE |
147 ADVERTISED_Autoneg);
1da177e4
LT
148
149 ecmd->port = PORT_FIBRE;
150
96838a40 151 if (hw->mac_type >= e1000_82545)
1da177e4
LT
152 ecmd->transceiver = XCVR_INTERNAL;
153 else
154 ecmd->transceiver = XCVR_EXTERNAL;
155 }
156
1dc32918 157 if (er32(STATUS) & E1000_STATUS_LU) {
1da177e4
LT
158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex);
70739497 161 ethtool_cmd_speed_set(ecmd, adapter->link_speed);
1da177e4 162
25985edc 163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
6cfbd97b
JK
164 * and HALF_DUPLEX != DUPLEX_HALF
165 */
96838a40 166 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
167 ecmd->duplex = DUPLEX_FULL;
168 else
169 ecmd->duplex = DUPLEX_HALF;
170 } else {
70739497 171 ethtool_cmd_speed_set(ecmd, -1);
1da177e4
LT
172 ecmd->duplex = -1;
173 }
174
175 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
176 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
c819bbd5
JB
177
178 /* MDI-X => 1; MDI => 0 */
179 if ((hw->media_type == e1000_media_type_copper) &&
180 netif_carrier_ok(netdev))
181 ecmd->eth_tp_mdix = (!!adapter->phy_info.mdix_mode ?
6cfbd97b 182 ETH_TP_MDI_X : ETH_TP_MDI);
c819bbd5
JB
183 else
184 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
185
186 if (hw->mdix == AUTO_ALL_MODES)
187 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
188 else
189 ecmd->eth_tp_mdix_ctrl = hw->mdix;
1da177e4
LT
190 return 0;
191}
192
64798845
JP
193static int e1000_set_settings(struct net_device *netdev,
194 struct ethtool_cmd *ecmd)
1da177e4 195{
60490fe0 196 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
197 struct e1000_hw *hw = &adapter->hw;
198
6cfbd97b 199 /* MDI setting is only allowed when autoneg enabled because
c819bbd5
JB
200 * some hardware doesn't allow MDI setting when speed or
201 * duplex is forced.
202 */
203 if (ecmd->eth_tp_mdix_ctrl) {
204 if (hw->media_type != e1000_media_type_copper)
205 return -EOPNOTSUPP;
206
207 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
208 (ecmd->autoneg != AUTONEG_ENABLE)) {
209 e_err(drv, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
210 return -EINVAL;
211 }
212 }
213
1a821ca5
JB
214 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
215 msleep(1);
216
57128197 217 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 218 hw->autoneg = 1;
96838a40 219 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
220 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
221 ADVERTISED_FIBRE |
222 ADVERTISED_Autoneg;
96838a40 223 else
2f2ca263 224 hw->autoneg_advertised = ecmd->advertising |
6cfbd97b
JK
225 ADVERTISED_TP |
226 ADVERTISED_Autoneg;
012609a8 227 ecmd->advertising = hw->autoneg_advertised;
25db0338
DD
228 } else {
229 u32 speed = ethtool_cmd_speed(ecmd);
c819bbd5 230 /* calling this overrides forced MDI setting */
14ad2513 231 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
1a821ca5 232 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 233 return -EINVAL;
1a821ca5 234 }
25db0338 235 }
1da177e4 236
c819bbd5
JB
237 /* MDI-X => 2; MDI => 1; Auto => 3 */
238 if (ecmd->eth_tp_mdix_ctrl) {
239 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
240 hw->mdix = AUTO_ALL_MODES;
241 else
242 hw->mdix = ecmd->eth_tp_mdix_ctrl;
243 }
244
1da177e4
LT
245 /* reset the link */
246
1a821ca5
JB
247 if (netif_running(adapter->netdev)) {
248 e1000_down(adapter);
249 e1000_up(adapter);
250 } else
1da177e4
LT
251 e1000_reset(adapter);
252
1a821ca5 253 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
254 return 0;
255}
256
b548192a
NN
257static u32 e1000_get_link(struct net_device *netdev)
258{
259 struct e1000_adapter *adapter = netdev_priv(netdev);
260
6cfbd97b 261 /* If the link is not reported up to netdev, interrupts are disabled,
b548192a
NN
262 * and so the physical link state may have changed since we last
263 * looked. Set get_link_status to make sure that the true link
264 * state is interrogated, rather than pulling a cached and possibly
265 * stale link state from the driver.
266 */
267 if (!netif_carrier_ok(netdev))
268 adapter->hw.get_link_status = 1;
269
270 return e1000_has_link(adapter);
271}
272
64798845
JP
273static void e1000_get_pauseparam(struct net_device *netdev,
274 struct ethtool_pauseparam *pause)
1da177e4 275{
60490fe0 276 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
277 struct e1000_hw *hw = &adapter->hw;
278
96838a40 279 pause->autoneg =
1da177e4 280 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 281
11241b10 282 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 283 pause->rx_pause = 1;
11241b10 284 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 285 pause->tx_pause = 1;
11241b10 286 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT
287 pause->rx_pause = 1;
288 pause->tx_pause = 1;
289 }
290}
291
64798845
JP
292static int e1000_set_pauseparam(struct net_device *netdev,
293 struct ethtool_pauseparam *pause)
1da177e4 294{
60490fe0 295 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 296 struct e1000_hw *hw = &adapter->hw;
1a821ca5 297 int retval = 0;
96838a40 298
1da177e4
LT
299 adapter->fc_autoneg = pause->autoneg;
300
1a821ca5
JB
301 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
302 msleep(1);
303
96838a40 304 if (pause->rx_pause && pause->tx_pause)
11241b10 305 hw->fc = E1000_FC_FULL;
96838a40 306 else if (pause->rx_pause && !pause->tx_pause)
11241b10 307 hw->fc = E1000_FC_RX_PAUSE;
96838a40 308 else if (!pause->rx_pause && pause->tx_pause)
11241b10 309 hw->fc = E1000_FC_TX_PAUSE;
96838a40 310 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 311 hw->fc = E1000_FC_NONE;
1da177e4
LT
312
313 hw->original_fc = hw->fc;
314
96838a40 315 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
316 if (netif_running(adapter->netdev)) {
317 e1000_down(adapter);
318 e1000_up(adapter);
319 } else
1da177e4 320 e1000_reset(adapter);
96838a40 321 } else
1a821ca5 322 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 323 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 324
1a821ca5
JB
325 clear_bit(__E1000_RESETTING, &adapter->flags);
326 return retval;
1da177e4
LT
327}
328
64798845 329static u32 e1000_get_msglevel(struct net_device *netdev)
1da177e4 330{
60490fe0 331 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
332 return adapter->msg_enable;
333}
334
64798845 335static void e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 336{
60490fe0 337 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
338 adapter->msg_enable = data;
339}
340
64798845 341static int e1000_get_regs_len(struct net_device *netdev)
1da177e4
LT
342{
343#define E1000_REGS_LEN 32
406874a7 344 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT
345}
346
64798845
JP
347static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
348 void *p)
1da177e4 349{
60490fe0 350 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 351 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
352 u32 *regs_buff = p;
353 u16 phy_data;
1da177e4 354
406874a7 355 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT
356
357 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
358
1dc32918
JP
359 regs_buff[0] = er32(CTRL);
360 regs_buff[1] = er32(STATUS);
1da177e4 361
1dc32918
JP
362 regs_buff[2] = er32(RCTL);
363 regs_buff[3] = er32(RDLEN);
364 regs_buff[4] = er32(RDH);
365 regs_buff[5] = er32(RDT);
366 regs_buff[6] = er32(RDTR);
1da177e4 367
1dc32918
JP
368 regs_buff[7] = er32(TCTL);
369 regs_buff[8] = er32(TDLEN);
370 regs_buff[9] = er32(TDH);
371 regs_buff[10] = er32(TDT);
372 regs_buff[11] = er32(TIDV);
1da177e4 373
1dc32918 374 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 375 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
376 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
377 IGP01E1000_PHY_AGC_A);
378 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
379 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 380 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
381 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
382 IGP01E1000_PHY_AGC_B);
383 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
384 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 385 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT
386 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
387 IGP01E1000_PHY_AGC_C);
388 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
389 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 390 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT
391 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
392 IGP01E1000_PHY_AGC_D);
393 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
394 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 395 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT
396 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
397 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
398 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
399 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 400 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT
401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_PCS_INIT_REG);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 405 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT
406 regs_buff[20] = 0; /* polarity correction enabled (always) */
407 regs_buff[22] = 0; /* phy receive errors (unavailable) */
408 regs_buff[23] = regs_buff[18]; /* mdix mode */
409 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
410 } else {
8fc897b0 411 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 412 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
413 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
414 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
415 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 416 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 417 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT
418 regs_buff[18] = regs_buff[13]; /* cable polarity */
419 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
420 regs_buff[20] = regs_buff[17]; /* polarity correction */
421 /* phy receive errors */
422 regs_buff[22] = adapter->phy_stats.receive_errors;
423 regs_buff[23] = regs_buff[13]; /* mdix mode */
424 }
425 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
426 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 427 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 428 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 429 if (hw->mac_type >= e1000_82540 &&
4ccc12ae 430 hw->media_type == e1000_media_type_copper) {
1dc32918 431 regs_buff[26] = er32(MANC);
1da177e4
LT
432 }
433}
434
64798845 435static int e1000_get_eeprom_len(struct net_device *netdev)
1da177e4 436{
60490fe0 437 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
438 struct e1000_hw *hw = &adapter->hw;
439
440 return hw->eeprom.word_size * 2;
1da177e4
LT
441}
442
64798845
JP
443static int e1000_get_eeprom(struct net_device *netdev,
444 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 445{
60490fe0 446 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 447 struct e1000_hw *hw = &adapter->hw;
406874a7 448 u16 *eeprom_buff;
1da177e4
LT
449 int first_word, last_word;
450 int ret_val = 0;
406874a7 451 u16 i;
1da177e4 452
96838a40 453 if (eeprom->len == 0)
1da177e4
LT
454 return -EINVAL;
455
456 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
457
458 first_word = eeprom->offset >> 1;
459 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
460
406874a7 461 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 462 (last_word - first_word + 1), GFP_KERNEL);
96838a40 463 if (!eeprom_buff)
1da177e4
LT
464 return -ENOMEM;
465
96838a40 466 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
467 ret_val = e1000_read_eeprom(hw, first_word,
468 last_word - first_word + 1,
469 eeprom_buff);
470 else {
c7be73bc
JP
471 for (i = 0; i < last_word - first_word + 1; i++) {
472 ret_val = e1000_read_eeprom(hw, first_word + i, 1,
473 &eeprom_buff[i]);
474 if (ret_val)
1da177e4 475 break;
c7be73bc 476 }
1da177e4
LT
477 }
478
479 /* Device's eeprom is always little-endian, word addressable */
480 for (i = 0; i < last_word - first_word + 1; i++)
481 le16_to_cpus(&eeprom_buff[i]);
482
406874a7 483 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
6cfbd97b 484 eeprom->len);
1da177e4
LT
485 kfree(eeprom_buff);
486
487 return ret_val;
488}
489
64798845
JP
490static int e1000_set_eeprom(struct net_device *netdev,
491 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 492{
60490fe0 493 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 494 struct e1000_hw *hw = &adapter->hw;
406874a7 495 u16 *eeprom_buff;
1da177e4
LT
496 void *ptr;
497 int max_len, first_word, last_word, ret_val = 0;
406874a7 498 u16 i;
1da177e4 499
96838a40 500 if (eeprom->len == 0)
1da177e4
LT
501 return -EOPNOTSUPP;
502
96838a40 503 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
504 return -EFAULT;
505
506 max_len = hw->eeprom.word_size * 2;
507
508 first_word = eeprom->offset >> 1;
509 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
510 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 511 if (!eeprom_buff)
1da177e4
LT
512 return -ENOMEM;
513
514 ptr = (void *)eeprom_buff;
515
96838a40 516 if (eeprom->offset & 1) {
6cfbd97b
JK
517 /* need read/modify/write of first changed EEPROM word
518 * only the second byte of the word is being modified
519 */
1da177e4
LT
520 ret_val = e1000_read_eeprom(hw, first_word, 1,
521 &eeprom_buff[0]);
522 ptr++;
523 }
96838a40 524 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
6cfbd97b
JK
525 /* need read/modify/write of last changed EEPROM word
526 * only the first byte of the word is being modified
527 */
1da177e4
LT
528 ret_val = e1000_read_eeprom(hw, last_word, 1,
529 &eeprom_buff[last_word - first_word]);
530 }
531
532 /* Device's eeprom is always little-endian, word addressable */
533 for (i = 0; i < last_word - first_word + 1; i++)
534 le16_to_cpus(&eeprom_buff[i]);
535
536 memcpy(ptr, bytes, eeprom->len);
537
538 for (i = 0; i < last_word - first_word + 1; i++)
539 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
540
541 ret_val = e1000_write_eeprom(hw, first_word,
542 last_word - first_word + 1, eeprom_buff);
543
1532ecea
JB
544 /* Update the checksum over the first part of the EEPROM if needed */
545 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
1da177e4
LT
546 e1000_update_eeprom_checksum(hw);
547
548 kfree(eeprom_buff);
549 return ret_val;
550}
551
64798845
JP
552static void e1000_get_drvinfo(struct net_device *netdev,
553 struct ethtool_drvinfo *drvinfo)
1da177e4 554{
60490fe0 555 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 556
612a94d6
RJ
557 strlcpy(drvinfo->driver, e1000_driver_name,
558 sizeof(drvinfo->driver));
559 strlcpy(drvinfo->version, e1000_driver_version,
560 sizeof(drvinfo->version));
a2917e22 561
612a94d6
RJ
562 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
563 sizeof(drvinfo->bus_info));
1da177e4
LT
564 drvinfo->regdump_len = e1000_get_regs_len(netdev);
565 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
566}
567
64798845
JP
568static void e1000_get_ringparam(struct net_device *netdev,
569 struct ethtool_ringparam *ring)
1da177e4 570{
60490fe0 571 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
572 struct e1000_hw *hw = &adapter->hw;
573 e1000_mac_type mac_type = hw->mac_type;
581d708e
MC
574 struct e1000_tx_ring *txdr = adapter->tx_ring;
575 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
576
577 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
578 E1000_MAX_82544_RXD;
579 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
580 E1000_MAX_82544_TXD;
1da177e4
LT
581 ring->rx_pending = rxdr->count;
582 ring->tx_pending = txdr->count;
1da177e4
LT
583}
584
64798845
JP
585static int e1000_set_ringparam(struct net_device *netdev,
586 struct ethtool_ringparam *ring)
1da177e4 587{
60490fe0 588 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
589 struct e1000_hw *hw = &adapter->hw;
590 e1000_mac_type mac_type = hw->mac_type;
793fab72
VA
591 struct e1000_tx_ring *txdr, *tx_old;
592 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 593 int i, err;
581d708e 594
0989aa43
JK
595 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
596 return -EINVAL;
597
2db10a08
AK
598 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
599 msleep(1);
600
581d708e
MC
601 if (netif_running(adapter->netdev))
602 e1000_down(adapter);
1da177e4
LT
603
604 tx_old = adapter->tx_ring;
605 rx_old = adapter->rx_ring;
606
793fab72 607 err = -ENOMEM;
6cfbd97b
JK
608 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring),
609 GFP_KERNEL);
793fab72
VA
610 if (!txdr)
611 goto err_alloc_tx;
581d708e 612
6cfbd97b
JK
613 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring),
614 GFP_KERNEL);
793fab72
VA
615 if (!rxdr)
616 goto err_alloc_rx;
581d708e 617
793fab72
VA
618 adapter->tx_ring = txdr;
619 adapter->rx_ring = rxdr;
581d708e 620
406874a7
JP
621 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
622 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
6cfbd97b 623 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 624 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 625
406874a7
JP
626 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
627 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
6cfbd97b 628 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 629 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 630
f56799ea 631 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 632 txdr[i].count = txdr->count;
f56799ea 633 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 634 rxdr[i].count = rxdr->count;
581d708e 635
96838a40 636 if (netif_running(adapter->netdev)) {
1da177e4 637 /* Try to get new resources before deleting old */
c7be73bc
JP
638 err = e1000_setup_all_rx_resources(adapter);
639 if (err)
1da177e4 640 goto err_setup_rx;
c7be73bc
JP
641 err = e1000_setup_all_tx_resources(adapter);
642 if (err)
1da177e4
LT
643 goto err_setup_tx;
644
645 /* save the new, restore the old in order to free it,
6cfbd97b
JK
646 * then restore the new back again
647 */
1da177e4 648
1da177e4
LT
649 adapter->rx_ring = rx_old;
650 adapter->tx_ring = tx_old;
581d708e
MC
651 e1000_free_all_rx_resources(adapter);
652 e1000_free_all_tx_resources(adapter);
653 kfree(tx_old);
654 kfree(rx_old);
793fab72
VA
655 adapter->rx_ring = rxdr;
656 adapter->tx_ring = txdr;
c7be73bc
JP
657 err = e1000_up(adapter);
658 if (err)
2db10a08 659 goto err_setup;
1da177e4
LT
660 }
661
2db10a08 662 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
663 return 0;
664err_setup_tx:
581d708e 665 e1000_free_all_rx_resources(adapter);
1da177e4
LT
666err_setup_rx:
667 adapter->rx_ring = rx_old;
668 adapter->tx_ring = tx_old;
793fab72
VA
669 kfree(rxdr);
670err_alloc_rx:
671 kfree(txdr);
672err_alloc_tx:
1da177e4 673 e1000_up(adapter);
2db10a08
AK
674err_setup:
675 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
676 return err;
677}
678
64798845
JP
679static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
680 u32 mask, u32 write)
7e64300a 681{
1dc32918 682 struct e1000_hw *hw = &adapter->hw;
406874a7 683 static const u32 test[] =
7e64300a 684 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1dc32918 685 u8 __iomem *address = hw->hw_addr + reg;
406874a7 686 u32 read;
7e64300a
JP
687 int i;
688
689 for (i = 0; i < ARRAY_SIZE(test); i++) {
690 writel(write & test[i], address);
691 read = readl(address);
692 if (read != (write & test[i] & mask)) {
feb8f478
ET
693 e_err(drv, "pattern test reg %04X failed: "
694 "got 0x%08X expected 0x%08X\n",
695 reg, read, (write & test[i] & mask));
7e64300a
JP
696 *data = reg;
697 return true;
698 }
699 }
700 return false;
1da177e4
LT
701}
702
64798845
JP
703static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
704 u32 mask, u32 write)
7e64300a 705{
1dc32918
JP
706 struct e1000_hw *hw = &adapter->hw;
707 u8 __iomem *address = hw->hw_addr + reg;
406874a7 708 u32 read;
7e64300a
JP
709
710 writel(write & mask, address);
711 read = readl(address);
712 if ((read & mask) != (write & mask)) {
feb8f478 713 e_err(drv, "set/check reg %04X test failed: "
675ad473
ET
714 "got 0x%08X expected 0x%08X\n",
715 reg, (read & mask), (write & mask));
7e64300a
JP
716 *data = reg;
717 return true;
718 }
719 return false;
1da177e4
LT
720}
721
7e64300a
JP
722#define REG_PATTERN_TEST(reg, mask, write) \
723 do { \
724 if (reg_pattern_test(adapter, data, \
1dc32918 725 (hw->mac_type >= e1000_82543) \
7e64300a
JP
726 ? E1000_##reg : E1000_82542_##reg, \
727 mask, write)) \
728 return 1; \
729 } while (0)
730
731#define REG_SET_AND_CHECK(reg, mask, write) \
732 do { \
733 if (reg_set_and_check(adapter, data, \
1dc32918 734 (hw->mac_type >= e1000_82543) \
7e64300a
JP
735 ? E1000_##reg : E1000_82542_##reg, \
736 mask, write)) \
737 return 1; \
738 } while (0)
739
64798845 740static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 741{
406874a7
JP
742 u32 value, before, after;
743 u32 i, toggle;
1dc32918 744 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
745
746 /* The status register is Read Only, so a write should fail.
747 * Some bits that get toggled are ignored.
748 */
1532ecea 749
868d5309 750 /* there are several bits on newer hardware that are r/w */
1532ecea 751 toggle = 0xFFFFF833;
b01f6691 752
1dc32918
JP
753 before = er32(STATUS);
754 value = (er32(STATUS) & toggle);
755 ew32(STATUS, toggle);
756 after = er32(STATUS) & toggle;
96838a40 757 if (value != after) {
feb8f478 758 e_err(drv, "failed STATUS register test got: "
675ad473 759 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
760 *data = 1;
761 return 1;
762 }
b01f6691 763 /* restore previous status */
1dc32918 764 ew32(STATUS, before);
90fb5135 765
1532ecea
JB
766 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
767 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
768 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
769 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
90fb5135 770
1da177e4
LT
771 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
772 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
773 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
774 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
775 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
776 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
777 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
778 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
779 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
780 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
781
782 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 783
1532ecea 784 before = 0x06DFB3FE;
cd94dd0b 785 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
786 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
787
1dc32918 788 if (hw->mac_type >= e1000_82543) {
cd94dd0b 789 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 790 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
1532ecea 791 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
792 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
793 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
1532ecea 794 value = E1000_RAR_ENTRIES;
cd94dd0b 795 for (i = 0; i < value; i++) {
1da177e4 796 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 797 0xFFFFFFFF);
1da177e4 798 }
1da177e4 799 } else {
1da177e4
LT
800 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
801 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
802 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
803 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
1da177e4
LT
804 }
805
1532ecea 806 value = E1000_MC_TBL_SIZE;
cd94dd0b 807 for (i = 0; i < value; i++)
1da177e4
LT
808 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
809
810 *data = 0;
811 return 0;
812}
813
64798845 814static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 815{
1dc32918 816 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
817 u16 temp;
818 u16 checksum = 0;
819 u16 i;
1da177e4
LT
820
821 *data = 0;
822 /* Read and add up the contents of the EEPROM */
96838a40 823 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
1dc32918 824 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
1da177e4
LT
825 *data = 1;
826 break;
827 }
828 checksum += temp;
829 }
830
831 /* If Checksum is not Correct return error else test passed */
e982f17c 832 if ((checksum != (u16)EEPROM_SUM) && !(*data))
1da177e4
LT
833 *data = 2;
834
835 return *data;
836}
837
64798845 838static irqreturn_t e1000_test_intr(int irq, void *data)
1da177e4 839{
e982f17c 840 struct net_device *netdev = (struct net_device *)data;
60490fe0 841 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 842 struct e1000_hw *hw = &adapter->hw;
1da177e4 843
1dc32918 844 adapter->test_icr |= er32(ICR);
1da177e4
LT
845
846 return IRQ_HANDLED;
847}
848
64798845 849static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT
850{
851 struct net_device *netdev = adapter->netdev;
406874a7 852 u32 mask, i = 0;
c3033b01 853 bool shared_int = true;
406874a7 854 u32 irq = adapter->pdev->irq;
1dc32918 855 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
856
857 *data = 0;
858
6cfbd97b
JK
859 /* NOTE: we don't test MSI interrupts here, yet
860 * Hook up test interrupt handler just for this test
861 */
a0607fd3 862 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
6cfbd97b 863 netdev))
c3033b01 864 shared_int = false;
a0607fd3 865 else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
6cfbd97b 866 netdev->name, netdev)) {
1da177e4
LT
867 *data = 1;
868 return -1;
869 }
feb8f478
ET
870 e_info(hw, "testing %s interrupt\n", (shared_int ?
871 "shared" : "unshared"));
1da177e4
LT
872
873 /* Disable all the interrupts */
1dc32918 874 ew32(IMC, 0xFFFFFFFF);
945a5151 875 E1000_WRITE_FLUSH();
f8ec4733 876 msleep(10);
1da177e4
LT
877
878 /* Test each interrupt */
96838a40 879 for (; i < 10; i++) {
1da177e4
LT
880
881 /* Interrupt to test */
882 mask = 1 << i;
883
76c224bc
AK
884 if (!shared_int) {
885 /* Disable the interrupt to be reported in
886 * the cause register and then force the same
887 * interrupt and see if one gets posted. If
888 * an interrupt was posted to the bus, the
889 * test failed.
890 */
891 adapter->test_icr = 0;
1dc32918
JP
892 ew32(IMC, mask);
893 ew32(ICS, mask);
945a5151 894 E1000_WRITE_FLUSH();
f8ec4733 895 msleep(10);
76c224bc
AK
896
897 if (adapter->test_icr & mask) {
898 *data = 3;
899 break;
900 }
1da177e4
LT
901 }
902
903 /* Enable the interrupt to be reported in
904 * the cause register and then force the same
905 * interrupt and see if one gets posted. If
906 * an interrupt was not posted to the bus, the
907 * test failed.
908 */
909 adapter->test_icr = 0;
1dc32918
JP
910 ew32(IMS, mask);
911 ew32(ICS, mask);
945a5151 912 E1000_WRITE_FLUSH();
f8ec4733 913 msleep(10);
1da177e4 914
96838a40 915 if (!(adapter->test_icr & mask)) {
1da177e4
LT
916 *data = 4;
917 break;
918 }
919
76c224bc 920 if (!shared_int) {
1da177e4
LT
921 /* Disable the other interrupts to be reported in
922 * the cause register and then force the other
923 * interrupts and see if any get posted. If
924 * an interrupt was posted to the bus, the
925 * test failed.
926 */
927 adapter->test_icr = 0;
1dc32918
JP
928 ew32(IMC, ~mask & 0x00007FFF);
929 ew32(ICS, ~mask & 0x00007FFF);
945a5151 930 E1000_WRITE_FLUSH();
f8ec4733 931 msleep(10);
1da177e4 932
96838a40 933 if (adapter->test_icr) {
1da177e4
LT
934 *data = 5;
935 break;
936 }
937 }
938 }
939
940 /* Disable all the interrupts */
1dc32918 941 ew32(IMC, 0xFFFFFFFF);
945a5151 942 E1000_WRITE_FLUSH();
f8ec4733 943 msleep(10);
1da177e4
LT
944
945 /* Unhook test interrupt handler */
946 free_irq(irq, netdev);
947
948 return *data;
949}
950
64798845 951static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1da177e4 952{
581d708e
MC
953 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
954 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
955 struct pci_dev *pdev = adapter->pdev;
956 int i;
957
96838a40
JB
958 if (txdr->desc && txdr->buffer_info) {
959 for (i = 0; i < txdr->count; i++) {
960 if (txdr->buffer_info[i].dma)
b16f53be
NN
961 dma_unmap_single(&pdev->dev,
962 txdr->buffer_info[i].dma,
1da177e4 963 txdr->buffer_info[i].length,
b16f53be 964 DMA_TO_DEVICE);
96838a40 965 if (txdr->buffer_info[i].skb)
1da177e4
LT
966 dev_kfree_skb(txdr->buffer_info[i].skb);
967 }
968 }
969
96838a40
JB
970 if (rxdr->desc && rxdr->buffer_info) {
971 for (i = 0; i < rxdr->count; i++) {
972 if (rxdr->buffer_info[i].dma)
b16f53be
NN
973 dma_unmap_single(&pdev->dev,
974 rxdr->buffer_info[i].dma,
1da177e4 975 rxdr->buffer_info[i].length,
b16f53be 976 DMA_FROM_DEVICE);
96838a40 977 if (rxdr->buffer_info[i].skb)
1da177e4
LT
978 dev_kfree_skb(rxdr->buffer_info[i].skb);
979 }
980 }
981
f5645110 982 if (txdr->desc) {
b16f53be
NN
983 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
984 txdr->dma);
6b27adb6
JL
985 txdr->desc = NULL;
986 }
f5645110 987 if (rxdr->desc) {
b16f53be
NN
988 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
989 rxdr->dma);
6b27adb6
JL
990 rxdr->desc = NULL;
991 }
1da177e4 992
b4558ea9 993 kfree(txdr->buffer_info);
6b27adb6 994 txdr->buffer_info = NULL;
b4558ea9 995 kfree(rxdr->buffer_info);
6b27adb6 996 rxdr->buffer_info = NULL;
1da177e4
LT
997}
998
64798845 999static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1da177e4 1000{
1dc32918 1001 struct e1000_hw *hw = &adapter->hw;
581d708e
MC
1002 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1003 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1004 struct pci_dev *pdev = adapter->pdev;
406874a7 1005 u32 rctl;
1c7e5b12 1006 int i, ret_val;
1da177e4
LT
1007
1008 /* Setup Tx descriptor ring and Tx buffers */
1009
96838a40
JB
1010 if (!txdr->count)
1011 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1012
c7be73bc
JP
1013 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer),
1014 GFP_KERNEL);
1015 if (!txdr->buffer_info) {
1da177e4
LT
1016 ret_val = 1;
1017 goto err_nomem;
1018 }
1da177e4
LT
1019
1020 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1021 txdr->size = ALIGN(txdr->size, 4096);
ede23fa8
JP
1022 txdr->desc = dma_zalloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1023 GFP_KERNEL);
c7be73bc 1024 if (!txdr->desc) {
1da177e4
LT
1025 ret_val = 2;
1026 goto err_nomem;
1027 }
1da177e4
LT
1028 txdr->next_to_use = txdr->next_to_clean = 0;
1029
e982f17c
JP
1030 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
1031 ew32(TDBAH, ((u64)txdr->dma >> 32));
1dc32918
JP
1032 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
1033 ew32(TDH, 0);
1034 ew32(TDT, 0);
1035 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
1036 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1037 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1da177e4 1038
96838a40 1039 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1040 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1041 struct sk_buff *skb;
1042 unsigned int size = 1024;
1043
c7be73bc
JP
1044 skb = alloc_skb(size, GFP_KERNEL);
1045 if (!skb) {
1da177e4
LT
1046 ret_val = 3;
1047 goto err_nomem;
1048 }
1049 skb_put(skb, size);
1050 txdr->buffer_info[i].skb = skb;
1051 txdr->buffer_info[i].length = skb->len;
1052 txdr->buffer_info[i].dma =
b16f53be
NN
1053 dma_map_single(&pdev->dev, skb->data, skb->len,
1054 DMA_TO_DEVICE);
d6b057b5
CP
1055 if (dma_mapping_error(&pdev->dev, txdr->buffer_info[i].dma)) {
1056 ret_val = 4;
1057 goto err_nomem;
1058 }
1da177e4
LT
1059 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1060 tx_desc->lower.data = cpu_to_le32(skb->len);
1061 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1062 E1000_TXD_CMD_IFCS |
1063 E1000_TXD_CMD_RPS);
1064 tx_desc->upper.data = 0;
1065 }
1066
1067 /* Setup Rx descriptor ring and Rx buffers */
1068
96838a40
JB
1069 if (!rxdr->count)
1070 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1071
c7be73bc
JP
1072 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer),
1073 GFP_KERNEL);
1074 if (!rxdr->buffer_info) {
d6b057b5 1075 ret_val = 5;
1da177e4
LT
1076 goto err_nomem;
1077 }
1da177e4
LT
1078
1079 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
ede23fa8
JP
1080 rxdr->desc = dma_zalloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1081 GFP_KERNEL);
c7be73bc 1082 if (!rxdr->desc) {
d6b057b5 1083 ret_val = 6;
1da177e4
LT
1084 goto err_nomem;
1085 }
1da177e4
LT
1086 rxdr->next_to_use = rxdr->next_to_clean = 0;
1087
1dc32918
JP
1088 rctl = er32(RCTL);
1089 ew32(RCTL, rctl & ~E1000_RCTL_EN);
e982f17c
JP
1090 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
1091 ew32(RDBAH, ((u64)rxdr->dma >> 32));
1dc32918
JP
1092 ew32(RDLEN, rxdr->size);
1093 ew32(RDH, 0);
1094 ew32(RDT, 0);
1da177e4
LT
1095 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1096 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918
JP
1097 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1098 ew32(RCTL, rctl);
1da177e4 1099
96838a40 1100 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1101 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1102 struct sk_buff *skb;
1103
c7be73bc
JP
1104 skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL);
1105 if (!skb) {
d6b057b5 1106 ret_val = 7;
1da177e4
LT
1107 goto err_nomem;
1108 }
1109 skb_reserve(skb, NET_IP_ALIGN);
1110 rxdr->buffer_info[i].skb = skb;
1111 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1112 rxdr->buffer_info[i].dma =
b16f53be
NN
1113 dma_map_single(&pdev->dev, skb->data,
1114 E1000_RXBUFFER_2048, DMA_FROM_DEVICE);
d6b057b5
CP
1115 if (dma_mapping_error(&pdev->dev, rxdr->buffer_info[i].dma)) {
1116 ret_val = 8;
1117 goto err_nomem;
1118 }
1da177e4
LT
1119 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1120 memset(skb->data, 0x00, skb->len);
1121 }
1122
1123 return 0;
1124
1125err_nomem:
1126 e1000_free_desc_rings(adapter);
1127 return ret_val;
1128}
1129
64798845 1130static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1da177e4 1131{
1dc32918
JP
1132 struct e1000_hw *hw = &adapter->hw;
1133
1da177e4 1134 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1dc32918
JP
1135 e1000_write_phy_reg(hw, 29, 0x001F);
1136 e1000_write_phy_reg(hw, 30, 0x8FFC);
1137 e1000_write_phy_reg(hw, 29, 0x001A);
1138 e1000_write_phy_reg(hw, 30, 0x8FF0);
1da177e4
LT
1139}
1140
64798845 1141static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1da177e4 1142{
1dc32918 1143 struct e1000_hw *hw = &adapter->hw;
406874a7 1144 u16 phy_reg;
1da177e4
LT
1145
1146 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1147 * Extended PHY Specific Control Register to 25MHz clock. This
1148 * value defaults back to a 2.5MHz clock when the PHY is reset.
1149 */
1dc32918 1150 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1151 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1dc32918 1152 e1000_write_phy_reg(hw,
1da177e4
LT
1153 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1154
1155 /* In addition, because of the s/w reset above, we need to enable
1156 * CRS on TX. This must be set for both full and half duplex
1157 * operation.
1158 */
1dc32918 1159 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1160 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1dc32918 1161 e1000_write_phy_reg(hw,
1da177e4
LT
1162 M88E1000_PHY_SPEC_CTRL, phy_reg);
1163}
1164
64798845 1165static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1166{
1dc32918 1167 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1168 u32 ctrl_reg;
1169 u16 phy_reg;
1da177e4
LT
1170
1171 /* Setup the Device Control Register for PHY loopback test. */
1172
1dc32918 1173 ctrl_reg = er32(CTRL);
1da177e4
LT
1174 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1175 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1176 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1177 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1178 E1000_CTRL_FD); /* Force Duplex to FULL */
1179
1dc32918 1180 ew32(CTRL, ctrl_reg);
1da177e4
LT
1181
1182 /* Read the PHY Specific Control Register (0x10) */
1dc32918 1183 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4
LT
1184
1185 /* Clear Auto-Crossover bits in PHY Specific Control Register
1186 * (bits 6:5).
1187 */
1188 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1dc32918 1189 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1da177e4
LT
1190
1191 /* Perform software reset on the PHY */
1dc32918 1192 e1000_phy_reset(hw);
1da177e4
LT
1193
1194 /* Have to setup TX_CLK and TX_CRS after software reset */
1195 e1000_phy_reset_clk_and_crs(adapter);
1196
1dc32918 1197 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1da177e4
LT
1198
1199 /* Wait for reset to complete. */
1200 udelay(500);
1201
1202 /* Have to setup TX_CLK and TX_CRS after software reset */
1203 e1000_phy_reset_clk_and_crs(adapter);
1204
1205 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1206 e1000_phy_disable_receiver(adapter);
1207
1208 /* Set the loopback bit in the PHY control register. */
1dc32918 1209 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1210 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1211 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT
1212
1213 /* Setup TX_CLK and TX_CRS one more time. */
1214 e1000_phy_reset_clk_and_crs(adapter);
1215
1216 /* Check Phy Configuration */
1dc32918 1217 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
96838a40 1218 if (phy_reg != 0x4100)
1da177e4
LT
1219 return 9;
1220
1dc32918 1221 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1222 if (phy_reg != 0x0070)
1da177e4
LT
1223 return 10;
1224
1dc32918 1225 e1000_read_phy_reg(hw, 29, &phy_reg);
96838a40 1226 if (phy_reg != 0x001A)
1da177e4
LT
1227 return 11;
1228
1229 return 0;
1230}
1231
64798845 1232static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1233{
1dc32918 1234 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1235 u32 ctrl_reg = 0;
1236 u32 stat_reg = 0;
1da177e4 1237
1dc32918 1238 hw->autoneg = false;
1da177e4 1239
1dc32918 1240 if (hw->phy_type == e1000_phy_m88) {
1da177e4 1241 /* Auto-MDI/MDIX Off */
1dc32918 1242 e1000_write_phy_reg(hw,
1da177e4
LT
1243 M88E1000_PHY_SPEC_CTRL, 0x0808);
1244 /* reset to update Auto-MDI/MDIX */
1dc32918 1245 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1da177e4 1246 /* autoneg off */
1dc32918 1247 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1532ecea 1248 }
1da177e4 1249
1dc32918 1250 ctrl_reg = er32(CTRL);
cd94dd0b 1251
1532ecea
JB
1252 /* force 1000, set loopback */
1253 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
cd94dd0b 1254
1532ecea
JB
1255 /* Now set up the MAC to the same speed/duplex as the PHY. */
1256 ctrl_reg = er32(CTRL);
1257 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1258 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1259 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1260 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
6cfbd97b 1261 E1000_CTRL_FD); /* Force Duplex to FULL */
1da177e4 1262
1dc32918
JP
1263 if (hw->media_type == e1000_media_type_copper &&
1264 hw->phy_type == e1000_phy_m88)
1da177e4 1265 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1266 else {
1da177e4 1267 /* Set the ILOS bit on the fiber Nic is half
6cfbd97b
JK
1268 * duplex link is detected.
1269 */
1dc32918 1270 stat_reg = er32(STATUS);
96838a40 1271 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1272 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1273 }
1274
1dc32918 1275 ew32(CTRL, ctrl_reg);
1da177e4
LT
1276
1277 /* Disable the receiver on the PHY so when a cable is plugged in, the
1278 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1279 */
1dc32918 1280 if (hw->phy_type == e1000_phy_m88)
1da177e4
LT
1281 e1000_phy_disable_receiver(adapter);
1282
1283 udelay(500);
1284
1285 return 0;
1286}
1287
64798845 1288static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1289{
1dc32918 1290 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1291 u16 phy_reg = 0;
1292 u16 count = 0;
1da177e4 1293
1dc32918 1294 switch (hw->mac_type) {
1da177e4 1295 case e1000_82543:
1dc32918 1296 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
1297 /* Attempt to setup Loopback mode on Non-integrated PHY.
1298 * Some PHY registers get corrupted at random, so
1299 * attempt this 10 times.
1300 */
96838a40 1301 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1302 count++ < 10);
96838a40 1303 if (count < 11)
1da177e4
LT
1304 return 0;
1305 }
1306 break;
1307
1308 case e1000_82544:
1309 case e1000_82540:
1310 case e1000_82545:
1311 case e1000_82545_rev_3:
1312 case e1000_82546:
1313 case e1000_82546_rev_3:
1314 case e1000_82541:
1315 case e1000_82541_rev_2:
1316 case e1000_82547:
1317 case e1000_82547_rev_2:
1318 return e1000_integrated_phy_loopback(adapter);
1319 break;
1da177e4
LT
1320 default:
1321 /* Default PHY loopback work is to read the MII
1322 * control register and assert bit 14 (loopback mode).
1323 */
1dc32918 1324 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1325 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1326 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT
1327 return 0;
1328 break;
1329 }
1330
1331 return 8;
1332}
1333
64798845 1334static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1da177e4 1335{
49273163 1336 struct e1000_hw *hw = &adapter->hw;
406874a7 1337 u32 rctl;
1da177e4 1338
49273163
JK
1339 if (hw->media_type == e1000_media_type_fiber ||
1340 hw->media_type == e1000_media_type_internal_serdes) {
1341 switch (hw->mac_type) {
1342 case e1000_82545:
1343 case e1000_82546:
1344 case e1000_82545_rev_3:
1345 case e1000_82546_rev_3:
1da177e4 1346 return e1000_set_phy_loopback(adapter);
49273163 1347 break;
49273163 1348 default:
1dc32918 1349 rctl = er32(RCTL);
1da177e4 1350 rctl |= E1000_RCTL_LBM_TCVR;
1dc32918 1351 ew32(RCTL, rctl);
1da177e4
LT
1352 return 0;
1353 }
49273163 1354 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1355 return e1000_set_phy_loopback(adapter);
1356
1357 return 7;
1358}
1359
64798845 1360static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1da177e4 1361{
49273163 1362 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1363 u32 rctl;
1364 u16 phy_reg;
1da177e4 1365
1dc32918 1366 rctl = er32(RCTL);
1da177e4 1367 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1dc32918 1368 ew32(RCTL, rctl);
1da177e4 1369
49273163 1370 switch (hw->mac_type) {
49273163
JK
1371 case e1000_82545:
1372 case e1000_82546:
1373 case e1000_82545_rev_3:
1374 case e1000_82546_rev_3:
1375 default:
c3033b01 1376 hw->autoneg = true;
49273163
JK
1377 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1378 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1379 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1380 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1381 e1000_phy_reset(hw);
1da177e4 1382 }
49273163 1383 break;
1da177e4
LT
1384 }
1385}
1386
64798845
JP
1387static void e1000_create_lbtest_frame(struct sk_buff *skb,
1388 unsigned int frame_size)
1da177e4
LT
1389{
1390 memset(skb->data, 0xFF, frame_size);
ce7393b9 1391 frame_size &= ~1;
1da177e4
LT
1392 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1393 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1394 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1395}
1396
64798845
JP
1397static int e1000_check_lbtest_frame(struct sk_buff *skb,
1398 unsigned int frame_size)
1da177e4 1399{
ce7393b9 1400 frame_size &= ~1;
96838a40
JB
1401 if (*(skb->data + 3) == 0xFF) {
1402 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1403 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1404 return 0;
1405 }
1406 }
1407 return 13;
1408}
1409
64798845 1410static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1da177e4 1411{
1dc32918 1412 struct e1000_hw *hw = &adapter->hw;
581d708e
MC
1413 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1414 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1415 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1416 int i, j, k, l, lc, good_cnt, ret_val=0;
1417 unsigned long time;
1da177e4 1418
1dc32918 1419 ew32(RDT, rxdr->count - 1);
1da177e4 1420
96838a40 1421 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1422 * The idea is to wrap the largest ring a number of times using 64
1423 * send/receive pairs during each loop
1424 */
1da177e4 1425
96838a40 1426 if (rxdr->count <= txdr->count)
e4eff729
MC
1427 lc = ((txdr->count / 64) * 2) + 1;
1428 else
1429 lc = ((rxdr->count / 64) * 2) + 1;
1430
1431 k = l = 0;
96838a40
JB
1432 for (j = 0; j <= lc; j++) { /* loop count loop */
1433 for (i = 0; i < 64; i++) { /* send the packets */
1434 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1435 1024);
b16f53be
NN
1436 dma_sync_single_for_device(&pdev->dev,
1437 txdr->buffer_info[k].dma,
1438 txdr->buffer_info[k].length,
1439 DMA_TO_DEVICE);
96838a40 1440 if (unlikely(++k == txdr->count)) k = 0;
e4eff729 1441 }
1dc32918 1442 ew32(TDT, k);
945a5151 1443 E1000_WRITE_FLUSH();
f8ec4733 1444 msleep(200);
e4eff729
MC
1445 time = jiffies; /* set the start time for the receive */
1446 good_cnt = 0;
1447 do { /* receive the sent packets */
b16f53be
NN
1448 dma_sync_single_for_cpu(&pdev->dev,
1449 rxdr->buffer_info[l].dma,
1450 rxdr->buffer_info[l].length,
1451 DMA_FROM_DEVICE);
96838a40 1452
e4eff729
MC
1453 ret_val = e1000_check_lbtest_frame(
1454 rxdr->buffer_info[l].skb,
6cfbd97b 1455 1024);
96838a40 1456 if (!ret_val)
e4eff729 1457 good_cnt++;
96838a40
JB
1458 if (unlikely(++l == rxdr->count)) l = 0;
1459 /* time + 20 msecs (200 msecs on 2.4) is more than
1460 * enough time to complete the receives, if it's
e4eff729
MC
1461 * exceeded, break and error off
1462 */
1463 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1464 if (good_cnt != 64) {
e4eff729 1465 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1466 break;
e4eff729 1467 }
96838a40 1468 if (jiffies >= (time + 2)) {
e4eff729
MC
1469 ret_val = 14; /* error code for time out error */
1470 break;
1471 }
1472 } /* end loop count loop */
1da177e4
LT
1473 return ret_val;
1474}
1475
64798845 1476static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1477{
c7be73bc
JP
1478 *data = e1000_setup_desc_rings(adapter);
1479 if (*data)
57128197 1480 goto out;
c7be73bc
JP
1481 *data = e1000_setup_loopback_test(adapter);
1482 if (*data)
57128197 1483 goto err_loopback;
1da177e4
LT
1484 *data = e1000_run_loopback_test(adapter);
1485 e1000_loopback_cleanup(adapter);
57128197 1486
1da177e4 1487err_loopback:
57128197
JK
1488 e1000_free_desc_rings(adapter);
1489out:
1da177e4
LT
1490 return *data;
1491}
1492
64798845 1493static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1494{
1dc32918 1495 struct e1000_hw *hw = &adapter->hw;
1da177e4 1496 *data = 0;
1dc32918 1497 if (hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 1498 int i = 0;
be0f0719 1499 hw->serdes_has_link = false;
1da177e4 1500
2648345f 1501 /* On some blade server designs, link establishment
6cfbd97b
JK
1502 * could take as long as 2-3 minutes
1503 */
1da177e4 1504 do {
1dc32918 1505 e1000_check_for_link(hw);
be0f0719 1506 if (hw->serdes_has_link)
1da177e4 1507 return *data;
f8ec4733 1508 msleep(20);
1da177e4
LT
1509 } while (i++ < 3750);
1510
2648345f 1511 *data = 1;
1da177e4 1512 } else {
1dc32918
JP
1513 e1000_check_for_link(hw);
1514 if (hw->autoneg) /* if auto_neg is set wait for it */
f8ec4733 1515 msleep(4000);
1da177e4 1516
1dc32918 1517 if (!(er32(STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1518 *data = 1;
1519 }
1520 }
1521 return *data;
1522}
1523
64798845 1524static int e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1525{
b9f2c044
JG
1526 switch (sset) {
1527 case ETH_SS_TEST:
1528 return E1000_TEST_LEN;
1529 case ETH_SS_STATS:
1530 return E1000_STATS_LEN;
1531 default:
1532 return -EOPNOTSUPP;
1533 }
1da177e4
LT
1534}
1535
64798845
JP
1536static void e1000_diag_test(struct net_device *netdev,
1537 struct ethtool_test *eth_test, u64 *data)
1da177e4 1538{
60490fe0 1539 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1540 struct e1000_hw *hw = &adapter->hw;
c3033b01 1541 bool if_running = netif_running(netdev);
1da177e4 1542
1314bbf3 1543 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1544 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1545 /* Offline tests */
1546
1547 /* save speed, duplex, autoneg settings */
1dc32918
JP
1548 u16 autoneg_advertised = hw->autoneg_advertised;
1549 u8 forced_speed_duplex = hw->forced_speed_duplex;
1550 u8 autoneg = hw->autoneg;
1da177e4 1551
feb8f478 1552 e_info(hw, "offline testing starting\n");
d658266e 1553
1da177e4 1554 /* Link test performed before hardware reset so autoneg doesn't
6cfbd97b
JK
1555 * interfere with test result
1556 */
96838a40 1557 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1558 eth_test->flags |= ETH_TEST_FL_FAILED;
1559
96838a40 1560 if (if_running)
2db10a08
AK
1561 /* indicate we're in test mode */
1562 dev_close(netdev);
1da177e4
LT
1563 else
1564 e1000_reset(adapter);
1565
96838a40 1566 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1567 eth_test->flags |= ETH_TEST_FL_FAILED;
1568
1569 e1000_reset(adapter);
96838a40 1570 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1571 eth_test->flags |= ETH_TEST_FL_FAILED;
1572
1573 e1000_reset(adapter);
96838a40 1574 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1575 eth_test->flags |= ETH_TEST_FL_FAILED;
1576
1577 e1000_reset(adapter);
d658266e
JB
1578 /* make sure the phy is powered up */
1579 e1000_power_up_phy(adapter);
96838a40 1580 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1581 eth_test->flags |= ETH_TEST_FL_FAILED;
1582
1583 /* restore speed, duplex, autoneg settings */
1dc32918
JP
1584 hw->autoneg_advertised = autoneg_advertised;
1585 hw->forced_speed_duplex = forced_speed_duplex;
1586 hw->autoneg = autoneg;
1da177e4
LT
1587
1588 e1000_reset(adapter);
1314bbf3 1589 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1590 if (if_running)
2db10a08 1591 dev_open(netdev);
1da177e4 1592 } else {
feb8f478 1593 e_info(hw, "online testing starting\n");
1da177e4 1594 /* Online tests */
96838a40 1595 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1596 eth_test->flags |= ETH_TEST_FL_FAILED;
1597
90fb5135 1598 /* Online tests aren't run; pass by default */
1da177e4
LT
1599 data[0] = 0;
1600 data[1] = 0;
1601 data[2] = 0;
1602 data[3] = 0;
2db10a08 1603
1314bbf3 1604 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1605 }
352c9f85 1606 msleep_interruptible(4 * 1000);
1da177e4
LT
1607}
1608
64798845
JP
1609static int e1000_wol_exclusion(struct e1000_adapter *adapter,
1610 struct ethtool_wolinfo *wol)
1da177e4 1611{
1da177e4 1612 struct e1000_hw *hw = &adapter->hw;
120cd576 1613 int retval = 1; /* fail by default */
1da177e4 1614
120cd576 1615 switch (hw->device_id) {
dc1f71f6 1616 case E1000_DEV_ID_82542:
1da177e4
LT
1617 case E1000_DEV_ID_82543GC_FIBER:
1618 case E1000_DEV_ID_82543GC_COPPER:
1619 case E1000_DEV_ID_82544EI_FIBER:
1620 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1621 case E1000_DEV_ID_82545EM_FIBER:
1622 case E1000_DEV_ID_82545EM_COPPER:
84916829 1623 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB
1624 case E1000_DEV_ID_82546GB_PCIE:
1625 /* these don't support WoL at all */
1da177e4 1626 wol->supported = 0;
120cd576 1627 break;
1da177e4
LT
1628 case E1000_DEV_ID_82546EB_FIBER:
1629 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1630 /* Wake events not supported on port B */
1dc32918 1631 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1632 wol->supported = 0;
120cd576 1633 break;
1da177e4 1634 }
120cd576
JB
1635 /* return success for non excluded adapter ports */
1636 retval = 0;
1637 break;
1638 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1639 /* quad port adapters only support WoL on port A */
1640 if (!adapter->quad_port_a) {
1641 wol->supported = 0;
1642 break;
1643 }
1644 /* return success for non excluded adapter ports */
1645 retval = 0;
1646 break;
1da177e4 1647 default:
120cd576
JB
1648 /* dual port cards only support WoL on port A from now on
1649 * unless it was enabled in the eeprom for port B
6cfbd97b
JK
1650 * so exclude FUNC_1 ports from having WoL enabled
1651 */
1dc32918 1652 if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
120cd576
JB
1653 !adapter->eeprom_wol) {
1654 wol->supported = 0;
1655 break;
1656 }
84916829 1657
120cd576
JB
1658 retval = 0;
1659 }
1660
1661 return retval;
1662}
1663
64798845
JP
1664static void e1000_get_wol(struct net_device *netdev,
1665 struct ethtool_wolinfo *wol)
120cd576
JB
1666{
1667 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1668 struct e1000_hw *hw = &adapter->hw;
120cd576
JB
1669
1670 wol->supported = WAKE_UCAST | WAKE_MCAST |
1671 WAKE_BCAST | WAKE_MAGIC;
1672 wol->wolopts = 0;
1673
1674 /* this function will set ->supported = 0 and return 1 if wol is not
6cfbd97b
JK
1675 * supported by this hardware
1676 */
de126489
RW
1677 if (e1000_wol_exclusion(adapter, wol) ||
1678 !device_can_wakeup(&adapter->pdev->dev))
1da177e4 1679 return;
120cd576
JB
1680
1681 /* apply any specific unsupported masks here */
1dc32918 1682 switch (hw->device_id) {
120cd576 1683 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
d7558148 1684 /* KSP3 does not support UCAST wake-ups */
120cd576
JB
1685 wol->supported &= ~WAKE_UCAST;
1686
1687 if (adapter->wol & E1000_WUFC_EX)
feb8f478
ET
1688 e_err(drv, "Interface does not support directed "
1689 "(unicast) frame wake-up packets\n");
120cd576
JB
1690 break;
1691 default:
1692 break;
1da177e4 1693 }
120cd576
JB
1694
1695 if (adapter->wol & E1000_WUFC_EX)
1696 wol->wolopts |= WAKE_UCAST;
1697 if (adapter->wol & E1000_WUFC_MC)
1698 wol->wolopts |= WAKE_MCAST;
1699 if (adapter->wol & E1000_WUFC_BC)
1700 wol->wolopts |= WAKE_BCAST;
1701 if (adapter->wol & E1000_WUFC_MAG)
1702 wol->wolopts |= WAKE_MAGIC;
1da177e4
LT
1703}
1704
64798845 1705static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1da177e4 1706{
60490fe0 1707 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1708 struct e1000_hw *hw = &adapter->hw;
1709
120cd576
JB
1710 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1711 return -EOPNOTSUPP;
1712
de126489
RW
1713 if (e1000_wol_exclusion(adapter, wol) ||
1714 !device_can_wakeup(&adapter->pdev->dev))
1da177e4
LT
1715 return wol->wolopts ? -EOPNOTSUPP : 0;
1716
120cd576 1717 switch (hw->device_id) {
84916829 1718 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829 1719 if (wol->wolopts & WAKE_UCAST) {
feb8f478
ET
1720 e_err(drv, "Interface does not support directed "
1721 "(unicast) frame wake-up packets\n");
84916829
JK
1722 return -EOPNOTSUPP;
1723 }
120cd576 1724 break;
1da177e4 1725 default:
120cd576 1726 break;
1da177e4
LT
1727 }
1728
120cd576
JB
1729 /* these settings will always override what we currently have */
1730 adapter->wol = 0;
1731
1732 if (wol->wolopts & WAKE_UCAST)
1733 adapter->wol |= E1000_WUFC_EX;
1734 if (wol->wolopts & WAKE_MCAST)
1735 adapter->wol |= E1000_WUFC_MC;
1736 if (wol->wolopts & WAKE_BCAST)
1737 adapter->wol |= E1000_WUFC_BC;
1738 if (wol->wolopts & WAKE_MAGIC)
1739 adapter->wol |= E1000_WUFC_MAG;
1740
de126489
RW
1741 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1742
1da177e4
LT
1743 return 0;
1744}
1745
64359091
JK
1746static int e1000_set_phys_id(struct net_device *netdev,
1747 enum ethtool_phys_id_state state)
1da177e4 1748{
64359091 1749 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1750 struct e1000_hw *hw = &adapter->hw;
1da177e4 1751
64359091
JK
1752 switch (state) {
1753 case ETHTOOL_ID_ACTIVE:
1754 e1000_setup_led(hw);
1755 return 2;
1da177e4 1756
64359091
JK
1757 case ETHTOOL_ID_ON:
1758 e1000_led_on(hw);
1759 break;
1da177e4 1760
64359091
JK
1761 case ETHTOOL_ID_OFF:
1762 e1000_led_off(hw);
1763 break;
1da177e4 1764
64359091
JK
1765 case ETHTOOL_ID_INACTIVE:
1766 e1000_cleanup_led(hw);
1da177e4 1767 }
1da177e4
LT
1768
1769 return 0;
1770}
1771
94c9e5a8
JB
1772static int e1000_get_coalesce(struct net_device *netdev,
1773 struct ethtool_coalesce *ec)
1774{
1775 struct e1000_adapter *adapter = netdev_priv(netdev);
1776
1777 if (adapter->hw.mac_type < e1000_82545)
1778 return -EOPNOTSUPP;
1779
eab2abf5 1780 if (adapter->itr_setting <= 4)
94c9e5a8
JB
1781 ec->rx_coalesce_usecs = adapter->itr_setting;
1782 else
1783 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1784
1785 return 0;
1786}
1787
1788static int e1000_set_coalesce(struct net_device *netdev,
1789 struct ethtool_coalesce *ec)
1790{
1791 struct e1000_adapter *adapter = netdev_priv(netdev);
1792 struct e1000_hw *hw = &adapter->hw;
1793
1794 if (hw->mac_type < e1000_82545)
1795 return -EOPNOTSUPP;
1796
1797 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1798 ((ec->rx_coalesce_usecs > 4) &&
94c9e5a8
JB
1799 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1800 (ec->rx_coalesce_usecs == 2))
1801 return -EINVAL;
1802
eab2abf5
JB
1803 if (ec->rx_coalesce_usecs == 4) {
1804 adapter->itr = adapter->itr_setting = 4;
1805 } else if (ec->rx_coalesce_usecs <= 3) {
94c9e5a8
JB
1806 adapter->itr = 20000;
1807 adapter->itr_setting = ec->rx_coalesce_usecs;
1808 } else {
1809 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1810 adapter->itr_setting = adapter->itr & ~3;
1811 }
1812
1813 if (adapter->itr_setting != 0)
1814 ew32(ITR, 1000000000 / (adapter->itr * 256));
1815 else
1816 ew32(ITR, 0);
1817
1818 return 0;
1819}
1820
64798845 1821static int e1000_nway_reset(struct net_device *netdev)
1da177e4 1822{
60490fe0 1823 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1824 if (netif_running(netdev))
1825 e1000_reinit_locked(adapter);
1da177e4
LT
1826 return 0;
1827}
1828
64798845
JP
1829static void e1000_get_ethtool_stats(struct net_device *netdev,
1830 struct ethtool_stats *stats, u64 *data)
1da177e4 1831{
60490fe0 1832 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1833 int i;
8328c38f 1834 char *p = NULL;
1da177e4
LT
1835
1836 e1000_update_stats(adapter);
7bfa4816 1837 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
8328c38f
AK
1838 switch (e1000_gstrings_stats[i].type) {
1839 case NETDEV_STATS:
1840 p = (char *) netdev +
1841 e1000_gstrings_stats[i].stat_offset;
1842 break;
1843 case E1000_STATS:
1844 p = (char *) adapter +
1845 e1000_gstrings_stats[i].stat_offset;
1846 break;
1847 }
1848
7bfa4816 1849 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1850 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1851 }
6cfbd97b 1852/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1853}
1854
64798845
JP
1855static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1856 u8 *data)
1da177e4 1857{
406874a7 1858 u8 *p = data;
1da177e4
LT
1859 int i;
1860
96838a40 1861 switch (stringset) {
1da177e4 1862 case ETH_SS_TEST:
96838a40 1863 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1864 sizeof(e1000_gstrings_test));
1da177e4
LT
1865 break;
1866 case ETH_SS_STATS:
7bfa4816
JK
1867 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1868 memcpy(p, e1000_gstrings_stats[i].stat_string,
1869 ETH_GSTRING_LEN);
1870 p += ETH_GSTRING_LEN;
1871 }
6cfbd97b 1872 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1873 break;
1874 }
1875}
1876
7282d491 1877static const struct ethtool_ops e1000_ethtool_ops = {
6cfbd97b
JK
1878 .get_settings = e1000_get_settings,
1879 .set_settings = e1000_set_settings,
1880 .get_drvinfo = e1000_get_drvinfo,
1881 .get_regs_len = e1000_get_regs_len,
1882 .get_regs = e1000_get_regs,
1883 .get_wol = e1000_get_wol,
1884 .set_wol = e1000_set_wol,
1885 .get_msglevel = e1000_get_msglevel,
1886 .set_msglevel = e1000_set_msglevel,
1887 .nway_reset = e1000_nway_reset,
1888 .get_link = e1000_get_link,
1889 .get_eeprom_len = e1000_get_eeprom_len,
1890 .get_eeprom = e1000_get_eeprom,
1891 .set_eeprom = e1000_set_eeprom,
1892 .get_ringparam = e1000_get_ringparam,
1893 .set_ringparam = e1000_set_ringparam,
1894 .get_pauseparam = e1000_get_pauseparam,
1895 .set_pauseparam = e1000_set_pauseparam,
1896 .self_test = e1000_diag_test,
1897 .get_strings = e1000_get_strings,
1898 .set_phys_id = e1000_set_phys_id,
1899 .get_ethtool_stats = e1000_get_ethtool_stats,
1900 .get_sset_count = e1000_get_sset_count,
1901 .get_coalesce = e1000_get_coalesce,
1902 .set_coalesce = e1000_set_coalesce,
e10df2c6 1903 .get_ts_info = ethtool_op_get_ts_info,
1da177e4
LT
1904};
1905
1906void e1000_set_ethtool_ops(struct net_device *netdev)
1907{
1908 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1909}
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