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e1000e: fix unit hang during loopback test
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000e / ethtool.c
CommitLineData
e78b80b1
DE		 1/* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2014 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
20 */
bc7f75fa
AK		 21
22/* ethtool support for e1000 */
23
24#include <linux/netdevice.h>
9fb7a5f7 25#include <linux/interrupt.h>
bc7f75fa
AK		 26#include <linux/ethtool.h>
27#include <linux/pci.h>
5a0e3ad6 28#include <linux/slab.h>
bc7f75fa 29#include <linux/delay.h>
c85c21ad 30#include <linux/vmalloc.h>
e60b22c5 31#include <linux/pm_runtime.h>
bc7f75fa
AK		 32
33#include "e1000.h"
34
362e20ca 35enum { NETDEV_STATS, E1000_STATS };
e0f36a95 36
bc7f75fa
AK		 37struct e1000_stats {
38 char stat_string[ETH_GSTRING_LEN];
e0f36a95 39 int type;
bc7f75fa
AK		 40 int sizeof_stat;
41 int stat_offset;
42};
43
f0f1a172 44#define E1000_STAT(str, m) { \
67fd4fcb
JK		 45 .stat_string = str, \
46 .type = E1000_STATS, \
47 .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
48 .stat_offset = offsetof(struct e1000_adapter, m) }
f0f1a172 49#define E1000_NETDEV_STAT(str, m) { \
67fd4fcb
JK		 50 .stat_string = str, \
51 .type = NETDEV_STATS, \
52 .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
53 .stat_offset = offsetof(struct rtnl_link_stats64, m) }
e0f36a95 54
bc7f75fa 55static const struct e1000_stats e1000_gstrings_stats[] = {
f0f1a172
BA		 56 E1000_STAT("rx_packets", stats.gprc),
57 E1000_STAT("tx_packets", stats.gptc),
58 E1000_STAT("rx_bytes", stats.gorc),
59 E1000_STAT("tx_bytes", stats.gotc),
60 E1000_STAT("rx_broadcast", stats.bprc),
61 E1000_STAT("tx_broadcast", stats.bptc),
62 E1000_STAT("rx_multicast", stats.mprc),
63 E1000_STAT("tx_multicast", stats.mptc),
67fd4fcb
JK		 64 E1000_NETDEV_STAT("rx_errors", rx_errors),
65 E1000_NETDEV_STAT("tx_errors", tx_errors),
66 E1000_NETDEV_STAT("tx_dropped", tx_dropped),
f0f1a172
BA		 67 E1000_STAT("multicast", stats.mprc),
68 E1000_STAT("collisions", stats.colc),
67fd4fcb
JK		 69 E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
70 E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
f0f1a172 71 E1000_STAT("rx_crc_errors", stats.crcerrs),
67fd4fcb 72 E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
f0f1a172
BA		 73 E1000_STAT("rx_no_buffer_count", stats.rnbc),
74 E1000_STAT("rx_missed_errors", stats.mpc),
75 E1000_STAT("tx_aborted_errors", stats.ecol),
76 E1000_STAT("tx_carrier_errors", stats.tncrs),
67fd4fcb
JK		 77 E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
78 E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
f0f1a172
BA		 79 E1000_STAT("tx_window_errors", stats.latecol),
80 E1000_STAT("tx_abort_late_coll", stats.latecol),
81 E1000_STAT("tx_deferred_ok", stats.dc),
82 E1000_STAT("tx_single_coll_ok", stats.scc),
83 E1000_STAT("tx_multi_coll_ok", stats.mcc),
84 E1000_STAT("tx_timeout_count", tx_timeout_count),
85 E1000_STAT("tx_restart_queue", restart_queue),
86 E1000_STAT("rx_long_length_errors", stats.roc),
87 E1000_STAT("rx_short_length_errors", stats.ruc),
88 E1000_STAT("rx_align_errors", stats.algnerrc),
89 E1000_STAT("tx_tcp_seg_good", stats.tsctc),
90 E1000_STAT("tx_tcp_seg_failed", stats.tsctfc),
91 E1000_STAT("rx_flow_control_xon", stats.xonrxc),
92 E1000_STAT("rx_flow_control_xoff", stats.xoffrxc),
93 E1000_STAT("tx_flow_control_xon", stats.xontxc),
94 E1000_STAT("tx_flow_control_xoff", stats.xofftxc),
f0f1a172
BA		 95 E1000_STAT("rx_csum_offload_good", hw_csum_good),
96 E1000_STAT("rx_csum_offload_errors", hw_csum_err),
97 E1000_STAT("rx_header_split", rx_hdr_split),
98 E1000_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
99 E1000_STAT("tx_smbus", stats.mgptc),
100 E1000_STAT("rx_smbus", stats.mgprc),
101 E1000_STAT("dropped_smbus", stats.mgpdc),
102 E1000_STAT("rx_dma_failed", rx_dma_failed),
103 E1000_STAT("tx_dma_failed", tx_dma_failed),
b67e1913 104 E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
94fb848b
BA		 105 E1000_STAT("uncorr_ecc_errors", uncorr_errors),
106 E1000_STAT("corr_ecc_errors", corr_errors),
59c871c5 107 E1000_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
bc7f75fa
AK		 108};
109
c00acf46 110#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
bc7f75fa
AK		 111#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN)
112static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
113 "Register test (offline)", "Eeprom test (offline)",
114 "Interrupt test (offline)", "Loopback test (offline)",
115 "Link test (on/offline)"
116};
fc830b78 117
ad68076e 118#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
bc7f75fa
AK		 119
120static int e1000_get_settings(struct net_device *netdev,
121 struct ethtool_cmd *ecmd)
122{
123 struct e1000_adapter *adapter = netdev_priv(netdev);
124 struct e1000_hw *hw = &adapter->hw;
70739497 125 u32 speed;
bc7f75fa 126
318a94d6 127 if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 128 ecmd->supported = (SUPPORTED_10baseT_Half |
129 SUPPORTED_10baseT_Full |
130 SUPPORTED_100baseT_Half |
131 SUPPORTED_100baseT_Full |
132 SUPPORTED_1000baseT_Full |
133 SUPPORTED_Autoneg |
134 SUPPORTED_TP);
135 if (hw->phy.type == e1000_phy_ife)
136 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
137 ecmd->advertising = ADVERTISED_TP;
138
139 if (hw->mac.autoneg == 1) {
140 ecmd->advertising |= ADVERTISED_Autoneg;
141 /* the e1000 autoneg seems to match ethtool nicely */
142 ecmd->advertising |= hw->phy.autoneg_advertised;
143 }
144
145 ecmd->port = PORT_TP;
146 ecmd->phy_address = hw->phy.addr;
147 ecmd->transceiver = XCVR_INTERNAL;
148
149 } else {
150 ecmd->supported = (SUPPORTED_1000baseT_Full |
151 SUPPORTED_FIBRE |
152 SUPPORTED_Autoneg);
153
154 ecmd->advertising = (ADVERTISED_1000baseT_Full |
155 ADVERTISED_FIBRE |
156 ADVERTISED_Autoneg);
157
158 ecmd->port = PORT_FIBRE;
159 ecmd->transceiver = XCVR_EXTERNAL;
160 }
161
537fae01
JP		 162 speed = SPEED_UNKNOWN;
163 ecmd->duplex = DUPLEX_UNKNOWN;
0c6bdb30
BA		 164
165 if (netif_running(netdev)) {
166 if (netif_carrier_ok(netdev)) {
70739497 167 speed = adapter->link_speed;
0c6bdb30
BA		 168 ecmd->duplex = adapter->link_duplex - 1;
169 }
3ef672ab 170 } else if (!pm_runtime_suspended(netdev->dev.parent)) {
0c6bdb30 171 u32 status = er32(STATUS);
6cf08d1c 172
0c6bdb30
BA		 173 if (status & E1000_STATUS_LU) {
174 if (status & E1000_STATUS_SPEED_1000)
70739497 175 speed = SPEED_1000;
0c6bdb30 176 else if (status & E1000_STATUS_SPEED_100)
70739497 177 speed = SPEED_100;
0c6bdb30 178 else
70739497 179 speed = SPEED_10;
0c6bdb30
BA		 180
181 if (status & E1000_STATUS_FD)
182 ecmd->duplex = DUPLEX_FULL;
183 else
184 ecmd->duplex = DUPLEX_HALF;
185 }
bc7f75fa
AK		 186 }
187
70739497 188 ethtool_cmd_speed_set(ecmd, speed);
318a94d6 189 ecmd->autoneg = ((hw->phy.media_type == e1000_media_type_fiber) ||
bc7f75fa 190 hw->mac.autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
18760f1e
CL		 191
192 /* MDI-X => 2; MDI =>1; Invalid =>0 */
193 if ((hw->phy.media_type == e1000_media_type_copper) &&
0c6bdb30 194 netif_carrier_ok(netdev))
f0ff4398 195 ecmd->eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X : ETH_TP_MDI;
18760f1e
CL		 196 else
197 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
198
4e8186b6
JB		 199 if (hw->phy.mdix == AUTO_ALL_MODES)
200 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
201 else
202 ecmd->eth_tp_mdix_ctrl = hw->phy.mdix;
203
bc7f75fa
AK		 204 return 0;
205}
206
14ad2513 207static int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
bc7f75fa
AK		 208{
209 struct e1000_mac_info *mac = &adapter->hw.mac;
210
211 mac->autoneg = 0;
212
14ad2513 213 /* Make sure dplx is at most 1 bit and lsb of speed is not set
e921eb1a
BA		 214 * for the switch() below to work
215 */
14ad2513
DD		 216 if ((spd & 1) || (dplx & ~1))
217 goto err_inval;
218
bc7f75fa 219 /* Fiber NICs only allow 1000 gbps Full duplex */
318a94d6 220 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
e5fe2541 221 (spd != SPEED_1000) && (dplx != DUPLEX_FULL)) {
14ad2513 222 goto err_inval;
bc7f75fa
AK		 223 }
224
14ad2513 225 switch (spd + dplx) {
bc7f75fa
AK		 226 case SPEED_10 + DUPLEX_HALF:
227 mac->forced_speed_duplex = ADVERTISE_10_HALF;
228 break;
229 case SPEED_10 + DUPLEX_FULL:
230 mac->forced_speed_duplex = ADVERTISE_10_FULL;
231 break;
232 case SPEED_100 + DUPLEX_HALF:
233 mac->forced_speed_duplex = ADVERTISE_100_HALF;
234 break;
235 case SPEED_100 + DUPLEX_FULL:
236 mac->forced_speed_duplex = ADVERTISE_100_FULL;
237 break;
238 case SPEED_1000 + DUPLEX_FULL:
239 mac->autoneg = 1;
240 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
241 break;
e80bd1d1 242 case SPEED_1000 + DUPLEX_HALF: /* not supported */
bc7f75fa 243 default:
14ad2513 244 goto err_inval;
bc7f75fa 245 }
4e8186b6
JB		 246
247 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
248 adapter->hw.phy.mdix = AUTO_ALL_MODES;
249
bc7f75fa 250 return 0;
14ad2513
DD		 251
252err_inval:
253 e_err("Unsupported Speed/Duplex configuration\n");
254 return -EINVAL;
bc7f75fa
AK		 255}
256
257static int e1000_set_settings(struct net_device *netdev,
258 struct ethtool_cmd *ecmd)
259{
260 struct e1000_adapter *adapter = netdev_priv(netdev);
261 struct e1000_hw *hw = &adapter->hw;
3ef672ab
BA		 262 int ret_val = 0;
263
264 pm_runtime_get_sync(netdev->dev.parent);
bc7f75fa 265
e921eb1a 266 /* When SoL/IDER sessions are active, autoneg/speed/duplex
ad68076e
BA		 267 * cannot be changed
268 */
470a5420
BA		 269 if (hw->phy.ops.check_reset_block &&
270 hw->phy.ops.check_reset_block(hw)) {
6ad65145 271 e_err("Cannot change link characteristics when SoL/IDER is active.\n");
3ef672ab
BA		 272 ret_val = -EINVAL;
273 goto out;
bc7f75fa
AK		 274 }
275
e921eb1a 276 /* MDI setting is only allowed when autoneg enabled because
4e8186b6
JB		 277 * some hardware doesn't allow MDI setting when speed or
278 * duplex is forced.
279 */
280 if (ecmd->eth_tp_mdix_ctrl) {
3ef672ab
BA		 281 if (hw->phy.media_type != e1000_media_type_copper) {
282 ret_val = -EOPNOTSUPP;
283 goto out;
284 }
4e8186b6
JB		 285
286 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
287 (ecmd->autoneg != AUTONEG_ENABLE)) {
288 e_err("forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
3ef672ab
BA		 289 ret_val = -EINVAL;
290 goto out;
4e8186b6
JB		 291 }
292 }
293
bc7f75fa 294 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 295 usleep_range(1000, 2000);
bc7f75fa
AK		 296
297 if (ecmd->autoneg == AUTONEG_ENABLE) {
298 hw->mac.autoneg = 1;
318a94d6 299 if (hw->phy.media_type == e1000_media_type_fiber)
bc7f75fa 300 hw->phy.autoneg_advertised = ADVERTISED_1000baseT_Full |
f0ff4398 301 ADVERTISED_FIBRE | ADVERTISED_Autoneg;
bc7f75fa
AK		 302 else
303 hw->phy.autoneg_advertised = ecmd->advertising |
f0ff4398 304 ADVERTISED_TP | ADVERTISED_Autoneg;
bc7f75fa 305 ecmd->advertising = hw->phy.autoneg_advertised;
318a94d6 306 if (adapter->fc_autoneg)
5c48ef3e 307 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa 308 } else {
25db0338 309 u32 speed = ethtool_cmd_speed(ecmd);
4e8186b6 310 /* calling this overrides forced MDI setting */
14ad2513 311 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
3ef672ab
BA		 312 ret_val = -EINVAL;
313 goto out;
bc7f75fa
AK		 314 }
315 }
316
4e8186b6
JB		 317 /* MDI-X => 2; MDI => 1; Auto => 3 */
318 if (ecmd->eth_tp_mdix_ctrl) {
e921eb1a 319 /* fix up the value for auto (3 => 0) as zero is mapped
4e8186b6
JB		 320 * internally to auto
321 */
322 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
323 hw->phy.mdix = AUTO_ALL_MODES;
324 else
325 hw->phy.mdix = ecmd->eth_tp_mdix_ctrl;
326 }
327
bc7f75fa 328 /* reset the link */
bc7f75fa 329 if (netif_running(adapter->netdev)) {
28002099 330 e1000e_down(adapter, true);
bc7f75fa 331 e1000e_up(adapter);
a7a1d9da 332 } else {
bc7f75fa 333 e1000e_reset(adapter);
a7a1d9da 334 }
bc7f75fa 335
3ef672ab
BA		 336out:
337 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa 338 clear_bit(__E1000_RESETTING, &adapter->state);
3ef672ab 339 return ret_val;
bc7f75fa
AK		 340}
341
342static void e1000_get_pauseparam(struct net_device *netdev,
343 struct ethtool_pauseparam *pause)
344{
345 struct e1000_adapter *adapter = netdev_priv(netdev);
346 struct e1000_hw *hw = &adapter->hw;
347
348 pause->autoneg =
f0ff4398 349 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
bc7f75fa 350
5c48ef3e 351 if (hw->fc.current_mode == e1000_fc_rx_pause) {
bc7f75fa 352 pause->rx_pause = 1;
5c48ef3e 353 } else if (hw->fc.current_mode == e1000_fc_tx_pause) {
bc7f75fa 354 pause->tx_pause = 1;
5c48ef3e 355 } else if (hw->fc.current_mode == e1000_fc_full) {
bc7f75fa
AK		 356 pause->rx_pause = 1;
357 pause->tx_pause = 1;
358 }
359}
360
361static int e1000_set_pauseparam(struct net_device *netdev,
362 struct ethtool_pauseparam *pause)
363{
364 struct e1000_adapter *adapter = netdev_priv(netdev);
365 struct e1000_hw *hw = &adapter->hw;
366 int retval = 0;
367
368 adapter->fc_autoneg = pause->autoneg;
369
370 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 371 usleep_range(1000, 2000);
bc7f75fa 372
3ef672ab
BA		 373 pm_runtime_get_sync(netdev->dev.parent);
374
bc7f75fa 375 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
5c48ef3e 376 hw->fc.requested_mode = e1000_fc_default;
bc7f75fa 377 if (netif_running(adapter->netdev)) {
28002099 378 e1000e_down(adapter, true);
bc7f75fa
AK		 379 e1000e_up(adapter);
380 } else {
381 e1000e_reset(adapter);
382 }
383 } else {
5c48ef3e
BA		 384 if (pause->rx_pause && pause->tx_pause)
385 hw->fc.requested_mode = e1000_fc_full;
386 else if (pause->rx_pause && !pause->tx_pause)
387 hw->fc.requested_mode = e1000_fc_rx_pause;
388 else if (!pause->rx_pause && pause->tx_pause)
389 hw->fc.requested_mode = e1000_fc_tx_pause;
390 else if (!pause->rx_pause && !pause->tx_pause)
391 hw->fc.requested_mode = e1000_fc_none;
392
393 hw->fc.current_mode = hw->fc.requested_mode;
394
945eb313
BA		 395 if (hw->phy.media_type == e1000_media_type_fiber) {
396 retval = hw->mac.ops.setup_link(hw);
397 /* implicit goto out */
398 } else {
399 retval = e1000e_force_mac_fc(hw);
400 if (retval)
401 goto out;
402 e1000e_set_fc_watermarks(hw);
403 }
bc7f75fa
AK		 404 }
405
945eb313 406out:
3ef672ab 407 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK		 408 clear_bit(__E1000_RESETTING, &adapter->state);
409 return retval;
410}
411
bc7f75fa
AK		 412static u32 e1000_get_msglevel(struct net_device *netdev)
413{
414 struct e1000_adapter *adapter = netdev_priv(netdev);
415 return adapter->msg_enable;
416}
417
418static void e1000_set_msglevel(struct net_device *netdev, u32 data)
419{
420 struct e1000_adapter *adapter = netdev_priv(netdev);
421 adapter->msg_enable = data;
422}
423
8bb62869 424static int e1000_get_regs_len(struct net_device __always_unused *netdev)
bc7f75fa 425{
e80bd1d1 426#define E1000_REGS_LEN 32 /* overestimate */
bc7f75fa
AK		 427 return E1000_REGS_LEN * sizeof(u32);
428}
429
430static void e1000_get_regs(struct net_device *netdev,
431 struct ethtool_regs *regs, void *p)
432{
433 struct e1000_adapter *adapter = netdev_priv(netdev);
434 struct e1000_hw *hw = &adapter->hw;
435 u32 *regs_buff = p;
436 u16 phy_data;
bc7f75fa 437
3ef672ab
BA		 438 pm_runtime_get_sync(netdev->dev.parent);
439
bc7f75fa
AK		 440 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
441
ff938e43 442 regs->version = (1 << 24) | (adapter->pdev->revision << 16) |
f0ff4398 443 adapter->pdev->device;
bc7f75fa 444
e80bd1d1
BA		 445 regs_buff[0] = er32(CTRL);
446 regs_buff[1] = er32(STATUS);
bc7f75fa 447
e80bd1d1
BA		 448 regs_buff[2] = er32(RCTL);
449 regs_buff[3] = er32(RDLEN(0));
450 regs_buff[4] = er32(RDH(0));
451 regs_buff[5] = er32(RDT(0));
452 regs_buff[6] = er32(RDTR);
bc7f75fa 453
e80bd1d1
BA		 454 regs_buff[7] = er32(TCTL);
455 regs_buff[8] = er32(TDLEN(0));
456 regs_buff[9] = er32(TDH(0));
1e36052e 457 regs_buff[10] = er32(TDT(0));
bc7f75fa
AK		 458 regs_buff[11] = er32(TIDV);
459
e80bd1d1 460 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */
23033fad
JB		 461
462 /* ethtool doesn't use anything past this point, so all this
e921eb1a
BA		 463 * code is likely legacy junk for apps that may or may not exist
464 */
bc7f75fa
AK		 465 if (hw->phy.type == e1000_phy_m88) {
466 e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
467 regs_buff[13] = (u32)phy_data; /* cable length */
468 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
469 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
470 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
471 e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
472 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
473 regs_buff[18] = regs_buff[13]; /* cable polarity */
474 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
475 regs_buff[20] = regs_buff[17]; /* polarity correction */
476 /* phy receive errors */
477 regs_buff[22] = adapter->phy_stats.receive_errors;
478 regs_buff[23] = regs_buff[13]; /* mdix mode */
479 }
c2ade1a4
BA		 480 regs_buff[21] = 0; /* was idle_errors */
481 e1e_rphy(hw, MII_STAT1000, &phy_data);
482 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
483 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
3ef672ab
BA		 484
485 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK		 486}
487
488static int e1000_get_eeprom_len(struct net_device *netdev)
489{
490 struct e1000_adapter *adapter = netdev_priv(netdev);
491 return adapter->hw.nvm.word_size * 2;
492}
493
494static int e1000_get_eeprom(struct net_device *netdev,
495 struct ethtool_eeprom *eeprom, u8 *bytes)
496{
497 struct e1000_adapter *adapter = netdev_priv(netdev);
498 struct e1000_hw *hw = &adapter->hw;
499 u16 *eeprom_buff;
500 int first_word;
501 int last_word;
502 int ret_val = 0;
503 u16 i;
504
505 if (eeprom->len == 0)
506 return -EINVAL;
507
508 eeprom->magic = adapter->pdev->vendor | (adapter->pdev->device << 16);
509
510 first_word = eeprom->offset >> 1;
511 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
512
17e813ec
BA		 513 eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
514 GFP_KERNEL);
bc7f75fa
AK		 515 if (!eeprom_buff)
516 return -ENOMEM;
517
3ef672ab
BA		 518 pm_runtime_get_sync(netdev->dev.parent);
519
bc7f75fa
AK		 520 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
521 ret_val = e1000_read_nvm(hw, first_word,
522 last_word - first_word + 1,
523 eeprom_buff);
524 } else {
525 for (i = 0; i < last_word - first_word + 1; i++) {
526 ret_val = e1000_read_nvm(hw, first_word + i, 1,
17e813ec 527 &eeprom_buff[i]);
e243455d 528 if (ret_val)
bc7f75fa
AK		 529 break;
530 }
531 }
532
3ef672ab
BA		 533 pm_runtime_put_sync(netdev->dev.parent);
534
e243455d
BA		 535 if (ret_val) {
536 /* a read error occurred, throw away the result */
8528b016
RK		 537 memset(eeprom_buff, 0xff, sizeof(u16) *
538 (last_word - first_word + 1));
e243455d
BA		 539 } else {
540 /* Device's eeprom is always little-endian, word addressable */
541 for (i = 0; i < last_word - first_word + 1; i++)
542 le16_to_cpus(&eeprom_buff[i]);
543 }
bc7f75fa
AK		 544
545 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
546 kfree(eeprom_buff);
547
548 return ret_val;
549}
550
551static int e1000_set_eeprom(struct net_device *netdev,
552 struct ethtool_eeprom *eeprom, u8 *bytes)
553{
554 struct e1000_adapter *adapter = netdev_priv(netdev);
555 struct e1000_hw *hw = &adapter->hw;
556 u16 *eeprom_buff;
557 void *ptr;
558 int max_len;
559 int first_word;
560 int last_word;
561 int ret_val = 0;
562 u16 i;
563
564 if (eeprom->len == 0)
565 return -EOPNOTSUPP;
566
c29c3ba5
BA		 567 if (eeprom->magic !=
568 (adapter->pdev->vendor | (adapter->pdev->device << 16)))
bc7f75fa
AK		 569 return -EFAULT;
570
4a770358
BA		 571 if (adapter->flags & FLAG_READ_ONLY_NVM)
572 return -EINVAL;
573
bc7f75fa
AK		 574 max_len = hw->nvm.word_size * 2;
575
576 first_word = eeprom->offset >> 1;
577 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
578 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
579 if (!eeprom_buff)
580 return -ENOMEM;
581
582 ptr = (void *)eeprom_buff;
583
3ef672ab
BA		 584 pm_runtime_get_sync(netdev->dev.parent);
585
bc7f75fa
AK		 586 if (eeprom->offset & 1) {
587 /* need read/modify/write of first changed EEPROM word */
588 /* only the second byte of the word is being modified */
589 ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]);
590 ptr++;
591 }
9e2d7657 592 if (((eeprom->offset + eeprom->len) & 1) && (!ret_val))
bc7f75fa
AK		 593 /* need read/modify/write of last changed EEPROM word */
594 /* only the first byte of the word is being modified */
595 ret_val = e1000_read_nvm(hw, last_word, 1,
17e813ec 596 &eeprom_buff[last_word - first_word]);
bc7f75fa 597
e243455d
BA		 598 if (ret_val)
599 goto out;
600
bc7f75fa
AK		 601 /* Device's eeprom is always little-endian, word addressable */
602 for (i = 0; i < last_word - first_word + 1; i++)
603 le16_to_cpus(&eeprom_buff[i]);
604
605 memcpy(ptr, bytes, eeprom->len);
606
607 for (i = 0; i < last_word - first_word + 1; i++)
e885d762 608 cpu_to_le16s(&eeprom_buff[i]);
bc7f75fa
AK		 609
610 ret_val = e1000_write_nvm(hw, first_word,
611 last_word - first_word + 1, eeprom_buff);
612
e243455d
BA		 613 if (ret_val)
614 goto out;
615
e921eb1a 616 /* Update the checksum over the first part of the EEPROM if needed
e243455d 617 * and flush shadow RAM for applicable controllers
ad68076e 618 */
e243455d 619 if ((first_word <= NVM_CHECKSUM_REG) ||
f89271dd
BA		 620 (hw->mac.type == e1000_82583) ||
621 (hw->mac.type == e1000_82574) ||
622 (hw->mac.type == e1000_82573))
e243455d 623 ret_val = e1000e_update_nvm_checksum(hw);
bc7f75fa 624
e243455d 625out:
3ef672ab 626 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK		 627 kfree(eeprom_buff);
628 return ret_val;
629}
630
631static void e1000_get_drvinfo(struct net_device *netdev,
632 struct ethtool_drvinfo *drvinfo)
633{
634 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa 635
e5fe2541 636 strlcpy(drvinfo->driver, e1000e_driver_name, sizeof(drvinfo->driver));
33a5ba14 637 strlcpy(drvinfo->version, e1000e_driver_version,
612a94d6 638 sizeof(drvinfo->version));
bc7f75fa 639
e921eb1a 640 /* EEPROM image version # is reported as firmware version # for
ad68076e
BA		 641 * PCI-E controllers
642 */
612a94d6 643 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
17e813ec
BA		 644 "%d.%d-%d",
645 (adapter->eeprom_vers & 0xF000) >> 12,
646 (adapter->eeprom_vers & 0x0FF0) >> 4,
647 (adapter->eeprom_vers & 0x000F));
bc7f75fa 648
612a94d6
RJ		 649 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
650 sizeof(drvinfo->bus_info));
bc7f75fa
AK		 651 drvinfo->regdump_len = e1000_get_regs_len(netdev);
652 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
653}
654
655static void e1000_get_ringparam(struct net_device *netdev,
656 struct ethtool_ringparam *ring)
657{
658 struct e1000_adapter *adapter = netdev_priv(netdev);
bc7f75fa
AK		 659
660 ring->rx_max_pending = E1000_MAX_RXD;
661 ring->tx_max_pending = E1000_MAX_TXD;
508da426
BA		 662 ring->rx_pending = adapter->rx_ring_count;
663 ring->tx_pending = adapter->tx_ring_count;
bc7f75fa
AK		 664}
665
666static int e1000_set_ringparam(struct net_device *netdev,
667 struct ethtool_ringparam *ring)
668{
669 struct e1000_adapter *adapter = netdev_priv(netdev);
508da426
BA		 670 struct e1000_ring *temp_tx = NULL, *temp_rx = NULL;
671 int err = 0, size = sizeof(struct e1000_ring);
672 bool set_tx = false, set_rx = false;
673 u16 new_rx_count, new_tx_count;
bc7f75fa
AK		 674
675 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
676 return -EINVAL;
677
508da426
BA		 678 new_rx_count = clamp_t(u32, ring->rx_pending, E1000_MIN_RXD,
679 E1000_MAX_RXD);
680 new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
bc7f75fa 681
508da426
BA		 682 new_tx_count = clamp_t(u32, ring->tx_pending, E1000_MIN_TXD,
683 E1000_MAX_TXD);
684 new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
bc7f75fa 685
508da426
BA		 686 if ((new_tx_count == adapter->tx_ring_count) &&
687 (new_rx_count == adapter->rx_ring_count))
688 /* nothing to do */
689 return 0;
bc7f75fa 690
508da426
BA		 691 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
692 usleep_range(1000, 2000);
bc7f75fa 693
508da426
BA		 694 if (!netif_running(adapter->netdev)) {
695 /* Set counts now and allocate resources during open() */
696 adapter->tx_ring->count = new_tx_count;
697 adapter->rx_ring->count = new_rx_count;
698 adapter->tx_ring_count = new_tx_count;
699 adapter->rx_ring_count = new_rx_count;
700 goto clear_reset;
701 }
bc7f75fa 702
508da426
BA		 703 set_tx = (new_tx_count != adapter->tx_ring_count);
704 set_rx = (new_rx_count != adapter->rx_ring_count);
bc7f75fa 705
508da426
BA		 706 /* Allocate temporary storage for ring updates */
707 if (set_tx) {
708 temp_tx = vmalloc(size);
709 if (!temp_tx) {
710 err = -ENOMEM;
711 goto free_temp;
712 }
713 }
714 if (set_rx) {
715 temp_rx = vmalloc(size);
716 if (!temp_rx) {
717 err = -ENOMEM;
718 goto free_temp;
719 }
720 }
bc7f75fa 721
3ef672ab
BA		 722 pm_runtime_get_sync(netdev->dev.parent);
723
28002099 724 e1000e_down(adapter, true);
bc7f75fa 725
e921eb1a 726 /* We can't just free everything and then setup again, because the
508da426
BA		 727 * ISRs in MSI-X mode get passed pointers to the Tx and Rx ring
728 * structs. First, attempt to allocate new resources...
729 */
730 if (set_tx) {
731 memcpy(temp_tx, adapter->tx_ring, size);
732 temp_tx->count = new_tx_count;
733 err = e1000e_setup_tx_resources(temp_tx);
bc7f75fa 734 if (err)
508da426
BA		 735 goto err_setup;
736 }
737 if (set_rx) {
738 memcpy(temp_rx, adapter->rx_ring, size);
739 temp_rx->count = new_rx_count;
740 err = e1000e_setup_rx_resources(temp_rx);
bc7f75fa 741 if (err)
508da426
BA		 742 goto err_setup_rx;
743 }
744
745 /* ...then free the old resources and copy back any new ring data */
746 if (set_tx) {
55aa6985 747 e1000e_free_tx_resources(adapter->tx_ring);
508da426
BA		 748 memcpy(adapter->tx_ring, temp_tx, size);
749 adapter->tx_ring_count = new_tx_count;
750 }
751 if (set_rx) {
752 e1000e_free_rx_resources(adapter->rx_ring);
753 memcpy(adapter->rx_ring, temp_rx, size);
754 adapter->rx_ring_count = new_rx_count;
bc7f75fa
AK		 755 }
756
bc7f75fa 757err_setup_rx:
508da426
BA		 758 if (err && set_tx)
759 e1000e_free_tx_resources(temp_tx);
bc7f75fa 760err_setup:
508da426 761 e1000e_up(adapter);
3ef672ab 762 pm_runtime_put_sync(netdev->dev.parent);
508da426
BA		 763free_temp:
764 vfree(temp_tx);
765 vfree(temp_rx);
766clear_reset:
bc7f75fa
AK		 767 clear_bit(__E1000_RESETTING, &adapter->state);
768 return err;
769}
770
cef8c793
BA		 771static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
772 int reg, int offset, u32 mask, u32 write)
2a887191 773{
cef8c793 774 u32 pat, val;
6480641e 775 static const u32 test[] = {
04e115cf
BA		 776 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
777 };
cef8c793 778 for (pat = 0; pat < ARRAY_SIZE(test); pat++) {
2a887191 779 E1000_WRITE_REG_ARRAY(&adapter->hw, reg, offset,
cef8c793
BA		 780 (test[pat] & write));
781 val = E1000_READ_REG_ARRAY(&adapter->hw, reg, offset);
782 if (val != (test[pat] & write & mask)) {
a8fc1891
BA		 783 e_err("pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
784 reg + (offset << 2), val,
785 (test[pat] & write & mask));
2a887191 786 *data = reg;
3992c8ed 787 return true;
2a887191
JP		 788 }
789 }
3992c8ed 790 return false;
bc7f75fa
AK		 791}
792
2a887191
JP		 793static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
794 int reg, u32 mask, u32 write)
795{
cef8c793 796 u32 val;
6cf08d1c 797
2a887191 798 __ew32(&adapter->hw, reg, write & mask);
cef8c793
BA		 799 val = __er32(&adapter->hw, reg);
800 if ((write & mask) != (val & mask)) {
a8fc1891 801 e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
6ad65145 802 reg, (val & mask), (write & mask));
2a887191 803 *data = reg;
3992c8ed 804 return true;
2a887191 805 }
3992c8ed 806 return false;
bc7f75fa 807}
fc830b78 808
cef8c793
BA		 809#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
810 do { \
811 if (reg_pattern_test(adapter, data, reg, offset, mask, write)) \
812 return 1; \
2a887191 813 } while (0)
cef8c793
BA		 814#define REG_PATTERN_TEST(reg, mask, write) \
815 REG_PATTERN_TEST_ARRAY(reg, 0, mask, write)
2a887191 816
cef8c793
BA		 817#define REG_SET_AND_CHECK(reg, mask, write) \
818 do { \
819 if (reg_set_and_check(adapter, data, reg, mask, write)) \
820 return 1; \
2a887191
JP		 821 } while (0)
822
bc7f75fa
AK		 823static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
824{
825 struct e1000_hw *hw = &adapter->hw;
826 struct e1000_mac_info *mac = &adapter->hw.mac;
bc7f75fa
AK		 827 u32 value;
828 u32 before;
829 u32 after;
830 u32 i;
831 u32 toggle;
a4f58f54 832 u32 mask;
2fbe4526 833 u32 wlock_mac = 0;
bc7f75fa 834
e921eb1a 835 /* The status register is Read Only, so a write should fail.
33550cec
BA		 836 * Some bits that get toggled are ignored. There are several bits
837 * on newer hardware that are r/w.
bc7f75fa
AK		 838 */
839 switch (mac->type) {
bc7f75fa
AK		 840 case e1000_82571:
841 case e1000_82572:
842 case e1000_80003es2lan:
843 toggle = 0x7FFFF3FF;
844 break;
f0ff4398 845 default:
bc7f75fa
AK		 846 toggle = 0x7FFFF033;
847 break;
bc7f75fa
AK		 848 }
849
850 before = er32(STATUS);
851 value = (er32(STATUS) & toggle);
852 ew32(STATUS, toggle);
853 after = er32(STATUS) & toggle;
854 if (value != after) {
6ad65145
BA		 855 e_err("failed STATUS register test got: 0x%08X expected: 0x%08X\n",
856 after, value);
bc7f75fa
AK		 857 *data = 1;
858 return 1;
859 }
860 /* restore previous status */
861 ew32(STATUS, before);
862
97ac8cae 863 if (!(adapter->flags & FLAG_IS_ICH)) {
bc7f75fa
AK		 864 REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
865 REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF);
866 REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF);
867 REG_PATTERN_TEST(E1000_VET, 0x0000FFFF, 0xFFFFFFFF);
868 }
869
870 REG_PATTERN_TEST(E1000_RDTR, 0x0000FFFF, 0xFFFFFFFF);
1e36052e
BA		 871 REG_PATTERN_TEST(E1000_RDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
872 REG_PATTERN_TEST(E1000_RDLEN(0), 0x000FFF80, 0x000FFFFF);
873 REG_PATTERN_TEST(E1000_RDH(0), 0x0000FFFF, 0x0000FFFF);
874 REG_PATTERN_TEST(E1000_RDT(0), 0x0000FFFF, 0x0000FFFF);
bc7f75fa
AK		 875 REG_PATTERN_TEST(E1000_FCRTH, 0x0000FFF8, 0x0000FFF8);
876 REG_PATTERN_TEST(E1000_FCTTV, 0x0000FFFF, 0x0000FFFF);
877 REG_PATTERN_TEST(E1000_TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
1e36052e
BA		 878 REG_PATTERN_TEST(E1000_TDBAH(0), 0xFFFFFFFF, 0xFFFFFFFF);
879 REG_PATTERN_TEST(E1000_TDLEN(0), 0x000FFF80, 0x000FFFFF);
bc7f75fa
AK		 880
881 REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000);
882
97ac8cae 883 before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE);
bc7f75fa
AK		 884 REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB);
885 REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000);
886
8658251d 887 REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF);
1e36052e 888 REG_PATTERN_TEST(E1000_RDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
97ac8cae 889 if (!(adapter->flags & FLAG_IS_ICH))
8658251d 890 REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
1e36052e 891 REG_PATTERN_TEST(E1000_TDBAL(0), 0xFFFFFFF0, 0xFFFFFFFF);
8658251d 892 REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
a4f58f54
BA		 893 mask = 0x8003FFFF;
894 switch (mac->type) {
895 case e1000_ich10lan:
896 case e1000_pchlan:
d3738bb8 897 case e1000_pch2lan:
2fbe4526 898 case e1000_pch_lpt:
79849ebc 899 case e1000_pch_spt:
a4f58f54
BA		 900 mask |= (1 << 18);
901 break;
902 default:
903 break;
904 }
2fbe4526 905
79849ebc 906 if ((mac->type == e1000_pch_lpt) || (mac->type == e1000_pch_spt))
2fbe4526
BA		 907 wlock_mac = (er32(FWSM) & E1000_FWSM_WLOCK_MAC_MASK) >>
908 E1000_FWSM_WLOCK_MAC_SHIFT;
909
910 for (i = 0; i < mac->rar_entry_count; i++) {
79849ebc
DE		 911 if ((mac->type == e1000_pch_lpt) ||
912 (mac->type == e1000_pch_spt)) {
a8fc1891
BA		 913 /* Cannot test write-protected SHRAL[n] registers */
914 if ((wlock_mac == 1) || (wlock_mac && (i > wlock_mac)))
915 continue;
916
917 /* SHRAH[9] different than the others */
918 if (i == 10)
919 mask |= (1 << 30);
920 else
921 mask &= ~(1 << 30);
922 }
c3a0dce3
DE		 923 if (mac->type == e1000_pch2lan) {
924 /* SHRAH[0,1,2] different than previous */
ad40064e 925 if (i == 1)
c3a0dce3
DE		 926 mask &= 0xFFF4FFFF;
927 /* SHRAH[3] different than SHRAH[0,1,2] */
ad40064e 928 if (i == 4)
c3a0dce3 929 mask |= (1 << 30);
ad40064e
DE		 930 /* RAR[1-6] owned by management engine - skipping */
931 if (i > 0)
932 i += 6;
c3a0dce3 933 }
2fbe4526 934
a8fc1891
BA		 935 REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1), mask,
936 0xFFFFFFFF);
ad40064e
DE		 937 /* reset index to actual value */
938 if ((mac->type == e1000_pch2lan) && (i > 6))
939 i -= 6;
2fbe4526 940 }
bc7f75fa
AK		 941
942 for (i = 0; i < mac->mta_reg_count; i++)
943 REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
944
945 *data = 0;
2fbe4526 946
bc7f75fa
AK		 947 return 0;
948}
949
950static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
951{
952 u16 temp;
953 u16 checksum = 0;
954 u16 i;
955
956 *data = 0;
957 /* Read and add up the contents of the EEPROM */
958 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
959 if ((e1000_read_nvm(&adapter->hw, i, 1, &temp)) < 0) {
960 *data = 1;
e243455d 961 return *data;
bc7f75fa
AK		 962 }
963 checksum += temp;
964 }
965
966 /* If Checksum is not Correct return error else test passed */
53aa82da 967 if ((checksum != (u16)NVM_SUM) && !(*data))
bc7f75fa
AK		 968 *data = 2;
969
970 return *data;
971}
972
8bb62869 973static irqreturn_t e1000_test_intr(int __always_unused irq, void *data)
bc7f75fa 974{
53aa82da 975 struct net_device *netdev = (struct net_device *)data;
bc7f75fa
AK		 976 struct e1000_adapter *adapter = netdev_priv(netdev);
977 struct e1000_hw *hw = &adapter->hw;
978
979 adapter->test_icr |= er32(ICR);
980
981 return IRQ_HANDLED;
982}
983
984static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
985{
986 struct net_device *netdev = adapter->netdev;
987 struct e1000_hw *hw = &adapter->hw;
988 u32 mask;
989 u32 shared_int = 1;
990 u32 irq = adapter->pdev->irq;
991 int i;
4662e82b
BA		 992 int ret_val = 0;
993 int int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 994
995 *data = 0;
996
4662e82b
BA		 997 /* NOTE: we don't test MSI/MSI-X interrupts here, yet */
998 if (adapter->int_mode == E1000E_INT_MODE_MSIX) {
999 int_mode = adapter->int_mode;
1000 e1000e_reset_interrupt_capability(adapter);
1001 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1002 e1000e_set_interrupt_capability(adapter);
1003 }
bc7f75fa 1004 /* Hook up test interrupt handler just for this test */
a0607fd3 1005 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
bc7f75fa
AK		 1006 netdev)) {
1007 shared_int = 0;
17e813ec
BA		 1008 } else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, netdev->name,
1009 netdev)) {
bc7f75fa 1010 *data = 1;
4662e82b
BA		 1011 ret_val = -1;
1012 goto out;
bc7f75fa 1013 }
44defeb3 1014 e_info("testing %s interrupt\n", (shared_int ? "shared" : "unshared"));
bc7f75fa
AK		 1015
1016 /* Disable all the interrupts */
1017 ew32(IMC, 0xFFFFFFFF);
945a5151 1018 e1e_flush();
1bba4386 1019 usleep_range(10000, 20000);
bc7f75fa
AK		 1020
1021 /* Test each interrupt */
1022 for (i = 0; i < 10; i++) {
bc7f75fa
AK		 1023 /* Interrupt to test */
1024 mask = 1 << i;
1025
f4187b56
BA		 1026 if (adapter->flags & FLAG_IS_ICH) {
1027 switch (mask) {
1028 case E1000_ICR_RXSEQ:
1029 continue;
1030 case 0x00000100:
1031 if (adapter->hw.mac.type == e1000_ich8lan ||
1032 adapter->hw.mac.type == e1000_ich9lan)
1033 continue;
1034 break;
1035 default:
1036 break;
1037 }
1038 }
1039
bc7f75fa 1040 if (!shared_int) {
e921eb1a 1041 /* Disable the interrupt to be reported in
bc7f75fa
AK		 1042 * the cause register and then force the same
1043 * interrupt and see if one gets posted. If
1044 * an interrupt was posted to the bus, the
1045 * test failed.
1046 */
1047 adapter->test_icr = 0;
1048 ew32(IMC, mask);
1049 ew32(ICS, mask);
945a5151 1050 e1e_flush();
1bba4386 1051 usleep_range(10000, 20000);
bc7f75fa
AK		 1052
1053 if (adapter->test_icr & mask) {
1054 *data = 3;
1055 break;
1056 }
1057 }
1058
e921eb1a 1059 /* Enable the interrupt to be reported in
bc7f75fa
AK		 1060 * the cause register and then force the same
1061 * interrupt and see if one gets posted. If
1062 * an interrupt was not posted to the bus, the
1063 * test failed.
1064 */
1065 adapter->test_icr = 0;
1066 ew32(IMS, mask);
1067 ew32(ICS, mask);
945a5151 1068 e1e_flush();
1bba4386 1069 usleep_range(10000, 20000);
bc7f75fa
AK		 1070
1071 if (!(adapter->test_icr & mask)) {
1072 *data = 4;
1073 break;
1074 }
1075
1076 if (!shared_int) {
e921eb1a 1077 /* Disable the other interrupts to be reported in
bc7f75fa
AK		 1078 * the cause register and then force the other
1079 * interrupts and see if any get posted. If
1080 * an interrupt was posted to the bus, the
1081 * test failed.
1082 */
1083 adapter->test_icr = 0;
1084 ew32(IMC, ~mask & 0x00007FFF);
1085 ew32(ICS, ~mask & 0x00007FFF);
945a5151 1086 e1e_flush();
1bba4386 1087 usleep_range(10000, 20000);
bc7f75fa
AK		 1088
1089 if (adapter->test_icr) {
1090 *data = 5;
1091 break;
1092 }
1093 }
1094 }
1095
1096 /* Disable all the interrupts */
1097 ew32(IMC, 0xFFFFFFFF);
945a5151 1098 e1e_flush();
1bba4386 1099 usleep_range(10000, 20000);
bc7f75fa
AK		 1100
1101 /* Unhook test interrupt handler */
1102 free_irq(irq, netdev);
1103
4662e82b
BA		 1104out:
1105 if (int_mode == E1000E_INT_MODE_MSIX) {
1106 e1000e_reset_interrupt_capability(adapter);
1107 adapter->int_mode = int_mode;
1108 e1000e_set_interrupt_capability(adapter);
1109 }
1110
1111 return ret_val;
bc7f75fa
AK		 1112}
1113
1114static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1115{
1116 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1117 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1118 struct pci_dev *pdev = adapter->pdev;
17e813ec 1119 struct e1000_buffer *buffer_info;
bc7f75fa
AK		 1120 int i;
1121
1122 if (tx_ring->desc && tx_ring->buffer_info) {
1123 for (i = 0; i < tx_ring->count; i++) {
17e813ec
BA		 1124 buffer_info = &tx_ring->buffer_info[i];
1125
1126 if (buffer_info->dma)
0be3f55f 1127 dma_unmap_single(&pdev->dev,
17e813ec
BA		 1128 buffer_info->dma,
1129 buffer_info->length,
1130 DMA_TO_DEVICE);
1131 if (buffer_info->skb)
1132 dev_kfree_skb(buffer_info->skb);
bc7f75fa
AK		 1133 }
1134 }
1135
1136 if (rx_ring->desc && rx_ring->buffer_info) {
1137 for (i = 0; i < rx_ring->count; i++) {
17e813ec
BA		 1138 buffer_info = &rx_ring->buffer_info[i];
1139
1140 if (buffer_info->dma)
0be3f55f 1141 dma_unmap_single(&pdev->dev,
17e813ec
BA		 1142 buffer_info->dma,
1143 2048, DMA_FROM_DEVICE);
1144 if (buffer_info->skb)
1145 dev_kfree_skb(buffer_info->skb);
bc7f75fa
AK		 1146 }
1147 }
1148
1149 if (tx_ring->desc) {
1150 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1151 tx_ring->dma);
1152 tx_ring->desc = NULL;
1153 }
1154 if (rx_ring->desc) {
1155 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1156 rx_ring->dma);
1157 rx_ring->desc = NULL;
1158 }
1159
1160 kfree(tx_ring->buffer_info);
1161 tx_ring->buffer_info = NULL;
1162 kfree(rx_ring->buffer_info);
1163 rx_ring->buffer_info = NULL;
1164}
1165
1166static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1167{
1168 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1169 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1170 struct pci_dev *pdev = adapter->pdev;
1171 struct e1000_hw *hw = &adapter->hw;
1172 u32 rctl;
bc7f75fa
AK		 1173 int i;
1174 int ret_val;
1175
1176 /* Setup Tx descriptor ring and Tx buffers */
1177
1178 if (!tx_ring->count)
1179 tx_ring->count = E1000_DEFAULT_TXD;
1180
cef8c793 1181 tx_ring->buffer_info = kcalloc(tx_ring->count,
e5fe2541 1182 sizeof(struct e1000_buffer), GFP_KERNEL);
668018d7 1183 if (!tx_ring->buffer_info) {
bc7f75fa
AK		 1184 ret_val = 1;
1185 goto err_nomem;
1186 }
bc7f75fa
AK		 1187
1188 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1189 tx_ring->size = ALIGN(tx_ring->size, 4096);
1190 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
1191 &tx_ring->dma, GFP_KERNEL);
1192 if (!tx_ring->desc) {
1193 ret_val = 2;
1194 goto err_nomem;
1195 }
bc7f75fa
AK		 1196 tx_ring->next_to_use = 0;
1197 tx_ring->next_to_clean = 0;
1198
53aa82da
BA		 1199 ew32(TDBAL(0), ((u64)tx_ring->dma & 0x00000000FFFFFFFF));
1200 ew32(TDBAH(0), ((u64)tx_ring->dma >> 32));
1e36052e
BA		 1201 ew32(TDLEN(0), tx_ring->count * sizeof(struct e1000_tx_desc));
1202 ew32(TDH(0), 0);
1203 ew32(TDT(0), 0);
cef8c793
BA		 1204 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | E1000_TCTL_MULR |
1205 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1206 E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT);
bc7f75fa
AK		 1207
1208 for (i = 0; i < tx_ring->count; i++) {
1209 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
1210 struct sk_buff *skb;
1211 unsigned int skb_size = 1024;
1212
1213 skb = alloc_skb(skb_size, GFP_KERNEL);
1214 if (!skb) {
1215 ret_val = 3;
1216 goto err_nomem;
1217 }
1218 skb_put(skb, skb_size);
1219 tx_ring->buffer_info[i].skb = skb;
1220 tx_ring->buffer_info[i].length = skb->len;
1221 tx_ring->buffer_info[i].dma =
f0ff4398
BA		 1222 dma_map_single(&pdev->dev, skb->data, skb->len,
1223 DMA_TO_DEVICE);
0be3f55f
NN		 1224 if (dma_mapping_error(&pdev->dev,
1225 tx_ring->buffer_info[i].dma)) {
bc7f75fa
AK		 1226 ret_val = 4;
1227 goto err_nomem;
1228 }
cef8c793 1229 tx_desc->buffer_addr = cpu_to_le64(tx_ring->buffer_info[i].dma);
bc7f75fa
AK		 1230 tx_desc->lower.data = cpu_to_le32(skb->len);
1231 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1232 E1000_TXD_CMD_IFCS |
cef8c793 1233 E1000_TXD_CMD_RS);
bc7f75fa
AK		 1234 tx_desc->upper.data = 0;
1235 }
1236
1237 /* Setup Rx descriptor ring and Rx buffers */
1238
1239 if (!rx_ring->count)
1240 rx_ring->count = E1000_DEFAULT_RXD;
1241
cef8c793 1242 rx_ring->buffer_info = kcalloc(rx_ring->count,
e5fe2541 1243 sizeof(struct e1000_buffer), GFP_KERNEL);
668018d7 1244 if (!rx_ring->buffer_info) {
bc7f75fa
AK		 1245 ret_val = 5;
1246 goto err_nomem;
1247 }
bc7f75fa 1248
5f450212 1249 rx_ring->size = rx_ring->count * sizeof(union e1000_rx_desc_extended);
bc7f75fa
AK		 1250 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
1251 &rx_ring->dma, GFP_KERNEL);
1252 if (!rx_ring->desc) {
1253 ret_val = 6;
1254 goto err_nomem;
1255 }
bc7f75fa
AK		 1256 rx_ring->next_to_use = 0;
1257 rx_ring->next_to_clean = 0;
1258
1259 rctl = er32(RCTL);
7f99ae63
BA		 1260 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
1261 ew32(RCTL, rctl & ~E1000_RCTL_EN);
53aa82da
BA		 1262 ew32(RDBAL(0), ((u64)rx_ring->dma & 0xFFFFFFFF));
1263 ew32(RDBAH(0), ((u64)rx_ring->dma >> 32));
1e36052e
BA		 1264 ew32(RDLEN(0), rx_ring->size);
1265 ew32(RDH(0), 0);
1266 ew32(RDT(0), 0);
bc7f75fa 1267 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
f0ff4398
BA		 1268 E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_LPE |
1269 E1000_RCTL_SBP | E1000_RCTL_SECRC |
1270 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1271 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
bc7f75fa
AK		 1272 ew32(RCTL, rctl);
1273
1274 for (i = 0; i < rx_ring->count; i++) {
5f450212 1275 union e1000_rx_desc_extended *rx_desc;
bc7f75fa
AK		 1276 struct sk_buff *skb;
1277
1278 skb = alloc_skb(2048 + NET_IP_ALIGN, GFP_KERNEL);
1279 if (!skb) {
1280 ret_val = 7;
1281 goto err_nomem;
1282 }
1283 skb_reserve(skb, NET_IP_ALIGN);
1284 rx_ring->buffer_info[i].skb = skb;
1285 rx_ring->buffer_info[i].dma =
f0ff4398
BA		 1286 dma_map_single(&pdev->dev, skb->data, 2048,
1287 DMA_FROM_DEVICE);
0be3f55f
NN		 1288 if (dma_mapping_error(&pdev->dev,
1289 rx_ring->buffer_info[i].dma)) {
bc7f75fa
AK		 1290 ret_val = 8;
1291 goto err_nomem;
1292 }
5f450212
BA		 1293 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1294 rx_desc->read.buffer_addr =
1295 cpu_to_le64(rx_ring->buffer_info[i].dma);
bc7f75fa
AK		 1296 memset(skb->data, 0x00, skb->len);
1297 }
1298
1299 return 0;
1300
1301err_nomem:
1302 e1000_free_desc_rings(adapter);
1303 return ret_val;
1304}
1305
1306static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1307{
1308 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1309 e1e_wphy(&adapter->hw, 29, 0x001F);
1310 e1e_wphy(&adapter->hw, 30, 0x8FFC);
1311 e1e_wphy(&adapter->hw, 29, 0x001A);
1312 e1e_wphy(&adapter->hw, 30, 0x8FF0);
1313}
1314
1315static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1316{
1317 struct e1000_hw *hw = &adapter->hw;
1318 u32 ctrl_reg = 0;
97ac8cae 1319 u16 phy_reg = 0;
cbd006cb 1320 s32 ret_val = 0;
bc7f75fa 1321
318a94d6 1322 hw->mac.autoneg = 0;
bc7f75fa 1323
3af50481 1324 if (hw->phy.type == e1000_phy_ife) {
bc7f75fa 1325 /* force 100, set loopback */
c2ade1a4 1326 e1e_wphy(hw, MII_BMCR, 0x6100);
bc7f75fa
AK		 1327
1328 /* Now set up the MAC to the same speed/duplex as the PHY. */
3af50481 1329 ctrl_reg = er32(CTRL);
bc7f75fa
AK		 1330 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1331 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1332 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1333 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1334 E1000_CTRL_FD); /* Force Duplex to FULL */
3af50481
BA		 1335
1336 ew32(CTRL, ctrl_reg);
945a5151 1337 e1e_flush();
ce43a216 1338 usleep_range(500, 1000);
3af50481
BA		 1339
1340 return 0;
1341 }
1342
1343 /* Specific PHY configuration for loopback */
1344 switch (hw->phy.type) {
1345 case e1000_phy_m88:
1346 /* Auto-MDI/MDIX Off */
1347 e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1348 /* reset to update Auto-MDI/MDIX */
c2ade1a4 1349 e1e_wphy(hw, MII_BMCR, 0x9140);
3af50481 1350 /* autoneg off */
c2ade1a4 1351 e1e_wphy(hw, MII_BMCR, 0x8140);
3af50481
BA		 1352 break;
1353 case e1000_phy_gg82563:
1354 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC);
cef8c793 1355 break;
97ac8cae
BA		 1356 case e1000_phy_bm:
1357 /* Set Default MAC Interface speed to 1GB */
1358 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1359 phy_reg &= ~0x0007;
1360 phy_reg |= 0x006;
1361 e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1362 /* Assert SW reset for above settings to take effect */
6b598e1e 1363 hw->phy.ops.commit(hw);
ce43a216 1364 usleep_range(1000, 2000);
97ac8cae
BA		 1365 /* Force Full Duplex */
1366 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1367 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1368 /* Set Link Up (in force link) */
1369 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1370 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1371 /* Force Link */
1372 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1373 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040);
1374 /* Set Early Link Enable */
1375 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);
1376 e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400);
3af50481
BA		 1377 break;
1378 case e1000_phy_82577:
1379 case e1000_phy_82578:
1380 /* Workaround: K1 must be disabled for stable 1Gbps operation */
cbd006cb
BA		 1381 ret_val = hw->phy.ops.acquire(hw);
1382 if (ret_val) {
1383 e_err("Cannot setup 1Gbps loopback.\n");
1384 return ret_val;
1385 }
3af50481 1386 e1000_configure_k1_ich8lan(hw, false);
cbd006cb 1387 hw->phy.ops.release(hw);
3af50481 1388 break;
d3738bb8
BA		 1389 case e1000_phy_82579:
1390 /* Disable PHY energy detect power down */
1391 e1e_rphy(hw, PHY_REG(0, 21), &phy_reg);
1392 e1e_wphy(hw, PHY_REG(0, 21), phy_reg & ~(1 << 3));
1393 /* Disable full chip energy detect */
1394 e1e_rphy(hw, PHY_REG(776, 18), &phy_reg);
1395 e1e_wphy(hw, PHY_REG(776, 18), phy_reg | 1);
1396 /* Enable loopback on the PHY */
d3738bb8
BA		 1397 e1e_wphy(hw, I82577_PHY_LBK_CTRL, 0x8001);
1398 break;
cef8c793 1399 default:
3af50481
BA		 1400 break;
1401 }
bc7f75fa 1402
3af50481 1403 /* force 1000, set loopback */
c2ade1a4 1404 e1e_wphy(hw, MII_BMCR, 0x4140);
ce43a216 1405 msleep(250);
cef8c793 1406
3af50481
BA		 1407 /* Now set up the MAC to the same speed/duplex as the PHY. */
1408 ctrl_reg = er32(CTRL);
1409 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1410 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1411 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1412 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1413 E1000_CTRL_FD); /* Force Duplex to FULL */
1414
1415 if (adapter->flags & FLAG_IS_ICH)
1416 ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */
bc7f75fa 1417
318a94d6
JK		 1418 if (hw->phy.media_type == e1000_media_type_copper &&
1419 hw->phy.type == e1000_phy_m88) {
e80bd1d1 1420 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
bc7f75fa 1421 } else {
e921eb1a 1422 /* Set the ILOS bit on the fiber Nic if half duplex link is
ad68076e
BA		 1423 * detected.
1424 */
90da0669 1425 if ((er32(STATUS) & E1000_STATUS_FD) == 0)
bc7f75fa
AK		 1426 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1427 }
1428
1429 ew32(CTRL, ctrl_reg);
1430
e921eb1a 1431 /* Disable the receiver on the PHY so when a cable is plugged in, the
bc7f75fa
AK		 1432 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1433 */
318a94d6 1434 if (hw->phy.type == e1000_phy_m88)
bc7f75fa
AK		 1435 e1000_phy_disable_receiver(adapter);
1436
ce43a216 1437 usleep_range(500, 1000);
bc7f75fa
AK		 1438
1439 return 0;
1440}
1441
1442static int e1000_set_82571_fiber_loopback(struct e1000_adapter *adapter)
1443{
1444 struct e1000_hw *hw = &adapter->hw;
1445 u32 ctrl = er32(CTRL);
70806a7f 1446 int link;
bc7f75fa
AK		 1447
1448 /* special requirements for 82571/82572 fiber adapters */
1449
e921eb1a 1450 /* jump through hoops to make sure link is up because serdes
ad68076e
BA		 1451 * link is hardwired up
1452 */
bc7f75fa
AK		 1453 ctrl |= E1000_CTRL_SLU;
1454 ew32(CTRL, ctrl);
1455
1456 /* disable autoneg */
1457 ctrl = er32(TXCW);
1458 ctrl &= ~(1 << 31);
1459 ew32(TXCW, ctrl);
1460
1461 link = (er32(STATUS) & E1000_STATUS_LU);
1462
1463 if (!link) {
1464 /* set invert loss of signal */
1465 ctrl = er32(CTRL);
1466 ctrl |= E1000_CTRL_ILOS;
1467 ew32(CTRL, ctrl);
1468 }
1469
e921eb1a 1470 /* special write to serdes control register to enable SerDes analog
ad68076e
BA		 1471 * loopback
1472 */
3ffcf2cb 1473 ew32(SCTL, E1000_SCTL_ENABLE_SERDES_LOOPBACK);
945a5151 1474 e1e_flush();
1bba4386 1475 usleep_range(10000, 20000);
bc7f75fa
AK		 1476
1477 return 0;
1478}
1479
1480/* only call this for fiber/serdes connections to es2lan */
1481static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
1482{
1483 struct e1000_hw *hw = &adapter->hw;
1484 u32 ctrlext = er32(CTRL_EXT);
1485 u32 ctrl = er32(CTRL);
1486
e921eb1a 1487 /* save CTRL_EXT to restore later, reuse an empty variable (unused
ad68076e
BA		 1488 * on mac_type 80003es2lan)
1489 */
bc7f75fa
AK		 1490 adapter->tx_fifo_head = ctrlext;
1491
1492 /* clear the serdes mode bits, putting the device into mac loopback */
1493 ctrlext &= ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1494 ew32(CTRL_EXT, ctrlext);
1495
1496 /* force speed to 1000/FD, link up */
1497 ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1498 ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX |
1499 E1000_CTRL_SPD_1000 | E1000_CTRL_FD);
1500 ew32(CTRL, ctrl);
1501
1502 /* set mac loopback */
1503 ctrl = er32(RCTL);
1504 ctrl |= E1000_RCTL_LBM_MAC;
1505 ew32(RCTL, ctrl);
1506
1507 /* set testing mode parameters (no need to reset later) */
1508#define KMRNCTRLSTA_OPMODE (0x1F << 16)
1509#define KMRNCTRLSTA_OPMODE_1GB_FD_GMII 0x0582
1510 ew32(KMRNCTRLSTA,
cef8c793 1511 (KMRNCTRLSTA_OPMODE | KMRNCTRLSTA_OPMODE_1GB_FD_GMII));
bc7f75fa
AK		 1512
1513 return 0;
1514}
1515
1516static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1517{
1518 struct e1000_hw *hw = &adapter->hw;
2ec7d297
YL		 1519 u32 rctl, fext_nvm11, tarc0;
1520
1521 if (hw->mac.type == e1000_pch_spt) {
1522 fext_nvm11 = er32(FEXTNVM11);
1523 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
1524 ew32(FEXTNVM11, fext_nvm11);
1525 tarc0 = er32(TARC(0));
1526 /* clear bits 28 & 29 (control of MULR concurrent requests) */
1527 tarc0 &= 0xcfffffff;
1528 /* set bit 29 (value of MULR requests is now 2) */
1529 tarc0 |= 0x20000000;
1530 ew32(TARC(0), tarc0);
1531 }
318a94d6
JK		 1532 if (hw->phy.media_type == e1000_media_type_fiber ||
1533 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa
AK		 1534 switch (hw->mac.type) {
1535 case e1000_80003es2lan:
1536 return e1000_set_es2lan_mac_loopback(adapter);
bc7f75fa
AK		 1537 case e1000_82571:
1538 case e1000_82572:
1539 return e1000_set_82571_fiber_loopback(adapter);
bc7f75fa
AK		 1540 default:
1541 rctl = er32(RCTL);
1542 rctl |= E1000_RCTL_LBM_TCVR;
1543 ew32(RCTL, rctl);
1544 return 0;
1545 }
318a94d6 1546 } else if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 1547 return e1000_integrated_phy_loopback(adapter);
1548 }
1549
1550 return 7;
1551}
1552
1553static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1554{
1555 struct e1000_hw *hw = &adapter->hw;
2ec7d297 1556 u32 rctl, fext_nvm11, tarc0;
bc7f75fa
AK		 1557 u16 phy_reg;
1558
1559 rctl = er32(RCTL);
1560 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1561 ew32(RCTL, rctl);
1562
1563 switch (hw->mac.type) {
2ec7d297
YL		 1564 case e1000_pch_spt:
1565 fext_nvm11 = er32(FEXTNVM11);
1566 fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
1567 ew32(FEXTNVM11, fext_nvm11);
1568 tarc0 = er32(TARC(0));
1569 /* clear bits 28 & 29 (control of MULR concurrent requests) */
1570 /* set bit 29 (value of MULR requests is now 0) */
1571 tarc0 &= 0xcfffffff;
1572 ew32(TARC(0), tarc0);
1573 /* fall through */
bc7f75fa 1574 case e1000_80003es2lan:
318a94d6
JK		 1575 if (hw->phy.media_type == e1000_media_type_fiber ||
1576 hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1577 /* restore CTRL_EXT, stealing space from tx_fifo_head */
ad68076e 1578 ew32(CTRL_EXT, adapter->tx_fifo_head);
bc7f75fa
AK		 1579 adapter->tx_fifo_head = 0;
1580 }
1581 /* fall through */
1582 case e1000_82571:
1583 case e1000_82572:
318a94d6
JK		 1584 if (hw->phy.media_type == e1000_media_type_fiber ||
1585 hw->phy.media_type == e1000_media_type_internal_serdes) {
3ffcf2cb 1586 ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
945a5151 1587 e1e_flush();
1bba4386 1588 usleep_range(10000, 20000);
bc7f75fa
AK		 1589 break;
1590 }
1591 /* Fall Through */
1592 default:
1593 hw->mac.autoneg = 1;
1594 if (hw->phy.type == e1000_phy_gg82563)
1595 e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180);
c2ade1a4
BA		 1596 e1e_rphy(hw, MII_BMCR, &phy_reg);
1597 if (phy_reg & BMCR_LOOPBACK) {
1598 phy_reg &= ~BMCR_LOOPBACK;
1599 e1e_wphy(hw, MII_BMCR, phy_reg);
6b598e1e
BA		 1600 if (hw->phy.ops.commit)
1601 hw->phy.ops.commit(hw);
bc7f75fa
AK		 1602 }
1603 break;
1604 }
1605}
1606
1607static void e1000_create_lbtest_frame(struct sk_buff *skb,
1608 unsigned int frame_size)
1609{
1610 memset(skb->data, 0xFF, frame_size);
1611 frame_size &= ~1;
1612 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1613 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1614 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1615}
1616
1617static int e1000_check_lbtest_frame(struct sk_buff *skb,
1618 unsigned int frame_size)
1619{
1620 frame_size &= ~1;
1621 if (*(skb->data + 3) == 0xFF)
1622 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
17e813ec 1623 (*(skb->data + frame_size / 2 + 12) == 0xAF))
bc7f75fa
AK		 1624 return 0;
1625 return 13;
1626}
1627
1628static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1629{
1630 struct e1000_ring *tx_ring = &adapter->test_tx_ring;
1631 struct e1000_ring *rx_ring = &adapter->test_rx_ring;
1632 struct pci_dev *pdev = adapter->pdev;
1633 struct e1000_hw *hw = &adapter->hw;
17e813ec 1634 struct e1000_buffer *buffer_info;
bc7f75fa
AK		 1635 int i, j, k, l;
1636 int lc;
1637 int good_cnt;
1638 int ret_val = 0;
1639 unsigned long time;
1640
1e36052e 1641 ew32(RDT(0), rx_ring->count - 1);
bc7f75fa 1642
e921eb1a 1643 /* Calculate the loop count based on the largest descriptor ring
bc7f75fa
AK		 1644 * The idea is to wrap the largest ring a number of times using 64
1645 * send/receive pairs during each loop
1646 */
1647
1648 if (rx_ring->count <= tx_ring->count)
1649 lc = ((tx_ring->count / 64) * 2) + 1;
1650 else
1651 lc = ((rx_ring->count / 64) * 2) + 1;
1652
1653 k = 0;
1654 l = 0;
33550cec
BA		 1655 /* loop count loop */
1656 for (j = 0; j <= lc; j++) {
1657 /* send the packets */
1658 for (i = 0; i < 64; i++) {
17e813ec
BA		 1659 buffer_info = &tx_ring->buffer_info[k];
1660
1661 e1000_create_lbtest_frame(buffer_info->skb, 1024);
0be3f55f 1662 dma_sync_single_for_device(&pdev->dev,
17e813ec
BA		 1663 buffer_info->dma,
1664 buffer_info->length,
1665 DMA_TO_DEVICE);
bc7f75fa
AK		 1666 k++;
1667 if (k == tx_ring->count)
1668 k = 0;
1669 }
1e36052e 1670 ew32(TDT(0), k);
945a5151 1671 e1e_flush();
bc7f75fa 1672 msleep(200);
e80bd1d1 1673 time = jiffies; /* set the start time for the receive */
bc7f75fa 1674 good_cnt = 0;
33550cec
BA		 1675 /* receive the sent packets */
1676 do {
17e813ec
BA		 1677 buffer_info = &rx_ring->buffer_info[l];
1678
0be3f55f 1679 dma_sync_single_for_cpu(&pdev->dev,
17e813ec
BA		 1680 buffer_info->dma, 2048,
1681 DMA_FROM_DEVICE);
bc7f75fa 1682
17e813ec
BA		 1683 ret_val = e1000_check_lbtest_frame(buffer_info->skb,
1684 1024);
bc7f75fa
AK		 1685 if (!ret_val)
1686 good_cnt++;
1687 l++;
1688 if (l == rx_ring->count)
1689 l = 0;
e921eb1a 1690 /* time + 20 msecs (200 msecs on 2.4) is more than
bc7f75fa
AK		 1691 * enough time to complete the receives, if it's
1692 * exceeded, break and error off
1693 */
1694 } while ((good_cnt < 64) && !time_after(jiffies, time + 20));
1695 if (good_cnt != 64) {
e80bd1d1 1696 ret_val = 13; /* ret_val is the same as mis-compare */
bc7f75fa
AK		 1697 break;
1698 }
22f8abaa 1699 if (time_after(jiffies, time + 20)) {
e80bd1d1 1700 ret_val = 14; /* error code for time out error */
bc7f75fa
AK		 1701 break;
1702 }
33550cec 1703 }
bc7f75fa
AK		 1704 return ret_val;
1705}
1706
1707static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1708{
44abd5c1
BA		 1709 struct e1000_hw *hw = &adapter->hw;
1710
e921eb1a 1711 /* PHY loopback cannot be performed if SoL/IDER sessions are active */
470a5420
BA		 1712 if (hw->phy.ops.check_reset_block &&
1713 hw->phy.ops.check_reset_block(hw)) {
44defeb3 1714 e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
bc7f75fa
AK		 1715 *data = 0;
1716 goto out;
1717 }
1718
1719 *data = e1000_setup_desc_rings(adapter);
e265522c 1720 if (*data)
bc7f75fa
AK		 1721 goto out;
1722
1723 *data = e1000_setup_loopback_test(adapter);
e265522c 1724 if (*data)
bc7f75fa
AK		 1725 goto err_loopback;
1726
1727 *data = e1000_run_loopback_test(adapter);
1728 e1000_loopback_cleanup(adapter);
1729
1730err_loopback:
1731 e1000_free_desc_rings(adapter);
1732out:
1733 return *data;
1734}
1735
1736static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1737{
1738 struct e1000_hw *hw = &adapter->hw;
1739
1740 *data = 0;
318a94d6 1741 if (hw->phy.media_type == e1000_media_type_internal_serdes) {
bc7f75fa 1742 int i = 0;
6cf08d1c 1743
612e244c 1744 hw->mac.serdes_has_link = false;
bc7f75fa 1745
e921eb1a 1746 /* On some blade server designs, link establishment
ad68076e
BA		 1747 * could take as long as 2-3 minutes
1748 */
bc7f75fa
AK		 1749 do {
1750 hw->mac.ops.check_for_link(hw);
1751 if (hw->mac.serdes_has_link)
1752 return *data;
1753 msleep(20);
1754 } while (i++ < 3750);
1755
1756 *data = 1;
1757 } else {
1758 hw->mac.ops.check_for_link(hw);
1759 if (hw->mac.autoneg)
e921eb1a 1760 /* On some Phy/switch combinations, link establishment
5661aeb0
BA		 1761 * can take a few seconds more than expected.
1762 */
ce43a216 1763 msleep_interruptible(5000);
bc7f75fa 1764
5661aeb0 1765 if (!(er32(STATUS) & E1000_STATUS_LU))
bc7f75fa
AK		 1766 *data = 1;
1767 }
1768 return *data;
1769}
1770
8bb62869
BA		 1771static int e1000e_get_sset_count(struct net_device __always_unused *netdev,
1772 int sset)
bc7f75fa 1773{
b9f2c044
JG		 1774 switch (sset) {
1775 case ETH_SS_TEST:
1776 return E1000_TEST_LEN;
1777 case ETH_SS_STATS:
1778 return E1000_STATS_LEN;
1779 default:
1780 return -EOPNOTSUPP;
1781 }
bc7f75fa
AK		 1782}
1783
1784static void e1000_diag_test(struct net_device *netdev,
1785 struct ethtool_test *eth_test, u64 *data)
1786{
1787 struct e1000_adapter *adapter = netdev_priv(netdev);
1788 u16 autoneg_advertised;
1789 u8 forced_speed_duplex;
1790 u8 autoneg;
1791 bool if_running = netif_running(netdev);
1792
3ef672ab
BA		 1793 pm_runtime_get_sync(netdev->dev.parent);
1794
bc7f75fa 1795 set_bit(__E1000_TESTING, &adapter->state);
31dbe5b4
BA		 1796
1797 if (!if_running) {
1798 /* Get control of and reset hardware */
1799 if (adapter->flags & FLAG_HAS_AMT)
1800 e1000e_get_hw_control(adapter);
1801
1802 e1000e_power_up_phy(adapter);
1803
1804 adapter->hw.phy.autoneg_wait_to_complete = 1;
1805 e1000e_reset(adapter);
1806 adapter->hw.phy.autoneg_wait_to_complete = 0;
1807 }
1808
bc7f75fa
AK		 1809 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1810 /* Offline tests */
1811
1812 /* save speed, duplex, autoneg settings */
1813 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1814 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1815 autoneg = adapter->hw.mac.autoneg;
1816
44defeb3 1817 e_info("offline testing starting\n");
bc7f75fa 1818
bc7f75fa
AK		 1819 if (if_running)
1820 /* indicate we're in test mode */
1821 dev_close(netdev);
bc7f75fa
AK		 1822
1823 if (e1000_reg_test(adapter, &data[0]))
1824 eth_test->flags |= ETH_TEST_FL_FAILED;
1825
1826 e1000e_reset(adapter);
1827 if (e1000_eeprom_test(adapter, &data[1]))
1828 eth_test->flags |= ETH_TEST_FL_FAILED;
1829
1830 e1000e_reset(adapter);
1831 if (e1000_intr_test(adapter, &data[2]))
1832 eth_test->flags |= ETH_TEST_FL_FAILED;
1833
1834 e1000e_reset(adapter);
bc7f75fa
AK		 1835 if (e1000_loopback_test(adapter, &data[3]))
1836 eth_test->flags |= ETH_TEST_FL_FAILED;
1837
c6ce3854
CW		 1838 /* force this routine to wait until autoneg complete/timeout */
1839 adapter->hw.phy.autoneg_wait_to_complete = 1;
1840 e1000e_reset(adapter);
1841 adapter->hw.phy.autoneg_wait_to_complete = 0;
1842
1843 if (e1000_link_test(adapter, &data[4]))
1844 eth_test->flags |= ETH_TEST_FL_FAILED;
1845
bc7f75fa
AK		 1846 /* restore speed, duplex, autoneg settings */
1847 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1848 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1849 adapter->hw.mac.autoneg = autoneg;
bc7f75fa 1850 e1000e_reset(adapter);
bc7f75fa
AK		 1851
1852 clear_bit(__E1000_TESTING, &adapter->state);
1853 if (if_running)
1854 dev_open(netdev);
1855 } else {
31dbe5b4 1856 /* Online tests */
11b08be8 1857
44defeb3 1858 e_info("online testing starting\n");
bc7f75fa 1859
31dbe5b4 1860 /* register, eeprom, intr and loopback tests not run online */
bc7f75fa
AK		 1861 data[0] = 0;
1862 data[1] = 0;
1863 data[2] = 0;
1864 data[3] = 0;
1865
31dbe5b4
BA		 1866 if (e1000_link_test(adapter, &data[4]))
1867 eth_test->flags |= ETH_TEST_FL_FAILED;
11b08be8 1868
bc7f75fa
AK		 1869 clear_bit(__E1000_TESTING, &adapter->state);
1870 }
31dbe5b4
BA		 1871
1872 if (!if_running) {
1873 e1000e_reset(adapter);
1874
1875 if (adapter->flags & FLAG_HAS_AMT)
1876 e1000e_release_hw_control(adapter);
1877 }
1878
bc7f75fa 1879 msleep_interruptible(4 * 1000);
3ef672ab
BA		 1880
1881 pm_runtime_put_sync(netdev->dev.parent);
bc7f75fa
AK		 1882}
1883
1884static void e1000_get_wol(struct net_device *netdev,
1885 struct ethtool_wolinfo *wol)
1886{
1887 struct e1000_adapter *adapter = netdev_priv(netdev);
1888
1889 wol->supported = 0;
1890 wol->wolopts = 0;
1891
6ff68026
RW		 1892 if (!(adapter->flags & FLAG_HAS_WOL) ||
1893 !device_can_wakeup(&adapter->pdev->dev))
bc7f75fa
AK		 1894 return;
1895
1896 wol->supported = WAKE_UCAST | WAKE_MCAST |
4a29e155 1897 WAKE_BCAST | WAKE_MAGIC | WAKE_PHY;
bc7f75fa
AK		 1898
1899 /* apply any specific unsupported masks here */
1900 if (adapter->flags & FLAG_NO_WAKE_UCAST) {
1901 wol->supported &= ~WAKE_UCAST;
1902
1903 if (adapter->wol & E1000_WUFC_EX)
6ad65145 1904 e_err("Interface does not support directed (unicast) frame wake-up packets\n");
bc7f75fa
AK		 1905 }
1906
1907 if (adapter->wol & E1000_WUFC_EX)
1908 wol->wolopts |= WAKE_UCAST;
1909 if (adapter->wol & E1000_WUFC_MC)
1910 wol->wolopts |= WAKE_MCAST;
1911 if (adapter->wol & E1000_WUFC_BC)
1912 wol->wolopts |= WAKE_BCAST;
1913 if (adapter->wol & E1000_WUFC_MAG)
1914 wol->wolopts |= WAKE_MAGIC;
efb90e43
MW		 1915 if (adapter->wol & E1000_WUFC_LNKC)
1916 wol->wolopts |= WAKE_PHY;
bc7f75fa
AK		 1917}
1918
4a29e155 1919static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
bc7f75fa
AK		 1920{
1921 struct e1000_adapter *adapter = netdev_priv(netdev);
1922
6ff68026 1923 if (!(adapter->flags & FLAG_HAS_WOL) ||
1fbfca32
BA		 1924 !device_can_wakeup(&adapter->pdev->dev) ||
1925 (wol->wolopts & ~(WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
4a29e155 1926 WAKE_MAGIC | WAKE_PHY)))
1fbfca32 1927 return -EOPNOTSUPP;
bc7f75fa
AK		 1928
1929 /* these settings will always override what we currently have */
1930 adapter->wol = 0;
1931
1932 if (wol->wolopts & WAKE_UCAST)
1933 adapter->wol |= E1000_WUFC_EX;
1934 if (wol->wolopts & WAKE_MCAST)
1935 adapter->wol |= E1000_WUFC_MC;
1936 if (wol->wolopts & WAKE_BCAST)
1937 adapter->wol |= E1000_WUFC_BC;
1938 if (wol->wolopts & WAKE_MAGIC)
1939 adapter->wol |= E1000_WUFC_MAG;
efb90e43
MW		 1940 if (wol->wolopts & WAKE_PHY)
1941 adapter->wol |= E1000_WUFC_LNKC;
bc7f75fa 1942
6ff68026
RW		 1943 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1944
bc7f75fa
AK		 1945 return 0;
1946}
1947
dbf80dcb
BA		 1948static int e1000_set_phys_id(struct net_device *netdev,
1949 enum ethtool_phys_id_state state)
bc7f75fa
AK		 1950{
1951 struct e1000_adapter *adapter = netdev_priv(netdev);
4662e82b 1952 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1953
dbf80dcb
BA		 1954 switch (state) {
1955 case ETHTOOL_ID_ACTIVE:
3ef672ab
BA		 1956 pm_runtime_get_sync(netdev->dev.parent);
1957
dbf80dcb
BA		 1958 if (!hw->mac.ops.blink_led)
1959 return 2; /* cycle on/off twice per second */
bc7f75fa 1960
dbf80dcb
BA		 1961 hw->mac.ops.blink_led(hw);
1962 break;
1963
1964 case ETHTOOL_ID_INACTIVE:
4662e82b
BA		 1965 if (hw->phy.type == e1000_phy_ife)
1966 e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);
dbf80dcb
BA		 1967 hw->mac.ops.led_off(hw);
1968 hw->mac.ops.cleanup_led(hw);
3ef672ab 1969 pm_runtime_put_sync(netdev->dev.parent);
dbf80dcb 1970 break;
bc7f75fa 1971
dbf80dcb 1972 case ETHTOOL_ID_ON:
f23efdff 1973 hw->mac.ops.led_on(hw);
dbf80dcb 1974 break;
bc7f75fa 1975
dbf80dcb 1976 case ETHTOOL_ID_OFF:
f23efdff 1977 hw->mac.ops.led_off(hw);
dbf80dcb
BA		 1978 break;
1979 }
3ef672ab 1980
bc7f75fa
AK		 1981 return 0;
1982}
1983
de5b3077
AK		 1984static int e1000_get_coalesce(struct net_device *netdev,
1985 struct ethtool_coalesce *ec)
1986{
1987 struct e1000_adapter *adapter = netdev_priv(netdev);
1988
eab2abf5 1989 if (adapter->itr_setting <= 4)
de5b3077
AK		 1990 ec->rx_coalesce_usecs = adapter->itr_setting;
1991 else
1992 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1993
1994 return 0;
1995}
1996
1997static int e1000_set_coalesce(struct net_device *netdev,
1998 struct ethtool_coalesce *ec)
1999{
2000 struct e1000_adapter *adapter = netdev_priv(netdev);
de5b3077
AK		 2001
2002 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 2003 ((ec->rx_coalesce_usecs > 4) &&
de5b3077
AK		 2004 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
2005 (ec->rx_coalesce_usecs == 2))
2006 return -EINVAL;
2007
eab2abf5 2008 if (ec->rx_coalesce_usecs == 4) {
06a402ef
BA		 2009 adapter->itr_setting = 4;
2010 adapter->itr = adapter->itr_setting;
eab2abf5 2011 } else if (ec->rx_coalesce_usecs <= 3) {
de5b3077
AK		 2012 adapter->itr = 20000;
2013 adapter->itr_setting = ec->rx_coalesce_usecs;
2014 } else {
2015 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
2016 adapter->itr_setting = adapter->itr & ~3;
2017 }
2018
3ef672ab
BA		 2019 pm_runtime_get_sync(netdev->dev.parent);
2020
de5b3077 2021 if (adapter->itr_setting != 0)
22a4cca2 2022 e1000e_write_itr(adapter, adapter->itr);
de5b3077 2023 else
22a4cca2 2024 e1000e_write_itr(adapter, 0);
de5b3077 2025
3ef672ab
BA		 2026 pm_runtime_put_sync(netdev->dev.parent);
2027
de5b3077
AK		 2028 return 0;
2029}
2030
bc7f75fa
AK		 2031static int e1000_nway_reset(struct net_device *netdev)
2032{
2033 struct e1000_adapter *adapter = netdev_priv(netdev);
5962bc21
BA		 2034
2035 if (!netif_running(netdev))
2036 return -EAGAIN;
2037
2038 if (!adapter->hw.mac.autoneg)
2039 return -EINVAL;
2040
3ef672ab 2041 pm_runtime_get_sync(netdev->dev.parent);
5962bc21 2042 e1000e_reinit_locked(adapter);
3ef672ab 2043 pm_runtime_put_sync(netdev->dev.parent);
5962bc21 2044
bc7f75fa
AK		 2045 return 0;
2046}
2047
bc7f75fa 2048static void e1000_get_ethtool_stats(struct net_device *netdev,
8bb62869 2049 struct ethtool_stats __always_unused *stats,
bc7f75fa
AK		 2050 u64 *data)
2051{
2052 struct e1000_adapter *adapter = netdev_priv(netdev);
67fd4fcb 2053 struct rtnl_link_stats64 net_stats;
bc7f75fa 2054 int i;
e0f36a95 2055 char *p = NULL;
bc7f75fa 2056
3ef672ab
BA		 2057 pm_runtime_get_sync(netdev->dev.parent);
2058
67fd4fcb 2059 e1000e_get_stats64(netdev, &net_stats);
3ef672ab
BA		 2060
2061 pm_runtime_put_sync(netdev->dev.parent);
2062
bc7f75fa 2063 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
e0f36a95
AK		 2064 switch (e1000_gstrings_stats[i].type) {
2065 case NETDEV_STATS:
53aa82da 2066 p = (char *)&net_stats +
f0ff4398 2067 e1000_gstrings_stats[i].stat_offset;
e0f36a95
AK		 2068 break;
2069 case E1000_STATS:
53aa82da 2070 p = (char *)adapter +
f0ff4398 2071 e1000_gstrings_stats[i].stat_offset;
e0f36a95 2072 break;
61c75816
BA		 2073 default:
2074 data[i] = 0;
2075 continue;
e0f36a95
AK		 2076 }
2077
bc7f75fa 2078 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
f0ff4398 2079 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
bc7f75fa
AK		 2080 }
2081}
2082
8bb62869
BA		 2083static void e1000_get_strings(struct net_device __always_unused *netdev,
2084 u32 stringset, u8 *data)
bc7f75fa
AK		 2085{
2086 u8 *p = data;
2087 int i;
2088
2089 switch (stringset) {
2090 case ETH_SS_TEST:
5c1bda0a 2091 memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
bc7f75fa
AK		 2092 break;
2093 case ETH_SS_STATS:
2094 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
2095 memcpy(p, e1000_gstrings_stats[i].stat_string,
2096 ETH_GSTRING_LEN);
2097 p += ETH_GSTRING_LEN;
2098 }
2099 break;
2100 }
2101}
2102
70495a50 2103static int e1000_get_rxnfc(struct net_device *netdev,
8bb62869
BA		 2104 struct ethtool_rxnfc *info,
2105 u32 __always_unused *rule_locs)
70495a50
BA		 2106{
2107 info->data = 0;
2108
2109 switch (info->cmd) {
2110 case ETHTOOL_GRXFH: {
2111 struct e1000_adapter *adapter = netdev_priv(netdev);
2112 struct e1000_hw *hw = &adapter->hw;
3ef672ab
BA		 2113 u32 mrqc;
2114
2115 pm_runtime_get_sync(netdev->dev.parent);
2116 mrqc = er32(MRQC);
2117 pm_runtime_put_sync(netdev->dev.parent);
70495a50
BA		 2118
2119 if (!(mrqc & E1000_MRQC_RSS_FIELD_MASK))
2120 return 0;
2121
2122 switch (info->flow_type) {
2123 case TCP_V4_FLOW:
2124 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4_TCP)
2125 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2126 /* fall through */
2127 case UDP_V4_FLOW:
2128 case SCTP_V4_FLOW:
2129 case AH_ESP_V4_FLOW:
2130 case IPV4_FLOW:
2131 if (mrqc & E1000_MRQC_RSS_FIELD_IPV4)
2132 info->data |= RXH_IP_SRC | RXH_IP_DST;
2133 break;
2134 case TCP_V6_FLOW:
2135 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6_TCP)
2136 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2137 /* fall through */
2138 case UDP_V6_FLOW:
2139 case SCTP_V6_FLOW:
2140 case AH_ESP_V6_FLOW:
2141 case IPV6_FLOW:
2142 if (mrqc & E1000_MRQC_RSS_FIELD_IPV6)
2143 info->data |= RXH_IP_SRC | RXH_IP_DST;
2144 break;
2145 default:
2146 break;
2147 }
2148 return 0;
2149 }
2150 default:
2151 return -EOPNOTSUPP;
2152 }
2153}
2154
203e4151
BA		 2155static int e1000e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2156{
2157 struct e1000_adapter *adapter = netdev_priv(netdev);
2158 struct e1000_hw *hw = &adapter->hw;
d495bcb8
BA		 2159 u16 cap_addr, lpa_addr, pcs_stat_addr, phy_data;
2160 u32 ret_val;
203e4151 2161
d495bcb8 2162 if (!(adapter->flags2 & FLAG2_HAS_EEE))
203e4151
BA		 2163 return -EOPNOTSUPP;
2164
2165 switch (hw->phy.type) {
2166 case e1000_phy_82579:
2167 cap_addr = I82579_EEE_CAPABILITY;
203e4151
BA		 2168 lpa_addr = I82579_EEE_LP_ABILITY;
2169 pcs_stat_addr = I82579_EEE_PCS_STATUS;
2170 break;
2171 case e1000_phy_i217:
2172 cap_addr = I217_EEE_CAPABILITY;
203e4151
BA		 2173 lpa_addr = I217_EEE_LP_ABILITY;
2174 pcs_stat_addr = I217_EEE_PCS_STATUS;
2175 break;
2176 default:
2177 return -EOPNOTSUPP;
2178 }
2179
3ef672ab
BA		 2180 pm_runtime_get_sync(netdev->dev.parent);
2181
203e4151 2182 ret_val = hw->phy.ops.acquire(hw);
3ef672ab
BA		 2183 if (ret_val) {
2184 pm_runtime_put_sync(netdev->dev.parent);
203e4151 2185 return -EBUSY;
3ef672ab 2186 }
203e4151
BA		 2187
2188 /* EEE Capability */
2189 ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
2190 if (ret_val)
2191 goto release;
2192 edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);
2193
2194 /* EEE Advertised */
d495bcb8 2195 edata->advertised = mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
203e4151
BA		 2196
2197 /* EEE Link Partner Advertised */
2198 ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
2199 if (ret_val)
2200 goto release;
2201 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2202
2203 /* EEE PCS Status */
2204 ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
3ef672ab
BA		 2205 if (ret_val)
2206 goto release;
203e4151
BA		 2207 if (hw->phy.type == e1000_phy_82579)
2208 phy_data <<= 8;
2209
203e4151
BA		 2210 /* Result of the EEE auto negotiation - there is no register that
2211 * has the status of the EEE negotiation so do a best-guess based
d495bcb8 2212 * on whether Tx or Rx LPI indications have been received.
203e4151 2213 */
d495bcb8 2214 if (phy_data & (E1000_EEE_TX_LPI_RCVD | E1000_EEE_RX_LPI_RCVD))
203e4151
BA		 2215 edata->eee_active = true;
2216
2217 edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
2218 edata->tx_lpi_enabled = true;
2219 edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;
2220
3ef672ab
BA		 2221release:
2222 hw->phy.ops.release(hw);
2223 if (ret_val)
2224 ret_val = -ENODATA;
2225
2226 pm_runtime_put_sync(netdev->dev.parent);
2227
2228 return ret_val;
203e4151
BA		 2229}
2230
2231static int e1000e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
2232{
2233 struct e1000_adapter *adapter = netdev_priv(netdev);
2234 struct e1000_hw *hw = &adapter->hw;
2235 struct ethtool_eee eee_curr;
2236 s32 ret_val;
2237
203e4151
BA		 2238 ret_val = e1000e_get_eee(netdev, &eee_curr);
2239 if (ret_val)
2240 return ret_val;
2241
203e4151
BA		 2242 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2243 e_err("Setting EEE tx-lpi is not supported\n");
2244 return -EINVAL;
2245 }
2246
2247 if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
2248 e_err("Setting EEE Tx LPI timer is not supported\n");
2249 return -EINVAL;
2250 }
2251
d495bcb8
BA		 2252 if (edata->advertised & ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL)) {
2253 e_err("EEE advertisement supports only 100TX and/or 1000T full-duplex\n");
2254 return -EINVAL;
203e4151
BA		 2255 }
2256
d495bcb8
BA		 2257 adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
2258
2259 hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;
2260
3ef672ab
BA		 2261 pm_runtime_get_sync(netdev->dev.parent);
2262
d495bcb8
BA		 2263 /* reset the link */
2264 if (netif_running(netdev))
2265 e1000e_reinit_locked(adapter);
2266 else
2267 e1000e_reset(adapter);
2268
3ef672ab
BA		 2269 pm_runtime_put_sync(netdev->dev.parent);
2270
203e4151
BA		 2271 return 0;
2272}
2273
b67e1913
BA		 2274static int e1000e_get_ts_info(struct net_device *netdev,
2275 struct ethtool_ts_info *info)
2276{
2277 struct e1000_adapter *adapter = netdev_priv(netdev);
2278
2279 ethtool_op_get_ts_info(netdev, info);
2280
2281 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
2282 return 0;
2283
2284 info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
2285 SOF_TIMESTAMPING_RX_HARDWARE |
2286 SOF_TIMESTAMPING_RAW_HARDWARE);
2287
2288 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
2289
2290 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
d89777bf
BA		 2291 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2292 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2293 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2294 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2295 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2296 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2297 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
2298 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
2299 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
b67e1913
BA		 2300 (1 << HWTSTAMP_FILTER_ALL));
2301
d89777bf
BA		 2302 if (adapter->ptp_clock)
2303 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2304
b67e1913
BA		 2305 return 0;
2306}
2307
bc7f75fa
AK		 2308static const struct ethtool_ops e1000_ethtool_ops = {
2309 .get_settings = e1000_get_settings,
2310 .set_settings = e1000_set_settings,
2311 .get_drvinfo = e1000_get_drvinfo,
2312 .get_regs_len = e1000_get_regs_len,
2313 .get_regs = e1000_get_regs,
2314 .get_wol = e1000_get_wol,
2315 .set_wol = e1000_set_wol,
2316 .get_msglevel = e1000_get_msglevel,
2317 .set_msglevel = e1000_set_msglevel,
2318 .nway_reset = e1000_nway_reset,
ed4ba4b5 2319 .get_link = ethtool_op_get_link,
bc7f75fa
AK		 2320 .get_eeprom_len = e1000_get_eeprom_len,
2321 .get_eeprom = e1000_get_eeprom,
2322 .set_eeprom = e1000_set_eeprom,
2323 .get_ringparam = e1000_get_ringparam,
2324 .set_ringparam = e1000_set_ringparam,
2325 .get_pauseparam = e1000_get_pauseparam,
2326 .set_pauseparam = e1000_set_pauseparam,
bc7f75fa
AK		 2327 .self_test = e1000_diag_test,
2328 .get_strings = e1000_get_strings,
dbf80dcb 2329 .set_phys_id = e1000_set_phys_id,
bc7f75fa 2330 .get_ethtool_stats = e1000_get_ethtool_stats,
b9f2c044 2331 .get_sset_count = e1000e_get_sset_count,
de5b3077
AK		 2332 .get_coalesce = e1000_get_coalesce,
2333 .set_coalesce = e1000_set_coalesce,
70495a50 2334 .get_rxnfc = e1000_get_rxnfc,
b67e1913 2335 .get_ts_info = e1000e_get_ts_info,
203e4151
BA		 2336 .get_eee = e1000e_get_eee,
2337 .set_eee = e1000e_set_eee,
bc7f75fa
AK		 2338};
2339
2340void e1000e_set_ethtool_ops(struct net_device *netdev)
2341{
7ad24ea4 2342 netdev->ethtool_ops = &e1000_ethtool_ops;
bc7f75fa 2343}
Linux kernel - Deliverables
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