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bc7f75fa AK |
1 | /******************************************************************************* |
2 | ||
3 | Intel PRO/1000 Linux driver | |
0d6057e4 | 4 | Copyright(c) 1999 - 2011 Intel Corporation. |
bc7f75fa AK |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | Linux NICS <linux.nics@intel.com> | |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
8544b9f7 BA |
29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
30 | ||
bc7f75fa AK |
31 | #include <linux/module.h> |
32 | #include <linux/types.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/vmalloc.h> | |
36 | #include <linux/pagemap.h> | |
37 | #include <linux/delay.h> | |
38 | #include <linux/netdevice.h> | |
9fb7a5f7 | 39 | #include <linux/interrupt.h> |
bc7f75fa AK |
40 | #include <linux/tcp.h> |
41 | #include <linux/ipv6.h> | |
5a0e3ad6 | 42 | #include <linux/slab.h> |
bc7f75fa AK |
43 | #include <net/checksum.h> |
44 | #include <net/ip6_checksum.h> | |
45 | #include <linux/mii.h> | |
46 | #include <linux/ethtool.h> | |
47 | #include <linux/if_vlan.h> | |
48 | #include <linux/cpu.h> | |
49 | #include <linux/smp.h> | |
e8db0be1 | 50 | #include <linux/pm_qos.h> |
23606cf5 | 51 | #include <linux/pm_runtime.h> |
111b9dc5 | 52 | #include <linux/aer.h> |
70c71606 | 53 | #include <linux/prefetch.h> |
bc7f75fa AK |
54 | |
55 | #include "e1000.h" | |
56 | ||
b3ccf267 | 57 | #define DRV_EXTRAVERSION "-k" |
c14c643b | 58 | |
c5778b43 | 59 | #define DRV_VERSION "1.5.1" DRV_EXTRAVERSION |
bc7f75fa AK |
60 | char e1000e_driver_name[] = "e1000e"; |
61 | const char e1000e_driver_version[] = DRV_VERSION; | |
62 | ||
78cd29d5 BA |
63 | static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state); |
64 | ||
bc7f75fa AK |
65 | static const struct e1000_info *e1000_info_tbl[] = { |
66 | [board_82571] = &e1000_82571_info, | |
67 | [board_82572] = &e1000_82572_info, | |
68 | [board_82573] = &e1000_82573_info, | |
4662e82b | 69 | [board_82574] = &e1000_82574_info, |
8c81c9c3 | 70 | [board_82583] = &e1000_82583_info, |
bc7f75fa AK |
71 | [board_80003es2lan] = &e1000_es2_info, |
72 | [board_ich8lan] = &e1000_ich8_info, | |
73 | [board_ich9lan] = &e1000_ich9_info, | |
f4187b56 | 74 | [board_ich10lan] = &e1000_ich10_info, |
a4f58f54 | 75 | [board_pchlan] = &e1000_pch_info, |
d3738bb8 | 76 | [board_pch2lan] = &e1000_pch2_info, |
bc7f75fa AK |
77 | }; |
78 | ||
84f4ee90 TI |
79 | struct e1000_reg_info { |
80 | u32 ofs; | |
81 | char *name; | |
82 | }; | |
83 | ||
af667a29 BA |
84 | #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */ |
85 | #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */ | |
86 | #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */ | |
87 | #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */ | |
88 | #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */ | |
89 | ||
90 | #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */ | |
91 | #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */ | |
92 | #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */ | |
93 | #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */ | |
94 | #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */ | |
84f4ee90 TI |
95 | |
96 | static const struct e1000_reg_info e1000_reg_info_tbl[] = { | |
97 | ||
98 | /* General Registers */ | |
99 | {E1000_CTRL, "CTRL"}, | |
100 | {E1000_STATUS, "STATUS"}, | |
101 | {E1000_CTRL_EXT, "CTRL_EXT"}, | |
102 | ||
103 | /* Interrupt Registers */ | |
104 | {E1000_ICR, "ICR"}, | |
105 | ||
af667a29 | 106 | /* Rx Registers */ |
84f4ee90 TI |
107 | {E1000_RCTL, "RCTL"}, |
108 | {E1000_RDLEN, "RDLEN"}, | |
109 | {E1000_RDH, "RDH"}, | |
110 | {E1000_RDT, "RDT"}, | |
111 | {E1000_RDTR, "RDTR"}, | |
112 | {E1000_RXDCTL(0), "RXDCTL"}, | |
113 | {E1000_ERT, "ERT"}, | |
114 | {E1000_RDBAL, "RDBAL"}, | |
115 | {E1000_RDBAH, "RDBAH"}, | |
116 | {E1000_RDFH, "RDFH"}, | |
117 | {E1000_RDFT, "RDFT"}, | |
118 | {E1000_RDFHS, "RDFHS"}, | |
119 | {E1000_RDFTS, "RDFTS"}, | |
120 | {E1000_RDFPC, "RDFPC"}, | |
121 | ||
af667a29 | 122 | /* Tx Registers */ |
84f4ee90 TI |
123 | {E1000_TCTL, "TCTL"}, |
124 | {E1000_TDBAL, "TDBAL"}, | |
125 | {E1000_TDBAH, "TDBAH"}, | |
126 | {E1000_TDLEN, "TDLEN"}, | |
127 | {E1000_TDH, "TDH"}, | |
128 | {E1000_TDT, "TDT"}, | |
129 | {E1000_TIDV, "TIDV"}, | |
130 | {E1000_TXDCTL(0), "TXDCTL"}, | |
131 | {E1000_TADV, "TADV"}, | |
132 | {E1000_TARC(0), "TARC"}, | |
133 | {E1000_TDFH, "TDFH"}, | |
134 | {E1000_TDFT, "TDFT"}, | |
135 | {E1000_TDFHS, "TDFHS"}, | |
136 | {E1000_TDFTS, "TDFTS"}, | |
137 | {E1000_TDFPC, "TDFPC"}, | |
138 | ||
139 | /* List Terminator */ | |
140 | {} | |
141 | }; | |
142 | ||
143 | /* | |
144 | * e1000_regdump - register printout routine | |
145 | */ | |
146 | static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo) | |
147 | { | |
148 | int n = 0; | |
149 | char rname[16]; | |
150 | u32 regs[8]; | |
151 | ||
152 | switch (reginfo->ofs) { | |
153 | case E1000_RXDCTL(0): | |
154 | for (n = 0; n < 2; n++) | |
155 | regs[n] = __er32(hw, E1000_RXDCTL(n)); | |
156 | break; | |
157 | case E1000_TXDCTL(0): | |
158 | for (n = 0; n < 2; n++) | |
159 | regs[n] = __er32(hw, E1000_TXDCTL(n)); | |
160 | break; | |
161 | case E1000_TARC(0): | |
162 | for (n = 0; n < 2; n++) | |
163 | regs[n] = __er32(hw, E1000_TARC(n)); | |
164 | break; | |
165 | default: | |
ef456f85 JK |
166 | pr_info("%-15s %08x\n", |
167 | reginfo->name, __er32(hw, reginfo->ofs)); | |
84f4ee90 TI |
168 | return; |
169 | } | |
170 | ||
171 | snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]"); | |
ef456f85 | 172 | pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]); |
84f4ee90 TI |
173 | } |
174 | ||
84f4ee90 | 175 | /* |
af667a29 | 176 | * e1000e_dump - Print registers, Tx-ring and Rx-ring |
84f4ee90 TI |
177 | */ |
178 | static void e1000e_dump(struct e1000_adapter *adapter) | |
179 | { | |
180 | struct net_device *netdev = adapter->netdev; | |
181 | struct e1000_hw *hw = &adapter->hw; | |
182 | struct e1000_reg_info *reginfo; | |
183 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
184 | struct e1000_tx_desc *tx_desc; | |
af667a29 BA |
185 | struct my_u0 { |
186 | u64 a; | |
187 | u64 b; | |
188 | } *u0; | |
84f4ee90 TI |
189 | struct e1000_buffer *buffer_info; |
190 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
191 | union e1000_rx_desc_packet_split *rx_desc_ps; | |
5f450212 | 192 | union e1000_rx_desc_extended *rx_desc; |
af667a29 BA |
193 | struct my_u1 { |
194 | u64 a; | |
195 | u64 b; | |
196 | u64 c; | |
197 | u64 d; | |
198 | } *u1; | |
84f4ee90 TI |
199 | u32 staterr; |
200 | int i = 0; | |
201 | ||
202 | if (!netif_msg_hw(adapter)) | |
203 | return; | |
204 | ||
205 | /* Print netdevice Info */ | |
206 | if (netdev) { | |
207 | dev_info(&adapter->pdev->dev, "Net device Info\n"); | |
ef456f85 JK |
208 | pr_info("Device Name state trans_start last_rx\n"); |
209 | pr_info("%-15s %016lX %016lX %016lX\n", | |
210 | netdev->name, netdev->state, netdev->trans_start, | |
211 | netdev->last_rx); | |
84f4ee90 TI |
212 | } |
213 | ||
214 | /* Print Registers */ | |
215 | dev_info(&adapter->pdev->dev, "Register Dump\n"); | |
ef456f85 | 216 | pr_info(" Register Name Value\n"); |
84f4ee90 TI |
217 | for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl; |
218 | reginfo->name; reginfo++) { | |
219 | e1000_regdump(hw, reginfo); | |
220 | } | |
221 | ||
af667a29 | 222 | /* Print Tx Ring Summary */ |
84f4ee90 TI |
223 | if (!netdev || !netif_running(netdev)) |
224 | goto exit; | |
225 | ||
af667a29 | 226 | dev_info(&adapter->pdev->dev, "Tx Ring Summary\n"); |
ef456f85 | 227 | pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n"); |
84f4ee90 | 228 | buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean]; |
ef456f85 JK |
229 | pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n", |
230 | 0, tx_ring->next_to_use, tx_ring->next_to_clean, | |
231 | (unsigned long long)buffer_info->dma, | |
232 | buffer_info->length, | |
233 | buffer_info->next_to_watch, | |
234 | (unsigned long long)buffer_info->time_stamp); | |
84f4ee90 | 235 | |
af667a29 | 236 | /* Print Tx Ring */ |
84f4ee90 TI |
237 | if (!netif_msg_tx_done(adapter)) |
238 | goto rx_ring_summary; | |
239 | ||
af667a29 | 240 | dev_info(&adapter->pdev->dev, "Tx Ring Dump\n"); |
84f4ee90 TI |
241 | |
242 | /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended) | |
243 | * | |
244 | * Legacy Transmit Descriptor | |
245 | * +--------------------------------------------------------------+ | |
246 | * 0 | Buffer Address [63:0] (Reserved on Write Back) | | |
247 | * +--------------------------------------------------------------+ | |
248 | * 8 | Special | CSS | Status | CMD | CSO | Length | | |
249 | * +--------------------------------------------------------------+ | |
250 | * 63 48 47 36 35 32 31 24 23 16 15 0 | |
251 | * | |
252 | * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload | |
253 | * 63 48 47 40 39 32 31 16 15 8 7 0 | |
254 | * +----------------------------------------------------------------+ | |
255 | * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS | | |
256 | * +----------------------------------------------------------------+ | |
257 | * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN | | |
258 | * +----------------------------------------------------------------+ | |
259 | * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 | |
260 | * | |
261 | * Extended Data Descriptor (DTYP=0x1) | |
262 | * +----------------------------------------------------------------+ | |
263 | * 0 | Buffer Address [63:0] | | |
264 | * +----------------------------------------------------------------+ | |
265 | * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN | | |
266 | * +----------------------------------------------------------------+ | |
267 | * 63 48 47 40 39 36 35 32 31 24 23 20 19 0 | |
268 | */ | |
ef456f85 JK |
269 | pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n"); |
270 | pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n"); | |
271 | pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n"); | |
84f4ee90 | 272 | for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) { |
ef456f85 | 273 | const char *next_desc; |
84f4ee90 TI |
274 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
275 | buffer_info = &tx_ring->buffer_info[i]; | |
276 | u0 = (struct my_u0 *)tx_desc; | |
84f4ee90 | 277 | if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean) |
ef456f85 | 278 | next_desc = " NTC/U"; |
84f4ee90 | 279 | else if (i == tx_ring->next_to_use) |
ef456f85 | 280 | next_desc = " NTU"; |
84f4ee90 | 281 | else if (i == tx_ring->next_to_clean) |
ef456f85 | 282 | next_desc = " NTC"; |
84f4ee90 | 283 | else |
ef456f85 JK |
284 | next_desc = ""; |
285 | pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n", | |
286 | (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' : | |
287 | ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), | |
288 | i, | |
289 | (unsigned long long)le64_to_cpu(u0->a), | |
290 | (unsigned long long)le64_to_cpu(u0->b), | |
291 | (unsigned long long)buffer_info->dma, | |
292 | buffer_info->length, buffer_info->next_to_watch, | |
293 | (unsigned long long)buffer_info->time_stamp, | |
294 | buffer_info->skb, next_desc); | |
84f4ee90 TI |
295 | |
296 | if (netif_msg_pktdata(adapter) && buffer_info->dma != 0) | |
297 | print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, | |
af667a29 BA |
298 | 16, 1, phys_to_virt(buffer_info->dma), |
299 | buffer_info->length, true); | |
84f4ee90 TI |
300 | } |
301 | ||
af667a29 | 302 | /* Print Rx Ring Summary */ |
84f4ee90 | 303 | rx_ring_summary: |
af667a29 | 304 | dev_info(&adapter->pdev->dev, "Rx Ring Summary\n"); |
ef456f85 JK |
305 | pr_info("Queue [NTU] [NTC]\n"); |
306 | pr_info(" %5d %5X %5X\n", | |
307 | 0, rx_ring->next_to_use, rx_ring->next_to_clean); | |
84f4ee90 | 308 | |
af667a29 | 309 | /* Print Rx Ring */ |
84f4ee90 TI |
310 | if (!netif_msg_rx_status(adapter)) |
311 | goto exit; | |
312 | ||
af667a29 | 313 | dev_info(&adapter->pdev->dev, "Rx Ring Dump\n"); |
84f4ee90 TI |
314 | switch (adapter->rx_ps_pages) { |
315 | case 1: | |
316 | case 2: | |
317 | case 3: | |
318 | /* [Extended] Packet Split Receive Descriptor Format | |
319 | * | |
320 | * +-----------------------------------------------------+ | |
321 | * 0 | Buffer Address 0 [63:0] | | |
322 | * +-----------------------------------------------------+ | |
323 | * 8 | Buffer Address 1 [63:0] | | |
324 | * +-----------------------------------------------------+ | |
325 | * 16 | Buffer Address 2 [63:0] | | |
326 | * +-----------------------------------------------------+ | |
327 | * 24 | Buffer Address 3 [63:0] | | |
328 | * +-----------------------------------------------------+ | |
329 | */ | |
ef456f85 | 330 | pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n"); |
84f4ee90 TI |
331 | /* [Extended] Receive Descriptor (Write-Back) Format |
332 | * | |
333 | * 63 48 47 32 31 13 12 8 7 4 3 0 | |
334 | * +------------------------------------------------------+ | |
335 | * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS | | |
336 | * | Checksum | Ident | | Queue | | Type | | |
337 | * +------------------------------------------------------+ | |
338 | * 8 | VLAN Tag | Length | Extended Error | Extended Status | | |
339 | * +------------------------------------------------------+ | |
340 | * 63 48 47 32 31 20 19 0 | |
341 | */ | |
ef456f85 | 342 | pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); |
84f4ee90 | 343 | for (i = 0; i < rx_ring->count; i++) { |
ef456f85 | 344 | const char *next_desc; |
84f4ee90 TI |
345 | buffer_info = &rx_ring->buffer_info[i]; |
346 | rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i); | |
347 | u1 = (struct my_u1 *)rx_desc_ps; | |
348 | staterr = | |
af667a29 | 349 | le32_to_cpu(rx_desc_ps->wb.middle.status_error); |
ef456f85 JK |
350 | |
351 | if (i == rx_ring->next_to_use) | |
352 | next_desc = " NTU"; | |
353 | else if (i == rx_ring->next_to_clean) | |
354 | next_desc = " NTC"; | |
355 | else | |
356 | next_desc = ""; | |
357 | ||
84f4ee90 TI |
358 | if (staterr & E1000_RXD_STAT_DD) { |
359 | /* Descriptor Done */ | |
ef456f85 JK |
360 | pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n", |
361 | "RWB", i, | |
362 | (unsigned long long)le64_to_cpu(u1->a), | |
363 | (unsigned long long)le64_to_cpu(u1->b), | |
364 | (unsigned long long)le64_to_cpu(u1->c), | |
365 | (unsigned long long)le64_to_cpu(u1->d), | |
366 | buffer_info->skb, next_desc); | |
84f4ee90 | 367 | } else { |
ef456f85 JK |
368 | pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n", |
369 | "R ", i, | |
370 | (unsigned long long)le64_to_cpu(u1->a), | |
371 | (unsigned long long)le64_to_cpu(u1->b), | |
372 | (unsigned long long)le64_to_cpu(u1->c), | |
373 | (unsigned long long)le64_to_cpu(u1->d), | |
374 | (unsigned long long)buffer_info->dma, | |
375 | buffer_info->skb, next_desc); | |
84f4ee90 TI |
376 | |
377 | if (netif_msg_pktdata(adapter)) | |
378 | print_hex_dump(KERN_INFO, "", | |
379 | DUMP_PREFIX_ADDRESS, 16, 1, | |
380 | phys_to_virt(buffer_info->dma), | |
381 | adapter->rx_ps_bsize0, true); | |
382 | } | |
84f4ee90 TI |
383 | } |
384 | break; | |
385 | default: | |
386 | case 0: | |
5f450212 | 387 | /* Extended Receive Descriptor (Read) Format |
84f4ee90 | 388 | * |
5f450212 BA |
389 | * +-----------------------------------------------------+ |
390 | * 0 | Buffer Address [63:0] | | |
391 | * +-----------------------------------------------------+ | |
392 | * 8 | Reserved | | |
393 | * +-----------------------------------------------------+ | |
84f4ee90 | 394 | */ |
ef456f85 | 395 | pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n"); |
5f450212 BA |
396 | /* Extended Receive Descriptor (Write-Back) Format |
397 | * | |
398 | * 63 48 47 32 31 24 23 4 3 0 | |
399 | * +------------------------------------------------------+ | |
400 | * | RSS Hash | | | | | |
401 | * 0 +-------------------+ Rsvd | Reserved | MRQ RSS | | |
402 | * | Packet | IP | | | Type | | |
403 | * | Checksum | Ident | | | | | |
404 | * +------------------------------------------------------+ | |
405 | * 8 | VLAN Tag | Length | Extended Error | Extended Status | | |
406 | * +------------------------------------------------------+ | |
407 | * 63 48 47 32 31 20 19 0 | |
408 | */ | |
ef456f85 | 409 | pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n"); |
5f450212 BA |
410 | |
411 | for (i = 0; i < rx_ring->count; i++) { | |
ef456f85 JK |
412 | const char *next_desc; |
413 | ||
84f4ee90 | 414 | buffer_info = &rx_ring->buffer_info[i]; |
5f450212 BA |
415 | rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); |
416 | u1 = (struct my_u1 *)rx_desc; | |
417 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
ef456f85 JK |
418 | |
419 | if (i == rx_ring->next_to_use) | |
420 | next_desc = " NTU"; | |
421 | else if (i == rx_ring->next_to_clean) | |
422 | next_desc = " NTC"; | |
423 | else | |
424 | next_desc = ""; | |
425 | ||
5f450212 BA |
426 | if (staterr & E1000_RXD_STAT_DD) { |
427 | /* Descriptor Done */ | |
ef456f85 JK |
428 | pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n", |
429 | "RWB", i, | |
430 | (unsigned long long)le64_to_cpu(u1->a), | |
431 | (unsigned long long)le64_to_cpu(u1->b), | |
432 | buffer_info->skb, next_desc); | |
5f450212 | 433 | } else { |
ef456f85 JK |
434 | pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n", |
435 | "R ", i, | |
436 | (unsigned long long)le64_to_cpu(u1->a), | |
437 | (unsigned long long)le64_to_cpu(u1->b), | |
438 | (unsigned long long)buffer_info->dma, | |
439 | buffer_info->skb, next_desc); | |
5f450212 BA |
440 | |
441 | if (netif_msg_pktdata(adapter)) | |
442 | print_hex_dump(KERN_INFO, "", | |
443 | DUMP_PREFIX_ADDRESS, 16, | |
444 | 1, | |
445 | phys_to_virt | |
446 | (buffer_info->dma), | |
447 | adapter->rx_buffer_len, | |
448 | true); | |
449 | } | |
84f4ee90 TI |
450 | } |
451 | } | |
452 | ||
453 | exit: | |
454 | return; | |
455 | } | |
456 | ||
bc7f75fa AK |
457 | /** |
458 | * e1000_desc_unused - calculate if we have unused descriptors | |
459 | **/ | |
460 | static int e1000_desc_unused(struct e1000_ring *ring) | |
461 | { | |
462 | if (ring->next_to_clean > ring->next_to_use) | |
463 | return ring->next_to_clean - ring->next_to_use - 1; | |
464 | ||
465 | return ring->count + ring->next_to_clean - ring->next_to_use - 1; | |
466 | } | |
467 | ||
468 | /** | |
ad68076e | 469 | * e1000_receive_skb - helper function to handle Rx indications |
bc7f75fa AK |
470 | * @adapter: board private structure |
471 | * @status: descriptor status field as written by hardware | |
472 | * @vlan: descriptor vlan field as written by hardware (no le/be conversion) | |
473 | * @skb: pointer to sk_buff to be indicated to stack | |
474 | **/ | |
475 | static void e1000_receive_skb(struct e1000_adapter *adapter, | |
af667a29 | 476 | struct net_device *netdev, struct sk_buff *skb, |
a39fe742 | 477 | u8 status, __le16 vlan) |
bc7f75fa | 478 | { |
86d70e53 | 479 | u16 tag = le16_to_cpu(vlan); |
bc7f75fa AK |
480 | skb->protocol = eth_type_trans(skb, netdev); |
481 | ||
86d70e53 JK |
482 | if (status & E1000_RXD_STAT_VP) |
483 | __vlan_hwaccel_put_tag(skb, tag); | |
484 | ||
485 | napi_gro_receive(&adapter->napi, skb); | |
bc7f75fa AK |
486 | } |
487 | ||
488 | /** | |
af667a29 | 489 | * e1000_rx_checksum - Receive Checksum Offload |
bc7f75fa AK |
490 | * @adapter: board private structure |
491 | * @status_err: receive descriptor status and error fields | |
492 | * @csum: receive descriptor csum field | |
493 | * @sk_buff: socket buffer with received data | |
494 | **/ | |
495 | static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err, | |
496 | u32 csum, struct sk_buff *skb) | |
497 | { | |
498 | u16 status = (u16)status_err; | |
499 | u8 errors = (u8)(status_err >> 24); | |
bc8acf2c ED |
500 | |
501 | skb_checksum_none_assert(skb); | |
bc7f75fa AK |
502 | |
503 | /* Ignore Checksum bit is set */ | |
504 | if (status & E1000_RXD_STAT_IXSM) | |
505 | return; | |
506 | /* TCP/UDP checksum error bit is set */ | |
507 | if (errors & E1000_RXD_ERR_TCPE) { | |
508 | /* let the stack verify checksum errors */ | |
509 | adapter->hw_csum_err++; | |
510 | return; | |
511 | } | |
512 | ||
513 | /* TCP/UDP Checksum has not been calculated */ | |
514 | if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) | |
515 | return; | |
516 | ||
517 | /* It must be a TCP or UDP packet with a valid checksum */ | |
518 | if (status & E1000_RXD_STAT_TCPCS) { | |
519 | /* TCP checksum is good */ | |
520 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
521 | } else { | |
ad68076e BA |
522 | /* |
523 | * IP fragment with UDP payload | |
524 | * Hardware complements the payload checksum, so we undo it | |
bc7f75fa AK |
525 | * and then put the value in host order for further stack use. |
526 | */ | |
a39fe742 AV |
527 | __sum16 sum = (__force __sum16)htons(csum); |
528 | skb->csum = csum_unfold(~sum); | |
bc7f75fa AK |
529 | skb->ip_summed = CHECKSUM_COMPLETE; |
530 | } | |
531 | adapter->hw_csum_good++; | |
532 | } | |
533 | ||
c6e7f51e BA |
534 | /** |
535 | * e1000e_update_tail_wa - helper function for e1000e_update_[rt]dt_wa() | |
536 | * @hw: pointer to the HW structure | |
537 | * @tail: address of tail descriptor register | |
538 | * @i: value to write to tail descriptor register | |
539 | * | |
540 | * When updating the tail register, the ME could be accessing Host CSR | |
541 | * registers at the same time. Normally, this is handled in h/w by an | |
542 | * arbiter but on some parts there is a bug that acknowledges Host accesses | |
543 | * later than it should which could result in the descriptor register to | |
544 | * have an incorrect value. Workaround this by checking the FWSM register | |
545 | * which has bit 24 set while ME is accessing Host CSR registers, wait | |
546 | * if it is set and try again a number of times. | |
547 | **/ | |
548 | static inline s32 e1000e_update_tail_wa(struct e1000_hw *hw, u8 __iomem * tail, | |
549 | unsigned int i) | |
550 | { | |
551 | unsigned int j = 0; | |
552 | ||
553 | while ((j++ < E1000_ICH_FWSM_PCIM2PCI_COUNT) && | |
554 | (er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI)) | |
555 | udelay(50); | |
556 | ||
557 | writel(i, tail); | |
558 | ||
559 | if ((j == E1000_ICH_FWSM_PCIM2PCI_COUNT) && (i != readl(tail))) | |
560 | return E1000_ERR_SWFW_SYNC; | |
561 | ||
562 | return 0; | |
563 | } | |
564 | ||
565 | static void e1000e_update_rdt_wa(struct e1000_adapter *adapter, unsigned int i) | |
566 | { | |
567 | u8 __iomem *tail = (adapter->hw.hw_addr + adapter->rx_ring->tail); | |
568 | struct e1000_hw *hw = &adapter->hw; | |
569 | ||
570 | if (e1000e_update_tail_wa(hw, tail, i)) { | |
571 | u32 rctl = er32(RCTL); | |
572 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
573 | e_err("ME firmware caused invalid RDT - resetting\n"); | |
574 | schedule_work(&adapter->reset_task); | |
575 | } | |
576 | } | |
577 | ||
578 | static void e1000e_update_tdt_wa(struct e1000_adapter *adapter, unsigned int i) | |
579 | { | |
580 | u8 __iomem *tail = (adapter->hw.hw_addr + adapter->tx_ring->tail); | |
581 | struct e1000_hw *hw = &adapter->hw; | |
582 | ||
583 | if (e1000e_update_tail_wa(hw, tail, i)) { | |
584 | u32 tctl = er32(TCTL); | |
585 | ew32(TCTL, tctl & ~E1000_TCTL_EN); | |
586 | e_err("ME firmware caused invalid TDT - resetting\n"); | |
587 | schedule_work(&adapter->reset_task); | |
588 | } | |
589 | } | |
590 | ||
bc7f75fa | 591 | /** |
5f450212 | 592 | * e1000_alloc_rx_buffers - Replace used receive buffers |
bc7f75fa AK |
593 | * @adapter: address of board private structure |
594 | **/ | |
595 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, | |
c2fed996 | 596 | int cleaned_count, gfp_t gfp) |
bc7f75fa AK |
597 | { |
598 | struct net_device *netdev = adapter->netdev; | |
599 | struct pci_dev *pdev = adapter->pdev; | |
600 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
5f450212 | 601 | union e1000_rx_desc_extended *rx_desc; |
bc7f75fa AK |
602 | struct e1000_buffer *buffer_info; |
603 | struct sk_buff *skb; | |
604 | unsigned int i; | |
89d71a66 | 605 | unsigned int bufsz = adapter->rx_buffer_len; |
bc7f75fa AK |
606 | |
607 | i = rx_ring->next_to_use; | |
608 | buffer_info = &rx_ring->buffer_info[i]; | |
609 | ||
610 | while (cleaned_count--) { | |
611 | skb = buffer_info->skb; | |
612 | if (skb) { | |
613 | skb_trim(skb, 0); | |
614 | goto map_skb; | |
615 | } | |
616 | ||
c2fed996 | 617 | skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); |
bc7f75fa AK |
618 | if (!skb) { |
619 | /* Better luck next round */ | |
620 | adapter->alloc_rx_buff_failed++; | |
621 | break; | |
622 | } | |
623 | ||
bc7f75fa AK |
624 | buffer_info->skb = skb; |
625 | map_skb: | |
0be3f55f | 626 | buffer_info->dma = dma_map_single(&pdev->dev, skb->data, |
bc7f75fa | 627 | adapter->rx_buffer_len, |
0be3f55f NN |
628 | DMA_FROM_DEVICE); |
629 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { | |
af667a29 | 630 | dev_err(&pdev->dev, "Rx DMA map failed\n"); |
bc7f75fa AK |
631 | adapter->rx_dma_failed++; |
632 | break; | |
633 | } | |
634 | ||
5f450212 BA |
635 | rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); |
636 | rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); | |
bc7f75fa | 637 | |
50849d79 TH |
638 | if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { |
639 | /* | |
640 | * Force memory writes to complete before letting h/w | |
641 | * know there are new descriptors to fetch. (Only | |
642 | * applicable for weak-ordered memory model archs, | |
643 | * such as IA-64). | |
644 | */ | |
645 | wmb(); | |
c6e7f51e BA |
646 | if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) |
647 | e1000e_update_rdt_wa(adapter, i); | |
648 | else | |
649 | writel(i, adapter->hw.hw_addr + rx_ring->tail); | |
50849d79 | 650 | } |
bc7f75fa AK |
651 | i++; |
652 | if (i == rx_ring->count) | |
653 | i = 0; | |
654 | buffer_info = &rx_ring->buffer_info[i]; | |
655 | } | |
656 | ||
50849d79 | 657 | rx_ring->next_to_use = i; |
bc7f75fa AK |
658 | } |
659 | ||
660 | /** | |
661 | * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split | |
662 | * @adapter: address of board private structure | |
663 | **/ | |
664 | static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, | |
c2fed996 | 665 | int cleaned_count, gfp_t gfp) |
bc7f75fa AK |
666 | { |
667 | struct net_device *netdev = adapter->netdev; | |
668 | struct pci_dev *pdev = adapter->pdev; | |
669 | union e1000_rx_desc_packet_split *rx_desc; | |
670 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
671 | struct e1000_buffer *buffer_info; | |
672 | struct e1000_ps_page *ps_page; | |
673 | struct sk_buff *skb; | |
674 | unsigned int i, j; | |
675 | ||
676 | i = rx_ring->next_to_use; | |
677 | buffer_info = &rx_ring->buffer_info[i]; | |
678 | ||
679 | while (cleaned_count--) { | |
680 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
681 | ||
682 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { | |
47f44e40 AK |
683 | ps_page = &buffer_info->ps_pages[j]; |
684 | if (j >= adapter->rx_ps_pages) { | |
685 | /* all unused desc entries get hw null ptr */ | |
af667a29 BA |
686 | rx_desc->read.buffer_addr[j + 1] = |
687 | ~cpu_to_le64(0); | |
47f44e40 AK |
688 | continue; |
689 | } | |
690 | if (!ps_page->page) { | |
c2fed996 | 691 | ps_page->page = alloc_page(gfp); |
bc7f75fa | 692 | if (!ps_page->page) { |
47f44e40 AK |
693 | adapter->alloc_rx_buff_failed++; |
694 | goto no_buffers; | |
695 | } | |
0be3f55f NN |
696 | ps_page->dma = dma_map_page(&pdev->dev, |
697 | ps_page->page, | |
698 | 0, PAGE_SIZE, | |
699 | DMA_FROM_DEVICE); | |
700 | if (dma_mapping_error(&pdev->dev, | |
701 | ps_page->dma)) { | |
47f44e40 | 702 | dev_err(&adapter->pdev->dev, |
af667a29 | 703 | "Rx DMA page map failed\n"); |
47f44e40 AK |
704 | adapter->rx_dma_failed++; |
705 | goto no_buffers; | |
bc7f75fa | 706 | } |
bc7f75fa | 707 | } |
47f44e40 AK |
708 | /* |
709 | * Refresh the desc even if buffer_addrs | |
710 | * didn't change because each write-back | |
711 | * erases this info. | |
712 | */ | |
af667a29 BA |
713 | rx_desc->read.buffer_addr[j + 1] = |
714 | cpu_to_le64(ps_page->dma); | |
bc7f75fa AK |
715 | } |
716 | ||
c2fed996 JK |
717 | skb = __netdev_alloc_skb_ip_align(netdev, |
718 | adapter->rx_ps_bsize0, | |
719 | gfp); | |
bc7f75fa AK |
720 | |
721 | if (!skb) { | |
722 | adapter->alloc_rx_buff_failed++; | |
723 | break; | |
724 | } | |
725 | ||
bc7f75fa | 726 | buffer_info->skb = skb; |
0be3f55f | 727 | buffer_info->dma = dma_map_single(&pdev->dev, skb->data, |
bc7f75fa | 728 | adapter->rx_ps_bsize0, |
0be3f55f NN |
729 | DMA_FROM_DEVICE); |
730 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) { | |
af667a29 | 731 | dev_err(&pdev->dev, "Rx DMA map failed\n"); |
bc7f75fa AK |
732 | adapter->rx_dma_failed++; |
733 | /* cleanup skb */ | |
734 | dev_kfree_skb_any(skb); | |
735 | buffer_info->skb = NULL; | |
736 | break; | |
737 | } | |
738 | ||
739 | rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); | |
740 | ||
50849d79 TH |
741 | if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) { |
742 | /* | |
743 | * Force memory writes to complete before letting h/w | |
744 | * know there are new descriptors to fetch. (Only | |
745 | * applicable for weak-ordered memory model archs, | |
746 | * such as IA-64). | |
747 | */ | |
748 | wmb(); | |
c6e7f51e BA |
749 | if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) |
750 | e1000e_update_rdt_wa(adapter, i << 1); | |
751 | else | |
752 | writel(i << 1, | |
753 | adapter->hw.hw_addr + rx_ring->tail); | |
50849d79 TH |
754 | } |
755 | ||
bc7f75fa AK |
756 | i++; |
757 | if (i == rx_ring->count) | |
758 | i = 0; | |
759 | buffer_info = &rx_ring->buffer_info[i]; | |
760 | } | |
761 | ||
762 | no_buffers: | |
50849d79 | 763 | rx_ring->next_to_use = i; |
bc7f75fa AK |
764 | } |
765 | ||
97ac8cae BA |
766 | /** |
767 | * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers | |
768 | * @adapter: address of board private structure | |
97ac8cae BA |
769 | * @cleaned_count: number of buffers to allocate this pass |
770 | **/ | |
771 | ||
772 | static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, | |
c2fed996 | 773 | int cleaned_count, gfp_t gfp) |
97ac8cae BA |
774 | { |
775 | struct net_device *netdev = adapter->netdev; | |
776 | struct pci_dev *pdev = adapter->pdev; | |
5f450212 | 777 | union e1000_rx_desc_extended *rx_desc; |
97ac8cae BA |
778 | struct e1000_ring *rx_ring = adapter->rx_ring; |
779 | struct e1000_buffer *buffer_info; | |
780 | struct sk_buff *skb; | |
781 | unsigned int i; | |
89d71a66 | 782 | unsigned int bufsz = 256 - 16 /* for skb_reserve */; |
97ac8cae BA |
783 | |
784 | i = rx_ring->next_to_use; | |
785 | buffer_info = &rx_ring->buffer_info[i]; | |
786 | ||
787 | while (cleaned_count--) { | |
788 | skb = buffer_info->skb; | |
789 | if (skb) { | |
790 | skb_trim(skb, 0); | |
791 | goto check_page; | |
792 | } | |
793 | ||
c2fed996 | 794 | skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp); |
97ac8cae BA |
795 | if (unlikely(!skb)) { |
796 | /* Better luck next round */ | |
797 | adapter->alloc_rx_buff_failed++; | |
798 | break; | |
799 | } | |
800 | ||
97ac8cae BA |
801 | buffer_info->skb = skb; |
802 | check_page: | |
803 | /* allocate a new page if necessary */ | |
804 | if (!buffer_info->page) { | |
c2fed996 | 805 | buffer_info->page = alloc_page(gfp); |
97ac8cae BA |
806 | if (unlikely(!buffer_info->page)) { |
807 | adapter->alloc_rx_buff_failed++; | |
808 | break; | |
809 | } | |
810 | } | |
811 | ||
812 | if (!buffer_info->dma) | |
0be3f55f | 813 | buffer_info->dma = dma_map_page(&pdev->dev, |
97ac8cae BA |
814 | buffer_info->page, 0, |
815 | PAGE_SIZE, | |
0be3f55f | 816 | DMA_FROM_DEVICE); |
97ac8cae | 817 | |
5f450212 BA |
818 | rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); |
819 | rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); | |
97ac8cae BA |
820 | |
821 | if (unlikely(++i == rx_ring->count)) | |
822 | i = 0; | |
823 | buffer_info = &rx_ring->buffer_info[i]; | |
824 | } | |
825 | ||
826 | if (likely(rx_ring->next_to_use != i)) { | |
827 | rx_ring->next_to_use = i; | |
828 | if (unlikely(i-- == 0)) | |
829 | i = (rx_ring->count - 1); | |
830 | ||
831 | /* Force memory writes to complete before letting h/w | |
832 | * know there are new descriptors to fetch. (Only | |
833 | * applicable for weak-ordered memory model archs, | |
834 | * such as IA-64). */ | |
835 | wmb(); | |
c6e7f51e BA |
836 | if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) |
837 | e1000e_update_rdt_wa(adapter, i); | |
838 | else | |
839 | writel(i, adapter->hw.hw_addr + rx_ring->tail); | |
97ac8cae BA |
840 | } |
841 | } | |
842 | ||
bc7f75fa AK |
843 | /** |
844 | * e1000_clean_rx_irq - Send received data up the network stack; legacy | |
845 | * @adapter: board private structure | |
846 | * | |
847 | * the return value indicates whether actual cleaning was done, there | |
848 | * is no guarantee that everything was cleaned | |
849 | **/ | |
850 | static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, | |
851 | int *work_done, int work_to_do) | |
852 | { | |
853 | struct net_device *netdev = adapter->netdev; | |
854 | struct pci_dev *pdev = adapter->pdev; | |
3bb99fe2 | 855 | struct e1000_hw *hw = &adapter->hw; |
bc7f75fa | 856 | struct e1000_ring *rx_ring = adapter->rx_ring; |
5f450212 | 857 | union e1000_rx_desc_extended *rx_desc, *next_rxd; |
bc7f75fa | 858 | struct e1000_buffer *buffer_info, *next_buffer; |
5f450212 | 859 | u32 length, staterr; |
bc7f75fa AK |
860 | unsigned int i; |
861 | int cleaned_count = 0; | |
862 | bool cleaned = 0; | |
863 | unsigned int total_rx_bytes = 0, total_rx_packets = 0; | |
864 | ||
865 | i = rx_ring->next_to_clean; | |
5f450212 BA |
866 | rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); |
867 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
bc7f75fa AK |
868 | buffer_info = &rx_ring->buffer_info[i]; |
869 | ||
5f450212 | 870 | while (staterr & E1000_RXD_STAT_DD) { |
bc7f75fa | 871 | struct sk_buff *skb; |
bc7f75fa AK |
872 | |
873 | if (*work_done >= work_to_do) | |
874 | break; | |
875 | (*work_done)++; | |
2d0bb1c1 | 876 | rmb(); /* read descriptor and rx_buffer_info after status DD */ |
bc7f75fa | 877 | |
bc7f75fa AK |
878 | skb = buffer_info->skb; |
879 | buffer_info->skb = NULL; | |
880 | ||
881 | prefetch(skb->data - NET_IP_ALIGN); | |
882 | ||
883 | i++; | |
884 | if (i == rx_ring->count) | |
885 | i = 0; | |
5f450212 | 886 | next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); |
bc7f75fa AK |
887 | prefetch(next_rxd); |
888 | ||
889 | next_buffer = &rx_ring->buffer_info[i]; | |
890 | ||
891 | cleaned = 1; | |
892 | cleaned_count++; | |
0be3f55f | 893 | dma_unmap_single(&pdev->dev, |
bc7f75fa AK |
894 | buffer_info->dma, |
895 | adapter->rx_buffer_len, | |
0be3f55f | 896 | DMA_FROM_DEVICE); |
bc7f75fa AK |
897 | buffer_info->dma = 0; |
898 | ||
5f450212 | 899 | length = le16_to_cpu(rx_desc->wb.upper.length); |
bc7f75fa | 900 | |
b94b5028 JB |
901 | /* |
902 | * !EOP means multiple descriptors were used to store a single | |
903 | * packet, if that's the case we need to toss it. In fact, we | |
904 | * need to toss every packet with the EOP bit clear and the | |
905 | * next frame that _does_ have the EOP bit set, as it is by | |
906 | * definition only a frame fragment | |
907 | */ | |
5f450212 | 908 | if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) |
b94b5028 JB |
909 | adapter->flags2 |= FLAG2_IS_DISCARDING; |
910 | ||
911 | if (adapter->flags2 & FLAG2_IS_DISCARDING) { | |
bc7f75fa | 912 | /* All receives must fit into a single buffer */ |
3bb99fe2 | 913 | e_dbg("Receive packet consumed multiple buffers\n"); |
bc7f75fa AK |
914 | /* recycle */ |
915 | buffer_info->skb = skb; | |
5f450212 | 916 | if (staterr & E1000_RXD_STAT_EOP) |
b94b5028 | 917 | adapter->flags2 &= ~FLAG2_IS_DISCARDING; |
bc7f75fa AK |
918 | goto next_desc; |
919 | } | |
920 | ||
5f450212 | 921 | if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { |
bc7f75fa AK |
922 | /* recycle */ |
923 | buffer_info->skb = skb; | |
924 | goto next_desc; | |
925 | } | |
926 | ||
eb7c3adb JK |
927 | /* adjust length to remove Ethernet CRC */ |
928 | if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) | |
929 | length -= 4; | |
930 | ||
bc7f75fa AK |
931 | total_rx_bytes += length; |
932 | total_rx_packets++; | |
933 | ||
ad68076e BA |
934 | /* |
935 | * code added for copybreak, this should improve | |
bc7f75fa | 936 | * performance for small packets with large amounts |
ad68076e BA |
937 | * of reassembly being done in the stack |
938 | */ | |
bc7f75fa AK |
939 | if (length < copybreak) { |
940 | struct sk_buff *new_skb = | |
89d71a66 | 941 | netdev_alloc_skb_ip_align(netdev, length); |
bc7f75fa | 942 | if (new_skb) { |
808ff676 BA |
943 | skb_copy_to_linear_data_offset(new_skb, |
944 | -NET_IP_ALIGN, | |
945 | (skb->data - | |
946 | NET_IP_ALIGN), | |
947 | (length + | |
948 | NET_IP_ALIGN)); | |
bc7f75fa AK |
949 | /* save the skb in buffer_info as good */ |
950 | buffer_info->skb = skb; | |
951 | skb = new_skb; | |
952 | } | |
953 | /* else just continue with the old one */ | |
954 | } | |
955 | /* end copybreak code */ | |
956 | skb_put(skb, length); | |
957 | ||
958 | /* Receive Checksum Offload */ | |
5f450212 BA |
959 | e1000_rx_checksum(adapter, staterr, |
960 | le16_to_cpu(rx_desc->wb.lower.hi_dword. | |
961 | csum_ip.csum), skb); | |
bc7f75fa | 962 | |
5f450212 BA |
963 | e1000_receive_skb(adapter, netdev, skb, staterr, |
964 | rx_desc->wb.upper.vlan); | |
bc7f75fa AK |
965 | |
966 | next_desc: | |
5f450212 | 967 | rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); |
bc7f75fa AK |
968 | |
969 | /* return some buffers to hardware, one at a time is too slow */ | |
970 | if (cleaned_count >= E1000_RX_BUFFER_WRITE) { | |
c2fed996 JK |
971 | adapter->alloc_rx_buf(adapter, cleaned_count, |
972 | GFP_ATOMIC); | |
bc7f75fa AK |
973 | cleaned_count = 0; |
974 | } | |
975 | ||
976 | /* use prefetched values */ | |
977 | rx_desc = next_rxd; | |
978 | buffer_info = next_buffer; | |
5f450212 BA |
979 | |
980 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
bc7f75fa AK |
981 | } |
982 | rx_ring->next_to_clean = i; | |
983 | ||
984 | cleaned_count = e1000_desc_unused(rx_ring); | |
985 | if (cleaned_count) | |
c2fed996 | 986 | adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC); |
bc7f75fa | 987 | |
bc7f75fa | 988 | adapter->total_rx_bytes += total_rx_bytes; |
7c25769f | 989 | adapter->total_rx_packets += total_rx_packets; |
bc7f75fa AK |
990 | return cleaned; |
991 | } | |
992 | ||
bc7f75fa AK |
993 | static void e1000_put_txbuf(struct e1000_adapter *adapter, |
994 | struct e1000_buffer *buffer_info) | |
995 | { | |
03b1320d AD |
996 | if (buffer_info->dma) { |
997 | if (buffer_info->mapped_as_page) | |
0be3f55f NN |
998 | dma_unmap_page(&adapter->pdev->dev, buffer_info->dma, |
999 | buffer_info->length, DMA_TO_DEVICE); | |
03b1320d | 1000 | else |
0be3f55f NN |
1001 | dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, |
1002 | buffer_info->length, DMA_TO_DEVICE); | |
03b1320d AD |
1003 | buffer_info->dma = 0; |
1004 | } | |
bc7f75fa AK |
1005 | if (buffer_info->skb) { |
1006 | dev_kfree_skb_any(buffer_info->skb); | |
1007 | buffer_info->skb = NULL; | |
1008 | } | |
1b7719c4 | 1009 | buffer_info->time_stamp = 0; |
bc7f75fa AK |
1010 | } |
1011 | ||
41cec6f1 | 1012 | static void e1000_print_hw_hang(struct work_struct *work) |
bc7f75fa | 1013 | { |
41cec6f1 BA |
1014 | struct e1000_adapter *adapter = container_of(work, |
1015 | struct e1000_adapter, | |
1016 | print_hang_task); | |
bc7f75fa AK |
1017 | struct e1000_ring *tx_ring = adapter->tx_ring; |
1018 | unsigned int i = tx_ring->next_to_clean; | |
1019 | unsigned int eop = tx_ring->buffer_info[i].next_to_watch; | |
1020 | struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
41cec6f1 BA |
1021 | struct e1000_hw *hw = &adapter->hw; |
1022 | u16 phy_status, phy_1000t_status, phy_ext_status; | |
1023 | u16 pci_status; | |
1024 | ||
615b32af JB |
1025 | if (test_bit(__E1000_DOWN, &adapter->state)) |
1026 | return; | |
1027 | ||
41cec6f1 BA |
1028 | e1e_rphy(hw, PHY_STATUS, &phy_status); |
1029 | e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status); | |
1030 | e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status); | |
bc7f75fa | 1031 | |
41cec6f1 BA |
1032 | pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status); |
1033 | ||
1034 | /* detected Hardware unit hang */ | |
1035 | e_err("Detected Hardware Unit Hang:\n" | |
44defeb3 JK |
1036 | " TDH <%x>\n" |
1037 | " TDT <%x>\n" | |
1038 | " next_to_use <%x>\n" | |
1039 | " next_to_clean <%x>\n" | |
1040 | "buffer_info[next_to_clean]:\n" | |
1041 | " time_stamp <%lx>\n" | |
1042 | " next_to_watch <%x>\n" | |
1043 | " jiffies <%lx>\n" | |
41cec6f1 BA |
1044 | " next_to_watch.status <%x>\n" |
1045 | "MAC Status <%x>\n" | |
1046 | "PHY Status <%x>\n" | |
1047 | "PHY 1000BASE-T Status <%x>\n" | |
1048 | "PHY Extended Status <%x>\n" | |
1049 | "PCI Status <%x>\n", | |
44defeb3 JK |
1050 | readl(adapter->hw.hw_addr + tx_ring->head), |
1051 | readl(adapter->hw.hw_addr + tx_ring->tail), | |
1052 | tx_ring->next_to_use, | |
1053 | tx_ring->next_to_clean, | |
1054 | tx_ring->buffer_info[eop].time_stamp, | |
1055 | eop, | |
1056 | jiffies, | |
41cec6f1 BA |
1057 | eop_desc->upper.fields.status, |
1058 | er32(STATUS), | |
1059 | phy_status, | |
1060 | phy_1000t_status, | |
1061 | phy_ext_status, | |
1062 | pci_status); | |
bc7f75fa AK |
1063 | } |
1064 | ||
1065 | /** | |
1066 | * e1000_clean_tx_irq - Reclaim resources after transmit completes | |
1067 | * @adapter: board private structure | |
1068 | * | |
1069 | * the return value indicates whether actual cleaning was done, there | |
1070 | * is no guarantee that everything was cleaned | |
1071 | **/ | |
1072 | static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) | |
1073 | { | |
1074 | struct net_device *netdev = adapter->netdev; | |
1075 | struct e1000_hw *hw = &adapter->hw; | |
1076 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
1077 | struct e1000_tx_desc *tx_desc, *eop_desc; | |
1078 | struct e1000_buffer *buffer_info; | |
1079 | unsigned int i, eop; | |
1080 | unsigned int count = 0; | |
bc7f75fa AK |
1081 | unsigned int total_tx_bytes = 0, total_tx_packets = 0; |
1082 | ||
1083 | i = tx_ring->next_to_clean; | |
1084 | eop = tx_ring->buffer_info[i].next_to_watch; | |
1085 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
1086 | ||
12d04a3c AD |
1087 | while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) && |
1088 | (count < tx_ring->count)) { | |
a86043c2 | 1089 | bool cleaned = false; |
2d0bb1c1 | 1090 | rmb(); /* read buffer_info after eop_desc */ |
a86043c2 | 1091 | for (; !cleaned; count++) { |
bc7f75fa AK |
1092 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
1093 | buffer_info = &tx_ring->buffer_info[i]; | |
1094 | cleaned = (i == eop); | |
1095 | ||
1096 | if (cleaned) { | |
9ed318d5 TH |
1097 | total_tx_packets += buffer_info->segs; |
1098 | total_tx_bytes += buffer_info->bytecount; | |
bc7f75fa AK |
1099 | } |
1100 | ||
1101 | e1000_put_txbuf(adapter, buffer_info); | |
1102 | tx_desc->upper.data = 0; | |
1103 | ||
1104 | i++; | |
1105 | if (i == tx_ring->count) | |
1106 | i = 0; | |
1107 | } | |
1108 | ||
dac87619 TL |
1109 | if (i == tx_ring->next_to_use) |
1110 | break; | |
bc7f75fa AK |
1111 | eop = tx_ring->buffer_info[i].next_to_watch; |
1112 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | |
bc7f75fa AK |
1113 | } |
1114 | ||
1115 | tx_ring->next_to_clean = i; | |
1116 | ||
1117 | #define TX_WAKE_THRESHOLD 32 | |
a86043c2 JB |
1118 | if (count && netif_carrier_ok(netdev) && |
1119 | e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) { | |
bc7f75fa AK |
1120 | /* Make sure that anybody stopping the queue after this |
1121 | * sees the new next_to_clean. | |
1122 | */ | |
1123 | smp_mb(); | |
1124 | ||
1125 | if (netif_queue_stopped(netdev) && | |
1126 | !(test_bit(__E1000_DOWN, &adapter->state))) { | |
1127 | netif_wake_queue(netdev); | |
1128 | ++adapter->restart_queue; | |
1129 | } | |
1130 | } | |
1131 | ||
1132 | if (adapter->detect_tx_hung) { | |
41cec6f1 BA |
1133 | /* |
1134 | * Detect a transmit hang in hardware, this serializes the | |
1135 | * check with the clearing of time_stamp and movement of i | |
1136 | */ | |
bc7f75fa | 1137 | adapter->detect_tx_hung = 0; |
12d04a3c AD |
1138 | if (tx_ring->buffer_info[i].time_stamp && |
1139 | time_after(jiffies, tx_ring->buffer_info[i].time_stamp | |
8e95a202 JP |
1140 | + (adapter->tx_timeout_factor * HZ)) && |
1141 | !(er32(STATUS) & E1000_STATUS_TXOFF)) { | |
41cec6f1 | 1142 | schedule_work(&adapter->print_hang_task); |
bc7f75fa AK |
1143 | netif_stop_queue(netdev); |
1144 | } | |
1145 | } | |
1146 | adapter->total_tx_bytes += total_tx_bytes; | |
1147 | adapter->total_tx_packets += total_tx_packets; | |
807540ba | 1148 | return count < tx_ring->count; |
bc7f75fa AK |
1149 | } |
1150 | ||
bc7f75fa AK |
1151 | /** |
1152 | * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split | |
1153 | * @adapter: board private structure | |
1154 | * | |
1155 | * the return value indicates whether actual cleaning was done, there | |
1156 | * is no guarantee that everything was cleaned | |
1157 | **/ | |
1158 | static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |
1159 | int *work_done, int work_to_do) | |
1160 | { | |
3bb99fe2 | 1161 | struct e1000_hw *hw = &adapter->hw; |
bc7f75fa AK |
1162 | union e1000_rx_desc_packet_split *rx_desc, *next_rxd; |
1163 | struct net_device *netdev = adapter->netdev; | |
1164 | struct pci_dev *pdev = adapter->pdev; | |
1165 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
1166 | struct e1000_buffer *buffer_info, *next_buffer; | |
1167 | struct e1000_ps_page *ps_page; | |
1168 | struct sk_buff *skb; | |
1169 | unsigned int i, j; | |
1170 | u32 length, staterr; | |
1171 | int cleaned_count = 0; | |
1172 | bool cleaned = 0; | |
1173 | unsigned int total_rx_bytes = 0, total_rx_packets = 0; | |
1174 | ||
1175 | i = rx_ring->next_to_clean; | |
1176 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | |
1177 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); | |
1178 | buffer_info = &rx_ring->buffer_info[i]; | |
1179 | ||
1180 | while (staterr & E1000_RXD_STAT_DD) { | |
1181 | if (*work_done >= work_to_do) | |
1182 | break; | |
1183 | (*work_done)++; | |
1184 | skb = buffer_info->skb; | |
2d0bb1c1 | 1185 | rmb(); /* read descriptor and rx_buffer_info after status DD */ |
bc7f75fa AK |
1186 | |
1187 | /* in the packet split case this is header only */ | |
1188 | prefetch(skb->data - NET_IP_ALIGN); | |
1189 | ||
1190 | i++; | |
1191 | if (i == rx_ring->count) | |
1192 | i = 0; | |
1193 | next_rxd = E1000_RX_DESC_PS(*rx_ring, i); | |
1194 | prefetch(next_rxd); | |
1195 | ||
1196 | next_buffer = &rx_ring->buffer_info[i]; | |
1197 | ||
1198 | cleaned = 1; | |
1199 | cleaned_count++; | |
0be3f55f | 1200 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
af667a29 | 1201 | adapter->rx_ps_bsize0, DMA_FROM_DEVICE); |
bc7f75fa AK |
1202 | buffer_info->dma = 0; |
1203 | ||
af667a29 | 1204 | /* see !EOP comment in other Rx routine */ |
b94b5028 JB |
1205 | if (!(staterr & E1000_RXD_STAT_EOP)) |
1206 | adapter->flags2 |= FLAG2_IS_DISCARDING; | |
1207 | ||
1208 | if (adapter->flags2 & FLAG2_IS_DISCARDING) { | |
ef456f85 | 1209 | e_dbg("Packet Split buffers didn't pick up the full packet\n"); |
bc7f75fa | 1210 | dev_kfree_skb_irq(skb); |
b94b5028 JB |
1211 | if (staterr & E1000_RXD_STAT_EOP) |
1212 | adapter->flags2 &= ~FLAG2_IS_DISCARDING; | |
bc7f75fa AK |
1213 | goto next_desc; |
1214 | } | |
1215 | ||
1216 | if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { | |
1217 | dev_kfree_skb_irq(skb); | |
1218 | goto next_desc; | |
1219 | } | |
1220 | ||
1221 | length = le16_to_cpu(rx_desc->wb.middle.length0); | |
1222 | ||
1223 | if (!length) { | |
ef456f85 | 1224 | e_dbg("Last part of the packet spanning multiple descriptors\n"); |
bc7f75fa AK |
1225 | dev_kfree_skb_irq(skb); |
1226 | goto next_desc; | |
1227 | } | |
1228 | ||
1229 | /* Good Receive */ | |
1230 | skb_put(skb, length); | |
1231 | ||
1232 | { | |
ad68076e BA |
1233 | /* |
1234 | * this looks ugly, but it seems compiler issues make it | |
1235 | * more efficient than reusing j | |
1236 | */ | |
bc7f75fa AK |
1237 | int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); |
1238 | ||
ad68076e BA |
1239 | /* |
1240 | * page alloc/put takes too long and effects small packet | |
1241 | * throughput, so unsplit small packets and save the alloc/put | |
1242 | * only valid in softirq (napi) context to call kmap_* | |
1243 | */ | |
bc7f75fa AK |
1244 | if (l1 && (l1 <= copybreak) && |
1245 | ((length + l1) <= adapter->rx_ps_bsize0)) { | |
1246 | u8 *vaddr; | |
1247 | ||
47f44e40 | 1248 | ps_page = &buffer_info->ps_pages[0]; |
bc7f75fa | 1249 | |
ad68076e BA |
1250 | /* |
1251 | * there is no documentation about how to call | |
bc7f75fa | 1252 | * kmap_atomic, so we can't hold the mapping |
ad68076e BA |
1253 | * very long |
1254 | */ | |
0be3f55f NN |
1255 | dma_sync_single_for_cpu(&pdev->dev, ps_page->dma, |
1256 | PAGE_SIZE, DMA_FROM_DEVICE); | |
bc7f75fa AK |
1257 | vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ); |
1258 | memcpy(skb_tail_pointer(skb), vaddr, l1); | |
1259 | kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); | |
0be3f55f NN |
1260 | dma_sync_single_for_device(&pdev->dev, ps_page->dma, |
1261 | PAGE_SIZE, DMA_FROM_DEVICE); | |
140a7480 | 1262 | |
eb7c3adb JK |
1263 | /* remove the CRC */ |
1264 | if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) | |
1265 | l1 -= 4; | |
1266 | ||
bc7f75fa AK |
1267 | skb_put(skb, l1); |
1268 | goto copydone; | |
1269 | } /* if */ | |
1270 | } | |
1271 | ||
1272 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { | |
1273 | length = le16_to_cpu(rx_desc->wb.upper.length[j]); | |
1274 | if (!length) | |
1275 | break; | |
1276 | ||
47f44e40 | 1277 | ps_page = &buffer_info->ps_pages[j]; |
0be3f55f NN |
1278 | dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, |
1279 | DMA_FROM_DEVICE); | |
bc7f75fa AK |
1280 | ps_page->dma = 0; |
1281 | skb_fill_page_desc(skb, j, ps_page->page, 0, length); | |
1282 | ps_page->page = NULL; | |
1283 | skb->len += length; | |
1284 | skb->data_len += length; | |
98a045d7 | 1285 | skb->truesize += PAGE_SIZE; |
bc7f75fa AK |
1286 | } |
1287 | ||
eb7c3adb JK |
1288 | /* strip the ethernet crc, problem is we're using pages now so |
1289 | * this whole operation can get a little cpu intensive | |
1290 | */ | |
1291 | if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) | |
1292 | pskb_trim(skb, skb->len - 4); | |
1293 | ||
bc7f75fa AK |
1294 | copydone: |
1295 | total_rx_bytes += skb->len; | |
1296 | total_rx_packets++; | |
1297 | ||
1298 | e1000_rx_checksum(adapter, staterr, le16_to_cpu( | |
1299 | rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); | |
1300 | ||
1301 | if (rx_desc->wb.upper.header_status & | |
1302 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) | |
1303 | adapter->rx_hdr_split++; | |
1304 | ||
1305 | e1000_receive_skb(adapter, netdev, skb, | |
1306 | staterr, rx_desc->wb.middle.vlan); | |
1307 | ||
1308 | next_desc: | |
1309 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); | |
1310 | buffer_info->skb = NULL; | |
1311 | ||
1312 | /* return some buffers to hardware, one at a time is too slow */ | |
1313 | if (cleaned_count >= E1000_RX_BUFFER_WRITE) { | |
c2fed996 JK |
1314 | adapter->alloc_rx_buf(adapter, cleaned_count, |
1315 | GFP_ATOMIC); | |
bc7f75fa AK |
1316 | cleaned_count = 0; |
1317 | } | |
1318 | ||
1319 | /* use prefetched values */ | |
1320 | rx_desc = next_rxd; | |
1321 | buffer_info = next_buffer; | |
1322 | ||
1323 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); | |
1324 | } | |
1325 | rx_ring->next_to_clean = i; | |
1326 | ||
1327 | cleaned_count = e1000_desc_unused(rx_ring); | |
1328 | if (cleaned_count) | |
c2fed996 | 1329 | adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC); |
bc7f75fa | 1330 | |
bc7f75fa | 1331 | adapter->total_rx_bytes += total_rx_bytes; |
7c25769f | 1332 | adapter->total_rx_packets += total_rx_packets; |
bc7f75fa AK |
1333 | return cleaned; |
1334 | } | |
1335 | ||
97ac8cae BA |
1336 | /** |
1337 | * e1000_consume_page - helper function | |
1338 | **/ | |
1339 | static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, | |
1340 | u16 length) | |
1341 | { | |
1342 | bi->page = NULL; | |
1343 | skb->len += length; | |
1344 | skb->data_len += length; | |
98a045d7 | 1345 | skb->truesize += PAGE_SIZE; |
97ac8cae BA |
1346 | } |
1347 | ||
1348 | /** | |
1349 | * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy | |
1350 | * @adapter: board private structure | |
1351 | * | |
1352 | * the return value indicates whether actual cleaning was done, there | |
1353 | * is no guarantee that everything was cleaned | |
1354 | **/ | |
1355 | ||
1356 | static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, | |
1357 | int *work_done, int work_to_do) | |
1358 | { | |
1359 | struct net_device *netdev = adapter->netdev; | |
1360 | struct pci_dev *pdev = adapter->pdev; | |
1361 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
5f450212 | 1362 | union e1000_rx_desc_extended *rx_desc, *next_rxd; |
97ac8cae | 1363 | struct e1000_buffer *buffer_info, *next_buffer; |
5f450212 | 1364 | u32 length, staterr; |
97ac8cae BA |
1365 | unsigned int i; |
1366 | int cleaned_count = 0; | |
1367 | bool cleaned = false; | |
1368 | unsigned int total_rx_bytes=0, total_rx_packets=0; | |
1369 | ||
1370 | i = rx_ring->next_to_clean; | |
5f450212 BA |
1371 | rx_desc = E1000_RX_DESC_EXT(*rx_ring, i); |
1372 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
97ac8cae BA |
1373 | buffer_info = &rx_ring->buffer_info[i]; |
1374 | ||
5f450212 | 1375 | while (staterr & E1000_RXD_STAT_DD) { |
97ac8cae | 1376 | struct sk_buff *skb; |
97ac8cae BA |
1377 | |
1378 | if (*work_done >= work_to_do) | |
1379 | break; | |
1380 | (*work_done)++; | |
2d0bb1c1 | 1381 | rmb(); /* read descriptor and rx_buffer_info after status DD */ |
97ac8cae | 1382 | |
97ac8cae BA |
1383 | skb = buffer_info->skb; |
1384 | buffer_info->skb = NULL; | |
1385 | ||
1386 | ++i; | |
1387 | if (i == rx_ring->count) | |
1388 | i = 0; | |
5f450212 | 1389 | next_rxd = E1000_RX_DESC_EXT(*rx_ring, i); |
97ac8cae BA |
1390 | prefetch(next_rxd); |
1391 | ||
1392 | next_buffer = &rx_ring->buffer_info[i]; | |
1393 | ||
1394 | cleaned = true; | |
1395 | cleaned_count++; | |
0be3f55f NN |
1396 | dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE, |
1397 | DMA_FROM_DEVICE); | |
97ac8cae BA |
1398 | buffer_info->dma = 0; |
1399 | ||
5f450212 | 1400 | length = le16_to_cpu(rx_desc->wb.upper.length); |
97ac8cae BA |
1401 | |
1402 | /* errors is only valid for DD + EOP descriptors */ | |
5f450212 BA |
1403 | if (unlikely((staterr & E1000_RXD_STAT_EOP) && |
1404 | (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK))) { | |
1405 | /* recycle both page and skb */ | |
1406 | buffer_info->skb = skb; | |
1407 | /* an error means any chain goes out the window too */ | |
1408 | if (rx_ring->rx_skb_top) | |
1409 | dev_kfree_skb_irq(rx_ring->rx_skb_top); | |
1410 | rx_ring->rx_skb_top = NULL; | |
1411 | goto next_desc; | |
97ac8cae BA |
1412 | } |
1413 | ||
f0f1a172 | 1414 | #define rxtop (rx_ring->rx_skb_top) |
5f450212 | 1415 | if (!(staterr & E1000_RXD_STAT_EOP)) { |
97ac8cae BA |
1416 | /* this descriptor is only the beginning (or middle) */ |
1417 | if (!rxtop) { | |
1418 | /* this is the beginning of a chain */ | |
1419 | rxtop = skb; | |
1420 | skb_fill_page_desc(rxtop, 0, buffer_info->page, | |
1421 | 0, length); | |
1422 | } else { | |
1423 | /* this is the middle of a chain */ | |
1424 | skb_fill_page_desc(rxtop, | |
1425 | skb_shinfo(rxtop)->nr_frags, | |
1426 | buffer_info->page, 0, length); | |
1427 | /* re-use the skb, only consumed the page */ | |
1428 | buffer_info->skb = skb; | |
1429 | } | |
1430 | e1000_consume_page(buffer_info, rxtop, length); | |
1431 | goto next_desc; | |
1432 | } else { | |
1433 | if (rxtop) { | |
1434 | /* end of the chain */ | |
1435 | skb_fill_page_desc(rxtop, | |
1436 | skb_shinfo(rxtop)->nr_frags, | |
1437 | buffer_info->page, 0, length); | |
1438 | /* re-use the current skb, we only consumed the | |
1439 | * page */ | |
1440 | buffer_info->skb = skb; | |
1441 | skb = rxtop; | |
1442 | rxtop = NULL; | |
1443 | e1000_consume_page(buffer_info, skb, length); | |
1444 | } else { | |
1445 | /* no chain, got EOP, this buf is the packet | |
1446 | * copybreak to save the put_page/alloc_page */ | |
1447 | if (length <= copybreak && | |
1448 | skb_tailroom(skb) >= length) { | |
1449 | u8 *vaddr; | |
1450 | vaddr = kmap_atomic(buffer_info->page, | |
1451 | KM_SKB_DATA_SOFTIRQ); | |
1452 | memcpy(skb_tail_pointer(skb), vaddr, | |
1453 | length); | |
1454 | kunmap_atomic(vaddr, | |
1455 | KM_SKB_DATA_SOFTIRQ); | |
1456 | /* re-use the page, so don't erase | |
1457 | * buffer_info->page */ | |
1458 | skb_put(skb, length); | |
1459 | } else { | |
1460 | skb_fill_page_desc(skb, 0, | |
1461 | buffer_info->page, 0, | |
1462 | length); | |
1463 | e1000_consume_page(buffer_info, skb, | |
1464 | length); | |
1465 | } | |
1466 | } | |
1467 | } | |
1468 | ||
1469 | /* Receive Checksum Offload XXX recompute due to CRC strip? */ | |
5f450212 BA |
1470 | e1000_rx_checksum(adapter, staterr, |
1471 | le16_to_cpu(rx_desc->wb.lower.hi_dword. | |
1472 | csum_ip.csum), skb); | |
97ac8cae BA |
1473 | |
1474 | /* probably a little skewed due to removing CRC */ | |
1475 | total_rx_bytes += skb->len; | |
1476 | total_rx_packets++; | |
1477 | ||
1478 | /* eth type trans needs skb->data to point to something */ | |
1479 | if (!pskb_may_pull(skb, ETH_HLEN)) { | |
44defeb3 | 1480 | e_err("pskb_may_pull failed.\n"); |
ef5ab89c | 1481 | dev_kfree_skb_irq(skb); |
97ac8cae BA |
1482 | goto next_desc; |
1483 | } | |
1484 | ||
5f450212 BA |
1485 | e1000_receive_skb(adapter, netdev, skb, staterr, |
1486 | rx_desc->wb.upper.vlan); | |
97ac8cae BA |
1487 | |
1488 | next_desc: | |
5f450212 | 1489 | rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF); |
97ac8cae BA |
1490 | |
1491 | /* return some buffers to hardware, one at a time is too slow */ | |
1492 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | |
c2fed996 JK |
1493 | adapter->alloc_rx_buf(adapter, cleaned_count, |
1494 | GFP_ATOMIC); | |
97ac8cae BA |
1495 | cleaned_count = 0; |
1496 | } | |
1497 | ||
1498 | /* use prefetched values */ | |
1499 | rx_desc = next_rxd; | |
1500 | buffer_info = next_buffer; | |
5f450212 BA |
1501 | |
1502 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
97ac8cae BA |
1503 | } |
1504 | rx_ring->next_to_clean = i; | |
1505 | ||
1506 | cleaned_count = e1000_desc_unused(rx_ring); | |
1507 | if (cleaned_count) | |
c2fed996 | 1508 | adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC); |
97ac8cae BA |
1509 | |
1510 | adapter->total_rx_bytes += total_rx_bytes; | |
1511 | adapter->total_rx_packets += total_rx_packets; | |
97ac8cae BA |
1512 | return cleaned; |
1513 | } | |
1514 | ||
bc7f75fa AK |
1515 | /** |
1516 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | |
1517 | * @adapter: board private structure | |
1518 | **/ | |
1519 | static void e1000_clean_rx_ring(struct e1000_adapter *adapter) | |
1520 | { | |
1521 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
1522 | struct e1000_buffer *buffer_info; | |
1523 | struct e1000_ps_page *ps_page; | |
1524 | struct pci_dev *pdev = adapter->pdev; | |
bc7f75fa AK |
1525 | unsigned int i, j; |
1526 | ||
1527 | /* Free all the Rx ring sk_buffs */ | |
1528 | for (i = 0; i < rx_ring->count; i++) { | |
1529 | buffer_info = &rx_ring->buffer_info[i]; | |
1530 | if (buffer_info->dma) { | |
1531 | if (adapter->clean_rx == e1000_clean_rx_irq) | |
0be3f55f | 1532 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
bc7f75fa | 1533 | adapter->rx_buffer_len, |
0be3f55f | 1534 | DMA_FROM_DEVICE); |
97ac8cae | 1535 | else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) |
0be3f55f | 1536 | dma_unmap_page(&pdev->dev, buffer_info->dma, |
97ac8cae | 1537 | PAGE_SIZE, |
0be3f55f | 1538 | DMA_FROM_DEVICE); |
bc7f75fa | 1539 | else if (adapter->clean_rx == e1000_clean_rx_irq_ps) |
0be3f55f | 1540 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
bc7f75fa | 1541 | adapter->rx_ps_bsize0, |
0be3f55f | 1542 | DMA_FROM_DEVICE); |
bc7f75fa AK |
1543 | buffer_info->dma = 0; |
1544 | } | |
1545 | ||
97ac8cae BA |
1546 | if (buffer_info->page) { |
1547 | put_page(buffer_info->page); | |
1548 | buffer_info->page = NULL; | |
1549 | } | |
1550 | ||
bc7f75fa AK |
1551 | if (buffer_info->skb) { |
1552 | dev_kfree_skb(buffer_info->skb); | |
1553 | buffer_info->skb = NULL; | |
1554 | } | |
1555 | ||
1556 | for (j = 0; j < PS_PAGE_BUFFERS; j++) { | |
47f44e40 | 1557 | ps_page = &buffer_info->ps_pages[j]; |
bc7f75fa AK |
1558 | if (!ps_page->page) |
1559 | break; | |
0be3f55f NN |
1560 | dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE, |
1561 | DMA_FROM_DEVICE); | |
bc7f75fa AK |
1562 | ps_page->dma = 0; |
1563 | put_page(ps_page->page); | |
1564 | ps_page->page = NULL; | |
1565 | } | |
1566 | } | |
1567 | ||
1568 | /* there also may be some cached data from a chained receive */ | |
1569 | if (rx_ring->rx_skb_top) { | |
1570 | dev_kfree_skb(rx_ring->rx_skb_top); | |
1571 | rx_ring->rx_skb_top = NULL; | |
1572 | } | |
1573 | ||
bc7f75fa AK |
1574 | /* Zero out the descriptor ring */ |
1575 | memset(rx_ring->desc, 0, rx_ring->size); | |
1576 | ||
1577 | rx_ring->next_to_clean = 0; | |
1578 | rx_ring->next_to_use = 0; | |
b94b5028 | 1579 | adapter->flags2 &= ~FLAG2_IS_DISCARDING; |
bc7f75fa AK |
1580 | |
1581 | writel(0, adapter->hw.hw_addr + rx_ring->head); | |
1582 | writel(0, adapter->hw.hw_addr + rx_ring->tail); | |
1583 | } | |
1584 | ||
a8f88ff5 JB |
1585 | static void e1000e_downshift_workaround(struct work_struct *work) |
1586 | { | |
1587 | struct e1000_adapter *adapter = container_of(work, | |
1588 | struct e1000_adapter, downshift_task); | |
1589 | ||
615b32af JB |
1590 | if (test_bit(__E1000_DOWN, &adapter->state)) |
1591 | return; | |
1592 | ||
a8f88ff5 JB |
1593 | e1000e_gig_downshift_workaround_ich8lan(&adapter->hw); |
1594 | } | |
1595 | ||
bc7f75fa AK |
1596 | /** |
1597 | * e1000_intr_msi - Interrupt Handler | |
1598 | * @irq: interrupt number | |
1599 | * @data: pointer to a network interface device structure | |
1600 | **/ | |
1601 | static irqreturn_t e1000_intr_msi(int irq, void *data) | |
1602 | { | |
1603 | struct net_device *netdev = data; | |
1604 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1605 | struct e1000_hw *hw = &adapter->hw; | |
1606 | u32 icr = er32(ICR); | |
1607 | ||
ad68076e BA |
1608 | /* |
1609 | * read ICR disables interrupts using IAM | |
1610 | */ | |
bc7f75fa | 1611 | |
573cca8c | 1612 | if (icr & E1000_ICR_LSC) { |
bc7f75fa | 1613 | hw->mac.get_link_status = 1; |
ad68076e BA |
1614 | /* |
1615 | * ICH8 workaround-- Call gig speed drop workaround on cable | |
1616 | * disconnect (LSC) before accessing any PHY registers | |
1617 | */ | |
bc7f75fa AK |
1618 | if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && |
1619 | (!(er32(STATUS) & E1000_STATUS_LU))) | |
a8f88ff5 | 1620 | schedule_work(&adapter->downshift_task); |
bc7f75fa | 1621 | |
ad68076e BA |
1622 | /* |
1623 | * 80003ES2LAN workaround-- For packet buffer work-around on | |
bc7f75fa | 1624 | * link down event; disable receives here in the ISR and reset |
ad68076e BA |
1625 | * adapter in watchdog |
1626 | */ | |
bc7f75fa AK |
1627 | if (netif_carrier_ok(netdev) && |
1628 | adapter->flags & FLAG_RX_NEEDS_RESTART) { | |
1629 | /* disable receives */ | |
1630 | u32 rctl = er32(RCTL); | |
1631 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
318a94d6 | 1632 | adapter->flags |= FLAG_RX_RESTART_NOW; |
bc7f75fa AK |
1633 | } |
1634 | /* guard against interrupt when we're going down */ | |
1635 | if (!test_bit(__E1000_DOWN, &adapter->state)) | |
1636 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
1637 | } | |
1638 | ||
288379f0 | 1639 | if (napi_schedule_prep(&adapter->napi)) { |
bc7f75fa AK |
1640 | adapter->total_tx_bytes = 0; |
1641 | adapter->total_tx_packets = 0; | |
1642 | adapter->total_rx_bytes = 0; | |
1643 | adapter->total_rx_packets = 0; | |
288379f0 | 1644 | __napi_schedule(&adapter->napi); |
bc7f75fa AK |
1645 | } |
1646 | ||
1647 | return IRQ_HANDLED; | |
1648 | } | |
1649 | ||
1650 | /** | |
1651 | * e1000_intr - Interrupt Handler | |
1652 | * @irq: interrupt number | |
1653 | * @data: pointer to a network interface device structure | |
1654 | **/ | |
1655 | static irqreturn_t e1000_intr(int irq, void *data) | |
1656 | { | |
1657 | struct net_device *netdev = data; | |
1658 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1659 | struct e1000_hw *hw = &adapter->hw; | |
bc7f75fa | 1660 | u32 rctl, icr = er32(ICR); |
4662e82b | 1661 | |
a68ea775 | 1662 | if (!icr || test_bit(__E1000_DOWN, &adapter->state)) |
bc7f75fa AK |
1663 | return IRQ_NONE; /* Not our interrupt */ |
1664 | ||
ad68076e BA |
1665 | /* |
1666 | * IMS will not auto-mask if INT_ASSERTED is not set, and if it is | |
1667 | * not set, then the adapter didn't send an interrupt | |
1668 | */ | |
bc7f75fa AK |
1669 | if (!(icr & E1000_ICR_INT_ASSERTED)) |
1670 | return IRQ_NONE; | |
1671 | ||
ad68076e BA |
1672 | /* |
1673 | * Interrupt Auto-Mask...upon reading ICR, | |
1674 | * interrupts are masked. No need for the | |
1675 | * IMC write | |
1676 | */ | |
bc7f75fa | 1677 | |
573cca8c | 1678 | if (icr & E1000_ICR_LSC) { |
bc7f75fa | 1679 | hw->mac.get_link_status = 1; |
ad68076e BA |
1680 | /* |
1681 | * ICH8 workaround-- Call gig speed drop workaround on cable | |
1682 | * disconnect (LSC) before accessing any PHY registers | |
1683 | */ | |
bc7f75fa AK |
1684 | if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) && |
1685 | (!(er32(STATUS) & E1000_STATUS_LU))) | |
a8f88ff5 | 1686 | schedule_work(&adapter->downshift_task); |
bc7f75fa | 1687 | |
ad68076e BA |
1688 | /* |
1689 | * 80003ES2LAN workaround-- | |
bc7f75fa AK |
1690 | * For packet buffer work-around on link down event; |
1691 | * disable receives here in the ISR and | |
1692 | * reset adapter in watchdog | |
1693 | */ | |
1694 | if (netif_carrier_ok(netdev) && | |
1695 | (adapter->flags & FLAG_RX_NEEDS_RESTART)) { | |
1696 | /* disable receives */ | |
1697 | rctl = er32(RCTL); | |
1698 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
318a94d6 | 1699 | adapter->flags |= FLAG_RX_RESTART_NOW; |
bc7f75fa AK |
1700 | } |
1701 | /* guard against interrupt when we're going down */ | |
1702 | if (!test_bit(__E1000_DOWN, &adapter->state)) | |
1703 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
1704 | } | |
1705 | ||
288379f0 | 1706 | if (napi_schedule_prep(&adapter->napi)) { |
bc7f75fa AK |
1707 | adapter->total_tx_bytes = 0; |
1708 | adapter->total_tx_packets = 0; | |
1709 | adapter->total_rx_bytes = 0; | |
1710 | adapter->total_rx_packets = 0; | |
288379f0 | 1711 | __napi_schedule(&adapter->napi); |
bc7f75fa AK |
1712 | } |
1713 | ||
1714 | return IRQ_HANDLED; | |
1715 | } | |
1716 | ||
4662e82b BA |
1717 | static irqreturn_t e1000_msix_other(int irq, void *data) |
1718 | { | |
1719 | struct net_device *netdev = data; | |
1720 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1721 | struct e1000_hw *hw = &adapter->hw; | |
1722 | u32 icr = er32(ICR); | |
1723 | ||
1724 | if (!(icr & E1000_ICR_INT_ASSERTED)) { | |
a3c69fef JB |
1725 | if (!test_bit(__E1000_DOWN, &adapter->state)) |
1726 | ew32(IMS, E1000_IMS_OTHER); | |
4662e82b BA |
1727 | return IRQ_NONE; |
1728 | } | |
1729 | ||
1730 | if (icr & adapter->eiac_mask) | |
1731 | ew32(ICS, (icr & adapter->eiac_mask)); | |
1732 | ||
1733 | if (icr & E1000_ICR_OTHER) { | |
1734 | if (!(icr & E1000_ICR_LSC)) | |
1735 | goto no_link_interrupt; | |
1736 | hw->mac.get_link_status = 1; | |
1737 | /* guard against interrupt when we're going down */ | |
1738 | if (!test_bit(__E1000_DOWN, &adapter->state)) | |
1739 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
1740 | } | |
1741 | ||
1742 | no_link_interrupt: | |
a3c69fef JB |
1743 | if (!test_bit(__E1000_DOWN, &adapter->state)) |
1744 | ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER); | |
4662e82b BA |
1745 | |
1746 | return IRQ_HANDLED; | |
1747 | } | |
1748 | ||
1749 | ||
1750 | static irqreturn_t e1000_intr_msix_tx(int irq, void *data) | |
1751 | { | |
1752 | struct net_device *netdev = data; | |
1753 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1754 | struct e1000_hw *hw = &adapter->hw; | |
1755 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
1756 | ||
1757 | ||
1758 | adapter->total_tx_bytes = 0; | |
1759 | adapter->total_tx_packets = 0; | |
1760 | ||
1761 | if (!e1000_clean_tx_irq(adapter)) | |
1762 | /* Ring was not completely cleaned, so fire another interrupt */ | |
1763 | ew32(ICS, tx_ring->ims_val); | |
1764 | ||
1765 | return IRQ_HANDLED; | |
1766 | } | |
1767 | ||
1768 | static irqreturn_t e1000_intr_msix_rx(int irq, void *data) | |
1769 | { | |
1770 | struct net_device *netdev = data; | |
1771 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1772 | ||
1773 | /* Write the ITR value calculated at the end of the | |
1774 | * previous interrupt. | |
1775 | */ | |
1776 | if (adapter->rx_ring->set_itr) { | |
1777 | writel(1000000000 / (adapter->rx_ring->itr_val * 256), | |
1778 | adapter->hw.hw_addr + adapter->rx_ring->itr_register); | |
1779 | adapter->rx_ring->set_itr = 0; | |
1780 | } | |
1781 | ||
288379f0 | 1782 | if (napi_schedule_prep(&adapter->napi)) { |
4662e82b BA |
1783 | adapter->total_rx_bytes = 0; |
1784 | adapter->total_rx_packets = 0; | |
288379f0 | 1785 | __napi_schedule(&adapter->napi); |
4662e82b BA |
1786 | } |
1787 | return IRQ_HANDLED; | |
1788 | } | |
1789 | ||
1790 | /** | |
1791 | * e1000_configure_msix - Configure MSI-X hardware | |
1792 | * | |
1793 | * e1000_configure_msix sets up the hardware to properly | |
1794 | * generate MSI-X interrupts. | |
1795 | **/ | |
1796 | static void e1000_configure_msix(struct e1000_adapter *adapter) | |
1797 | { | |
1798 | struct e1000_hw *hw = &adapter->hw; | |
1799 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
1800 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
1801 | int vector = 0; | |
1802 | u32 ctrl_ext, ivar = 0; | |
1803 | ||
1804 | adapter->eiac_mask = 0; | |
1805 | ||
1806 | /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */ | |
1807 | if (hw->mac.type == e1000_82574) { | |
1808 | u32 rfctl = er32(RFCTL); | |
1809 | rfctl |= E1000_RFCTL_ACK_DIS; | |
1810 | ew32(RFCTL, rfctl); | |
1811 | } | |
1812 | ||
1813 | #define E1000_IVAR_INT_ALLOC_VALID 0x8 | |
1814 | /* Configure Rx vector */ | |
1815 | rx_ring->ims_val = E1000_IMS_RXQ0; | |
1816 | adapter->eiac_mask |= rx_ring->ims_val; | |
1817 | if (rx_ring->itr_val) | |
1818 | writel(1000000000 / (rx_ring->itr_val * 256), | |
1819 | hw->hw_addr + rx_ring->itr_register); | |
1820 | else | |
1821 | writel(1, hw->hw_addr + rx_ring->itr_register); | |
1822 | ivar = E1000_IVAR_INT_ALLOC_VALID | vector; | |
1823 | ||
1824 | /* Configure Tx vector */ | |
1825 | tx_ring->ims_val = E1000_IMS_TXQ0; | |
1826 | vector++; | |
1827 | if (tx_ring->itr_val) | |
1828 | writel(1000000000 / (tx_ring->itr_val * 256), | |
1829 | hw->hw_addr + tx_ring->itr_register); | |
1830 | else | |
1831 | writel(1, hw->hw_addr + tx_ring->itr_register); | |
1832 | adapter->eiac_mask |= tx_ring->ims_val; | |
1833 | ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8); | |
1834 | ||
1835 | /* set vector for Other Causes, e.g. link changes */ | |
1836 | vector++; | |
1837 | ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16); | |
1838 | if (rx_ring->itr_val) | |
1839 | writel(1000000000 / (rx_ring->itr_val * 256), | |
1840 | hw->hw_addr + E1000_EITR_82574(vector)); | |
1841 | else | |
1842 | writel(1, hw->hw_addr + E1000_EITR_82574(vector)); | |
1843 | ||
1844 | /* Cause Tx interrupts on every write back */ | |
1845 | ivar |= (1 << 31); | |
1846 | ||
1847 | ew32(IVAR, ivar); | |
1848 | ||
1849 | /* enable MSI-X PBA support */ | |
1850 | ctrl_ext = er32(CTRL_EXT); | |
1851 | ctrl_ext |= E1000_CTRL_EXT_PBA_CLR; | |
1852 | ||
1853 | /* Auto-Mask Other interrupts upon ICR read */ | |
1854 | #define E1000_EIAC_MASK_82574 0x01F00000 | |
1855 | ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER); | |
1856 | ctrl_ext |= E1000_CTRL_EXT_EIAME; | |
1857 | ew32(CTRL_EXT, ctrl_ext); | |
1858 | e1e_flush(); | |
1859 | } | |
1860 | ||
1861 | void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter) | |
1862 | { | |
1863 | if (adapter->msix_entries) { | |
1864 | pci_disable_msix(adapter->pdev); | |
1865 | kfree(adapter->msix_entries); | |
1866 | adapter->msix_entries = NULL; | |
1867 | } else if (adapter->flags & FLAG_MSI_ENABLED) { | |
1868 | pci_disable_msi(adapter->pdev); | |
1869 | adapter->flags &= ~FLAG_MSI_ENABLED; | |
1870 | } | |
4662e82b BA |
1871 | } |
1872 | ||
1873 | /** | |
1874 | * e1000e_set_interrupt_capability - set MSI or MSI-X if supported | |
1875 | * | |
1876 | * Attempt to configure interrupts using the best available | |
1877 | * capabilities of the hardware and kernel. | |
1878 | **/ | |
1879 | void e1000e_set_interrupt_capability(struct e1000_adapter *adapter) | |
1880 | { | |
1881 | int err; | |
8e86acd7 | 1882 | int i; |
4662e82b BA |
1883 | |
1884 | switch (adapter->int_mode) { | |
1885 | case E1000E_INT_MODE_MSIX: | |
1886 | if (adapter->flags & FLAG_HAS_MSIX) { | |
8e86acd7 JK |
1887 | adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */ |
1888 | adapter->msix_entries = kcalloc(adapter->num_vectors, | |
4662e82b BA |
1889 | sizeof(struct msix_entry), |
1890 | GFP_KERNEL); | |
1891 | if (adapter->msix_entries) { | |
8e86acd7 | 1892 | for (i = 0; i < adapter->num_vectors; i++) |
4662e82b BA |
1893 | adapter->msix_entries[i].entry = i; |
1894 | ||
1895 | err = pci_enable_msix(adapter->pdev, | |
1896 | adapter->msix_entries, | |
8e86acd7 | 1897 | adapter->num_vectors); |
b1cdfead | 1898 | if (err == 0) |
4662e82b BA |
1899 | return; |
1900 | } | |
1901 | /* MSI-X failed, so fall through and try MSI */ | |
ef456f85 | 1902 | e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n"); |
4662e82b BA |
1903 | e1000e_reset_interrupt_capability(adapter); |
1904 | } | |
1905 | adapter->int_mode = E1000E_INT_MODE_MSI; | |
1906 | /* Fall through */ | |
1907 | case E1000E_INT_MODE_MSI: | |
1908 | if (!pci_enable_msi(adapter->pdev)) { | |
1909 | adapter->flags |= FLAG_MSI_ENABLED; | |
1910 | } else { | |
1911 | adapter->int_mode = E1000E_INT_MODE_LEGACY; | |
ef456f85 | 1912 | e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n"); |
4662e82b BA |
1913 | } |
1914 | /* Fall through */ | |
1915 | case E1000E_INT_MODE_LEGACY: | |
1916 | /* Don't do anything; this is the system default */ | |
1917 | break; | |
1918 | } | |
8e86acd7 JK |
1919 | |
1920 | /* store the number of vectors being used */ | |
1921 | adapter->num_vectors = 1; | |
4662e82b BA |
1922 | } |
1923 | ||
1924 | /** | |
1925 | * e1000_request_msix - Initialize MSI-X interrupts | |
1926 | * | |
1927 | * e1000_request_msix allocates MSI-X vectors and requests interrupts from the | |
1928 | * kernel. | |
1929 | **/ | |
1930 | static int e1000_request_msix(struct e1000_adapter *adapter) | |
1931 | { | |
1932 | struct net_device *netdev = adapter->netdev; | |
1933 | int err = 0, vector = 0; | |
1934 | ||
1935 | if (strlen(netdev->name) < (IFNAMSIZ - 5)) | |
79f5e840 BA |
1936 | snprintf(adapter->rx_ring->name, |
1937 | sizeof(adapter->rx_ring->name) - 1, | |
1938 | "%s-rx-0", netdev->name); | |
4662e82b BA |
1939 | else |
1940 | memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ); | |
1941 | err = request_irq(adapter->msix_entries[vector].vector, | |
a0607fd3 | 1942 | e1000_intr_msix_rx, 0, adapter->rx_ring->name, |
4662e82b BA |
1943 | netdev); |
1944 | if (err) | |
1945 | goto out; | |
1946 | adapter->rx_ring->itr_register = E1000_EITR_82574(vector); | |
1947 | adapter->rx_ring->itr_val = adapter->itr; | |
1948 | vector++; | |
1949 | ||
1950 | if (strlen(netdev->name) < (IFNAMSIZ - 5)) | |
79f5e840 BA |
1951 | snprintf(adapter->tx_ring->name, |
1952 | sizeof(adapter->tx_ring->name) - 1, | |
1953 | "%s-tx-0", netdev->name); | |
4662e82b BA |
1954 | else |
1955 | memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ); | |
1956 | err = request_irq(adapter->msix_entries[vector].vector, | |
a0607fd3 | 1957 | e1000_intr_msix_tx, 0, adapter->tx_ring->name, |
4662e82b BA |
1958 | netdev); |
1959 | if (err) | |
1960 | goto out; | |
1961 | adapter->tx_ring->itr_register = E1000_EITR_82574(vector); | |
1962 | adapter->tx_ring->itr_val = adapter->itr; | |
1963 | vector++; | |
1964 | ||
1965 | err = request_irq(adapter->msix_entries[vector].vector, | |
a0607fd3 | 1966 | e1000_msix_other, 0, netdev->name, netdev); |
4662e82b BA |
1967 | if (err) |
1968 | goto out; | |
1969 | ||
1970 | e1000_configure_msix(adapter); | |
1971 | return 0; | |
1972 | out: | |
1973 | return err; | |
1974 | } | |
1975 | ||
f8d59f78 BA |
1976 | /** |
1977 | * e1000_request_irq - initialize interrupts | |
1978 | * | |
1979 | * Attempts to configure interrupts using the best available | |
1980 | * capabilities of the hardware and kernel. | |
1981 | **/ | |
bc7f75fa AK |
1982 | static int e1000_request_irq(struct e1000_adapter *adapter) |
1983 | { | |
1984 | struct net_device *netdev = adapter->netdev; | |
bc7f75fa AK |
1985 | int err; |
1986 | ||
4662e82b BA |
1987 | if (adapter->msix_entries) { |
1988 | err = e1000_request_msix(adapter); | |
1989 | if (!err) | |
1990 | return err; | |
1991 | /* fall back to MSI */ | |
1992 | e1000e_reset_interrupt_capability(adapter); | |
1993 | adapter->int_mode = E1000E_INT_MODE_MSI; | |
1994 | e1000e_set_interrupt_capability(adapter); | |
bc7f75fa | 1995 | } |
4662e82b | 1996 | if (adapter->flags & FLAG_MSI_ENABLED) { |
a0607fd3 | 1997 | err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0, |
4662e82b BA |
1998 | netdev->name, netdev); |
1999 | if (!err) | |
2000 | return err; | |
bc7f75fa | 2001 | |
4662e82b BA |
2002 | /* fall back to legacy interrupt */ |
2003 | e1000e_reset_interrupt_capability(adapter); | |
2004 | adapter->int_mode = E1000E_INT_MODE_LEGACY; | |
bc7f75fa AK |
2005 | } |
2006 | ||
a0607fd3 | 2007 | err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED, |
4662e82b BA |
2008 | netdev->name, netdev); |
2009 | if (err) | |
2010 | e_err("Unable to allocate interrupt, Error: %d\n", err); | |
2011 | ||
bc7f75fa AK |
2012 | return err; |
2013 | } | |
2014 | ||
2015 | static void e1000_free_irq(struct e1000_adapter *adapter) | |
2016 | { | |
2017 | struct net_device *netdev = adapter->netdev; | |
2018 | ||
4662e82b BA |
2019 | if (adapter->msix_entries) { |
2020 | int vector = 0; | |
2021 | ||
2022 | free_irq(adapter->msix_entries[vector].vector, netdev); | |
2023 | vector++; | |
2024 | ||
2025 | free_irq(adapter->msix_entries[vector].vector, netdev); | |
2026 | vector++; | |
2027 | ||
2028 | /* Other Causes interrupt vector */ | |
2029 | free_irq(adapter->msix_entries[vector].vector, netdev); | |
2030 | return; | |
bc7f75fa | 2031 | } |
4662e82b BA |
2032 | |
2033 | free_irq(adapter->pdev->irq, netdev); | |
bc7f75fa AK |
2034 | } |
2035 | ||
2036 | /** | |
2037 | * e1000_irq_disable - Mask off interrupt generation on the NIC | |
2038 | **/ | |
2039 | static void e1000_irq_disable(struct e1000_adapter *adapter) | |
2040 | { | |
2041 | struct e1000_hw *hw = &adapter->hw; | |
2042 | ||
bc7f75fa | 2043 | ew32(IMC, ~0); |
4662e82b BA |
2044 | if (adapter->msix_entries) |
2045 | ew32(EIAC_82574, 0); | |
bc7f75fa | 2046 | e1e_flush(); |
8e86acd7 JK |
2047 | |
2048 | if (adapter->msix_entries) { | |
2049 | int i; | |
2050 | for (i = 0; i < adapter->num_vectors; i++) | |
2051 | synchronize_irq(adapter->msix_entries[i].vector); | |
2052 | } else { | |
2053 | synchronize_irq(adapter->pdev->irq); | |
2054 | } | |
bc7f75fa AK |
2055 | } |
2056 | ||
2057 | /** | |
2058 | * e1000_irq_enable - Enable default interrupt generation settings | |
2059 | **/ | |
2060 | static void e1000_irq_enable(struct e1000_adapter *adapter) | |
2061 | { | |
2062 | struct e1000_hw *hw = &adapter->hw; | |
2063 | ||
4662e82b BA |
2064 | if (adapter->msix_entries) { |
2065 | ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); | |
2066 | ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC); | |
2067 | } else { | |
2068 | ew32(IMS, IMS_ENABLE_MASK); | |
2069 | } | |
74ef9c39 | 2070 | e1e_flush(); |
bc7f75fa AK |
2071 | } |
2072 | ||
2073 | /** | |
31dbe5b4 | 2074 | * e1000e_get_hw_control - get control of the h/w from f/w |
bc7f75fa AK |
2075 | * @adapter: address of board private structure |
2076 | * | |
31dbe5b4 | 2077 | * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit. |
bc7f75fa AK |
2078 | * For ASF and Pass Through versions of f/w this means that |
2079 | * the driver is loaded. For AMT version (only with 82573) | |
2080 | * of the f/w this means that the network i/f is open. | |
2081 | **/ | |
31dbe5b4 | 2082 | void e1000e_get_hw_control(struct e1000_adapter *adapter) |
bc7f75fa AK |
2083 | { |
2084 | struct e1000_hw *hw = &adapter->hw; | |
2085 | u32 ctrl_ext; | |
2086 | u32 swsm; | |
2087 | ||
2088 | /* Let firmware know the driver has taken over */ | |
2089 | if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { | |
2090 | swsm = er32(SWSM); | |
2091 | ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); | |
2092 | } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { | |
2093 | ctrl_ext = er32(CTRL_EXT); | |
ad68076e | 2094 | ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); |
bc7f75fa AK |
2095 | } |
2096 | } | |
2097 | ||
2098 | /** | |
31dbe5b4 | 2099 | * e1000e_release_hw_control - release control of the h/w to f/w |
bc7f75fa AK |
2100 | * @adapter: address of board private structure |
2101 | * | |
31dbe5b4 | 2102 | * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit. |
bc7f75fa AK |
2103 | * For ASF and Pass Through versions of f/w this means that the |
2104 | * driver is no longer loaded. For AMT version (only with 82573) i | |
2105 | * of the f/w this means that the network i/f is closed. | |
2106 | * | |
2107 | **/ | |
31dbe5b4 | 2108 | void e1000e_release_hw_control(struct e1000_adapter *adapter) |
bc7f75fa AK |
2109 | { |
2110 | struct e1000_hw *hw = &adapter->hw; | |
2111 | u32 ctrl_ext; | |
2112 | u32 swsm; | |
2113 | ||
2114 | /* Let firmware taken over control of h/w */ | |
2115 | if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) { | |
2116 | swsm = er32(SWSM); | |
2117 | ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); | |
2118 | } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) { | |
2119 | ctrl_ext = er32(CTRL_EXT); | |
ad68076e | 2120 | ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); |
bc7f75fa AK |
2121 | } |
2122 | } | |
2123 | ||
bc7f75fa AK |
2124 | /** |
2125 | * @e1000_alloc_ring - allocate memory for a ring structure | |
2126 | **/ | |
2127 | static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, | |
2128 | struct e1000_ring *ring) | |
2129 | { | |
2130 | struct pci_dev *pdev = adapter->pdev; | |
2131 | ||
2132 | ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, | |
2133 | GFP_KERNEL); | |
2134 | if (!ring->desc) | |
2135 | return -ENOMEM; | |
2136 | ||
2137 | return 0; | |
2138 | } | |
2139 | ||
2140 | /** | |
2141 | * e1000e_setup_tx_resources - allocate Tx resources (Descriptors) | |
2142 | * @adapter: board private structure | |
2143 | * | |
2144 | * Return 0 on success, negative on failure | |
2145 | **/ | |
2146 | int e1000e_setup_tx_resources(struct e1000_adapter *adapter) | |
2147 | { | |
2148 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
2149 | int err = -ENOMEM, size; | |
2150 | ||
2151 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
89bf67f1 | 2152 | tx_ring->buffer_info = vzalloc(size); |
bc7f75fa AK |
2153 | if (!tx_ring->buffer_info) |
2154 | goto err; | |
bc7f75fa AK |
2155 | |
2156 | /* round up to nearest 4K */ | |
2157 | tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc); | |
2158 | tx_ring->size = ALIGN(tx_ring->size, 4096); | |
2159 | ||
2160 | err = e1000_alloc_ring_dma(adapter, tx_ring); | |
2161 | if (err) | |
2162 | goto err; | |
2163 | ||
2164 | tx_ring->next_to_use = 0; | |
2165 | tx_ring->next_to_clean = 0; | |
bc7f75fa AK |
2166 | |
2167 | return 0; | |
2168 | err: | |
2169 | vfree(tx_ring->buffer_info); | |
44defeb3 | 2170 | e_err("Unable to allocate memory for the transmit descriptor ring\n"); |
bc7f75fa AK |
2171 | return err; |
2172 | } | |
2173 | ||
2174 | /** | |
2175 | * e1000e_setup_rx_resources - allocate Rx resources (Descriptors) | |
2176 | * @adapter: board private structure | |
2177 | * | |
2178 | * Returns 0 on success, negative on failure | |
2179 | **/ | |
2180 | int e1000e_setup_rx_resources(struct e1000_adapter *adapter) | |
2181 | { | |
2182 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
47f44e40 AK |
2183 | struct e1000_buffer *buffer_info; |
2184 | int i, size, desc_len, err = -ENOMEM; | |
bc7f75fa AK |
2185 | |
2186 | size = sizeof(struct e1000_buffer) * rx_ring->count; | |
89bf67f1 | 2187 | rx_ring->buffer_info = vzalloc(size); |
bc7f75fa AK |
2188 | if (!rx_ring->buffer_info) |
2189 | goto err; | |
bc7f75fa | 2190 | |
47f44e40 AK |
2191 | for (i = 0; i < rx_ring->count; i++) { |
2192 | buffer_info = &rx_ring->buffer_info[i]; | |
2193 | buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS, | |
2194 | sizeof(struct e1000_ps_page), | |
2195 | GFP_KERNEL); | |
2196 | if (!buffer_info->ps_pages) | |
2197 | goto err_pages; | |
2198 | } | |
bc7f75fa AK |
2199 | |
2200 | desc_len = sizeof(union e1000_rx_desc_packet_split); | |
2201 | ||
2202 | /* Round up to nearest 4K */ | |
2203 | rx_ring->size = rx_ring->count * desc_len; | |
2204 | rx_ring->size = ALIGN(rx_ring->size, 4096); | |
2205 | ||
2206 | err = e1000_alloc_ring_dma(adapter, rx_ring); | |
2207 | if (err) | |
47f44e40 | 2208 | goto err_pages; |
bc7f75fa AK |
2209 | |
2210 | rx_ring->next_to_clean = 0; | |
2211 | rx_ring->next_to_use = 0; | |
2212 | rx_ring->rx_skb_top = NULL; | |
2213 | ||
2214 | return 0; | |
47f44e40 AK |
2215 | |
2216 | err_pages: | |
2217 | for (i = 0; i < rx_ring->count; i++) { | |
2218 | buffer_info = &rx_ring->buffer_info[i]; | |
2219 | kfree(buffer_info->ps_pages); | |
2220 | } | |
bc7f75fa AK |
2221 | err: |
2222 | vfree(rx_ring->buffer_info); | |
e9262447 | 2223 | e_err("Unable to allocate memory for the receive descriptor ring\n"); |
bc7f75fa AK |
2224 | return err; |
2225 | } | |
2226 | ||
2227 | /** | |
2228 | * e1000_clean_tx_ring - Free Tx Buffers | |
2229 | * @adapter: board private structure | |
2230 | **/ | |
2231 | static void e1000_clean_tx_ring(struct e1000_adapter *adapter) | |
2232 | { | |
2233 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
2234 | struct e1000_buffer *buffer_info; | |
2235 | unsigned long size; | |
2236 | unsigned int i; | |
2237 | ||
2238 | for (i = 0; i < tx_ring->count; i++) { | |
2239 | buffer_info = &tx_ring->buffer_info[i]; | |
2240 | e1000_put_txbuf(adapter, buffer_info); | |
2241 | } | |
2242 | ||
2243 | size = sizeof(struct e1000_buffer) * tx_ring->count; | |
2244 | memset(tx_ring->buffer_info, 0, size); | |
2245 | ||
2246 | memset(tx_ring->desc, 0, tx_ring->size); | |
2247 | ||
2248 | tx_ring->next_to_use = 0; | |
2249 | tx_ring->next_to_clean = 0; | |
2250 | ||
2251 | writel(0, adapter->hw.hw_addr + tx_ring->head); | |
2252 | writel(0, adapter->hw.hw_addr + tx_ring->tail); | |
2253 | } | |
2254 | ||
2255 | /** | |
2256 | * e1000e_free_tx_resources - Free Tx Resources per Queue | |
2257 | * @adapter: board private structure | |
2258 | * | |
2259 | * Free all transmit software resources | |
2260 | **/ | |
2261 | void e1000e_free_tx_resources(struct e1000_adapter *adapter) | |
2262 | { | |
2263 | struct pci_dev *pdev = adapter->pdev; | |
2264 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
2265 | ||
2266 | e1000_clean_tx_ring(adapter); | |
2267 | ||
2268 | vfree(tx_ring->buffer_info); | |
2269 | tx_ring->buffer_info = NULL; | |
2270 | ||
2271 | dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc, | |
2272 | tx_ring->dma); | |
2273 | tx_ring->desc = NULL; | |
2274 | } | |
2275 | ||
2276 | /** | |
2277 | * e1000e_free_rx_resources - Free Rx Resources | |
2278 | * @adapter: board private structure | |
2279 | * | |
2280 | * Free all receive software resources | |
2281 | **/ | |
2282 | ||
2283 | void e1000e_free_rx_resources(struct e1000_adapter *adapter) | |
2284 | { | |
2285 | struct pci_dev *pdev = adapter->pdev; | |
2286 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
47f44e40 | 2287 | int i; |
bc7f75fa AK |
2288 | |
2289 | e1000_clean_rx_ring(adapter); | |
2290 | ||
b1cdfead | 2291 | for (i = 0; i < rx_ring->count; i++) |
47f44e40 | 2292 | kfree(rx_ring->buffer_info[i].ps_pages); |
47f44e40 | 2293 | |
bc7f75fa AK |
2294 | vfree(rx_ring->buffer_info); |
2295 | rx_ring->buffer_info = NULL; | |
2296 | ||
bc7f75fa AK |
2297 | dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc, |
2298 | rx_ring->dma); | |
2299 | rx_ring->desc = NULL; | |
2300 | } | |
2301 | ||
2302 | /** | |
2303 | * e1000_update_itr - update the dynamic ITR value based on statistics | |
489815ce AK |
2304 | * @adapter: pointer to adapter |
2305 | * @itr_setting: current adapter->itr | |
2306 | * @packets: the number of packets during this measurement interval | |
2307 | * @bytes: the number of bytes during this measurement interval | |
2308 | * | |
bc7f75fa AK |
2309 | * Stores a new ITR value based on packets and byte |
2310 | * counts during the last interrupt. The advantage of per interrupt | |
2311 | * computation is faster updates and more accurate ITR for the current | |
2312 | * traffic pattern. Constants in this function were computed | |
2313 | * based on theoretical maximum wire speed and thresholds were set based | |
2314 | * on testing data as well as attempting to minimize response time | |
4662e82b BA |
2315 | * while increasing bulk throughput. This functionality is controlled |
2316 | * by the InterruptThrottleRate module parameter. | |
bc7f75fa AK |
2317 | **/ |
2318 | static unsigned int e1000_update_itr(struct e1000_adapter *adapter, | |
2319 | u16 itr_setting, int packets, | |
2320 | int bytes) | |
2321 | { | |
2322 | unsigned int retval = itr_setting; | |
2323 | ||
2324 | if (packets == 0) | |
2325 | goto update_itr_done; | |
2326 | ||
2327 | switch (itr_setting) { | |
2328 | case lowest_latency: | |
2329 | /* handle TSO and jumbo frames */ | |
2330 | if (bytes/packets > 8000) | |
2331 | retval = bulk_latency; | |
b1cdfead | 2332 | else if ((packets < 5) && (bytes > 512)) |
bc7f75fa | 2333 | retval = low_latency; |
bc7f75fa AK |
2334 | break; |
2335 | case low_latency: /* 50 usec aka 20000 ints/s */ | |
2336 | if (bytes > 10000) { | |
2337 | /* this if handles the TSO accounting */ | |
b1cdfead | 2338 | if (bytes/packets > 8000) |
bc7f75fa | 2339 | retval = bulk_latency; |
b1cdfead | 2340 | else if ((packets < 10) || ((bytes/packets) > 1200)) |
bc7f75fa | 2341 | retval = bulk_latency; |
b1cdfead | 2342 | else if ((packets > 35)) |
bc7f75fa | 2343 | retval = lowest_latency; |
bc7f75fa AK |
2344 | } else if (bytes/packets > 2000) { |
2345 | retval = bulk_latency; | |
2346 | } else if (packets <= 2 && bytes < 512) { | |
2347 | retval = lowest_latency; | |
2348 | } | |
2349 | break; | |
2350 | case bulk_latency: /* 250 usec aka 4000 ints/s */ | |
2351 | if (bytes > 25000) { | |
b1cdfead | 2352 | if (packets > 35) |
bc7f75fa | 2353 | retval = low_latency; |
bc7f75fa AK |
2354 | } else if (bytes < 6000) { |
2355 | retval = low_latency; | |
2356 | } | |
2357 | break; | |
2358 | } | |
2359 | ||
2360 | update_itr_done: | |
2361 | return retval; | |
2362 | } | |
2363 | ||
2364 | static void e1000_set_itr(struct e1000_adapter *adapter) | |
2365 | { | |
2366 | struct e1000_hw *hw = &adapter->hw; | |
2367 | u16 current_itr; | |
2368 | u32 new_itr = adapter->itr; | |
2369 | ||
2370 | /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ | |
2371 | if (adapter->link_speed != SPEED_1000) { | |
2372 | current_itr = 0; | |
2373 | new_itr = 4000; | |
2374 | goto set_itr_now; | |
2375 | } | |
2376 | ||
828bac87 BA |
2377 | if (adapter->flags2 & FLAG2_DISABLE_AIM) { |
2378 | new_itr = 0; | |
2379 | goto set_itr_now; | |
2380 | } | |
2381 | ||
bc7f75fa AK |
2382 | adapter->tx_itr = e1000_update_itr(adapter, |
2383 | adapter->tx_itr, | |
2384 | adapter->total_tx_packets, | |
2385 | adapter->total_tx_bytes); | |
2386 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ | |
2387 | if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) | |
2388 | adapter->tx_itr = low_latency; | |
2389 | ||
2390 | adapter->rx_itr = e1000_update_itr(adapter, | |
2391 | adapter->rx_itr, | |
2392 | adapter->total_rx_packets, | |
2393 | adapter->total_rx_bytes); | |
2394 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ | |
2395 | if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) | |
2396 | adapter->rx_itr = low_latency; | |
2397 | ||
2398 | current_itr = max(adapter->rx_itr, adapter->tx_itr); | |
2399 | ||
2400 | switch (current_itr) { | |
2401 | /* counts and packets in update_itr are dependent on these numbers */ | |
2402 | case lowest_latency: | |
2403 | new_itr = 70000; | |
2404 | break; | |
2405 | case low_latency: | |
2406 | new_itr = 20000; /* aka hwitr = ~200 */ | |
2407 | break; | |
2408 | case bulk_latency: | |
2409 | new_itr = 4000; | |
2410 | break; | |
2411 | default: | |
2412 | break; | |
2413 | } | |
2414 | ||
2415 | set_itr_now: | |
2416 | if (new_itr != adapter->itr) { | |
ad68076e BA |
2417 | /* |
2418 | * this attempts to bias the interrupt rate towards Bulk | |
bc7f75fa | 2419 | * by adding intermediate steps when interrupt rate is |
ad68076e BA |
2420 | * increasing |
2421 | */ | |
bc7f75fa AK |
2422 | new_itr = new_itr > adapter->itr ? |
2423 | min(adapter->itr + (new_itr >> 2), new_itr) : | |
2424 | new_itr; | |
2425 | adapter->itr = new_itr; | |
4662e82b BA |
2426 | adapter->rx_ring->itr_val = new_itr; |
2427 | if (adapter->msix_entries) | |
2428 | adapter->rx_ring->set_itr = 1; | |
2429 | else | |
828bac87 BA |
2430 | if (new_itr) |
2431 | ew32(ITR, 1000000000 / (new_itr * 256)); | |
2432 | else | |
2433 | ew32(ITR, 0); | |
bc7f75fa AK |
2434 | } |
2435 | } | |
2436 | ||
4662e82b BA |
2437 | /** |
2438 | * e1000_alloc_queues - Allocate memory for all rings | |
2439 | * @adapter: board private structure to initialize | |
2440 | **/ | |
2441 | static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter) | |
2442 | { | |
2443 | adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); | |
2444 | if (!adapter->tx_ring) | |
2445 | goto err; | |
2446 | ||
2447 | adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); | |
2448 | if (!adapter->rx_ring) | |
2449 | goto err; | |
2450 | ||
2451 | return 0; | |
2452 | err: | |
2453 | e_err("Unable to allocate memory for queues\n"); | |
2454 | kfree(adapter->rx_ring); | |
2455 | kfree(adapter->tx_ring); | |
2456 | return -ENOMEM; | |
2457 | } | |
2458 | ||
bc7f75fa AK |
2459 | /** |
2460 | * e1000_clean - NAPI Rx polling callback | |
ad68076e | 2461 | * @napi: struct associated with this polling callback |
489815ce | 2462 | * @budget: amount of packets driver is allowed to process this poll |
bc7f75fa AK |
2463 | **/ |
2464 | static int e1000_clean(struct napi_struct *napi, int budget) | |
2465 | { | |
2466 | struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); | |
4662e82b | 2467 | struct e1000_hw *hw = &adapter->hw; |
bc7f75fa | 2468 | struct net_device *poll_dev = adapter->netdev; |
679e8a0f | 2469 | int tx_cleaned = 1, work_done = 0; |
bc7f75fa | 2470 | |
4cf1653a | 2471 | adapter = netdev_priv(poll_dev); |
bc7f75fa | 2472 | |
4662e82b BA |
2473 | if (adapter->msix_entries && |
2474 | !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val)) | |
2475 | goto clean_rx; | |
2476 | ||
92af3e95 | 2477 | tx_cleaned = e1000_clean_tx_irq(adapter); |
bc7f75fa | 2478 | |
4662e82b | 2479 | clean_rx: |
bc7f75fa | 2480 | adapter->clean_rx(adapter, &work_done, budget); |
d2c7ddd6 | 2481 | |
12d04a3c | 2482 | if (!tx_cleaned) |
d2c7ddd6 | 2483 | work_done = budget; |
bc7f75fa | 2484 | |
53e52c72 DM |
2485 | /* If budget not fully consumed, exit the polling mode */ |
2486 | if (work_done < budget) { | |
bc7f75fa AK |
2487 | if (adapter->itr_setting & 3) |
2488 | e1000_set_itr(adapter); | |
288379f0 | 2489 | napi_complete(napi); |
a3c69fef JB |
2490 | if (!test_bit(__E1000_DOWN, &adapter->state)) { |
2491 | if (adapter->msix_entries) | |
2492 | ew32(IMS, adapter->rx_ring->ims_val); | |
2493 | else | |
2494 | e1000_irq_enable(adapter); | |
2495 | } | |
bc7f75fa AK |
2496 | } |
2497 | ||
2498 | return work_done; | |
2499 | } | |
2500 | ||
2501 | static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid) | |
2502 | { | |
2503 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
2504 | struct e1000_hw *hw = &adapter->hw; | |
2505 | u32 vfta, index; | |
2506 | ||
2507 | /* don't update vlan cookie if already programmed */ | |
2508 | if ((adapter->hw.mng_cookie.status & | |
2509 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && | |
2510 | (vid == adapter->mng_vlan_id)) | |
2511 | return; | |
caaddaf8 | 2512 | |
bc7f75fa | 2513 | /* add VID to filter table */ |
caaddaf8 BA |
2514 | if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { |
2515 | index = (vid >> 5) & 0x7F; | |
2516 | vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); | |
2517 | vfta |= (1 << (vid & 0x1F)); | |
2518 | hw->mac.ops.write_vfta(hw, index, vfta); | |
2519 | } | |
86d70e53 JK |
2520 | |
2521 | set_bit(vid, adapter->active_vlans); | |
bc7f75fa AK |
2522 | } |
2523 | ||
2524 | static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) | |
2525 | { | |
2526 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
2527 | struct e1000_hw *hw = &adapter->hw; | |
2528 | u32 vfta, index; | |
2529 | ||
bc7f75fa AK |
2530 | if ((adapter->hw.mng_cookie.status & |
2531 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && | |
2532 | (vid == adapter->mng_vlan_id)) { | |
2533 | /* release control to f/w */ | |
31dbe5b4 | 2534 | e1000e_release_hw_control(adapter); |
bc7f75fa AK |
2535 | return; |
2536 | } | |
2537 | ||
2538 | /* remove VID from filter table */ | |
caaddaf8 BA |
2539 | if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { |
2540 | index = (vid >> 5) & 0x7F; | |
2541 | vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index); | |
2542 | vfta &= ~(1 << (vid & 0x1F)); | |
2543 | hw->mac.ops.write_vfta(hw, index, vfta); | |
2544 | } | |
86d70e53 JK |
2545 | |
2546 | clear_bit(vid, adapter->active_vlans); | |
bc7f75fa AK |
2547 | } |
2548 | ||
86d70e53 JK |
2549 | /** |
2550 | * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering | |
2551 | * @adapter: board private structure to initialize | |
2552 | **/ | |
2553 | static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter) | |
bc7f75fa AK |
2554 | { |
2555 | struct net_device *netdev = adapter->netdev; | |
86d70e53 JK |
2556 | struct e1000_hw *hw = &adapter->hw; |
2557 | u32 rctl; | |
bc7f75fa | 2558 | |
86d70e53 JK |
2559 | if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { |
2560 | /* disable VLAN receive filtering */ | |
2561 | rctl = er32(RCTL); | |
2562 | rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN); | |
2563 | ew32(RCTL, rctl); | |
2564 | ||
2565 | if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) { | |
2566 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
2567 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
bc7f75fa | 2568 | } |
bc7f75fa AK |
2569 | } |
2570 | } | |
2571 | ||
86d70e53 JK |
2572 | /** |
2573 | * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering | |
2574 | * @adapter: board private structure to initialize | |
2575 | **/ | |
2576 | static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter) | |
2577 | { | |
2578 | struct e1000_hw *hw = &adapter->hw; | |
2579 | u32 rctl; | |
2580 | ||
2581 | if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) { | |
2582 | /* enable VLAN receive filtering */ | |
2583 | rctl = er32(RCTL); | |
2584 | rctl |= E1000_RCTL_VFE; | |
2585 | rctl &= ~E1000_RCTL_CFIEN; | |
2586 | ew32(RCTL, rctl); | |
2587 | } | |
2588 | } | |
bc7f75fa | 2589 | |
86d70e53 JK |
2590 | /** |
2591 | * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping | |
2592 | * @adapter: board private structure to initialize | |
2593 | **/ | |
2594 | static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter) | |
bc7f75fa | 2595 | { |
bc7f75fa | 2596 | struct e1000_hw *hw = &adapter->hw; |
86d70e53 | 2597 | u32 ctrl; |
bc7f75fa | 2598 | |
86d70e53 JK |
2599 | /* disable VLAN tag insert/strip */ |
2600 | ctrl = er32(CTRL); | |
2601 | ctrl &= ~E1000_CTRL_VME; | |
2602 | ew32(CTRL, ctrl); | |
2603 | } | |
bc7f75fa | 2604 | |
86d70e53 JK |
2605 | /** |
2606 | * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping | |
2607 | * @adapter: board private structure to initialize | |
2608 | **/ | |
2609 | static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter) | |
2610 | { | |
2611 | struct e1000_hw *hw = &adapter->hw; | |
2612 | u32 ctrl; | |
bc7f75fa | 2613 | |
86d70e53 JK |
2614 | /* enable VLAN tag insert/strip */ |
2615 | ctrl = er32(CTRL); | |
2616 | ctrl |= E1000_CTRL_VME; | |
2617 | ew32(CTRL, ctrl); | |
2618 | } | |
bc7f75fa | 2619 | |
86d70e53 JK |
2620 | static void e1000_update_mng_vlan(struct e1000_adapter *adapter) |
2621 | { | |
2622 | struct net_device *netdev = adapter->netdev; | |
2623 | u16 vid = adapter->hw.mng_cookie.vlan_id; | |
2624 | u16 old_vid = adapter->mng_vlan_id; | |
2625 | ||
2626 | if (adapter->hw.mng_cookie.status & | |
2627 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { | |
2628 | e1000_vlan_rx_add_vid(netdev, vid); | |
2629 | adapter->mng_vlan_id = vid; | |
bc7f75fa AK |
2630 | } |
2631 | ||
86d70e53 JK |
2632 | if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid)) |
2633 | e1000_vlan_rx_kill_vid(netdev, old_vid); | |
bc7f75fa AK |
2634 | } |
2635 | ||
2636 | static void e1000_restore_vlan(struct e1000_adapter *adapter) | |
2637 | { | |
2638 | u16 vid; | |
2639 | ||
86d70e53 | 2640 | e1000_vlan_rx_add_vid(adapter->netdev, 0); |
bc7f75fa | 2641 | |
86d70e53 | 2642 | for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) |
bc7f75fa | 2643 | e1000_vlan_rx_add_vid(adapter->netdev, vid); |
bc7f75fa AK |
2644 | } |
2645 | ||
cd791618 | 2646 | static void e1000_init_manageability_pt(struct e1000_adapter *adapter) |
bc7f75fa AK |
2647 | { |
2648 | struct e1000_hw *hw = &adapter->hw; | |
cd791618 | 2649 | u32 manc, manc2h, mdef, i, j; |
bc7f75fa AK |
2650 | |
2651 | if (!(adapter->flags & FLAG_MNG_PT_ENABLED)) | |
2652 | return; | |
2653 | ||
2654 | manc = er32(MANC); | |
2655 | ||
ad68076e BA |
2656 | /* |
2657 | * enable receiving management packets to the host. this will probably | |
bc7f75fa | 2658 | * generate destination unreachable messages from the host OS, but |
ad68076e BA |
2659 | * the packets will be handled on SMBUS |
2660 | */ | |
bc7f75fa AK |
2661 | manc |= E1000_MANC_EN_MNG2HOST; |
2662 | manc2h = er32(MANC2H); | |
cd791618 BA |
2663 | |
2664 | switch (hw->mac.type) { | |
2665 | default: | |
2666 | manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664); | |
2667 | break; | |
2668 | case e1000_82574: | |
2669 | case e1000_82583: | |
2670 | /* | |
2671 | * Check if IPMI pass-through decision filter already exists; | |
2672 | * if so, enable it. | |
2673 | */ | |
2674 | for (i = 0, j = 0; i < 8; i++) { | |
2675 | mdef = er32(MDEF(i)); | |
2676 | ||
2677 | /* Ignore filters with anything other than IPMI ports */ | |
3b21b508 | 2678 | if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) |
cd791618 BA |
2679 | continue; |
2680 | ||
2681 | /* Enable this decision filter in MANC2H */ | |
2682 | if (mdef) | |
2683 | manc2h |= (1 << i); | |
2684 | ||
2685 | j |= mdef; | |
2686 | } | |
2687 | ||
2688 | if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664)) | |
2689 | break; | |
2690 | ||
2691 | /* Create new decision filter in an empty filter */ | |
2692 | for (i = 0, j = 0; i < 8; i++) | |
2693 | if (er32(MDEF(i)) == 0) { | |
2694 | ew32(MDEF(i), (E1000_MDEF_PORT_623 | | |
2695 | E1000_MDEF_PORT_664)); | |
2696 | manc2h |= (1 << 1); | |
2697 | j++; | |
2698 | break; | |
2699 | } | |
2700 | ||
2701 | if (!j) | |
2702 | e_warn("Unable to create IPMI pass-through filter\n"); | |
2703 | break; | |
2704 | } | |
2705 | ||
bc7f75fa AK |
2706 | ew32(MANC2H, manc2h); |
2707 | ew32(MANC, manc); | |
2708 | } | |
2709 | ||
2710 | /** | |
af667a29 | 2711 | * e1000_configure_tx - Configure Transmit Unit after Reset |
bc7f75fa AK |
2712 | * @adapter: board private structure |
2713 | * | |
2714 | * Configure the Tx unit of the MAC after a reset. | |
2715 | **/ | |
2716 | static void e1000_configure_tx(struct e1000_adapter *adapter) | |
2717 | { | |
2718 | struct e1000_hw *hw = &adapter->hw; | |
2719 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
2720 | u64 tdba; | |
2721 | u32 tdlen, tctl, tipg, tarc; | |
2722 | u32 ipgr1, ipgr2; | |
2723 | ||
2724 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
2725 | tdba = tx_ring->dma; | |
2726 | tdlen = tx_ring->count * sizeof(struct e1000_tx_desc); | |
284901a9 | 2727 | ew32(TDBAL, (tdba & DMA_BIT_MASK(32))); |
bc7f75fa AK |
2728 | ew32(TDBAH, (tdba >> 32)); |
2729 | ew32(TDLEN, tdlen); | |
2730 | ew32(TDH, 0); | |
2731 | ew32(TDT, 0); | |
2732 | tx_ring->head = E1000_TDH; | |
2733 | tx_ring->tail = E1000_TDT; | |
2734 | ||
2735 | /* Set the default values for the Tx Inter Packet Gap timer */ | |
2736 | tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */ | |
2737 | ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */ | |
2738 | ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */ | |
2739 | ||
2740 | if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN) | |
2741 | ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */ | |
2742 | ||
2743 | tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; | |
2744 | tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; | |
2745 | ew32(TIPG, tipg); | |
2746 | ||
2747 | /* Set the Tx Interrupt Delay register */ | |
2748 | ew32(TIDV, adapter->tx_int_delay); | |
ad68076e | 2749 | /* Tx irq moderation */ |
bc7f75fa AK |
2750 | ew32(TADV, adapter->tx_abs_int_delay); |
2751 | ||
3a3b7586 JB |
2752 | if (adapter->flags2 & FLAG2_DMA_BURST) { |
2753 | u32 txdctl = er32(TXDCTL(0)); | |
2754 | txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH | | |
2755 | E1000_TXDCTL_WTHRESH); | |
2756 | /* | |
2757 | * set up some performance related parameters to encourage the | |
2758 | * hardware to use the bus more efficiently in bursts, depends | |
2759 | * on the tx_int_delay to be enabled, | |
2760 | * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time | |
2761 | * hthresh = 1 ==> prefetch when one or more available | |
2762 | * pthresh = 0x1f ==> prefetch if internal cache 31 or less | |
2763 | * BEWARE: this seems to work but should be considered first if | |
af667a29 | 2764 | * there are Tx hangs or other Tx related bugs |
3a3b7586 JB |
2765 | */ |
2766 | txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE; | |
2767 | ew32(TXDCTL(0), txdctl); | |
2768 | /* erratum work around: set txdctl the same for both queues */ | |
2769 | ew32(TXDCTL(1), txdctl); | |
2770 | } | |
2771 | ||
bc7f75fa AK |
2772 | /* Program the Transmit Control Register */ |
2773 | tctl = er32(TCTL); | |
2774 | tctl &= ~E1000_TCTL_CT; | |
2775 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | | |
2776 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); | |
2777 | ||
2778 | if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { | |
e9ec2c0f | 2779 | tarc = er32(TARC(0)); |
ad68076e BA |
2780 | /* |
2781 | * set the speed mode bit, we'll clear it if we're not at | |
2782 | * gigabit link later | |
2783 | */ | |
bc7f75fa AK |
2784 | #define SPEED_MODE_BIT (1 << 21) |
2785 | tarc |= SPEED_MODE_BIT; | |
e9ec2c0f | 2786 | ew32(TARC(0), tarc); |
bc7f75fa AK |
2787 | } |
2788 | ||
2789 | /* errata: program both queues to unweighted RR */ | |
2790 | if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { | |
e9ec2c0f | 2791 | tarc = er32(TARC(0)); |
bc7f75fa | 2792 | tarc |= 1; |
e9ec2c0f JK |
2793 | ew32(TARC(0), tarc); |
2794 | tarc = er32(TARC(1)); | |
bc7f75fa | 2795 | tarc |= 1; |
e9ec2c0f | 2796 | ew32(TARC(1), tarc); |
bc7f75fa AK |
2797 | } |
2798 | ||
bc7f75fa AK |
2799 | /* Setup Transmit Descriptor Settings for eop descriptor */ |
2800 | adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; | |
2801 | ||
2802 | /* only set IDE if we are delaying interrupts using the timers */ | |
2803 | if (adapter->tx_int_delay) | |
2804 | adapter->txd_cmd |= E1000_TXD_CMD_IDE; | |
2805 | ||
2806 | /* enable Report Status bit */ | |
2807 | adapter->txd_cmd |= E1000_TXD_CMD_RS; | |
2808 | ||
2809 | ew32(TCTL, tctl); | |
2810 | ||
edfea6e6 | 2811 | e1000e_config_collision_dist(hw); |
bc7f75fa AK |
2812 | } |
2813 | ||
2814 | /** | |
2815 | * e1000_setup_rctl - configure the receive control registers | |
2816 | * @adapter: Board private structure | |
2817 | **/ | |
2818 | #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ | |
2819 | (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) | |
2820 | static void e1000_setup_rctl(struct e1000_adapter *adapter) | |
2821 | { | |
2822 | struct e1000_hw *hw = &adapter->hw; | |
2823 | u32 rctl, rfctl; | |
bc7f75fa AK |
2824 | u32 pages = 0; |
2825 | ||
a1ce6473 BA |
2826 | /* Workaround Si errata on 82579 - configure jumbo frame flow */ |
2827 | if (hw->mac.type == e1000_pch2lan) { | |
2828 | s32 ret_val; | |
2829 | ||
2830 | if (adapter->netdev->mtu > ETH_DATA_LEN) | |
2831 | ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); | |
2832 | else | |
2833 | ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); | |
dd93f95e BA |
2834 | |
2835 | if (ret_val) | |
2836 | e_dbg("failed to enable jumbo frame workaround mode\n"); | |
a1ce6473 BA |
2837 | } |
2838 | ||
bc7f75fa AK |
2839 | /* Program MC offset vector base */ |
2840 | rctl = er32(RCTL); | |
2841 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
2842 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
2843 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
2844 | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
2845 | ||
2846 | /* Do not Store bad packets */ | |
2847 | rctl &= ~E1000_RCTL_SBP; | |
2848 | ||
2849 | /* Enable Long Packet receive */ | |
2850 | if (adapter->netdev->mtu <= ETH_DATA_LEN) | |
2851 | rctl &= ~E1000_RCTL_LPE; | |
2852 | else | |
2853 | rctl |= E1000_RCTL_LPE; | |
2854 | ||
eb7c3adb JK |
2855 | /* Some systems expect that the CRC is included in SMBUS traffic. The |
2856 | * hardware strips the CRC before sending to both SMBUS (BMC) and to | |
2857 | * host memory when this is enabled | |
2858 | */ | |
2859 | if (adapter->flags2 & FLAG2_CRC_STRIPPING) | |
2860 | rctl |= E1000_RCTL_SECRC; | |
5918bd88 | 2861 | |
a4f58f54 BA |
2862 | /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */ |
2863 | if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) { | |
2864 | u16 phy_data; | |
2865 | ||
2866 | e1e_rphy(hw, PHY_REG(770, 26), &phy_data); | |
2867 | phy_data &= 0xfff8; | |
2868 | phy_data |= (1 << 2); | |
2869 | e1e_wphy(hw, PHY_REG(770, 26), phy_data); | |
2870 | ||
2871 | e1e_rphy(hw, 22, &phy_data); | |
2872 | phy_data &= 0x0fff; | |
2873 | phy_data |= (1 << 14); | |
2874 | e1e_wphy(hw, 0x10, 0x2823); | |
2875 | e1e_wphy(hw, 0x11, 0x0003); | |
2876 | e1e_wphy(hw, 22, phy_data); | |
2877 | } | |
2878 | ||
bc7f75fa AK |
2879 | /* Setup buffer sizes */ |
2880 | rctl &= ~E1000_RCTL_SZ_4096; | |
2881 | rctl |= E1000_RCTL_BSEX; | |
2882 | switch (adapter->rx_buffer_len) { | |
bc7f75fa AK |
2883 | case 2048: |
2884 | default: | |
2885 | rctl |= E1000_RCTL_SZ_2048; | |
2886 | rctl &= ~E1000_RCTL_BSEX; | |
2887 | break; | |
2888 | case 4096: | |
2889 | rctl |= E1000_RCTL_SZ_4096; | |
2890 | break; | |
2891 | case 8192: | |
2892 | rctl |= E1000_RCTL_SZ_8192; | |
2893 | break; | |
2894 | case 16384: | |
2895 | rctl |= E1000_RCTL_SZ_16384; | |
2896 | break; | |
2897 | } | |
2898 | ||
5f450212 BA |
2899 | /* Enable Extended Status in all Receive Descriptors */ |
2900 | rfctl = er32(RFCTL); | |
2901 | rfctl |= E1000_RFCTL_EXTEN; | |
2902 | ||
bc7f75fa AK |
2903 | /* |
2904 | * 82571 and greater support packet-split where the protocol | |
2905 | * header is placed in skb->data and the packet data is | |
2906 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
2907 | * In the case of a non-split, skb->data is linearly filled, | |
2908 | * followed by the page buffers. Therefore, skb->data is | |
2909 | * sized to hold the largest protocol header. | |
2910 | * | |
2911 | * allocations using alloc_page take too long for regular MTU | |
2912 | * so only enable packet split for jumbo frames | |
2913 | * | |
2914 | * Using pages when the page size is greater than 16k wastes | |
2915 | * a lot of memory, since we allocate 3 pages at all times | |
2916 | * per packet. | |
2917 | */ | |
bc7f75fa | 2918 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
dbcb9fec | 2919 | if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) && |
97ac8cae | 2920 | (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) |
bc7f75fa | 2921 | adapter->rx_ps_pages = pages; |
97ac8cae BA |
2922 | else |
2923 | adapter->rx_ps_pages = 0; | |
bc7f75fa AK |
2924 | |
2925 | if (adapter->rx_ps_pages) { | |
90da0669 BA |
2926 | u32 psrctl = 0; |
2927 | ||
ad68076e BA |
2928 | /* |
2929 | * disable packet split support for IPv6 extension headers, | |
2930 | * because some malformed IPv6 headers can hang the Rx | |
2931 | */ | |
bc7f75fa AK |
2932 | rfctl |= (E1000_RFCTL_IPV6_EX_DIS | |
2933 | E1000_RFCTL_NEW_IPV6_EXT_DIS); | |
2934 | ||
140a7480 AK |
2935 | /* Enable Packet split descriptors */ |
2936 | rctl |= E1000_RCTL_DTYP_PS; | |
bc7f75fa AK |
2937 | |
2938 | psrctl |= adapter->rx_ps_bsize0 >> | |
2939 | E1000_PSRCTL_BSIZE0_SHIFT; | |
2940 | ||
2941 | switch (adapter->rx_ps_pages) { | |
2942 | case 3: | |
2943 | psrctl |= PAGE_SIZE << | |
2944 | E1000_PSRCTL_BSIZE3_SHIFT; | |
2945 | case 2: | |
2946 | psrctl |= PAGE_SIZE << | |
2947 | E1000_PSRCTL_BSIZE2_SHIFT; | |
2948 | case 1: | |
2949 | psrctl |= PAGE_SIZE >> | |
2950 | E1000_PSRCTL_BSIZE1_SHIFT; | |
2951 | break; | |
2952 | } | |
2953 | ||
2954 | ew32(PSRCTL, psrctl); | |
2955 | } | |
2956 | ||
5f450212 | 2957 | ew32(RFCTL, rfctl); |
bc7f75fa | 2958 | ew32(RCTL, rctl); |
318a94d6 JK |
2959 | /* just started the receive unit, no need to restart */ |
2960 | adapter->flags &= ~FLAG_RX_RESTART_NOW; | |
bc7f75fa AK |
2961 | } |
2962 | ||
2963 | /** | |
2964 | * e1000_configure_rx - Configure Receive Unit after Reset | |
2965 | * @adapter: board private structure | |
2966 | * | |
2967 | * Configure the Rx unit of the MAC after a reset. | |
2968 | **/ | |
2969 | static void e1000_configure_rx(struct e1000_adapter *adapter) | |
2970 | { | |
2971 | struct e1000_hw *hw = &adapter->hw; | |
2972 | struct e1000_ring *rx_ring = adapter->rx_ring; | |
2973 | u64 rdba; | |
2974 | u32 rdlen, rctl, rxcsum, ctrl_ext; | |
2975 | ||
2976 | if (adapter->rx_ps_pages) { | |
2977 | /* this is a 32 byte descriptor */ | |
2978 | rdlen = rx_ring->count * | |
af667a29 | 2979 | sizeof(union e1000_rx_desc_packet_split); |
bc7f75fa AK |
2980 | adapter->clean_rx = e1000_clean_rx_irq_ps; |
2981 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | |
97ac8cae | 2982 | } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { |
5f450212 | 2983 | rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); |
97ac8cae BA |
2984 | adapter->clean_rx = e1000_clean_jumbo_rx_irq; |
2985 | adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; | |
bc7f75fa | 2986 | } else { |
5f450212 | 2987 | rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended); |
bc7f75fa AK |
2988 | adapter->clean_rx = e1000_clean_rx_irq; |
2989 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | |
2990 | } | |
2991 | ||
2992 | /* disable receives while setting up the descriptors */ | |
2993 | rctl = er32(RCTL); | |
7f99ae63 BA |
2994 | if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) |
2995 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
bc7f75fa | 2996 | e1e_flush(); |
1bba4386 | 2997 | usleep_range(10000, 20000); |
bc7f75fa | 2998 | |
3a3b7586 JB |
2999 | if (adapter->flags2 & FLAG2_DMA_BURST) { |
3000 | /* | |
3001 | * set the writeback threshold (only takes effect if the RDTR | |
3002 | * is set). set GRAN=1 and write back up to 0x4 worth, and | |
af667a29 | 3003 | * enable prefetching of 0x20 Rx descriptors |
3a3b7586 JB |
3004 | * granularity = 01 |
3005 | * wthresh = 04, | |
3006 | * hthresh = 04, | |
3007 | * pthresh = 0x20 | |
3008 | */ | |
3009 | ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); | |
3010 | ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); | |
3011 | ||
3012 | /* | |
3013 | * override the delay timers for enabling bursting, only if | |
3014 | * the value was not set by the user via module options | |
3015 | */ | |
3016 | if (adapter->rx_int_delay == DEFAULT_RDTR) | |
3017 | adapter->rx_int_delay = BURST_RDTR; | |
3018 | if (adapter->rx_abs_int_delay == DEFAULT_RADV) | |
3019 | adapter->rx_abs_int_delay = BURST_RADV; | |
3020 | } | |
3021 | ||
bc7f75fa AK |
3022 | /* set the Receive Delay Timer Register */ |
3023 | ew32(RDTR, adapter->rx_int_delay); | |
3024 | ||
3025 | /* irq moderation */ | |
3026 | ew32(RADV, adapter->rx_abs_int_delay); | |
828bac87 | 3027 | if ((adapter->itr_setting != 0) && (adapter->itr != 0)) |
ad68076e | 3028 | ew32(ITR, 1000000000 / (adapter->itr * 256)); |
bc7f75fa AK |
3029 | |
3030 | ctrl_ext = er32(CTRL_EXT); | |
bc7f75fa AK |
3031 | /* Auto-Mask interrupts upon ICR access */ |
3032 | ctrl_ext |= E1000_CTRL_EXT_IAME; | |
3033 | ew32(IAM, 0xffffffff); | |
3034 | ew32(CTRL_EXT, ctrl_ext); | |
3035 | e1e_flush(); | |
3036 | ||
ad68076e BA |
3037 | /* |
3038 | * Setup the HW Rx Head and Tail Descriptor Pointers and | |
3039 | * the Base and Length of the Rx Descriptor Ring | |
3040 | */ | |
bc7f75fa | 3041 | rdba = rx_ring->dma; |
284901a9 | 3042 | ew32(RDBAL, (rdba & DMA_BIT_MASK(32))); |
bc7f75fa AK |
3043 | ew32(RDBAH, (rdba >> 32)); |
3044 | ew32(RDLEN, rdlen); | |
3045 | ew32(RDH, 0); | |
3046 | ew32(RDT, 0); | |
3047 | rx_ring->head = E1000_RDH; | |
3048 | rx_ring->tail = E1000_RDT; | |
3049 | ||
3050 | /* Enable Receive Checksum Offload for TCP and UDP */ | |
3051 | rxcsum = er32(RXCSUM); | |
dc221294 | 3052 | if (adapter->netdev->features & NETIF_F_RXCSUM) { |
bc7f75fa AK |
3053 | rxcsum |= E1000_RXCSUM_TUOFL; |
3054 | ||
ad68076e BA |
3055 | /* |
3056 | * IPv4 payload checksum for UDP fragments must be | |
3057 | * used in conjunction with packet-split. | |
3058 | */ | |
bc7f75fa AK |
3059 | if (adapter->rx_ps_pages) |
3060 | rxcsum |= E1000_RXCSUM_IPPCSE; | |
3061 | } else { | |
3062 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
3063 | /* no need to clear IPPCSE as it defaults to 0 */ | |
3064 | } | |
3065 | ew32(RXCSUM, rxcsum); | |
3066 | ||
ad68076e BA |
3067 | /* |
3068 | * Enable early receives on supported devices, only takes effect when | |
bc7f75fa | 3069 | * packet size is equal or larger than the specified value (in 8 byte |
ad68076e BA |
3070 | * units), e.g. using jumbo frames when setting to E1000_ERT_2048 |
3071 | */ | |
828bac87 BA |
3072 | if ((adapter->flags & FLAG_HAS_ERT) || |
3073 | (adapter->hw.mac.type == e1000_pch2lan)) { | |
53ec5498 BA |
3074 | if (adapter->netdev->mtu > ETH_DATA_LEN) { |
3075 | u32 rxdctl = er32(RXDCTL(0)); | |
3076 | ew32(RXDCTL(0), rxdctl | 0x3); | |
828bac87 BA |
3077 | if (adapter->flags & FLAG_HAS_ERT) |
3078 | ew32(ERT, E1000_ERT_2048 | (1 << 13)); | |
53ec5498 BA |
3079 | /* |
3080 | * With jumbo frames and early-receive enabled, | |
3081 | * excessive C-state transition latencies result in | |
3082 | * dropped transactions. | |
3083 | */ | |
af667a29 | 3084 | pm_qos_update_request(&adapter->netdev->pm_qos_req, 55); |
53ec5498 | 3085 | } else { |
af667a29 BA |
3086 | pm_qos_update_request(&adapter->netdev->pm_qos_req, |
3087 | PM_QOS_DEFAULT_VALUE); | |
53ec5498 | 3088 | } |
97ac8cae | 3089 | } |
bc7f75fa AK |
3090 | |
3091 | /* Enable Receives */ | |
3092 | ew32(RCTL, rctl); | |
3093 | } | |
3094 | ||
3095 | /** | |
ef9b965a JB |
3096 | * e1000e_write_mc_addr_list - write multicast addresses to MTA |
3097 | * @netdev: network interface device structure | |
bc7f75fa | 3098 | * |
ef9b965a JB |
3099 | * Writes multicast address list to the MTA hash table. |
3100 | * Returns: -ENOMEM on failure | |
3101 | * 0 on no addresses written | |
3102 | * X on writing X addresses to MTA | |
3103 | */ | |
3104 | static int e1000e_write_mc_addr_list(struct net_device *netdev) | |
3105 | { | |
3106 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3107 | struct e1000_hw *hw = &adapter->hw; | |
3108 | struct netdev_hw_addr *ha; | |
3109 | u8 *mta_list; | |
3110 | int i; | |
3111 | ||
3112 | if (netdev_mc_empty(netdev)) { | |
3113 | /* nothing to program, so clear mc list */ | |
3114 | hw->mac.ops.update_mc_addr_list(hw, NULL, 0); | |
3115 | return 0; | |
3116 | } | |
3117 | ||
3118 | mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC); | |
3119 | if (!mta_list) | |
3120 | return -ENOMEM; | |
3121 | ||
3122 | /* update_mc_addr_list expects a packed array of only addresses. */ | |
3123 | i = 0; | |
3124 | netdev_for_each_mc_addr(ha, netdev) | |
3125 | memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); | |
3126 | ||
3127 | hw->mac.ops.update_mc_addr_list(hw, mta_list, i); | |
3128 | kfree(mta_list); | |
3129 | ||
3130 | return netdev_mc_count(netdev); | |
3131 | } | |
3132 | ||
3133 | /** | |
3134 | * e1000e_write_uc_addr_list - write unicast addresses to RAR table | |
3135 | * @netdev: network interface device structure | |
bc7f75fa | 3136 | * |
ef9b965a JB |
3137 | * Writes unicast address list to the RAR table. |
3138 | * Returns: -ENOMEM on failure/insufficient address space | |
3139 | * 0 on no addresses written | |
3140 | * X on writing X addresses to the RAR table | |
bc7f75fa | 3141 | **/ |
ef9b965a | 3142 | static int e1000e_write_uc_addr_list(struct net_device *netdev) |
bc7f75fa | 3143 | { |
ef9b965a JB |
3144 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3145 | struct e1000_hw *hw = &adapter->hw; | |
3146 | unsigned int rar_entries = hw->mac.rar_entry_count; | |
3147 | int count = 0; | |
3148 | ||
3149 | /* save a rar entry for our hardware address */ | |
3150 | rar_entries--; | |
3151 | ||
3152 | /* save a rar entry for the LAA workaround */ | |
3153 | if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) | |
3154 | rar_entries--; | |
3155 | ||
3156 | /* return ENOMEM indicating insufficient memory for addresses */ | |
3157 | if (netdev_uc_count(netdev) > rar_entries) | |
3158 | return -ENOMEM; | |
3159 | ||
3160 | if (!netdev_uc_empty(netdev) && rar_entries) { | |
3161 | struct netdev_hw_addr *ha; | |
3162 | ||
3163 | /* | |
3164 | * write the addresses in reverse order to avoid write | |
3165 | * combining | |
3166 | */ | |
3167 | netdev_for_each_uc_addr(ha, netdev) { | |
3168 | if (!rar_entries) | |
3169 | break; | |
3170 | e1000e_rar_set(hw, ha->addr, rar_entries--); | |
3171 | count++; | |
3172 | } | |
3173 | } | |
3174 | ||
3175 | /* zero out the remaining RAR entries not used above */ | |
3176 | for (; rar_entries > 0; rar_entries--) { | |
3177 | ew32(RAH(rar_entries), 0); | |
3178 | ew32(RAL(rar_entries), 0); | |
3179 | } | |
3180 | e1e_flush(); | |
3181 | ||
3182 | return count; | |
bc7f75fa AK |
3183 | } |
3184 | ||
3185 | /** | |
ef9b965a | 3186 | * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set |
bc7f75fa AK |
3187 | * @netdev: network interface device structure |
3188 | * | |
ef9b965a JB |
3189 | * The ndo_set_rx_mode entry point is called whenever the unicast or multicast |
3190 | * address list or the network interface flags are updated. This routine is | |
3191 | * responsible for configuring the hardware for proper unicast, multicast, | |
bc7f75fa AK |
3192 | * promiscuous mode, and all-multi behavior. |
3193 | **/ | |
ef9b965a | 3194 | static void e1000e_set_rx_mode(struct net_device *netdev) |
bc7f75fa AK |
3195 | { |
3196 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3197 | struct e1000_hw *hw = &adapter->hw; | |
bc7f75fa | 3198 | u32 rctl; |
bc7f75fa AK |
3199 | |
3200 | /* Check for Promiscuous and All Multicast modes */ | |
bc7f75fa AK |
3201 | rctl = er32(RCTL); |
3202 | ||
ef9b965a JB |
3203 | /* clear the affected bits */ |
3204 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
3205 | ||
bc7f75fa AK |
3206 | if (netdev->flags & IFF_PROMISC) { |
3207 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); | |
86d70e53 JK |
3208 | /* Do not hardware filter VLANs in promisc mode */ |
3209 | e1000e_vlan_filter_disable(adapter); | |
bc7f75fa | 3210 | } else { |
ef9b965a | 3211 | int count; |
746b9f02 PM |
3212 | if (netdev->flags & IFF_ALLMULTI) { |
3213 | rctl |= E1000_RCTL_MPE; | |
746b9f02 | 3214 | } else { |
ef9b965a JB |
3215 | /* |
3216 | * Write addresses to the MTA, if the attempt fails | |
3217 | * then we should just turn on promiscuous mode so | |
3218 | * that we can at least receive multicast traffic | |
3219 | */ | |
3220 | count = e1000e_write_mc_addr_list(netdev); | |
3221 | if (count < 0) | |
3222 | rctl |= E1000_RCTL_MPE; | |
746b9f02 | 3223 | } |
86d70e53 | 3224 | e1000e_vlan_filter_enable(adapter); |
bc7f75fa | 3225 | /* |
ef9b965a JB |
3226 | * Write addresses to available RAR registers, if there is not |
3227 | * sufficient space to store all the addresses then enable | |
3228 | * unicast promiscuous mode | |
bc7f75fa | 3229 | */ |
ef9b965a JB |
3230 | count = e1000e_write_uc_addr_list(netdev); |
3231 | if (count < 0) | |
3232 | rctl |= E1000_RCTL_UPE; | |
bc7f75fa | 3233 | } |
86d70e53 | 3234 | |
ef9b965a JB |
3235 | ew32(RCTL, rctl); |
3236 | ||
86d70e53 JK |
3237 | if (netdev->features & NETIF_F_HW_VLAN_RX) |
3238 | e1000e_vlan_strip_enable(adapter); | |
3239 | else | |
3240 | e1000e_vlan_strip_disable(adapter); | |
bc7f75fa AK |
3241 | } |
3242 | ||
3243 | /** | |
ad68076e | 3244 | * e1000_configure - configure the hardware for Rx and Tx |
bc7f75fa AK |
3245 | * @adapter: private board structure |
3246 | **/ | |
3247 | static void e1000_configure(struct e1000_adapter *adapter) | |
3248 | { | |
ef9b965a | 3249 | e1000e_set_rx_mode(adapter->netdev); |
bc7f75fa AK |
3250 | |
3251 | e1000_restore_vlan(adapter); | |
cd791618 | 3252 | e1000_init_manageability_pt(adapter); |
bc7f75fa AK |
3253 | |
3254 | e1000_configure_tx(adapter); | |
3255 | e1000_setup_rctl(adapter); | |
3256 | e1000_configure_rx(adapter); | |
c2fed996 JK |
3257 | adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring), |
3258 | GFP_KERNEL); | |
bc7f75fa AK |
3259 | } |
3260 | ||
3261 | /** | |
3262 | * e1000e_power_up_phy - restore link in case the phy was powered down | |
3263 | * @adapter: address of board private structure | |
3264 | * | |
3265 | * The phy may be powered down to save power and turn off link when the | |
3266 | * driver is unloaded and wake on lan is not enabled (among others) | |
3267 | * *** this routine MUST be followed by a call to e1000e_reset *** | |
3268 | **/ | |
3269 | void e1000e_power_up_phy(struct e1000_adapter *adapter) | |
3270 | { | |
17f208de BA |
3271 | if (adapter->hw.phy.ops.power_up) |
3272 | adapter->hw.phy.ops.power_up(&adapter->hw); | |
bc7f75fa AK |
3273 | |
3274 | adapter->hw.mac.ops.setup_link(&adapter->hw); | |
3275 | } | |
3276 | ||
3277 | /** | |
3278 | * e1000_power_down_phy - Power down the PHY | |
3279 | * | |
17f208de BA |
3280 | * Power down the PHY so no link is implied when interface is down. |
3281 | * The PHY cannot be powered down if management or WoL is active. | |
bc7f75fa AK |
3282 | */ |
3283 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | |
3284 | { | |
bc7f75fa | 3285 | /* WoL is enabled */ |
23b66e2b | 3286 | if (adapter->wol) |
bc7f75fa AK |
3287 | return; |
3288 | ||
17f208de BA |
3289 | if (adapter->hw.phy.ops.power_down) |
3290 | adapter->hw.phy.ops.power_down(&adapter->hw); | |
bc7f75fa AK |
3291 | } |
3292 | ||
3293 | /** | |
3294 | * e1000e_reset - bring the hardware into a known good state | |
3295 | * | |
3296 | * This function boots the hardware and enables some settings that | |
3297 | * require a configuration cycle of the hardware - those cannot be | |
3298 | * set/changed during runtime. After reset the device needs to be | |
ad68076e | 3299 | * properly configured for Rx, Tx etc. |
bc7f75fa AK |
3300 | */ |
3301 | void e1000e_reset(struct e1000_adapter *adapter) | |
3302 | { | |
3303 | struct e1000_mac_info *mac = &adapter->hw.mac; | |
318a94d6 | 3304 | struct e1000_fc_info *fc = &adapter->hw.fc; |
bc7f75fa AK |
3305 | struct e1000_hw *hw = &adapter->hw; |
3306 | u32 tx_space, min_tx_space, min_rx_space; | |
318a94d6 | 3307 | u32 pba = adapter->pba; |
bc7f75fa AK |
3308 | u16 hwm; |
3309 | ||
ad68076e | 3310 | /* reset Packet Buffer Allocation to default */ |
318a94d6 | 3311 | ew32(PBA, pba); |
df762464 | 3312 | |
318a94d6 | 3313 | if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { |
ad68076e BA |
3314 | /* |
3315 | * To maintain wire speed transmits, the Tx FIFO should be | |
bc7f75fa AK |
3316 | * large enough to accommodate two full transmit packets, |
3317 | * rounded up to the next 1KB and expressed in KB. Likewise, | |
3318 | * the Rx FIFO should be large enough to accommodate at least | |
3319 | * one full receive packet and is similarly rounded up and | |
ad68076e BA |
3320 | * expressed in KB. |
3321 | */ | |
df762464 | 3322 | pba = er32(PBA); |
bc7f75fa | 3323 | /* upper 16 bits has Tx packet buffer allocation size in KB */ |
df762464 | 3324 | tx_space = pba >> 16; |
bc7f75fa | 3325 | /* lower 16 bits has Rx packet buffer allocation size in KB */ |
df762464 | 3326 | pba &= 0xffff; |
ad68076e | 3327 | /* |
af667a29 | 3328 | * the Tx fifo also stores 16 bytes of information about the Tx |
ad68076e | 3329 | * but don't include ethernet FCS because hardware appends it |
318a94d6 JK |
3330 | */ |
3331 | min_tx_space = (adapter->max_frame_size + | |
bc7f75fa AK |
3332 | sizeof(struct e1000_tx_desc) - |
3333 | ETH_FCS_LEN) * 2; | |
3334 | min_tx_space = ALIGN(min_tx_space, 1024); | |
3335 | min_tx_space >>= 10; | |
3336 | /* software strips receive CRC, so leave room for it */ | |
318a94d6 | 3337 | min_rx_space = adapter->max_frame_size; |
bc7f75fa AK |
3338 | min_rx_space = ALIGN(min_rx_space, 1024); |
3339 | min_rx_space >>= 10; | |
3340 | ||
ad68076e BA |
3341 | /* |
3342 | * If current Tx allocation is less than the min Tx FIFO size, | |
bc7f75fa | 3343 | * and the min Tx FIFO size is less than the current Rx FIFO |
ad68076e BA |
3344 | * allocation, take space away from current Rx allocation |
3345 | */ | |
df762464 AK |
3346 | if ((tx_space < min_tx_space) && |
3347 | ((min_tx_space - tx_space) < pba)) { | |
3348 | pba -= min_tx_space - tx_space; | |
bc7f75fa | 3349 | |
ad68076e | 3350 | /* |
af667a29 | 3351 | * if short on Rx space, Rx wins and must trump Tx |
ad68076e BA |
3352 | * adjustment or use Early Receive if available |
3353 | */ | |
df762464 | 3354 | if ((pba < min_rx_space) && |
bc7f75fa AK |
3355 | (!(adapter->flags & FLAG_HAS_ERT))) |
3356 | /* ERT enabled in e1000_configure_rx */ | |
df762464 | 3357 | pba = min_rx_space; |
bc7f75fa | 3358 | } |
df762464 AK |
3359 | |
3360 | ew32(PBA, pba); | |
bc7f75fa AK |
3361 | } |
3362 | ||
ad68076e BA |
3363 | /* |
3364 | * flow control settings | |
3365 | * | |
38eb394e | 3366 | * The high water mark must be low enough to fit one full frame |
bc7f75fa AK |
3367 | * (or the size used for early receive) above it in the Rx FIFO. |
3368 | * Set it to the lower of: | |
3369 | * - 90% of the Rx FIFO size, and | |
3370 | * - the full Rx FIFO size minus the early receive size (for parts | |
3371 | * with ERT support assuming ERT set to E1000_ERT_2048), or | |
38eb394e | 3372 | * - the full Rx FIFO size minus one full frame |
ad68076e | 3373 | */ |
d3738bb8 BA |
3374 | if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME) |
3375 | fc->pause_time = 0xFFFF; | |
3376 | else | |
3377 | fc->pause_time = E1000_FC_PAUSE_TIME; | |
3378 | fc->send_xon = 1; | |
3379 | fc->current_mode = fc->requested_mode; | |
3380 | ||
3381 | switch (hw->mac.type) { | |
3382 | default: | |
3383 | if ((adapter->flags & FLAG_HAS_ERT) && | |
3384 | (adapter->netdev->mtu > ETH_DATA_LEN)) | |
3385 | hwm = min(((pba << 10) * 9 / 10), | |
3386 | ((pba << 10) - (E1000_ERT_2048 << 3))); | |
3387 | else | |
3388 | hwm = min(((pba << 10) * 9 / 10), | |
3389 | ((pba << 10) - adapter->max_frame_size)); | |
3390 | ||
3391 | fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ | |
3392 | fc->low_water = fc->high_water - 8; | |
3393 | break; | |
3394 | case e1000_pchlan: | |
38eb394e BA |
3395 | /* |
3396 | * Workaround PCH LOM adapter hangs with certain network | |
3397 | * loads. If hangs persist, try disabling Tx flow control. | |
3398 | */ | |
3399 | if (adapter->netdev->mtu > ETH_DATA_LEN) { | |
3400 | fc->high_water = 0x3500; | |
3401 | fc->low_water = 0x1500; | |
3402 | } else { | |
3403 | fc->high_water = 0x5000; | |
3404 | fc->low_water = 0x3000; | |
3405 | } | |
a305595b | 3406 | fc->refresh_time = 0x1000; |
d3738bb8 BA |
3407 | break; |
3408 | case e1000_pch2lan: | |
3409 | fc->high_water = 0x05C20; | |
3410 | fc->low_water = 0x05048; | |
3411 | fc->pause_time = 0x0650; | |
3412 | fc->refresh_time = 0x0400; | |
828bac87 BA |
3413 | if (adapter->netdev->mtu > ETH_DATA_LEN) { |
3414 | pba = 14; | |
3415 | ew32(PBA, pba); | |
3416 | } | |
d3738bb8 | 3417 | break; |
38eb394e | 3418 | } |
bc7f75fa | 3419 | |
828bac87 BA |
3420 | /* |
3421 | * Disable Adaptive Interrupt Moderation if 2 full packets cannot | |
3422 | * fit in receive buffer and early-receive not supported. | |
3423 | */ | |
3424 | if (adapter->itr_setting & 0x3) { | |
3425 | if (((adapter->max_frame_size * 2) > (pba << 10)) && | |
3426 | !(adapter->flags & FLAG_HAS_ERT)) { | |
3427 | if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) { | |
3428 | dev_info(&adapter->pdev->dev, | |
3429 | "Interrupt Throttle Rate turned off\n"); | |
3430 | adapter->flags2 |= FLAG2_DISABLE_AIM; | |
3431 | ew32(ITR, 0); | |
3432 | } | |
3433 | } else if (adapter->flags2 & FLAG2_DISABLE_AIM) { | |
3434 | dev_info(&adapter->pdev->dev, | |
3435 | "Interrupt Throttle Rate turned on\n"); | |
3436 | adapter->flags2 &= ~FLAG2_DISABLE_AIM; | |
3437 | adapter->itr = 20000; | |
3438 | ew32(ITR, 1000000000 / (adapter->itr * 256)); | |
3439 | } | |
3440 | } | |
3441 | ||
bc7f75fa AK |
3442 | /* Allow time for pending master requests to run */ |
3443 | mac->ops.reset_hw(hw); | |
97ac8cae BA |
3444 | |
3445 | /* | |
3446 | * For parts with AMT enabled, let the firmware know | |
3447 | * that the network interface is in control | |
3448 | */ | |
c43bc57e | 3449 | if (adapter->flags & FLAG_HAS_AMT) |
31dbe5b4 | 3450 | e1000e_get_hw_control(adapter); |
97ac8cae | 3451 | |
bc7f75fa AK |
3452 | ew32(WUC, 0); |
3453 | ||
3454 | if (mac->ops.init_hw(hw)) | |
44defeb3 | 3455 | e_err("Hardware Error\n"); |
bc7f75fa AK |
3456 | |
3457 | e1000_update_mng_vlan(adapter); | |
3458 | ||
3459 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ | |
3460 | ew32(VET, ETH_P_8021Q); | |
3461 | ||
3462 | e1000e_reset_adaptive(hw); | |
31dbe5b4 BA |
3463 | |
3464 | if (!netif_running(adapter->netdev) && | |
3465 | !test_bit(__E1000_TESTING, &adapter->state)) { | |
3466 | e1000_power_down_phy(adapter); | |
3467 | return; | |
3468 | } | |
3469 | ||
bc7f75fa AK |
3470 | e1000_get_phy_info(hw); |
3471 | ||
918d7197 BA |
3472 | if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && |
3473 | !(adapter->flags & FLAG_SMART_POWER_DOWN)) { | |
bc7f75fa | 3474 | u16 phy_data = 0; |
ad68076e BA |
3475 | /* |
3476 | * speed up time to link by disabling smart power down, ignore | |
bc7f75fa | 3477 | * the return value of this function because there is nothing |
ad68076e BA |
3478 | * different we would do if it failed |
3479 | */ | |
bc7f75fa AK |
3480 | e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data); |
3481 | phy_data &= ~IGP02E1000_PM_SPD; | |
3482 | e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data); | |
3483 | } | |
bc7f75fa AK |
3484 | } |
3485 | ||
3486 | int e1000e_up(struct e1000_adapter *adapter) | |
3487 | { | |
3488 | struct e1000_hw *hw = &adapter->hw; | |
3489 | ||
3490 | /* hardware has been reset, we need to reload some things */ | |
3491 | e1000_configure(adapter); | |
3492 | ||
3493 | clear_bit(__E1000_DOWN, &adapter->state); | |
3494 | ||
3495 | napi_enable(&adapter->napi); | |
4662e82b BA |
3496 | if (adapter->msix_entries) |
3497 | e1000_configure_msix(adapter); | |
bc7f75fa AK |
3498 | e1000_irq_enable(adapter); |
3499 | ||
400484fa | 3500 | netif_start_queue(adapter->netdev); |
4cb9be7a | 3501 | |
bc7f75fa | 3502 | /* fire a link change interrupt to start the watchdog */ |
52a9b231 BA |
3503 | if (adapter->msix_entries) |
3504 | ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); | |
3505 | else | |
3506 | ew32(ICS, E1000_ICS_LSC); | |
3507 | ||
bc7f75fa AK |
3508 | return 0; |
3509 | } | |
3510 | ||
713b3c9e JB |
3511 | static void e1000e_flush_descriptors(struct e1000_adapter *adapter) |
3512 | { | |
3513 | struct e1000_hw *hw = &adapter->hw; | |
3514 | ||
3515 | if (!(adapter->flags2 & FLAG2_DMA_BURST)) | |
3516 | return; | |
3517 | ||
3518 | /* flush pending descriptor writebacks to memory */ | |
3519 | ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); | |
3520 | ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); | |
3521 | ||
3522 | /* execute the writes immediately */ | |
3523 | e1e_flush(); | |
3524 | } | |
3525 | ||
67fd4fcb JK |
3526 | static void e1000e_update_stats(struct e1000_adapter *adapter); |
3527 | ||
bc7f75fa AK |
3528 | void e1000e_down(struct e1000_adapter *adapter) |
3529 | { | |
3530 | struct net_device *netdev = adapter->netdev; | |
3531 | struct e1000_hw *hw = &adapter->hw; | |
3532 | u32 tctl, rctl; | |
3533 | ||
ad68076e BA |
3534 | /* |
3535 | * signal that we're down so the interrupt handler does not | |
3536 | * reschedule our watchdog timer | |
3537 | */ | |
bc7f75fa AK |
3538 | set_bit(__E1000_DOWN, &adapter->state); |
3539 | ||
3540 | /* disable receives in the hardware */ | |
3541 | rctl = er32(RCTL); | |
7f99ae63 BA |
3542 | if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX)) |
3543 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
bc7f75fa AK |
3544 | /* flush and sleep below */ |
3545 | ||
4cb9be7a | 3546 | netif_stop_queue(netdev); |
bc7f75fa AK |
3547 | |
3548 | /* disable transmits in the hardware */ | |
3549 | tctl = er32(TCTL); | |
3550 | tctl &= ~E1000_TCTL_EN; | |
3551 | ew32(TCTL, tctl); | |
7f99ae63 | 3552 | |
bc7f75fa AK |
3553 | /* flush both disables and wait for them to finish */ |
3554 | e1e_flush(); | |
1bba4386 | 3555 | usleep_range(10000, 20000); |
bc7f75fa AK |
3556 | |
3557 | napi_disable(&adapter->napi); | |
3558 | e1000_irq_disable(adapter); | |
3559 | ||
3560 | del_timer_sync(&adapter->watchdog_timer); | |
3561 | del_timer_sync(&adapter->phy_info_timer); | |
3562 | ||
bc7f75fa | 3563 | netif_carrier_off(netdev); |
67fd4fcb JK |
3564 | |
3565 | spin_lock(&adapter->stats64_lock); | |
3566 | e1000e_update_stats(adapter); | |
3567 | spin_unlock(&adapter->stats64_lock); | |
3568 | ||
400484fa BA |
3569 | e1000e_flush_descriptors(adapter); |
3570 | e1000_clean_tx_ring(adapter); | |
3571 | e1000_clean_rx_ring(adapter); | |
3572 | ||
bc7f75fa AK |
3573 | adapter->link_speed = 0; |
3574 | adapter->link_duplex = 0; | |
3575 | ||
52cc3086 JK |
3576 | if (!pci_channel_offline(adapter->pdev)) |
3577 | e1000e_reset(adapter); | |
713b3c9e | 3578 | |
bc7f75fa AK |
3579 | /* |
3580 | * TODO: for power management, we could drop the link and | |
3581 | * pci_disable_device here. | |
3582 | */ | |
3583 | } | |
3584 | ||
3585 | void e1000e_reinit_locked(struct e1000_adapter *adapter) | |
3586 | { | |
3587 | might_sleep(); | |
3588 | while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) | |
1bba4386 | 3589 | usleep_range(1000, 2000); |
bc7f75fa AK |
3590 | e1000e_down(adapter); |
3591 | e1000e_up(adapter); | |
3592 | clear_bit(__E1000_RESETTING, &adapter->state); | |
3593 | } | |
3594 | ||
3595 | /** | |
3596 | * e1000_sw_init - Initialize general software structures (struct e1000_adapter) | |
3597 | * @adapter: board private structure to initialize | |
3598 | * | |
3599 | * e1000_sw_init initializes the Adapter private data structure. | |
3600 | * Fields are initialized based on PCI device information and | |
3601 | * OS network device settings (MTU size). | |
3602 | **/ | |
3603 | static int __devinit e1000_sw_init(struct e1000_adapter *adapter) | |
3604 | { | |
bc7f75fa AK |
3605 | struct net_device *netdev = adapter->netdev; |
3606 | ||
3607 | adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN; | |
3608 | adapter->rx_ps_bsize0 = 128; | |
318a94d6 JK |
3609 | adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
3610 | adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; | |
bc7f75fa | 3611 | |
67fd4fcb JK |
3612 | spin_lock_init(&adapter->stats64_lock); |
3613 | ||
4662e82b | 3614 | e1000e_set_interrupt_capability(adapter); |
bc7f75fa | 3615 | |
4662e82b BA |
3616 | if (e1000_alloc_queues(adapter)) |
3617 | return -ENOMEM; | |
bc7f75fa | 3618 | |
bc7f75fa | 3619 | /* Explicitly disable IRQ since the NIC can be in any state. */ |
bc7f75fa AK |
3620 | e1000_irq_disable(adapter); |
3621 | ||
bc7f75fa AK |
3622 | set_bit(__E1000_DOWN, &adapter->state); |
3623 | return 0; | |
bc7f75fa AK |
3624 | } |
3625 | ||
f8d59f78 BA |
3626 | /** |
3627 | * e1000_intr_msi_test - Interrupt Handler | |
3628 | * @irq: interrupt number | |
3629 | * @data: pointer to a network interface device structure | |
3630 | **/ | |
3631 | static irqreturn_t e1000_intr_msi_test(int irq, void *data) | |
3632 | { | |
3633 | struct net_device *netdev = data; | |
3634 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3635 | struct e1000_hw *hw = &adapter->hw; | |
3636 | u32 icr = er32(ICR); | |
3637 | ||
3bb99fe2 | 3638 | e_dbg("icr is %08X\n", icr); |
f8d59f78 BA |
3639 | if (icr & E1000_ICR_RXSEQ) { |
3640 | adapter->flags &= ~FLAG_MSI_TEST_FAILED; | |
3641 | wmb(); | |
3642 | } | |
3643 | ||
3644 | return IRQ_HANDLED; | |
3645 | } | |
3646 | ||
3647 | /** | |
3648 | * e1000_test_msi_interrupt - Returns 0 for successful test | |
3649 | * @adapter: board private struct | |
3650 | * | |
3651 | * code flow taken from tg3.c | |
3652 | **/ | |
3653 | static int e1000_test_msi_interrupt(struct e1000_adapter *adapter) | |
3654 | { | |
3655 | struct net_device *netdev = adapter->netdev; | |
3656 | struct e1000_hw *hw = &adapter->hw; | |
3657 | int err; | |
3658 | ||
3659 | /* poll_enable hasn't been called yet, so don't need disable */ | |
3660 | /* clear any pending events */ | |
3661 | er32(ICR); | |
3662 | ||
3663 | /* free the real vector and request a test handler */ | |
3664 | e1000_free_irq(adapter); | |
4662e82b | 3665 | e1000e_reset_interrupt_capability(adapter); |
f8d59f78 BA |
3666 | |
3667 | /* Assume that the test fails, if it succeeds then the test | |
3668 | * MSI irq handler will unset this flag */ | |
3669 | adapter->flags |= FLAG_MSI_TEST_FAILED; | |
3670 | ||
3671 | err = pci_enable_msi(adapter->pdev); | |
3672 | if (err) | |
3673 | goto msi_test_failed; | |
3674 | ||
a0607fd3 | 3675 | err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0, |
f8d59f78 BA |
3676 | netdev->name, netdev); |
3677 | if (err) { | |
3678 | pci_disable_msi(adapter->pdev); | |
3679 | goto msi_test_failed; | |
3680 | } | |
3681 | ||
3682 | wmb(); | |
3683 | ||
3684 | e1000_irq_enable(adapter); | |
3685 | ||
3686 | /* fire an unusual interrupt on the test handler */ | |
3687 | ew32(ICS, E1000_ICS_RXSEQ); | |
3688 | e1e_flush(); | |
3689 | msleep(50); | |
3690 | ||
3691 | e1000_irq_disable(adapter); | |
3692 | ||
3693 | rmb(); | |
3694 | ||
3695 | if (adapter->flags & FLAG_MSI_TEST_FAILED) { | |
4662e82b | 3696 | adapter->int_mode = E1000E_INT_MODE_LEGACY; |
068e8a30 JD |
3697 | e_info("MSI interrupt test failed, using legacy interrupt.\n"); |
3698 | } else | |
3699 | e_dbg("MSI interrupt test succeeded!\n"); | |
f8d59f78 BA |
3700 | |
3701 | free_irq(adapter->pdev->irq, netdev); | |
3702 | pci_disable_msi(adapter->pdev); | |
3703 | ||
f8d59f78 | 3704 | msi_test_failed: |
4662e82b | 3705 | e1000e_set_interrupt_capability(adapter); |
068e8a30 | 3706 | return e1000_request_irq(adapter); |
f8d59f78 BA |
3707 | } |
3708 | ||
3709 | /** | |
3710 | * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored | |
3711 | * @adapter: board private struct | |
3712 | * | |
3713 | * code flow taken from tg3.c, called with e1000 interrupts disabled. | |
3714 | **/ | |
3715 | static int e1000_test_msi(struct e1000_adapter *adapter) | |
3716 | { | |
3717 | int err; | |
3718 | u16 pci_cmd; | |
3719 | ||
3720 | if (!(adapter->flags & FLAG_MSI_ENABLED)) | |
3721 | return 0; | |
3722 | ||
3723 | /* disable SERR in case the MSI write causes a master abort */ | |
3724 | pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); | |
36f2407f DN |
3725 | if (pci_cmd & PCI_COMMAND_SERR) |
3726 | pci_write_config_word(adapter->pdev, PCI_COMMAND, | |
3727 | pci_cmd & ~PCI_COMMAND_SERR); | |
f8d59f78 BA |
3728 | |
3729 | err = e1000_test_msi_interrupt(adapter); | |
3730 | ||
36f2407f DN |
3731 | /* re-enable SERR */ |
3732 | if (pci_cmd & PCI_COMMAND_SERR) { | |
3733 | pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd); | |
3734 | pci_cmd |= PCI_COMMAND_SERR; | |
3735 | pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd); | |
3736 | } | |
f8d59f78 | 3737 | |
f8d59f78 BA |
3738 | return err; |
3739 | } | |
3740 | ||
bc7f75fa AK |
3741 | /** |
3742 | * e1000_open - Called when a network interface is made active | |
3743 | * @netdev: network interface device structure | |
3744 | * | |
3745 | * Returns 0 on success, negative value on failure | |
3746 | * | |
3747 | * The open entry point is called when a network interface is made | |
3748 | * active by the system (IFF_UP). At this point all resources needed | |
3749 | * for transmit and receive operations are allocated, the interrupt | |
3750 | * handler is registered with the OS, the watchdog timer is started, | |
3751 | * and the stack is notified that the interface is ready. | |
3752 | **/ | |
3753 | static int e1000_open(struct net_device *netdev) | |
3754 | { | |
3755 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3756 | struct e1000_hw *hw = &adapter->hw; | |
23606cf5 | 3757 | struct pci_dev *pdev = adapter->pdev; |
bc7f75fa AK |
3758 | int err; |
3759 | ||
3760 | /* disallow open during test */ | |
3761 | if (test_bit(__E1000_TESTING, &adapter->state)) | |
3762 | return -EBUSY; | |
3763 | ||
23606cf5 RW |
3764 | pm_runtime_get_sync(&pdev->dev); |
3765 | ||
9c563d20 JB |
3766 | netif_carrier_off(netdev); |
3767 | ||
bc7f75fa AK |
3768 | /* allocate transmit descriptors */ |
3769 | err = e1000e_setup_tx_resources(adapter); | |
3770 | if (err) | |
3771 | goto err_setup_tx; | |
3772 | ||
3773 | /* allocate receive descriptors */ | |
3774 | err = e1000e_setup_rx_resources(adapter); | |
3775 | if (err) | |
3776 | goto err_setup_rx; | |
3777 | ||
11b08be8 BA |
3778 | /* |
3779 | * If AMT is enabled, let the firmware know that the network | |
3780 | * interface is now open and reset the part to a known state. | |
3781 | */ | |
3782 | if (adapter->flags & FLAG_HAS_AMT) { | |
31dbe5b4 | 3783 | e1000e_get_hw_control(adapter); |
11b08be8 BA |
3784 | e1000e_reset(adapter); |
3785 | } | |
3786 | ||
bc7f75fa AK |
3787 | e1000e_power_up_phy(adapter); |
3788 | ||
3789 | adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; | |
3790 | if ((adapter->hw.mng_cookie.status & | |
3791 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) | |
3792 | e1000_update_mng_vlan(adapter); | |
3793 | ||
c128ec29 | 3794 | /* DMA latency requirement to workaround early-receive/jumbo issue */ |
828bac87 BA |
3795 | if ((adapter->flags & FLAG_HAS_ERT) || |
3796 | (adapter->hw.mac.type == e1000_pch2lan)) | |
6ba74014 LT |
3797 | pm_qos_add_request(&adapter->netdev->pm_qos_req, |
3798 | PM_QOS_CPU_DMA_LATENCY, | |
3799 | PM_QOS_DEFAULT_VALUE); | |
c128ec29 | 3800 | |
ad68076e BA |
3801 | /* |
3802 | * before we allocate an interrupt, we must be ready to handle it. | |
bc7f75fa AK |
3803 | * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt |
3804 | * as soon as we call pci_request_irq, so we have to setup our | |
ad68076e BA |
3805 | * clean_rx handler before we do so. |
3806 | */ | |
bc7f75fa AK |
3807 | e1000_configure(adapter); |
3808 | ||
3809 | err = e1000_request_irq(adapter); | |
3810 | if (err) | |
3811 | goto err_req_irq; | |
3812 | ||
f8d59f78 BA |
3813 | /* |
3814 | * Work around PCIe errata with MSI interrupts causing some chipsets to | |
3815 | * ignore e1000e MSI messages, which means we need to test our MSI | |
3816 | * interrupt now | |
3817 | */ | |
4662e82b | 3818 | if (adapter->int_mode != E1000E_INT_MODE_LEGACY) { |
f8d59f78 BA |
3819 | err = e1000_test_msi(adapter); |
3820 | if (err) { | |
3821 | e_err("Interrupt allocation failed\n"); | |
3822 | goto err_req_irq; | |
3823 | } | |
3824 | } | |
3825 | ||
bc7f75fa AK |
3826 | /* From here on the code is the same as e1000e_up() */ |
3827 | clear_bit(__E1000_DOWN, &adapter->state); | |
3828 | ||
3829 | napi_enable(&adapter->napi); | |
3830 | ||
3831 | e1000_irq_enable(adapter); | |
3832 | ||
4cb9be7a | 3833 | netif_start_queue(netdev); |
d55b53ff | 3834 | |
23606cf5 RW |
3835 | adapter->idle_check = true; |
3836 | pm_runtime_put(&pdev->dev); | |
3837 | ||
bc7f75fa | 3838 | /* fire a link status change interrupt to start the watchdog */ |
52a9b231 BA |
3839 | if (adapter->msix_entries) |
3840 | ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER); | |
3841 | else | |
3842 | ew32(ICS, E1000_ICS_LSC); | |
bc7f75fa AK |
3843 | |
3844 | return 0; | |
3845 | ||
3846 | err_req_irq: | |
31dbe5b4 | 3847 | e1000e_release_hw_control(adapter); |
bc7f75fa AK |
3848 | e1000_power_down_phy(adapter); |
3849 | e1000e_free_rx_resources(adapter); | |
3850 | err_setup_rx: | |
3851 | e1000e_free_tx_resources(adapter); | |
3852 | err_setup_tx: | |
3853 | e1000e_reset(adapter); | |
23606cf5 | 3854 | pm_runtime_put_sync(&pdev->dev); |
bc7f75fa AK |
3855 | |
3856 | return err; | |
3857 | } | |
3858 | ||
3859 | /** | |
3860 | * e1000_close - Disables a network interface | |
3861 | * @netdev: network interface device structure | |
3862 | * | |
3863 | * Returns 0, this is not allowed to fail | |
3864 | * | |
3865 | * The close entry point is called when an interface is de-activated | |
3866 | * by the OS. The hardware is still under the drivers control, but | |
3867 | * needs to be disabled. A global MAC reset is issued to stop the | |
3868 | * hardware, and all transmit and receive resources are freed. | |
3869 | **/ | |
3870 | static int e1000_close(struct net_device *netdev) | |
3871 | { | |
3872 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
23606cf5 | 3873 | struct pci_dev *pdev = adapter->pdev; |
bc7f75fa AK |
3874 | |
3875 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); | |
23606cf5 RW |
3876 | |
3877 | pm_runtime_get_sync(&pdev->dev); | |
3878 | ||
3879 | if (!test_bit(__E1000_DOWN, &adapter->state)) { | |
3880 | e1000e_down(adapter); | |
3881 | e1000_free_irq(adapter); | |
3882 | } | |
bc7f75fa | 3883 | e1000_power_down_phy(adapter); |
bc7f75fa AK |
3884 | |
3885 | e1000e_free_tx_resources(adapter); | |
3886 | e1000e_free_rx_resources(adapter); | |
3887 | ||
ad68076e BA |
3888 | /* |
3889 | * kill manageability vlan ID if supported, but not if a vlan with | |
3890 | * the same ID is registered on the host OS (let 8021q kill it) | |
3891 | */ | |
86d70e53 JK |
3892 | if (adapter->hw.mng_cookie.status & |
3893 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) | |
bc7f75fa AK |
3894 | e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
3895 | ||
ad68076e BA |
3896 | /* |
3897 | * If AMT is enabled, let the firmware know that the network | |
3898 | * interface is now closed | |
3899 | */ | |
31dbe5b4 BA |
3900 | if ((adapter->flags & FLAG_HAS_AMT) && |
3901 | !test_bit(__E1000_TESTING, &adapter->state)) | |
3902 | e1000e_release_hw_control(adapter); | |
bc7f75fa | 3903 | |
828bac87 BA |
3904 | if ((adapter->flags & FLAG_HAS_ERT) || |
3905 | (adapter->hw.mac.type == e1000_pch2lan)) | |
6ba74014 | 3906 | pm_qos_remove_request(&adapter->netdev->pm_qos_req); |
c128ec29 | 3907 | |
23606cf5 RW |
3908 | pm_runtime_put_sync(&pdev->dev); |
3909 | ||
bc7f75fa AK |
3910 | return 0; |
3911 | } | |
3912 | /** | |
3913 | * e1000_set_mac - Change the Ethernet Address of the NIC | |
3914 | * @netdev: network interface device structure | |
3915 | * @p: pointer to an address structure | |
3916 | * | |
3917 | * Returns 0 on success, negative on failure | |
3918 | **/ | |
3919 | static int e1000_set_mac(struct net_device *netdev, void *p) | |
3920 | { | |
3921 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
3922 | struct sockaddr *addr = p; | |
3923 | ||
3924 | if (!is_valid_ether_addr(addr->sa_data)) | |
3925 | return -EADDRNOTAVAIL; | |
3926 | ||
3927 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
3928 | memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); | |
3929 | ||
3930 | e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); | |
3931 | ||
3932 | if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) { | |
3933 | /* activate the work around */ | |
3934 | e1000e_set_laa_state_82571(&adapter->hw, 1); | |
3935 | ||
ad68076e BA |
3936 | /* |
3937 | * Hold a copy of the LAA in RAR[14] This is done so that | |
bc7f75fa AK |
3938 | * between the time RAR[0] gets clobbered and the time it |
3939 | * gets fixed (in e1000_watchdog), the actual LAA is in one | |
3940 | * of the RARs and no incoming packets directed to this port | |
3941 | * are dropped. Eventually the LAA will be in RAR[0] and | |
ad68076e BA |
3942 | * RAR[14] |
3943 | */ | |
bc7f75fa AK |
3944 | e1000e_rar_set(&adapter->hw, |
3945 | adapter->hw.mac.addr, | |
3946 | adapter->hw.mac.rar_entry_count - 1); | |
3947 | } | |
3948 | ||
3949 | return 0; | |
3950 | } | |
3951 | ||
a8f88ff5 JB |
3952 | /** |
3953 | * e1000e_update_phy_task - work thread to update phy | |
3954 | * @work: pointer to our work struct | |
3955 | * | |
3956 | * this worker thread exists because we must acquire a | |
3957 | * semaphore to read the phy, which we could msleep while | |
3958 | * waiting for it, and we can't msleep in a timer. | |
3959 | **/ | |
3960 | static void e1000e_update_phy_task(struct work_struct *work) | |
3961 | { | |
3962 | struct e1000_adapter *adapter = container_of(work, | |
3963 | struct e1000_adapter, update_phy_task); | |
615b32af JB |
3964 | |
3965 | if (test_bit(__E1000_DOWN, &adapter->state)) | |
3966 | return; | |
3967 | ||
a8f88ff5 JB |
3968 | e1000_get_phy_info(&adapter->hw); |
3969 | } | |
3970 | ||
ad68076e BA |
3971 | /* |
3972 | * Need to wait a few seconds after link up to get diagnostic information from | |
3973 | * the phy | |
3974 | */ | |
bc7f75fa AK |
3975 | static void e1000_update_phy_info(unsigned long data) |
3976 | { | |
3977 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
615b32af JB |
3978 | |
3979 | if (test_bit(__E1000_DOWN, &adapter->state)) | |
3980 | return; | |
3981 | ||
a8f88ff5 | 3982 | schedule_work(&adapter->update_phy_task); |
bc7f75fa AK |
3983 | } |
3984 | ||
8c7bbb92 BA |
3985 | /** |
3986 | * e1000e_update_phy_stats - Update the PHY statistics counters | |
3987 | * @adapter: board private structure | |
2b6b168d BA |
3988 | * |
3989 | * Read/clear the upper 16-bit PHY registers and read/accumulate lower | |
8c7bbb92 BA |
3990 | **/ |
3991 | static void e1000e_update_phy_stats(struct e1000_adapter *adapter) | |
3992 | { | |
3993 | struct e1000_hw *hw = &adapter->hw; | |
3994 | s32 ret_val; | |
3995 | u16 phy_data; | |
3996 | ||
3997 | ret_val = hw->phy.ops.acquire(hw); | |
3998 | if (ret_val) | |
3999 | return; | |
4000 | ||
8c7bbb92 BA |
4001 | /* |
4002 | * A page set is expensive so check if already on desired page. | |
4003 | * If not, set to the page with the PHY status registers. | |
4004 | */ | |
2b6b168d | 4005 | hw->phy.addr = 1; |
8c7bbb92 BA |
4006 | ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, |
4007 | &phy_data); | |
4008 | if (ret_val) | |
4009 | goto release; | |
2b6b168d BA |
4010 | if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) { |
4011 | ret_val = hw->phy.ops.set_page(hw, | |
4012 | HV_STATS_PAGE << IGP_PAGE_SHIFT); | |
8c7bbb92 BA |
4013 | if (ret_val) |
4014 | goto release; | |
4015 | } | |
4016 | ||
8c7bbb92 | 4017 | /* Single Collision Count */ |
2b6b168d BA |
4018 | hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); |
4019 | ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); | |
8c7bbb92 BA |
4020 | if (!ret_val) |
4021 | adapter->stats.scc += phy_data; | |
4022 | ||
4023 | /* Excessive Collision Count */ | |
2b6b168d BA |
4024 | hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); |
4025 | ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); | |
8c7bbb92 BA |
4026 | if (!ret_val) |
4027 | adapter->stats.ecol += phy_data; | |
4028 | ||
4029 | /* Multiple Collision Count */ | |
2b6b168d BA |
4030 | hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); |
4031 | ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); | |
8c7bbb92 BA |
4032 | if (!ret_val) |
4033 | adapter->stats.mcc += phy_data; | |
4034 | ||
4035 | /* Late Collision Count */ | |
2b6b168d BA |
4036 | hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); |
4037 | ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); | |
8c7bbb92 BA |
4038 | if (!ret_val) |
4039 | adapter->stats.latecol += phy_data; | |
4040 | ||
4041 | /* Collision Count - also used for adaptive IFS */ | |
2b6b168d BA |
4042 | hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); |
4043 | ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); | |
8c7bbb92 BA |
4044 | if (!ret_val) |
4045 | hw->mac.collision_delta = phy_data; | |
4046 | ||
4047 | /* Defer Count */ | |
2b6b168d BA |
4048 | hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); |
4049 | ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); | |
8c7bbb92 BA |
4050 | if (!ret_val) |
4051 | adapter->stats.dc += phy_data; | |
4052 | ||
4053 | /* Transmit with no CRS */ | |
2b6b168d BA |
4054 | hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); |
4055 | ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); | |
8c7bbb92 BA |
4056 | if (!ret_val) |
4057 | adapter->stats.tncrs += phy_data; | |
4058 | ||
4059 | release: | |
4060 | hw->phy.ops.release(hw); | |
4061 | } | |
4062 | ||
bc7f75fa AK |
4063 | /** |
4064 | * e1000e_update_stats - Update the board statistics counters | |
4065 | * @adapter: board private structure | |
4066 | **/ | |
67fd4fcb | 4067 | static void e1000e_update_stats(struct e1000_adapter *adapter) |
bc7f75fa | 4068 | { |
7274c20f | 4069 | struct net_device *netdev = adapter->netdev; |
bc7f75fa AK |
4070 | struct e1000_hw *hw = &adapter->hw; |
4071 | struct pci_dev *pdev = adapter->pdev; | |
bc7f75fa AK |
4072 | |
4073 | /* | |
4074 | * Prevent stats update while adapter is being reset, or if the pci | |
4075 | * connection is down. | |
4076 | */ | |
4077 | if (adapter->link_speed == 0) | |
4078 | return; | |
4079 | if (pci_channel_offline(pdev)) | |
4080 | return; | |
4081 | ||
bc7f75fa AK |
4082 | adapter->stats.crcerrs += er32(CRCERRS); |
4083 | adapter->stats.gprc += er32(GPRC); | |
7c25769f BA |
4084 | adapter->stats.gorc += er32(GORCL); |
4085 | er32(GORCH); /* Clear gorc */ | |
bc7f75fa AK |
4086 | adapter->stats.bprc += er32(BPRC); |
4087 | adapter->stats.mprc += er32(MPRC); | |
4088 | adapter->stats.roc += er32(ROC); | |
4089 | ||
bc7f75fa | 4090 | adapter->stats.mpc += er32(MPC); |
8c7bbb92 BA |
4091 | |
4092 | /* Half-duplex statistics */ | |
4093 | if (adapter->link_duplex == HALF_DUPLEX) { | |
4094 | if (adapter->flags2 & FLAG2_HAS_PHY_STATS) { | |
4095 | e1000e_update_phy_stats(adapter); | |
4096 | } else { | |
4097 | adapter->stats.scc += er32(SCC); | |
4098 | adapter->stats.ecol += er32(ECOL); | |
4099 | adapter->stats.mcc += er32(MCC); | |
4100 | adapter->stats.latecol += er32(LATECOL); | |
4101 | adapter->stats.dc += er32(DC); | |
4102 | ||
4103 | hw->mac.collision_delta = er32(COLC); | |
4104 | ||
4105 | if ((hw->mac.type != e1000_82574) && | |
4106 | (hw->mac.type != e1000_82583)) | |
4107 | adapter->stats.tncrs += er32(TNCRS); | |
4108 | } | |
4109 | adapter->stats.colc += hw->mac.collision_delta; | |
a4f58f54 | 4110 | } |
8c7bbb92 | 4111 | |
bc7f75fa AK |
4112 | adapter->stats.xonrxc += er32(XONRXC); |
4113 | adapter->stats.xontxc += er32(XONTXC); | |
4114 | adapter->stats.xoffrxc += er32(XOFFRXC); | |
4115 | adapter->stats.xofftxc += er32(XOFFTXC); | |
bc7f75fa | 4116 | adapter->stats.gptc += er32(GPTC); |
7c25769f BA |
4117 | adapter->stats.gotc += er32(GOTCL); |
4118 | er32(GOTCH); /* Clear gotc */ | |
bc7f75fa AK |
4119 | adapter->stats.rnbc += er32(RNBC); |
4120 | adapter->stats.ruc += er32(RUC); | |
bc7f75fa AK |
4121 | |
4122 | adapter->stats.mptc += er32(MPTC); | |
4123 | adapter->stats.bptc += er32(BPTC); | |
4124 | ||
4125 | /* used for adaptive IFS */ | |
4126 | ||
4127 | hw->mac.tx_packet_delta = er32(TPT); | |
4128 | adapter->stats.tpt += hw->mac.tx_packet_delta; | |
bc7f75fa AK |
4129 | |
4130 | adapter->stats.algnerrc += er32(ALGNERRC); | |
4131 | adapter->stats.rxerrc += er32(RXERRC); | |
bc7f75fa AK |
4132 | adapter->stats.cexterr += er32(CEXTERR); |
4133 | adapter->stats.tsctc += er32(TSCTC); | |
4134 | adapter->stats.tsctfc += er32(TSCTFC); | |
4135 | ||
bc7f75fa | 4136 | /* Fill out the OS statistics structure */ |
7274c20f AK |
4137 | netdev->stats.multicast = adapter->stats.mprc; |
4138 | netdev->stats.collisions = adapter->stats.colc; | |
bc7f75fa AK |
4139 | |
4140 | /* Rx Errors */ | |
4141 | ||
ad68076e BA |
4142 | /* |
4143 | * RLEC on some newer hardware can be incorrect so build | |
4144 | * our own version based on RUC and ROC | |
4145 | */ | |
7274c20f | 4146 | netdev->stats.rx_errors = adapter->stats.rxerrc + |
bc7f75fa AK |
4147 | adapter->stats.crcerrs + adapter->stats.algnerrc + |
4148 | adapter->stats.ruc + adapter->stats.roc + | |
4149 | adapter->stats.cexterr; | |
7274c20f | 4150 | netdev->stats.rx_length_errors = adapter->stats.ruc + |
bc7f75fa | 4151 | adapter->stats.roc; |
7274c20f AK |
4152 | netdev->stats.rx_crc_errors = adapter->stats.crcerrs; |
4153 | netdev->stats.rx_frame_errors = adapter->stats.algnerrc; | |
4154 | netdev->stats.rx_missed_errors = adapter->stats.mpc; | |
bc7f75fa AK |
4155 | |
4156 | /* Tx Errors */ | |
7274c20f | 4157 | netdev->stats.tx_errors = adapter->stats.ecol + |
bc7f75fa | 4158 | adapter->stats.latecol; |
7274c20f AK |
4159 | netdev->stats.tx_aborted_errors = adapter->stats.ecol; |
4160 | netdev->stats.tx_window_errors = adapter->stats.latecol; | |
4161 | netdev->stats.tx_carrier_errors = adapter->stats.tncrs; | |
bc7f75fa AK |
4162 | |
4163 | /* Tx Dropped needs to be maintained elsewhere */ | |
4164 | ||
bc7f75fa AK |
4165 | /* Management Stats */ |
4166 | adapter->stats.mgptc += er32(MGTPTC); | |
4167 | adapter->stats.mgprc += er32(MGTPRC); | |
4168 | adapter->stats.mgpdc += er32(MGTPDC); | |
bc7f75fa AK |
4169 | } |
4170 | ||
7c25769f BA |
4171 | /** |
4172 | * e1000_phy_read_status - Update the PHY register status snapshot | |
4173 | * @adapter: board private structure | |
4174 | **/ | |
4175 | static void e1000_phy_read_status(struct e1000_adapter *adapter) | |
4176 | { | |
4177 | struct e1000_hw *hw = &adapter->hw; | |
4178 | struct e1000_phy_regs *phy = &adapter->phy_regs; | |
7c25769f BA |
4179 | |
4180 | if ((er32(STATUS) & E1000_STATUS_LU) && | |
4181 | (adapter->hw.phy.media_type == e1000_media_type_copper)) { | |
90da0669 BA |
4182 | int ret_val; |
4183 | ||
7c25769f BA |
4184 | ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); |
4185 | ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); | |
4186 | ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); | |
4187 | ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa); | |
4188 | ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion); | |
4189 | ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000); | |
4190 | ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000); | |
4191 | ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus); | |
4192 | if (ret_val) | |
44defeb3 | 4193 | e_warn("Error reading PHY register\n"); |
7c25769f BA |
4194 | } else { |
4195 | /* | |
4196 | * Do not read PHY registers if link is not up | |
4197 | * Set values to typical power-on defaults | |
4198 | */ | |
4199 | phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX); | |
4200 | phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL | | |
4201 | BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE | | |
4202 | BMSR_ERCAP); | |
4203 | phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP | | |
4204 | ADVERTISE_ALL | ADVERTISE_CSMA); | |
4205 | phy->lpa = 0; | |
4206 | phy->expansion = EXPANSION_ENABLENPAGE; | |
4207 | phy->ctrl1000 = ADVERTISE_1000FULL; | |
4208 | phy->stat1000 = 0; | |
4209 | phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF); | |
4210 | } | |
7c25769f BA |
4211 | } |
4212 | ||
bc7f75fa AK |
4213 | static void e1000_print_link_info(struct e1000_adapter *adapter) |
4214 | { | |
bc7f75fa AK |
4215 | struct e1000_hw *hw = &adapter->hw; |
4216 | u32 ctrl = er32(CTRL); | |
4217 | ||
8f12fe86 | 4218 | /* Link status message must follow this format for user tools */ |
ef456f85 JK |
4219 | printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", |
4220 | adapter->netdev->name, | |
4221 | adapter->link_speed, | |
4222 | adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", | |
4223 | (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : | |
4224 | (ctrl & E1000_CTRL_RFCE) ? "Rx" : | |
4225 | (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None"); | |
bc7f75fa AK |
4226 | } |
4227 | ||
0c6bdb30 | 4228 | static bool e1000e_has_link(struct e1000_adapter *adapter) |
318a94d6 JK |
4229 | { |
4230 | struct e1000_hw *hw = &adapter->hw; | |
4231 | bool link_active = 0; | |
4232 | s32 ret_val = 0; | |
4233 | ||
4234 | /* | |
4235 | * get_link_status is set on LSC (link status) interrupt or | |
4236 | * Rx sequence error interrupt. get_link_status will stay | |
4237 | * false until the check_for_link establishes link | |
4238 | * for copper adapters ONLY | |
4239 | */ | |
4240 | switch (hw->phy.media_type) { | |
4241 | case e1000_media_type_copper: | |
4242 | if (hw->mac.get_link_status) { | |
4243 | ret_val = hw->mac.ops.check_for_link(hw); | |
4244 | link_active = !hw->mac.get_link_status; | |
4245 | } else { | |
4246 | link_active = 1; | |
4247 | } | |
4248 | break; | |
4249 | case e1000_media_type_fiber: | |
4250 | ret_val = hw->mac.ops.check_for_link(hw); | |
4251 | link_active = !!(er32(STATUS) & E1000_STATUS_LU); | |
4252 | break; | |
4253 | case e1000_media_type_internal_serdes: | |
4254 | ret_val = hw->mac.ops.check_for_link(hw); | |
4255 | link_active = adapter->hw.mac.serdes_has_link; | |
4256 | break; | |
4257 | default: | |
4258 | case e1000_media_type_unknown: | |
4259 | break; | |
4260 | } | |
4261 | ||
4262 | if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) && | |
4263 | (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { | |
4264 | /* See e1000_kmrn_lock_loss_workaround_ich8lan() */ | |
44defeb3 | 4265 | e_info("Gigabit has been disabled, downgrading speed\n"); |
318a94d6 JK |
4266 | } |
4267 | ||
4268 | return link_active; | |
4269 | } | |
4270 | ||
4271 | static void e1000e_enable_receives(struct e1000_adapter *adapter) | |
4272 | { | |
4273 | /* make sure the receive unit is started */ | |
4274 | if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && | |
4275 | (adapter->flags & FLAG_RX_RESTART_NOW)) { | |
4276 | struct e1000_hw *hw = &adapter->hw; | |
4277 | u32 rctl = er32(RCTL); | |
4278 | ew32(RCTL, rctl | E1000_RCTL_EN); | |
4279 | adapter->flags &= ~FLAG_RX_RESTART_NOW; | |
4280 | } | |
4281 | } | |
4282 | ||
ff10e13c CW |
4283 | static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) |
4284 | { | |
4285 | struct e1000_hw *hw = &adapter->hw; | |
4286 | ||
4287 | /* | |
4288 | * With 82574 controllers, PHY needs to be checked periodically | |
4289 | * for hung state and reset, if two calls return true | |
4290 | */ | |
4291 | if (e1000_check_phy_82574(hw)) | |
4292 | adapter->phy_hang_count++; | |
4293 | else | |
4294 | adapter->phy_hang_count = 0; | |
4295 | ||
4296 | if (adapter->phy_hang_count > 1) { | |
4297 | adapter->phy_hang_count = 0; | |
4298 | schedule_work(&adapter->reset_task); | |
4299 | } | |
4300 | } | |
4301 | ||
bc7f75fa AK |
4302 | /** |
4303 | * e1000_watchdog - Timer Call-back | |
4304 | * @data: pointer to adapter cast into an unsigned long | |
4305 | **/ | |
4306 | static void e1000_watchdog(unsigned long data) | |
4307 | { | |
4308 | struct e1000_adapter *adapter = (struct e1000_adapter *) data; | |
4309 | ||
4310 | /* Do the rest outside of interrupt context */ | |
4311 | schedule_work(&adapter->watchdog_task); | |
4312 | ||
4313 | /* TODO: make this use queue_delayed_work() */ | |
4314 | } | |
4315 | ||
4316 | static void e1000_watchdog_task(struct work_struct *work) | |
4317 | { | |
4318 | struct e1000_adapter *adapter = container_of(work, | |
4319 | struct e1000_adapter, watchdog_task); | |
bc7f75fa AK |
4320 | struct net_device *netdev = adapter->netdev; |
4321 | struct e1000_mac_info *mac = &adapter->hw.mac; | |
75eb0fad | 4322 | struct e1000_phy_info *phy = &adapter->hw.phy; |
bc7f75fa AK |
4323 | struct e1000_ring *tx_ring = adapter->tx_ring; |
4324 | struct e1000_hw *hw = &adapter->hw; | |
4325 | u32 link, tctl; | |
bc7f75fa | 4326 | |
615b32af JB |
4327 | if (test_bit(__E1000_DOWN, &adapter->state)) |
4328 | return; | |
4329 | ||
b405e8df | 4330 | link = e1000e_has_link(adapter); |
318a94d6 | 4331 | if ((netif_carrier_ok(netdev)) && link) { |
23606cf5 RW |
4332 | /* Cancel scheduled suspend requests. */ |
4333 | pm_runtime_resume(netdev->dev.parent); | |
4334 | ||
318a94d6 | 4335 | e1000e_enable_receives(adapter); |
bc7f75fa | 4336 | goto link_up; |
bc7f75fa AK |
4337 | } |
4338 | ||
4339 | if ((e1000e_enable_tx_pkt_filtering(hw)) && | |
4340 | (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)) | |
4341 | e1000_update_mng_vlan(adapter); | |
4342 | ||
bc7f75fa AK |
4343 | if (link) { |
4344 | if (!netif_carrier_ok(netdev)) { | |
4345 | bool txb2b = 1; | |
23606cf5 RW |
4346 | |
4347 | /* Cancel scheduled suspend requests. */ | |
4348 | pm_runtime_resume(netdev->dev.parent); | |
4349 | ||
318a94d6 | 4350 | /* update snapshot of PHY registers on LSC */ |
7c25769f | 4351 | e1000_phy_read_status(adapter); |
bc7f75fa AK |
4352 | mac->ops.get_link_up_info(&adapter->hw, |
4353 | &adapter->link_speed, | |
4354 | &adapter->link_duplex); | |
4355 | e1000_print_link_info(adapter); | |
f4187b56 BA |
4356 | /* |
4357 | * On supported PHYs, check for duplex mismatch only | |
4358 | * if link has autonegotiated at 10/100 half | |
4359 | */ | |
4360 | if ((hw->phy.type == e1000_phy_igp_3 || | |
4361 | hw->phy.type == e1000_phy_bm) && | |
4362 | (hw->mac.autoneg == true) && | |
4363 | (adapter->link_speed == SPEED_10 || | |
4364 | adapter->link_speed == SPEED_100) && | |
4365 | (adapter->link_duplex == HALF_DUPLEX)) { | |
4366 | u16 autoneg_exp; | |
4367 | ||
4368 | e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp); | |
4369 | ||
4370 | if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS)) | |
ef456f85 | 4371 | e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n"); |
f4187b56 BA |
4372 | } |
4373 | ||
f49c57e1 | 4374 | /* adjust timeout factor according to speed/duplex */ |
bc7f75fa AK |
4375 | adapter->tx_timeout_factor = 1; |
4376 | switch (adapter->link_speed) { | |
4377 | case SPEED_10: | |
4378 | txb2b = 0; | |
10f1b492 | 4379 | adapter->tx_timeout_factor = 16; |
bc7f75fa AK |
4380 | break; |
4381 | case SPEED_100: | |
4382 | txb2b = 0; | |
4c86e0b9 | 4383 | adapter->tx_timeout_factor = 10; |
bc7f75fa AK |
4384 | break; |
4385 | } | |
4386 | ||
ad68076e BA |
4387 | /* |
4388 | * workaround: re-program speed mode bit after | |
4389 | * link-up event | |
4390 | */ | |
bc7f75fa AK |
4391 | if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && |
4392 | !txb2b) { | |
4393 | u32 tarc0; | |
e9ec2c0f | 4394 | tarc0 = er32(TARC(0)); |
bc7f75fa | 4395 | tarc0 &= ~SPEED_MODE_BIT; |
e9ec2c0f | 4396 | ew32(TARC(0), tarc0); |
bc7f75fa AK |
4397 | } |
4398 | ||
ad68076e BA |
4399 | /* |
4400 | * disable TSO for pcie and 10/100 speeds, to avoid | |
4401 | * some hardware issues | |
4402 | */ | |
bc7f75fa AK |
4403 | if (!(adapter->flags & FLAG_TSO_FORCE)) { |
4404 | switch (adapter->link_speed) { | |
4405 | case SPEED_10: | |
4406 | case SPEED_100: | |
44defeb3 | 4407 | e_info("10/100 speed: disabling TSO\n"); |
bc7f75fa AK |
4408 | netdev->features &= ~NETIF_F_TSO; |
4409 | netdev->features &= ~NETIF_F_TSO6; | |
4410 | break; | |
4411 | case SPEED_1000: | |
4412 | netdev->features |= NETIF_F_TSO; | |
4413 | netdev->features |= NETIF_F_TSO6; | |
4414 | break; | |
4415 | default: | |
4416 | /* oops */ | |
4417 | break; | |
4418 | } | |
4419 | } | |
4420 | ||
ad68076e BA |
4421 | /* |
4422 | * enable transmits in the hardware, need to do this | |
4423 | * after setting TARC(0) | |
4424 | */ | |
bc7f75fa AK |
4425 | tctl = er32(TCTL); |
4426 | tctl |= E1000_TCTL_EN; | |
4427 | ew32(TCTL, tctl); | |
4428 | ||
75eb0fad BA |
4429 | /* |
4430 | * Perform any post-link-up configuration before | |
4431 | * reporting link up. | |
4432 | */ | |
4433 | if (phy->ops.cfg_on_link_up) | |
4434 | phy->ops.cfg_on_link_up(hw); | |
4435 | ||
bc7f75fa | 4436 | netif_carrier_on(netdev); |
bc7f75fa AK |
4437 | |
4438 | if (!test_bit(__E1000_DOWN, &adapter->state)) | |
4439 | mod_timer(&adapter->phy_info_timer, | |
4440 | round_jiffies(jiffies + 2 * HZ)); | |
bc7f75fa AK |
4441 | } |
4442 | } else { | |
4443 | if (netif_carrier_ok(netdev)) { | |
4444 | adapter->link_speed = 0; | |
4445 | adapter->link_duplex = 0; | |
8f12fe86 BA |
4446 | /* Link status message must follow this format */ |
4447 | printk(KERN_INFO "e1000e: %s NIC Link is Down\n", | |
4448 | adapter->netdev->name); | |
bc7f75fa | 4449 | netif_carrier_off(netdev); |
bc7f75fa AK |
4450 | if (!test_bit(__E1000_DOWN, &adapter->state)) |
4451 | mod_timer(&adapter->phy_info_timer, | |
4452 | round_jiffies(jiffies + 2 * HZ)); | |
4453 | ||
4454 | if (adapter->flags & FLAG_RX_NEEDS_RESTART) | |
4455 | schedule_work(&adapter->reset_task); | |
23606cf5 RW |
4456 | else |
4457 | pm_schedule_suspend(netdev->dev.parent, | |
4458 | LINK_TIMEOUT); | |
bc7f75fa AK |
4459 | } |
4460 | } | |
4461 | ||
4462 | link_up: | |
67fd4fcb | 4463 | spin_lock(&adapter->stats64_lock); |
bc7f75fa AK |
4464 | e1000e_update_stats(adapter); |
4465 | ||
4466 | mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
4467 | adapter->tpt_old = adapter->stats.tpt; | |
4468 | mac->collision_delta = adapter->stats.colc - adapter->colc_old; | |
4469 | adapter->colc_old = adapter->stats.colc; | |
4470 | ||
7c25769f BA |
4471 | adapter->gorc = adapter->stats.gorc - adapter->gorc_old; |
4472 | adapter->gorc_old = adapter->stats.gorc; | |
4473 | adapter->gotc = adapter->stats.gotc - adapter->gotc_old; | |
4474 | adapter->gotc_old = adapter->stats.gotc; | |
2084b114 | 4475 | spin_unlock(&adapter->stats64_lock); |
bc7f75fa AK |
4476 | |
4477 | e1000e_update_adaptive(&adapter->hw); | |
4478 | ||
90da0669 BA |
4479 | if (!netif_carrier_ok(netdev) && |
4480 | (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) { | |
4481 | /* | |
4482 | * We've lost link, so the controller stops DMA, | |
4483 | * but we've got queued Tx work that's never going | |
4484 | * to get done, so reset controller to flush Tx. | |
4485 | * (Do the reset outside of interrupt context). | |
4486 | */ | |
90da0669 BA |
4487 | schedule_work(&adapter->reset_task); |
4488 | /* return immediately since reset is imminent */ | |
4489 | return; | |
bc7f75fa AK |
4490 | } |
4491 | ||
eab2abf5 JB |
4492 | /* Simple mode for Interrupt Throttle Rate (ITR) */ |
4493 | if (adapter->itr_setting == 4) { | |
4494 | /* | |
4495 | * Symmetric Tx/Rx gets a reduced ITR=2000; | |
4496 | * Total asymmetrical Tx or Rx gets ITR=8000; | |
4497 | * everyone else is between 2000-8000. | |
4498 | */ | |
4499 | u32 goc = (adapter->gotc + adapter->gorc) / 10000; | |
4500 | u32 dif = (adapter->gotc > adapter->gorc ? | |
4501 | adapter->gotc - adapter->gorc : | |
4502 | adapter->gorc - adapter->gotc) / 10000; | |
4503 | u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000; | |
4504 | ||
4505 | ew32(ITR, 1000000000 / (itr * 256)); | |
4506 | } | |
4507 | ||
ad68076e | 4508 | /* Cause software interrupt to ensure Rx ring is cleaned */ |
4662e82b BA |
4509 | if (adapter->msix_entries) |
4510 | ew32(ICS, adapter->rx_ring->ims_val); | |
4511 | else | |
4512 | ew32(ICS, E1000_ICS_RXDMT0); | |
bc7f75fa | 4513 | |
713b3c9e JB |
4514 | /* flush pending descriptors to memory before detecting Tx hang */ |
4515 | e1000e_flush_descriptors(adapter); | |
4516 | ||
bc7f75fa AK |
4517 | /* Force detection of hung controller every watchdog period */ |
4518 | adapter->detect_tx_hung = 1; | |
4519 | ||
ad68076e BA |
4520 | /* |
4521 | * With 82571 controllers, LAA may be overwritten due to controller | |
4522 | * reset from the other port. Set the appropriate LAA in RAR[0] | |
4523 | */ | |
bc7f75fa AK |
4524 | if (e1000e_get_laa_state_82571(hw)) |
4525 | e1000e_rar_set(hw, adapter->hw.mac.addr, 0); | |
4526 | ||
ff10e13c CW |
4527 | if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) |
4528 | e1000e_check_82574_phy_workaround(adapter); | |
4529 | ||
bc7f75fa AK |
4530 | /* Reset the timer */ |
4531 | if (!test_bit(__E1000_DOWN, &adapter->state)) | |
4532 | mod_timer(&adapter->watchdog_timer, | |
4533 | round_jiffies(jiffies + 2 * HZ)); | |
4534 | } | |
4535 | ||
4536 | #define E1000_TX_FLAGS_CSUM 0x00000001 | |
4537 | #define E1000_TX_FLAGS_VLAN 0x00000002 | |
4538 | #define E1000_TX_FLAGS_TSO 0x00000004 | |
4539 | #define E1000_TX_FLAGS_IPV4 0x00000008 | |
4540 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 | |
4541 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | |
4542 | ||
4543 | static int e1000_tso(struct e1000_adapter *adapter, | |
4544 | struct sk_buff *skb) | |
4545 | { | |
4546 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
4547 | struct e1000_context_desc *context_desc; | |
4548 | struct e1000_buffer *buffer_info; | |
4549 | unsigned int i; | |
4550 | u32 cmd_length = 0; | |
4551 | u16 ipcse = 0, tucse, mss; | |
4552 | u8 ipcss, ipcso, tucss, tucso, hdr_len; | |
bc7f75fa | 4553 | |
3d5e33c9 BA |
4554 | if (!skb_is_gso(skb)) |
4555 | return 0; | |
bc7f75fa | 4556 | |
3d5e33c9 | 4557 | if (skb_header_cloned(skb)) { |
90da0669 BA |
4558 | int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); |
4559 | ||
3d5e33c9 BA |
4560 | if (err) |
4561 | return err; | |
bc7f75fa AK |
4562 | } |
4563 | ||
3d5e33c9 BA |
4564 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
4565 | mss = skb_shinfo(skb)->gso_size; | |
4566 | if (skb->protocol == htons(ETH_P_IP)) { | |
4567 | struct iphdr *iph = ip_hdr(skb); | |
4568 | iph->tot_len = 0; | |
4569 | iph->check = 0; | |
4570 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, | |
4571 | 0, IPPROTO_TCP, 0); | |
4572 | cmd_length = E1000_TXD_CMD_IP; | |
4573 | ipcse = skb_transport_offset(skb) - 1; | |
8e1e8a47 | 4574 | } else if (skb_is_gso_v6(skb)) { |
3d5e33c9 BA |
4575 | ipv6_hdr(skb)->payload_len = 0; |
4576 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, | |
4577 | &ipv6_hdr(skb)->daddr, | |
4578 | 0, IPPROTO_TCP, 0); | |
4579 | ipcse = 0; | |
4580 | } | |
4581 | ipcss = skb_network_offset(skb); | |
4582 | ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; | |
4583 | tucss = skb_transport_offset(skb); | |
4584 | tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; | |
4585 | tucse = 0; | |
4586 | ||
4587 | cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | | |
4588 | E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); | |
4589 | ||
4590 | i = tx_ring->next_to_use; | |
4591 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
4592 | buffer_info = &tx_ring->buffer_info[i]; | |
4593 | ||
4594 | context_desc->lower_setup.ip_fields.ipcss = ipcss; | |
4595 | context_desc->lower_setup.ip_fields.ipcso = ipcso; | |
4596 | context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); | |
4597 | context_desc->upper_setup.tcp_fields.tucss = tucss; | |
4598 | context_desc->upper_setup.tcp_fields.tucso = tucso; | |
4599 | context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); | |
4600 | context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); | |
4601 | context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; | |
4602 | context_desc->cmd_and_length = cpu_to_le32(cmd_length); | |
4603 | ||
4604 | buffer_info->time_stamp = jiffies; | |
4605 | buffer_info->next_to_watch = i; | |
4606 | ||
4607 | i++; | |
4608 | if (i == tx_ring->count) | |
4609 | i = 0; | |
4610 | tx_ring->next_to_use = i; | |
4611 | ||
4612 | return 1; | |
bc7f75fa AK |
4613 | } |
4614 | ||
4615 | static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb) | |
4616 | { | |
4617 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
4618 | struct e1000_context_desc *context_desc; | |
4619 | struct e1000_buffer *buffer_info; | |
4620 | unsigned int i; | |
4621 | u8 css; | |
af807c82 | 4622 | u32 cmd_len = E1000_TXD_CMD_DEXT; |
5f66f208 | 4623 | __be16 protocol; |
bc7f75fa | 4624 | |
af807c82 DG |
4625 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
4626 | return 0; | |
bc7f75fa | 4627 | |
5f66f208 AJ |
4628 | if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) |
4629 | protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; | |
4630 | else | |
4631 | protocol = skb->protocol; | |
4632 | ||
3f518390 | 4633 | switch (protocol) { |
09640e63 | 4634 | case cpu_to_be16(ETH_P_IP): |
af807c82 DG |
4635 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
4636 | cmd_len |= E1000_TXD_CMD_TCP; | |
4637 | break; | |
09640e63 | 4638 | case cpu_to_be16(ETH_P_IPV6): |
af807c82 DG |
4639 | /* XXX not handling all IPV6 headers */ |
4640 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) | |
4641 | cmd_len |= E1000_TXD_CMD_TCP; | |
4642 | break; | |
4643 | default: | |
4644 | if (unlikely(net_ratelimit())) | |
5f66f208 AJ |
4645 | e_warn("checksum_partial proto=%x!\n", |
4646 | be16_to_cpu(protocol)); | |
af807c82 | 4647 | break; |
bc7f75fa AK |
4648 | } |
4649 | ||
0d0b1672 | 4650 | css = skb_checksum_start_offset(skb); |
af807c82 DG |
4651 | |
4652 | i = tx_ring->next_to_use; | |
4653 | buffer_info = &tx_ring->buffer_info[i]; | |
4654 | context_desc = E1000_CONTEXT_DESC(*tx_ring, i); | |
4655 | ||
4656 | context_desc->lower_setup.ip_config = 0; | |
4657 | context_desc->upper_setup.tcp_fields.tucss = css; | |
4658 | context_desc->upper_setup.tcp_fields.tucso = | |
4659 | css + skb->csum_offset; | |
4660 | context_desc->upper_setup.tcp_fields.tucse = 0; | |
4661 | context_desc->tcp_seg_setup.data = 0; | |
4662 | context_desc->cmd_and_length = cpu_to_le32(cmd_len); | |
4663 | ||
4664 | buffer_info->time_stamp = jiffies; | |
4665 | buffer_info->next_to_watch = i; | |
4666 | ||
4667 | i++; | |
4668 | if (i == tx_ring->count) | |
4669 | i = 0; | |
4670 | tx_ring->next_to_use = i; | |
4671 | ||
4672 | return 1; | |
bc7f75fa AK |
4673 | } |
4674 | ||
4675 | #define E1000_MAX_PER_TXD 8192 | |
4676 | #define E1000_MAX_TXD_PWR 12 | |
4677 | ||
4678 | static int e1000_tx_map(struct e1000_adapter *adapter, | |
4679 | struct sk_buff *skb, unsigned int first, | |
4680 | unsigned int max_per_txd, unsigned int nr_frags, | |
4681 | unsigned int mss) | |
4682 | { | |
4683 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
03b1320d | 4684 | struct pci_dev *pdev = adapter->pdev; |
1b7719c4 | 4685 | struct e1000_buffer *buffer_info; |
8ddc951c | 4686 | unsigned int len = skb_headlen(skb); |
03b1320d | 4687 | unsigned int offset = 0, size, count = 0, i; |
9ed318d5 | 4688 | unsigned int f, bytecount, segs; |
bc7f75fa AK |
4689 | |
4690 | i = tx_ring->next_to_use; | |
4691 | ||
4692 | while (len) { | |
1b7719c4 | 4693 | buffer_info = &tx_ring->buffer_info[i]; |
bc7f75fa AK |
4694 | size = min(len, max_per_txd); |
4695 | ||
bc7f75fa | 4696 | buffer_info->length = size; |
bc7f75fa | 4697 | buffer_info->time_stamp = jiffies; |
bc7f75fa | 4698 | buffer_info->next_to_watch = i; |
0be3f55f NN |
4699 | buffer_info->dma = dma_map_single(&pdev->dev, |
4700 | skb->data + offset, | |
af667a29 | 4701 | size, DMA_TO_DEVICE); |
03b1320d | 4702 | buffer_info->mapped_as_page = false; |
0be3f55f | 4703 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) |
03b1320d | 4704 | goto dma_error; |
bc7f75fa AK |
4705 | |
4706 | len -= size; | |
4707 | offset += size; | |
03b1320d | 4708 | count++; |
1b7719c4 AD |
4709 | |
4710 | if (len) { | |
4711 | i++; | |
4712 | if (i == tx_ring->count) | |
4713 | i = 0; | |
4714 | } | |
bc7f75fa AK |
4715 | } |
4716 | ||
4717 | for (f = 0; f < nr_frags; f++) { | |
9e903e08 | 4718 | const struct skb_frag_struct *frag; |
bc7f75fa AK |
4719 | |
4720 | frag = &skb_shinfo(skb)->frags[f]; | |
9e903e08 | 4721 | len = skb_frag_size(frag); |
877749bf | 4722 | offset = 0; |
bc7f75fa AK |
4723 | |
4724 | while (len) { | |
1b7719c4 AD |
4725 | i++; |
4726 | if (i == tx_ring->count) | |
4727 | i = 0; | |
4728 | ||
bc7f75fa AK |
4729 | buffer_info = &tx_ring->buffer_info[i]; |
4730 | size = min(len, max_per_txd); | |
bc7f75fa AK |
4731 | |
4732 | buffer_info->length = size; | |
4733 | buffer_info->time_stamp = jiffies; | |
bc7f75fa | 4734 | buffer_info->next_to_watch = i; |
877749bf IC |
4735 | buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag, |
4736 | offset, size, DMA_TO_DEVICE); | |
03b1320d | 4737 | buffer_info->mapped_as_page = true; |
0be3f55f | 4738 | if (dma_mapping_error(&pdev->dev, buffer_info->dma)) |
03b1320d | 4739 | goto dma_error; |
bc7f75fa AK |
4740 | |
4741 | len -= size; | |
4742 | offset += size; | |
4743 | count++; | |
bc7f75fa AK |
4744 | } |
4745 | } | |
4746 | ||
af667a29 | 4747 | segs = skb_shinfo(skb)->gso_segs ? : 1; |
9ed318d5 TH |
4748 | /* multiply data chunks by size of headers */ |
4749 | bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len; | |
4750 | ||
bc7f75fa | 4751 | tx_ring->buffer_info[i].skb = skb; |
9ed318d5 TH |
4752 | tx_ring->buffer_info[i].segs = segs; |
4753 | tx_ring->buffer_info[i].bytecount = bytecount; | |
bc7f75fa AK |
4754 | tx_ring->buffer_info[first].next_to_watch = i; |
4755 | ||
4756 | return count; | |
03b1320d AD |
4757 | |
4758 | dma_error: | |
af667a29 | 4759 | dev_err(&pdev->dev, "Tx DMA map failed\n"); |
03b1320d | 4760 | buffer_info->dma = 0; |
c1fa347f | 4761 | if (count) |
03b1320d | 4762 | count--; |
c1fa347f RK |
4763 | |
4764 | while (count--) { | |
af667a29 | 4765 | if (i == 0) |
03b1320d | 4766 | i += tx_ring->count; |
c1fa347f | 4767 | i--; |
03b1320d | 4768 | buffer_info = &tx_ring->buffer_info[i]; |
1d51c418 | 4769 | e1000_put_txbuf(adapter, buffer_info); |
03b1320d AD |
4770 | } |
4771 | ||
4772 | return 0; | |
bc7f75fa AK |
4773 | } |
4774 | ||
4775 | static void e1000_tx_queue(struct e1000_adapter *adapter, | |
4776 | int tx_flags, int count) | |
4777 | { | |
4778 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
4779 | struct e1000_tx_desc *tx_desc = NULL; | |
4780 | struct e1000_buffer *buffer_info; | |
4781 | u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; | |
4782 | unsigned int i; | |
4783 | ||
4784 | if (tx_flags & E1000_TX_FLAGS_TSO) { | |
4785 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | | |
4786 | E1000_TXD_CMD_TSE; | |
4787 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
4788 | ||
4789 | if (tx_flags & E1000_TX_FLAGS_IPV4) | |
4790 | txd_upper |= E1000_TXD_POPTS_IXSM << 8; | |
4791 | } | |
4792 | ||
4793 | if (tx_flags & E1000_TX_FLAGS_CSUM) { | |
4794 | txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; | |
4795 | txd_upper |= E1000_TXD_POPTS_TXSM << 8; | |
4796 | } | |
4797 | ||
4798 | if (tx_flags & E1000_TX_FLAGS_VLAN) { | |
4799 | txd_lower |= E1000_TXD_CMD_VLE; | |
4800 | txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); | |
4801 | } | |
4802 | ||
4803 | i = tx_ring->next_to_use; | |
4804 | ||
36b973df | 4805 | do { |
bc7f75fa AK |
4806 | buffer_info = &tx_ring->buffer_info[i]; |
4807 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
4808 | tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | |
4809 | tx_desc->lower.data = | |
4810 | cpu_to_le32(txd_lower | buffer_info->length); | |
4811 | tx_desc->upper.data = cpu_to_le32(txd_upper); | |
4812 | ||
4813 | i++; | |
4814 | if (i == tx_ring->count) | |
4815 | i = 0; | |
36b973df | 4816 | } while (--count > 0); |
bc7f75fa AK |
4817 | |
4818 | tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); | |
4819 | ||
ad68076e BA |
4820 | /* |
4821 | * Force memory writes to complete before letting h/w | |
bc7f75fa AK |
4822 | * know there are new descriptors to fetch. (Only |
4823 | * applicable for weak-ordered memory model archs, | |
ad68076e BA |
4824 | * such as IA-64). |
4825 | */ | |
bc7f75fa AK |
4826 | wmb(); |
4827 | ||
4828 | tx_ring->next_to_use = i; | |
c6e7f51e BA |
4829 | |
4830 | if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) | |
4831 | e1000e_update_tdt_wa(adapter, i); | |
4832 | else | |
4833 | writel(i, adapter->hw.hw_addr + tx_ring->tail); | |
4834 | ||
ad68076e BA |
4835 | /* |
4836 | * we need this if more than one processor can write to our tail | |
4837 | * at a time, it synchronizes IO on IA64/Altix systems | |
4838 | */ | |
bc7f75fa AK |
4839 | mmiowb(); |
4840 | } | |
4841 | ||
4842 | #define MINIMUM_DHCP_PACKET_SIZE 282 | |
4843 | static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, | |
4844 | struct sk_buff *skb) | |
4845 | { | |
4846 | struct e1000_hw *hw = &adapter->hw; | |
4847 | u16 length, offset; | |
4848 | ||
4849 | if (vlan_tx_tag_present(skb)) { | |
8e95a202 JP |
4850 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && |
4851 | (adapter->hw.mng_cookie.status & | |
bc7f75fa AK |
4852 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) |
4853 | return 0; | |
4854 | } | |
4855 | ||
4856 | if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) | |
4857 | return 0; | |
4858 | ||
4859 | if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP)) | |
4860 | return 0; | |
4861 | ||
4862 | { | |
4863 | const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14); | |
4864 | struct udphdr *udp; | |
4865 | ||
4866 | if (ip->protocol != IPPROTO_UDP) | |
4867 | return 0; | |
4868 | ||
4869 | udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2)); | |
4870 | if (ntohs(udp->dest) != 67) | |
4871 | return 0; | |
4872 | ||
4873 | offset = (u8 *)udp + 8 - skb->data; | |
4874 | length = skb->len - offset; | |
4875 | return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length); | |
4876 | } | |
4877 | ||
4878 | return 0; | |
4879 | } | |
4880 | ||
4881 | static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) | |
4882 | { | |
4883 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
4884 | ||
4885 | netif_stop_queue(netdev); | |
ad68076e BA |
4886 | /* |
4887 | * Herbert's original patch had: | |
bc7f75fa | 4888 | * smp_mb__after_netif_stop_queue(); |
ad68076e BA |
4889 | * but since that doesn't exist yet, just open code it. |
4890 | */ | |
bc7f75fa AK |
4891 | smp_mb(); |
4892 | ||
ad68076e BA |
4893 | /* |
4894 | * We need to check again in a case another CPU has just | |
4895 | * made room available. | |
4896 | */ | |
bc7f75fa AK |
4897 | if (e1000_desc_unused(adapter->tx_ring) < size) |
4898 | return -EBUSY; | |
4899 | ||
4900 | /* A reprieve! */ | |
4901 | netif_start_queue(netdev); | |
4902 | ++adapter->restart_queue; | |
4903 | return 0; | |
4904 | } | |
4905 | ||
4906 | static int e1000_maybe_stop_tx(struct net_device *netdev, int size) | |
4907 | { | |
4908 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
4909 | ||
4910 | if (e1000_desc_unused(adapter->tx_ring) >= size) | |
4911 | return 0; | |
4912 | return __e1000_maybe_stop_tx(netdev, size); | |
4913 | } | |
4914 | ||
4915 | #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) | |
3b29a56d SH |
4916 | static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, |
4917 | struct net_device *netdev) | |
bc7f75fa AK |
4918 | { |
4919 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
4920 | struct e1000_ring *tx_ring = adapter->tx_ring; | |
4921 | unsigned int first; | |
4922 | unsigned int max_per_txd = E1000_MAX_PER_TXD; | |
4923 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | |
4924 | unsigned int tx_flags = 0; | |
e743d313 | 4925 | unsigned int len = skb_headlen(skb); |
4e6c709c AK |
4926 | unsigned int nr_frags; |
4927 | unsigned int mss; | |
bc7f75fa AK |
4928 | int count = 0; |
4929 | int tso; | |
4930 | unsigned int f; | |
bc7f75fa AK |
4931 | |
4932 | if (test_bit(__E1000_DOWN, &adapter->state)) { | |
4933 | dev_kfree_skb_any(skb); | |
4934 | return NETDEV_TX_OK; | |
4935 | } | |
4936 | ||
4937 | if (skb->len <= 0) { | |
4938 | dev_kfree_skb_any(skb); | |
4939 | return NETDEV_TX_OK; | |
4940 | } | |
4941 | ||
4942 | mss = skb_shinfo(skb)->gso_size; | |
ad68076e BA |
4943 | /* |
4944 | * The controller does a simple calculation to | |
bc7f75fa AK |
4945 | * make sure there is enough room in the FIFO before |
4946 | * initiating the DMA for each buffer. The calc is: | |
4947 | * 4 = ceil(buffer len/mss). To make sure we don't | |
4948 | * overrun the FIFO, adjust the max buffer len if mss | |
ad68076e BA |
4949 | * drops. |
4950 | */ | |
bc7f75fa AK |
4951 | if (mss) { |
4952 | u8 hdr_len; | |
4953 | max_per_txd = min(mss << 2, max_per_txd); | |
4954 | max_txd_pwr = fls(max_per_txd) - 1; | |
4955 | ||
ad68076e BA |
4956 | /* |
4957 | * TSO Workaround for 82571/2/3 Controllers -- if skb->data | |
4958 | * points to just header, pull a few bytes of payload from | |
4959 | * frags into skb->data | |
4960 | */ | |
bc7f75fa | 4961 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
ad68076e BA |
4962 | /* |
4963 | * we do this workaround for ES2LAN, but it is un-necessary, | |
4964 | * avoiding it could save a lot of cycles | |
4965 | */ | |
4e6c709c | 4966 | if (skb->data_len && (hdr_len == len)) { |
bc7f75fa AK |
4967 | unsigned int pull_size; |
4968 | ||
4969 | pull_size = min((unsigned int)4, skb->data_len); | |
4970 | if (!__pskb_pull_tail(skb, pull_size)) { | |
44defeb3 | 4971 | e_err("__pskb_pull_tail failed.\n"); |
bc7f75fa AK |
4972 | dev_kfree_skb_any(skb); |
4973 | return NETDEV_TX_OK; | |
4974 | } | |
e743d313 | 4975 | len = skb_headlen(skb); |
bc7f75fa AK |
4976 | } |
4977 | } | |
4978 | ||
4979 | /* reserve a descriptor for the offload context */ | |
4980 | if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) | |
4981 | count++; | |
4982 | count++; | |
4983 | ||
4984 | count += TXD_USE_COUNT(len, max_txd_pwr); | |
4985 | ||
4986 | nr_frags = skb_shinfo(skb)->nr_frags; | |
4987 | for (f = 0; f < nr_frags; f++) | |
9e903e08 | 4988 | count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]), |
bc7f75fa AK |
4989 | max_txd_pwr); |
4990 | ||
4991 | if (adapter->hw.mac.tx_pkt_filtering) | |
4992 | e1000_transfer_dhcp_info(adapter, skb); | |
4993 | ||
ad68076e BA |
4994 | /* |
4995 | * need: count + 2 desc gap to keep tail from touching | |
4996 | * head, otherwise try next time | |
4997 | */ | |
92af3e95 | 4998 | if (e1000_maybe_stop_tx(netdev, count + 2)) |
bc7f75fa | 4999 | return NETDEV_TX_BUSY; |
bc7f75fa | 5000 | |
eab6d18d | 5001 | if (vlan_tx_tag_present(skb)) { |
bc7f75fa AK |
5002 | tx_flags |= E1000_TX_FLAGS_VLAN; |
5003 | tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); | |
5004 | } | |
5005 | ||
5006 | first = tx_ring->next_to_use; | |
5007 | ||
5008 | tso = e1000_tso(adapter, skb); | |
5009 | if (tso < 0) { | |
5010 | dev_kfree_skb_any(skb); | |
bc7f75fa AK |
5011 | return NETDEV_TX_OK; |
5012 | } | |
5013 | ||
5014 | if (tso) | |
5015 | tx_flags |= E1000_TX_FLAGS_TSO; | |
5016 | else if (e1000_tx_csum(adapter, skb)) | |
5017 | tx_flags |= E1000_TX_FLAGS_CSUM; | |
5018 | ||
ad68076e BA |
5019 | /* |
5020 | * Old method was to assume IPv4 packet by default if TSO was enabled. | |
bc7f75fa | 5021 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
ad68076e BA |
5022 | * no longer assume, we must. |
5023 | */ | |
bc7f75fa AK |
5024 | if (skb->protocol == htons(ETH_P_IP)) |
5025 | tx_flags |= E1000_TX_FLAGS_IPV4; | |
5026 | ||
25985edc | 5027 | /* if count is 0 then mapping error has occurred */ |
bc7f75fa | 5028 | count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss); |
1b7719c4 AD |
5029 | if (count) { |
5030 | e1000_tx_queue(adapter, tx_flags, count); | |
1b7719c4 AD |
5031 | /* Make sure there is space in the ring for the next send. */ |
5032 | e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2); | |
5033 | ||
5034 | } else { | |
bc7f75fa | 5035 | dev_kfree_skb_any(skb); |
1b7719c4 AD |
5036 | tx_ring->buffer_info[first].time_stamp = 0; |
5037 | tx_ring->next_to_use = first; | |
bc7f75fa AK |
5038 | } |
5039 | ||
bc7f75fa AK |
5040 | return NETDEV_TX_OK; |
5041 | } | |
5042 | ||
5043 | /** | |
5044 | * e1000_tx_timeout - Respond to a Tx Hang | |
5045 | * @netdev: network interface device structure | |
5046 | **/ | |
5047 | static void e1000_tx_timeout(struct net_device *netdev) | |
5048 | { | |
5049 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5050 | ||
5051 | /* Do the reset outside of interrupt context */ | |
5052 | adapter->tx_timeout_count++; | |
5053 | schedule_work(&adapter->reset_task); | |
5054 | } | |
5055 | ||
5056 | static void e1000_reset_task(struct work_struct *work) | |
5057 | { | |
5058 | struct e1000_adapter *adapter; | |
5059 | adapter = container_of(work, struct e1000_adapter, reset_task); | |
5060 | ||
615b32af JB |
5061 | /* don't run the task if already down */ |
5062 | if (test_bit(__E1000_DOWN, &adapter->state)) | |
5063 | return; | |
5064 | ||
affa9dfb CW |
5065 | if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && |
5066 | (adapter->flags & FLAG_RX_RESTART_NOW))) { | |
5067 | e1000e_dump(adapter); | |
5068 | e_err("Reset adapter\n"); | |
5069 | } | |
bc7f75fa AK |
5070 | e1000e_reinit_locked(adapter); |
5071 | } | |
5072 | ||
5073 | /** | |
67fd4fcb | 5074 | * e1000_get_stats64 - Get System Network Statistics |
bc7f75fa | 5075 | * @netdev: network interface device structure |
67fd4fcb | 5076 | * @stats: rtnl_link_stats64 pointer |
bc7f75fa AK |
5077 | * |
5078 | * Returns the address of the device statistics structure. | |
bc7f75fa | 5079 | **/ |
67fd4fcb JK |
5080 | struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, |
5081 | struct rtnl_link_stats64 *stats) | |
bc7f75fa | 5082 | { |
67fd4fcb JK |
5083 | struct e1000_adapter *adapter = netdev_priv(netdev); |
5084 | ||
5085 | memset(stats, 0, sizeof(struct rtnl_link_stats64)); | |
5086 | spin_lock(&adapter->stats64_lock); | |
5087 | e1000e_update_stats(adapter); | |
5088 | /* Fill out the OS statistics structure */ | |
5089 | stats->rx_bytes = adapter->stats.gorc; | |
5090 | stats->rx_packets = adapter->stats.gprc; | |
5091 | stats->tx_bytes = adapter->stats.gotc; | |
5092 | stats->tx_packets = adapter->stats.gptc; | |
5093 | stats->multicast = adapter->stats.mprc; | |
5094 | stats->collisions = adapter->stats.colc; | |
5095 | ||
5096 | /* Rx Errors */ | |
5097 | ||
5098 | /* | |
5099 | * RLEC on some newer hardware can be incorrect so build | |
5100 | * our own version based on RUC and ROC | |
5101 | */ | |
5102 | stats->rx_errors = adapter->stats.rxerrc + | |
5103 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
5104 | adapter->stats.ruc + adapter->stats.roc + | |
5105 | adapter->stats.cexterr; | |
5106 | stats->rx_length_errors = adapter->stats.ruc + | |
5107 | adapter->stats.roc; | |
5108 | stats->rx_crc_errors = adapter->stats.crcerrs; | |
5109 | stats->rx_frame_errors = adapter->stats.algnerrc; | |
5110 | stats->rx_missed_errors = adapter->stats.mpc; | |
5111 | ||
5112 | /* Tx Errors */ | |
5113 | stats->tx_errors = adapter->stats.ecol + | |
5114 | adapter->stats.latecol; | |
5115 | stats->tx_aborted_errors = adapter->stats.ecol; | |
5116 | stats->tx_window_errors = adapter->stats.latecol; | |
5117 | stats->tx_carrier_errors = adapter->stats.tncrs; | |
5118 | ||
5119 | /* Tx Dropped needs to be maintained elsewhere */ | |
5120 | ||
5121 | spin_unlock(&adapter->stats64_lock); | |
5122 | return stats; | |
bc7f75fa AK |
5123 | } |
5124 | ||
5125 | /** | |
5126 | * e1000_change_mtu - Change the Maximum Transfer Unit | |
5127 | * @netdev: network interface device structure | |
5128 | * @new_mtu: new value for maximum frame size | |
5129 | * | |
5130 | * Returns 0 on success, negative on failure | |
5131 | **/ | |
5132 | static int e1000_change_mtu(struct net_device *netdev, int new_mtu) | |
5133 | { | |
5134 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5135 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; | |
5136 | ||
2adc55c9 BA |
5137 | /* Jumbo frame support */ |
5138 | if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) && | |
5139 | !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) { | |
5140 | e_err("Jumbo Frames not supported.\n"); | |
bc7f75fa AK |
5141 | return -EINVAL; |
5142 | } | |
5143 | ||
2adc55c9 BA |
5144 | /* Supported frame sizes */ |
5145 | if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) || | |
5146 | (max_frame > adapter->max_hw_frame_size)) { | |
5147 | e_err("Unsupported MTU setting\n"); | |
bc7f75fa AK |
5148 | return -EINVAL; |
5149 | } | |
5150 | ||
a1ce6473 BA |
5151 | /* Jumbo frame workaround on 82579 requires CRC be stripped */ |
5152 | if ((adapter->hw.mac.type == e1000_pch2lan) && | |
5153 | !(adapter->flags2 & FLAG2_CRC_STRIPPING) && | |
5154 | (new_mtu > ETH_DATA_LEN)) { | |
ef456f85 | 5155 | e_err("Jumbo Frames not supported on 82579 when CRC stripping is disabled.\n"); |
a1ce6473 BA |
5156 | return -EINVAL; |
5157 | } | |
5158 | ||
6f461f6c BA |
5159 | /* 82573 Errata 17 */ |
5160 | if (((adapter->hw.mac.type == e1000_82573) || | |
5161 | (adapter->hw.mac.type == e1000_82574)) && | |
5162 | (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) { | |
5163 | adapter->flags2 |= FLAG2_DISABLE_ASPM_L1; | |
5164 | e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1); | |
5165 | } | |
5166 | ||
bc7f75fa | 5167 | while (test_and_set_bit(__E1000_RESETTING, &adapter->state)) |
1bba4386 | 5168 | usleep_range(1000, 2000); |
610c9928 | 5169 | /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */ |
318a94d6 | 5170 | adapter->max_frame_size = max_frame; |
610c9928 BA |
5171 | e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu); |
5172 | netdev->mtu = new_mtu; | |
bc7f75fa AK |
5173 | if (netif_running(netdev)) |
5174 | e1000e_down(adapter); | |
5175 | ||
ad68076e BA |
5176 | /* |
5177 | * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN | |
bc7f75fa AK |
5178 | * means we reserve 2 more, this pushes us to allocate from the next |
5179 | * larger slab size. | |
ad68076e | 5180 | * i.e. RXBUFFER_2048 --> size-4096 slab |
97ac8cae BA |
5181 | * However with the new *_jumbo_rx* routines, jumbo receives will use |
5182 | * fragmented skbs | |
ad68076e | 5183 | */ |
bc7f75fa | 5184 | |
9926146b | 5185 | if (max_frame <= 2048) |
bc7f75fa AK |
5186 | adapter->rx_buffer_len = 2048; |
5187 | else | |
5188 | adapter->rx_buffer_len = 4096; | |
5189 | ||
5190 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
5191 | if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || | |
5192 | (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)) | |
5193 | adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN | |
ad68076e | 5194 | + ETH_FCS_LEN; |
bc7f75fa | 5195 | |
bc7f75fa AK |
5196 | if (netif_running(netdev)) |
5197 | e1000e_up(adapter); | |
5198 | else | |
5199 | e1000e_reset(adapter); | |
5200 | ||
5201 | clear_bit(__E1000_RESETTING, &adapter->state); | |
5202 | ||
5203 | return 0; | |
5204 | } | |
5205 | ||
5206 | static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | |
5207 | int cmd) | |
5208 | { | |
5209 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5210 | struct mii_ioctl_data *data = if_mii(ifr); | |
bc7f75fa | 5211 | |
318a94d6 | 5212 | if (adapter->hw.phy.media_type != e1000_media_type_copper) |
bc7f75fa AK |
5213 | return -EOPNOTSUPP; |
5214 | ||
5215 | switch (cmd) { | |
5216 | case SIOCGMIIPHY: | |
5217 | data->phy_id = adapter->hw.phy.addr; | |
5218 | break; | |
5219 | case SIOCGMIIREG: | |
b16a002e BA |
5220 | e1000_phy_read_status(adapter); |
5221 | ||
7c25769f BA |
5222 | switch (data->reg_num & 0x1F) { |
5223 | case MII_BMCR: | |
5224 | data->val_out = adapter->phy_regs.bmcr; | |
5225 | break; | |
5226 | case MII_BMSR: | |
5227 | data->val_out = adapter->phy_regs.bmsr; | |
5228 | break; | |
5229 | case MII_PHYSID1: | |
5230 | data->val_out = (adapter->hw.phy.id >> 16); | |
5231 | break; | |
5232 | case MII_PHYSID2: | |
5233 | data->val_out = (adapter->hw.phy.id & 0xFFFF); | |
5234 | break; | |
5235 | case MII_ADVERTISE: | |
5236 | data->val_out = adapter->phy_regs.advertise; | |
5237 | break; | |
5238 | case MII_LPA: | |
5239 | data->val_out = adapter->phy_regs.lpa; | |
5240 | break; | |
5241 | case MII_EXPANSION: | |
5242 | data->val_out = adapter->phy_regs.expansion; | |
5243 | break; | |
5244 | case MII_CTRL1000: | |
5245 | data->val_out = adapter->phy_regs.ctrl1000; | |
5246 | break; | |
5247 | case MII_STAT1000: | |
5248 | data->val_out = adapter->phy_regs.stat1000; | |
5249 | break; | |
5250 | case MII_ESTATUS: | |
5251 | data->val_out = adapter->phy_regs.estatus; | |
5252 | break; | |
5253 | default: | |
bc7f75fa AK |
5254 | return -EIO; |
5255 | } | |
bc7f75fa AK |
5256 | break; |
5257 | case SIOCSMIIREG: | |
5258 | default: | |
5259 | return -EOPNOTSUPP; | |
5260 | } | |
5261 | return 0; | |
5262 | } | |
5263 | ||
5264 | static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
5265 | { | |
5266 | switch (cmd) { | |
5267 | case SIOCGMIIPHY: | |
5268 | case SIOCGMIIREG: | |
5269 | case SIOCSMIIREG: | |
5270 | return e1000_mii_ioctl(netdev, ifr, cmd); | |
5271 | default: | |
5272 | return -EOPNOTSUPP; | |
5273 | } | |
5274 | } | |
5275 | ||
a4f58f54 BA |
5276 | static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc) |
5277 | { | |
5278 | struct e1000_hw *hw = &adapter->hw; | |
5279 | u32 i, mac_reg; | |
2b6b168d | 5280 | u16 phy_reg, wuc_enable; |
a4f58f54 BA |
5281 | int retval = 0; |
5282 | ||
5283 | /* copy MAC RARs to PHY RARs */ | |
d3738bb8 | 5284 | e1000_copy_rx_addrs_to_phy_ich8lan(hw); |
a4f58f54 | 5285 | |
2b6b168d BA |
5286 | retval = hw->phy.ops.acquire(hw); |
5287 | if (retval) { | |
5288 | e_err("Could not acquire PHY\n"); | |
5289 | return retval; | |
5290 | } | |
5291 | ||
5292 | /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */ | |
5293 | retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable); | |
5294 | if (retval) | |
5295 | goto out; | |
5296 | ||
5297 | /* copy MAC MTA to PHY MTA - only needed for pchlan */ | |
a4f58f54 BA |
5298 | for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) { |
5299 | mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i); | |
2b6b168d BA |
5300 | hw->phy.ops.write_reg_page(hw, BM_MTA(i), |
5301 | (u16)(mac_reg & 0xFFFF)); | |
5302 | hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1, | |
5303 | (u16)((mac_reg >> 16) & 0xFFFF)); | |
a4f58f54 BA |
5304 | } |
5305 | ||
5306 | /* configure PHY Rx Control register */ | |
2b6b168d | 5307 | hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg); |
a4f58f54 BA |
5308 | mac_reg = er32(RCTL); |
5309 | if (mac_reg & E1000_RCTL_UPE) | |
5310 | phy_reg |= BM_RCTL_UPE; | |
5311 | if (mac_reg & E1000_RCTL_MPE) | |
5312 | phy_reg |= BM_RCTL_MPE; | |
5313 | phy_reg &= ~(BM_RCTL_MO_MASK); | |
5314 | if (mac_reg & E1000_RCTL_MO_3) | |
5315 | phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT) | |
5316 | << BM_RCTL_MO_SHIFT); | |
5317 | if (mac_reg & E1000_RCTL_BAM) | |
5318 | phy_reg |= BM_RCTL_BAM; | |
5319 | if (mac_reg & E1000_RCTL_PMCF) | |
5320 | phy_reg |= BM_RCTL_PMCF; | |
5321 | mac_reg = er32(CTRL); | |
5322 | if (mac_reg & E1000_CTRL_RFCE) | |
5323 | phy_reg |= BM_RCTL_RFCE; | |
2b6b168d | 5324 | hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg); |
a4f58f54 BA |
5325 | |
5326 | /* enable PHY wakeup in MAC register */ | |
5327 | ew32(WUFC, wufc); | |
5328 | ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN); | |
5329 | ||
5330 | /* configure and enable PHY wakeup in PHY registers */ | |
2b6b168d BA |
5331 | hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc); |
5332 | hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN); | |
a4f58f54 BA |
5333 | |
5334 | /* activate PHY wakeup */ | |
2b6b168d BA |
5335 | wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT; |
5336 | retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable); | |
a4f58f54 BA |
5337 | if (retval) |
5338 | e_err("Could not set PHY Host Wakeup bit\n"); | |
5339 | out: | |
94d8186a | 5340 | hw->phy.ops.release(hw); |
a4f58f54 BA |
5341 | |
5342 | return retval; | |
5343 | } | |
5344 | ||
23606cf5 RW |
5345 | static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, |
5346 | bool runtime) | |
bc7f75fa AK |
5347 | { |
5348 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5349 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5350 | struct e1000_hw *hw = &adapter->hw; | |
5351 | u32 ctrl, ctrl_ext, rctl, status; | |
23606cf5 RW |
5352 | /* Runtime suspend should only enable wakeup for link changes */ |
5353 | u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol; | |
bc7f75fa AK |
5354 | int retval = 0; |
5355 | ||
5356 | netif_device_detach(netdev); | |
5357 | ||
5358 | if (netif_running(netdev)) { | |
5359 | WARN_ON(test_bit(__E1000_RESETTING, &adapter->state)); | |
5360 | e1000e_down(adapter); | |
5361 | e1000_free_irq(adapter); | |
5362 | } | |
4662e82b | 5363 | e1000e_reset_interrupt_capability(adapter); |
bc7f75fa AK |
5364 | |
5365 | retval = pci_save_state(pdev); | |
5366 | if (retval) | |
5367 | return retval; | |
5368 | ||
5369 | status = er32(STATUS); | |
5370 | if (status & E1000_STATUS_LU) | |
5371 | wufc &= ~E1000_WUFC_LNKC; | |
5372 | ||
5373 | if (wufc) { | |
5374 | e1000_setup_rctl(adapter); | |
ef9b965a | 5375 | e1000e_set_rx_mode(netdev); |
bc7f75fa AK |
5376 | |
5377 | /* turn on all-multi mode if wake on multicast is enabled */ | |
5378 | if (wufc & E1000_WUFC_MC) { | |
5379 | rctl = er32(RCTL); | |
5380 | rctl |= E1000_RCTL_MPE; | |
5381 | ew32(RCTL, rctl); | |
5382 | } | |
5383 | ||
5384 | ctrl = er32(CTRL); | |
5385 | /* advertise wake from D3Cold */ | |
5386 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
5387 | /* phy power management enable */ | |
5388 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
a4f58f54 BA |
5389 | ctrl |= E1000_CTRL_ADVD3WUC; |
5390 | if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)) | |
5391 | ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT; | |
bc7f75fa AK |
5392 | ew32(CTRL, ctrl); |
5393 | ||
318a94d6 JK |
5394 | if (adapter->hw.phy.media_type == e1000_media_type_fiber || |
5395 | adapter->hw.phy.media_type == | |
5396 | e1000_media_type_internal_serdes) { | |
bc7f75fa AK |
5397 | /* keep the laser running in D3 */ |
5398 | ctrl_ext = er32(CTRL_EXT); | |
93a23f48 | 5399 | ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; |
bc7f75fa AK |
5400 | ew32(CTRL_EXT, ctrl_ext); |
5401 | } | |
5402 | ||
97ac8cae | 5403 | if (adapter->flags & FLAG_IS_ICH) |
99730e4c | 5404 | e1000_suspend_workarounds_ich8lan(&adapter->hw); |
97ac8cae | 5405 | |
bc7f75fa AK |
5406 | /* Allow time for pending master requests to run */ |
5407 | e1000e_disable_pcie_master(&adapter->hw); | |
5408 | ||
82776a4b | 5409 | if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { |
a4f58f54 BA |
5410 | /* enable wakeup by the PHY */ |
5411 | retval = e1000_init_phy_wakeup(adapter, wufc); | |
5412 | if (retval) | |
5413 | return retval; | |
5414 | } else { | |
5415 | /* enable wakeup by the MAC */ | |
5416 | ew32(WUFC, wufc); | |
5417 | ew32(WUC, E1000_WUC_PME_EN); | |
5418 | } | |
bc7f75fa AK |
5419 | } else { |
5420 | ew32(WUC, 0); | |
5421 | ew32(WUFC, 0); | |
bc7f75fa AK |
5422 | } |
5423 | ||
4f9de721 RW |
5424 | *enable_wake = !!wufc; |
5425 | ||
bc7f75fa | 5426 | /* make sure adapter isn't asleep if manageability is enabled */ |
82776a4b BA |
5427 | if ((adapter->flags & FLAG_MNG_PT_ENABLED) || |
5428 | (hw->mac.ops.check_mng_mode(hw))) | |
4f9de721 | 5429 | *enable_wake = true; |
bc7f75fa AK |
5430 | |
5431 | if (adapter->hw.phy.type == e1000_phy_igp_3) | |
5432 | e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); | |
5433 | ||
ad68076e BA |
5434 | /* |
5435 | * Release control of h/w to f/w. If f/w is AMT enabled, this | |
5436 | * would have already happened in close and is redundant. | |
5437 | */ | |
31dbe5b4 | 5438 | e1000e_release_hw_control(adapter); |
bc7f75fa AK |
5439 | |
5440 | pci_disable_device(pdev); | |
5441 | ||
4f9de721 RW |
5442 | return 0; |
5443 | } | |
5444 | ||
5445 | static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) | |
5446 | { | |
5447 | if (sleep && wake) { | |
5448 | pci_prepare_to_sleep(pdev); | |
5449 | return; | |
5450 | } | |
5451 | ||
5452 | pci_wake_from_d3(pdev, wake); | |
5453 | pci_set_power_state(pdev, PCI_D3hot); | |
5454 | } | |
5455 | ||
5456 | static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, | |
5457 | bool wake) | |
5458 | { | |
5459 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5460 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5461 | ||
005cbdfc AD |
5462 | /* |
5463 | * The pci-e switch on some quad port adapters will report a | |
5464 | * correctable error when the MAC transitions from D0 to D3. To | |
5465 | * prevent this we need to mask off the correctable errors on the | |
5466 | * downstream port of the pci-e switch. | |
5467 | */ | |
5468 | if (adapter->flags & FLAG_IS_QUAD_PORT) { | |
5469 | struct pci_dev *us_dev = pdev->bus->self; | |
353064de | 5470 | int pos = pci_pcie_cap(us_dev); |
005cbdfc AD |
5471 | u16 devctl; |
5472 | ||
5473 | pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl); | |
5474 | pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, | |
5475 | (devctl & ~PCI_EXP_DEVCTL_CERE)); | |
5476 | ||
4f9de721 | 5477 | e1000_power_off(pdev, sleep, wake); |
005cbdfc AD |
5478 | |
5479 | pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl); | |
5480 | } else { | |
4f9de721 | 5481 | e1000_power_off(pdev, sleep, wake); |
005cbdfc | 5482 | } |
bc7f75fa AK |
5483 | } |
5484 | ||
6f461f6c BA |
5485 | #ifdef CONFIG_PCIEASPM |
5486 | static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) | |
5487 | { | |
9f728f53 | 5488 | pci_disable_link_state_locked(pdev, state); |
6f461f6c BA |
5489 | } |
5490 | #else | |
5491 | static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) | |
1eae4eb2 AK |
5492 | { |
5493 | int pos; | |
6f461f6c | 5494 | u16 reg16; |
1eae4eb2 AK |
5495 | |
5496 | /* | |
6f461f6c BA |
5497 | * Both device and parent should have the same ASPM setting. |
5498 | * Disable ASPM in downstream component first and then upstream. | |
1eae4eb2 | 5499 | */ |
6f461f6c BA |
5500 | pos = pci_pcie_cap(pdev); |
5501 | pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16); | |
5502 | reg16 &= ~state; | |
5503 | pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); | |
5504 | ||
0c75ba22 AB |
5505 | if (!pdev->bus->self) |
5506 | return; | |
5507 | ||
6f461f6c BA |
5508 | pos = pci_pcie_cap(pdev->bus->self); |
5509 | pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, ®16); | |
5510 | reg16 &= ~state; | |
5511 | pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16); | |
5512 | } | |
5513 | #endif | |
78cd29d5 | 5514 | static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) |
6f461f6c BA |
5515 | { |
5516 | dev_info(&pdev->dev, "Disabling ASPM %s %s\n", | |
5517 | (state & PCIE_LINK_STATE_L0S) ? "L0s" : "", | |
5518 | (state & PCIE_LINK_STATE_L1) ? "L1" : ""); | |
5519 | ||
5520 | __e1000e_disable_aspm(pdev, state); | |
1eae4eb2 AK |
5521 | } |
5522 | ||
aa338601 | 5523 | #ifdef CONFIG_PM |
23606cf5 | 5524 | static bool e1000e_pm_ready(struct e1000_adapter *adapter) |
4f9de721 | 5525 | { |
23606cf5 | 5526 | return !!adapter->tx_ring->buffer_info; |
4f9de721 RW |
5527 | } |
5528 | ||
23606cf5 | 5529 | static int __e1000_resume(struct pci_dev *pdev) |
bc7f75fa AK |
5530 | { |
5531 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5532 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5533 | struct e1000_hw *hw = &adapter->hw; | |
78cd29d5 | 5534 | u16 aspm_disable_flag = 0; |
bc7f75fa AK |
5535 | u32 err; |
5536 | ||
78cd29d5 BA |
5537 | if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) |
5538 | aspm_disable_flag = PCIE_LINK_STATE_L0S; | |
5539 | if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) | |
5540 | aspm_disable_flag |= PCIE_LINK_STATE_L1; | |
5541 | if (aspm_disable_flag) | |
5542 | e1000e_disable_aspm(pdev, aspm_disable_flag); | |
5543 | ||
bc7f75fa AK |
5544 | pci_set_power_state(pdev, PCI_D0); |
5545 | pci_restore_state(pdev); | |
28b8f04a | 5546 | pci_save_state(pdev); |
6e4f6f6b | 5547 | |
4662e82b | 5548 | e1000e_set_interrupt_capability(adapter); |
bc7f75fa AK |
5549 | if (netif_running(netdev)) { |
5550 | err = e1000_request_irq(adapter); | |
5551 | if (err) | |
5552 | return err; | |
5553 | } | |
5554 | ||
99730e4c BA |
5555 | if (hw->mac.type == e1000_pch2lan) |
5556 | e1000_resume_workarounds_pchlan(&adapter->hw); | |
5557 | ||
bc7f75fa | 5558 | e1000e_power_up_phy(adapter); |
a4f58f54 BA |
5559 | |
5560 | /* report the system wakeup cause from S3/S4 */ | |
5561 | if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) { | |
5562 | u16 phy_data; | |
5563 | ||
5564 | e1e_rphy(&adapter->hw, BM_WUS, &phy_data); | |
5565 | if (phy_data) { | |
5566 | e_info("PHY Wakeup cause - %s\n", | |
5567 | phy_data & E1000_WUS_EX ? "Unicast Packet" : | |
5568 | phy_data & E1000_WUS_MC ? "Multicast Packet" : | |
5569 | phy_data & E1000_WUS_BC ? "Broadcast Packet" : | |
5570 | phy_data & E1000_WUS_MAG ? "Magic Packet" : | |
ef456f85 JK |
5571 | phy_data & E1000_WUS_LNKC ? |
5572 | "Link Status Change" : "other"); | |
a4f58f54 BA |
5573 | } |
5574 | e1e_wphy(&adapter->hw, BM_WUS, ~0); | |
5575 | } else { | |
5576 | u32 wus = er32(WUS); | |
5577 | if (wus) { | |
5578 | e_info("MAC Wakeup cause - %s\n", | |
5579 | wus & E1000_WUS_EX ? "Unicast Packet" : | |
5580 | wus & E1000_WUS_MC ? "Multicast Packet" : | |
5581 | wus & E1000_WUS_BC ? "Broadcast Packet" : | |
5582 | wus & E1000_WUS_MAG ? "Magic Packet" : | |
5583 | wus & E1000_WUS_LNKC ? "Link Status Change" : | |
5584 | "other"); | |
5585 | } | |
5586 | ew32(WUS, ~0); | |
5587 | } | |
5588 | ||
bc7f75fa | 5589 | e1000e_reset(adapter); |
bc7f75fa | 5590 | |
cd791618 | 5591 | e1000_init_manageability_pt(adapter); |
bc7f75fa AK |
5592 | |
5593 | if (netif_running(netdev)) | |
5594 | e1000e_up(adapter); | |
5595 | ||
5596 | netif_device_attach(netdev); | |
5597 | ||
ad68076e BA |
5598 | /* |
5599 | * If the controller has AMT, do not set DRV_LOAD until the interface | |
bc7f75fa | 5600 | * is up. For all other cases, let the f/w know that the h/w is now |
ad68076e BA |
5601 | * under the control of the driver. |
5602 | */ | |
c43bc57e | 5603 | if (!(adapter->flags & FLAG_HAS_AMT)) |
31dbe5b4 | 5604 | e1000e_get_hw_control(adapter); |
bc7f75fa AK |
5605 | |
5606 | return 0; | |
5607 | } | |
23606cf5 | 5608 | |
a0340162 RW |
5609 | #ifdef CONFIG_PM_SLEEP |
5610 | static int e1000_suspend(struct device *dev) | |
5611 | { | |
5612 | struct pci_dev *pdev = to_pci_dev(dev); | |
5613 | int retval; | |
5614 | bool wake; | |
5615 | ||
5616 | retval = __e1000_shutdown(pdev, &wake, false); | |
5617 | if (!retval) | |
5618 | e1000_complete_shutdown(pdev, true, wake); | |
5619 | ||
5620 | return retval; | |
5621 | } | |
5622 | ||
23606cf5 RW |
5623 | static int e1000_resume(struct device *dev) |
5624 | { | |
5625 | struct pci_dev *pdev = to_pci_dev(dev); | |
5626 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5627 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5628 | ||
5629 | if (e1000e_pm_ready(adapter)) | |
5630 | adapter->idle_check = true; | |
5631 | ||
5632 | return __e1000_resume(pdev); | |
5633 | } | |
a0340162 RW |
5634 | #endif /* CONFIG_PM_SLEEP */ |
5635 | ||
5636 | #ifdef CONFIG_PM_RUNTIME | |
5637 | static int e1000_runtime_suspend(struct device *dev) | |
5638 | { | |
5639 | struct pci_dev *pdev = to_pci_dev(dev); | |
5640 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5641 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5642 | ||
5643 | if (e1000e_pm_ready(adapter)) { | |
5644 | bool wake; | |
5645 | ||
5646 | __e1000_shutdown(pdev, &wake, true); | |
5647 | } | |
5648 | ||
5649 | return 0; | |
5650 | } | |
5651 | ||
5652 | static int e1000_idle(struct device *dev) | |
5653 | { | |
5654 | struct pci_dev *pdev = to_pci_dev(dev); | |
5655 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5656 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5657 | ||
5658 | if (!e1000e_pm_ready(adapter)) | |
5659 | return 0; | |
5660 | ||
5661 | if (adapter->idle_check) { | |
5662 | adapter->idle_check = false; | |
5663 | if (!e1000e_has_link(adapter)) | |
5664 | pm_schedule_suspend(dev, MSEC_PER_SEC); | |
5665 | } | |
5666 | ||
5667 | return -EBUSY; | |
5668 | } | |
23606cf5 RW |
5669 | |
5670 | static int e1000_runtime_resume(struct device *dev) | |
5671 | { | |
5672 | struct pci_dev *pdev = to_pci_dev(dev); | |
5673 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5674 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5675 | ||
5676 | if (!e1000e_pm_ready(adapter)) | |
5677 | return 0; | |
5678 | ||
5679 | adapter->idle_check = !dev->power.runtime_auto; | |
5680 | return __e1000_resume(pdev); | |
5681 | } | |
a0340162 | 5682 | #endif /* CONFIG_PM_RUNTIME */ |
aa338601 | 5683 | #endif /* CONFIG_PM */ |
bc7f75fa AK |
5684 | |
5685 | static void e1000_shutdown(struct pci_dev *pdev) | |
5686 | { | |
4f9de721 RW |
5687 | bool wake = false; |
5688 | ||
23606cf5 | 5689 | __e1000_shutdown(pdev, &wake, false); |
4f9de721 RW |
5690 | |
5691 | if (system_state == SYSTEM_POWER_OFF) | |
5692 | e1000_complete_shutdown(pdev, false, wake); | |
bc7f75fa AK |
5693 | } |
5694 | ||
5695 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
147b2c8c DD |
5696 | |
5697 | static irqreturn_t e1000_intr_msix(int irq, void *data) | |
5698 | { | |
5699 | struct net_device *netdev = data; | |
5700 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
147b2c8c DD |
5701 | |
5702 | if (adapter->msix_entries) { | |
90da0669 BA |
5703 | int vector, msix_irq; |
5704 | ||
147b2c8c DD |
5705 | vector = 0; |
5706 | msix_irq = adapter->msix_entries[vector].vector; | |
5707 | disable_irq(msix_irq); | |
5708 | e1000_intr_msix_rx(msix_irq, netdev); | |
5709 | enable_irq(msix_irq); | |
5710 | ||
5711 | vector++; | |
5712 | msix_irq = adapter->msix_entries[vector].vector; | |
5713 | disable_irq(msix_irq); | |
5714 | e1000_intr_msix_tx(msix_irq, netdev); | |
5715 | enable_irq(msix_irq); | |
5716 | ||
5717 | vector++; | |
5718 | msix_irq = adapter->msix_entries[vector].vector; | |
5719 | disable_irq(msix_irq); | |
5720 | e1000_msix_other(msix_irq, netdev); | |
5721 | enable_irq(msix_irq); | |
5722 | } | |
5723 | ||
5724 | return IRQ_HANDLED; | |
5725 | } | |
5726 | ||
bc7f75fa AK |
5727 | /* |
5728 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
5729 | * without having to re-enable interrupts. It's not called while | |
5730 | * the interrupt routine is executing. | |
5731 | */ | |
5732 | static void e1000_netpoll(struct net_device *netdev) | |
5733 | { | |
5734 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5735 | ||
147b2c8c DD |
5736 | switch (adapter->int_mode) { |
5737 | case E1000E_INT_MODE_MSIX: | |
5738 | e1000_intr_msix(adapter->pdev->irq, netdev); | |
5739 | break; | |
5740 | case E1000E_INT_MODE_MSI: | |
5741 | disable_irq(adapter->pdev->irq); | |
5742 | e1000_intr_msi(adapter->pdev->irq, netdev); | |
5743 | enable_irq(adapter->pdev->irq); | |
5744 | break; | |
5745 | default: /* E1000E_INT_MODE_LEGACY */ | |
5746 | disable_irq(adapter->pdev->irq); | |
5747 | e1000_intr(adapter->pdev->irq, netdev); | |
5748 | enable_irq(adapter->pdev->irq); | |
5749 | break; | |
5750 | } | |
bc7f75fa AK |
5751 | } |
5752 | #endif | |
5753 | ||
5754 | /** | |
5755 | * e1000_io_error_detected - called when PCI error is detected | |
5756 | * @pdev: Pointer to PCI device | |
5757 | * @state: The current pci connection state | |
5758 | * | |
5759 | * This function is called after a PCI bus error affecting | |
5760 | * this device has been detected. | |
5761 | */ | |
5762 | static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, | |
5763 | pci_channel_state_t state) | |
5764 | { | |
5765 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5766 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5767 | ||
5768 | netif_device_detach(netdev); | |
5769 | ||
c93b5a76 MM |
5770 | if (state == pci_channel_io_perm_failure) |
5771 | return PCI_ERS_RESULT_DISCONNECT; | |
5772 | ||
bc7f75fa AK |
5773 | if (netif_running(netdev)) |
5774 | e1000e_down(adapter); | |
5775 | pci_disable_device(pdev); | |
5776 | ||
5777 | /* Request a slot slot reset. */ | |
5778 | return PCI_ERS_RESULT_NEED_RESET; | |
5779 | } | |
5780 | ||
5781 | /** | |
5782 | * e1000_io_slot_reset - called after the pci bus has been reset. | |
5783 | * @pdev: Pointer to PCI device | |
5784 | * | |
5785 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
5786 | * resembles the first-half of the e1000_resume routine. | |
5787 | */ | |
5788 | static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) | |
5789 | { | |
5790 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5791 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5792 | struct e1000_hw *hw = &adapter->hw; | |
78cd29d5 | 5793 | u16 aspm_disable_flag = 0; |
6e4f6f6b | 5794 | int err; |
111b9dc5 | 5795 | pci_ers_result_t result; |
bc7f75fa | 5796 | |
78cd29d5 BA |
5797 | if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S) |
5798 | aspm_disable_flag = PCIE_LINK_STATE_L0S; | |
6f461f6c | 5799 | if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1) |
78cd29d5 BA |
5800 | aspm_disable_flag |= PCIE_LINK_STATE_L1; |
5801 | if (aspm_disable_flag) | |
5802 | e1000e_disable_aspm(pdev, aspm_disable_flag); | |
5803 | ||
f0f422e5 | 5804 | err = pci_enable_device_mem(pdev); |
6e4f6f6b | 5805 | if (err) { |
bc7f75fa AK |
5806 | dev_err(&pdev->dev, |
5807 | "Cannot re-enable PCI device after reset.\n"); | |
111b9dc5 JB |
5808 | result = PCI_ERS_RESULT_DISCONNECT; |
5809 | } else { | |
5810 | pci_set_master(pdev); | |
23606cf5 | 5811 | pdev->state_saved = true; |
111b9dc5 | 5812 | pci_restore_state(pdev); |
bc7f75fa | 5813 | |
111b9dc5 JB |
5814 | pci_enable_wake(pdev, PCI_D3hot, 0); |
5815 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
bc7f75fa | 5816 | |
111b9dc5 JB |
5817 | e1000e_reset(adapter); |
5818 | ew32(WUS, ~0); | |
5819 | result = PCI_ERS_RESULT_RECOVERED; | |
5820 | } | |
bc7f75fa | 5821 | |
111b9dc5 JB |
5822 | pci_cleanup_aer_uncorrect_error_status(pdev); |
5823 | ||
5824 | return result; | |
bc7f75fa AK |
5825 | } |
5826 | ||
5827 | /** | |
5828 | * e1000_io_resume - called when traffic can start flowing again. | |
5829 | * @pdev: Pointer to PCI device | |
5830 | * | |
5831 | * This callback is called when the error recovery driver tells us that | |
5832 | * its OK to resume normal operation. Implementation resembles the | |
5833 | * second-half of the e1000_resume routine. | |
5834 | */ | |
5835 | static void e1000_io_resume(struct pci_dev *pdev) | |
5836 | { | |
5837 | struct net_device *netdev = pci_get_drvdata(pdev); | |
5838 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
5839 | ||
cd791618 | 5840 | e1000_init_manageability_pt(adapter); |
bc7f75fa AK |
5841 | |
5842 | if (netif_running(netdev)) { | |
5843 | if (e1000e_up(adapter)) { | |
5844 | dev_err(&pdev->dev, | |
5845 | "can't bring device back up after reset\n"); | |
5846 | return; | |
5847 | } | |
5848 | } | |
5849 | ||
5850 | netif_device_attach(netdev); | |
5851 | ||
ad68076e BA |
5852 | /* |
5853 | * If the controller has AMT, do not set DRV_LOAD until the interface | |
bc7f75fa | 5854 | * is up. For all other cases, let the f/w know that the h/w is now |
ad68076e BA |
5855 | * under the control of the driver. |
5856 | */ | |
c43bc57e | 5857 | if (!(adapter->flags & FLAG_HAS_AMT)) |
31dbe5b4 | 5858 | e1000e_get_hw_control(adapter); |
bc7f75fa AK |
5859 | |
5860 | } | |
5861 | ||
5862 | static void e1000_print_device_info(struct e1000_adapter *adapter) | |
5863 | { | |
5864 | struct e1000_hw *hw = &adapter->hw; | |
5865 | struct net_device *netdev = adapter->netdev; | |
073287c0 BA |
5866 | u32 ret_val; |
5867 | u8 pba_str[E1000_PBANUM_LENGTH]; | |
bc7f75fa AK |
5868 | |
5869 | /* print bus type/speed/width info */ | |
a5cc7642 | 5870 | e_info("(PCI Express:2.5GT/s:%s) %pM\n", |
44defeb3 JK |
5871 | /* bus width */ |
5872 | ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" : | |
5873 | "Width x1"), | |
5874 | /* MAC address */ | |
7c510e4b | 5875 | netdev->dev_addr); |
44defeb3 JK |
5876 | e_info("Intel(R) PRO/%s Network Connection\n", |
5877 | (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000"); | |
073287c0 BA |
5878 | ret_val = e1000_read_pba_string_generic(hw, pba_str, |
5879 | E1000_PBANUM_LENGTH); | |
5880 | if (ret_val) | |
e0dc4f12 | 5881 | strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1); |
073287c0 BA |
5882 | e_info("MAC: %d, PHY: %d, PBA No: %s\n", |
5883 | hw->mac.type, hw->phy.type, pba_str); | |
bc7f75fa AK |
5884 | } |
5885 | ||
10aa4c04 AK |
5886 | static void e1000_eeprom_checks(struct e1000_adapter *adapter) |
5887 | { | |
5888 | struct e1000_hw *hw = &adapter->hw; | |
5889 | int ret_val; | |
5890 | u16 buf = 0; | |
5891 | ||
5892 | if (hw->mac.type != e1000_82573) | |
5893 | return; | |
5894 | ||
5895 | ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf); | |
e243455d | 5896 | if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) { |
10aa4c04 | 5897 | /* Deep Smart Power Down (DSPD) */ |
6c2a9efa FP |
5898 | dev_warn(&adapter->pdev->dev, |
5899 | "Warning: detected DSPD enabled in EEPROM\n"); | |
10aa4c04 | 5900 | } |
10aa4c04 AK |
5901 | } |
5902 | ||
c8f44aff MM |
5903 | static int e1000_set_features(struct net_device *netdev, |
5904 | netdev_features_t features) | |
dc221294 BA |
5905 | { |
5906 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
c8f44aff | 5907 | netdev_features_t changed = features ^ netdev->features; |
dc221294 BA |
5908 | |
5909 | if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) | |
5910 | adapter->flags |= FLAG_TSO_FORCE; | |
5911 | ||
5912 | if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX | | |
5913 | NETIF_F_RXCSUM))) | |
5914 | return 0; | |
5915 | ||
5916 | if (netif_running(netdev)) | |
5917 | e1000e_reinit_locked(adapter); | |
5918 | else | |
5919 | e1000e_reset(adapter); | |
5920 | ||
5921 | return 0; | |
5922 | } | |
5923 | ||
651c2466 SH |
5924 | static const struct net_device_ops e1000e_netdev_ops = { |
5925 | .ndo_open = e1000_open, | |
5926 | .ndo_stop = e1000_close, | |
00829823 | 5927 | .ndo_start_xmit = e1000_xmit_frame, |
67fd4fcb | 5928 | .ndo_get_stats64 = e1000e_get_stats64, |
ef9b965a | 5929 | .ndo_set_rx_mode = e1000e_set_rx_mode, |
651c2466 SH |
5930 | .ndo_set_mac_address = e1000_set_mac, |
5931 | .ndo_change_mtu = e1000_change_mtu, | |
5932 | .ndo_do_ioctl = e1000_ioctl, | |
5933 | .ndo_tx_timeout = e1000_tx_timeout, | |
5934 | .ndo_validate_addr = eth_validate_addr, | |
5935 | ||
651c2466 SH |
5936 | .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid, |
5937 | .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid, | |
5938 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
5939 | .ndo_poll_controller = e1000_netpoll, | |
5940 | #endif | |
dc221294 | 5941 | .ndo_set_features = e1000_set_features, |
651c2466 SH |
5942 | }; |
5943 | ||
bc7f75fa AK |
5944 | /** |
5945 | * e1000_probe - Device Initialization Routine | |
5946 | * @pdev: PCI device information struct | |
5947 | * @ent: entry in e1000_pci_tbl | |
5948 | * | |
5949 | * Returns 0 on success, negative on failure | |
5950 | * | |
5951 | * e1000_probe initializes an adapter identified by a pci_dev structure. | |
5952 | * The OS initialization, configuring of the adapter private structure, | |
5953 | * and a hardware reset occur. | |
5954 | **/ | |
5955 | static int __devinit e1000_probe(struct pci_dev *pdev, | |
5956 | const struct pci_device_id *ent) | |
5957 | { | |
5958 | struct net_device *netdev; | |
5959 | struct e1000_adapter *adapter; | |
5960 | struct e1000_hw *hw; | |
5961 | const struct e1000_info *ei = e1000_info_tbl[ent->driver_data]; | |
f47e81fc BB |
5962 | resource_size_t mmio_start, mmio_len; |
5963 | resource_size_t flash_start, flash_len; | |
bc7f75fa AK |
5964 | |
5965 | static int cards_found; | |
78cd29d5 | 5966 | u16 aspm_disable_flag = 0; |
bc7f75fa AK |
5967 | int i, err, pci_using_dac; |
5968 | u16 eeprom_data = 0; | |
5969 | u16 eeprom_apme_mask = E1000_EEPROM_APME; | |
5970 | ||
78cd29d5 BA |
5971 | if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S) |
5972 | aspm_disable_flag = PCIE_LINK_STATE_L0S; | |
6f461f6c | 5973 | if (ei->flags2 & FLAG2_DISABLE_ASPM_L1) |
78cd29d5 BA |
5974 | aspm_disable_flag |= PCIE_LINK_STATE_L1; |
5975 | if (aspm_disable_flag) | |
5976 | e1000e_disable_aspm(pdev, aspm_disable_flag); | |
6e4f6f6b | 5977 | |
f0f422e5 | 5978 | err = pci_enable_device_mem(pdev); |
bc7f75fa AK |
5979 | if (err) |
5980 | return err; | |
5981 | ||
5982 | pci_using_dac = 0; | |
0be3f55f | 5983 | err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); |
bc7f75fa | 5984 | if (!err) { |
0be3f55f | 5985 | err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); |
bc7f75fa AK |
5986 | if (!err) |
5987 | pci_using_dac = 1; | |
5988 | } else { | |
0be3f55f | 5989 | err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); |
bc7f75fa | 5990 | if (err) { |
0be3f55f NN |
5991 | err = dma_set_coherent_mask(&pdev->dev, |
5992 | DMA_BIT_MASK(32)); | |
bc7f75fa | 5993 | if (err) { |
ef456f85 | 5994 | dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); |
bc7f75fa AK |
5995 | goto err_dma; |
5996 | } | |
5997 | } | |
5998 | } | |
5999 | ||
e8de1481 | 6000 | err = pci_request_selected_regions_exclusive(pdev, |
f0f422e5 BA |
6001 | pci_select_bars(pdev, IORESOURCE_MEM), |
6002 | e1000e_driver_name); | |
bc7f75fa AK |
6003 | if (err) |
6004 | goto err_pci_reg; | |
6005 | ||
68eac460 | 6006 | /* AER (Advanced Error Reporting) hooks */ |
19d5afd4 | 6007 | pci_enable_pcie_error_reporting(pdev); |
68eac460 | 6008 | |
bc7f75fa | 6009 | pci_set_master(pdev); |
438b365a BA |
6010 | /* PCI config space info */ |
6011 | err = pci_save_state(pdev); | |
6012 | if (err) | |
6013 | goto err_alloc_etherdev; | |
bc7f75fa AK |
6014 | |
6015 | err = -ENOMEM; | |
6016 | netdev = alloc_etherdev(sizeof(struct e1000_adapter)); | |
6017 | if (!netdev) | |
6018 | goto err_alloc_etherdev; | |
6019 | ||
bc7f75fa AK |
6020 | SET_NETDEV_DEV(netdev, &pdev->dev); |
6021 | ||
f85e4dfa TH |
6022 | netdev->irq = pdev->irq; |
6023 | ||
bc7f75fa AK |
6024 | pci_set_drvdata(pdev, netdev); |
6025 | adapter = netdev_priv(netdev); | |
6026 | hw = &adapter->hw; | |
6027 | adapter->netdev = netdev; | |
6028 | adapter->pdev = pdev; | |
6029 | adapter->ei = ei; | |
6030 | adapter->pba = ei->pba; | |
6031 | adapter->flags = ei->flags; | |
eb7c3adb | 6032 | adapter->flags2 = ei->flags2; |
bc7f75fa AK |
6033 | adapter->hw.adapter = adapter; |
6034 | adapter->hw.mac.type = ei->mac; | |
2adc55c9 | 6035 | adapter->max_hw_frame_size = ei->max_hw_frame_size; |
bc7f75fa AK |
6036 | adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1; |
6037 | ||
6038 | mmio_start = pci_resource_start(pdev, 0); | |
6039 | mmio_len = pci_resource_len(pdev, 0); | |
6040 | ||
6041 | err = -EIO; | |
6042 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
6043 | if (!adapter->hw.hw_addr) | |
6044 | goto err_ioremap; | |
6045 | ||
6046 | if ((adapter->flags & FLAG_HAS_FLASH) && | |
6047 | (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { | |
6048 | flash_start = pci_resource_start(pdev, 1); | |
6049 | flash_len = pci_resource_len(pdev, 1); | |
6050 | adapter->hw.flash_address = ioremap(flash_start, flash_len); | |
6051 | if (!adapter->hw.flash_address) | |
6052 | goto err_flashmap; | |
6053 | } | |
6054 | ||
6055 | /* construct the net_device struct */ | |
651c2466 | 6056 | netdev->netdev_ops = &e1000e_netdev_ops; |
bc7f75fa | 6057 | e1000e_set_ethtool_ops(netdev); |
bc7f75fa AK |
6058 | netdev->watchdog_timeo = 5 * HZ; |
6059 | netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); | |
bc7f75fa AK |
6060 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
6061 | ||
6062 | netdev->mem_start = mmio_start; | |
6063 | netdev->mem_end = mmio_start + mmio_len; | |
6064 | ||
6065 | adapter->bd_number = cards_found++; | |
6066 | ||
4662e82b BA |
6067 | e1000e_check_options(adapter); |
6068 | ||
bc7f75fa AK |
6069 | /* setup adapter struct */ |
6070 | err = e1000_sw_init(adapter); | |
6071 | if (err) | |
6072 | goto err_sw_init; | |
6073 | ||
bc7f75fa AK |
6074 | memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); |
6075 | memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); | |
6076 | memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); | |
6077 | ||
69e3fd8c | 6078 | err = ei->get_variants(adapter); |
bc7f75fa AK |
6079 | if (err) |
6080 | goto err_hw_init; | |
6081 | ||
4a770358 BA |
6082 | if ((adapter->flags & FLAG_IS_ICH) && |
6083 | (adapter->flags & FLAG_READ_ONLY_NVM)) | |
6084 | e1000e_write_protect_nvm_ich8lan(&adapter->hw); | |
6085 | ||
bc7f75fa AK |
6086 | hw->mac.ops.get_bus_info(&adapter->hw); |
6087 | ||
318a94d6 | 6088 | adapter->hw.phy.autoneg_wait_to_complete = 0; |
bc7f75fa AK |
6089 | |
6090 | /* Copper options */ | |
318a94d6 | 6091 | if (adapter->hw.phy.media_type == e1000_media_type_copper) { |
bc7f75fa AK |
6092 | adapter->hw.phy.mdix = AUTO_ALL_MODES; |
6093 | adapter->hw.phy.disable_polarity_correction = 0; | |
6094 | adapter->hw.phy.ms_type = e1000_ms_hw_default; | |
6095 | } | |
6096 | ||
6097 | if (e1000_check_reset_block(&adapter->hw)) | |
44defeb3 | 6098 | e_info("PHY reset is blocked due to SOL/IDER session.\n"); |
bc7f75fa | 6099 | |
dc221294 BA |
6100 | /* Set initial default active device features */ |
6101 | netdev->features = (NETIF_F_SG | | |
6102 | NETIF_F_HW_VLAN_RX | | |
6103 | NETIF_F_HW_VLAN_TX | | |
6104 | NETIF_F_TSO | | |
6105 | NETIF_F_TSO6 | | |
6106 | NETIF_F_RXCSUM | | |
6107 | NETIF_F_HW_CSUM); | |
6108 | ||
6109 | /* Set user-changeable features (subset of all device features) */ | |
6110 | netdev->hw_features = netdev->features; | |
bc7f75fa AK |
6111 | |
6112 | if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) | |
6113 | netdev->features |= NETIF_F_HW_VLAN_FILTER; | |
6114 | ||
dc221294 BA |
6115 | netdev->vlan_features |= (NETIF_F_SG | |
6116 | NETIF_F_TSO | | |
6117 | NETIF_F_TSO6 | | |
6118 | NETIF_F_HW_CSUM); | |
a5136e23 | 6119 | |
ef9b965a JB |
6120 | netdev->priv_flags |= IFF_UNICAST_FLT; |
6121 | ||
7b872a55 | 6122 | if (pci_using_dac) { |
bc7f75fa | 6123 | netdev->features |= NETIF_F_HIGHDMA; |
7b872a55 YZ |
6124 | netdev->vlan_features |= NETIF_F_HIGHDMA; |
6125 | } | |
bc7f75fa | 6126 | |
bc7f75fa AK |
6127 | if (e1000e_enable_mng_pass_thru(&adapter->hw)) |
6128 | adapter->flags |= FLAG_MNG_PT_ENABLED; | |
6129 | ||
ad68076e BA |
6130 | /* |
6131 | * before reading the NVM, reset the controller to | |
6132 | * put the device in a known good starting state | |
6133 | */ | |
bc7f75fa AK |
6134 | adapter->hw.mac.ops.reset_hw(&adapter->hw); |
6135 | ||
6136 | /* | |
6137 | * systems with ASPM and others may see the checksum fail on the first | |
6138 | * attempt. Let's give it a few tries | |
6139 | */ | |
6140 | for (i = 0;; i++) { | |
6141 | if (e1000_validate_nvm_checksum(&adapter->hw) >= 0) | |
6142 | break; | |
6143 | if (i == 2) { | |
44defeb3 | 6144 | e_err("The NVM Checksum Is Not Valid\n"); |
bc7f75fa AK |
6145 | err = -EIO; |
6146 | goto err_eeprom; | |
6147 | } | |
6148 | } | |
6149 | ||
10aa4c04 AK |
6150 | e1000_eeprom_checks(adapter); |
6151 | ||
608f8a0d | 6152 | /* copy the MAC address */ |
bc7f75fa | 6153 | if (e1000e_read_mac_addr(&adapter->hw)) |
44defeb3 | 6154 | e_err("NVM Read Error while reading MAC address\n"); |
bc7f75fa AK |
6155 | |
6156 | memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); | |
6157 | memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len); | |
6158 | ||
6159 | if (!is_valid_ether_addr(netdev->perm_addr)) { | |
7c510e4b | 6160 | e_err("Invalid MAC Address: %pM\n", netdev->perm_addr); |
bc7f75fa AK |
6161 | err = -EIO; |
6162 | goto err_eeprom; | |
6163 | } | |
6164 | ||
6165 | init_timer(&adapter->watchdog_timer); | |
c061b18d | 6166 | adapter->watchdog_timer.function = e1000_watchdog; |
bc7f75fa AK |
6167 | adapter->watchdog_timer.data = (unsigned long) adapter; |
6168 | ||
6169 | init_timer(&adapter->phy_info_timer); | |
c061b18d | 6170 | adapter->phy_info_timer.function = e1000_update_phy_info; |
bc7f75fa AK |
6171 | adapter->phy_info_timer.data = (unsigned long) adapter; |
6172 | ||
6173 | INIT_WORK(&adapter->reset_task, e1000_reset_task); | |
6174 | INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task); | |
a8f88ff5 JB |
6175 | INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround); |
6176 | INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task); | |
41cec6f1 | 6177 | INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang); |
bc7f75fa | 6178 | |
bc7f75fa AK |
6179 | /* Initialize link parameters. User can change them with ethtool */ |
6180 | adapter->hw.mac.autoneg = 1; | |
309af40b | 6181 | adapter->fc_autoneg = 1; |
5c48ef3e BA |
6182 | adapter->hw.fc.requested_mode = e1000_fc_default; |
6183 | adapter->hw.fc.current_mode = e1000_fc_default; | |
bc7f75fa AK |
6184 | adapter->hw.phy.autoneg_advertised = 0x2f; |
6185 | ||
6186 | /* ring size defaults */ | |
6187 | adapter->rx_ring->count = 256; | |
6188 | adapter->tx_ring->count = 256; | |
6189 | ||
6190 | /* | |
6191 | * Initial Wake on LAN setting - If APM wake is enabled in | |
6192 | * the EEPROM, enable the ACPI Magic Packet filter | |
6193 | */ | |
6194 | if (adapter->flags & FLAG_APME_IN_WUC) { | |
6195 | /* APME bit in EEPROM is mapped to WUC.APME */ | |
6196 | eeprom_data = er32(WUC); | |
6197 | eeprom_apme_mask = E1000_WUC_APME; | |
4def99bb BA |
6198 | if ((hw->mac.type > e1000_ich10lan) && |
6199 | (eeprom_data & E1000_WUC_PHY_WAKE)) | |
a4f58f54 | 6200 | adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP; |
bc7f75fa AK |
6201 | } else if (adapter->flags & FLAG_APME_IN_CTRL3) { |
6202 | if (adapter->flags & FLAG_APME_CHECK_PORT_B && | |
6203 | (adapter->hw.bus.func == 1)) | |
6204 | e1000_read_nvm(&adapter->hw, | |
6205 | NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); | |
6206 | else | |
6207 | e1000_read_nvm(&adapter->hw, | |
6208 | NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); | |
6209 | } | |
6210 | ||
6211 | /* fetch WoL from EEPROM */ | |
6212 | if (eeprom_data & eeprom_apme_mask) | |
6213 | adapter->eeprom_wol |= E1000_WUFC_MAG; | |
6214 | ||
6215 | /* | |
6216 | * now that we have the eeprom settings, apply the special cases | |
6217 | * where the eeprom may be wrong or the board simply won't support | |
6218 | * wake on lan on a particular port | |
6219 | */ | |
6220 | if (!(adapter->flags & FLAG_HAS_WOL)) | |
6221 | adapter->eeprom_wol = 0; | |
6222 | ||
6223 | /* initialize the wol settings based on the eeprom settings */ | |
6224 | adapter->wol = adapter->eeprom_wol; | |
6ff68026 | 6225 | device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); |
bc7f75fa | 6226 | |
84527590 BA |
6227 | /* save off EEPROM version number */ |
6228 | e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); | |
6229 | ||
bc7f75fa AK |
6230 | /* reset the hardware with the new settings */ |
6231 | e1000e_reset(adapter); | |
6232 | ||
ad68076e BA |
6233 | /* |
6234 | * If the controller has AMT, do not set DRV_LOAD until the interface | |
bc7f75fa | 6235 | * is up. For all other cases, let the f/w know that the h/w is now |
ad68076e BA |
6236 | * under the control of the driver. |
6237 | */ | |
c43bc57e | 6238 | if (!(adapter->flags & FLAG_HAS_AMT)) |
31dbe5b4 | 6239 | e1000e_get_hw_control(adapter); |
bc7f75fa | 6240 | |
e0dc4f12 | 6241 | strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1); |
bc7f75fa AK |
6242 | err = register_netdev(netdev); |
6243 | if (err) | |
6244 | goto err_register; | |
6245 | ||
9c563d20 JB |
6246 | /* carrier off reporting is important to ethtool even BEFORE open */ |
6247 | netif_carrier_off(netdev); | |
6248 | ||
bc7f75fa AK |
6249 | e1000_print_device_info(adapter); |
6250 | ||
f3ec4f87 AS |
6251 | if (pci_dev_run_wake(pdev)) |
6252 | pm_runtime_put_noidle(&pdev->dev); | |
23606cf5 | 6253 | |
bc7f75fa AK |
6254 | return 0; |
6255 | ||
6256 | err_register: | |
c43bc57e | 6257 | if (!(adapter->flags & FLAG_HAS_AMT)) |
31dbe5b4 | 6258 | e1000e_release_hw_control(adapter); |
bc7f75fa AK |
6259 | err_eeprom: |
6260 | if (!e1000_check_reset_block(&adapter->hw)) | |
6261 | e1000_phy_hw_reset(&adapter->hw); | |
c43bc57e | 6262 | err_hw_init: |
bc7f75fa AK |
6263 | kfree(adapter->tx_ring); |
6264 | kfree(adapter->rx_ring); | |
6265 | err_sw_init: | |
c43bc57e JB |
6266 | if (adapter->hw.flash_address) |
6267 | iounmap(adapter->hw.flash_address); | |
e82f54ba | 6268 | e1000e_reset_interrupt_capability(adapter); |
c43bc57e | 6269 | err_flashmap: |
bc7f75fa AK |
6270 | iounmap(adapter->hw.hw_addr); |
6271 | err_ioremap: | |
6272 | free_netdev(netdev); | |
6273 | err_alloc_etherdev: | |
f0f422e5 BA |
6274 | pci_release_selected_regions(pdev, |
6275 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
bc7f75fa AK |
6276 | err_pci_reg: |
6277 | err_dma: | |
6278 | pci_disable_device(pdev); | |
6279 | return err; | |
6280 | } | |
6281 | ||
6282 | /** | |
6283 | * e1000_remove - Device Removal Routine | |
6284 | * @pdev: PCI device information struct | |
6285 | * | |
6286 | * e1000_remove is called by the PCI subsystem to alert the driver | |
6287 | * that it should release a PCI device. The could be caused by a | |
6288 | * Hot-Plug event, or because the driver is going to be removed from | |
6289 | * memory. | |
6290 | **/ | |
6291 | static void __devexit e1000_remove(struct pci_dev *pdev) | |
6292 | { | |
6293 | struct net_device *netdev = pci_get_drvdata(pdev); | |
6294 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
23606cf5 RW |
6295 | bool down = test_bit(__E1000_DOWN, &adapter->state); |
6296 | ||
ad68076e | 6297 | /* |
23f333a2 TH |
6298 | * The timers may be rescheduled, so explicitly disable them |
6299 | * from being rescheduled. | |
ad68076e | 6300 | */ |
23606cf5 RW |
6301 | if (!down) |
6302 | set_bit(__E1000_DOWN, &adapter->state); | |
bc7f75fa AK |
6303 | del_timer_sync(&adapter->watchdog_timer); |
6304 | del_timer_sync(&adapter->phy_info_timer); | |
6305 | ||
41cec6f1 BA |
6306 | cancel_work_sync(&adapter->reset_task); |
6307 | cancel_work_sync(&adapter->watchdog_task); | |
6308 | cancel_work_sync(&adapter->downshift_task); | |
6309 | cancel_work_sync(&adapter->update_phy_task); | |
6310 | cancel_work_sync(&adapter->print_hang_task); | |
bc7f75fa | 6311 | |
17f208de BA |
6312 | if (!(netdev->flags & IFF_UP)) |
6313 | e1000_power_down_phy(adapter); | |
6314 | ||
23606cf5 RW |
6315 | /* Don't lie to e1000_close() down the road. */ |
6316 | if (!down) | |
6317 | clear_bit(__E1000_DOWN, &adapter->state); | |
17f208de BA |
6318 | unregister_netdev(netdev); |
6319 | ||
f3ec4f87 AS |
6320 | if (pci_dev_run_wake(pdev)) |
6321 | pm_runtime_get_noresume(&pdev->dev); | |
23606cf5 | 6322 | |
ad68076e BA |
6323 | /* |
6324 | * Release control of h/w to f/w. If f/w is AMT enabled, this | |
6325 | * would have already happened in close and is redundant. | |
6326 | */ | |
31dbe5b4 | 6327 | e1000e_release_hw_control(adapter); |
bc7f75fa | 6328 | |
4662e82b | 6329 | e1000e_reset_interrupt_capability(adapter); |
bc7f75fa AK |
6330 | kfree(adapter->tx_ring); |
6331 | kfree(adapter->rx_ring); | |
6332 | ||
6333 | iounmap(adapter->hw.hw_addr); | |
6334 | if (adapter->hw.flash_address) | |
6335 | iounmap(adapter->hw.flash_address); | |
f0f422e5 BA |
6336 | pci_release_selected_regions(pdev, |
6337 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
bc7f75fa AK |
6338 | |
6339 | free_netdev(netdev); | |
6340 | ||
111b9dc5 | 6341 | /* AER disable */ |
19d5afd4 | 6342 | pci_disable_pcie_error_reporting(pdev); |
111b9dc5 | 6343 | |
bc7f75fa AK |
6344 | pci_disable_device(pdev); |
6345 | } | |
6346 | ||
6347 | /* PCI Error Recovery (ERS) */ | |
6348 | static struct pci_error_handlers e1000_err_handler = { | |
6349 | .error_detected = e1000_io_error_detected, | |
6350 | .slot_reset = e1000_io_slot_reset, | |
6351 | .resume = e1000_io_resume, | |
6352 | }; | |
6353 | ||
a3aa1884 | 6354 | static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = { |
bc7f75fa AK |
6355 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 }, |
6356 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 }, | |
6357 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 }, | |
6358 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 }, | |
6359 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 }, | |
6360 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 }, | |
040babf9 AK |
6361 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 }, |
6362 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 }, | |
6363 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 }, | |
ad68076e | 6364 | |
bc7f75fa AK |
6365 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 }, |
6366 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 }, | |
6367 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 }, | |
6368 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 }, | |
ad68076e | 6369 | |
bc7f75fa AK |
6370 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 }, |
6371 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 }, | |
6372 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 }, | |
ad68076e | 6373 | |
4662e82b | 6374 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 }, |
bef28b11 | 6375 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 }, |
8c81c9c3 | 6376 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 }, |
4662e82b | 6377 | |
bc7f75fa AK |
6378 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT), |
6379 | board_80003es2lan }, | |
6380 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT), | |
6381 | board_80003es2lan }, | |
6382 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT), | |
6383 | board_80003es2lan }, | |
6384 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT), | |
6385 | board_80003es2lan }, | |
ad68076e | 6386 | |
bc7f75fa AK |
6387 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan }, |
6388 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan }, | |
6389 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan }, | |
6390 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan }, | |
6391 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan }, | |
6392 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan }, | |
6393 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan }, | |
9e135a2e | 6394 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan }, |
ad68076e | 6395 | |
bc7f75fa AK |
6396 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan }, |
6397 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan }, | |
6398 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, | |
6399 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, | |
6400 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, | |
2f15f9d6 | 6401 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan }, |
97ac8cae BA |
6402 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, |
6403 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, | |
6404 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, | |
6405 | ||
6406 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, | |
6407 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, | |
6408 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, | |
bc7f75fa | 6409 | |
f4187b56 BA |
6410 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan }, |
6411 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan }, | |
10df0b91 | 6412 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan }, |
f4187b56 | 6413 | |
a4f58f54 BA |
6414 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan }, |
6415 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan }, | |
6416 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan }, | |
6417 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan }, | |
6418 | ||
d3738bb8 BA |
6419 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan }, |
6420 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan }, | |
6421 | ||
bc7f75fa AK |
6422 | { } /* terminate list */ |
6423 | }; | |
6424 | MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); | |
6425 | ||
aa338601 | 6426 | #ifdef CONFIG_PM |
23606cf5 | 6427 | static const struct dev_pm_ops e1000_pm_ops = { |
a0340162 RW |
6428 | SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume) |
6429 | SET_RUNTIME_PM_OPS(e1000_runtime_suspend, | |
6430 | e1000_runtime_resume, e1000_idle) | |
23606cf5 | 6431 | }; |
e50208a0 | 6432 | #endif |
23606cf5 | 6433 | |
bc7f75fa AK |
6434 | /* PCI Device API Driver */ |
6435 | static struct pci_driver e1000_driver = { | |
6436 | .name = e1000e_driver_name, | |
6437 | .id_table = e1000_pci_tbl, | |
6438 | .probe = e1000_probe, | |
6439 | .remove = __devexit_p(e1000_remove), | |
aa338601 | 6440 | #ifdef CONFIG_PM |
23606cf5 | 6441 | .driver.pm = &e1000_pm_ops, |
bc7f75fa AK |
6442 | #endif |
6443 | .shutdown = e1000_shutdown, | |
6444 | .err_handler = &e1000_err_handler | |
6445 | }; | |
6446 | ||
6447 | /** | |
6448 | * e1000_init_module - Driver Registration Routine | |
6449 | * | |
6450 | * e1000_init_module is the first routine called when the driver is | |
6451 | * loaded. All it does is register with the PCI subsystem. | |
6452 | **/ | |
6453 | static int __init e1000_init_module(void) | |
6454 | { | |
6455 | int ret; | |
8544b9f7 BA |
6456 | pr_info("Intel(R) PRO/1000 Network Driver - %s\n", |
6457 | e1000e_driver_version); | |
0d6057e4 | 6458 | pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n"); |
bc7f75fa | 6459 | ret = pci_register_driver(&e1000_driver); |
53ec5498 | 6460 | |
bc7f75fa AK |
6461 | return ret; |
6462 | } | |
6463 | module_init(e1000_init_module); | |
6464 | ||
6465 | /** | |
6466 | * e1000_exit_module - Driver Exit Cleanup Routine | |
6467 | * | |
6468 | * e1000_exit_module is called just before the driver is removed | |
6469 | * from memory. | |
6470 | **/ | |
6471 | static void __exit e1000_exit_module(void) | |
6472 | { | |
6473 | pci_unregister_driver(&e1000_driver); | |
6474 | } | |
6475 | module_exit(e1000_exit_module); | |
6476 | ||
6477 | ||
6478 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
6479 | MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); | |
6480 | MODULE_LICENSE("GPL"); | |
6481 | MODULE_VERSION(DRV_VERSION); | |
6482 | ||
6483 | /* e1000_main.c */ |