Merge tag 'v4.7-rc1' into patchwork
[deliverable/linux.git] / drivers / net / ethernet / intel / fm10k / fm10k_vf.c
CommitLineData
86641094 1/* Intel(R) Ethernet Switch Host Interface Driver
9de6a1a6 2 * Copyright(c) 2013 - 2016 Intel Corporation.
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3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21#include "fm10k_vf.h"
22
23/**
24 * fm10k_stop_hw_vf - Stop Tx/Rx units
25 * @hw: pointer to hardware structure
26 *
27 **/
28static s32 fm10k_stop_hw_vf(struct fm10k_hw *hw)
29{
30 u8 *perm_addr = hw->mac.perm_addr;
20076fa1 31 u32 bal = 0, bah = 0, tdlen;
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32 s32 err;
33 u16 i;
34
35 /* we need to disable the queues before taking further steps */
36 err = fm10k_stop_hw_generic(hw);
37 if (err)
38 return err;
39
eca32047 40 /* If permanent address is set then we need to restore it */
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41 if (is_valid_ether_addr(perm_addr)) {
42 bal = (((u32)perm_addr[3]) << 24) |
43 (((u32)perm_addr[4]) << 16) |
44 (((u32)perm_addr[5]) << 8);
45 bah = (((u32)0xFF) << 24) |
46 (((u32)perm_addr[0]) << 16) |
47 (((u32)perm_addr[1]) << 8) |
48 ((u32)perm_addr[2]);
49 }
50
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51 /* restore default itr_scale for next VF initialization */
52 tdlen = hw->mac.itr_scale << FM10K_TDLEN_ITR_SCALE_SHIFT;
53
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54 /* The queues have already been disabled so we just need to
55 * update their base address registers
56 */
57 for (i = 0; i < hw->mac.max_queues; i++) {
58 fm10k_write_reg(hw, FM10K_TDBAL(i), bal);
59 fm10k_write_reg(hw, FM10K_TDBAH(i), bah);
60 fm10k_write_reg(hw, FM10K_RDBAL(i), bal);
61 fm10k_write_reg(hw, FM10K_RDBAH(i), bah);
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62 /* Restore ITR scale in software-defined mechanism in TDLEN
63 * for next VF initialization. See definition of
64 * FM10K_TDLEN_ITR_SCALE_SHIFT for more details on the use of
65 * TDLEN here.
66 */
67 fm10k_write_reg(hw, FM10K_TDLEN(i), tdlen);
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68 }
69
70 return 0;
71}
72
73/**
74 * fm10k_reset_hw_vf - VF hardware reset
75 * @hw: pointer to hardware structure
76 *
eca32047 77 * This function should return the hardware to a state similar to the
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78 * one it is in after just being initialized.
79 **/
80static s32 fm10k_reset_hw_vf(struct fm10k_hw *hw)
81{
82 s32 err;
83
84 /* shut down queues we own and reset DMA configuration */
85 err = fm10k_stop_hw_vf(hw);
86 if (err)
87 return err;
88
89 /* Inititate VF reset */
90 fm10k_write_reg(hw, FM10K_VFCTRL, FM10K_VFCTRL_RST);
91
92 /* Flush write and allow 100us for reset to complete */
93 fm10k_write_flush(hw);
94 udelay(FM10K_RESET_TIMEOUT);
95
96 /* Clear reset bit and verify it was cleared */
97 fm10k_write_reg(hw, FM10K_VFCTRL, 0);
98 if (fm10k_read_reg(hw, FM10K_VFCTRL) & FM10K_VFCTRL_RST)
99 err = FM10K_ERR_RESET_FAILED;
100
101 return err;
102}
103
104/**
105 * fm10k_init_hw_vf - VF hardware initialization
106 * @hw: pointer to hardware structure
107 *
108 **/
109static s32 fm10k_init_hw_vf(struct fm10k_hw *hw)
110{
111 u32 tqdloc, tqdloc0 = ~fm10k_read_reg(hw, FM10K_TQDLOC(0));
112 s32 err;
113 u16 i;
114
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115 /* verify we have at least 1 queue */
116 if (!~fm10k_read_reg(hw, FM10K_TXQCTL(0)) ||
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117 !~fm10k_read_reg(hw, FM10K_RXQCTL(0))) {
118 err = FM10K_ERR_NO_RESOURCES;
119 goto reset_max_queues;
120 }
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121
122 /* determine how many queues we have */
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123 for (i = 1; tqdloc0 && (i < FM10K_MAX_QUEUES_POOL); i++) {
124 /* verify the Descriptor cache offsets are increasing */
125 tqdloc = ~fm10k_read_reg(hw, FM10K_TQDLOC(i));
126 if (!tqdloc || (tqdloc == tqdloc0))
127 break;
128
129 /* check to verify the PF doesn't own any of our queues */
130 if (!~fm10k_read_reg(hw, FM10K_TXQCTL(i)) ||
131 !~fm10k_read_reg(hw, FM10K_RXQCTL(i)))
132 break;
133 }
134
135 /* shut down queues we own and reset DMA configuration */
136 err = fm10k_disable_queues_generic(hw, i);
137 if (err)
0e8d5b59 138 goto reset_max_queues;
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139
140 /* record maximum queue count */
141 hw->mac.max_queues = i;
142
20076fa1 143 /* fetch default VLAN and ITR scale */
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144 hw->mac.default_vid = (fm10k_read_reg(hw, FM10K_TXQCTL(0)) &
145 FM10K_TXQCTL_VID_MASK) >> FM10K_TXQCTL_VID_SHIFT;
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146 /* Read the ITR scale from TDLEN. See the definition of
147 * FM10K_TDLEN_ITR_SCALE_SHIFT for more information about how TDLEN is
148 * used here.
149 */
150 hw->mac.itr_scale = (fm10k_read_reg(hw, FM10K_TDLEN(0)) &
151 FM10K_TDLEN_ITR_SCALE_MASK) >>
152 FM10K_TDLEN_ITR_SCALE_SHIFT;
4c16ceae 153
5cb8db4a 154 return 0;
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155
156reset_max_queues:
157 hw->mac.max_queues = 0;
158
159 return err;
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160}
161
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162/* This structure defines the attibutes to be parsed below */
163const struct fm10k_tlv_attr fm10k_mac_vlan_msg_attr[] = {
164 FM10K_TLV_ATTR_U32(FM10K_MAC_VLAN_MSG_VLAN),
165 FM10K_TLV_ATTR_BOOL(FM10K_MAC_VLAN_MSG_SET),
166 FM10K_TLV_ATTR_MAC_ADDR(FM10K_MAC_VLAN_MSG_MAC),
167 FM10K_TLV_ATTR_MAC_ADDR(FM10K_MAC_VLAN_MSG_DEFAULT_MAC),
168 FM10K_TLV_ATTR_MAC_ADDR(FM10K_MAC_VLAN_MSG_MULTICAST),
169 FM10K_TLV_ATTR_LAST
170};
171
172/**
173 * fm10k_update_vlan_vf - Update status of VLAN ID in VLAN filter table
174 * @hw: pointer to hardware structure
175 * @vid: VLAN ID to add to table
176 * @vsi: Reserved, should always be 0
177 * @set: Indicates if this is a set or clear operation
178 *
179 * This function adds or removes the corresponding VLAN ID from the VLAN
180 * filter table for this VF.
181 **/
182static s32 fm10k_update_vlan_vf(struct fm10k_hw *hw, u32 vid, u8 vsi, bool set)
183{
184 struct fm10k_mbx_info *mbx = &hw->mbx;
185 u32 msg[4];
186
187 /* verify the index is not set */
188 if (vsi)
189 return FM10K_ERR_PARAM;
190
fb6515c8 191 /* clever trick to verify reserved bits in both vid and length */
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192 if ((vid << 16 | vid) >> 28)
193 return FM10K_ERR_PARAM;
194
195 /* encode set bit into the VLAN ID */
196 if (!set)
197 vid |= FM10K_VLAN_CLEAR;
198
199 /* generate VLAN request */
200 fm10k_tlv_msg_init(msg, FM10K_VF_MSG_ID_MAC_VLAN);
201 fm10k_tlv_attr_put_u32(msg, FM10K_MAC_VLAN_MSG_VLAN, vid);
202
203 /* load onto outgoing mailbox */
204 return mbx->ops.enqueue_tx(hw, mbx, msg);
205}
206
207/**
208 * fm10k_msg_mac_vlan_vf - Read device MAC address from mailbox message
209 * @hw: pointer to the HW structure
210 * @results: Attributes for message
211 * @mbx: unused mailbox data
212 *
213 * This function should determine the MAC address for the VF
214 **/
215s32 fm10k_msg_mac_vlan_vf(struct fm10k_hw *hw, u32 **results,
216 struct fm10k_mbx_info *mbx)
217{
218 u8 perm_addr[ETH_ALEN];
219 u16 vid;
220 s32 err;
221
222 /* record MAC address requested */
223 err = fm10k_tlv_attr_get_mac_vlan(
224 results[FM10K_MAC_VLAN_MSG_DEFAULT_MAC],
225 perm_addr, &vid);
226 if (err)
227 return err;
228
229 ether_addr_copy(hw->mac.perm_addr, perm_addr);
230 hw->mac.default_vid = vid & (FM10K_VLAN_TABLE_VID_MAX - 1);
5c69df8a 231 hw->mac.vlan_override = !!(vid & FM10K_VLAN_OVERRIDE);
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232
233 return 0;
234}
235
236/**
237 * fm10k_read_mac_addr_vf - Read device MAC address
238 * @hw: pointer to the HW structure
239 *
240 * This function should determine the MAC address for the VF
241 **/
242static s32 fm10k_read_mac_addr_vf(struct fm10k_hw *hw)
243{
244 u8 perm_addr[ETH_ALEN];
245 u32 base_addr;
246
247 base_addr = fm10k_read_reg(hw, FM10K_TDBAL(0));
248
249 /* last byte should be 0 */
250 if (base_addr << 24)
251 return FM10K_ERR_INVALID_MAC_ADDR;
252
253 perm_addr[3] = (u8)(base_addr >> 24);
254 perm_addr[4] = (u8)(base_addr >> 16);
255 perm_addr[5] = (u8)(base_addr >> 8);
256
257 base_addr = fm10k_read_reg(hw, FM10K_TDBAH(0));
258
259 /* first byte should be all 1's */
260 if ((~base_addr) >> 24)
261 return FM10K_ERR_INVALID_MAC_ADDR;
262
263 perm_addr[0] = (u8)(base_addr >> 16);
264 perm_addr[1] = (u8)(base_addr >> 8);
265 perm_addr[2] = (u8)(base_addr);
266
267 ether_addr_copy(hw->mac.perm_addr, perm_addr);
268 ether_addr_copy(hw->mac.addr, perm_addr);
269
270 return 0;
271}
272
273/**
eca32047 274 * fm10k_update_uc_addr_vf - Update device unicast addresses
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275 * @hw: pointer to the HW structure
276 * @glort: unused
277 * @mac: MAC address to add/remove from table
278 * @vid: VLAN ID to add/remove from table
279 * @add: Indicates if this is an add or remove operation
280 * @flags: flags field to indicate add and secure - unused
281 *
282 * This function is used to add or remove unicast MAC addresses for
283 * the VF.
284 **/
285static s32 fm10k_update_uc_addr_vf(struct fm10k_hw *hw, u16 glort,
286 const u8 *mac, u16 vid, bool add, u8 flags)
287{
288 struct fm10k_mbx_info *mbx = &hw->mbx;
289 u32 msg[7];
290
291 /* verify VLAN ID is valid */
292 if (vid >= FM10K_VLAN_TABLE_VID_MAX)
293 return FM10K_ERR_PARAM;
294
295 /* verify MAC address is valid */
296 if (!is_valid_ether_addr(mac))
297 return FM10K_ERR_PARAM;
298
299 /* verify we are not locked down on the MAC address */
300 if (is_valid_ether_addr(hw->mac.perm_addr) &&
6186ddf0 301 !ether_addr_equal(hw->mac.perm_addr, mac))
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302 return FM10K_ERR_PARAM;
303
eca32047 304 /* add bit to notify us if this is a set or clear operation */
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305 if (!add)
306 vid |= FM10K_VLAN_CLEAR;
307
308 /* generate VLAN request */
309 fm10k_tlv_msg_init(msg, FM10K_VF_MSG_ID_MAC_VLAN);
310 fm10k_tlv_attr_put_mac_vlan(msg, FM10K_MAC_VLAN_MSG_MAC, mac, vid);
311
312 /* load onto outgoing mailbox */
313 return mbx->ops.enqueue_tx(hw, mbx, msg);
314}
315
316/**
eca32047 317 * fm10k_update_mc_addr_vf - Update device multicast addresses
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318 * @hw: pointer to the HW structure
319 * @glort: unused
320 * @mac: MAC address to add/remove from table
321 * @vid: VLAN ID to add/remove from table
322 * @add: Indicates if this is an add or remove operation
323 *
324 * This function is used to add or remove multicast MAC addresses for
325 * the VF.
326 **/
327static s32 fm10k_update_mc_addr_vf(struct fm10k_hw *hw, u16 glort,
328 const u8 *mac, u16 vid, bool add)
329{
330 struct fm10k_mbx_info *mbx = &hw->mbx;
331 u32 msg[7];
332
333 /* verify VLAN ID is valid */
334 if (vid >= FM10K_VLAN_TABLE_VID_MAX)
335 return FM10K_ERR_PARAM;
336
337 /* verify multicast address is valid */
338 if (!is_multicast_ether_addr(mac))
339 return FM10K_ERR_PARAM;
340
eca32047 341 /* add bit to notify us if this is a set or clear operation */
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342 if (!add)
343 vid |= FM10K_VLAN_CLEAR;
344
345 /* generate VLAN request */
346 fm10k_tlv_msg_init(msg, FM10K_VF_MSG_ID_MAC_VLAN);
347 fm10k_tlv_attr_put_mac_vlan(msg, FM10K_MAC_VLAN_MSG_MULTICAST,
348 mac, vid);
349
350 /* load onto outgoing mailbox */
351 return mbx->ops.enqueue_tx(hw, mbx, msg);
352}
353
354/**
355 * fm10k_update_int_moderator_vf - Request update of interrupt moderator list
356 * @hw: pointer to hardware structure
357 *
358 * This function will issue a request to the PF to rescan our MSI-X table
359 * and to update the interrupt moderator linked list.
360 **/
361static void fm10k_update_int_moderator_vf(struct fm10k_hw *hw)
362{
363 struct fm10k_mbx_info *mbx = &hw->mbx;
364 u32 msg[1];
365
366 /* generate MSI-X request */
367 fm10k_tlv_msg_init(msg, FM10K_VF_MSG_ID_MSIX);
368
369 /* load onto outgoing mailbox */
370 mbx->ops.enqueue_tx(hw, mbx, msg);
371}
372
373/* This structure defines the attibutes to be parsed below */
374const struct fm10k_tlv_attr fm10k_lport_state_msg_attr[] = {
375 FM10K_TLV_ATTR_BOOL(FM10K_LPORT_STATE_MSG_DISABLE),
376 FM10K_TLV_ATTR_U8(FM10K_LPORT_STATE_MSG_XCAST_MODE),
377 FM10K_TLV_ATTR_BOOL(FM10K_LPORT_STATE_MSG_READY),
378 FM10K_TLV_ATTR_LAST
379};
380
381/**
382 * fm10k_msg_lport_state_vf - Message handler for lport_state message from PF
383 * @hw: Pointer to hardware structure
384 * @results: pointer array containing parsed data
385 * @mbx: Pointer to mailbox information structure
386 *
387 * This handler is meant to capture the indication from the PF that we
388 * are ready to bring up the interface.
389 **/
390s32 fm10k_msg_lport_state_vf(struct fm10k_hw *hw, u32 **results,
391 struct fm10k_mbx_info *mbx)
392{
393 hw->mac.dglort_map = !results[FM10K_LPORT_STATE_MSG_READY] ?
394 FM10K_DGLORTMAP_NONE : FM10K_DGLORTMAP_ZERO;
395
396 return 0;
397}
398
399/**
400 * fm10k_update_lport_state_vf - Update device state in lower device
401 * @hw: pointer to the HW structure
402 * @glort: unused
403 * @count: number of logical ports to enable - unused (always 1)
404 * @enable: boolean value indicating if this is an enable or disable request
405 *
406 * Notify the lower device of a state change. If the lower device is
407 * enabled we can add filters, if it is disabled all filters for this
408 * logical port are flushed.
409 **/
410static s32 fm10k_update_lport_state_vf(struct fm10k_hw *hw, u16 glort,
411 u16 count, bool enable)
412{
413 struct fm10k_mbx_info *mbx = &hw->mbx;
414 u32 msg[2];
415
416 /* reset glort mask 0 as we have to wait to be enabled */
417 hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
418
419 /* generate port state request */
420 fm10k_tlv_msg_init(msg, FM10K_VF_MSG_ID_LPORT_STATE);
421 if (!enable)
422 fm10k_tlv_attr_put_bool(msg, FM10K_LPORT_STATE_MSG_DISABLE);
423
424 /* load onto outgoing mailbox */
425 return mbx->ops.enqueue_tx(hw, mbx, msg);
426}
427
428/**
429 * fm10k_update_xcast_mode_vf - Request update of multicast mode
430 * @hw: pointer to hardware structure
431 * @glort: unused
432 * @mode: integer value indicating mode being requested
433 *
434 * This function will attempt to request a higher mode for the port
435 * so that it can enable either multicast, multicast promiscuous, or
436 * promiscuous mode of operation.
437 **/
438static s32 fm10k_update_xcast_mode_vf(struct fm10k_hw *hw, u16 glort, u8 mode)
439{
440 struct fm10k_mbx_info *mbx = &hw->mbx;
441 u32 msg[3];
442
443 if (mode > FM10K_XCAST_MODE_NONE)
444 return FM10K_ERR_PARAM;
a4fcad65 445
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446 /* generate message requesting to change xcast mode */
447 fm10k_tlv_msg_init(msg, FM10K_VF_MSG_ID_LPORT_STATE);
448 fm10k_tlv_attr_put_u8(msg, FM10K_LPORT_STATE_MSG_XCAST_MODE, mode);
449
450 /* load onto outgoing mailbox */
451 return mbx->ops.enqueue_tx(hw, mbx, msg);
452}
453
454/**
455 * fm10k_update_hw_stats_vf - Updates hardware related statistics of VF
456 * @hw: pointer to hardware structure
457 * @stats: pointer to statistics structure
458 *
459 * This function collects and aggregates per queue hardware statistics.
460 **/
461static void fm10k_update_hw_stats_vf(struct fm10k_hw *hw,
462 struct fm10k_hw_stats *stats)
463{
464 fm10k_update_hw_stats_q(hw, stats->q, 0, hw->mac.max_queues);
465}
466
467/**
468 * fm10k_rebind_hw_stats_vf - Resets base for hardware statistics of VF
469 * @hw: pointer to hardware structure
470 * @stats: pointer to the stats structure to update
471 *
472 * This function resets the base for queue hardware statistics.
473 **/
474static void fm10k_rebind_hw_stats_vf(struct fm10k_hw *hw,
475 struct fm10k_hw_stats *stats)
476{
477 /* Unbind Queue Statistics */
478 fm10k_unbind_hw_stats_q(stats->q, 0, hw->mac.max_queues);
479
480 /* Reinitialize bases for all stats */
481 fm10k_update_hw_stats_vf(hw, stats);
482}
483
484/**
485 * fm10k_configure_dglort_map_vf - Configures GLORT entry and queues
486 * @hw: pointer to hardware structure
487 * @dglort: pointer to dglort configuration structure
488 *
489 * Reads the configuration structure contained in dglort_cfg and uses
490 * that information to then populate a DGLORTMAP/DEC entry and the queues
491 * to which it has been assigned.
492 **/
493static s32 fm10k_configure_dglort_map_vf(struct fm10k_hw *hw,
494 struct fm10k_dglort_cfg *dglort)
495{
496 /* verify the dglort pointer */
497 if (!dglort)
498 return FM10K_ERR_PARAM;
499
500 /* stub for now until we determine correct message for this */
501
502 return 0;
503}
504
505static const struct fm10k_msg_data fm10k_msg_data_vf[] = {
506 FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
507 FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_msg_mac_vlan_vf),
508 FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
509 FM10K_TLV_MSG_ERROR_HANDLER(fm10k_tlv_msg_error),
510};
511
f329ad73 512static const struct fm10k_mac_ops mac_ops_vf = {
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513 .get_bus_info = fm10k_get_bus_info_generic,
514 .reset_hw = fm10k_reset_hw_vf,
515 .init_hw = fm10k_init_hw_vf,
516 .start_hw = fm10k_start_hw_generic,
517 .stop_hw = fm10k_stop_hw_vf,
518 .update_vlan = fm10k_update_vlan_vf,
519 .read_mac_addr = fm10k_read_mac_addr_vf,
520 .update_uc_addr = fm10k_update_uc_addr_vf,
521 .update_mc_addr = fm10k_update_mc_addr_vf,
522 .update_xcast_mode = fm10k_update_xcast_mode_vf,
523 .update_int_moderator = fm10k_update_int_moderator_vf,
524 .update_lport_state = fm10k_update_lport_state_vf,
525 .update_hw_stats = fm10k_update_hw_stats_vf,
526 .rebind_hw_stats = fm10k_rebind_hw_stats_vf,
527 .configure_dglort_map = fm10k_configure_dglort_map_vf,
528 .get_host_state = fm10k_get_host_state_generic,
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529};
530
531static s32 fm10k_get_invariants_vf(struct fm10k_hw *hw)
532{
533 fm10k_get_invariants_generic(hw);
534
535 return fm10k_pfvf_mbx_init(hw, &hw->mbx, fm10k_msg_data_vf, 0);
536}
537
f329ad73 538const struct fm10k_info fm10k_vf_info = {
5cb8db4a 539 .mac = fm10k_mac_vf,
4e458cfb 540 .get_invariants = fm10k_get_invariants_vf,
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541 .mac_ops = &mac_ops_vf,
542};
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