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i40e: Add flag for L2 VEB filtering
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_common.c
CommitLineData
56a62fc8
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28#include "i40e_type.h"
29#include "i40e_adminq.h"
30#include "i40e_prototype.h"
31#include "i40e_virtchnl.h"
32
33/**
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
36 *
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
39 **/
40static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
41{
42 i40e_status status = 0;
43
44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
45 switch (hw->device_id) {
46 case I40E_SFP_XL710_DEVICE_ID:
47 case I40E_SFP_X710_DEVICE_ID:
48 case I40E_QEMU_DEVICE_ID:
49 case I40E_KX_A_DEVICE_ID:
50 case I40E_KX_B_DEVICE_ID:
51 case I40E_KX_C_DEVICE_ID:
52 case I40E_KX_D_DEVICE_ID:
53 case I40E_QSFP_A_DEVICE_ID:
54 case I40E_QSFP_B_DEVICE_ID:
55 case I40E_QSFP_C_DEVICE_ID:
56 hw->mac.type = I40E_MAC_XL710;
57 break;
58 case I40E_VF_DEVICE_ID:
59 case I40E_VF_HV_DEVICE_ID:
60 hw->mac.type = I40E_MAC_VF;
61 break;
62 default:
63 hw->mac.type = I40E_MAC_GENERIC;
64 break;
65 }
66 } else {
67 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
68 }
69
70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw->mac.type, status);
72 return status;
73}
74
75/**
76 * i40e_debug_aq
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
80 *
81 * Dumps debug log about adminq command with descriptor contents.
82 **/
83void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
84 void *buffer)
85{
86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
87 u8 *aq_buffer = (u8 *)buffer;
88 u32 data[4];
89 u32 i = 0;
90
91 if ((!(mask & hw->debug_mask)) || (desc == NULL))
92 return;
93
94 i40e_debug(hw, mask,
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
97 aq_desc->retval);
98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc->cookie_high, aq_desc->cookie_low);
100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc->params.internal.param0,
102 aq_desc->params.internal.param1);
103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc->params.external.addr_high,
105 aq_desc->params.external.addr_low);
106
107 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
108 memset(data, 0, sizeof(data));
109 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
111 data[((i % 16) / 4)] |=
112 ((u32)aq_buffer[i]) << (8 * (i % 4));
113 if ((i % 16) == 15) {
114 i40e_debug(hw, mask,
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i - 15, data[0], data[1], data[2],
117 data[3]);
118 memset(data, 0, sizeof(data));
119 }
120 }
121 if ((i % 16) != 0)
122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
123 i - (i % 16), data[0], data[1], data[2],
124 data[3]);
125 }
126}
127
128/**
129 * i40e_init_shared_code - Initialize the shared code
130 * @hw: pointer to hardware structure
131 *
132 * This assigns the MAC type and PHY code and inits the NVM.
133 * Does not touch the hardware. This function must be called prior to any
134 * other function in the shared code. The i40e_hw structure should be
135 * memset to 0 prior to calling this function. The following fields in
136 * hw structure should be filled in prior to calling this function:
137 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
138 * subsystem_vendor_id, and revision_id
139 **/
140i40e_status i40e_init_shared_code(struct i40e_hw *hw)
141{
142 i40e_status status = 0;
143 u32 reg;
144
145 hw->phy.get_link_info = true;
146
147 /* Determine port number */
148 reg = rd32(hw, I40E_PFGEN_PORTNUM);
149 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
151 hw->port = (u8)reg;
152
153 i40e_set_mac_type(hw);
154
155 switch (hw->mac.type) {
156 case I40E_MAC_XL710:
157 break;
158 default:
159 return I40E_ERR_DEVICE_NOT_SUPPORTED;
160 break;
161 }
162
163 status = i40e_init_nvm(hw);
164 return status;
165}
166
167/**
168 * i40e_aq_mac_address_read - Retrieve the MAC addresses
169 * @hw: pointer to the hw struct
170 * @flags: a return indicator of what addresses were added to the addr store
171 * @addrs: the requestor's mac addr store
172 * @cmd_details: pointer to command details structure or NULL
173 **/
174static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
175 u16 *flags,
176 struct i40e_aqc_mac_address_read_data *addrs,
177 struct i40e_asq_cmd_details *cmd_details)
178{
179 struct i40e_aq_desc desc;
180 struct i40e_aqc_mac_address_read *cmd_data =
181 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
182 i40e_status status;
183
184 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
185 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
186
187 status = i40e_asq_send_command(hw, &desc, addrs,
188 sizeof(*addrs), cmd_details);
189 *flags = le16_to_cpu(cmd_data->command_flags);
190
191 return status;
192}
193
194/**
195 * i40e_aq_mac_address_write - Change the MAC addresses
196 * @hw: pointer to the hw struct
197 * @flags: indicates which MAC to be written
198 * @mac_addr: address to write
199 * @cmd_details: pointer to command details structure or NULL
200 **/
201i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
202 u16 flags, u8 *mac_addr,
203 struct i40e_asq_cmd_details *cmd_details)
204{
205 struct i40e_aq_desc desc;
206 struct i40e_aqc_mac_address_write *cmd_data =
207 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
208 i40e_status status;
209
210 i40e_fill_default_direct_cmd_desc(&desc,
211 i40e_aqc_opc_mac_address_write);
212 cmd_data->command_flags = cpu_to_le16(flags);
213 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4);
214 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2);
215
216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
217
218 return status;
219}
220
221/**
222 * i40e_get_mac_addr - get MAC address
223 * @hw: pointer to the HW structure
224 * @mac_addr: pointer to MAC address
225 *
226 * Reads the adapter's MAC address from register
227 **/
228i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
229{
230 struct i40e_aqc_mac_address_read_data addrs;
231 i40e_status status;
232 u16 flags = 0;
233
234 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
235
236 if (flags & I40E_AQC_LAN_ADDR_VALID)
237 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
238
239 return status;
240}
241
242/**
243 * i40e_validate_mac_addr - Validate MAC address
244 * @mac_addr: pointer to MAC address
245 *
246 * Tests a MAC address to ensure it is a valid Individual Address
247 **/
248i40e_status i40e_validate_mac_addr(u8 *mac_addr)
249{
250 i40e_status status = 0;
251
252 /* Make sure it is not a multicast address */
253 if (I40E_IS_MULTICAST(mac_addr)) {
254 hw_dbg(hw, "MAC address is multicast\n");
255 status = I40E_ERR_INVALID_MAC_ADDR;
256 /* Not a broadcast address */
257 } else if (I40E_IS_BROADCAST(mac_addr)) {
258 hw_dbg(hw, "MAC address is broadcast\n");
259 status = I40E_ERR_INVALID_MAC_ADDR;
260 /* Reject the zero address */
261 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
262 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
263 hw_dbg(hw, "MAC address is all zeros\n");
264 status = I40E_ERR_INVALID_MAC_ADDR;
265 }
266 return status;
267}
268
be405eb0
JB		 269/**
270 * i40e_get_media_type - Gets media type
271 * @hw: pointer to the hardware structure
272 **/
273static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
274{
275 enum i40e_media_type media;
276
277 switch (hw->phy.link_info.phy_type) {
278 case I40E_PHY_TYPE_10GBASE_SR:
279 case I40E_PHY_TYPE_10GBASE_LR:
280 case I40E_PHY_TYPE_40GBASE_SR4:
281 case I40E_PHY_TYPE_40GBASE_LR4:
282 media = I40E_MEDIA_TYPE_FIBER;
283 break;
284 case I40E_PHY_TYPE_100BASE_TX:
285 case I40E_PHY_TYPE_1000BASE_T:
286 case I40E_PHY_TYPE_10GBASE_T:
287 media = I40E_MEDIA_TYPE_BASET;
288 break;
289 case I40E_PHY_TYPE_10GBASE_CR1_CU:
290 case I40E_PHY_TYPE_40GBASE_CR4_CU:
291 case I40E_PHY_TYPE_10GBASE_CR1:
292 case I40E_PHY_TYPE_40GBASE_CR4:
293 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
294 media = I40E_MEDIA_TYPE_DA;
295 break;
296 case I40E_PHY_TYPE_1000BASE_KX:
297 case I40E_PHY_TYPE_10GBASE_KX4:
298 case I40E_PHY_TYPE_10GBASE_KR:
299 case I40E_PHY_TYPE_40GBASE_KR4:
300 media = I40E_MEDIA_TYPE_BACKPLANE;
301 break;
302 case I40E_PHY_TYPE_SGMII:
303 case I40E_PHY_TYPE_XAUI:
304 case I40E_PHY_TYPE_XFI:
305 case I40E_PHY_TYPE_XLAUI:
306 case I40E_PHY_TYPE_XLPPI:
307 default:
308 media = I40E_MEDIA_TYPE_UNKNOWN;
309 break;
310 }
311
312 return media;
313}
314
56a62fc8
JB		 315/**
316 * i40e_pf_reset - Reset the PF
317 * @hw: pointer to the hardware structure
318 *
319 * Assuming someone else has triggered a global reset,
320 * assure the global reset is complete and then reset the PF
321 **/
322i40e_status i40e_pf_reset(struct i40e_hw *hw)
323{
324 u32 wait_cnt = 0;
325 u32 reg = 0;
326 u32 grst_del;
327
328 /* Poll for Global Reset steady state in case of recent GRST.
329 * The grst delay value is in 100ms units, and we'll wait a
330 * couple counts longer to be sure we don't just miss the end.
331 */
332 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
333 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
334 for (wait_cnt = 0; wait_cnt < grst_del + 2; wait_cnt++) {
335 reg = rd32(hw, I40E_GLGEN_RSTAT);
336 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
337 break;
338 msleep(100);
339 }
340 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
341 hw_dbg(hw, "Global reset polling failed to complete.\n");
342 return I40E_ERR_RESET_FAILED;
343 }
344
345 /* Determine the PF number based on the PCI fn */
71bd4b8e
CP		 346 reg = rd32(hw, I40E_GLPCI_CAPSUP);
347 if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
348 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
349 else
350 hw->pf_id = (u8)hw->bus.func;
56a62fc8
JB		 351
352 /* If there was a Global Reset in progress when we got here,
353 * we don't need to do the PF Reset
354 */
355 if (!wait_cnt) {
356 reg = rd32(hw, I40E_PFGEN_CTRL);
357 wr32(hw, I40E_PFGEN_CTRL,
358 (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
359 for (wait_cnt = 0; wait_cnt < 10; wait_cnt++) {
360 reg = rd32(hw, I40E_PFGEN_CTRL);
361 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
362 break;
363 usleep_range(1000, 2000);
364 }
365 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
366 hw_dbg(hw, "PF reset polling failed to complete.\n");
367 return I40E_ERR_RESET_FAILED;
368 }
369 }
370
371 i40e_clear_pxe_mode(hw);
372 return 0;
373}
374
375/**
376 * i40e_clear_pxe_mode - clear pxe operations mode
377 * @hw: pointer to the hw struct
378 *
379 * Make sure all PXE mode settings are cleared, including things
380 * like descriptor fetch/write-back mode.
381 **/
382void i40e_clear_pxe_mode(struct i40e_hw *hw)
383{
384 u32 reg;
385
386 /* Clear single descriptor fetch/write-back mode */
387 reg = rd32(hw, I40E_GLLAN_RCTL_0);
388 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
389}
390
391/**
392 * i40e_led_get - return current on/off mode
393 * @hw: pointer to the hw struct
394 *
395 * The value returned is the 'mode' field as defined in the
396 * GPIO register definitions: 0x0 = off, 0xf = on, and other
397 * values are variations of possible behaviors relating to
398 * blink, link, and wire.
399 **/
400u32 i40e_led_get(struct i40e_hw *hw)
401{
402 u32 gpio_val = 0;
403 u32 mode = 0;
404 u32 port;
405 int i;
406
407 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
408 if (!hw->func_caps.led[i])
409 continue;
410
411 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
412 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
413 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
414
415 if (port != hw->port)
416 continue;
417
418 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
419 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT;
420 break;
421 }
422
423 return mode;
424}
425
426/**
427 * i40e_led_set - set new on/off mode
428 * @hw: pointer to the hw struct
429 * @mode: 0=off, else on (see EAS for mode details)
430 **/
431void i40e_led_set(struct i40e_hw *hw, u32 mode)
432{
433 u32 gpio_val = 0;
434 u32 led_mode = 0;
435 u32 port;
436 int i;
437
438 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
439 if (!hw->func_caps.led[i])
440 continue;
441
442 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
443 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
444 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
445
446 if (port != hw->port)
447 continue;
448
449 led_mode = (mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
450 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
451 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
452 gpio_val |= led_mode;
453 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
454 }
455}
456
457/* Admin command wrappers */
458/**
459 * i40e_aq_queue_shutdown
460 * @hw: pointer to the hw struct
461 * @unloading: is the driver unloading itself
462 *
463 * Tell the Firmware that we're shutting down the AdminQ and whether
464 * or not the driver is unloading as well.
465 **/
466i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
467 bool unloading)
468{
469 struct i40e_aq_desc desc;
470 struct i40e_aqc_queue_shutdown *cmd =
471 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
472 i40e_status status;
473
474 i40e_fill_default_direct_cmd_desc(&desc,
475 i40e_aqc_opc_queue_shutdown);
476
477 if (unloading)
478 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
479 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
480
481 return status;
482}
483
484/**
485 * i40e_aq_set_link_restart_an
486 * @hw: pointer to the hw struct
487 * @cmd_details: pointer to command details structure or NULL
488 *
489 * Sets up the link and restarts the Auto-Negotiation over the link.
490 **/
491i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
492 struct i40e_asq_cmd_details *cmd_details)
493{
494 struct i40e_aq_desc desc;
495 struct i40e_aqc_set_link_restart_an *cmd =
496 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
497 i40e_status status;
498
499 i40e_fill_default_direct_cmd_desc(&desc,
500 i40e_aqc_opc_set_link_restart_an);
501
502 cmd->command = I40E_AQ_PHY_RESTART_AN;
503
504 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
505
506 return status;
507}
508
509/**
510 * i40e_aq_get_link_info
511 * @hw: pointer to the hw struct
512 * @enable_lse: enable/disable LinkStatusEvent reporting
513 * @link: pointer to link status structure - optional
514 * @cmd_details: pointer to command details structure or NULL
515 *
516 * Returns the link status of the adapter.
517 **/
518i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
519 bool enable_lse, struct i40e_link_status *link,
520 struct i40e_asq_cmd_details *cmd_details)
521{
522 struct i40e_aq_desc desc;
523 struct i40e_aqc_get_link_status *resp =
524 (struct i40e_aqc_get_link_status *)&desc.params.raw;
525 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
526 i40e_status status;
527 u16 command_flags;
528
529 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
530
531 if (enable_lse)
532 command_flags = I40E_AQ_LSE_ENABLE;
533 else
534 command_flags = I40E_AQ_LSE_DISABLE;
535 resp->command_flags = cpu_to_le16(command_flags);
536
537 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
538
539 if (status)
540 goto aq_get_link_info_exit;
541
542 /* save off old link status information */
543 memcpy(&hw->phy.link_info_old, hw_link_info,
544 sizeof(struct i40e_link_status));
545
546 /* update link status */
547 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
be405eb0 548 hw->phy.media_type = i40e_get_media_type(hw);
56a62fc8
JB		 549 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
550 hw_link_info->link_info = resp->link_info;
551 hw_link_info->an_info = resp->an_info;
552 hw_link_info->ext_info = resp->ext_info;
553
554 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
555 hw_link_info->lse_enable = true;
556 else
557 hw_link_info->lse_enable = false;
558
559 /* save link status information */
560 if (link)
d7595a22 561 *link = *hw_link_info;
56a62fc8
JB		 562
563 /* flag cleared so helper functions don't call AQ again */
564 hw->phy.get_link_info = false;
565
566aq_get_link_info_exit:
567 return status;
568}
569
570/**
571 * i40e_aq_add_vsi
572 * @hw: pointer to the hw struct
573 * @vsi: pointer to a vsi context struct
574 * @cmd_details: pointer to command details structure or NULL
575 *
576 * Add a VSI context to the hardware.
577**/
578i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
579 struct i40e_vsi_context *vsi_ctx,
580 struct i40e_asq_cmd_details *cmd_details)
581{
582 struct i40e_aq_desc desc;
583 struct i40e_aqc_add_get_update_vsi *cmd =
584 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
585 struct i40e_aqc_add_get_update_vsi_completion *resp =
586 (struct i40e_aqc_add_get_update_vsi_completion *)
587 &desc.params.raw;
588 i40e_status status;
589
590 i40e_fill_default_direct_cmd_desc(&desc,
591 i40e_aqc_opc_add_vsi);
592
593 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
594 cmd->connection_type = vsi_ctx->connection_type;
595 cmd->vf_id = vsi_ctx->vf_num;
596 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
597
598 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
599 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
600 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
601
602 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
603 sizeof(vsi_ctx->info), cmd_details);
604
605 if (status)
606 goto aq_add_vsi_exit;
607
608 vsi_ctx->seid = le16_to_cpu(resp->seid);
609 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
610 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
611 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
612
613aq_add_vsi_exit:
614 return status;
615}
616
617/**
618 * i40e_aq_set_vsi_unicast_promiscuous
619 * @hw: pointer to the hw struct
620 * @seid: vsi number
621 * @set: set unicast promiscuous enable/disable
622 * @cmd_details: pointer to command details structure or NULL
623 **/
624i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
625 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
626{
627 struct i40e_aq_desc desc;
628 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
629 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
630 i40e_status status;
631 u16 flags = 0;
632
633 i40e_fill_default_direct_cmd_desc(&desc,
634 i40e_aqc_opc_set_vsi_promiscuous_modes);
635
636 if (set)
637 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
638
639 cmd->promiscuous_flags = cpu_to_le16(flags);
640
641 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
642
643 cmd->seid = cpu_to_le16(seid);
644 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
645
646 return status;
647}
648
649/**
650 * i40e_aq_set_vsi_multicast_promiscuous
651 * @hw: pointer to the hw struct
652 * @seid: vsi number
653 * @set: set multicast promiscuous enable/disable
654 * @cmd_details: pointer to command details structure or NULL
655 **/
656i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
657 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
658{
659 struct i40e_aq_desc desc;
660 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
661 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
662 i40e_status status;
663 u16 flags = 0;
664
665 i40e_fill_default_direct_cmd_desc(&desc,
666 i40e_aqc_opc_set_vsi_promiscuous_modes);
667
668 if (set)
669 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
670
671 cmd->promiscuous_flags = cpu_to_le16(flags);
672
673 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
674
675 cmd->seid = cpu_to_le16(seid);
676 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
677
678 return status;
679}
680
681/**
682 * i40e_aq_set_vsi_broadcast
683 * @hw: pointer to the hw struct
684 * @seid: vsi number
685 * @set_filter: true to set filter, false to clear filter
686 * @cmd_details: pointer to command details structure or NULL
687 *
688 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
689 **/
690i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
691 u16 seid, bool set_filter,
692 struct i40e_asq_cmd_details *cmd_details)
693{
694 struct i40e_aq_desc desc;
695 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
696 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
697 i40e_status status;
698
699 i40e_fill_default_direct_cmd_desc(&desc,
700 i40e_aqc_opc_set_vsi_promiscuous_modes);
701
702 if (set_filter)
703 cmd->promiscuous_flags
704 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
705 else
706 cmd->promiscuous_flags
707 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
708
709 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
710 cmd->seid = cpu_to_le16(seid);
711 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
712
713 return status;
714}
715
716/**
717 * i40e_get_vsi_params - get VSI configuration info
718 * @hw: pointer to the hw struct
719 * @vsi: pointer to a vsi context struct
720 * @cmd_details: pointer to command details structure or NULL
721 **/
722i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
723 struct i40e_vsi_context *vsi_ctx,
724 struct i40e_asq_cmd_details *cmd_details)
725{
726 struct i40e_aq_desc desc;
727 struct i40e_aqc_switch_seid *cmd =
728 (struct i40e_aqc_switch_seid *)&desc.params.raw;
729 struct i40e_aqc_add_get_update_vsi_completion *resp =
730 (struct i40e_aqc_add_get_update_vsi_completion *)
731 &desc.params.raw;
732 i40e_status status;
733
734 i40e_fill_default_direct_cmd_desc(&desc,
735 i40e_aqc_opc_get_vsi_parameters);
736
737 cmd->seid = cpu_to_le16(vsi_ctx->seid);
738
739 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
740 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
741 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
742
743 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
744 sizeof(vsi_ctx->info), NULL);
745
746 if (status)
747 goto aq_get_vsi_params_exit;
748
749 vsi_ctx->seid = le16_to_cpu(resp->seid);
750 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
751 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
752 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
753
754aq_get_vsi_params_exit:
755 return status;
756}
757
758/**
759 * i40e_aq_update_vsi_params
760 * @hw: pointer to the hw struct
761 * @vsi: pointer to a vsi context struct
762 * @cmd_details: pointer to command details structure or NULL
763 *
764 * Update a VSI context.
765 **/
766i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
767 struct i40e_vsi_context *vsi_ctx,
768 struct i40e_asq_cmd_details *cmd_details)
769{
770 struct i40e_aq_desc desc;
771 struct i40e_aqc_switch_seid *cmd =
772 (struct i40e_aqc_switch_seid *)&desc.params.raw;
773 i40e_status status;
774
775 i40e_fill_default_direct_cmd_desc(&desc,
776 i40e_aqc_opc_update_vsi_parameters);
777 cmd->seid = cpu_to_le16(vsi_ctx->seid);
778
779 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
780 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
781 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
782
783 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
784 sizeof(vsi_ctx->info), cmd_details);
785
786 return status;
787}
788
789/**
790 * i40e_aq_get_switch_config
791 * @hw: pointer to the hardware structure
792 * @buf: pointer to the result buffer
793 * @buf_size: length of input buffer
794 * @start_seid: seid to start for the report, 0 == beginning
795 * @cmd_details: pointer to command details structure or NULL
796 *
797 * Fill the buf with switch configuration returned from AdminQ command
798 **/
799i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
800 struct i40e_aqc_get_switch_config_resp *buf,
801 u16 buf_size, u16 *start_seid,
802 struct i40e_asq_cmd_details *cmd_details)
803{
804 struct i40e_aq_desc desc;
805 struct i40e_aqc_switch_seid *scfg =
806 (struct i40e_aqc_switch_seid *)&desc.params.raw;
807 i40e_status status;
808
809 i40e_fill_default_direct_cmd_desc(&desc,
810 i40e_aqc_opc_get_switch_config);
811 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
812 if (buf_size > I40E_AQ_LARGE_BUF)
813 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
814 scfg->seid = cpu_to_le16(*start_seid);
815
816 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
817 *start_seid = le16_to_cpu(scfg->seid);
818
819 return status;
820}
821
822/**
823 * i40e_aq_get_firmware_version
824 * @hw: pointer to the hw struct
825 * @fw_major_version: firmware major version
826 * @fw_minor_version: firmware minor version
827 * @api_major_version: major queue version
828 * @api_minor_version: minor queue version
829 * @cmd_details: pointer to command details structure or NULL
830 *
831 * Get the firmware version from the admin queue commands
832 **/
833i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
834 u16 *fw_major_version, u16 *fw_minor_version,
835 u16 *api_major_version, u16 *api_minor_version,
836 struct i40e_asq_cmd_details *cmd_details)
837{
838 struct i40e_aq_desc desc;
839 struct i40e_aqc_get_version *resp =
840 (struct i40e_aqc_get_version *)&desc.params.raw;
841 i40e_status status;
842
843 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
844
845 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
846
847 if (!status) {
848 if (fw_major_version != NULL)
849 *fw_major_version = le16_to_cpu(resp->fw_major);
850 if (fw_minor_version != NULL)
851 *fw_minor_version = le16_to_cpu(resp->fw_minor);
852 if (api_major_version != NULL)
853 *api_major_version = le16_to_cpu(resp->api_major);
854 if (api_minor_version != NULL)
855 *api_minor_version = le16_to_cpu(resp->api_minor);
856 }
857
858 return status;
859}
860
861/**
862 * i40e_aq_send_driver_version
863 * @hw: pointer to the hw struct
864 * @event: driver event: driver ok, start or stop
865 * @dv: driver's major, minor version
866 * @cmd_details: pointer to command details structure or NULL
867 *
868 * Send the driver version to the firmware
869 **/
870i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
871 struct i40e_driver_version *dv,
872 struct i40e_asq_cmd_details *cmd_details)
873{
874 struct i40e_aq_desc desc;
875 struct i40e_aqc_driver_version *cmd =
876 (struct i40e_aqc_driver_version *)&desc.params.raw;
877 i40e_status status;
878
879 if (dv == NULL)
880 return I40E_ERR_PARAM;
881
882 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
883
884 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
885 cmd->driver_major_ver = dv->major_version;
886 cmd->driver_minor_ver = dv->minor_version;
887 cmd->driver_build_ver = dv->build_version;
888 cmd->driver_subbuild_ver = dv->subbuild_version;
889 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
890
891 return status;
892}
893
894/**
895 * i40e_get_link_status - get status of the HW network link
896 * @hw: pointer to the hw struct
897 *
898 * Returns true if link is up, false if link is down.
899 *
900 * Side effect: LinkStatusEvent reporting becomes enabled
901 **/
902bool i40e_get_link_status(struct i40e_hw *hw)
903{
904 i40e_status status = 0;
905 bool link_status = false;
906
907 if (hw->phy.get_link_info) {
908 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
909
910 if (status)
911 goto i40e_get_link_status_exit;
912 }
913
914 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
915
916i40e_get_link_status_exit:
917 return link_status;
918}
919
920/**
921 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
922 * @hw: pointer to the hw struct
923 * @uplink_seid: the MAC or other gizmo SEID
924 * @downlink_seid: the VSI SEID
925 * @enabled_tc: bitmap of TCs to be enabled
926 * @default_port: true for default port VSI, false for control port
e1c51b95 927 * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
56a62fc8
JB		 928 * @veb_seid: pointer to where to put the resulting VEB SEID
929 * @cmd_details: pointer to command details structure or NULL
930 *
931 * This asks the FW to add a VEB between the uplink and downlink
932 * elements. If the uplink SEID is 0, this will be a floating VEB.
933 **/
934i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
935 u16 downlink_seid, u8 enabled_tc,
e1c51b95
KS		 936 bool default_port, bool enable_l2_filtering,
937 u16 *veb_seid,
56a62fc8
JB		 938 struct i40e_asq_cmd_details *cmd_details)
939{
940 struct i40e_aq_desc desc;
941 struct i40e_aqc_add_veb *cmd =
942 (struct i40e_aqc_add_veb *)&desc.params.raw;
943 struct i40e_aqc_add_veb_completion *resp =
944 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
945 i40e_status status;
946 u16 veb_flags = 0;
947
948 /* SEIDs need to either both be set or both be 0 for floating VEB */
949 if (!!uplink_seid != !!downlink_seid)
950 return I40E_ERR_PARAM;
951
952 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
953
954 cmd->uplink_seid = cpu_to_le16(uplink_seid);
955 cmd->downlink_seid = cpu_to_le16(downlink_seid);
956 cmd->enable_tcs = enabled_tc;
957 if (!uplink_seid)
958 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
959 if (default_port)
960 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
961 else
962 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
e1c51b95
KS		 963
964 if (enable_l2_filtering)
965 veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
966
56a62fc8
JB		 967 cmd->veb_flags = cpu_to_le16(veb_flags);
968
969 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
970
971 if (!status && veb_seid)
972 *veb_seid = le16_to_cpu(resp->veb_seid);
973
974 return status;
975}
976
977/**
978 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
979 * @hw: pointer to the hw struct
980 * @veb_seid: the SEID of the VEB to query
981 * @switch_id: the uplink switch id
982 * @floating_veb: set to true if the VEB is floating
983 * @statistic_index: index of the stats counter block for this VEB
984 * @vebs_used: number of VEB's used by function
985 * @vebs_unallocated: total VEB's not reserved by any function
986 * @cmd_details: pointer to command details structure or NULL
987 *
988 * This retrieves the parameters for a particular VEB, specified by
989 * uplink_seid, and returns them to the caller.
990 **/
991i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
992 u16 veb_seid, u16 *switch_id,
993 bool *floating, u16 *statistic_index,
994 u16 *vebs_used, u16 *vebs_free,
995 struct i40e_asq_cmd_details *cmd_details)
996{
997 struct i40e_aq_desc desc;
998 struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
999 (struct i40e_aqc_get_veb_parameters_completion *)
1000 &desc.params.raw;
1001 i40e_status status;
1002
1003 if (veb_seid == 0)
1004 return I40E_ERR_PARAM;
1005
1006 i40e_fill_default_direct_cmd_desc(&desc,
1007 i40e_aqc_opc_get_veb_parameters);
1008 cmd_resp->seid = cpu_to_le16(veb_seid);
1009
1010 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1011 if (status)
1012 goto get_veb_exit;
1013
1014 if (switch_id)
1015 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1016 if (statistic_index)
1017 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1018 if (vebs_used)
1019 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1020 if (vebs_free)
1021 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1022 if (floating) {
1023 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1024 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1025 *floating = true;
1026 else
1027 *floating = false;
1028 }
1029
1030get_veb_exit:
1031 return status;
1032}
1033
1034/**
1035 * i40e_aq_add_macvlan
1036 * @hw: pointer to the hw struct
1037 * @seid: VSI for the mac address
1038 * @mv_list: list of macvlans to be added
1039 * @count: length of the list
1040 * @cmd_details: pointer to command details structure or NULL
1041 *
1042 * Add MAC/VLAN addresses to the HW filtering
1043 **/
1044i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1045 struct i40e_aqc_add_macvlan_element_data *mv_list,
1046 u16 count, struct i40e_asq_cmd_details *cmd_details)
1047{
1048 struct i40e_aq_desc desc;
1049 struct i40e_aqc_macvlan *cmd =
1050 (struct i40e_aqc_macvlan *)&desc.params.raw;
1051 i40e_status status;
1052 u16 buf_size;
1053
1054 if (count == 0 || !mv_list || !hw)
1055 return I40E_ERR_PARAM;
1056
1057 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1058
1059 /* prep the rest of the request */
1060 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1061 cmd->num_addresses = cpu_to_le16(count);
1062 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1063 cmd->seid[1] = 0;
1064 cmd->seid[2] = 0;
1065
1066 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1067 if (buf_size > I40E_AQ_LARGE_BUF)
1068 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1069
1070 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1071 cmd_details);
1072
1073 return status;
1074}
1075
1076/**
1077 * i40e_aq_remove_macvlan
1078 * @hw: pointer to the hw struct
1079 * @seid: VSI for the mac address
1080 * @mv_list: list of macvlans to be removed
1081 * @count: length of the list
1082 * @cmd_details: pointer to command details structure or NULL
1083 *
1084 * Remove MAC/VLAN addresses from the HW filtering
1085 **/
1086i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1087 struct i40e_aqc_remove_macvlan_element_data *mv_list,
1088 u16 count, struct i40e_asq_cmd_details *cmd_details)
1089{
1090 struct i40e_aq_desc desc;
1091 struct i40e_aqc_macvlan *cmd =
1092 (struct i40e_aqc_macvlan *)&desc.params.raw;
1093 i40e_status status;
1094 u16 buf_size;
1095
1096 if (count == 0 || !mv_list || !hw)
1097 return I40E_ERR_PARAM;
1098
1099 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1100
1101 /* prep the rest of the request */
1102 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1103 cmd->num_addresses = cpu_to_le16(count);
1104 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1105 cmd->seid[1] = 0;
1106 cmd->seid[2] = 0;
1107
1108 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1109 if (buf_size > I40E_AQ_LARGE_BUF)
1110 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1111
1112 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1113 cmd_details);
1114
1115 return status;
1116}
1117
1118/**
1119 * i40e_aq_add_vlan - Add VLAN ids to the HW filtering
1120 * @hw: pointer to the hw struct
1121 * @seid: VSI for the vlan filters
1122 * @v_list: list of vlan filters to be added
1123 * @count: length of the list
1124 * @cmd_details: pointer to command details structure or NULL
1125 **/
1126i40e_status i40e_aq_add_vlan(struct i40e_hw *hw, u16 seid,
1127 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1128 u8 count, struct i40e_asq_cmd_details *cmd_details)
1129{
1130 struct i40e_aq_desc desc;
1131 struct i40e_aqc_macvlan *cmd =
1132 (struct i40e_aqc_macvlan *)&desc.params.raw;
1133 i40e_status status;
1134 u16 buf_size;
1135
1136 if (count == 0 || !v_list || !hw)
1137 return I40E_ERR_PARAM;
1138
1139 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1140
1141 /* prep the rest of the request */
1142 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_vlan);
1143 cmd->num_addresses = cpu_to_le16(count);
1144 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1145 cmd->seid[1] = 0;
1146 cmd->seid[2] = 0;
1147
1148 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1149 if (buf_size > I40E_AQ_LARGE_BUF)
1150 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1151
1152 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1153 cmd_details);
1154
1155 return status;
1156}
1157
1158/**
1159 * i40e_aq_remove_vlan - Remove VLANs from the HW filtering
1160 * @hw: pointer to the hw struct
1161 * @seid: VSI for the vlan filters
1162 * @v_list: list of macvlans to be removed
1163 * @count: length of the list
1164 * @cmd_details: pointer to command details structure or NULL
1165 **/
1166i40e_status i40e_aq_remove_vlan(struct i40e_hw *hw, u16 seid,
1167 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1168 u8 count, struct i40e_asq_cmd_details *cmd_details)
1169{
1170 struct i40e_aq_desc desc;
1171 struct i40e_aqc_macvlan *cmd =
1172 (struct i40e_aqc_macvlan *)&desc.params.raw;
1173 i40e_status status;
1174 u16 buf_size;
1175
1176 if (count == 0 || !v_list || !hw)
1177 return I40E_ERR_PARAM;
1178
1179 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1180
1181 /* prep the rest of the request */
1182 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_vlan);
1183 cmd->num_addresses = cpu_to_le16(count);
1184 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1185 cmd->seid[1] = 0;
1186 cmd->seid[2] = 0;
1187
1188 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1189 if (buf_size > I40E_AQ_LARGE_BUF)
1190 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1191
1192 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1193 cmd_details);
1194
1195 return status;
1196}
1197
1198/**
1199 * i40e_aq_send_msg_to_vf
1200 * @hw: pointer to the hardware structure
1201 * @vfid: vf id to send msg
1202 * @msg: pointer to the msg buffer
1203 * @msglen: msg length
1204 * @cmd_details: pointer to command details
1205 *
1206 * send msg to vf
1207 **/
1208i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1209 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1210 struct i40e_asq_cmd_details *cmd_details)
1211{
1212 struct i40e_aq_desc desc;
1213 struct i40e_aqc_pf_vf_message *cmd =
1214 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1215 i40e_status status;
1216
1217 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1218 cmd->id = cpu_to_le32(vfid);
1219 desc.cookie_high = cpu_to_le32(v_opcode);
1220 desc.cookie_low = cpu_to_le32(v_retval);
1221 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1222 if (msglen) {
1223 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1224 I40E_AQ_FLAG_RD));
1225 if (msglen > I40E_AQ_LARGE_BUF)
1226 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1227 desc.datalen = cpu_to_le16(msglen);
1228 }
1229 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1230
1231 return status;
1232}
1233
1234/**
1235 * i40e_aq_set_hmc_resource_profile
1236 * @hw: pointer to the hw struct
1237 * @profile: type of profile the HMC is to be set as
1238 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1239 * @cmd_details: pointer to command details structure or NULL
1240 *
1241 * set the HMC profile of the device.
1242 **/
1243i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1244 enum i40e_aq_hmc_profile profile,
1245 u8 pe_vf_enabled_count,
1246 struct i40e_asq_cmd_details *cmd_details)
1247{
1248 struct i40e_aq_desc desc;
1249 struct i40e_aq_get_set_hmc_resource_profile *cmd =
1250 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1251 i40e_status status;
1252
1253 i40e_fill_default_direct_cmd_desc(&desc,
1254 i40e_aqc_opc_set_hmc_resource_profile);
1255
1256 cmd->pm_profile = (u8)profile;
1257 cmd->pe_vf_enabled = pe_vf_enabled_count;
1258
1259 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1260
1261 return status;
1262}
1263
1264/**
1265 * i40e_aq_request_resource
1266 * @hw: pointer to the hw struct
1267 * @resource: resource id
1268 * @access: access type
1269 * @sdp_number: resource number
1270 * @timeout: the maximum time in ms that the driver may hold the resource
1271 * @cmd_details: pointer to command details structure or NULL
1272 *
1273 * requests common resource using the admin queue commands
1274 **/
1275i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1276 enum i40e_aq_resources_ids resource,
1277 enum i40e_aq_resource_access_type access,
1278 u8 sdp_number, u64 *timeout,
1279 struct i40e_asq_cmd_details *cmd_details)
1280{
1281 struct i40e_aq_desc desc;
1282 struct i40e_aqc_request_resource *cmd_resp =
1283 (struct i40e_aqc_request_resource *)&desc.params.raw;
1284 i40e_status status;
1285
1286 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1287
1288 cmd_resp->resource_id = cpu_to_le16(resource);
1289 cmd_resp->access_type = cpu_to_le16(access);
1290 cmd_resp->resource_number = cpu_to_le32(sdp_number);
1291
1292 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1293 /* The completion specifies the maximum time in ms that the driver
1294 * may hold the resource in the Timeout field.
1295 * If the resource is held by someone else, the command completes with
1296 * busy return value and the timeout field indicates the maximum time
1297 * the current owner of the resource has to free it.
1298 */
1299 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1300 *timeout = le32_to_cpu(cmd_resp->timeout);
1301
1302 return status;
1303}
1304
1305/**
1306 * i40e_aq_release_resource
1307 * @hw: pointer to the hw struct
1308 * @resource: resource id
1309 * @sdp_number: resource number
1310 * @cmd_details: pointer to command details structure or NULL
1311 *
1312 * release common resource using the admin queue commands
1313 **/
1314i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1315 enum i40e_aq_resources_ids resource,
1316 u8 sdp_number,
1317 struct i40e_asq_cmd_details *cmd_details)
1318{
1319 struct i40e_aq_desc desc;
1320 struct i40e_aqc_request_resource *cmd =
1321 (struct i40e_aqc_request_resource *)&desc.params.raw;
1322 i40e_status status;
1323
1324 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1325
1326 cmd->resource_id = cpu_to_le16(resource);
1327 cmd->resource_number = cpu_to_le32(sdp_number);
1328
1329 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1330
1331 return status;
1332}
1333
1334/**
1335 * i40e_aq_read_nvm
1336 * @hw: pointer to the hw struct
1337 * @module_pointer: module pointer location in words from the NVM beginning
1338 * @offset: byte offset from the module beginning
1339 * @length: length of the section to be read (in bytes from the offset)
1340 * @data: command buffer (size [bytes] = length)
1341 * @last_command: tells if this is the last command in a series
1342 * @cmd_details: pointer to command details structure or NULL
1343 *
1344 * Read the NVM using the admin queue commands
1345 **/
1346i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1347 u32 offset, u16 length, void *data,
1348 bool last_command,
1349 struct i40e_asq_cmd_details *cmd_details)
1350{
1351 struct i40e_aq_desc desc;
1352 struct i40e_aqc_nvm_update *cmd =
1353 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1354 i40e_status status;
1355
1356 /* In offset the highest byte must be zeroed. */
1357 if (offset & 0xFF000000) {
1358 status = I40E_ERR_PARAM;
1359 goto i40e_aq_read_nvm_exit;
1360 }
1361
1362 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1363
1364 /* If this is the last command in a series, set the proper flag. */
1365 if (last_command)
1366 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1367 cmd->module_pointer = module_pointer;
1368 cmd->offset = cpu_to_le32(offset);
1369 cmd->length = cpu_to_le16(length);
1370
1371 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1372 if (length > I40E_AQ_LARGE_BUF)
1373 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1374
1375 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1376
1377i40e_aq_read_nvm_exit:
1378 return status;
1379}
1380
1381#define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1382#define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1383#define I40E_DEV_FUNC_CAP_NPAR 0x03
1384#define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1385#define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1386#define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1387#define I40E_DEV_FUNC_CAP_VF 0x13
1388#define I40E_DEV_FUNC_CAP_VMDQ 0x14
1389#define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1390#define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1391#define I40E_DEV_FUNC_CAP_VSI 0x17
1392#define I40E_DEV_FUNC_CAP_DCB 0x18
1393#define I40E_DEV_FUNC_CAP_FCOE 0x21
1394#define I40E_DEV_FUNC_CAP_RSS 0x40
1395#define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1396#define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1397#define I40E_DEV_FUNC_CAP_MSIX 0x43
1398#define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1399#define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1400#define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1401#define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1402#define I40E_DEV_FUNC_CAP_CEM 0xF2
1403#define I40E_DEV_FUNC_CAP_IWARP 0x51
1404#define I40E_DEV_FUNC_CAP_LED 0x61
1405#define I40E_DEV_FUNC_CAP_SDP 0x62
1406#define I40E_DEV_FUNC_CAP_MDIO 0x63
1407
1408/**
1409 * i40e_parse_discover_capabilities
1410 * @hw: pointer to the hw struct
1411 * @buff: pointer to a buffer containing device/function capability records
1412 * @cap_count: number of capability records in the list
1413 * @list_type_opc: type of capabilities list to parse
1414 *
1415 * Parse the device/function capabilities list.
1416 **/
1417static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1418 u32 cap_count,
1419 enum i40e_admin_queue_opc list_type_opc)
1420{
1421 struct i40e_aqc_list_capabilities_element_resp *cap;
1422 u32 number, logical_id, phys_id;
1423 struct i40e_hw_capabilities *p;
1424 u32 reg_val;
1425 u32 i = 0;
1426 u16 id;
1427
1428 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1429
1430 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1431 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1432 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1433 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1434 else
1435 return;
1436
1437 for (i = 0; i < cap_count; i++, cap++) {
1438 id = le16_to_cpu(cap->id);
1439 number = le32_to_cpu(cap->number);
1440 logical_id = le32_to_cpu(cap->logical_id);
1441 phys_id = le32_to_cpu(cap->phys_id);
1442
1443 switch (id) {
1444 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1445 p->switch_mode = number;
1446 break;
1447 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1448 p->management_mode = number;
1449 break;
1450 case I40E_DEV_FUNC_CAP_NPAR:
1451 p->npar_enable = number;
1452 break;
1453 case I40E_DEV_FUNC_CAP_OS2BMC:
1454 p->os2bmc = number;
1455 break;
1456 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1457 p->valid_functions = number;
1458 break;
1459 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1460 if (number == 1)
1461 p->sr_iov_1_1 = true;
1462 break;
1463 case I40E_DEV_FUNC_CAP_VF:
1464 p->num_vfs = number;
1465 p->vf_base_id = logical_id;
1466 break;
1467 case I40E_DEV_FUNC_CAP_VMDQ:
1468 if (number == 1)
1469 p->vmdq = true;
1470 break;
1471 case I40E_DEV_FUNC_CAP_802_1_QBG:
1472 if (number == 1)
1473 p->evb_802_1_qbg = true;
1474 break;
1475 case I40E_DEV_FUNC_CAP_802_1_QBH:
1476 if (number == 1)
1477 p->evb_802_1_qbh = true;
1478 break;
1479 case I40E_DEV_FUNC_CAP_VSI:
1480 p->num_vsis = number;
1481 break;
1482 case I40E_DEV_FUNC_CAP_DCB:
1483 if (number == 1) {
1484 p->dcb = true;
1485 p->enabled_tcmap = logical_id;
1486 p->maxtc = phys_id;
1487 }
1488 break;
1489 case I40E_DEV_FUNC_CAP_FCOE:
1490 if (number == 1)
1491 p->fcoe = true;
1492 break;
1493 case I40E_DEV_FUNC_CAP_RSS:
1494 p->rss = true;
1495 reg_val = rd32(hw, I40E_PFQF_CTL_0);
1496 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1497 p->rss_table_size = number;
1498 else
1499 p->rss_table_size = 128;
1500 p->rss_table_entry_width = logical_id;
1501 break;
1502 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1503 p->num_rx_qp = number;
1504 p->base_queue = phys_id;
1505 break;
1506 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1507 p->num_tx_qp = number;
1508 p->base_queue = phys_id;
1509 break;
1510 case I40E_DEV_FUNC_CAP_MSIX:
1511 p->num_msix_vectors = number;
1512 break;
1513 case I40E_DEV_FUNC_CAP_MSIX_VF:
1514 p->num_msix_vectors_vf = number;
1515 break;
1516 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1517 if (number == 1)
1518 p->mfp_mode_1 = true;
1519 break;
1520 case I40E_DEV_FUNC_CAP_CEM:
1521 if (number == 1)
1522 p->mgmt_cem = true;
1523 break;
1524 case I40E_DEV_FUNC_CAP_IWARP:
1525 if (number == 1)
1526 p->iwarp = true;
1527 break;
1528 case I40E_DEV_FUNC_CAP_LED:
1529 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1530 p->led[phys_id] = true;
1531 break;
1532 case I40E_DEV_FUNC_CAP_SDP:
1533 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1534 p->sdp[phys_id] = true;
1535 break;
1536 case I40E_DEV_FUNC_CAP_MDIO:
1537 if (number == 1) {
1538 p->mdio_port_num = phys_id;
1539 p->mdio_port_mode = logical_id;
1540 }
1541 break;
1542 case I40E_DEV_FUNC_CAP_IEEE_1588:
1543 if (number == 1)
1544 p->ieee_1588 = true;
1545 break;
1546 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1547 p->fd = true;
1548 p->fd_filters_guaranteed = number;
1549 p->fd_filters_best_effort = logical_id;
1550 break;
1551 default:
1552 break;
1553 }
1554 }
1555
1556 /* additional HW specific goodies that might
1557 * someday be HW version specific
1558 */
1559 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1560}
1561
1562/**
1563 * i40e_aq_discover_capabilities
1564 * @hw: pointer to the hw struct
1565 * @buff: a virtual buffer to hold the capabilities
1566 * @buff_size: Size of the virtual buffer
1567 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1568 * @list_type_opc: capabilities type to discover - pass in the command opcode
1569 * @cmd_details: pointer to command details structure or NULL
1570 *
1571 * Get the device capabilities descriptions from the firmware
1572 **/
1573i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1574 void *buff, u16 buff_size, u16 *data_size,
1575 enum i40e_admin_queue_opc list_type_opc,
1576 struct i40e_asq_cmd_details *cmd_details)
1577{
1578 struct i40e_aqc_list_capabilites *cmd;
1579 i40e_status status = 0;
1580 struct i40e_aq_desc desc;
1581
1582 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1583
1584 if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1585 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1586 status = I40E_ERR_PARAM;
1587 goto exit;
1588 }
1589
1590 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1591
1592 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1593 if (buff_size > I40E_AQ_LARGE_BUF)
1594 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1595
1596 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1597 *data_size = le16_to_cpu(desc.datalen);
1598
1599 if (status)
1600 goto exit;
1601
1602 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1603 list_type_opc);
1604
1605exit:
1606 return status;
1607}
1608
1609/**
1610 * i40e_aq_get_lldp_mib
1611 * @hw: pointer to the hw struct
1612 * @bridge_type: type of bridge requested
1613 * @mib_type: Local, Remote or both Local and Remote MIBs
1614 * @buff: pointer to a user supplied buffer to store the MIB block
1615 * @buff_size: size of the buffer (in bytes)
1616 * @local_len : length of the returned Local LLDP MIB
1617 * @remote_len: length of the returned Remote LLDP MIB
1618 * @cmd_details: pointer to command details structure or NULL
1619 *
1620 * Requests the complete LLDP MIB (entire packet).
1621 **/
1622i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1623 u8 mib_type, void *buff, u16 buff_size,
1624 u16 *local_len, u16 *remote_len,
1625 struct i40e_asq_cmd_details *cmd_details)
1626{
1627 struct i40e_aq_desc desc;
1628 struct i40e_aqc_lldp_get_mib *cmd =
1629 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1630 struct i40e_aqc_lldp_get_mib *resp =
1631 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1632 i40e_status status;
1633
1634 if (buff_size == 0 || !buff)
1635 return I40E_ERR_PARAM;
1636
1637 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1638 /* Indirect Command */
1639 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1640
1641 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1642 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1643 I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1644
1645 desc.datalen = cpu_to_le16(buff_size);
1646
1647 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1648 if (buff_size > I40E_AQ_LARGE_BUF)
1649 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1650
1651 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1652 if (!status) {
1653 if (local_len != NULL)
1654 *local_len = le16_to_cpu(resp->local_len);
1655 if (remote_len != NULL)
1656 *remote_len = le16_to_cpu(resp->remote_len);
1657 }
1658
1659 return status;
1660}
1661
1662/**
1663 * i40e_aq_cfg_lldp_mib_change_event
1664 * @hw: pointer to the hw struct
1665 * @enable_update: Enable or Disable event posting
1666 * @cmd_details: pointer to command details structure or NULL
1667 *
1668 * Enable or Disable posting of an event on ARQ when LLDP MIB
1669 * associated with the interface changes
1670 **/
1671i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1672 bool enable_update,
1673 struct i40e_asq_cmd_details *cmd_details)
1674{
1675 struct i40e_aq_desc desc;
1676 struct i40e_aqc_lldp_update_mib *cmd =
1677 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1678 i40e_status status;
1679
1680 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1681
1682 if (!enable_update)
1683 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1684
1685 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1686
1687 return status;
1688}
1689
1690/**
1691 * i40e_aq_stop_lldp
1692 * @hw: pointer to the hw struct
1693 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1694 * @cmd_details: pointer to command details structure or NULL
1695 *
1696 * Stop or Shutdown the embedded LLDP Agent
1697 **/
1698i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1699 struct i40e_asq_cmd_details *cmd_details)
1700{
1701 struct i40e_aq_desc desc;
1702 struct i40e_aqc_lldp_stop *cmd =
1703 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1704 i40e_status status;
1705
1706 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1707
1708 if (shutdown_agent)
1709 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1710
1711 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1712
1713 return status;
1714}
1715
1716/**
1717 * i40e_aq_start_lldp
1718 * @hw: pointer to the hw struct
1719 * @cmd_details: pointer to command details structure or NULL
1720 *
1721 * Start the embedded LLDP Agent on all ports.
1722 **/
1723i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1724 struct i40e_asq_cmd_details *cmd_details)
1725{
1726 struct i40e_aq_desc desc;
1727 struct i40e_aqc_lldp_start *cmd =
1728 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1729 i40e_status status;
1730
1731 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1732
1733 cmd->command = I40E_AQ_LLDP_AGENT_START;
1734
1735 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1736
1737 return status;
1738}
1739
1740/**
1741 * i40e_aq_delete_element - Delete switch element
1742 * @hw: pointer to the hw struct
1743 * @seid: the SEID to delete from the switch
1744 * @cmd_details: pointer to command details structure or NULL
1745 *
1746 * This deletes a switch element from the switch.
1747 **/
1748i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1749 struct i40e_asq_cmd_details *cmd_details)
1750{
1751 struct i40e_aq_desc desc;
1752 struct i40e_aqc_switch_seid *cmd =
1753 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1754 i40e_status status;
1755
1756 if (seid == 0)
1757 return I40E_ERR_PARAM;
1758
1759 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1760
1761 cmd->seid = cpu_to_le16(seid);
1762
1763 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1764
1765 return status;
1766}
1767
1768/**
1769 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1770 * @hw: pointer to the hw struct
1771 * @seid: seid for the physical port/switching component/vsi
1772 * @buff: Indirect buffer to hold data parameters and response
1773 * @buff_size: Indirect buffer size
1774 * @opcode: Tx scheduler AQ command opcode
1775 * @cmd_details: pointer to command details structure or NULL
1776 *
1777 * Generic command handler for Tx scheduler AQ commands
1778 **/
1779static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1780 void *buff, u16 buff_size,
1781 enum i40e_admin_queue_opc opcode,
1782 struct i40e_asq_cmd_details *cmd_details)
1783{
1784 struct i40e_aq_desc desc;
1785 struct i40e_aqc_tx_sched_ind *cmd =
1786 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1787 i40e_status status;
1788 bool cmd_param_flag = false;
1789
1790 switch (opcode) {
1791 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1792 case i40e_aqc_opc_configure_vsi_tc_bw:
1793 case i40e_aqc_opc_enable_switching_comp_ets:
1794 case i40e_aqc_opc_modify_switching_comp_ets:
1795 case i40e_aqc_opc_disable_switching_comp_ets:
1796 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1797 case i40e_aqc_opc_configure_switching_comp_bw_config:
1798 cmd_param_flag = true;
1799 break;
1800 case i40e_aqc_opc_query_vsi_bw_config:
1801 case i40e_aqc_opc_query_vsi_ets_sla_config:
1802 case i40e_aqc_opc_query_switching_comp_ets_config:
1803 case i40e_aqc_opc_query_port_ets_config:
1804 case i40e_aqc_opc_query_switching_comp_bw_config:
1805 cmd_param_flag = false;
1806 break;
1807 default:
1808 return I40E_ERR_PARAM;
1809 }
1810
1811 i40e_fill_default_direct_cmd_desc(&desc, opcode);
1812
1813 /* Indirect command */
1814 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1815 if (cmd_param_flag)
1816 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1817 if (buff_size > I40E_AQ_LARGE_BUF)
1818 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1819
1820 desc.datalen = cpu_to_le16(buff_size);
1821
1822 cmd->vsi_seid = cpu_to_le16(seid);
1823
1824 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1825
1826 return status;
1827}
1828
1829/**
1830 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1831 * @hw: pointer to the hw struct
1832 * @seid: VSI seid
1833 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1834 * @cmd_details: pointer to command details structure or NULL
1835 **/
1836i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1837 u16 seid,
1838 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1839 struct i40e_asq_cmd_details *cmd_details)
1840{
1841 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1842 i40e_aqc_opc_configure_vsi_tc_bw,
1843 cmd_details);
1844}
1845
1846/**
1847 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1848 * @hw: pointer to the hw struct
1849 * @seid: seid of the VSI
1850 * @bw_data: Buffer to hold VSI BW configuration
1851 * @cmd_details: pointer to command details structure or NULL
1852 **/
1853i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1854 u16 seid,
1855 struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1856 struct i40e_asq_cmd_details *cmd_details)
1857{
1858 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1859 i40e_aqc_opc_query_vsi_bw_config,
1860 cmd_details);
1861}
1862
1863/**
1864 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1865 * @hw: pointer to the hw struct
1866 * @seid: seid of the VSI
1867 * @bw_data: Buffer to hold VSI BW configuration per TC
1868 * @cmd_details: pointer to command details structure or NULL
1869 **/
1870i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1871 u16 seid,
1872 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1873 struct i40e_asq_cmd_details *cmd_details)
1874{
1875 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1876 i40e_aqc_opc_query_vsi_ets_sla_config,
1877 cmd_details);
1878}
1879
1880/**
1881 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1882 * @hw: pointer to the hw struct
1883 * @seid: seid of the switching component
1884 * @bw_data: Buffer to hold switching component's per TC BW config
1885 * @cmd_details: pointer to command details structure or NULL
1886 **/
1887i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1888 u16 seid,
1889 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1890 struct i40e_asq_cmd_details *cmd_details)
1891{
1892 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1893 i40e_aqc_opc_query_switching_comp_ets_config,
1894 cmd_details);
1895}
1896
1897/**
1898 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1899 * @hw: pointer to the hw struct
1900 * @seid: seid of the VSI or switching component connected to Physical Port
1901 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1902 * @cmd_details: pointer to command details structure or NULL
1903 **/
1904i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1905 u16 seid,
1906 struct i40e_aqc_query_port_ets_config_resp *bw_data,
1907 struct i40e_asq_cmd_details *cmd_details)
1908{
1909 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1910 i40e_aqc_opc_query_port_ets_config,
1911 cmd_details);
1912}
1913
1914/**
1915 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1916 * @hw: pointer to the hw struct
1917 * @seid: seid of the switching component
1918 * @bw_data: Buffer to hold switching component's BW configuration
1919 * @cmd_details: pointer to command details structure or NULL
1920 **/
1921i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1922 u16 seid,
1923 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1924 struct i40e_asq_cmd_details *cmd_details)
1925{
1926 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1927 i40e_aqc_opc_query_switching_comp_bw_config,
1928 cmd_details);
1929}
1930
1931/**
1932 * i40e_validate_filter_settings
1933 * @hw: pointer to the hardware structure
1934 * @settings: Filter control settings
1935 *
1936 * Check and validate the filter control settings passed.
1937 * The function checks for the valid filter/context sizes being
1938 * passed for FCoE and PE.
1939 *
1940 * Returns 0 if the values passed are valid and within
1941 * range else returns an error.
1942 **/
1943static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1944 struct i40e_filter_control_settings *settings)
1945{
1946 u32 fcoe_cntx_size, fcoe_filt_size;
1947 u32 pe_cntx_size, pe_filt_size;
1948 u32 fcoe_fmax, pe_fmax;
1949 u32 val;
1950
1951 /* Validate FCoE settings passed */
1952 switch (settings->fcoe_filt_num) {
1953 case I40E_HASH_FILTER_SIZE_1K:
1954 case I40E_HASH_FILTER_SIZE_2K:
1955 case I40E_HASH_FILTER_SIZE_4K:
1956 case I40E_HASH_FILTER_SIZE_8K:
1957 case I40E_HASH_FILTER_SIZE_16K:
1958 case I40E_HASH_FILTER_SIZE_32K:
1959 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1960 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
1961 break;
1962 default:
1963 return I40E_ERR_PARAM;
1964 }
1965
1966 switch (settings->fcoe_cntx_num) {
1967 case I40E_DMA_CNTX_SIZE_512:
1968 case I40E_DMA_CNTX_SIZE_1K:
1969 case I40E_DMA_CNTX_SIZE_2K:
1970 case I40E_DMA_CNTX_SIZE_4K:
1971 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1972 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
1973 break;
1974 default:
1975 return I40E_ERR_PARAM;
1976 }
1977
1978 /* Validate PE settings passed */
1979 switch (settings->pe_filt_num) {
1980 case I40E_HASH_FILTER_SIZE_1K:
1981 case I40E_HASH_FILTER_SIZE_2K:
1982 case I40E_HASH_FILTER_SIZE_4K:
1983 case I40E_HASH_FILTER_SIZE_8K:
1984 case I40E_HASH_FILTER_SIZE_16K:
1985 case I40E_HASH_FILTER_SIZE_32K:
1986 case I40E_HASH_FILTER_SIZE_64K:
1987 case I40E_HASH_FILTER_SIZE_128K:
1988 case I40E_HASH_FILTER_SIZE_256K:
1989 case I40E_HASH_FILTER_SIZE_512K:
1990 case I40E_HASH_FILTER_SIZE_1M:
1991 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1992 pe_filt_size <<= (u32)settings->pe_filt_num;
1993 break;
1994 default:
1995 return I40E_ERR_PARAM;
1996 }
1997
1998 switch (settings->pe_cntx_num) {
1999 case I40E_DMA_CNTX_SIZE_512:
2000 case I40E_DMA_CNTX_SIZE_1K:
2001 case I40E_DMA_CNTX_SIZE_2K:
2002 case I40E_DMA_CNTX_SIZE_4K:
2003 case I40E_DMA_CNTX_SIZE_8K:
2004 case I40E_DMA_CNTX_SIZE_16K:
2005 case I40E_DMA_CNTX_SIZE_32K:
2006 case I40E_DMA_CNTX_SIZE_64K:
2007 case I40E_DMA_CNTX_SIZE_128K:
2008 case I40E_DMA_CNTX_SIZE_256K:
2009 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
2010 pe_cntx_size <<= (u32)settings->pe_cntx_num;
2011 break;
2012 default:
2013 return I40E_ERR_PARAM;
2014 }
2015
2016 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
2017 val = rd32(hw, I40E_GLHMC_FCOEFMAX);
2018 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
2019 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
2020 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
2021 return I40E_ERR_INVALID_SIZE;
2022
2023 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
2024 val = rd32(hw, I40E_GLHMC_PEXFMAX);
2025 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
2026 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
2027 if (pe_filt_size + pe_cntx_size > pe_fmax)
2028 return I40E_ERR_INVALID_SIZE;
2029
2030 return 0;
2031}
2032
2033/**
2034 * i40e_set_filter_control
2035 * @hw: pointer to the hardware structure
2036 * @settings: Filter control settings
2037 *
2038 * Set the Queue Filters for PE/FCoE and enable filters required
2039 * for a single PF. It is expected that these settings are programmed
2040 * at the driver initialization time.
2041 **/
2042i40e_status i40e_set_filter_control(struct i40e_hw *hw,
2043 struct i40e_filter_control_settings *settings)
2044{
2045 i40e_status ret = 0;
2046 u32 hash_lut_size = 0;
2047 u32 val;
2048
2049 if (!settings)
2050 return I40E_ERR_PARAM;
2051
2052 /* Validate the input settings */
2053 ret = i40e_validate_filter_settings(hw, settings);
2054 if (ret)
2055 return ret;
2056
2057 /* Read the PF Queue Filter control register */
2058 val = rd32(hw, I40E_PFQF_CTL_0);
2059
2060 /* Program required PE hash buckets for the PF */
2061 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2062 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2063 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2064 /* Program required PE contexts for the PF */
2065 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2066 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2067 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2068
2069 /* Program required FCoE hash buckets for the PF */
2070 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2071 val |= ((u32)settings->fcoe_filt_num <<
2072 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2073 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2074 /* Program required FCoE DDP contexts for the PF */
2075 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2076 val |= ((u32)settings->fcoe_cntx_num <<
2077 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2078 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2079
2080 /* Program Hash LUT size for the PF */
2081 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2082 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2083 hash_lut_size = 1;
2084 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2085 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2086
2087 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2088 if (settings->enable_fdir)
2089 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2090 if (settings->enable_ethtype)
2091 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2092 if (settings->enable_macvlan)
2093 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2094
2095 wr32(hw, I40E_PFQF_CTL_0, val);
2096
2097 return 0;
2098}
Linux kernel - Deliverables
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