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41c445ff JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
4 | * Copyright(c) 2013 Intel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | * | |
19 | * The full GNU General Public License is included in this distribution in | |
20 | * the file called "COPYING". | |
21 | * | |
22 | * Contact Information: | |
23 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | * | |
26 | ******************************************************************************/ | |
27 | ||
28 | /* Local includes */ | |
29 | #include "i40e.h" | |
30 | ||
31 | const char i40e_driver_name[] = "i40e"; | |
32 | static const char i40e_driver_string[] = | |
33 | "Intel(R) Ethernet Connection XL710 Network Driver"; | |
34 | ||
35 | #define DRV_KERN "-k" | |
36 | ||
37 | #define DRV_VERSION_MAJOR 0 | |
38 | #define DRV_VERSION_MINOR 3 | |
39 | #define DRV_VERSION_BUILD 9 | |
40 | #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ | |
41 | __stringify(DRV_VERSION_MINOR) "." \ | |
42 | __stringify(DRV_VERSION_BUILD) DRV_KERN | |
43 | const char i40e_driver_version_str[] = DRV_VERSION; | |
44 | static const char i40e_copyright[] = "Copyright (c) 2013 Intel Corporation."; | |
45 | ||
46 | /* a bit of forward declarations */ | |
47 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); | |
48 | static void i40e_handle_reset_warning(struct i40e_pf *pf); | |
49 | static int i40e_add_vsi(struct i40e_vsi *vsi); | |
50 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); | |
51 | static int i40e_setup_pf_switch(struct i40e_pf *pf); | |
52 | static int i40e_setup_misc_vector(struct i40e_pf *pf); | |
53 | static void i40e_determine_queue_usage(struct i40e_pf *pf); | |
54 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf); | |
55 | ||
56 | /* i40e_pci_tbl - PCI Device ID Table | |
57 | * | |
58 | * Last entry must be all 0s | |
59 | * | |
60 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
61 | * Class, Class Mask, private data (not used) } | |
62 | */ | |
63 | static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = { | |
64 | {PCI_VDEVICE(INTEL, I40E_SFP_XL710_DEVICE_ID), 0}, | |
65 | {PCI_VDEVICE(INTEL, I40E_SFP_X710_DEVICE_ID), 0}, | |
66 | {PCI_VDEVICE(INTEL, I40E_QEMU_DEVICE_ID), 0}, | |
67 | {PCI_VDEVICE(INTEL, I40E_KX_A_DEVICE_ID), 0}, | |
68 | {PCI_VDEVICE(INTEL, I40E_KX_B_DEVICE_ID), 0}, | |
69 | {PCI_VDEVICE(INTEL, I40E_KX_C_DEVICE_ID), 0}, | |
70 | {PCI_VDEVICE(INTEL, I40E_KX_D_DEVICE_ID), 0}, | |
71 | {PCI_VDEVICE(INTEL, I40E_QSFP_A_DEVICE_ID), 0}, | |
72 | {PCI_VDEVICE(INTEL, I40E_QSFP_B_DEVICE_ID), 0}, | |
73 | {PCI_VDEVICE(INTEL, I40E_QSFP_C_DEVICE_ID), 0}, | |
74 | /* required last entry */ | |
75 | {0, } | |
76 | }; | |
77 | MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); | |
78 | ||
79 | #define I40E_MAX_VF_COUNT 128 | |
80 | static int debug = -1; | |
81 | module_param(debug, int, 0); | |
82 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
83 | ||
84 | MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); | |
85 | MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); | |
86 | MODULE_LICENSE("GPL"); | |
87 | MODULE_VERSION(DRV_VERSION); | |
88 | ||
89 | /** | |
90 | * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code | |
91 | * @hw: pointer to the HW structure | |
92 | * @mem: ptr to mem struct to fill out | |
93 | * @size: size of memory requested | |
94 | * @alignment: what to align the allocation to | |
95 | **/ | |
96 | int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, | |
97 | u64 size, u32 alignment) | |
98 | { | |
99 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
100 | ||
101 | mem->size = ALIGN(size, alignment); | |
102 | mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, | |
103 | &mem->pa, GFP_KERNEL); | |
93bc73b8 JB |
104 | if (!mem->va) |
105 | return -ENOMEM; | |
41c445ff | 106 | |
93bc73b8 | 107 | return 0; |
41c445ff JB |
108 | } |
109 | ||
110 | /** | |
111 | * i40e_free_dma_mem_d - OS specific memory free for shared code | |
112 | * @hw: pointer to the HW structure | |
113 | * @mem: ptr to mem struct to free | |
114 | **/ | |
115 | int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) | |
116 | { | |
117 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
118 | ||
119 | dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); | |
120 | mem->va = NULL; | |
121 | mem->pa = 0; | |
122 | mem->size = 0; | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | /** | |
128 | * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code | |
129 | * @hw: pointer to the HW structure | |
130 | * @mem: ptr to mem struct to fill out | |
131 | * @size: size of memory requested | |
132 | **/ | |
133 | int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, | |
134 | u32 size) | |
135 | { | |
136 | mem->size = size; | |
137 | mem->va = kzalloc(size, GFP_KERNEL); | |
138 | ||
93bc73b8 JB |
139 | if (!mem->va) |
140 | return -ENOMEM; | |
41c445ff | 141 | |
93bc73b8 | 142 | return 0; |
41c445ff JB |
143 | } |
144 | ||
145 | /** | |
146 | * i40e_free_virt_mem_d - OS specific memory free for shared code | |
147 | * @hw: pointer to the HW structure | |
148 | * @mem: ptr to mem struct to free | |
149 | **/ | |
150 | int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) | |
151 | { | |
152 | /* it's ok to kfree a NULL pointer */ | |
153 | kfree(mem->va); | |
154 | mem->va = NULL; | |
155 | mem->size = 0; | |
156 | ||
157 | return 0; | |
158 | } | |
159 | ||
160 | /** | |
161 | * i40e_get_lump - find a lump of free generic resource | |
162 | * @pf: board private structure | |
163 | * @pile: the pile of resource to search | |
164 | * @needed: the number of items needed | |
165 | * @id: an owner id to stick on the items assigned | |
166 | * | |
167 | * Returns the base item index of the lump, or negative for error | |
168 | * | |
169 | * The search_hint trick and lack of advanced fit-finding only work | |
170 | * because we're highly likely to have all the same size lump requests. | |
171 | * Linear search time and any fragmentation should be minimal. | |
172 | **/ | |
173 | static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, | |
174 | u16 needed, u16 id) | |
175 | { | |
176 | int ret = -ENOMEM; | |
ddf434ac | 177 | int i, j; |
41c445ff JB |
178 | |
179 | if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { | |
180 | dev_info(&pf->pdev->dev, | |
181 | "param err: pile=%p needed=%d id=0x%04x\n", | |
182 | pile, needed, id); | |
183 | return -EINVAL; | |
184 | } | |
185 | ||
186 | /* start the linear search with an imperfect hint */ | |
187 | i = pile->search_hint; | |
ddf434ac | 188 | while (i < pile->num_entries) { |
41c445ff JB |
189 | /* skip already allocated entries */ |
190 | if (pile->list[i] & I40E_PILE_VALID_BIT) { | |
191 | i++; | |
192 | continue; | |
193 | } | |
194 | ||
195 | /* do we have enough in this lump? */ | |
196 | for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { | |
197 | if (pile->list[i+j] & I40E_PILE_VALID_BIT) | |
198 | break; | |
199 | } | |
200 | ||
201 | if (j == needed) { | |
202 | /* there was enough, so assign it to the requestor */ | |
203 | for (j = 0; j < needed; j++) | |
204 | pile->list[i+j] = id | I40E_PILE_VALID_BIT; | |
205 | ret = i; | |
206 | pile->search_hint = i + j; | |
ddf434ac | 207 | break; |
41c445ff JB |
208 | } else { |
209 | /* not enough, so skip over it and continue looking */ | |
210 | i += j; | |
211 | } | |
212 | } | |
213 | ||
214 | return ret; | |
215 | } | |
216 | ||
217 | /** | |
218 | * i40e_put_lump - return a lump of generic resource | |
219 | * @pile: the pile of resource to search | |
220 | * @index: the base item index | |
221 | * @id: the owner id of the items assigned | |
222 | * | |
223 | * Returns the count of items in the lump | |
224 | **/ | |
225 | static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) | |
226 | { | |
227 | int valid_id = (id | I40E_PILE_VALID_BIT); | |
228 | int count = 0; | |
229 | int i; | |
230 | ||
231 | if (!pile || index >= pile->num_entries) | |
232 | return -EINVAL; | |
233 | ||
234 | for (i = index; | |
235 | i < pile->num_entries && pile->list[i] == valid_id; | |
236 | i++) { | |
237 | pile->list[i] = 0; | |
238 | count++; | |
239 | } | |
240 | ||
241 | if (count && index < pile->search_hint) | |
242 | pile->search_hint = index; | |
243 | ||
244 | return count; | |
245 | } | |
246 | ||
247 | /** | |
248 | * i40e_service_event_schedule - Schedule the service task to wake up | |
249 | * @pf: board private structure | |
250 | * | |
251 | * If not already scheduled, this puts the task into the work queue | |
252 | **/ | |
253 | static void i40e_service_event_schedule(struct i40e_pf *pf) | |
254 | { | |
255 | if (!test_bit(__I40E_DOWN, &pf->state) && | |
256 | !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && | |
257 | !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) | |
258 | schedule_work(&pf->service_task); | |
259 | } | |
260 | ||
261 | /** | |
262 | * i40e_tx_timeout - Respond to a Tx Hang | |
263 | * @netdev: network interface device structure | |
264 | * | |
265 | * If any port has noticed a Tx timeout, it is likely that the whole | |
266 | * device is munged, not just the one netdev port, so go for the full | |
267 | * reset. | |
268 | **/ | |
269 | static void i40e_tx_timeout(struct net_device *netdev) | |
270 | { | |
271 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
272 | struct i40e_vsi *vsi = np->vsi; | |
273 | struct i40e_pf *pf = vsi->back; | |
274 | ||
275 | pf->tx_timeout_count++; | |
276 | ||
277 | if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) | |
278 | pf->tx_timeout_recovery_level = 0; | |
279 | pf->tx_timeout_last_recovery = jiffies; | |
280 | netdev_info(netdev, "tx_timeout recovery level %d\n", | |
281 | pf->tx_timeout_recovery_level); | |
282 | ||
283 | switch (pf->tx_timeout_recovery_level) { | |
284 | case 0: | |
285 | /* disable and re-enable queues for the VSI */ | |
286 | if (in_interrupt()) { | |
287 | set_bit(__I40E_REINIT_REQUESTED, &pf->state); | |
288 | set_bit(__I40E_REINIT_REQUESTED, &vsi->state); | |
289 | } else { | |
290 | i40e_vsi_reinit_locked(vsi); | |
291 | } | |
292 | break; | |
293 | case 1: | |
294 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
295 | break; | |
296 | case 2: | |
297 | set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); | |
298 | break; | |
299 | case 3: | |
300 | set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); | |
301 | break; | |
302 | default: | |
303 | netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); | |
304 | i40e_down(vsi); | |
305 | break; | |
306 | } | |
307 | i40e_service_event_schedule(pf); | |
308 | pf->tx_timeout_recovery_level++; | |
309 | } | |
310 | ||
311 | /** | |
312 | * i40e_release_rx_desc - Store the new tail and head values | |
313 | * @rx_ring: ring to bump | |
314 | * @val: new head index | |
315 | **/ | |
316 | static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val) | |
317 | { | |
318 | rx_ring->next_to_use = val; | |
319 | ||
320 | /* Force memory writes to complete before letting h/w | |
321 | * know there are new descriptors to fetch. (Only | |
322 | * applicable for weak-ordered memory model archs, | |
323 | * such as IA-64). | |
324 | */ | |
325 | wmb(); | |
326 | writel(val, rx_ring->tail); | |
327 | } | |
328 | ||
329 | /** | |
330 | * i40e_get_vsi_stats_struct - Get System Network Statistics | |
331 | * @vsi: the VSI we care about | |
332 | * | |
333 | * Returns the address of the device statistics structure. | |
334 | * The statistics are actually updated from the service task. | |
335 | **/ | |
336 | struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) | |
337 | { | |
338 | return &vsi->net_stats; | |
339 | } | |
340 | ||
341 | /** | |
342 | * i40e_get_netdev_stats_struct - Get statistics for netdev interface | |
343 | * @netdev: network interface device structure | |
344 | * | |
345 | * Returns the address of the device statistics structure. | |
346 | * The statistics are actually updated from the service task. | |
347 | **/ | |
348 | static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( | |
349 | struct net_device *netdev, | |
350 | struct rtnl_link_stats64 *storage) | |
351 | { | |
352 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
353 | struct i40e_vsi *vsi = np->vsi; | |
354 | ||
355 | *storage = *i40e_get_vsi_stats_struct(vsi); | |
356 | ||
357 | return storage; | |
358 | } | |
359 | ||
360 | /** | |
361 | * i40e_vsi_reset_stats - Resets all stats of the given vsi | |
362 | * @vsi: the VSI to have its stats reset | |
363 | **/ | |
364 | void i40e_vsi_reset_stats(struct i40e_vsi *vsi) | |
365 | { | |
366 | struct rtnl_link_stats64 *ns; | |
367 | int i; | |
368 | ||
369 | if (!vsi) | |
370 | return; | |
371 | ||
372 | ns = i40e_get_vsi_stats_struct(vsi); | |
373 | memset(ns, 0, sizeof(*ns)); | |
374 | memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); | |
375 | memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); | |
376 | memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); | |
377 | if (vsi->rx_rings) | |
378 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
a114d0a6 AD |
379 | memset(&vsi->rx_rings[i].stats, 0 , |
380 | sizeof(vsi->rx_rings[i].stats)); | |
41c445ff JB |
381 | memset(&vsi->rx_rings[i].rx_stats, 0 , |
382 | sizeof(vsi->rx_rings[i].rx_stats)); | |
a114d0a6 AD |
383 | memset(&vsi->tx_rings[i].stats, 0 , |
384 | sizeof(vsi->tx_rings[i].stats)); | |
41c445ff JB |
385 | memset(&vsi->tx_rings[i].tx_stats, 0, |
386 | sizeof(vsi->tx_rings[i].tx_stats)); | |
387 | } | |
388 | vsi->stat_offsets_loaded = false; | |
389 | } | |
390 | ||
391 | /** | |
392 | * i40e_pf_reset_stats - Reset all of the stats for the given pf | |
393 | * @pf: the PF to be reset | |
394 | **/ | |
395 | void i40e_pf_reset_stats(struct i40e_pf *pf) | |
396 | { | |
397 | memset(&pf->stats, 0, sizeof(pf->stats)); | |
398 | memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); | |
399 | pf->stat_offsets_loaded = false; | |
400 | } | |
401 | ||
402 | /** | |
403 | * i40e_stat_update48 - read and update a 48 bit stat from the chip | |
404 | * @hw: ptr to the hardware info | |
405 | * @hireg: the high 32 bit reg to read | |
406 | * @loreg: the low 32 bit reg to read | |
407 | * @offset_loaded: has the initial offset been loaded yet | |
408 | * @offset: ptr to current offset value | |
409 | * @stat: ptr to the stat | |
410 | * | |
411 | * Since the device stats are not reset at PFReset, they likely will not | |
412 | * be zeroed when the driver starts. We'll save the first values read | |
413 | * and use them as offsets to be subtracted from the raw values in order | |
414 | * to report stats that count from zero. In the process, we also manage | |
415 | * the potential roll-over. | |
416 | **/ | |
417 | static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, | |
418 | bool offset_loaded, u64 *offset, u64 *stat) | |
419 | { | |
420 | u64 new_data; | |
421 | ||
422 | if (hw->device_id == I40E_QEMU_DEVICE_ID) { | |
423 | new_data = rd32(hw, loreg); | |
424 | new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; | |
425 | } else { | |
426 | new_data = rd64(hw, loreg); | |
427 | } | |
428 | if (!offset_loaded) | |
429 | *offset = new_data; | |
430 | if (likely(new_data >= *offset)) | |
431 | *stat = new_data - *offset; | |
432 | else | |
433 | *stat = (new_data + ((u64)1 << 48)) - *offset; | |
434 | *stat &= 0xFFFFFFFFFFFFULL; | |
435 | } | |
436 | ||
437 | /** | |
438 | * i40e_stat_update32 - read and update a 32 bit stat from the chip | |
439 | * @hw: ptr to the hardware info | |
440 | * @reg: the hw reg to read | |
441 | * @offset_loaded: has the initial offset been loaded yet | |
442 | * @offset: ptr to current offset value | |
443 | * @stat: ptr to the stat | |
444 | **/ | |
445 | static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, | |
446 | bool offset_loaded, u64 *offset, u64 *stat) | |
447 | { | |
448 | u32 new_data; | |
449 | ||
450 | new_data = rd32(hw, reg); | |
451 | if (!offset_loaded) | |
452 | *offset = new_data; | |
453 | if (likely(new_data >= *offset)) | |
454 | *stat = (u32)(new_data - *offset); | |
455 | else | |
456 | *stat = (u32)((new_data + ((u64)1 << 32)) - *offset); | |
457 | } | |
458 | ||
459 | /** | |
460 | * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. | |
461 | * @vsi: the VSI to be updated | |
462 | **/ | |
463 | void i40e_update_eth_stats(struct i40e_vsi *vsi) | |
464 | { | |
465 | int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); | |
466 | struct i40e_pf *pf = vsi->back; | |
467 | struct i40e_hw *hw = &pf->hw; | |
468 | struct i40e_eth_stats *oes; | |
469 | struct i40e_eth_stats *es; /* device's eth stats */ | |
470 | ||
471 | es = &vsi->eth_stats; | |
472 | oes = &vsi->eth_stats_offsets; | |
473 | ||
474 | /* Gather up the stats that the hw collects */ | |
475 | i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), | |
476 | vsi->stat_offsets_loaded, | |
477 | &oes->tx_errors, &es->tx_errors); | |
478 | i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), | |
479 | vsi->stat_offsets_loaded, | |
480 | &oes->rx_discards, &es->rx_discards); | |
481 | ||
482 | i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), | |
483 | I40E_GLV_GORCL(stat_idx), | |
484 | vsi->stat_offsets_loaded, | |
485 | &oes->rx_bytes, &es->rx_bytes); | |
486 | i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), | |
487 | I40E_GLV_UPRCL(stat_idx), | |
488 | vsi->stat_offsets_loaded, | |
489 | &oes->rx_unicast, &es->rx_unicast); | |
490 | i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), | |
491 | I40E_GLV_MPRCL(stat_idx), | |
492 | vsi->stat_offsets_loaded, | |
493 | &oes->rx_multicast, &es->rx_multicast); | |
494 | i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), | |
495 | I40E_GLV_BPRCL(stat_idx), | |
496 | vsi->stat_offsets_loaded, | |
497 | &oes->rx_broadcast, &es->rx_broadcast); | |
498 | ||
499 | i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), | |
500 | I40E_GLV_GOTCL(stat_idx), | |
501 | vsi->stat_offsets_loaded, | |
502 | &oes->tx_bytes, &es->tx_bytes); | |
503 | i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), | |
504 | I40E_GLV_UPTCL(stat_idx), | |
505 | vsi->stat_offsets_loaded, | |
506 | &oes->tx_unicast, &es->tx_unicast); | |
507 | i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), | |
508 | I40E_GLV_MPTCL(stat_idx), | |
509 | vsi->stat_offsets_loaded, | |
510 | &oes->tx_multicast, &es->tx_multicast); | |
511 | i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), | |
512 | I40E_GLV_BPTCL(stat_idx), | |
513 | vsi->stat_offsets_loaded, | |
514 | &oes->tx_broadcast, &es->tx_broadcast); | |
515 | vsi->stat_offsets_loaded = true; | |
516 | } | |
517 | ||
518 | /** | |
519 | * i40e_update_veb_stats - Update Switch component statistics | |
520 | * @veb: the VEB being updated | |
521 | **/ | |
522 | static void i40e_update_veb_stats(struct i40e_veb *veb) | |
523 | { | |
524 | struct i40e_pf *pf = veb->pf; | |
525 | struct i40e_hw *hw = &pf->hw; | |
526 | struct i40e_eth_stats *oes; | |
527 | struct i40e_eth_stats *es; /* device's eth stats */ | |
528 | int idx = 0; | |
529 | ||
530 | idx = veb->stats_idx; | |
531 | es = &veb->stats; | |
532 | oes = &veb->stats_offsets; | |
533 | ||
534 | /* Gather up the stats that the hw collects */ | |
535 | i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), | |
536 | veb->stat_offsets_loaded, | |
537 | &oes->tx_discards, &es->tx_discards); | |
538 | i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), | |
539 | veb->stat_offsets_loaded, | |
540 | &oes->rx_unknown_protocol, &es->rx_unknown_protocol); | |
541 | ||
542 | i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), | |
543 | veb->stat_offsets_loaded, | |
544 | &oes->rx_bytes, &es->rx_bytes); | |
545 | i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), | |
546 | veb->stat_offsets_loaded, | |
547 | &oes->rx_unicast, &es->rx_unicast); | |
548 | i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), | |
549 | veb->stat_offsets_loaded, | |
550 | &oes->rx_multicast, &es->rx_multicast); | |
551 | i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), | |
552 | veb->stat_offsets_loaded, | |
553 | &oes->rx_broadcast, &es->rx_broadcast); | |
554 | ||
555 | i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), | |
556 | veb->stat_offsets_loaded, | |
557 | &oes->tx_bytes, &es->tx_bytes); | |
558 | i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), | |
559 | veb->stat_offsets_loaded, | |
560 | &oes->tx_unicast, &es->tx_unicast); | |
561 | i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), | |
562 | veb->stat_offsets_loaded, | |
563 | &oes->tx_multicast, &es->tx_multicast); | |
564 | i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), | |
565 | veb->stat_offsets_loaded, | |
566 | &oes->tx_broadcast, &es->tx_broadcast); | |
567 | veb->stat_offsets_loaded = true; | |
568 | } | |
569 | ||
570 | /** | |
571 | * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode | |
572 | * @pf: the corresponding PF | |
573 | * | |
574 | * Update the Rx XOFF counter (PAUSE frames) in link flow control mode | |
575 | **/ | |
576 | static void i40e_update_link_xoff_rx(struct i40e_pf *pf) | |
577 | { | |
578 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
579 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
580 | struct i40e_hw *hw = &pf->hw; | |
581 | u64 xoff = 0; | |
582 | u16 i, v; | |
583 | ||
584 | if ((hw->fc.current_mode != I40E_FC_FULL) && | |
585 | (hw->fc.current_mode != I40E_FC_RX_PAUSE)) | |
586 | return; | |
587 | ||
588 | xoff = nsd->link_xoff_rx; | |
589 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), | |
590 | pf->stat_offsets_loaded, | |
591 | &osd->link_xoff_rx, &nsd->link_xoff_rx); | |
592 | ||
593 | /* No new LFC xoff rx */ | |
594 | if (!(nsd->link_xoff_rx - xoff)) | |
595 | return; | |
596 | ||
597 | /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ | |
598 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
599 | struct i40e_vsi *vsi = pf->vsi[v]; | |
600 | ||
601 | if (!vsi) | |
602 | continue; | |
603 | ||
604 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
605 | struct i40e_ring *ring = &vsi->tx_rings[i]; | |
606 | clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); | |
607 | } | |
608 | } | |
609 | } | |
610 | ||
611 | /** | |
612 | * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode | |
613 | * @pf: the corresponding PF | |
614 | * | |
615 | * Update the Rx XOFF counter (PAUSE frames) in PFC mode | |
616 | **/ | |
617 | static void i40e_update_prio_xoff_rx(struct i40e_pf *pf) | |
618 | { | |
619 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
620 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
621 | bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false}; | |
622 | struct i40e_dcbx_config *dcb_cfg; | |
623 | struct i40e_hw *hw = &pf->hw; | |
624 | u16 i, v; | |
625 | u8 tc; | |
626 | ||
627 | dcb_cfg = &hw->local_dcbx_config; | |
628 | ||
629 | /* See if DCB enabled with PFC TC */ | |
630 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED) || | |
631 | !(dcb_cfg->pfc.pfcenable)) { | |
632 | i40e_update_link_xoff_rx(pf); | |
633 | return; | |
634 | } | |
635 | ||
636 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
637 | u64 prio_xoff = nsd->priority_xoff_rx[i]; | |
638 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), | |
639 | pf->stat_offsets_loaded, | |
640 | &osd->priority_xoff_rx[i], | |
641 | &nsd->priority_xoff_rx[i]); | |
642 | ||
643 | /* No new PFC xoff rx */ | |
644 | if (!(nsd->priority_xoff_rx[i] - prio_xoff)) | |
645 | continue; | |
646 | /* Get the TC for given priority */ | |
647 | tc = dcb_cfg->etscfg.prioritytable[i]; | |
648 | xoff[tc] = true; | |
649 | } | |
650 | ||
651 | /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ | |
652 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
653 | struct i40e_vsi *vsi = pf->vsi[v]; | |
654 | ||
655 | if (!vsi) | |
656 | continue; | |
657 | ||
658 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
659 | struct i40e_ring *ring = &vsi->tx_rings[i]; | |
660 | ||
661 | tc = ring->dcb_tc; | |
662 | if (xoff[tc]) | |
663 | clear_bit(__I40E_HANG_CHECK_ARMED, | |
664 | &ring->state); | |
665 | } | |
666 | } | |
667 | } | |
668 | ||
669 | /** | |
670 | * i40e_update_stats - Update the board statistics counters. | |
671 | * @vsi: the VSI to be updated | |
672 | * | |
673 | * There are a few instances where we store the same stat in a | |
674 | * couple of different structs. This is partly because we have | |
675 | * the netdev stats that need to be filled out, which is slightly | |
676 | * different from the "eth_stats" defined by the chip and used in | |
677 | * VF communications. We sort it all out here in a central place. | |
678 | **/ | |
679 | void i40e_update_stats(struct i40e_vsi *vsi) | |
680 | { | |
681 | struct i40e_pf *pf = vsi->back; | |
682 | struct i40e_hw *hw = &pf->hw; | |
683 | struct rtnl_link_stats64 *ons; | |
684 | struct rtnl_link_stats64 *ns; /* netdev stats */ | |
685 | struct i40e_eth_stats *oes; | |
686 | struct i40e_eth_stats *es; /* device's eth stats */ | |
687 | u32 tx_restart, tx_busy; | |
688 | u32 rx_page, rx_buf; | |
689 | u64 rx_p, rx_b; | |
690 | u64 tx_p, tx_b; | |
691 | int i; | |
692 | u16 q; | |
693 | ||
694 | if (test_bit(__I40E_DOWN, &vsi->state) || | |
695 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
696 | return; | |
697 | ||
698 | ns = i40e_get_vsi_stats_struct(vsi); | |
699 | ons = &vsi->net_stats_offsets; | |
700 | es = &vsi->eth_stats; | |
701 | oes = &vsi->eth_stats_offsets; | |
702 | ||
703 | /* Gather up the netdev and vsi stats that the driver collects | |
704 | * on the fly during packet processing | |
705 | */ | |
706 | rx_b = rx_p = 0; | |
707 | tx_b = tx_p = 0; | |
708 | tx_restart = tx_busy = 0; | |
709 | rx_page = 0; | |
710 | rx_buf = 0; | |
711 | for (q = 0; q < vsi->num_queue_pairs; q++) { | |
712 | struct i40e_ring *p; | |
713 | ||
714 | p = &vsi->rx_rings[q]; | |
a114d0a6 AD |
715 | rx_b += p->stats.bytes; |
716 | rx_p += p->stats.packets; | |
41c445ff JB |
717 | rx_buf += p->rx_stats.alloc_rx_buff_failed; |
718 | rx_page += p->rx_stats.alloc_rx_page_failed; | |
719 | ||
720 | p = &vsi->tx_rings[q]; | |
a114d0a6 AD |
721 | tx_b += p->stats.bytes; |
722 | tx_p += p->stats.packets; | |
41c445ff JB |
723 | tx_restart += p->tx_stats.restart_queue; |
724 | tx_busy += p->tx_stats.tx_busy; | |
725 | } | |
726 | vsi->tx_restart = tx_restart; | |
727 | vsi->tx_busy = tx_busy; | |
728 | vsi->rx_page_failed = rx_page; | |
729 | vsi->rx_buf_failed = rx_buf; | |
730 | ||
731 | ns->rx_packets = rx_p; | |
732 | ns->rx_bytes = rx_b; | |
733 | ns->tx_packets = tx_p; | |
734 | ns->tx_bytes = tx_b; | |
735 | ||
736 | i40e_update_eth_stats(vsi); | |
737 | /* update netdev stats from eth stats */ | |
738 | ons->rx_errors = oes->rx_errors; | |
739 | ns->rx_errors = es->rx_errors; | |
740 | ons->tx_errors = oes->tx_errors; | |
741 | ns->tx_errors = es->tx_errors; | |
742 | ons->multicast = oes->rx_multicast; | |
743 | ns->multicast = es->rx_multicast; | |
744 | ons->tx_dropped = oes->tx_discards; | |
745 | ns->tx_dropped = es->tx_discards; | |
746 | ||
747 | /* Get the port data only if this is the main PF VSI */ | |
748 | if (vsi == pf->vsi[pf->lan_vsi]) { | |
749 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
750 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
751 | ||
752 | i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), | |
753 | I40E_GLPRT_GORCL(hw->port), | |
754 | pf->stat_offsets_loaded, | |
755 | &osd->eth.rx_bytes, &nsd->eth.rx_bytes); | |
756 | i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), | |
757 | I40E_GLPRT_GOTCL(hw->port), | |
758 | pf->stat_offsets_loaded, | |
759 | &osd->eth.tx_bytes, &nsd->eth.tx_bytes); | |
760 | i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), | |
761 | pf->stat_offsets_loaded, | |
762 | &osd->eth.rx_discards, | |
763 | &nsd->eth.rx_discards); | |
764 | i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port), | |
765 | pf->stat_offsets_loaded, | |
766 | &osd->eth.tx_discards, | |
767 | &nsd->eth.tx_discards); | |
768 | i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), | |
769 | I40E_GLPRT_MPRCL(hw->port), | |
770 | pf->stat_offsets_loaded, | |
771 | &osd->eth.rx_multicast, | |
772 | &nsd->eth.rx_multicast); | |
773 | ||
774 | i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), | |
775 | pf->stat_offsets_loaded, | |
776 | &osd->tx_dropped_link_down, | |
777 | &nsd->tx_dropped_link_down); | |
778 | ||
779 | i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), | |
780 | pf->stat_offsets_loaded, | |
781 | &osd->crc_errors, &nsd->crc_errors); | |
782 | ns->rx_crc_errors = nsd->crc_errors; | |
783 | ||
784 | i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), | |
785 | pf->stat_offsets_loaded, | |
786 | &osd->illegal_bytes, &nsd->illegal_bytes); | |
787 | ns->rx_errors = nsd->crc_errors | |
788 | + nsd->illegal_bytes; | |
789 | ||
790 | i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), | |
791 | pf->stat_offsets_loaded, | |
792 | &osd->mac_local_faults, | |
793 | &nsd->mac_local_faults); | |
794 | i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), | |
795 | pf->stat_offsets_loaded, | |
796 | &osd->mac_remote_faults, | |
797 | &nsd->mac_remote_faults); | |
798 | ||
799 | i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), | |
800 | pf->stat_offsets_loaded, | |
801 | &osd->rx_length_errors, | |
802 | &nsd->rx_length_errors); | |
803 | ns->rx_length_errors = nsd->rx_length_errors; | |
804 | ||
805 | i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), | |
806 | pf->stat_offsets_loaded, | |
807 | &osd->link_xon_rx, &nsd->link_xon_rx); | |
808 | i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), | |
809 | pf->stat_offsets_loaded, | |
810 | &osd->link_xon_tx, &nsd->link_xon_tx); | |
811 | i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ | |
812 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), | |
813 | pf->stat_offsets_loaded, | |
814 | &osd->link_xoff_tx, &nsd->link_xoff_tx); | |
815 | ||
816 | for (i = 0; i < 8; i++) { | |
817 | i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), | |
818 | pf->stat_offsets_loaded, | |
819 | &osd->priority_xon_rx[i], | |
820 | &nsd->priority_xon_rx[i]); | |
821 | i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), | |
822 | pf->stat_offsets_loaded, | |
823 | &osd->priority_xon_tx[i], | |
824 | &nsd->priority_xon_tx[i]); | |
825 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), | |
826 | pf->stat_offsets_loaded, | |
827 | &osd->priority_xoff_tx[i], | |
828 | &nsd->priority_xoff_tx[i]); | |
829 | i40e_stat_update32(hw, | |
830 | I40E_GLPRT_RXON2OFFCNT(hw->port, i), | |
831 | pf->stat_offsets_loaded, | |
832 | &osd->priority_xon_2_xoff[i], | |
833 | &nsd->priority_xon_2_xoff[i]); | |
834 | } | |
835 | ||
836 | i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), | |
837 | I40E_GLPRT_PRC64L(hw->port), | |
838 | pf->stat_offsets_loaded, | |
839 | &osd->rx_size_64, &nsd->rx_size_64); | |
840 | i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), | |
841 | I40E_GLPRT_PRC127L(hw->port), | |
842 | pf->stat_offsets_loaded, | |
843 | &osd->rx_size_127, &nsd->rx_size_127); | |
844 | i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), | |
845 | I40E_GLPRT_PRC255L(hw->port), | |
846 | pf->stat_offsets_loaded, | |
847 | &osd->rx_size_255, &nsd->rx_size_255); | |
848 | i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), | |
849 | I40E_GLPRT_PRC511L(hw->port), | |
850 | pf->stat_offsets_loaded, | |
851 | &osd->rx_size_511, &nsd->rx_size_511); | |
852 | i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), | |
853 | I40E_GLPRT_PRC1023L(hw->port), | |
854 | pf->stat_offsets_loaded, | |
855 | &osd->rx_size_1023, &nsd->rx_size_1023); | |
856 | i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), | |
857 | I40E_GLPRT_PRC1522L(hw->port), | |
858 | pf->stat_offsets_loaded, | |
859 | &osd->rx_size_1522, &nsd->rx_size_1522); | |
860 | i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), | |
861 | I40E_GLPRT_PRC9522L(hw->port), | |
862 | pf->stat_offsets_loaded, | |
863 | &osd->rx_size_big, &nsd->rx_size_big); | |
864 | ||
865 | i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), | |
866 | I40E_GLPRT_PTC64L(hw->port), | |
867 | pf->stat_offsets_loaded, | |
868 | &osd->tx_size_64, &nsd->tx_size_64); | |
869 | i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), | |
870 | I40E_GLPRT_PTC127L(hw->port), | |
871 | pf->stat_offsets_loaded, | |
872 | &osd->tx_size_127, &nsd->tx_size_127); | |
873 | i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), | |
874 | I40E_GLPRT_PTC255L(hw->port), | |
875 | pf->stat_offsets_loaded, | |
876 | &osd->tx_size_255, &nsd->tx_size_255); | |
877 | i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), | |
878 | I40E_GLPRT_PTC511L(hw->port), | |
879 | pf->stat_offsets_loaded, | |
880 | &osd->tx_size_511, &nsd->tx_size_511); | |
881 | i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), | |
882 | I40E_GLPRT_PTC1023L(hw->port), | |
883 | pf->stat_offsets_loaded, | |
884 | &osd->tx_size_1023, &nsd->tx_size_1023); | |
885 | i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), | |
886 | I40E_GLPRT_PTC1522L(hw->port), | |
887 | pf->stat_offsets_loaded, | |
888 | &osd->tx_size_1522, &nsd->tx_size_1522); | |
889 | i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), | |
890 | I40E_GLPRT_PTC9522L(hw->port), | |
891 | pf->stat_offsets_loaded, | |
892 | &osd->tx_size_big, &nsd->tx_size_big); | |
893 | ||
894 | i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), | |
895 | pf->stat_offsets_loaded, | |
896 | &osd->rx_undersize, &nsd->rx_undersize); | |
897 | i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), | |
898 | pf->stat_offsets_loaded, | |
899 | &osd->rx_fragments, &nsd->rx_fragments); | |
900 | i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), | |
901 | pf->stat_offsets_loaded, | |
902 | &osd->rx_oversize, &nsd->rx_oversize); | |
903 | i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), | |
904 | pf->stat_offsets_loaded, | |
905 | &osd->rx_jabber, &nsd->rx_jabber); | |
906 | } | |
907 | ||
908 | pf->stat_offsets_loaded = true; | |
909 | } | |
910 | ||
911 | /** | |
912 | * i40e_find_filter - Search VSI filter list for specific mac/vlan filter | |
913 | * @vsi: the VSI to be searched | |
914 | * @macaddr: the MAC address | |
915 | * @vlan: the vlan | |
916 | * @is_vf: make sure its a vf filter, else doesn't matter | |
917 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
918 | * | |
919 | * Returns ptr to the filter object or NULL | |
920 | **/ | |
921 | static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, | |
922 | u8 *macaddr, s16 vlan, | |
923 | bool is_vf, bool is_netdev) | |
924 | { | |
925 | struct i40e_mac_filter *f; | |
926 | ||
927 | if (!vsi || !macaddr) | |
928 | return NULL; | |
929 | ||
930 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
931 | if ((ether_addr_equal(macaddr, f->macaddr)) && | |
932 | (vlan == f->vlan) && | |
933 | (!is_vf || f->is_vf) && | |
934 | (!is_netdev || f->is_netdev)) | |
935 | return f; | |
936 | } | |
937 | return NULL; | |
938 | } | |
939 | ||
940 | /** | |
941 | * i40e_find_mac - Find a mac addr in the macvlan filters list | |
942 | * @vsi: the VSI to be searched | |
943 | * @macaddr: the MAC address we are searching for | |
944 | * @is_vf: make sure its a vf filter, else doesn't matter | |
945 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
946 | * | |
947 | * Returns the first filter with the provided MAC address or NULL if | |
948 | * MAC address was not found | |
949 | **/ | |
950 | struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, | |
951 | bool is_vf, bool is_netdev) | |
952 | { | |
953 | struct i40e_mac_filter *f; | |
954 | ||
955 | if (!vsi || !macaddr) | |
956 | return NULL; | |
957 | ||
958 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
959 | if ((ether_addr_equal(macaddr, f->macaddr)) && | |
960 | (!is_vf || f->is_vf) && | |
961 | (!is_netdev || f->is_netdev)) | |
962 | return f; | |
963 | } | |
964 | return NULL; | |
965 | } | |
966 | ||
967 | /** | |
968 | * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode | |
969 | * @vsi: the VSI to be searched | |
970 | * | |
971 | * Returns true if VSI is in vlan mode or false otherwise | |
972 | **/ | |
973 | bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) | |
974 | { | |
975 | struct i40e_mac_filter *f; | |
976 | ||
977 | /* Only -1 for all the filters denotes not in vlan mode | |
978 | * so we have to go through all the list in order to make sure | |
979 | */ | |
980 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
981 | if (f->vlan >= 0) | |
982 | return true; | |
983 | } | |
984 | ||
985 | return false; | |
986 | } | |
987 | ||
988 | /** | |
989 | * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans | |
990 | * @vsi: the VSI to be searched | |
991 | * @macaddr: the mac address to be filtered | |
992 | * @is_vf: true if it is a vf | |
993 | * @is_netdev: true if it is a netdev | |
994 | * | |
995 | * Goes through all the macvlan filters and adds a | |
996 | * macvlan filter for each unique vlan that already exists | |
997 | * | |
998 | * Returns first filter found on success, else NULL | |
999 | **/ | |
1000 | struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, | |
1001 | bool is_vf, bool is_netdev) | |
1002 | { | |
1003 | struct i40e_mac_filter *f; | |
1004 | ||
1005 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1006 | if (!i40e_find_filter(vsi, macaddr, f->vlan, | |
1007 | is_vf, is_netdev)) { | |
1008 | if (!i40e_add_filter(vsi, macaddr, f->vlan, | |
1009 | is_vf, is_netdev)) | |
1010 | return NULL; | |
1011 | } | |
1012 | } | |
1013 | ||
1014 | return list_first_entry_or_null(&vsi->mac_filter_list, | |
1015 | struct i40e_mac_filter, list); | |
1016 | } | |
1017 | ||
1018 | /** | |
1019 | * i40e_add_filter - Add a mac/vlan filter to the VSI | |
1020 | * @vsi: the VSI to be searched | |
1021 | * @macaddr: the MAC address | |
1022 | * @vlan: the vlan | |
1023 | * @is_vf: make sure its a vf filter, else doesn't matter | |
1024 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
1025 | * | |
1026 | * Returns ptr to the filter object or NULL when no memory available. | |
1027 | **/ | |
1028 | struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, | |
1029 | u8 *macaddr, s16 vlan, | |
1030 | bool is_vf, bool is_netdev) | |
1031 | { | |
1032 | struct i40e_mac_filter *f; | |
1033 | ||
1034 | if (!vsi || !macaddr) | |
1035 | return NULL; | |
1036 | ||
1037 | f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); | |
1038 | if (!f) { | |
1039 | f = kzalloc(sizeof(*f), GFP_ATOMIC); | |
1040 | if (!f) | |
1041 | goto add_filter_out; | |
1042 | ||
1043 | memcpy(f->macaddr, macaddr, ETH_ALEN); | |
1044 | f->vlan = vlan; | |
1045 | f->changed = true; | |
1046 | ||
1047 | INIT_LIST_HEAD(&f->list); | |
1048 | list_add(&f->list, &vsi->mac_filter_list); | |
1049 | } | |
1050 | ||
1051 | /* increment counter and add a new flag if needed */ | |
1052 | if (is_vf) { | |
1053 | if (!f->is_vf) { | |
1054 | f->is_vf = true; | |
1055 | f->counter++; | |
1056 | } | |
1057 | } else if (is_netdev) { | |
1058 | if (!f->is_netdev) { | |
1059 | f->is_netdev = true; | |
1060 | f->counter++; | |
1061 | } | |
1062 | } else { | |
1063 | f->counter++; | |
1064 | } | |
1065 | ||
1066 | /* changed tells sync_filters_subtask to | |
1067 | * push the filter down to the firmware | |
1068 | */ | |
1069 | if (f->changed) { | |
1070 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1071 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1072 | } | |
1073 | ||
1074 | add_filter_out: | |
1075 | return f; | |
1076 | } | |
1077 | ||
1078 | /** | |
1079 | * i40e_del_filter - Remove a mac/vlan filter from the VSI | |
1080 | * @vsi: the VSI to be searched | |
1081 | * @macaddr: the MAC address | |
1082 | * @vlan: the vlan | |
1083 | * @is_vf: make sure it's a vf filter, else doesn't matter | |
1084 | * @is_netdev: make sure it's a netdev filter, else doesn't matter | |
1085 | **/ | |
1086 | void i40e_del_filter(struct i40e_vsi *vsi, | |
1087 | u8 *macaddr, s16 vlan, | |
1088 | bool is_vf, bool is_netdev) | |
1089 | { | |
1090 | struct i40e_mac_filter *f; | |
1091 | ||
1092 | if (!vsi || !macaddr) | |
1093 | return; | |
1094 | ||
1095 | f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); | |
1096 | if (!f || f->counter == 0) | |
1097 | return; | |
1098 | ||
1099 | if (is_vf) { | |
1100 | if (f->is_vf) { | |
1101 | f->is_vf = false; | |
1102 | f->counter--; | |
1103 | } | |
1104 | } else if (is_netdev) { | |
1105 | if (f->is_netdev) { | |
1106 | f->is_netdev = false; | |
1107 | f->counter--; | |
1108 | } | |
1109 | } else { | |
1110 | /* make sure we don't remove a filter in use by vf or netdev */ | |
1111 | int min_f = 0; | |
1112 | min_f += (f->is_vf ? 1 : 0); | |
1113 | min_f += (f->is_netdev ? 1 : 0); | |
1114 | ||
1115 | if (f->counter > min_f) | |
1116 | f->counter--; | |
1117 | } | |
1118 | ||
1119 | /* counter == 0 tells sync_filters_subtask to | |
1120 | * remove the filter from the firmware's list | |
1121 | */ | |
1122 | if (f->counter == 0) { | |
1123 | f->changed = true; | |
1124 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1125 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1126 | } | |
1127 | } | |
1128 | ||
1129 | /** | |
1130 | * i40e_set_mac - NDO callback to set mac address | |
1131 | * @netdev: network interface device structure | |
1132 | * @p: pointer to an address structure | |
1133 | * | |
1134 | * Returns 0 on success, negative on failure | |
1135 | **/ | |
1136 | static int i40e_set_mac(struct net_device *netdev, void *p) | |
1137 | { | |
1138 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1139 | struct i40e_vsi *vsi = np->vsi; | |
1140 | struct sockaddr *addr = p; | |
1141 | struct i40e_mac_filter *f; | |
1142 | ||
1143 | if (!is_valid_ether_addr(addr->sa_data)) | |
1144 | return -EADDRNOTAVAIL; | |
1145 | ||
1146 | netdev_info(netdev, "set mac address=%pM\n", addr->sa_data); | |
1147 | ||
1148 | if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) | |
1149 | return 0; | |
1150 | ||
1151 | if (vsi->type == I40E_VSI_MAIN) { | |
1152 | i40e_status ret; | |
1153 | ret = i40e_aq_mac_address_write(&vsi->back->hw, | |
1154 | I40E_AQC_WRITE_TYPE_LAA_ONLY, | |
1155 | addr->sa_data, NULL); | |
1156 | if (ret) { | |
1157 | netdev_info(netdev, | |
1158 | "Addr change for Main VSI failed: %d\n", | |
1159 | ret); | |
1160 | return -EADDRNOTAVAIL; | |
1161 | } | |
1162 | ||
1163 | memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len); | |
1164 | } | |
1165 | ||
1166 | /* In order to be sure to not drop any packets, add the new address | |
1167 | * then delete the old one. | |
1168 | */ | |
1169 | f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false); | |
1170 | if (!f) | |
1171 | return -ENOMEM; | |
1172 | ||
1173 | i40e_sync_vsi_filters(vsi); | |
1174 | i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false); | |
1175 | i40e_sync_vsi_filters(vsi); | |
1176 | ||
1177 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1178 | ||
1179 | return 0; | |
1180 | } | |
1181 | ||
1182 | /** | |
1183 | * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc | |
1184 | * @vsi: the VSI being setup | |
1185 | * @ctxt: VSI context structure | |
1186 | * @enabled_tc: Enabled TCs bitmap | |
1187 | * @is_add: True if called before Add VSI | |
1188 | * | |
1189 | * Setup VSI queue mapping for enabled traffic classes. | |
1190 | **/ | |
1191 | static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, | |
1192 | struct i40e_vsi_context *ctxt, | |
1193 | u8 enabled_tc, | |
1194 | bool is_add) | |
1195 | { | |
1196 | struct i40e_pf *pf = vsi->back; | |
1197 | u16 sections = 0; | |
1198 | u8 netdev_tc = 0; | |
1199 | u16 numtc = 0; | |
1200 | u16 qcount; | |
1201 | u8 offset; | |
1202 | u16 qmap; | |
1203 | int i; | |
1204 | ||
1205 | sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; | |
1206 | offset = 0; | |
1207 | ||
1208 | if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { | |
1209 | /* Find numtc from enabled TC bitmap */ | |
1210 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
1211 | if (enabled_tc & (1 << i)) /* TC is enabled */ | |
1212 | numtc++; | |
1213 | } | |
1214 | if (!numtc) { | |
1215 | dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); | |
1216 | numtc = 1; | |
1217 | } | |
1218 | } else { | |
1219 | /* At least TC0 is enabled in case of non-DCB case */ | |
1220 | numtc = 1; | |
1221 | } | |
1222 | ||
1223 | vsi->tc_config.numtc = numtc; | |
1224 | vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; | |
1225 | ||
1226 | /* Setup queue offset/count for all TCs for given VSI */ | |
1227 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
1228 | /* See if the given TC is enabled for the given VSI */ | |
1229 | if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */ | |
1230 | int pow, num_qps; | |
1231 | ||
1232 | vsi->tc_config.tc_info[i].qoffset = offset; | |
1233 | switch (vsi->type) { | |
1234 | case I40E_VSI_MAIN: | |
1235 | if (i == 0) | |
1236 | qcount = pf->rss_size; | |
1237 | else | |
1238 | qcount = pf->num_tc_qps; | |
1239 | vsi->tc_config.tc_info[i].qcount = qcount; | |
1240 | break; | |
1241 | case I40E_VSI_FDIR: | |
1242 | case I40E_VSI_SRIOV: | |
1243 | case I40E_VSI_VMDQ2: | |
1244 | default: | |
1245 | qcount = vsi->alloc_queue_pairs; | |
1246 | vsi->tc_config.tc_info[i].qcount = qcount; | |
1247 | WARN_ON(i != 0); | |
1248 | break; | |
1249 | } | |
1250 | ||
1251 | /* find the power-of-2 of the number of queue pairs */ | |
1252 | num_qps = vsi->tc_config.tc_info[i].qcount; | |
1253 | pow = 0; | |
1254 | while (num_qps && | |
1255 | ((1 << pow) < vsi->tc_config.tc_info[i].qcount)) { | |
1256 | pow++; | |
1257 | num_qps >>= 1; | |
1258 | } | |
1259 | ||
1260 | vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; | |
1261 | qmap = | |
1262 | (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | | |
1263 | (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); | |
1264 | ||
1265 | offset += vsi->tc_config.tc_info[i].qcount; | |
1266 | } else { | |
1267 | /* TC is not enabled so set the offset to | |
1268 | * default queue and allocate one queue | |
1269 | * for the given TC. | |
1270 | */ | |
1271 | vsi->tc_config.tc_info[i].qoffset = 0; | |
1272 | vsi->tc_config.tc_info[i].qcount = 1; | |
1273 | vsi->tc_config.tc_info[i].netdev_tc = 0; | |
1274 | ||
1275 | qmap = 0; | |
1276 | } | |
1277 | ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); | |
1278 | } | |
1279 | ||
1280 | /* Set actual Tx/Rx queue pairs */ | |
1281 | vsi->num_queue_pairs = offset; | |
1282 | ||
1283 | /* Scheduler section valid can only be set for ADD VSI */ | |
1284 | if (is_add) { | |
1285 | sections |= I40E_AQ_VSI_PROP_SCHED_VALID; | |
1286 | ||
1287 | ctxt->info.up_enable_bits = enabled_tc; | |
1288 | } | |
1289 | if (vsi->type == I40E_VSI_SRIOV) { | |
1290 | ctxt->info.mapping_flags |= | |
1291 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); | |
1292 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
1293 | ctxt->info.queue_mapping[i] = | |
1294 | cpu_to_le16(vsi->base_queue + i); | |
1295 | } else { | |
1296 | ctxt->info.mapping_flags |= | |
1297 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); | |
1298 | ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); | |
1299 | } | |
1300 | ctxt->info.valid_sections |= cpu_to_le16(sections); | |
1301 | } | |
1302 | ||
1303 | /** | |
1304 | * i40e_set_rx_mode - NDO callback to set the netdev filters | |
1305 | * @netdev: network interface device structure | |
1306 | **/ | |
1307 | static void i40e_set_rx_mode(struct net_device *netdev) | |
1308 | { | |
1309 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1310 | struct i40e_mac_filter *f, *ftmp; | |
1311 | struct i40e_vsi *vsi = np->vsi; | |
1312 | struct netdev_hw_addr *uca; | |
1313 | struct netdev_hw_addr *mca; | |
1314 | struct netdev_hw_addr *ha; | |
1315 | ||
1316 | /* add addr if not already in the filter list */ | |
1317 | netdev_for_each_uc_addr(uca, netdev) { | |
1318 | if (!i40e_find_mac(vsi, uca->addr, false, true)) { | |
1319 | if (i40e_is_vsi_in_vlan(vsi)) | |
1320 | i40e_put_mac_in_vlan(vsi, uca->addr, | |
1321 | false, true); | |
1322 | else | |
1323 | i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, | |
1324 | false, true); | |
1325 | } | |
1326 | } | |
1327 | ||
1328 | netdev_for_each_mc_addr(mca, netdev) { | |
1329 | if (!i40e_find_mac(vsi, mca->addr, false, true)) { | |
1330 | if (i40e_is_vsi_in_vlan(vsi)) | |
1331 | i40e_put_mac_in_vlan(vsi, mca->addr, | |
1332 | false, true); | |
1333 | else | |
1334 | i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, | |
1335 | false, true); | |
1336 | } | |
1337 | } | |
1338 | ||
1339 | /* remove filter if not in netdev list */ | |
1340 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1341 | bool found = false; | |
1342 | ||
1343 | if (!f->is_netdev) | |
1344 | continue; | |
1345 | ||
1346 | if (is_multicast_ether_addr(f->macaddr)) { | |
1347 | netdev_for_each_mc_addr(mca, netdev) { | |
1348 | if (ether_addr_equal(mca->addr, f->macaddr)) { | |
1349 | found = true; | |
1350 | break; | |
1351 | } | |
1352 | } | |
1353 | } else { | |
1354 | netdev_for_each_uc_addr(uca, netdev) { | |
1355 | if (ether_addr_equal(uca->addr, f->macaddr)) { | |
1356 | found = true; | |
1357 | break; | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | for_each_dev_addr(netdev, ha) { | |
1362 | if (ether_addr_equal(ha->addr, f->macaddr)) { | |
1363 | found = true; | |
1364 | break; | |
1365 | } | |
1366 | } | |
1367 | } | |
1368 | if (!found) | |
1369 | i40e_del_filter( | |
1370 | vsi, f->macaddr, I40E_VLAN_ANY, false, true); | |
1371 | } | |
1372 | ||
1373 | /* check for other flag changes */ | |
1374 | if (vsi->current_netdev_flags != vsi->netdev->flags) { | |
1375 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1376 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1377 | } | |
1378 | } | |
1379 | ||
1380 | /** | |
1381 | * i40e_sync_vsi_filters - Update the VSI filter list to the HW | |
1382 | * @vsi: ptr to the VSI | |
1383 | * | |
1384 | * Push any outstanding VSI filter changes through the AdminQ. | |
1385 | * | |
1386 | * Returns 0 or error value | |
1387 | **/ | |
1388 | int i40e_sync_vsi_filters(struct i40e_vsi *vsi) | |
1389 | { | |
1390 | struct i40e_mac_filter *f, *ftmp; | |
1391 | bool promisc_forced_on = false; | |
1392 | bool add_happened = false; | |
1393 | int filter_list_len = 0; | |
1394 | u32 changed_flags = 0; | |
dcae29be | 1395 | i40e_status aq_ret = 0; |
41c445ff JB |
1396 | struct i40e_pf *pf; |
1397 | int num_add = 0; | |
1398 | int num_del = 0; | |
1399 | u16 cmd_flags; | |
1400 | ||
1401 | /* empty array typed pointers, kcalloc later */ | |
1402 | struct i40e_aqc_add_macvlan_element_data *add_list; | |
1403 | struct i40e_aqc_remove_macvlan_element_data *del_list; | |
1404 | ||
1405 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) | |
1406 | usleep_range(1000, 2000); | |
1407 | pf = vsi->back; | |
1408 | ||
1409 | if (vsi->netdev) { | |
1410 | changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; | |
1411 | vsi->current_netdev_flags = vsi->netdev->flags; | |
1412 | } | |
1413 | ||
1414 | if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { | |
1415 | vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; | |
1416 | ||
1417 | filter_list_len = pf->hw.aq.asq_buf_size / | |
1418 | sizeof(struct i40e_aqc_remove_macvlan_element_data); | |
1419 | del_list = kcalloc(filter_list_len, | |
1420 | sizeof(struct i40e_aqc_remove_macvlan_element_data), | |
1421 | GFP_KERNEL); | |
1422 | if (!del_list) | |
1423 | return -ENOMEM; | |
1424 | ||
1425 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1426 | if (!f->changed) | |
1427 | continue; | |
1428 | ||
1429 | if (f->counter != 0) | |
1430 | continue; | |
1431 | f->changed = false; | |
1432 | cmd_flags = 0; | |
1433 | ||
1434 | /* add to delete list */ | |
1435 | memcpy(del_list[num_del].mac_addr, | |
1436 | f->macaddr, ETH_ALEN); | |
1437 | del_list[num_del].vlan_tag = | |
1438 | cpu_to_le16((u16)(f->vlan == | |
1439 | I40E_VLAN_ANY ? 0 : f->vlan)); | |
1440 | ||
1441 | /* vlan0 as wild card to allow packets from all vlans */ | |
1442 | if (f->vlan == I40E_VLAN_ANY || | |
1443 | (vsi->netdev && !(vsi->netdev->features & | |
1444 | NETIF_F_HW_VLAN_CTAG_FILTER))) | |
1445 | cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; | |
1446 | cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; | |
1447 | del_list[num_del].flags = cmd_flags; | |
1448 | num_del++; | |
1449 | ||
1450 | /* unlink from filter list */ | |
1451 | list_del(&f->list); | |
1452 | kfree(f); | |
1453 | ||
1454 | /* flush a full buffer */ | |
1455 | if (num_del == filter_list_len) { | |
dcae29be | 1456 | aq_ret = i40e_aq_remove_macvlan(&pf->hw, |
41c445ff JB |
1457 | vsi->seid, del_list, num_del, |
1458 | NULL); | |
1459 | num_del = 0; | |
1460 | memset(del_list, 0, sizeof(*del_list)); | |
1461 | ||
dcae29be | 1462 | if (aq_ret) |
41c445ff JB |
1463 | dev_info(&pf->pdev->dev, |
1464 | "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", | |
dcae29be | 1465 | aq_ret, |
41c445ff JB |
1466 | pf->hw.aq.asq_last_status); |
1467 | } | |
1468 | } | |
1469 | if (num_del) { | |
dcae29be | 1470 | aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, |
41c445ff JB |
1471 | del_list, num_del, NULL); |
1472 | num_del = 0; | |
1473 | ||
dcae29be | 1474 | if (aq_ret) |
41c445ff JB |
1475 | dev_info(&pf->pdev->dev, |
1476 | "ignoring delete macvlan error, err %d, aq_err %d\n", | |
dcae29be | 1477 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1478 | } |
1479 | ||
1480 | kfree(del_list); | |
1481 | del_list = NULL; | |
1482 | ||
1483 | /* do all the adds now */ | |
1484 | filter_list_len = pf->hw.aq.asq_buf_size / | |
1485 | sizeof(struct i40e_aqc_add_macvlan_element_data), | |
1486 | add_list = kcalloc(filter_list_len, | |
1487 | sizeof(struct i40e_aqc_add_macvlan_element_data), | |
1488 | GFP_KERNEL); | |
1489 | if (!add_list) | |
1490 | return -ENOMEM; | |
1491 | ||
1492 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1493 | if (!f->changed) | |
1494 | continue; | |
1495 | ||
1496 | if (f->counter == 0) | |
1497 | continue; | |
1498 | f->changed = false; | |
1499 | add_happened = true; | |
1500 | cmd_flags = 0; | |
1501 | ||
1502 | /* add to add array */ | |
1503 | memcpy(add_list[num_add].mac_addr, | |
1504 | f->macaddr, ETH_ALEN); | |
1505 | add_list[num_add].vlan_tag = | |
1506 | cpu_to_le16( | |
1507 | (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); | |
1508 | add_list[num_add].queue_number = 0; | |
1509 | ||
1510 | cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; | |
1511 | ||
1512 | /* vlan0 as wild card to allow packets from all vlans */ | |
1513 | if (f->vlan == I40E_VLAN_ANY || (vsi->netdev && | |
1514 | !(vsi->netdev->features & | |
1515 | NETIF_F_HW_VLAN_CTAG_FILTER))) | |
1516 | cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN; | |
1517 | add_list[num_add].flags = cpu_to_le16(cmd_flags); | |
1518 | num_add++; | |
1519 | ||
1520 | /* flush a full buffer */ | |
1521 | if (num_add == filter_list_len) { | |
dcae29be JB |
1522 | aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, |
1523 | add_list, num_add, | |
1524 | NULL); | |
41c445ff JB |
1525 | num_add = 0; |
1526 | ||
dcae29be | 1527 | if (aq_ret) |
41c445ff JB |
1528 | break; |
1529 | memset(add_list, 0, sizeof(*add_list)); | |
1530 | } | |
1531 | } | |
1532 | if (num_add) { | |
dcae29be JB |
1533 | aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, |
1534 | add_list, num_add, NULL); | |
41c445ff JB |
1535 | num_add = 0; |
1536 | } | |
1537 | kfree(add_list); | |
1538 | add_list = NULL; | |
1539 | ||
dcae29be | 1540 | if (add_happened && (!aq_ret)) { |
41c445ff | 1541 | /* do nothing */; |
dcae29be | 1542 | } else if (add_happened && (aq_ret)) { |
41c445ff JB |
1543 | dev_info(&pf->pdev->dev, |
1544 | "add filter failed, err %d, aq_err %d\n", | |
dcae29be | 1545 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1546 | if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && |
1547 | !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1548 | &vsi->state)) { | |
1549 | promisc_forced_on = true; | |
1550 | set_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1551 | &vsi->state); | |
1552 | dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); | |
1553 | } | |
1554 | } | |
1555 | } | |
1556 | ||
1557 | /* check for changes in promiscuous modes */ | |
1558 | if (changed_flags & IFF_ALLMULTI) { | |
1559 | bool cur_multipromisc; | |
1560 | cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); | |
dcae29be JB |
1561 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, |
1562 | vsi->seid, | |
1563 | cur_multipromisc, | |
1564 | NULL); | |
1565 | if (aq_ret) | |
41c445ff JB |
1566 | dev_info(&pf->pdev->dev, |
1567 | "set multi promisc failed, err %d, aq_err %d\n", | |
dcae29be | 1568 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1569 | } |
1570 | if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { | |
1571 | bool cur_promisc; | |
1572 | cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || | |
1573 | test_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1574 | &vsi->state)); | |
dcae29be JB |
1575 | aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, |
1576 | vsi->seid, | |
1577 | cur_promisc, NULL); | |
1578 | if (aq_ret) | |
41c445ff JB |
1579 | dev_info(&pf->pdev->dev, |
1580 | "set uni promisc failed, err %d, aq_err %d\n", | |
dcae29be | 1581 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1582 | } |
1583 | ||
1584 | clear_bit(__I40E_CONFIG_BUSY, &vsi->state); | |
1585 | return 0; | |
1586 | } | |
1587 | ||
1588 | /** | |
1589 | * i40e_sync_filters_subtask - Sync the VSI filter list with HW | |
1590 | * @pf: board private structure | |
1591 | **/ | |
1592 | static void i40e_sync_filters_subtask(struct i40e_pf *pf) | |
1593 | { | |
1594 | int v; | |
1595 | ||
1596 | if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) | |
1597 | return; | |
1598 | pf->flags &= ~I40E_FLAG_FILTER_SYNC; | |
1599 | ||
1600 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
1601 | if (pf->vsi[v] && | |
1602 | (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) | |
1603 | i40e_sync_vsi_filters(pf->vsi[v]); | |
1604 | } | |
1605 | } | |
1606 | ||
1607 | /** | |
1608 | * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit | |
1609 | * @netdev: network interface device structure | |
1610 | * @new_mtu: new value for maximum frame size | |
1611 | * | |
1612 | * Returns 0 on success, negative on failure | |
1613 | **/ | |
1614 | static int i40e_change_mtu(struct net_device *netdev, int new_mtu) | |
1615 | { | |
1616 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1617 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; | |
1618 | struct i40e_vsi *vsi = np->vsi; | |
1619 | ||
1620 | /* MTU < 68 is an error and causes problems on some kernels */ | |
1621 | if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) | |
1622 | return -EINVAL; | |
1623 | ||
1624 | netdev_info(netdev, "changing MTU from %d to %d\n", | |
1625 | netdev->mtu, new_mtu); | |
1626 | netdev->mtu = new_mtu; | |
1627 | if (netif_running(netdev)) | |
1628 | i40e_vsi_reinit_locked(vsi); | |
1629 | ||
1630 | return 0; | |
1631 | } | |
1632 | ||
1633 | /** | |
1634 | * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI | |
1635 | * @vsi: the vsi being adjusted | |
1636 | **/ | |
1637 | void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) | |
1638 | { | |
1639 | struct i40e_vsi_context ctxt; | |
1640 | i40e_status ret; | |
1641 | ||
1642 | if ((vsi->info.valid_sections & | |
1643 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
1644 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) | |
1645 | return; /* already enabled */ | |
1646 | ||
1647 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
1648 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
1649 | I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; | |
1650 | ||
1651 | ctxt.seid = vsi->seid; | |
1652 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
1653 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
1654 | if (ret) { | |
1655 | dev_info(&vsi->back->pdev->dev, | |
1656 | "%s: update vsi failed, aq_err=%d\n", | |
1657 | __func__, vsi->back->hw.aq.asq_last_status); | |
1658 | } | |
1659 | } | |
1660 | ||
1661 | /** | |
1662 | * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI | |
1663 | * @vsi: the vsi being adjusted | |
1664 | **/ | |
1665 | void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) | |
1666 | { | |
1667 | struct i40e_vsi_context ctxt; | |
1668 | i40e_status ret; | |
1669 | ||
1670 | if ((vsi->info.valid_sections & | |
1671 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
1672 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == | |
1673 | I40E_AQ_VSI_PVLAN_EMOD_MASK)) | |
1674 | return; /* already disabled */ | |
1675 | ||
1676 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
1677 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
1678 | I40E_AQ_VSI_PVLAN_EMOD_NOTHING; | |
1679 | ||
1680 | ctxt.seid = vsi->seid; | |
1681 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
1682 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
1683 | if (ret) { | |
1684 | dev_info(&vsi->back->pdev->dev, | |
1685 | "%s: update vsi failed, aq_err=%d\n", | |
1686 | __func__, vsi->back->hw.aq.asq_last_status); | |
1687 | } | |
1688 | } | |
1689 | ||
1690 | /** | |
1691 | * i40e_vlan_rx_register - Setup or shutdown vlan offload | |
1692 | * @netdev: network interface to be adjusted | |
1693 | * @features: netdev features to test if VLAN offload is enabled or not | |
1694 | **/ | |
1695 | static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) | |
1696 | { | |
1697 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1698 | struct i40e_vsi *vsi = np->vsi; | |
1699 | ||
1700 | if (features & NETIF_F_HW_VLAN_CTAG_RX) | |
1701 | i40e_vlan_stripping_enable(vsi); | |
1702 | else | |
1703 | i40e_vlan_stripping_disable(vsi); | |
1704 | } | |
1705 | ||
1706 | /** | |
1707 | * i40e_vsi_add_vlan - Add vsi membership for given vlan | |
1708 | * @vsi: the vsi being configured | |
1709 | * @vid: vlan id to be added (0 = untagged only , -1 = any) | |
1710 | **/ | |
1711 | int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) | |
1712 | { | |
1713 | struct i40e_mac_filter *f, *add_f; | |
1714 | bool is_netdev, is_vf; | |
1715 | int ret; | |
1716 | ||
1717 | is_vf = (vsi->type == I40E_VSI_SRIOV); | |
1718 | is_netdev = !!(vsi->netdev); | |
1719 | ||
1720 | if (is_netdev) { | |
1721 | add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, | |
1722 | is_vf, is_netdev); | |
1723 | if (!add_f) { | |
1724 | dev_info(&vsi->back->pdev->dev, | |
1725 | "Could not add vlan filter %d for %pM\n", | |
1726 | vid, vsi->netdev->dev_addr); | |
1727 | return -ENOMEM; | |
1728 | } | |
1729 | } | |
1730 | ||
1731 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1732 | add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); | |
1733 | if (!add_f) { | |
1734 | dev_info(&vsi->back->pdev->dev, | |
1735 | "Could not add vlan filter %d for %pM\n", | |
1736 | vid, f->macaddr); | |
1737 | return -ENOMEM; | |
1738 | } | |
1739 | } | |
1740 | ||
1741 | ret = i40e_sync_vsi_filters(vsi); | |
1742 | if (ret) { | |
1743 | dev_info(&vsi->back->pdev->dev, | |
1744 | "Could not sync filters for vid %d\n", vid); | |
1745 | return ret; | |
1746 | } | |
1747 | ||
1748 | /* Now if we add a vlan tag, make sure to check if it is the first | |
1749 | * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" | |
1750 | * with 0, so we now accept untagged and specified tagged traffic | |
1751 | * (and not any taged and untagged) | |
1752 | */ | |
1753 | if (vid > 0) { | |
1754 | if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, | |
1755 | I40E_VLAN_ANY, | |
1756 | is_vf, is_netdev)) { | |
1757 | i40e_del_filter(vsi, vsi->netdev->dev_addr, | |
1758 | I40E_VLAN_ANY, is_vf, is_netdev); | |
1759 | add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, | |
1760 | is_vf, is_netdev); | |
1761 | if (!add_f) { | |
1762 | dev_info(&vsi->back->pdev->dev, | |
1763 | "Could not add filter 0 for %pM\n", | |
1764 | vsi->netdev->dev_addr); | |
1765 | return -ENOMEM; | |
1766 | } | |
1767 | } | |
1768 | ||
1769 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1770 | if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1771 | is_vf, is_netdev)) { | |
1772 | i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1773 | is_vf, is_netdev); | |
1774 | add_f = i40e_add_filter(vsi, f->macaddr, | |
1775 | 0, is_vf, is_netdev); | |
1776 | if (!add_f) { | |
1777 | dev_info(&vsi->back->pdev->dev, | |
1778 | "Could not add filter 0 for %pM\n", | |
1779 | f->macaddr); | |
1780 | return -ENOMEM; | |
1781 | } | |
1782 | } | |
1783 | } | |
1784 | ret = i40e_sync_vsi_filters(vsi); | |
1785 | } | |
1786 | ||
1787 | return ret; | |
1788 | } | |
1789 | ||
1790 | /** | |
1791 | * i40e_vsi_kill_vlan - Remove vsi membership for given vlan | |
1792 | * @vsi: the vsi being configured | |
1793 | * @vid: vlan id to be removed (0 = untagged only , -1 = any) | |
078b5876 JB |
1794 | * |
1795 | * Return: 0 on success or negative otherwise | |
41c445ff JB |
1796 | **/ |
1797 | int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) | |
1798 | { | |
1799 | struct net_device *netdev = vsi->netdev; | |
1800 | struct i40e_mac_filter *f, *add_f; | |
1801 | bool is_vf, is_netdev; | |
1802 | int filter_count = 0; | |
1803 | int ret; | |
1804 | ||
1805 | is_vf = (vsi->type == I40E_VSI_SRIOV); | |
1806 | is_netdev = !!(netdev); | |
1807 | ||
1808 | if (is_netdev) | |
1809 | i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); | |
1810 | ||
1811 | list_for_each_entry(f, &vsi->mac_filter_list, list) | |
1812 | i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); | |
1813 | ||
1814 | ret = i40e_sync_vsi_filters(vsi); | |
1815 | if (ret) { | |
1816 | dev_info(&vsi->back->pdev->dev, "Could not sync filters\n"); | |
1817 | return ret; | |
1818 | } | |
1819 | ||
1820 | /* go through all the filters for this VSI and if there is only | |
1821 | * vid == 0 it means there are no other filters, so vid 0 must | |
1822 | * be replaced with -1. This signifies that we should from now | |
1823 | * on accept any traffic (with any tag present, or untagged) | |
1824 | */ | |
1825 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1826 | if (is_netdev) { | |
1827 | if (f->vlan && | |
1828 | ether_addr_equal(netdev->dev_addr, f->macaddr)) | |
1829 | filter_count++; | |
1830 | } | |
1831 | ||
1832 | if (f->vlan) | |
1833 | filter_count++; | |
1834 | } | |
1835 | ||
1836 | if (!filter_count && is_netdev) { | |
1837 | i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); | |
1838 | f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, | |
1839 | is_vf, is_netdev); | |
1840 | if (!f) { | |
1841 | dev_info(&vsi->back->pdev->dev, | |
1842 | "Could not add filter %d for %pM\n", | |
1843 | I40E_VLAN_ANY, netdev->dev_addr); | |
1844 | return -ENOMEM; | |
1845 | } | |
1846 | } | |
1847 | ||
1848 | if (!filter_count) { | |
1849 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1850 | i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); | |
1851 | add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1852 | is_vf, is_netdev); | |
1853 | if (!add_f) { | |
1854 | dev_info(&vsi->back->pdev->dev, | |
1855 | "Could not add filter %d for %pM\n", | |
1856 | I40E_VLAN_ANY, f->macaddr); | |
1857 | return -ENOMEM; | |
1858 | } | |
1859 | } | |
1860 | } | |
1861 | ||
1862 | return i40e_sync_vsi_filters(vsi); | |
1863 | } | |
1864 | ||
1865 | /** | |
1866 | * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload | |
1867 | * @netdev: network interface to be adjusted | |
1868 | * @vid: vlan id to be added | |
078b5876 JB |
1869 | * |
1870 | * net_device_ops implementation for adding vlan ids | |
41c445ff JB |
1871 | **/ |
1872 | static int i40e_vlan_rx_add_vid(struct net_device *netdev, | |
1873 | __always_unused __be16 proto, u16 vid) | |
1874 | { | |
1875 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1876 | struct i40e_vsi *vsi = np->vsi; | |
078b5876 | 1877 | int ret = 0; |
41c445ff JB |
1878 | |
1879 | if (vid > 4095) | |
078b5876 JB |
1880 | return -EINVAL; |
1881 | ||
1882 | netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); | |
41c445ff | 1883 | |
41c445ff JB |
1884 | /* If the network stack called us with vid = 0, we should |
1885 | * indicate to i40e_vsi_add_vlan() that we want to receive | |
1886 | * any traffic (i.e. with any vlan tag, or untagged) | |
1887 | */ | |
1888 | ret = i40e_vsi_add_vlan(vsi, vid ? vid : I40E_VLAN_ANY); | |
1889 | ||
078b5876 JB |
1890 | if (!ret && (vid < VLAN_N_VID)) |
1891 | set_bit(vid, vsi->active_vlans); | |
41c445ff | 1892 | |
078b5876 | 1893 | return ret; |
41c445ff JB |
1894 | } |
1895 | ||
1896 | /** | |
1897 | * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload | |
1898 | * @netdev: network interface to be adjusted | |
1899 | * @vid: vlan id to be removed | |
078b5876 JB |
1900 | * |
1901 | * net_device_ops implementation for adding vlan ids | |
41c445ff JB |
1902 | **/ |
1903 | static int i40e_vlan_rx_kill_vid(struct net_device *netdev, | |
1904 | __always_unused __be16 proto, u16 vid) | |
1905 | { | |
1906 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1907 | struct i40e_vsi *vsi = np->vsi; | |
1908 | ||
078b5876 JB |
1909 | netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); |
1910 | ||
41c445ff JB |
1911 | /* return code is ignored as there is nothing a user |
1912 | * can do about failure to remove and a log message was | |
078b5876 | 1913 | * already printed from the other function |
41c445ff JB |
1914 | */ |
1915 | i40e_vsi_kill_vlan(vsi, vid); | |
1916 | ||
1917 | clear_bit(vid, vsi->active_vlans); | |
078b5876 | 1918 | |
41c445ff JB |
1919 | return 0; |
1920 | } | |
1921 | ||
1922 | /** | |
1923 | * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up | |
1924 | * @vsi: the vsi being brought back up | |
1925 | **/ | |
1926 | static void i40e_restore_vlan(struct i40e_vsi *vsi) | |
1927 | { | |
1928 | u16 vid; | |
1929 | ||
1930 | if (!vsi->netdev) | |
1931 | return; | |
1932 | ||
1933 | i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); | |
1934 | ||
1935 | for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) | |
1936 | i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), | |
1937 | vid); | |
1938 | } | |
1939 | ||
1940 | /** | |
1941 | * i40e_vsi_add_pvid - Add pvid for the VSI | |
1942 | * @vsi: the vsi being adjusted | |
1943 | * @vid: the vlan id to set as a PVID | |
1944 | **/ | |
dcae29be | 1945 | int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) |
41c445ff JB |
1946 | { |
1947 | struct i40e_vsi_context ctxt; | |
dcae29be | 1948 | i40e_status aq_ret; |
41c445ff JB |
1949 | |
1950 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
1951 | vsi->info.pvid = cpu_to_le16(vid); | |
1952 | vsi->info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_INSERT_PVID; | |
1953 | vsi->info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_UNTAGGED; | |
1954 | ||
1955 | ctxt.seid = vsi->seid; | |
1956 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
dcae29be JB |
1957 | aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
1958 | if (aq_ret) { | |
41c445ff JB |
1959 | dev_info(&vsi->back->pdev->dev, |
1960 | "%s: update vsi failed, aq_err=%d\n", | |
1961 | __func__, vsi->back->hw.aq.asq_last_status); | |
dcae29be | 1962 | return -ENOENT; |
41c445ff JB |
1963 | } |
1964 | ||
dcae29be | 1965 | return 0; |
41c445ff JB |
1966 | } |
1967 | ||
1968 | /** | |
1969 | * i40e_vsi_remove_pvid - Remove the pvid from the VSI | |
1970 | * @vsi: the vsi being adjusted | |
1971 | * | |
1972 | * Just use the vlan_rx_register() service to put it back to normal | |
1973 | **/ | |
1974 | void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) | |
1975 | { | |
1976 | vsi->info.pvid = 0; | |
1977 | i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); | |
1978 | } | |
1979 | ||
1980 | /** | |
1981 | * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources | |
1982 | * @vsi: ptr to the VSI | |
1983 | * | |
1984 | * If this function returns with an error, then it's possible one or | |
1985 | * more of the rings is populated (while the rest are not). It is the | |
1986 | * callers duty to clean those orphaned rings. | |
1987 | * | |
1988 | * Return 0 on success, negative on failure | |
1989 | **/ | |
1990 | static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) | |
1991 | { | |
1992 | int i, err = 0; | |
1993 | ||
1994 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
1995 | err = i40e_setup_tx_descriptors(&vsi->tx_rings[i]); | |
1996 | ||
1997 | return err; | |
1998 | } | |
1999 | ||
2000 | /** | |
2001 | * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues | |
2002 | * @vsi: ptr to the VSI | |
2003 | * | |
2004 | * Free VSI's transmit software resources | |
2005 | **/ | |
2006 | static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) | |
2007 | { | |
2008 | int i; | |
2009 | ||
2010 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
2011 | if (vsi->tx_rings[i].desc) | |
2012 | i40e_free_tx_resources(&vsi->tx_rings[i]); | |
2013 | } | |
2014 | ||
2015 | /** | |
2016 | * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources | |
2017 | * @vsi: ptr to the VSI | |
2018 | * | |
2019 | * If this function returns with an error, then it's possible one or | |
2020 | * more of the rings is populated (while the rest are not). It is the | |
2021 | * callers duty to clean those orphaned rings. | |
2022 | * | |
2023 | * Return 0 on success, negative on failure | |
2024 | **/ | |
2025 | static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) | |
2026 | { | |
2027 | int i, err = 0; | |
2028 | ||
2029 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
2030 | err = i40e_setup_rx_descriptors(&vsi->rx_rings[i]); | |
2031 | return err; | |
2032 | } | |
2033 | ||
2034 | /** | |
2035 | * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues | |
2036 | * @vsi: ptr to the VSI | |
2037 | * | |
2038 | * Free all receive software resources | |
2039 | **/ | |
2040 | static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) | |
2041 | { | |
2042 | int i; | |
2043 | ||
2044 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
2045 | if (vsi->rx_rings[i].desc) | |
2046 | i40e_free_rx_resources(&vsi->rx_rings[i]); | |
2047 | } | |
2048 | ||
2049 | /** | |
2050 | * i40e_configure_tx_ring - Configure a transmit ring context and rest | |
2051 | * @ring: The Tx ring to configure | |
2052 | * | |
2053 | * Configure the Tx descriptor ring in the HMC context. | |
2054 | **/ | |
2055 | static int i40e_configure_tx_ring(struct i40e_ring *ring) | |
2056 | { | |
2057 | struct i40e_vsi *vsi = ring->vsi; | |
2058 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2059 | struct i40e_hw *hw = &vsi->back->hw; | |
2060 | struct i40e_hmc_obj_txq tx_ctx; | |
2061 | i40e_status err = 0; | |
2062 | u32 qtx_ctl = 0; | |
2063 | ||
2064 | /* some ATR related tx ring init */ | |
2065 | if (vsi->back->flags & I40E_FLAG_FDIR_ATR_ENABLED) { | |
2066 | ring->atr_sample_rate = vsi->back->atr_sample_rate; | |
2067 | ring->atr_count = 0; | |
2068 | } else { | |
2069 | ring->atr_sample_rate = 0; | |
2070 | } | |
2071 | ||
2072 | /* initialize XPS */ | |
2073 | if (ring->q_vector && ring->netdev && | |
2074 | !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) | |
2075 | netif_set_xps_queue(ring->netdev, | |
2076 | &ring->q_vector->affinity_mask, | |
2077 | ring->queue_index); | |
2078 | ||
2079 | /* clear the context structure first */ | |
2080 | memset(&tx_ctx, 0, sizeof(tx_ctx)); | |
2081 | ||
2082 | tx_ctx.new_context = 1; | |
2083 | tx_ctx.base = (ring->dma / 128); | |
2084 | tx_ctx.qlen = ring->count; | |
2085 | tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FDIR_ENABLED | | |
2086 | I40E_FLAG_FDIR_ATR_ENABLED)); | |
2087 | ||
2088 | /* As part of VSI creation/update, FW allocates certain | |
2089 | * Tx arbitration queue sets for each TC enabled for | |
2090 | * the VSI. The FW returns the handles to these queue | |
2091 | * sets as part of the response buffer to Add VSI, | |
2092 | * Update VSI, etc. AQ commands. It is expected that | |
2093 | * these queue set handles be associated with the Tx | |
2094 | * queues by the driver as part of the TX queue context | |
2095 | * initialization. This has to be done regardless of | |
2096 | * DCB as by default everything is mapped to TC0. | |
2097 | */ | |
2098 | tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); | |
2099 | tx_ctx.rdylist_act = 0; | |
2100 | ||
2101 | /* clear the context in the HMC */ | |
2102 | err = i40e_clear_lan_tx_queue_context(hw, pf_q); | |
2103 | if (err) { | |
2104 | dev_info(&vsi->back->pdev->dev, | |
2105 | "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", | |
2106 | ring->queue_index, pf_q, err); | |
2107 | return -ENOMEM; | |
2108 | } | |
2109 | ||
2110 | /* set the context in the HMC */ | |
2111 | err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); | |
2112 | if (err) { | |
2113 | dev_info(&vsi->back->pdev->dev, | |
2114 | "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", | |
2115 | ring->queue_index, pf_q, err); | |
2116 | return -ENOMEM; | |
2117 | } | |
2118 | ||
2119 | /* Now associate this queue with this PCI function */ | |
2120 | qtx_ctl = I40E_QTX_CTL_PF_QUEUE; | |
2121 | qtx_ctl |= ((hw->hmc.hmc_fn_id << I40E_QTX_CTL_PF_INDX_SHIFT) | |
2122 | & I40E_QTX_CTL_PF_INDX_MASK); | |
2123 | wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); | |
2124 | i40e_flush(hw); | |
2125 | ||
2126 | clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); | |
2127 | ||
2128 | /* cache tail off for easier writes later */ | |
2129 | ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); | |
2130 | ||
2131 | return 0; | |
2132 | } | |
2133 | ||
2134 | /** | |
2135 | * i40e_configure_rx_ring - Configure a receive ring context | |
2136 | * @ring: The Rx ring to configure | |
2137 | * | |
2138 | * Configure the Rx descriptor ring in the HMC context. | |
2139 | **/ | |
2140 | static int i40e_configure_rx_ring(struct i40e_ring *ring) | |
2141 | { | |
2142 | struct i40e_vsi *vsi = ring->vsi; | |
2143 | u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; | |
2144 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2145 | struct i40e_hw *hw = &vsi->back->hw; | |
2146 | struct i40e_hmc_obj_rxq rx_ctx; | |
2147 | i40e_status err = 0; | |
2148 | ||
2149 | ring->state = 0; | |
2150 | ||
2151 | /* clear the context structure first */ | |
2152 | memset(&rx_ctx, 0, sizeof(rx_ctx)); | |
2153 | ||
2154 | ring->rx_buf_len = vsi->rx_buf_len; | |
2155 | ring->rx_hdr_len = vsi->rx_hdr_len; | |
2156 | ||
2157 | rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; | |
2158 | rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT; | |
2159 | ||
2160 | rx_ctx.base = (ring->dma / 128); | |
2161 | rx_ctx.qlen = ring->count; | |
2162 | ||
2163 | if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) { | |
2164 | set_ring_16byte_desc_enabled(ring); | |
2165 | rx_ctx.dsize = 0; | |
2166 | } else { | |
2167 | rx_ctx.dsize = 1; | |
2168 | } | |
2169 | ||
2170 | rx_ctx.dtype = vsi->dtype; | |
2171 | if (vsi->dtype) { | |
2172 | set_ring_ps_enabled(ring); | |
2173 | rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | | |
2174 | I40E_RX_SPLIT_IP | | |
2175 | I40E_RX_SPLIT_TCP_UDP | | |
2176 | I40E_RX_SPLIT_SCTP; | |
2177 | } else { | |
2178 | rx_ctx.hsplit_0 = 0; | |
2179 | } | |
2180 | ||
2181 | rx_ctx.rxmax = min_t(u16, vsi->max_frame, | |
2182 | (chain_len * ring->rx_buf_len)); | |
2183 | rx_ctx.tphrdesc_ena = 1; | |
2184 | rx_ctx.tphwdesc_ena = 1; | |
2185 | rx_ctx.tphdata_ena = 1; | |
2186 | rx_ctx.tphhead_ena = 1; | |
2187 | rx_ctx.lrxqthresh = 2; | |
2188 | rx_ctx.crcstrip = 1; | |
2189 | rx_ctx.l2tsel = 1; | |
2190 | rx_ctx.showiv = 1; | |
2191 | ||
2192 | /* clear the context in the HMC */ | |
2193 | err = i40e_clear_lan_rx_queue_context(hw, pf_q); | |
2194 | if (err) { | |
2195 | dev_info(&vsi->back->pdev->dev, | |
2196 | "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
2197 | ring->queue_index, pf_q, err); | |
2198 | return -ENOMEM; | |
2199 | } | |
2200 | ||
2201 | /* set the context in the HMC */ | |
2202 | err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); | |
2203 | if (err) { | |
2204 | dev_info(&vsi->back->pdev->dev, | |
2205 | "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
2206 | ring->queue_index, pf_q, err); | |
2207 | return -ENOMEM; | |
2208 | } | |
2209 | ||
2210 | /* cache tail for quicker writes, and clear the reg before use */ | |
2211 | ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); | |
2212 | writel(0, ring->tail); | |
2213 | ||
2214 | i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); | |
2215 | ||
2216 | return 0; | |
2217 | } | |
2218 | ||
2219 | /** | |
2220 | * i40e_vsi_configure_tx - Configure the VSI for Tx | |
2221 | * @vsi: VSI structure describing this set of rings and resources | |
2222 | * | |
2223 | * Configure the Tx VSI for operation. | |
2224 | **/ | |
2225 | static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) | |
2226 | { | |
2227 | int err = 0; | |
2228 | u16 i; | |
2229 | ||
2230 | for (i = 0; (i < vsi->num_queue_pairs) && (!err); i++) | |
2231 | err = i40e_configure_tx_ring(&vsi->tx_rings[i]); | |
2232 | ||
2233 | return err; | |
2234 | } | |
2235 | ||
2236 | /** | |
2237 | * i40e_vsi_configure_rx - Configure the VSI for Rx | |
2238 | * @vsi: the VSI being configured | |
2239 | * | |
2240 | * Configure the Rx VSI for operation. | |
2241 | **/ | |
2242 | static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) | |
2243 | { | |
2244 | int err = 0; | |
2245 | u16 i; | |
2246 | ||
2247 | if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) | |
2248 | vsi->max_frame = vsi->netdev->mtu + ETH_HLEN | |
2249 | + ETH_FCS_LEN + VLAN_HLEN; | |
2250 | else | |
2251 | vsi->max_frame = I40E_RXBUFFER_2048; | |
2252 | ||
2253 | /* figure out correct receive buffer length */ | |
2254 | switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED | | |
2255 | I40E_FLAG_RX_PS_ENABLED)) { | |
2256 | case I40E_FLAG_RX_1BUF_ENABLED: | |
2257 | vsi->rx_hdr_len = 0; | |
2258 | vsi->rx_buf_len = vsi->max_frame; | |
2259 | vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; | |
2260 | break; | |
2261 | case I40E_FLAG_RX_PS_ENABLED: | |
2262 | vsi->rx_hdr_len = I40E_RX_HDR_SIZE; | |
2263 | vsi->rx_buf_len = I40E_RXBUFFER_2048; | |
2264 | vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT; | |
2265 | break; | |
2266 | default: | |
2267 | vsi->rx_hdr_len = I40E_RX_HDR_SIZE; | |
2268 | vsi->rx_buf_len = I40E_RXBUFFER_2048; | |
2269 | vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS; | |
2270 | break; | |
2271 | } | |
2272 | ||
2273 | /* round up for the chip's needs */ | |
2274 | vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len, | |
2275 | (1 << I40E_RXQ_CTX_HBUFF_SHIFT)); | |
2276 | vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, | |
2277 | (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); | |
2278 | ||
2279 | /* set up individual rings */ | |
2280 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
2281 | err = i40e_configure_rx_ring(&vsi->rx_rings[i]); | |
2282 | ||
2283 | return err; | |
2284 | } | |
2285 | ||
2286 | /** | |
2287 | * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC | |
2288 | * @vsi: ptr to the VSI | |
2289 | **/ | |
2290 | static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) | |
2291 | { | |
2292 | u16 qoffset, qcount; | |
2293 | int i, n; | |
2294 | ||
2295 | if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) | |
2296 | return; | |
2297 | ||
2298 | for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { | |
2299 | if (!(vsi->tc_config.enabled_tc & (1 << n))) | |
2300 | continue; | |
2301 | ||
2302 | qoffset = vsi->tc_config.tc_info[n].qoffset; | |
2303 | qcount = vsi->tc_config.tc_info[n].qcount; | |
2304 | for (i = qoffset; i < (qoffset + qcount); i++) { | |
2305 | struct i40e_ring *rx_ring = &vsi->rx_rings[i]; | |
2306 | struct i40e_ring *tx_ring = &vsi->tx_rings[i]; | |
2307 | rx_ring->dcb_tc = n; | |
2308 | tx_ring->dcb_tc = n; | |
2309 | } | |
2310 | } | |
2311 | } | |
2312 | ||
2313 | /** | |
2314 | * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI | |
2315 | * @vsi: ptr to the VSI | |
2316 | **/ | |
2317 | static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) | |
2318 | { | |
2319 | if (vsi->netdev) | |
2320 | i40e_set_rx_mode(vsi->netdev); | |
2321 | } | |
2322 | ||
2323 | /** | |
2324 | * i40e_vsi_configure - Set up the VSI for action | |
2325 | * @vsi: the VSI being configured | |
2326 | **/ | |
2327 | static int i40e_vsi_configure(struct i40e_vsi *vsi) | |
2328 | { | |
2329 | int err; | |
2330 | ||
2331 | i40e_set_vsi_rx_mode(vsi); | |
2332 | i40e_restore_vlan(vsi); | |
2333 | i40e_vsi_config_dcb_rings(vsi); | |
2334 | err = i40e_vsi_configure_tx(vsi); | |
2335 | if (!err) | |
2336 | err = i40e_vsi_configure_rx(vsi); | |
2337 | ||
2338 | return err; | |
2339 | } | |
2340 | ||
2341 | /** | |
2342 | * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW | |
2343 | * @vsi: the VSI being configured | |
2344 | **/ | |
2345 | static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) | |
2346 | { | |
2347 | struct i40e_pf *pf = vsi->back; | |
2348 | struct i40e_q_vector *q_vector; | |
2349 | struct i40e_hw *hw = &pf->hw; | |
2350 | u16 vector; | |
2351 | int i, q; | |
2352 | u32 val; | |
2353 | u32 qp; | |
2354 | ||
2355 | /* The interrupt indexing is offset by 1 in the PFINT_ITRn | |
2356 | * and PFINT_LNKLSTn registers, e.g.: | |
2357 | * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) | |
2358 | */ | |
2359 | qp = vsi->base_queue; | |
2360 | vector = vsi->base_vector; | |
493fb300 AD |
2361 | for (i = 0; i < vsi->num_q_vectors; i++, vector++) { |
2362 | q_vector = vsi->q_vectors[i]; | |
41c445ff JB |
2363 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); |
2364 | q_vector->rx.latency_range = I40E_LOW_LATENCY; | |
2365 | wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), | |
2366 | q_vector->rx.itr); | |
2367 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); | |
2368 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
2369 | wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), | |
2370 | q_vector->tx.itr); | |
2371 | ||
2372 | /* Linked list for the queuepairs assigned to this vector */ | |
2373 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); | |
2374 | for (q = 0; q < q_vector->num_ringpairs; q++) { | |
2375 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
2376 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
2377 | (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | | |
2378 | (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| | |
2379 | (I40E_QUEUE_TYPE_TX | |
2380 | << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); | |
2381 | ||
2382 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
2383 | ||
2384 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
2385 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
2386 | (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | | |
2387 | ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| | |
2388 | (I40E_QUEUE_TYPE_RX | |
2389 | << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
2390 | ||
2391 | /* Terminate the linked list */ | |
2392 | if (q == (q_vector->num_ringpairs - 1)) | |
2393 | val |= (I40E_QUEUE_END_OF_LIST | |
2394 | << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
2395 | ||
2396 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
2397 | qp++; | |
2398 | } | |
2399 | } | |
2400 | ||
2401 | i40e_flush(hw); | |
2402 | } | |
2403 | ||
2404 | /** | |
2405 | * i40e_enable_misc_int_causes - enable the non-queue interrupts | |
2406 | * @hw: ptr to the hardware info | |
2407 | **/ | |
2408 | static void i40e_enable_misc_int_causes(struct i40e_hw *hw) | |
2409 | { | |
2410 | u32 val; | |
2411 | ||
2412 | /* clear things first */ | |
2413 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ | |
2414 | rd32(hw, I40E_PFINT_ICR0); /* read to clear */ | |
2415 | ||
2416 | val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | | |
2417 | I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | | |
2418 | I40E_PFINT_ICR0_ENA_GRST_MASK | | |
2419 | I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | | |
2420 | I40E_PFINT_ICR0_ENA_GPIO_MASK | | |
2421 | I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK | | |
2422 | I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | | |
2423 | I40E_PFINT_ICR0_ENA_VFLR_MASK | | |
2424 | I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
2425 | ||
2426 | wr32(hw, I40E_PFINT_ICR0_ENA, val); | |
2427 | ||
2428 | /* SW_ITR_IDX = 0, but don't change INTENA */ | |
2429 | wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK | | |
2430 | I40E_PFINT_DYN_CTLN_INTENA_MSK_MASK); | |
2431 | ||
2432 | /* OTHER_ITR_IDX = 0 */ | |
2433 | wr32(hw, I40E_PFINT_STAT_CTL0, 0); | |
2434 | } | |
2435 | ||
2436 | /** | |
2437 | * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW | |
2438 | * @vsi: the VSI being configured | |
2439 | **/ | |
2440 | static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) | |
2441 | { | |
493fb300 | 2442 | struct i40e_q_vector *q_vector = vsi->q_vectors[0]; |
41c445ff JB |
2443 | struct i40e_pf *pf = vsi->back; |
2444 | struct i40e_hw *hw = &pf->hw; | |
2445 | u32 val; | |
2446 | ||
2447 | /* set the ITR configuration */ | |
2448 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); | |
2449 | q_vector->rx.latency_range = I40E_LOW_LATENCY; | |
2450 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); | |
2451 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); | |
2452 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
2453 | wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); | |
2454 | ||
2455 | i40e_enable_misc_int_causes(hw); | |
2456 | ||
2457 | /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ | |
2458 | wr32(hw, I40E_PFINT_LNKLST0, 0); | |
2459 | ||
2460 | /* Associate the queue pair to the vector and enable the q int */ | |
2461 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
2462 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
2463 | (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
2464 | ||
2465 | wr32(hw, I40E_QINT_RQCTL(0), val); | |
2466 | ||
2467 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
2468 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
2469 | (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
2470 | ||
2471 | wr32(hw, I40E_QINT_TQCTL(0), val); | |
2472 | i40e_flush(hw); | |
2473 | } | |
2474 | ||
2475 | /** | |
2476 | * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 | |
2477 | * @pf: board private structure | |
2478 | **/ | |
2479 | static void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) | |
2480 | { | |
2481 | struct i40e_hw *hw = &pf->hw; | |
2482 | u32 val; | |
2483 | ||
2484 | val = I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
2485 | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | | |
2486 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); | |
2487 | ||
2488 | wr32(hw, I40E_PFINT_DYN_CTL0, val); | |
2489 | i40e_flush(hw); | |
2490 | } | |
2491 | ||
2492 | /** | |
2493 | * i40e_irq_dynamic_enable - Enable default interrupt generation settings | |
2494 | * @vsi: pointer to a vsi | |
2495 | * @vector: enable a particular Hw Interrupt vector | |
2496 | **/ | |
2497 | void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) | |
2498 | { | |
2499 | struct i40e_pf *pf = vsi->back; | |
2500 | struct i40e_hw *hw = &pf->hw; | |
2501 | u32 val; | |
2502 | ||
2503 | val = I40E_PFINT_DYN_CTLN_INTENA_MASK | | |
2504 | I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | | |
2505 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); | |
2506 | wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); | |
2507 | i40e_flush(hw); | |
2508 | } | |
2509 | ||
2510 | /** | |
2511 | * i40e_msix_clean_rings - MSIX mode Interrupt Handler | |
2512 | * @irq: interrupt number | |
2513 | * @data: pointer to a q_vector | |
2514 | **/ | |
2515 | static irqreturn_t i40e_msix_clean_rings(int irq, void *data) | |
2516 | { | |
2517 | struct i40e_q_vector *q_vector = data; | |
2518 | ||
2519 | if (!q_vector->tx.ring[0] && !q_vector->rx.ring[0]) | |
2520 | return IRQ_HANDLED; | |
2521 | ||
2522 | napi_schedule(&q_vector->napi); | |
2523 | ||
2524 | return IRQ_HANDLED; | |
2525 | } | |
2526 | ||
2527 | /** | |
2528 | * i40e_fdir_clean_rings - Interrupt Handler for FDIR rings | |
2529 | * @irq: interrupt number | |
2530 | * @data: pointer to a q_vector | |
2531 | **/ | |
2532 | static irqreturn_t i40e_fdir_clean_rings(int irq, void *data) | |
2533 | { | |
2534 | struct i40e_q_vector *q_vector = data; | |
2535 | ||
2536 | if (!q_vector->tx.ring[0] && !q_vector->rx.ring[0]) | |
2537 | return IRQ_HANDLED; | |
2538 | ||
2539 | pr_info("fdir ring cleaning needed\n"); | |
2540 | ||
2541 | return IRQ_HANDLED; | |
2542 | } | |
2543 | ||
2544 | /** | |
2545 | * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts | |
2546 | * @vsi: the VSI being configured | |
2547 | * @basename: name for the vector | |
2548 | * | |
2549 | * Allocates MSI-X vectors and requests interrupts from the kernel. | |
2550 | **/ | |
2551 | static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) | |
2552 | { | |
2553 | int q_vectors = vsi->num_q_vectors; | |
2554 | struct i40e_pf *pf = vsi->back; | |
2555 | int base = vsi->base_vector; | |
2556 | int rx_int_idx = 0; | |
2557 | int tx_int_idx = 0; | |
2558 | int vector, err; | |
2559 | ||
2560 | for (vector = 0; vector < q_vectors; vector++) { | |
493fb300 | 2561 | struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; |
41c445ff JB |
2562 | |
2563 | if (q_vector->tx.ring[0] && q_vector->rx.ring[0]) { | |
2564 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
2565 | "%s-%s-%d", basename, "TxRx", rx_int_idx++); | |
2566 | tx_int_idx++; | |
2567 | } else if (q_vector->rx.ring[0]) { | |
2568 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
2569 | "%s-%s-%d", basename, "rx", rx_int_idx++); | |
2570 | } else if (q_vector->tx.ring[0]) { | |
2571 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
2572 | "%s-%s-%d", basename, "tx", tx_int_idx++); | |
2573 | } else { | |
2574 | /* skip this unused q_vector */ | |
2575 | continue; | |
2576 | } | |
2577 | err = request_irq(pf->msix_entries[base + vector].vector, | |
2578 | vsi->irq_handler, | |
2579 | 0, | |
2580 | q_vector->name, | |
2581 | q_vector); | |
2582 | if (err) { | |
2583 | dev_info(&pf->pdev->dev, | |
2584 | "%s: request_irq failed, error: %d\n", | |
2585 | __func__, err); | |
2586 | goto free_queue_irqs; | |
2587 | } | |
2588 | /* assign the mask for this irq */ | |
2589 | irq_set_affinity_hint(pf->msix_entries[base + vector].vector, | |
2590 | &q_vector->affinity_mask); | |
2591 | } | |
2592 | ||
2593 | return 0; | |
2594 | ||
2595 | free_queue_irqs: | |
2596 | while (vector) { | |
2597 | vector--; | |
2598 | irq_set_affinity_hint(pf->msix_entries[base + vector].vector, | |
2599 | NULL); | |
2600 | free_irq(pf->msix_entries[base + vector].vector, | |
2601 | &(vsi->q_vectors[vector])); | |
2602 | } | |
2603 | return err; | |
2604 | } | |
2605 | ||
2606 | /** | |
2607 | * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI | |
2608 | * @vsi: the VSI being un-configured | |
2609 | **/ | |
2610 | static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) | |
2611 | { | |
2612 | struct i40e_pf *pf = vsi->back; | |
2613 | struct i40e_hw *hw = &pf->hw; | |
2614 | int base = vsi->base_vector; | |
2615 | int i; | |
2616 | ||
2617 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
2618 | wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i].reg_idx), 0); | |
2619 | wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i].reg_idx), 0); | |
2620 | } | |
2621 | ||
2622 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2623 | for (i = vsi->base_vector; | |
2624 | i < (vsi->num_q_vectors + vsi->base_vector); i++) | |
2625 | wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); | |
2626 | ||
2627 | i40e_flush(hw); | |
2628 | for (i = 0; i < vsi->num_q_vectors; i++) | |
2629 | synchronize_irq(pf->msix_entries[i + base].vector); | |
2630 | } else { | |
2631 | /* Legacy and MSI mode - this stops all interrupt handling */ | |
2632 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); | |
2633 | wr32(hw, I40E_PFINT_DYN_CTL0, 0); | |
2634 | i40e_flush(hw); | |
2635 | synchronize_irq(pf->pdev->irq); | |
2636 | } | |
2637 | } | |
2638 | ||
2639 | /** | |
2640 | * i40e_vsi_enable_irq - Enable IRQ for the given VSI | |
2641 | * @vsi: the VSI being configured | |
2642 | **/ | |
2643 | static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) | |
2644 | { | |
2645 | struct i40e_pf *pf = vsi->back; | |
2646 | int i; | |
2647 | ||
2648 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2649 | for (i = vsi->base_vector; | |
2650 | i < (vsi->num_q_vectors + vsi->base_vector); i++) | |
2651 | i40e_irq_dynamic_enable(vsi, i); | |
2652 | } else { | |
2653 | i40e_irq_dynamic_enable_icr0(pf); | |
2654 | } | |
2655 | ||
2656 | return 0; | |
2657 | } | |
2658 | ||
2659 | /** | |
2660 | * i40e_stop_misc_vector - Stop the vector that handles non-queue events | |
2661 | * @pf: board private structure | |
2662 | **/ | |
2663 | static void i40e_stop_misc_vector(struct i40e_pf *pf) | |
2664 | { | |
2665 | /* Disable ICR 0 */ | |
2666 | wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); | |
2667 | i40e_flush(&pf->hw); | |
2668 | } | |
2669 | ||
2670 | /** | |
2671 | * i40e_intr - MSI/Legacy and non-queue interrupt handler | |
2672 | * @irq: interrupt number | |
2673 | * @data: pointer to a q_vector | |
2674 | * | |
2675 | * This is the handler used for all MSI/Legacy interrupts, and deals | |
2676 | * with both queue and non-queue interrupts. This is also used in | |
2677 | * MSIX mode to handle the non-queue interrupts. | |
2678 | **/ | |
2679 | static irqreturn_t i40e_intr(int irq, void *data) | |
2680 | { | |
2681 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
2682 | struct i40e_hw *hw = &pf->hw; | |
2683 | u32 icr0, icr0_remaining; | |
2684 | u32 val, ena_mask; | |
2685 | ||
2686 | icr0 = rd32(hw, I40E_PFINT_ICR0); | |
2687 | ||
2688 | /* if sharing a legacy IRQ, we might get called w/o an intr pending */ | |
2689 | if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) | |
2690 | return IRQ_NONE; | |
2691 | ||
2692 | val = rd32(hw, I40E_PFINT_DYN_CTL0); | |
2693 | val = val | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK; | |
2694 | wr32(hw, I40E_PFINT_DYN_CTL0, val); | |
2695 | ||
2696 | ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); | |
2697 | ||
2698 | /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ | |
2699 | if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { | |
2700 | ||
2701 | /* temporarily disable queue cause for NAPI processing */ | |
2702 | u32 qval = rd32(hw, I40E_QINT_RQCTL(0)); | |
2703 | qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; | |
2704 | wr32(hw, I40E_QINT_RQCTL(0), qval); | |
2705 | ||
2706 | qval = rd32(hw, I40E_QINT_TQCTL(0)); | |
2707 | qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; | |
2708 | wr32(hw, I40E_QINT_TQCTL(0), qval); | |
2709 | i40e_flush(hw); | |
2710 | ||
2711 | if (!test_bit(__I40E_DOWN, &pf->state)) | |
493fb300 | 2712 | napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi); |
41c445ff JB |
2713 | } |
2714 | ||
2715 | if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { | |
2716 | ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
2717 | set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
2718 | } | |
2719 | ||
2720 | if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { | |
2721 | ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
2722 | set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
2723 | } | |
2724 | ||
2725 | if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { | |
2726 | ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; | |
2727 | set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); | |
2728 | } | |
2729 | ||
2730 | if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { | |
2731 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
2732 | set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
2733 | ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; | |
2734 | val = rd32(hw, I40E_GLGEN_RSTAT); | |
2735 | val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) | |
2736 | >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; | |
2737 | if (val & I40E_RESET_CORER) | |
2738 | pf->corer_count++; | |
2739 | else if (val & I40E_RESET_GLOBR) | |
2740 | pf->globr_count++; | |
2741 | else if (val & I40E_RESET_EMPR) | |
2742 | pf->empr_count++; | |
2743 | } | |
2744 | ||
2745 | /* If a critical error is pending we have no choice but to reset the | |
2746 | * device. | |
2747 | * Report and mask out any remaining unexpected interrupts. | |
2748 | */ | |
2749 | icr0_remaining = icr0 & ena_mask; | |
2750 | if (icr0_remaining) { | |
2751 | dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", | |
2752 | icr0_remaining); | |
2753 | if ((icr0_remaining & I40E_PFINT_ICR0_HMC_ERR_MASK) || | |
2754 | (icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || | |
2755 | (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || | |
2756 | (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) || | |
2757 | (icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) { | |
2758 | if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { | |
2759 | dev_info(&pf->pdev->dev, "HMC error interrupt\n"); | |
2760 | } else { | |
2761 | dev_info(&pf->pdev->dev, "device will be reset\n"); | |
2762 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
2763 | i40e_service_event_schedule(pf); | |
2764 | } | |
2765 | } | |
2766 | ena_mask &= ~icr0_remaining; | |
2767 | } | |
2768 | ||
2769 | /* re-enable interrupt causes */ | |
2770 | wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); | |
2771 | i40e_flush(hw); | |
2772 | if (!test_bit(__I40E_DOWN, &pf->state)) { | |
2773 | i40e_service_event_schedule(pf); | |
2774 | i40e_irq_dynamic_enable_icr0(pf); | |
2775 | } | |
2776 | ||
2777 | return IRQ_HANDLED; | |
2778 | } | |
2779 | ||
2780 | /** | |
2781 | * i40e_map_vector_to_rxq - Assigns the Rx queue to the vector | |
2782 | * @vsi: the VSI being configured | |
2783 | * @v_idx: vector index | |
2784 | * @r_idx: rx queue index | |
2785 | **/ | |
2786 | static void map_vector_to_rxq(struct i40e_vsi *vsi, int v_idx, int r_idx) | |
2787 | { | |
493fb300 | 2788 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; |
41c445ff JB |
2789 | struct i40e_ring *rx_ring = &(vsi->rx_rings[r_idx]); |
2790 | ||
2791 | rx_ring->q_vector = q_vector; | |
2792 | q_vector->rx.ring[q_vector->rx.count] = rx_ring; | |
2793 | q_vector->rx.count++; | |
2794 | q_vector->rx.latency_range = I40E_LOW_LATENCY; | |
2795 | q_vector->vsi = vsi; | |
2796 | } | |
2797 | ||
2798 | /** | |
2799 | * i40e_map_vector_to_txq - Assigns the Tx queue to the vector | |
2800 | * @vsi: the VSI being configured | |
2801 | * @v_idx: vector index | |
2802 | * @t_idx: tx queue index | |
2803 | **/ | |
2804 | static void map_vector_to_txq(struct i40e_vsi *vsi, int v_idx, int t_idx) | |
2805 | { | |
493fb300 | 2806 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; |
41c445ff JB |
2807 | struct i40e_ring *tx_ring = &(vsi->tx_rings[t_idx]); |
2808 | ||
2809 | tx_ring->q_vector = q_vector; | |
2810 | q_vector->tx.ring[q_vector->tx.count] = tx_ring; | |
2811 | q_vector->tx.count++; | |
2812 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
2813 | q_vector->num_ringpairs++; | |
2814 | q_vector->vsi = vsi; | |
2815 | } | |
2816 | ||
2817 | /** | |
2818 | * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors | |
2819 | * @vsi: the VSI being configured | |
2820 | * | |
2821 | * This function maps descriptor rings to the queue-specific vectors | |
2822 | * we were allotted through the MSI-X enabling code. Ideally, we'd have | |
2823 | * one vector per queue pair, but on a constrained vector budget, we | |
2824 | * group the queue pairs as "efficiently" as possible. | |
2825 | **/ | |
2826 | static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) | |
2827 | { | |
2828 | int qp_remaining = vsi->num_queue_pairs; | |
2829 | int q_vectors = vsi->num_q_vectors; | |
2830 | int qp_per_vector; | |
2831 | int v_start = 0; | |
2832 | int qp_idx = 0; | |
2833 | ||
2834 | /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to | |
2835 | * group them so there are multiple queues per vector. | |
2836 | */ | |
2837 | for (; v_start < q_vectors && qp_remaining; v_start++) { | |
2838 | qp_per_vector = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); | |
2839 | for (; qp_per_vector; | |
2840 | qp_per_vector--, qp_idx++, qp_remaining--) { | |
2841 | map_vector_to_rxq(vsi, v_start, qp_idx); | |
2842 | map_vector_to_txq(vsi, v_start, qp_idx); | |
2843 | } | |
2844 | } | |
2845 | } | |
2846 | ||
2847 | /** | |
2848 | * i40e_vsi_request_irq - Request IRQ from the OS | |
2849 | * @vsi: the VSI being configured | |
2850 | * @basename: name for the vector | |
2851 | **/ | |
2852 | static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) | |
2853 | { | |
2854 | struct i40e_pf *pf = vsi->back; | |
2855 | int err; | |
2856 | ||
2857 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
2858 | err = i40e_vsi_request_irq_msix(vsi, basename); | |
2859 | else if (pf->flags & I40E_FLAG_MSI_ENABLED) | |
2860 | err = request_irq(pf->pdev->irq, i40e_intr, 0, | |
2861 | pf->misc_int_name, pf); | |
2862 | else | |
2863 | err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, | |
2864 | pf->misc_int_name, pf); | |
2865 | ||
2866 | if (err) | |
2867 | dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); | |
2868 | ||
2869 | return err; | |
2870 | } | |
2871 | ||
2872 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
2873 | /** | |
2874 | * i40e_netpoll - A Polling 'interrupt'handler | |
2875 | * @netdev: network interface device structure | |
2876 | * | |
2877 | * This is used by netconsole to send skbs without having to re-enable | |
2878 | * interrupts. It's not called while the normal interrupt routine is executing. | |
2879 | **/ | |
2880 | static void i40e_netpoll(struct net_device *netdev) | |
2881 | { | |
2882 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2883 | struct i40e_vsi *vsi = np->vsi; | |
2884 | struct i40e_pf *pf = vsi->back; | |
2885 | int i; | |
2886 | ||
2887 | /* if interface is down do nothing */ | |
2888 | if (test_bit(__I40E_DOWN, &vsi->state)) | |
2889 | return; | |
2890 | ||
2891 | pf->flags |= I40E_FLAG_IN_NETPOLL; | |
2892 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2893 | for (i = 0; i < vsi->num_q_vectors; i++) | |
493fb300 | 2894 | i40e_msix_clean_rings(0, vsi->q_vectors[i]); |
41c445ff JB |
2895 | } else { |
2896 | i40e_intr(pf->pdev->irq, netdev); | |
2897 | } | |
2898 | pf->flags &= ~I40E_FLAG_IN_NETPOLL; | |
2899 | } | |
2900 | #endif | |
2901 | ||
2902 | /** | |
2903 | * i40e_vsi_control_tx - Start or stop a VSI's rings | |
2904 | * @vsi: the VSI being configured | |
2905 | * @enable: start or stop the rings | |
2906 | **/ | |
2907 | static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) | |
2908 | { | |
2909 | struct i40e_pf *pf = vsi->back; | |
2910 | struct i40e_hw *hw = &pf->hw; | |
2911 | int i, j, pf_q; | |
2912 | u32 tx_reg; | |
2913 | ||
2914 | pf_q = vsi->base_queue; | |
2915 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
2916 | j = 1000; | |
2917 | do { | |
2918 | usleep_range(1000, 2000); | |
2919 | tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); | |
2920 | } while (j-- && ((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) | |
2921 | ^ (tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT)) & 1); | |
2922 | ||
2923 | if (enable) { | |
2924 | /* is STAT set ? */ | |
2925 | if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) { | |
2926 | dev_info(&pf->pdev->dev, | |
2927 | "Tx %d already enabled\n", i); | |
2928 | continue; | |
2929 | } | |
2930 | } else { | |
2931 | /* is !STAT set ? */ | |
2932 | if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) { | |
2933 | dev_info(&pf->pdev->dev, | |
2934 | "Tx %d already disabled\n", i); | |
2935 | continue; | |
2936 | } | |
2937 | } | |
2938 | ||
2939 | /* turn on/off the queue */ | |
2940 | if (enable) | |
2941 | tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK | | |
2942 | I40E_QTX_ENA_QENA_STAT_MASK; | |
2943 | else | |
2944 | tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; | |
2945 | ||
2946 | wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); | |
2947 | ||
2948 | /* wait for the change to finish */ | |
2949 | for (j = 0; j < 10; j++) { | |
2950 | tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); | |
2951 | if (enable) { | |
2952 | if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) | |
2953 | break; | |
2954 | } else { | |
2955 | if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) | |
2956 | break; | |
2957 | } | |
2958 | ||
2959 | udelay(10); | |
2960 | } | |
2961 | if (j >= 10) { | |
2962 | dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n", | |
2963 | pf_q, (enable ? "en" : "dis")); | |
2964 | return -ETIMEDOUT; | |
2965 | } | |
2966 | } | |
2967 | ||
2968 | return 0; | |
2969 | } | |
2970 | ||
2971 | /** | |
2972 | * i40e_vsi_control_rx - Start or stop a VSI's rings | |
2973 | * @vsi: the VSI being configured | |
2974 | * @enable: start or stop the rings | |
2975 | **/ | |
2976 | static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) | |
2977 | { | |
2978 | struct i40e_pf *pf = vsi->back; | |
2979 | struct i40e_hw *hw = &pf->hw; | |
2980 | int i, j, pf_q; | |
2981 | u32 rx_reg; | |
2982 | ||
2983 | pf_q = vsi->base_queue; | |
2984 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
2985 | j = 1000; | |
2986 | do { | |
2987 | usleep_range(1000, 2000); | |
2988 | rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); | |
2989 | } while (j-- && ((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) | |
2990 | ^ (rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT)) & 1); | |
2991 | ||
2992 | if (enable) { | |
2993 | /* is STAT set ? */ | |
2994 | if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
2995 | continue; | |
2996 | } else { | |
2997 | /* is !STAT set ? */ | |
2998 | if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
2999 | continue; | |
3000 | } | |
3001 | ||
3002 | /* turn on/off the queue */ | |
3003 | if (enable) | |
3004 | rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK | | |
3005 | I40E_QRX_ENA_QENA_STAT_MASK; | |
3006 | else | |
3007 | rx_reg &= ~(I40E_QRX_ENA_QENA_REQ_MASK | | |
3008 | I40E_QRX_ENA_QENA_STAT_MASK); | |
3009 | wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); | |
3010 | ||
3011 | /* wait for the change to finish */ | |
3012 | for (j = 0; j < 10; j++) { | |
3013 | rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); | |
3014 | ||
3015 | if (enable) { | |
3016 | if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3017 | break; | |
3018 | } else { | |
3019 | if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3020 | break; | |
3021 | } | |
3022 | ||
3023 | udelay(10); | |
3024 | } | |
3025 | if (j >= 10) { | |
3026 | dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n", | |
3027 | pf_q, (enable ? "en" : "dis")); | |
3028 | return -ETIMEDOUT; | |
3029 | } | |
3030 | } | |
3031 | ||
3032 | return 0; | |
3033 | } | |
3034 | ||
3035 | /** | |
3036 | * i40e_vsi_control_rings - Start or stop a VSI's rings | |
3037 | * @vsi: the VSI being configured | |
3038 | * @enable: start or stop the rings | |
3039 | **/ | |
3040 | static int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) | |
3041 | { | |
3042 | int ret; | |
3043 | ||
3044 | /* do rx first for enable and last for disable */ | |
3045 | if (request) { | |
3046 | ret = i40e_vsi_control_rx(vsi, request); | |
3047 | if (ret) | |
3048 | return ret; | |
3049 | ret = i40e_vsi_control_tx(vsi, request); | |
3050 | } else { | |
3051 | ret = i40e_vsi_control_tx(vsi, request); | |
3052 | if (ret) | |
3053 | return ret; | |
3054 | ret = i40e_vsi_control_rx(vsi, request); | |
3055 | } | |
3056 | ||
3057 | return ret; | |
3058 | } | |
3059 | ||
3060 | /** | |
3061 | * i40e_vsi_free_irq - Free the irq association with the OS | |
3062 | * @vsi: the VSI being configured | |
3063 | **/ | |
3064 | static void i40e_vsi_free_irq(struct i40e_vsi *vsi) | |
3065 | { | |
3066 | struct i40e_pf *pf = vsi->back; | |
3067 | struct i40e_hw *hw = &pf->hw; | |
3068 | int base = vsi->base_vector; | |
3069 | u32 val, qp; | |
3070 | int i; | |
3071 | ||
3072 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3073 | if (!vsi->q_vectors) | |
3074 | return; | |
3075 | ||
3076 | for (i = 0; i < vsi->num_q_vectors; i++) { | |
3077 | u16 vector = i + base; | |
3078 | ||
3079 | /* free only the irqs that were actually requested */ | |
493fb300 | 3080 | if (vsi->q_vectors[i]->num_ringpairs == 0) |
41c445ff JB |
3081 | continue; |
3082 | ||
3083 | /* clear the affinity_mask in the IRQ descriptor */ | |
3084 | irq_set_affinity_hint(pf->msix_entries[vector].vector, | |
3085 | NULL); | |
3086 | free_irq(pf->msix_entries[vector].vector, | |
493fb300 | 3087 | vsi->q_vectors[i]); |
41c445ff JB |
3088 | |
3089 | /* Tear down the interrupt queue link list | |
3090 | * | |
3091 | * We know that they come in pairs and always | |
3092 | * the Rx first, then the Tx. To clear the | |
3093 | * link list, stick the EOL value into the | |
3094 | * next_q field of the registers. | |
3095 | */ | |
3096 | val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); | |
3097 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
3098 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3099 | val |= I40E_QUEUE_END_OF_LIST | |
3100 | << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3101 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); | |
3102 | ||
3103 | while (qp != I40E_QUEUE_END_OF_LIST) { | |
3104 | u32 next; | |
3105 | ||
3106 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
3107 | ||
3108 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
3109 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
3110 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
3111 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
3112 | ||
3113 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
3114 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
3115 | ||
3116 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
3117 | ||
3118 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
3119 | ||
3120 | next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) | |
3121 | >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; | |
3122 | ||
3123 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
3124 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
3125 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3126 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
3127 | ||
3128 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
3129 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
3130 | ||
3131 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
3132 | qp = next; | |
3133 | } | |
3134 | } | |
3135 | } else { | |
3136 | free_irq(pf->pdev->irq, pf); | |
3137 | ||
3138 | val = rd32(hw, I40E_PFINT_LNKLST0); | |
3139 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
3140 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3141 | val |= I40E_QUEUE_END_OF_LIST | |
3142 | << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; | |
3143 | wr32(hw, I40E_PFINT_LNKLST0, val); | |
3144 | ||
3145 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
3146 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
3147 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
3148 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
3149 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
3150 | ||
3151 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
3152 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
3153 | ||
3154 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
3155 | ||
3156 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
3157 | ||
3158 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
3159 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
3160 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3161 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
3162 | ||
3163 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
3164 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
3165 | ||
3166 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
3167 | } | |
3168 | } | |
3169 | ||
493fb300 AD |
3170 | /** |
3171 | * i40e_free_q_vector - Free memory allocated for specific interrupt vector | |
3172 | * @vsi: the VSI being configured | |
3173 | * @v_idx: Index of vector to be freed | |
3174 | * | |
3175 | * This function frees the memory allocated to the q_vector. In addition if | |
3176 | * NAPI is enabled it will delete any references to the NAPI struct prior | |
3177 | * to freeing the q_vector. | |
3178 | **/ | |
3179 | static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) | |
3180 | { | |
3181 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; | |
3182 | int r_idx; | |
3183 | ||
3184 | if (!q_vector) | |
3185 | return; | |
3186 | ||
3187 | /* disassociate q_vector from rings */ | |
3188 | for (r_idx = 0; r_idx < q_vector->tx.count; r_idx++) | |
3189 | q_vector->tx.ring[r_idx]->q_vector = NULL; | |
3190 | for (r_idx = 0; r_idx < q_vector->rx.count; r_idx++) | |
3191 | q_vector->rx.ring[r_idx]->q_vector = NULL; | |
3192 | ||
3193 | /* only VSI w/ an associated netdev is set up w/ NAPI */ | |
3194 | if (vsi->netdev) | |
3195 | netif_napi_del(&q_vector->napi); | |
3196 | ||
3197 | vsi->q_vectors[v_idx] = NULL; | |
3198 | ||
3199 | kfree_rcu(q_vector, rcu); | |
3200 | } | |
3201 | ||
41c445ff JB |
3202 | /** |
3203 | * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors | |
3204 | * @vsi: the VSI being un-configured | |
3205 | * | |
3206 | * This frees the memory allocated to the q_vectors and | |
3207 | * deletes references to the NAPI struct. | |
3208 | **/ | |
3209 | static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) | |
3210 | { | |
3211 | int v_idx; | |
3212 | ||
493fb300 AD |
3213 | for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) |
3214 | i40e_free_q_vector(vsi, v_idx); | |
41c445ff JB |
3215 | } |
3216 | ||
3217 | /** | |
3218 | * i40e_reset_interrupt_capability - Disable interrupt setup in OS | |
3219 | * @pf: board private structure | |
3220 | **/ | |
3221 | static void i40e_reset_interrupt_capability(struct i40e_pf *pf) | |
3222 | { | |
3223 | /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ | |
3224 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3225 | pci_disable_msix(pf->pdev); | |
3226 | kfree(pf->msix_entries); | |
3227 | pf->msix_entries = NULL; | |
3228 | } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { | |
3229 | pci_disable_msi(pf->pdev); | |
3230 | } | |
3231 | pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); | |
3232 | } | |
3233 | ||
3234 | /** | |
3235 | * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings | |
3236 | * @pf: board private structure | |
3237 | * | |
3238 | * We go through and clear interrupt specific resources and reset the structure | |
3239 | * to pre-load conditions | |
3240 | **/ | |
3241 | static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) | |
3242 | { | |
3243 | int i; | |
3244 | ||
3245 | i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); | |
3246 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
3247 | if (pf->vsi[i]) | |
3248 | i40e_vsi_free_q_vectors(pf->vsi[i]); | |
3249 | i40e_reset_interrupt_capability(pf); | |
3250 | } | |
3251 | ||
3252 | /** | |
3253 | * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI | |
3254 | * @vsi: the VSI being configured | |
3255 | **/ | |
3256 | static void i40e_napi_enable_all(struct i40e_vsi *vsi) | |
3257 | { | |
3258 | int q_idx; | |
3259 | ||
3260 | if (!vsi->netdev) | |
3261 | return; | |
3262 | ||
3263 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) | |
493fb300 | 3264 | napi_enable(&vsi->q_vectors[q_idx]->napi); |
41c445ff JB |
3265 | } |
3266 | ||
3267 | /** | |
3268 | * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI | |
3269 | * @vsi: the VSI being configured | |
3270 | **/ | |
3271 | static void i40e_napi_disable_all(struct i40e_vsi *vsi) | |
3272 | { | |
3273 | int q_idx; | |
3274 | ||
3275 | if (!vsi->netdev) | |
3276 | return; | |
3277 | ||
3278 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) | |
493fb300 | 3279 | napi_disable(&vsi->q_vectors[q_idx]->napi); |
41c445ff JB |
3280 | } |
3281 | ||
3282 | /** | |
3283 | * i40e_quiesce_vsi - Pause a given VSI | |
3284 | * @vsi: the VSI being paused | |
3285 | **/ | |
3286 | static void i40e_quiesce_vsi(struct i40e_vsi *vsi) | |
3287 | { | |
3288 | if (test_bit(__I40E_DOWN, &vsi->state)) | |
3289 | return; | |
3290 | ||
3291 | set_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
3292 | if (vsi->netdev && netif_running(vsi->netdev)) { | |
3293 | vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); | |
3294 | } else { | |
3295 | set_bit(__I40E_DOWN, &vsi->state); | |
3296 | i40e_down(vsi); | |
3297 | } | |
3298 | } | |
3299 | ||
3300 | /** | |
3301 | * i40e_unquiesce_vsi - Resume a given VSI | |
3302 | * @vsi: the VSI being resumed | |
3303 | **/ | |
3304 | static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) | |
3305 | { | |
3306 | if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) | |
3307 | return; | |
3308 | ||
3309 | clear_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
3310 | if (vsi->netdev && netif_running(vsi->netdev)) | |
3311 | vsi->netdev->netdev_ops->ndo_open(vsi->netdev); | |
3312 | else | |
3313 | i40e_up(vsi); /* this clears the DOWN bit */ | |
3314 | } | |
3315 | ||
3316 | /** | |
3317 | * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF | |
3318 | * @pf: the PF | |
3319 | **/ | |
3320 | static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) | |
3321 | { | |
3322 | int v; | |
3323 | ||
3324 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
3325 | if (pf->vsi[v]) | |
3326 | i40e_quiesce_vsi(pf->vsi[v]); | |
3327 | } | |
3328 | } | |
3329 | ||
3330 | /** | |
3331 | * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF | |
3332 | * @pf: the PF | |
3333 | **/ | |
3334 | static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) | |
3335 | { | |
3336 | int v; | |
3337 | ||
3338 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
3339 | if (pf->vsi[v]) | |
3340 | i40e_unquiesce_vsi(pf->vsi[v]); | |
3341 | } | |
3342 | } | |
3343 | ||
3344 | /** | |
3345 | * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config | |
3346 | * @dcbcfg: the corresponding DCBx configuration structure | |
3347 | * | |
3348 | * Return the number of TCs from given DCBx configuration | |
3349 | **/ | |
3350 | static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) | |
3351 | { | |
078b5876 JB |
3352 | u8 num_tc = 0; |
3353 | int i; | |
41c445ff JB |
3354 | |
3355 | /* Scan the ETS Config Priority Table to find | |
3356 | * traffic class enabled for a given priority | |
3357 | * and use the traffic class index to get the | |
3358 | * number of traffic classes enabled | |
3359 | */ | |
3360 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
3361 | if (dcbcfg->etscfg.prioritytable[i] > num_tc) | |
3362 | num_tc = dcbcfg->etscfg.prioritytable[i]; | |
3363 | } | |
3364 | ||
3365 | /* Traffic class index starts from zero so | |
3366 | * increment to return the actual count | |
3367 | */ | |
078b5876 | 3368 | return num_tc + 1; |
41c445ff JB |
3369 | } |
3370 | ||
3371 | /** | |
3372 | * i40e_dcb_get_enabled_tc - Get enabled traffic classes | |
3373 | * @dcbcfg: the corresponding DCBx configuration structure | |
3374 | * | |
3375 | * Query the current DCB configuration and return the number of | |
3376 | * traffic classes enabled from the given DCBX config | |
3377 | **/ | |
3378 | static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) | |
3379 | { | |
3380 | u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); | |
3381 | u8 enabled_tc = 1; | |
3382 | u8 i; | |
3383 | ||
3384 | for (i = 0; i < num_tc; i++) | |
3385 | enabled_tc |= 1 << i; | |
3386 | ||
3387 | return enabled_tc; | |
3388 | } | |
3389 | ||
3390 | /** | |
3391 | * i40e_pf_get_num_tc - Get enabled traffic classes for PF | |
3392 | * @pf: PF being queried | |
3393 | * | |
3394 | * Return number of traffic classes enabled for the given PF | |
3395 | **/ | |
3396 | static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) | |
3397 | { | |
3398 | struct i40e_hw *hw = &pf->hw; | |
3399 | u8 i, enabled_tc; | |
3400 | u8 num_tc = 0; | |
3401 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
3402 | ||
3403 | /* If DCB is not enabled then always in single TC */ | |
3404 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
3405 | return 1; | |
3406 | ||
3407 | /* MFP mode return count of enabled TCs for this PF */ | |
3408 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
3409 | enabled_tc = pf->hw.func_caps.enabled_tcmap; | |
3410 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3411 | if (enabled_tc & (1 << i)) | |
3412 | num_tc++; | |
3413 | } | |
3414 | return num_tc; | |
3415 | } | |
3416 | ||
3417 | /* SFP mode will be enabled for all TCs on port */ | |
3418 | return i40e_dcb_get_num_tc(dcbcfg); | |
3419 | } | |
3420 | ||
3421 | /** | |
3422 | * i40e_pf_get_default_tc - Get bitmap for first enabled TC | |
3423 | * @pf: PF being queried | |
3424 | * | |
3425 | * Return a bitmap for first enabled traffic class for this PF. | |
3426 | **/ | |
3427 | static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) | |
3428 | { | |
3429 | u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; | |
3430 | u8 i = 0; | |
3431 | ||
3432 | if (!enabled_tc) | |
3433 | return 0x1; /* TC0 */ | |
3434 | ||
3435 | /* Find the first enabled TC */ | |
3436 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3437 | if (enabled_tc & (1 << i)) | |
3438 | break; | |
3439 | } | |
3440 | ||
3441 | return 1 << i; | |
3442 | } | |
3443 | ||
3444 | /** | |
3445 | * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes | |
3446 | * @pf: PF being queried | |
3447 | * | |
3448 | * Return a bitmap for enabled traffic classes for this PF. | |
3449 | **/ | |
3450 | static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) | |
3451 | { | |
3452 | /* If DCB is not enabled for this PF then just return default TC */ | |
3453 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
3454 | return i40e_pf_get_default_tc(pf); | |
3455 | ||
3456 | /* MFP mode will have enabled TCs set by FW */ | |
3457 | if (pf->flags & I40E_FLAG_MFP_ENABLED) | |
3458 | return pf->hw.func_caps.enabled_tcmap; | |
3459 | ||
3460 | /* SFP mode we want PF to be enabled for all TCs */ | |
3461 | return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); | |
3462 | } | |
3463 | ||
3464 | /** | |
3465 | * i40e_vsi_get_bw_info - Query VSI BW Information | |
3466 | * @vsi: the VSI being queried | |
3467 | * | |
3468 | * Returns 0 on success, negative value on failure | |
3469 | **/ | |
3470 | static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) | |
3471 | { | |
3472 | struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; | |
3473 | struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; | |
3474 | struct i40e_pf *pf = vsi->back; | |
3475 | struct i40e_hw *hw = &pf->hw; | |
dcae29be | 3476 | i40e_status aq_ret; |
41c445ff | 3477 | u32 tc_bw_max; |
41c445ff JB |
3478 | int i; |
3479 | ||
3480 | /* Get the VSI level BW configuration */ | |
dcae29be JB |
3481 | aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); |
3482 | if (aq_ret) { | |
41c445ff JB |
3483 | dev_info(&pf->pdev->dev, |
3484 | "couldn't get pf vsi bw config, err %d, aq_err %d\n", | |
dcae29be JB |
3485 | aq_ret, pf->hw.aq.asq_last_status); |
3486 | return -EINVAL; | |
41c445ff JB |
3487 | } |
3488 | ||
3489 | /* Get the VSI level BW configuration per TC */ | |
dcae29be JB |
3490 | aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, |
3491 | NULL); | |
3492 | if (aq_ret) { | |
41c445ff JB |
3493 | dev_info(&pf->pdev->dev, |
3494 | "couldn't get pf vsi ets bw config, err %d, aq_err %d\n", | |
dcae29be JB |
3495 | aq_ret, pf->hw.aq.asq_last_status); |
3496 | return -EINVAL; | |
41c445ff JB |
3497 | } |
3498 | ||
3499 | if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { | |
3500 | dev_info(&pf->pdev->dev, | |
3501 | "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", | |
3502 | bw_config.tc_valid_bits, | |
3503 | bw_ets_config.tc_valid_bits); | |
3504 | /* Still continuing */ | |
3505 | } | |
3506 | ||
3507 | vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); | |
3508 | vsi->bw_max_quanta = bw_config.max_bw; | |
3509 | tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | | |
3510 | (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); | |
3511 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3512 | vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; | |
3513 | vsi->bw_ets_limit_credits[i] = | |
3514 | le16_to_cpu(bw_ets_config.credits[i]); | |
3515 | /* 3 bits out of 4 for each TC */ | |
3516 | vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); | |
3517 | } | |
078b5876 | 3518 | |
dcae29be | 3519 | return 0; |
41c445ff JB |
3520 | } |
3521 | ||
3522 | /** | |
3523 | * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC | |
3524 | * @vsi: the VSI being configured | |
3525 | * @enabled_tc: TC bitmap | |
3526 | * @bw_credits: BW shared credits per TC | |
3527 | * | |
3528 | * Returns 0 on success, negative value on failure | |
3529 | **/ | |
dcae29be | 3530 | static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, |
41c445ff JB |
3531 | u8 *bw_share) |
3532 | { | |
3533 | struct i40e_aqc_configure_vsi_tc_bw_data bw_data; | |
dcae29be JB |
3534 | i40e_status aq_ret; |
3535 | int i; | |
41c445ff JB |
3536 | |
3537 | bw_data.tc_valid_bits = enabled_tc; | |
3538 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
3539 | bw_data.tc_bw_credits[i] = bw_share[i]; | |
3540 | ||
dcae29be JB |
3541 | aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, |
3542 | NULL); | |
3543 | if (aq_ret) { | |
41c445ff JB |
3544 | dev_info(&vsi->back->pdev->dev, |
3545 | "%s: AQ command Config VSI BW allocation per TC failed = %d\n", | |
3546 | __func__, vsi->back->hw.aq.asq_last_status); | |
dcae29be | 3547 | return -EINVAL; |
41c445ff JB |
3548 | } |
3549 | ||
3550 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
3551 | vsi->info.qs_handle[i] = bw_data.qs_handles[i]; | |
3552 | ||
dcae29be | 3553 | return 0; |
41c445ff JB |
3554 | } |
3555 | ||
3556 | /** | |
3557 | * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration | |
3558 | * @vsi: the VSI being configured | |
3559 | * @enabled_tc: TC map to be enabled | |
3560 | * | |
3561 | **/ | |
3562 | static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
3563 | { | |
3564 | struct net_device *netdev = vsi->netdev; | |
3565 | struct i40e_pf *pf = vsi->back; | |
3566 | struct i40e_hw *hw = &pf->hw; | |
3567 | u8 netdev_tc = 0; | |
3568 | int i; | |
3569 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
3570 | ||
3571 | if (!netdev) | |
3572 | return; | |
3573 | ||
3574 | if (!enabled_tc) { | |
3575 | netdev_reset_tc(netdev); | |
3576 | return; | |
3577 | } | |
3578 | ||
3579 | /* Set up actual enabled TCs on the VSI */ | |
3580 | if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) | |
3581 | return; | |
3582 | ||
3583 | /* set per TC queues for the VSI */ | |
3584 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3585 | /* Only set TC queues for enabled tcs | |
3586 | * | |
3587 | * e.g. For a VSI that has TC0 and TC3 enabled the | |
3588 | * enabled_tc bitmap would be 0x00001001; the driver | |
3589 | * will set the numtc for netdev as 2 that will be | |
3590 | * referenced by the netdev layer as TC 0 and 1. | |
3591 | */ | |
3592 | if (vsi->tc_config.enabled_tc & (1 << i)) | |
3593 | netdev_set_tc_queue(netdev, | |
3594 | vsi->tc_config.tc_info[i].netdev_tc, | |
3595 | vsi->tc_config.tc_info[i].qcount, | |
3596 | vsi->tc_config.tc_info[i].qoffset); | |
3597 | } | |
3598 | ||
3599 | /* Assign UP2TC map for the VSI */ | |
3600 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
3601 | /* Get the actual TC# for the UP */ | |
3602 | u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; | |
3603 | /* Get the mapped netdev TC# for the UP */ | |
3604 | netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; | |
3605 | netdev_set_prio_tc_map(netdev, i, netdev_tc); | |
3606 | } | |
3607 | } | |
3608 | ||
3609 | /** | |
3610 | * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map | |
3611 | * @vsi: the VSI being configured | |
3612 | * @ctxt: the ctxt buffer returned from AQ VSI update param command | |
3613 | **/ | |
3614 | static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, | |
3615 | struct i40e_vsi_context *ctxt) | |
3616 | { | |
3617 | /* copy just the sections touched not the entire info | |
3618 | * since not all sections are valid as returned by | |
3619 | * update vsi params | |
3620 | */ | |
3621 | vsi->info.mapping_flags = ctxt->info.mapping_flags; | |
3622 | memcpy(&vsi->info.queue_mapping, | |
3623 | &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); | |
3624 | memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, | |
3625 | sizeof(vsi->info.tc_mapping)); | |
3626 | } | |
3627 | ||
3628 | /** | |
3629 | * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map | |
3630 | * @vsi: VSI to be configured | |
3631 | * @enabled_tc: TC bitmap | |
3632 | * | |
3633 | * This configures a particular VSI for TCs that are mapped to the | |
3634 | * given TC bitmap. It uses default bandwidth share for TCs across | |
3635 | * VSIs to configure TC for a particular VSI. | |
3636 | * | |
3637 | * NOTE: | |
3638 | * It is expected that the VSI queues have been quisced before calling | |
3639 | * this function. | |
3640 | **/ | |
3641 | static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
3642 | { | |
3643 | u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; | |
3644 | struct i40e_vsi_context ctxt; | |
3645 | int ret = 0; | |
3646 | int i; | |
3647 | ||
3648 | /* Check if enabled_tc is same as existing or new TCs */ | |
3649 | if (vsi->tc_config.enabled_tc == enabled_tc) | |
3650 | return ret; | |
3651 | ||
3652 | /* Enable ETS TCs with equal BW Share for now across all VSIs */ | |
3653 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3654 | if (enabled_tc & (1 << i)) | |
3655 | bw_share[i] = 1; | |
3656 | } | |
3657 | ||
3658 | ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); | |
3659 | if (ret) { | |
3660 | dev_info(&vsi->back->pdev->dev, | |
3661 | "Failed configuring TC map %d for VSI %d\n", | |
3662 | enabled_tc, vsi->seid); | |
3663 | goto out; | |
3664 | } | |
3665 | ||
3666 | /* Update Queue Pairs Mapping for currently enabled UPs */ | |
3667 | ctxt.seid = vsi->seid; | |
3668 | ctxt.pf_num = vsi->back->hw.pf_id; | |
3669 | ctxt.vf_num = 0; | |
3670 | ctxt.uplink_seid = vsi->uplink_seid; | |
3671 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
3672 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); | |
3673 | ||
3674 | /* Update the VSI after updating the VSI queue-mapping information */ | |
3675 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
3676 | if (ret) { | |
3677 | dev_info(&vsi->back->pdev->dev, | |
3678 | "update vsi failed, aq_err=%d\n", | |
3679 | vsi->back->hw.aq.asq_last_status); | |
3680 | goto out; | |
3681 | } | |
3682 | /* update the local VSI info with updated queue map */ | |
3683 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
3684 | vsi->info.valid_sections = 0; | |
3685 | ||
3686 | /* Update current VSI BW information */ | |
3687 | ret = i40e_vsi_get_bw_info(vsi); | |
3688 | if (ret) { | |
3689 | dev_info(&vsi->back->pdev->dev, | |
3690 | "Failed updating vsi bw info, aq_err=%d\n", | |
3691 | vsi->back->hw.aq.asq_last_status); | |
3692 | goto out; | |
3693 | } | |
3694 | ||
3695 | /* Update the netdev TC setup */ | |
3696 | i40e_vsi_config_netdev_tc(vsi, enabled_tc); | |
3697 | out: | |
3698 | return ret; | |
3699 | } | |
3700 | ||
3701 | /** | |
3702 | * i40e_up_complete - Finish the last steps of bringing up a connection | |
3703 | * @vsi: the VSI being configured | |
3704 | **/ | |
3705 | static int i40e_up_complete(struct i40e_vsi *vsi) | |
3706 | { | |
3707 | struct i40e_pf *pf = vsi->back; | |
3708 | int err; | |
3709 | ||
3710 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
3711 | i40e_vsi_configure_msix(vsi); | |
3712 | else | |
3713 | i40e_configure_msi_and_legacy(vsi); | |
3714 | ||
3715 | /* start rings */ | |
3716 | err = i40e_vsi_control_rings(vsi, true); | |
3717 | if (err) | |
3718 | return err; | |
3719 | ||
3720 | clear_bit(__I40E_DOWN, &vsi->state); | |
3721 | i40e_napi_enable_all(vsi); | |
3722 | i40e_vsi_enable_irq(vsi); | |
3723 | ||
3724 | if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && | |
3725 | (vsi->netdev)) { | |
6d779b41 | 3726 | netdev_info(vsi->netdev, "NIC Link is Up\n"); |
41c445ff JB |
3727 | netif_tx_start_all_queues(vsi->netdev); |
3728 | netif_carrier_on(vsi->netdev); | |
6d779b41 AS |
3729 | } else if (vsi->netdev) { |
3730 | netdev_info(vsi->netdev, "NIC Link is Down\n"); | |
41c445ff JB |
3731 | } |
3732 | i40e_service_event_schedule(pf); | |
3733 | ||
3734 | return 0; | |
3735 | } | |
3736 | ||
3737 | /** | |
3738 | * i40e_vsi_reinit_locked - Reset the VSI | |
3739 | * @vsi: the VSI being configured | |
3740 | * | |
3741 | * Rebuild the ring structs after some configuration | |
3742 | * has changed, e.g. MTU size. | |
3743 | **/ | |
3744 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) | |
3745 | { | |
3746 | struct i40e_pf *pf = vsi->back; | |
3747 | ||
3748 | WARN_ON(in_interrupt()); | |
3749 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
3750 | usleep_range(1000, 2000); | |
3751 | i40e_down(vsi); | |
3752 | ||
3753 | /* Give a VF some time to respond to the reset. The | |
3754 | * two second wait is based upon the watchdog cycle in | |
3755 | * the VF driver. | |
3756 | */ | |
3757 | if (vsi->type == I40E_VSI_SRIOV) | |
3758 | msleep(2000); | |
3759 | i40e_up(vsi); | |
3760 | clear_bit(__I40E_CONFIG_BUSY, &pf->state); | |
3761 | } | |
3762 | ||
3763 | /** | |
3764 | * i40e_up - Bring the connection back up after being down | |
3765 | * @vsi: the VSI being configured | |
3766 | **/ | |
3767 | int i40e_up(struct i40e_vsi *vsi) | |
3768 | { | |
3769 | int err; | |
3770 | ||
3771 | err = i40e_vsi_configure(vsi); | |
3772 | if (!err) | |
3773 | err = i40e_up_complete(vsi); | |
3774 | ||
3775 | return err; | |
3776 | } | |
3777 | ||
3778 | /** | |
3779 | * i40e_down - Shutdown the connection processing | |
3780 | * @vsi: the VSI being stopped | |
3781 | **/ | |
3782 | void i40e_down(struct i40e_vsi *vsi) | |
3783 | { | |
3784 | int i; | |
3785 | ||
3786 | /* It is assumed that the caller of this function | |
3787 | * sets the vsi->state __I40E_DOWN bit. | |
3788 | */ | |
3789 | if (vsi->netdev) { | |
3790 | netif_carrier_off(vsi->netdev); | |
3791 | netif_tx_disable(vsi->netdev); | |
3792 | } | |
3793 | i40e_vsi_disable_irq(vsi); | |
3794 | i40e_vsi_control_rings(vsi, false); | |
3795 | i40e_napi_disable_all(vsi); | |
3796 | ||
3797 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
3798 | i40e_clean_tx_ring(&vsi->tx_rings[i]); | |
3799 | i40e_clean_rx_ring(&vsi->rx_rings[i]); | |
3800 | } | |
3801 | } | |
3802 | ||
3803 | /** | |
3804 | * i40e_setup_tc - configure multiple traffic classes | |
3805 | * @netdev: net device to configure | |
3806 | * @tc: number of traffic classes to enable | |
3807 | **/ | |
3808 | static int i40e_setup_tc(struct net_device *netdev, u8 tc) | |
3809 | { | |
3810 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3811 | struct i40e_vsi *vsi = np->vsi; | |
3812 | struct i40e_pf *pf = vsi->back; | |
3813 | u8 enabled_tc = 0; | |
3814 | int ret = -EINVAL; | |
3815 | int i; | |
3816 | ||
3817 | /* Check if DCB enabled to continue */ | |
3818 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
3819 | netdev_info(netdev, "DCB is not enabled for adapter\n"); | |
3820 | goto exit; | |
3821 | } | |
3822 | ||
3823 | /* Check if MFP enabled */ | |
3824 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
3825 | netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); | |
3826 | goto exit; | |
3827 | } | |
3828 | ||
3829 | /* Check whether tc count is within enabled limit */ | |
3830 | if (tc > i40e_pf_get_num_tc(pf)) { | |
3831 | netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); | |
3832 | goto exit; | |
3833 | } | |
3834 | ||
3835 | /* Generate TC map for number of tc requested */ | |
3836 | for (i = 0; i < tc; i++) | |
3837 | enabled_tc |= (1 << i); | |
3838 | ||
3839 | /* Requesting same TC configuration as already enabled */ | |
3840 | if (enabled_tc == vsi->tc_config.enabled_tc) | |
3841 | return 0; | |
3842 | ||
3843 | /* Quiesce VSI queues */ | |
3844 | i40e_quiesce_vsi(vsi); | |
3845 | ||
3846 | /* Configure VSI for enabled TCs */ | |
3847 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
3848 | if (ret) { | |
3849 | netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", | |
3850 | vsi->seid); | |
3851 | goto exit; | |
3852 | } | |
3853 | ||
3854 | /* Unquiesce VSI */ | |
3855 | i40e_unquiesce_vsi(vsi); | |
3856 | ||
3857 | exit: | |
3858 | return ret; | |
3859 | } | |
3860 | ||
3861 | /** | |
3862 | * i40e_open - Called when a network interface is made active | |
3863 | * @netdev: network interface device structure | |
3864 | * | |
3865 | * The open entry point is called when a network interface is made | |
3866 | * active by the system (IFF_UP). At this point all resources needed | |
3867 | * for transmit and receive operations are allocated, the interrupt | |
3868 | * handler is registered with the OS, the netdev watchdog subtask is | |
3869 | * enabled, and the stack is notified that the interface is ready. | |
3870 | * | |
3871 | * Returns 0 on success, negative value on failure | |
3872 | **/ | |
3873 | static int i40e_open(struct net_device *netdev) | |
3874 | { | |
3875 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3876 | struct i40e_vsi *vsi = np->vsi; | |
3877 | struct i40e_pf *pf = vsi->back; | |
3878 | char int_name[IFNAMSIZ]; | |
3879 | int err; | |
3880 | ||
3881 | /* disallow open during test */ | |
3882 | if (test_bit(__I40E_TESTING, &pf->state)) | |
3883 | return -EBUSY; | |
3884 | ||
3885 | netif_carrier_off(netdev); | |
3886 | ||
3887 | /* allocate descriptors */ | |
3888 | err = i40e_vsi_setup_tx_resources(vsi); | |
3889 | if (err) | |
3890 | goto err_setup_tx; | |
3891 | err = i40e_vsi_setup_rx_resources(vsi); | |
3892 | if (err) | |
3893 | goto err_setup_rx; | |
3894 | ||
3895 | err = i40e_vsi_configure(vsi); | |
3896 | if (err) | |
3897 | goto err_setup_rx; | |
3898 | ||
3899 | snprintf(int_name, sizeof(int_name) - 1, "%s-%s", | |
3900 | dev_driver_string(&pf->pdev->dev), netdev->name); | |
3901 | err = i40e_vsi_request_irq(vsi, int_name); | |
3902 | if (err) | |
3903 | goto err_setup_rx; | |
3904 | ||
3905 | err = i40e_up_complete(vsi); | |
3906 | if (err) | |
3907 | goto err_up_complete; | |
3908 | ||
3909 | if ((vsi->type == I40E_VSI_MAIN) || (vsi->type == I40E_VSI_VMDQ2)) { | |
3910 | err = i40e_aq_set_vsi_broadcast(&pf->hw, vsi->seid, true, NULL); | |
3911 | if (err) | |
3912 | netdev_info(netdev, | |
3913 | "couldn't set broadcast err %d aq_err %d\n", | |
3914 | err, pf->hw.aq.asq_last_status); | |
3915 | } | |
3916 | ||
3917 | return 0; | |
3918 | ||
3919 | err_up_complete: | |
3920 | i40e_down(vsi); | |
3921 | i40e_vsi_free_irq(vsi); | |
3922 | err_setup_rx: | |
3923 | i40e_vsi_free_rx_resources(vsi); | |
3924 | err_setup_tx: | |
3925 | i40e_vsi_free_tx_resources(vsi); | |
3926 | if (vsi == pf->vsi[pf->lan_vsi]) | |
3927 | i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); | |
3928 | ||
3929 | return err; | |
3930 | } | |
3931 | ||
3932 | /** | |
3933 | * i40e_close - Disables a network interface | |
3934 | * @netdev: network interface device structure | |
3935 | * | |
3936 | * The close entry point is called when an interface is de-activated | |
3937 | * by the OS. The hardware is still under the driver's control, but | |
3938 | * this netdev interface is disabled. | |
3939 | * | |
3940 | * Returns 0, this is not allowed to fail | |
3941 | **/ | |
3942 | static int i40e_close(struct net_device *netdev) | |
3943 | { | |
3944 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3945 | struct i40e_vsi *vsi = np->vsi; | |
3946 | ||
3947 | if (test_and_set_bit(__I40E_DOWN, &vsi->state)) | |
3948 | return 0; | |
3949 | ||
3950 | i40e_down(vsi); | |
3951 | i40e_vsi_free_irq(vsi); | |
3952 | ||
3953 | i40e_vsi_free_tx_resources(vsi); | |
3954 | i40e_vsi_free_rx_resources(vsi); | |
3955 | ||
3956 | return 0; | |
3957 | } | |
3958 | ||
3959 | /** | |
3960 | * i40e_do_reset - Start a PF or Core Reset sequence | |
3961 | * @pf: board private structure | |
3962 | * @reset_flags: which reset is requested | |
3963 | * | |
3964 | * The essential difference in resets is that the PF Reset | |
3965 | * doesn't clear the packet buffers, doesn't reset the PE | |
3966 | * firmware, and doesn't bother the other PFs on the chip. | |
3967 | **/ | |
3968 | void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) | |
3969 | { | |
3970 | u32 val; | |
3971 | ||
3972 | WARN_ON(in_interrupt()); | |
3973 | ||
3974 | /* do the biggest reset indicated */ | |
3975 | if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) { | |
3976 | ||
3977 | /* Request a Global Reset | |
3978 | * | |
3979 | * This will start the chip's countdown to the actual full | |
3980 | * chip reset event, and a warning interrupt to be sent | |
3981 | * to all PFs, including the requestor. Our handler | |
3982 | * for the warning interrupt will deal with the shutdown | |
3983 | * and recovery of the switch setup. | |
3984 | */ | |
3985 | dev_info(&pf->pdev->dev, "GlobalR requested\n"); | |
3986 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
3987 | val |= I40E_GLGEN_RTRIG_GLOBR_MASK; | |
3988 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
3989 | ||
3990 | } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) { | |
3991 | ||
3992 | /* Request a Core Reset | |
3993 | * | |
3994 | * Same as Global Reset, except does *not* include the MAC/PHY | |
3995 | */ | |
3996 | dev_info(&pf->pdev->dev, "CoreR requested\n"); | |
3997 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
3998 | val |= I40E_GLGEN_RTRIG_CORER_MASK; | |
3999 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
4000 | i40e_flush(&pf->hw); | |
4001 | ||
4002 | } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) { | |
4003 | ||
4004 | /* Request a PF Reset | |
4005 | * | |
4006 | * Resets only the PF-specific registers | |
4007 | * | |
4008 | * This goes directly to the tear-down and rebuild of | |
4009 | * the switch, since we need to do all the recovery as | |
4010 | * for the Core Reset. | |
4011 | */ | |
4012 | dev_info(&pf->pdev->dev, "PFR requested\n"); | |
4013 | i40e_handle_reset_warning(pf); | |
4014 | ||
4015 | } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) { | |
4016 | int v; | |
4017 | ||
4018 | /* Find the VSI(s) that requested a re-init */ | |
4019 | dev_info(&pf->pdev->dev, | |
4020 | "VSI reinit requested\n"); | |
4021 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4022 | struct i40e_vsi *vsi = pf->vsi[v]; | |
4023 | if (vsi != NULL && | |
4024 | test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { | |
4025 | i40e_vsi_reinit_locked(pf->vsi[v]); | |
4026 | clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); | |
4027 | } | |
4028 | } | |
4029 | ||
4030 | /* no further action needed, so return now */ | |
4031 | return; | |
4032 | } else { | |
4033 | dev_info(&pf->pdev->dev, | |
4034 | "bad reset request 0x%08x\n", reset_flags); | |
4035 | return; | |
4036 | } | |
4037 | } | |
4038 | ||
4039 | /** | |
4040 | * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event | |
4041 | * @pf: board private structure | |
4042 | * @e: event info posted on ARQ | |
4043 | * | |
4044 | * Handler for LAN Queue Overflow Event generated by the firmware for PF | |
4045 | * and VF queues | |
4046 | **/ | |
4047 | static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, | |
4048 | struct i40e_arq_event_info *e) | |
4049 | { | |
4050 | struct i40e_aqc_lan_overflow *data = | |
4051 | (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; | |
4052 | u32 queue = le32_to_cpu(data->prtdcb_rupto); | |
4053 | u32 qtx_ctl = le32_to_cpu(data->otx_ctl); | |
4054 | struct i40e_hw *hw = &pf->hw; | |
4055 | struct i40e_vf *vf; | |
4056 | u16 vf_id; | |
4057 | ||
4058 | dev_info(&pf->pdev->dev, "%s: Rx Queue Number = %d QTX_CTL=0x%08x\n", | |
4059 | __func__, queue, qtx_ctl); | |
4060 | ||
4061 | /* Queue belongs to VF, find the VF and issue VF reset */ | |
4062 | if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) | |
4063 | >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { | |
4064 | vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) | |
4065 | >> I40E_QTX_CTL_VFVM_INDX_SHIFT); | |
4066 | vf_id -= hw->func_caps.vf_base_id; | |
4067 | vf = &pf->vf[vf_id]; | |
4068 | i40e_vc_notify_vf_reset(vf); | |
4069 | /* Allow VF to process pending reset notification */ | |
4070 | msleep(20); | |
4071 | i40e_reset_vf(vf, false); | |
4072 | } | |
4073 | } | |
4074 | ||
4075 | /** | |
4076 | * i40e_service_event_complete - Finish up the service event | |
4077 | * @pf: board private structure | |
4078 | **/ | |
4079 | static void i40e_service_event_complete(struct i40e_pf *pf) | |
4080 | { | |
4081 | BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); | |
4082 | ||
4083 | /* flush memory to make sure state is correct before next watchog */ | |
4084 | smp_mb__before_clear_bit(); | |
4085 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); | |
4086 | } | |
4087 | ||
4088 | /** | |
4089 | * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table | |
4090 | * @pf: board private structure | |
4091 | **/ | |
4092 | static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) | |
4093 | { | |
4094 | if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT)) | |
4095 | return; | |
4096 | ||
4097 | pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT; | |
4098 | ||
4099 | /* if interface is down do nothing */ | |
4100 | if (test_bit(__I40E_DOWN, &pf->state)) | |
4101 | return; | |
4102 | } | |
4103 | ||
4104 | /** | |
4105 | * i40e_vsi_link_event - notify VSI of a link event | |
4106 | * @vsi: vsi to be notified | |
4107 | * @link_up: link up or down | |
4108 | **/ | |
4109 | static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) | |
4110 | { | |
4111 | if (!vsi) | |
4112 | return; | |
4113 | ||
4114 | switch (vsi->type) { | |
4115 | case I40E_VSI_MAIN: | |
4116 | if (!vsi->netdev || !vsi->netdev_registered) | |
4117 | break; | |
4118 | ||
4119 | if (link_up) { | |
4120 | netif_carrier_on(vsi->netdev); | |
4121 | netif_tx_wake_all_queues(vsi->netdev); | |
4122 | } else { | |
4123 | netif_carrier_off(vsi->netdev); | |
4124 | netif_tx_stop_all_queues(vsi->netdev); | |
4125 | } | |
4126 | break; | |
4127 | ||
4128 | case I40E_VSI_SRIOV: | |
4129 | break; | |
4130 | ||
4131 | case I40E_VSI_VMDQ2: | |
4132 | case I40E_VSI_CTRL: | |
4133 | case I40E_VSI_MIRROR: | |
4134 | default: | |
4135 | /* there is no notification for other VSIs */ | |
4136 | break; | |
4137 | } | |
4138 | } | |
4139 | ||
4140 | /** | |
4141 | * i40e_veb_link_event - notify elements on the veb of a link event | |
4142 | * @veb: veb to be notified | |
4143 | * @link_up: link up or down | |
4144 | **/ | |
4145 | static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) | |
4146 | { | |
4147 | struct i40e_pf *pf; | |
4148 | int i; | |
4149 | ||
4150 | if (!veb || !veb->pf) | |
4151 | return; | |
4152 | pf = veb->pf; | |
4153 | ||
4154 | /* depth first... */ | |
4155 | for (i = 0; i < I40E_MAX_VEB; i++) | |
4156 | if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) | |
4157 | i40e_veb_link_event(pf->veb[i], link_up); | |
4158 | ||
4159 | /* ... now the local VSIs */ | |
4160 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
4161 | if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) | |
4162 | i40e_vsi_link_event(pf->vsi[i], link_up); | |
4163 | } | |
4164 | ||
4165 | /** | |
4166 | * i40e_link_event - Update netif_carrier status | |
4167 | * @pf: board private structure | |
4168 | **/ | |
4169 | static void i40e_link_event(struct i40e_pf *pf) | |
4170 | { | |
4171 | bool new_link, old_link; | |
4172 | ||
4173 | new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP); | |
4174 | old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); | |
4175 | ||
4176 | if (new_link == old_link) | |
4177 | return; | |
4178 | ||
6d779b41 AS |
4179 | if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state)) |
4180 | netdev_info(pf->vsi[pf->lan_vsi]->netdev, | |
4181 | "NIC Link is %s\n", (new_link ? "Up" : "Down")); | |
41c445ff JB |
4182 | |
4183 | /* Notify the base of the switch tree connected to | |
4184 | * the link. Floating VEBs are not notified. | |
4185 | */ | |
4186 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
4187 | i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); | |
4188 | else | |
4189 | i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link); | |
4190 | ||
4191 | if (pf->vf) | |
4192 | i40e_vc_notify_link_state(pf); | |
4193 | } | |
4194 | ||
4195 | /** | |
4196 | * i40e_check_hang_subtask - Check for hung queues and dropped interrupts | |
4197 | * @pf: board private structure | |
4198 | * | |
4199 | * Set the per-queue flags to request a check for stuck queues in the irq | |
4200 | * clean functions, then force interrupts to be sure the irq clean is called. | |
4201 | **/ | |
4202 | static void i40e_check_hang_subtask(struct i40e_pf *pf) | |
4203 | { | |
4204 | int i, v; | |
4205 | ||
4206 | /* If we're down or resetting, just bail */ | |
4207 | if (test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
4208 | return; | |
4209 | ||
4210 | /* for each VSI/netdev | |
4211 | * for each Tx queue | |
4212 | * set the check flag | |
4213 | * for each q_vector | |
4214 | * force an interrupt | |
4215 | */ | |
4216 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4217 | struct i40e_vsi *vsi = pf->vsi[v]; | |
4218 | int armed = 0; | |
4219 | ||
4220 | if (!pf->vsi[v] || | |
4221 | test_bit(__I40E_DOWN, &vsi->state) || | |
4222 | (vsi->netdev && !netif_carrier_ok(vsi->netdev))) | |
4223 | continue; | |
4224 | ||
4225 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
4226 | set_check_for_tx_hang(&vsi->tx_rings[i]); | |
4227 | if (test_bit(__I40E_HANG_CHECK_ARMED, | |
4228 | &vsi->tx_rings[i].state)) | |
4229 | armed++; | |
4230 | } | |
4231 | ||
4232 | if (armed) { | |
4233 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) { | |
4234 | wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, | |
4235 | (I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
4236 | I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK)); | |
4237 | } else { | |
4238 | u16 vec = vsi->base_vector - 1; | |
4239 | u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK | | |
4240 | I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK); | |
4241 | for (i = 0; i < vsi->num_q_vectors; i++, vec++) | |
4242 | wr32(&vsi->back->hw, | |
4243 | I40E_PFINT_DYN_CTLN(vec), val); | |
4244 | } | |
4245 | i40e_flush(&vsi->back->hw); | |
4246 | } | |
4247 | } | |
4248 | } | |
4249 | ||
4250 | /** | |
4251 | * i40e_watchdog_subtask - Check and bring link up | |
4252 | * @pf: board private structure | |
4253 | **/ | |
4254 | static void i40e_watchdog_subtask(struct i40e_pf *pf) | |
4255 | { | |
4256 | int i; | |
4257 | ||
4258 | /* if interface is down do nothing */ | |
4259 | if (test_bit(__I40E_DOWN, &pf->state) || | |
4260 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
4261 | return; | |
4262 | ||
4263 | /* Update the stats for active netdevs so the network stack | |
4264 | * can look at updated numbers whenever it cares to | |
4265 | */ | |
4266 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
4267 | if (pf->vsi[i] && pf->vsi[i]->netdev) | |
4268 | i40e_update_stats(pf->vsi[i]); | |
4269 | ||
4270 | /* Update the stats for the active switching components */ | |
4271 | for (i = 0; i < I40E_MAX_VEB; i++) | |
4272 | if (pf->veb[i]) | |
4273 | i40e_update_veb_stats(pf->veb[i]); | |
4274 | } | |
4275 | ||
4276 | /** | |
4277 | * i40e_reset_subtask - Set up for resetting the device and driver | |
4278 | * @pf: board private structure | |
4279 | **/ | |
4280 | static void i40e_reset_subtask(struct i40e_pf *pf) | |
4281 | { | |
4282 | u32 reset_flags = 0; | |
4283 | ||
4284 | if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { | |
4285 | reset_flags |= (1 << __I40E_REINIT_REQUESTED); | |
4286 | clear_bit(__I40E_REINIT_REQUESTED, &pf->state); | |
4287 | } | |
4288 | if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { | |
4289 | reset_flags |= (1 << __I40E_PF_RESET_REQUESTED); | |
4290 | clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
4291 | } | |
4292 | if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { | |
4293 | reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED); | |
4294 | clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); | |
4295 | } | |
4296 | if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { | |
4297 | reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED); | |
4298 | clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); | |
4299 | } | |
4300 | ||
4301 | /* If there's a recovery already waiting, it takes | |
4302 | * precedence before starting a new reset sequence. | |
4303 | */ | |
4304 | if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { | |
4305 | i40e_handle_reset_warning(pf); | |
4306 | return; | |
4307 | } | |
4308 | ||
4309 | /* If we're already down or resetting, just bail */ | |
4310 | if (reset_flags && | |
4311 | !test_bit(__I40E_DOWN, &pf->state) && | |
4312 | !test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
4313 | i40e_do_reset(pf, reset_flags); | |
4314 | } | |
4315 | ||
4316 | /** | |
4317 | * i40e_handle_link_event - Handle link event | |
4318 | * @pf: board private structure | |
4319 | * @e: event info posted on ARQ | |
4320 | **/ | |
4321 | static void i40e_handle_link_event(struct i40e_pf *pf, | |
4322 | struct i40e_arq_event_info *e) | |
4323 | { | |
4324 | struct i40e_hw *hw = &pf->hw; | |
4325 | struct i40e_aqc_get_link_status *status = | |
4326 | (struct i40e_aqc_get_link_status *)&e->desc.params.raw; | |
4327 | struct i40e_link_status *hw_link_info = &hw->phy.link_info; | |
4328 | ||
4329 | /* save off old link status information */ | |
4330 | memcpy(&pf->hw.phy.link_info_old, hw_link_info, | |
4331 | sizeof(pf->hw.phy.link_info_old)); | |
4332 | ||
4333 | /* update link status */ | |
4334 | hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type; | |
4335 | hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed; | |
4336 | hw_link_info->link_info = status->link_info; | |
4337 | hw_link_info->an_info = status->an_info; | |
4338 | hw_link_info->ext_info = status->ext_info; | |
4339 | hw_link_info->lse_enable = | |
4340 | le16_to_cpu(status->command_flags) & | |
4341 | I40E_AQ_LSE_ENABLE; | |
4342 | ||
4343 | /* process the event */ | |
4344 | i40e_link_event(pf); | |
4345 | ||
4346 | /* Do a new status request to re-enable LSE reporting | |
4347 | * and load new status information into the hw struct, | |
4348 | * then see if the status changed while processing the | |
4349 | * initial event. | |
4350 | */ | |
4351 | i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); | |
4352 | i40e_link_event(pf); | |
4353 | } | |
4354 | ||
4355 | /** | |
4356 | * i40e_clean_adminq_subtask - Clean the AdminQ rings | |
4357 | * @pf: board private structure | |
4358 | **/ | |
4359 | static void i40e_clean_adminq_subtask(struct i40e_pf *pf) | |
4360 | { | |
4361 | struct i40e_arq_event_info event; | |
4362 | struct i40e_hw *hw = &pf->hw; | |
4363 | u16 pending, i = 0; | |
4364 | i40e_status ret; | |
4365 | u16 opcode; | |
4366 | u32 val; | |
4367 | ||
4368 | if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state)) | |
4369 | return; | |
4370 | ||
4371 | event.msg_size = I40E_MAX_AQ_BUF_SIZE; | |
4372 | event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL); | |
4373 | if (!event.msg_buf) | |
4374 | return; | |
4375 | ||
4376 | do { | |
4377 | ret = i40e_clean_arq_element(hw, &event, &pending); | |
4378 | if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) { | |
4379 | dev_info(&pf->pdev->dev, "No ARQ event found\n"); | |
4380 | break; | |
4381 | } else if (ret) { | |
4382 | dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); | |
4383 | break; | |
4384 | } | |
4385 | ||
4386 | opcode = le16_to_cpu(event.desc.opcode); | |
4387 | switch (opcode) { | |
4388 | ||
4389 | case i40e_aqc_opc_get_link_status: | |
4390 | i40e_handle_link_event(pf, &event); | |
4391 | break; | |
4392 | case i40e_aqc_opc_send_msg_to_pf: | |
4393 | ret = i40e_vc_process_vf_msg(pf, | |
4394 | le16_to_cpu(event.desc.retval), | |
4395 | le32_to_cpu(event.desc.cookie_high), | |
4396 | le32_to_cpu(event.desc.cookie_low), | |
4397 | event.msg_buf, | |
4398 | event.msg_size); | |
4399 | break; | |
4400 | case i40e_aqc_opc_lldp_update_mib: | |
4401 | dev_info(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); | |
4402 | break; | |
4403 | case i40e_aqc_opc_event_lan_overflow: | |
4404 | dev_info(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); | |
4405 | i40e_handle_lan_overflow_event(pf, &event); | |
4406 | break; | |
4407 | default: | |
4408 | dev_info(&pf->pdev->dev, | |
4409 | "ARQ Error: Unknown event %d received\n", | |
4410 | event.desc.opcode); | |
4411 | break; | |
4412 | } | |
4413 | } while (pending && (i++ < pf->adminq_work_limit)); | |
4414 | ||
4415 | clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
4416 | /* re-enable Admin queue interrupt cause */ | |
4417 | val = rd32(hw, I40E_PFINT_ICR0_ENA); | |
4418 | val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
4419 | wr32(hw, I40E_PFINT_ICR0_ENA, val); | |
4420 | i40e_flush(hw); | |
4421 | ||
4422 | kfree(event.msg_buf); | |
4423 | } | |
4424 | ||
4425 | /** | |
4426 | * i40e_reconstitute_veb - rebuild the VEB and anything connected to it | |
4427 | * @veb: pointer to the VEB instance | |
4428 | * | |
4429 | * This is a recursive function that first builds the attached VSIs then | |
4430 | * recurses in to build the next layer of VEB. We track the connections | |
4431 | * through our own index numbers because the seid's from the HW could | |
4432 | * change across the reset. | |
4433 | **/ | |
4434 | static int i40e_reconstitute_veb(struct i40e_veb *veb) | |
4435 | { | |
4436 | struct i40e_vsi *ctl_vsi = NULL; | |
4437 | struct i40e_pf *pf = veb->pf; | |
4438 | int v, veb_idx; | |
4439 | int ret; | |
4440 | ||
4441 | /* build VSI that owns this VEB, temporarily attached to base VEB */ | |
4442 | for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) { | |
4443 | if (pf->vsi[v] && | |
4444 | pf->vsi[v]->veb_idx == veb->idx && | |
4445 | pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
4446 | ctl_vsi = pf->vsi[v]; | |
4447 | break; | |
4448 | } | |
4449 | } | |
4450 | if (!ctl_vsi) { | |
4451 | dev_info(&pf->pdev->dev, | |
4452 | "missing owner VSI for veb_idx %d\n", veb->idx); | |
4453 | ret = -ENOENT; | |
4454 | goto end_reconstitute; | |
4455 | } | |
4456 | if (ctl_vsi != pf->vsi[pf->lan_vsi]) | |
4457 | ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
4458 | ret = i40e_add_vsi(ctl_vsi); | |
4459 | if (ret) { | |
4460 | dev_info(&pf->pdev->dev, | |
4461 | "rebuild of owner VSI failed: %d\n", ret); | |
4462 | goto end_reconstitute; | |
4463 | } | |
4464 | i40e_vsi_reset_stats(ctl_vsi); | |
4465 | ||
4466 | /* create the VEB in the switch and move the VSI onto the VEB */ | |
4467 | ret = i40e_add_veb(veb, ctl_vsi); | |
4468 | if (ret) | |
4469 | goto end_reconstitute; | |
4470 | ||
4471 | /* create the remaining VSIs attached to this VEB */ | |
4472 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4473 | if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) | |
4474 | continue; | |
4475 | ||
4476 | if (pf->vsi[v]->veb_idx == veb->idx) { | |
4477 | struct i40e_vsi *vsi = pf->vsi[v]; | |
4478 | vsi->uplink_seid = veb->seid; | |
4479 | ret = i40e_add_vsi(vsi); | |
4480 | if (ret) { | |
4481 | dev_info(&pf->pdev->dev, | |
4482 | "rebuild of vsi_idx %d failed: %d\n", | |
4483 | v, ret); | |
4484 | goto end_reconstitute; | |
4485 | } | |
4486 | i40e_vsi_reset_stats(vsi); | |
4487 | } | |
4488 | } | |
4489 | ||
4490 | /* create any VEBs attached to this VEB - RECURSION */ | |
4491 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
4492 | if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { | |
4493 | pf->veb[veb_idx]->uplink_seid = veb->seid; | |
4494 | ret = i40e_reconstitute_veb(pf->veb[veb_idx]); | |
4495 | if (ret) | |
4496 | break; | |
4497 | } | |
4498 | } | |
4499 | ||
4500 | end_reconstitute: | |
4501 | return ret; | |
4502 | } | |
4503 | ||
4504 | /** | |
4505 | * i40e_get_capabilities - get info about the HW | |
4506 | * @pf: the PF struct | |
4507 | **/ | |
4508 | static int i40e_get_capabilities(struct i40e_pf *pf) | |
4509 | { | |
4510 | struct i40e_aqc_list_capabilities_element_resp *cap_buf; | |
4511 | u16 data_size; | |
4512 | int buf_len; | |
4513 | int err; | |
4514 | ||
4515 | buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); | |
4516 | do { | |
4517 | cap_buf = kzalloc(buf_len, GFP_KERNEL); | |
4518 | if (!cap_buf) | |
4519 | return -ENOMEM; | |
4520 | ||
4521 | /* this loads the data into the hw struct for us */ | |
4522 | err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, | |
4523 | &data_size, | |
4524 | i40e_aqc_opc_list_func_capabilities, | |
4525 | NULL); | |
4526 | /* data loaded, buffer no longer needed */ | |
4527 | kfree(cap_buf); | |
4528 | ||
4529 | if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { | |
4530 | /* retry with a larger buffer */ | |
4531 | buf_len = data_size; | |
4532 | } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { | |
4533 | dev_info(&pf->pdev->dev, | |
4534 | "capability discovery failed: aq=%d\n", | |
4535 | pf->hw.aq.asq_last_status); | |
4536 | return -ENODEV; | |
4537 | } | |
4538 | } while (err); | |
4539 | ||
4540 | if (pf->hw.debug_mask & I40E_DEBUG_USER) | |
4541 | dev_info(&pf->pdev->dev, | |
4542 | "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", | |
4543 | pf->hw.pf_id, pf->hw.func_caps.num_vfs, | |
4544 | pf->hw.func_caps.num_msix_vectors, | |
4545 | pf->hw.func_caps.num_msix_vectors_vf, | |
4546 | pf->hw.func_caps.fd_filters_guaranteed, | |
4547 | pf->hw.func_caps.fd_filters_best_effort, | |
4548 | pf->hw.func_caps.num_tx_qp, | |
4549 | pf->hw.func_caps.num_vsis); | |
4550 | ||
4551 | return 0; | |
4552 | } | |
4553 | ||
4554 | /** | |
4555 | * i40e_fdir_setup - initialize the Flow Director resources | |
4556 | * @pf: board private structure | |
4557 | **/ | |
4558 | static void i40e_fdir_setup(struct i40e_pf *pf) | |
4559 | { | |
4560 | struct i40e_vsi *vsi; | |
4561 | bool new_vsi = false; | |
4562 | int err, i; | |
4563 | ||
4564 | if (!(pf->flags & (I40E_FLAG_FDIR_ENABLED|I40E_FLAG_FDIR_ATR_ENABLED))) | |
4565 | return; | |
4566 | ||
4567 | pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; | |
4568 | ||
4569 | /* find existing or make new FDIR VSI */ | |
4570 | vsi = NULL; | |
4571 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
4572 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) | |
4573 | vsi = pf->vsi[i]; | |
4574 | if (!vsi) { | |
4575 | vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, pf->mac_seid, 0); | |
4576 | if (!vsi) { | |
4577 | dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); | |
4578 | pf->flags &= ~I40E_FLAG_FDIR_ENABLED; | |
4579 | return; | |
4580 | } | |
4581 | new_vsi = true; | |
4582 | } | |
4583 | WARN_ON(vsi->base_queue != I40E_FDIR_RING); | |
4584 | i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_rings); | |
4585 | ||
4586 | err = i40e_vsi_setup_tx_resources(vsi); | |
4587 | if (!err) | |
4588 | err = i40e_vsi_setup_rx_resources(vsi); | |
4589 | if (!err) | |
4590 | err = i40e_vsi_configure(vsi); | |
4591 | if (!err && new_vsi) { | |
4592 | char int_name[IFNAMSIZ + 9]; | |
4593 | snprintf(int_name, sizeof(int_name) - 1, "%s-fdir", | |
4594 | dev_driver_string(&pf->pdev->dev)); | |
4595 | err = i40e_vsi_request_irq(vsi, int_name); | |
4596 | } | |
4597 | if (!err) | |
4598 | err = i40e_up_complete(vsi); | |
4599 | ||
4600 | clear_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
4601 | } | |
4602 | ||
4603 | /** | |
4604 | * i40e_fdir_teardown - release the Flow Director resources | |
4605 | * @pf: board private structure | |
4606 | **/ | |
4607 | static void i40e_fdir_teardown(struct i40e_pf *pf) | |
4608 | { | |
4609 | int i; | |
4610 | ||
4611 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
4612 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { | |
4613 | i40e_vsi_release(pf->vsi[i]); | |
4614 | break; | |
4615 | } | |
4616 | } | |
4617 | } | |
4618 | ||
4619 | /** | |
4620 | * i40e_handle_reset_warning - prep for the core to reset | |
4621 | * @pf: board private structure | |
4622 | * | |
4623 | * Close up the VFs and other things in prep for a Core Reset, | |
4624 | * then get ready to rebuild the world. | |
4625 | **/ | |
4626 | static void i40e_handle_reset_warning(struct i40e_pf *pf) | |
4627 | { | |
4628 | struct i40e_driver_version dv; | |
4629 | struct i40e_hw *hw = &pf->hw; | |
4630 | i40e_status ret; | |
4631 | u32 v; | |
4632 | ||
4633 | clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
4634 | if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
4635 | return; | |
4636 | ||
4637 | dev_info(&pf->pdev->dev, "Tearing down internal switch for reset\n"); | |
4638 | ||
4639 | i40e_vc_notify_reset(pf); | |
4640 | ||
4641 | /* quiesce the VSIs and their queues that are not already DOWN */ | |
4642 | i40e_pf_quiesce_all_vsi(pf); | |
4643 | ||
4644 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4645 | if (pf->vsi[v]) | |
4646 | pf->vsi[v]->seid = 0; | |
4647 | } | |
4648 | ||
4649 | i40e_shutdown_adminq(&pf->hw); | |
4650 | ||
4651 | /* Now we wait for GRST to settle out. | |
4652 | * We don't have to delete the VEBs or VSIs from the hw switch | |
4653 | * because the reset will make them disappear. | |
4654 | */ | |
4655 | ret = i40e_pf_reset(hw); | |
4656 | if (ret) | |
4657 | dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); | |
4658 | pf->pfr_count++; | |
4659 | ||
4660 | if (test_bit(__I40E_DOWN, &pf->state)) | |
4661 | goto end_core_reset; | |
4662 | dev_info(&pf->pdev->dev, "Rebuilding internal switch\n"); | |
4663 | ||
4664 | /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ | |
4665 | ret = i40e_init_adminq(&pf->hw); | |
4666 | if (ret) { | |
4667 | dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret); | |
4668 | goto end_core_reset; | |
4669 | } | |
4670 | ||
4671 | ret = i40e_get_capabilities(pf); | |
4672 | if (ret) { | |
4673 | dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n", | |
4674 | ret); | |
4675 | goto end_core_reset; | |
4676 | } | |
4677 | ||
4678 | /* call shutdown HMC */ | |
4679 | ret = i40e_shutdown_lan_hmc(hw); | |
4680 | if (ret) { | |
4681 | dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret); | |
4682 | goto end_core_reset; | |
4683 | } | |
4684 | ||
4685 | ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, | |
4686 | hw->func_caps.num_rx_qp, | |
4687 | pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); | |
4688 | if (ret) { | |
4689 | dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); | |
4690 | goto end_core_reset; | |
4691 | } | |
4692 | ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
4693 | if (ret) { | |
4694 | dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); | |
4695 | goto end_core_reset; | |
4696 | } | |
4697 | ||
4698 | /* do basic switch setup */ | |
4699 | ret = i40e_setup_pf_switch(pf); | |
4700 | if (ret) | |
4701 | goto end_core_reset; | |
4702 | ||
4703 | /* Rebuild the VSIs and VEBs that existed before reset. | |
4704 | * They are still in our local switch element arrays, so only | |
4705 | * need to rebuild the switch model in the HW. | |
4706 | * | |
4707 | * If there were VEBs but the reconstitution failed, we'll try | |
4708 | * try to recover minimal use by getting the basic PF VSI working. | |
4709 | */ | |
4710 | if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { | |
4711 | dev_info(&pf->pdev->dev, "attempting to rebuild switch\n"); | |
4712 | /* find the one VEB connected to the MAC, and find orphans */ | |
4713 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
4714 | if (!pf->veb[v]) | |
4715 | continue; | |
4716 | ||
4717 | if (pf->veb[v]->uplink_seid == pf->mac_seid || | |
4718 | pf->veb[v]->uplink_seid == 0) { | |
4719 | ret = i40e_reconstitute_veb(pf->veb[v]); | |
4720 | ||
4721 | if (!ret) | |
4722 | continue; | |
4723 | ||
4724 | /* If Main VEB failed, we're in deep doodoo, | |
4725 | * so give up rebuilding the switch and set up | |
4726 | * for minimal rebuild of PF VSI. | |
4727 | * If orphan failed, we'll report the error | |
4728 | * but try to keep going. | |
4729 | */ | |
4730 | if (pf->veb[v]->uplink_seid == pf->mac_seid) { | |
4731 | dev_info(&pf->pdev->dev, | |
4732 | "rebuild of switch failed: %d, will try to set up simple PF connection\n", | |
4733 | ret); | |
4734 | pf->vsi[pf->lan_vsi]->uplink_seid | |
4735 | = pf->mac_seid; | |
4736 | break; | |
4737 | } else if (pf->veb[v]->uplink_seid == 0) { | |
4738 | dev_info(&pf->pdev->dev, | |
4739 | "rebuild of orphan VEB failed: %d\n", | |
4740 | ret); | |
4741 | } | |
4742 | } | |
4743 | } | |
4744 | } | |
4745 | ||
4746 | if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { | |
4747 | dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); | |
4748 | /* no VEB, so rebuild only the Main VSI */ | |
4749 | ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); | |
4750 | if (ret) { | |
4751 | dev_info(&pf->pdev->dev, | |
4752 | "rebuild of Main VSI failed: %d\n", ret); | |
4753 | goto end_core_reset; | |
4754 | } | |
4755 | } | |
4756 | ||
4757 | /* reinit the misc interrupt */ | |
4758 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
4759 | ret = i40e_setup_misc_vector(pf); | |
4760 | ||
4761 | /* restart the VSIs that were rebuilt and running before the reset */ | |
4762 | i40e_pf_unquiesce_all_vsi(pf); | |
4763 | ||
4764 | /* tell the firmware that we're starting */ | |
4765 | dv.major_version = DRV_VERSION_MAJOR; | |
4766 | dv.minor_version = DRV_VERSION_MINOR; | |
4767 | dv.build_version = DRV_VERSION_BUILD; | |
4768 | dv.subbuild_version = 0; | |
4769 | i40e_aq_send_driver_version(&pf->hw, &dv, NULL); | |
4770 | ||
4771 | dev_info(&pf->pdev->dev, "PF reset done\n"); | |
4772 | ||
4773 | end_core_reset: | |
4774 | clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); | |
4775 | } | |
4776 | ||
4777 | /** | |
4778 | * i40e_handle_mdd_event | |
4779 | * @pf: pointer to the pf structure | |
4780 | * | |
4781 | * Called from the MDD irq handler to identify possibly malicious vfs | |
4782 | **/ | |
4783 | static void i40e_handle_mdd_event(struct i40e_pf *pf) | |
4784 | { | |
4785 | struct i40e_hw *hw = &pf->hw; | |
4786 | bool mdd_detected = false; | |
4787 | struct i40e_vf *vf; | |
4788 | u32 reg; | |
4789 | int i; | |
4790 | ||
4791 | if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) | |
4792 | return; | |
4793 | ||
4794 | /* find what triggered the MDD event */ | |
4795 | reg = rd32(hw, I40E_GL_MDET_TX); | |
4796 | if (reg & I40E_GL_MDET_TX_VALID_MASK) { | |
4797 | u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK) | |
4798 | >> I40E_GL_MDET_TX_FUNCTION_SHIFT; | |
4799 | u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT) | |
4800 | >> I40E_GL_MDET_TX_EVENT_SHIFT; | |
4801 | u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) | |
4802 | >> I40E_GL_MDET_TX_QUEUE_SHIFT; | |
4803 | dev_info(&pf->pdev->dev, | |
4804 | "Malicious Driver Detection TX event 0x%02x on q %d of function 0x%02x\n", | |
4805 | event, queue, func); | |
4806 | wr32(hw, I40E_GL_MDET_TX, 0xffffffff); | |
4807 | mdd_detected = true; | |
4808 | } | |
4809 | reg = rd32(hw, I40E_GL_MDET_RX); | |
4810 | if (reg & I40E_GL_MDET_RX_VALID_MASK) { | |
4811 | u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) | |
4812 | >> I40E_GL_MDET_RX_FUNCTION_SHIFT; | |
4813 | u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT) | |
4814 | >> I40E_GL_MDET_RX_EVENT_SHIFT; | |
4815 | u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) | |
4816 | >> I40E_GL_MDET_RX_QUEUE_SHIFT; | |
4817 | dev_info(&pf->pdev->dev, | |
4818 | "Malicious Driver Detection RX event 0x%02x on q %d of function 0x%02x\n", | |
4819 | event, queue, func); | |
4820 | wr32(hw, I40E_GL_MDET_RX, 0xffffffff); | |
4821 | mdd_detected = true; | |
4822 | } | |
4823 | ||
4824 | /* see if one of the VFs needs its hand slapped */ | |
4825 | for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { | |
4826 | vf = &(pf->vf[i]); | |
4827 | reg = rd32(hw, I40E_VP_MDET_TX(i)); | |
4828 | if (reg & I40E_VP_MDET_TX_VALID_MASK) { | |
4829 | wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); | |
4830 | vf->num_mdd_events++; | |
4831 | dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i); | |
4832 | } | |
4833 | ||
4834 | reg = rd32(hw, I40E_VP_MDET_RX(i)); | |
4835 | if (reg & I40E_VP_MDET_RX_VALID_MASK) { | |
4836 | wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); | |
4837 | vf->num_mdd_events++; | |
4838 | dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i); | |
4839 | } | |
4840 | ||
4841 | if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { | |
4842 | dev_info(&pf->pdev->dev, | |
4843 | "Too many MDD events on VF %d, disabled\n", i); | |
4844 | dev_info(&pf->pdev->dev, | |
4845 | "Use PF Control I/F to re-enable the VF\n"); | |
4846 | set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); | |
4847 | } | |
4848 | } | |
4849 | ||
4850 | /* re-enable mdd interrupt cause */ | |
4851 | clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
4852 | reg = rd32(hw, I40E_PFINT_ICR0_ENA); | |
4853 | reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
4854 | wr32(hw, I40E_PFINT_ICR0_ENA, reg); | |
4855 | i40e_flush(hw); | |
4856 | } | |
4857 | ||
4858 | /** | |
4859 | * i40e_service_task - Run the driver's async subtasks | |
4860 | * @work: pointer to work_struct containing our data | |
4861 | **/ | |
4862 | static void i40e_service_task(struct work_struct *work) | |
4863 | { | |
4864 | struct i40e_pf *pf = container_of(work, | |
4865 | struct i40e_pf, | |
4866 | service_task); | |
4867 | unsigned long start_time = jiffies; | |
4868 | ||
4869 | i40e_reset_subtask(pf); | |
4870 | i40e_handle_mdd_event(pf); | |
4871 | i40e_vc_process_vflr_event(pf); | |
4872 | i40e_watchdog_subtask(pf); | |
4873 | i40e_fdir_reinit_subtask(pf); | |
4874 | i40e_check_hang_subtask(pf); | |
4875 | i40e_sync_filters_subtask(pf); | |
4876 | i40e_clean_adminq_subtask(pf); | |
4877 | ||
4878 | i40e_service_event_complete(pf); | |
4879 | ||
4880 | /* If the tasks have taken longer than one timer cycle or there | |
4881 | * is more work to be done, reschedule the service task now | |
4882 | * rather than wait for the timer to tick again. | |
4883 | */ | |
4884 | if (time_after(jiffies, (start_time + pf->service_timer_period)) || | |
4885 | test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || | |
4886 | test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || | |
4887 | test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) | |
4888 | i40e_service_event_schedule(pf); | |
4889 | } | |
4890 | ||
4891 | /** | |
4892 | * i40e_service_timer - timer callback | |
4893 | * @data: pointer to PF struct | |
4894 | **/ | |
4895 | static void i40e_service_timer(unsigned long data) | |
4896 | { | |
4897 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
4898 | ||
4899 | mod_timer(&pf->service_timer, | |
4900 | round_jiffies(jiffies + pf->service_timer_period)); | |
4901 | i40e_service_event_schedule(pf); | |
4902 | } | |
4903 | ||
4904 | /** | |
4905 | * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI | |
4906 | * @vsi: the VSI being configured | |
4907 | **/ | |
4908 | static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) | |
4909 | { | |
4910 | struct i40e_pf *pf = vsi->back; | |
4911 | ||
4912 | switch (vsi->type) { | |
4913 | case I40E_VSI_MAIN: | |
4914 | vsi->alloc_queue_pairs = pf->num_lan_qps; | |
4915 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
4916 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
4917 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
4918 | vsi->num_q_vectors = pf->num_lan_msix; | |
4919 | else | |
4920 | vsi->num_q_vectors = 1; | |
4921 | ||
4922 | break; | |
4923 | ||
4924 | case I40E_VSI_FDIR: | |
4925 | vsi->alloc_queue_pairs = 1; | |
4926 | vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, | |
4927 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
4928 | vsi->num_q_vectors = 1; | |
4929 | break; | |
4930 | ||
4931 | case I40E_VSI_VMDQ2: | |
4932 | vsi->alloc_queue_pairs = pf->num_vmdq_qps; | |
4933 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
4934 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
4935 | vsi->num_q_vectors = pf->num_vmdq_msix; | |
4936 | break; | |
4937 | ||
4938 | case I40E_VSI_SRIOV: | |
4939 | vsi->alloc_queue_pairs = pf->num_vf_qps; | |
4940 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
4941 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
4942 | break; | |
4943 | ||
4944 | default: | |
4945 | WARN_ON(1); | |
4946 | return -ENODATA; | |
4947 | } | |
4948 | ||
4949 | return 0; | |
4950 | } | |
4951 | ||
4952 | /** | |
4953 | * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF | |
4954 | * @pf: board private structure | |
4955 | * @type: type of VSI | |
4956 | * | |
4957 | * On error: returns error code (negative) | |
4958 | * On success: returns vsi index in PF (positive) | |
4959 | **/ | |
4960 | static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) | |
4961 | { | |
4962 | int ret = -ENODEV; | |
4963 | struct i40e_vsi *vsi; | |
493fb300 | 4964 | int sz_vectors; |
41c445ff JB |
4965 | int vsi_idx; |
4966 | int i; | |
4967 | ||
4968 | /* Need to protect the allocation of the VSIs at the PF level */ | |
4969 | mutex_lock(&pf->switch_mutex); | |
4970 | ||
4971 | /* VSI list may be fragmented if VSI creation/destruction has | |
4972 | * been happening. We can afford to do a quick scan to look | |
4973 | * for any free VSIs in the list. | |
4974 | * | |
4975 | * find next empty vsi slot, looping back around if necessary | |
4976 | */ | |
4977 | i = pf->next_vsi; | |
4978 | while (i < pf->hw.func_caps.num_vsis && pf->vsi[i]) | |
4979 | i++; | |
4980 | if (i >= pf->hw.func_caps.num_vsis) { | |
4981 | i = 0; | |
4982 | while (i < pf->next_vsi && pf->vsi[i]) | |
4983 | i++; | |
4984 | } | |
4985 | ||
4986 | if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) { | |
4987 | vsi_idx = i; /* Found one! */ | |
4988 | } else { | |
4989 | ret = -ENODEV; | |
493fb300 | 4990 | goto unlock_pf; /* out of VSI slots! */ |
41c445ff JB |
4991 | } |
4992 | pf->next_vsi = ++i; | |
4993 | ||
4994 | vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); | |
4995 | if (!vsi) { | |
4996 | ret = -ENOMEM; | |
493fb300 | 4997 | goto unlock_pf; |
41c445ff JB |
4998 | } |
4999 | vsi->type = type; | |
5000 | vsi->back = pf; | |
5001 | set_bit(__I40E_DOWN, &vsi->state); | |
5002 | vsi->flags = 0; | |
5003 | vsi->idx = vsi_idx; | |
5004 | vsi->rx_itr_setting = pf->rx_itr_default; | |
5005 | vsi->tx_itr_setting = pf->tx_itr_default; | |
5006 | vsi->netdev_registered = false; | |
5007 | vsi->work_limit = I40E_DEFAULT_IRQ_WORK; | |
5008 | INIT_LIST_HEAD(&vsi->mac_filter_list); | |
5009 | ||
5010 | i40e_set_num_rings_in_vsi(vsi); | |
5011 | ||
493fb300 AD |
5012 | /* allocate memory for q_vector pointers */ |
5013 | sz_vectors = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors; | |
5014 | vsi->q_vectors = kzalloc(sz_vectors, GFP_KERNEL); | |
5015 | if (!vsi->q_vectors) { | |
5016 | ret = -ENOMEM; | |
5017 | goto err_vectors; | |
5018 | } | |
5019 | ||
41c445ff JB |
5020 | /* Setup default MSIX irq handler for VSI */ |
5021 | i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); | |
5022 | ||
5023 | pf->vsi[vsi_idx] = vsi; | |
5024 | ret = vsi_idx; | |
493fb300 AD |
5025 | goto unlock_pf; |
5026 | ||
5027 | err_vectors: | |
5028 | pf->next_vsi = i - 1; | |
5029 | kfree(vsi); | |
5030 | unlock_pf: | |
41c445ff JB |
5031 | mutex_unlock(&pf->switch_mutex); |
5032 | return ret; | |
5033 | } | |
5034 | ||
5035 | /** | |
5036 | * i40e_vsi_clear - Deallocate the VSI provided | |
5037 | * @vsi: the VSI being un-configured | |
5038 | **/ | |
5039 | static int i40e_vsi_clear(struct i40e_vsi *vsi) | |
5040 | { | |
5041 | struct i40e_pf *pf; | |
5042 | ||
5043 | if (!vsi) | |
5044 | return 0; | |
5045 | ||
5046 | if (!vsi->back) | |
5047 | goto free_vsi; | |
5048 | pf = vsi->back; | |
5049 | ||
5050 | mutex_lock(&pf->switch_mutex); | |
5051 | if (!pf->vsi[vsi->idx]) { | |
5052 | dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", | |
5053 | vsi->idx, vsi->idx, vsi, vsi->type); | |
5054 | goto unlock_vsi; | |
5055 | } | |
5056 | ||
5057 | if (pf->vsi[vsi->idx] != vsi) { | |
5058 | dev_err(&pf->pdev->dev, | |
5059 | "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", | |
5060 | pf->vsi[vsi->idx]->idx, | |
5061 | pf->vsi[vsi->idx], | |
5062 | pf->vsi[vsi->idx]->type, | |
5063 | vsi->idx, vsi, vsi->type); | |
5064 | goto unlock_vsi; | |
5065 | } | |
5066 | ||
5067 | /* updates the pf for this cleared vsi */ | |
5068 | i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); | |
5069 | i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); | |
5070 | ||
493fb300 AD |
5071 | /* free the ring and vector containers */ |
5072 | kfree(vsi->q_vectors); | |
5073 | ||
41c445ff JB |
5074 | pf->vsi[vsi->idx] = NULL; |
5075 | if (vsi->idx < pf->next_vsi) | |
5076 | pf->next_vsi = vsi->idx; | |
5077 | ||
5078 | unlock_vsi: | |
5079 | mutex_unlock(&pf->switch_mutex); | |
5080 | free_vsi: | |
5081 | kfree(vsi); | |
5082 | ||
5083 | return 0; | |
5084 | } | |
5085 | ||
5086 | /** | |
5087 | * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI | |
5088 | * @vsi: the VSI being configured | |
5089 | **/ | |
5090 | static int i40e_alloc_rings(struct i40e_vsi *vsi) | |
5091 | { | |
5092 | struct i40e_pf *pf = vsi->back; | |
5093 | int ret = 0; | |
5094 | int i; | |
5095 | ||
5096 | vsi->rx_rings = kcalloc(vsi->alloc_queue_pairs, | |
5097 | sizeof(struct i40e_ring), GFP_KERNEL); | |
5098 | if (!vsi->rx_rings) { | |
5099 | ret = -ENOMEM; | |
5100 | goto err_alloc_rings; | |
5101 | } | |
5102 | ||
5103 | vsi->tx_rings = kcalloc(vsi->alloc_queue_pairs, | |
5104 | sizeof(struct i40e_ring), GFP_KERNEL); | |
5105 | if (!vsi->tx_rings) { | |
5106 | ret = -ENOMEM; | |
5107 | kfree(vsi->rx_rings); | |
5108 | goto err_alloc_rings; | |
5109 | } | |
5110 | ||
5111 | /* Set basic values in the rings to be used later during open() */ | |
5112 | for (i = 0; i < vsi->alloc_queue_pairs; i++) { | |
5113 | struct i40e_ring *rx_ring = &vsi->rx_rings[i]; | |
5114 | struct i40e_ring *tx_ring = &vsi->tx_rings[i]; | |
5115 | ||
5116 | tx_ring->queue_index = i; | |
5117 | tx_ring->reg_idx = vsi->base_queue + i; | |
5118 | tx_ring->ring_active = false; | |
5119 | tx_ring->vsi = vsi; | |
5120 | tx_ring->netdev = vsi->netdev; | |
5121 | tx_ring->dev = &pf->pdev->dev; | |
5122 | tx_ring->count = vsi->num_desc; | |
5123 | tx_ring->size = 0; | |
5124 | tx_ring->dcb_tc = 0; | |
5125 | ||
5126 | rx_ring->queue_index = i; | |
5127 | rx_ring->reg_idx = vsi->base_queue + i; | |
5128 | rx_ring->ring_active = false; | |
5129 | rx_ring->vsi = vsi; | |
5130 | rx_ring->netdev = vsi->netdev; | |
5131 | rx_ring->dev = &pf->pdev->dev; | |
5132 | rx_ring->count = vsi->num_desc; | |
5133 | rx_ring->size = 0; | |
5134 | rx_ring->dcb_tc = 0; | |
5135 | if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) | |
5136 | set_ring_16byte_desc_enabled(rx_ring); | |
5137 | else | |
5138 | clear_ring_16byte_desc_enabled(rx_ring); | |
5139 | } | |
5140 | ||
5141 | err_alloc_rings: | |
5142 | return ret; | |
5143 | } | |
5144 | ||
5145 | /** | |
5146 | * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI | |
5147 | * @vsi: the VSI being cleaned | |
5148 | **/ | |
5149 | static int i40e_vsi_clear_rings(struct i40e_vsi *vsi) | |
5150 | { | |
5151 | if (vsi) { | |
5152 | kfree(vsi->rx_rings); | |
5153 | kfree(vsi->tx_rings); | |
5154 | } | |
5155 | ||
5156 | return 0; | |
5157 | } | |
5158 | ||
5159 | /** | |
5160 | * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel | |
5161 | * @pf: board private structure | |
5162 | * @vectors: the number of MSI-X vectors to request | |
5163 | * | |
5164 | * Returns the number of vectors reserved, or error | |
5165 | **/ | |
5166 | static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) | |
5167 | { | |
5168 | int err = 0; | |
5169 | ||
5170 | pf->num_msix_entries = 0; | |
5171 | while (vectors >= I40E_MIN_MSIX) { | |
5172 | err = pci_enable_msix(pf->pdev, pf->msix_entries, vectors); | |
5173 | if (err == 0) { | |
5174 | /* good to go */ | |
5175 | pf->num_msix_entries = vectors; | |
5176 | break; | |
5177 | } else if (err < 0) { | |
5178 | /* total failure */ | |
5179 | dev_info(&pf->pdev->dev, | |
5180 | "MSI-X vector reservation failed: %d\n", err); | |
5181 | vectors = 0; | |
5182 | break; | |
5183 | } else { | |
5184 | /* err > 0 is the hint for retry */ | |
5185 | dev_info(&pf->pdev->dev, | |
5186 | "MSI-X vectors wanted %d, retrying with %d\n", | |
5187 | vectors, err); | |
5188 | vectors = err; | |
5189 | } | |
5190 | } | |
5191 | ||
5192 | if (vectors > 0 && vectors < I40E_MIN_MSIX) { | |
5193 | dev_info(&pf->pdev->dev, | |
5194 | "Couldn't get enough vectors, only %d available\n", | |
5195 | vectors); | |
5196 | vectors = 0; | |
5197 | } | |
5198 | ||
5199 | return vectors; | |
5200 | } | |
5201 | ||
5202 | /** | |
5203 | * i40e_init_msix - Setup the MSIX capability | |
5204 | * @pf: board private structure | |
5205 | * | |
5206 | * Work with the OS to set up the MSIX vectors needed. | |
5207 | * | |
5208 | * Returns 0 on success, negative on failure | |
5209 | **/ | |
5210 | static int i40e_init_msix(struct i40e_pf *pf) | |
5211 | { | |
5212 | i40e_status err = 0; | |
5213 | struct i40e_hw *hw = &pf->hw; | |
5214 | int v_budget, i; | |
5215 | int vec; | |
5216 | ||
5217 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) | |
5218 | return -ENODEV; | |
5219 | ||
5220 | /* The number of vectors we'll request will be comprised of: | |
5221 | * - Add 1 for "other" cause for Admin Queue events, etc. | |
5222 | * - The number of LAN queue pairs | |
5223 | * already adjusted for the NUMA node | |
5224 | * assumes symmetric Tx/Rx pairing | |
5225 | * - The number of VMDq pairs | |
5226 | * Once we count this up, try the request. | |
5227 | * | |
5228 | * If we can't get what we want, we'll simplify to nearly nothing | |
5229 | * and try again. If that still fails, we punt. | |
5230 | */ | |
5231 | pf->num_lan_msix = pf->num_lan_qps; | |
5232 | pf->num_vmdq_msix = pf->num_vmdq_qps; | |
5233 | v_budget = 1 + pf->num_lan_msix; | |
5234 | v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix); | |
5235 | if (pf->flags & I40E_FLAG_FDIR_ENABLED) | |
5236 | v_budget++; | |
5237 | ||
5238 | /* Scale down if necessary, and the rings will share vectors */ | |
5239 | v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors); | |
5240 | ||
5241 | pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), | |
5242 | GFP_KERNEL); | |
5243 | if (!pf->msix_entries) | |
5244 | return -ENOMEM; | |
5245 | ||
5246 | for (i = 0; i < v_budget; i++) | |
5247 | pf->msix_entries[i].entry = i; | |
5248 | vec = i40e_reserve_msix_vectors(pf, v_budget); | |
5249 | if (vec < I40E_MIN_MSIX) { | |
5250 | pf->flags &= ~I40E_FLAG_MSIX_ENABLED; | |
5251 | kfree(pf->msix_entries); | |
5252 | pf->msix_entries = NULL; | |
5253 | return -ENODEV; | |
5254 | ||
5255 | } else if (vec == I40E_MIN_MSIX) { | |
5256 | /* Adjust for minimal MSIX use */ | |
5257 | dev_info(&pf->pdev->dev, "Features disabled, not enough MSIX vectors\n"); | |
5258 | pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; | |
5259 | pf->num_vmdq_vsis = 0; | |
5260 | pf->num_vmdq_qps = 0; | |
5261 | pf->num_vmdq_msix = 0; | |
5262 | pf->num_lan_qps = 1; | |
5263 | pf->num_lan_msix = 1; | |
5264 | ||
5265 | } else if (vec != v_budget) { | |
5266 | /* Scale vector usage down */ | |
5267 | pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ | |
5268 | vec--; /* reserve the misc vector */ | |
5269 | ||
5270 | /* partition out the remaining vectors */ | |
5271 | switch (vec) { | |
5272 | case 2: | |
5273 | pf->num_vmdq_vsis = 1; | |
5274 | pf->num_lan_msix = 1; | |
5275 | break; | |
5276 | case 3: | |
5277 | pf->num_vmdq_vsis = 1; | |
5278 | pf->num_lan_msix = 2; | |
5279 | break; | |
5280 | default: | |
5281 | pf->num_lan_msix = min_t(int, (vec / 2), | |
5282 | pf->num_lan_qps); | |
5283 | pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix), | |
5284 | I40E_DEFAULT_NUM_VMDQ_VSI); | |
5285 | break; | |
5286 | } | |
5287 | } | |
5288 | ||
5289 | return err; | |
5290 | } | |
5291 | ||
493fb300 AD |
5292 | /** |
5293 | * i40e_alloc_q_vector - Allocate memory for a single interrupt vector | |
5294 | * @vsi: the VSI being configured | |
5295 | * @v_idx: index of the vector in the vsi struct | |
5296 | * | |
5297 | * We allocate one q_vector. If allocation fails we return -ENOMEM. | |
5298 | **/ | |
5299 | static int i40e_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) | |
5300 | { | |
5301 | struct i40e_q_vector *q_vector; | |
5302 | ||
5303 | /* allocate q_vector */ | |
5304 | q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); | |
5305 | if (!q_vector) | |
5306 | return -ENOMEM; | |
5307 | ||
5308 | q_vector->vsi = vsi; | |
5309 | q_vector->v_idx = v_idx; | |
5310 | cpumask_set_cpu(v_idx, &q_vector->affinity_mask); | |
5311 | if (vsi->netdev) | |
5312 | netif_napi_add(vsi->netdev, &q_vector->napi, | |
5313 | i40e_napi_poll, vsi->work_limit); | |
5314 | ||
5315 | /* tie q_vector and vsi together */ | |
5316 | vsi->q_vectors[v_idx] = q_vector; | |
5317 | ||
5318 | return 0; | |
5319 | } | |
5320 | ||
41c445ff JB |
5321 | /** |
5322 | * i40e_alloc_q_vectors - Allocate memory for interrupt vectors | |
5323 | * @vsi: the VSI being configured | |
5324 | * | |
5325 | * We allocate one q_vector per queue interrupt. If allocation fails we | |
5326 | * return -ENOMEM. | |
5327 | **/ | |
5328 | static int i40e_alloc_q_vectors(struct i40e_vsi *vsi) | |
5329 | { | |
5330 | struct i40e_pf *pf = vsi->back; | |
5331 | int v_idx, num_q_vectors; | |
493fb300 | 5332 | int err; |
41c445ff JB |
5333 | |
5334 | /* if not MSIX, give the one vector only to the LAN VSI */ | |
5335 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
5336 | num_q_vectors = vsi->num_q_vectors; | |
5337 | else if (vsi == pf->vsi[pf->lan_vsi]) | |
5338 | num_q_vectors = 1; | |
5339 | else | |
5340 | return -EINVAL; | |
5341 | ||
41c445ff | 5342 | for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { |
493fb300 AD |
5343 | err = i40e_alloc_q_vector(vsi, v_idx); |
5344 | if (err) | |
5345 | goto err_out; | |
41c445ff JB |
5346 | } |
5347 | ||
5348 | return 0; | |
493fb300 AD |
5349 | |
5350 | err_out: | |
5351 | while (v_idx--) | |
5352 | i40e_free_q_vector(vsi, v_idx); | |
5353 | ||
5354 | return err; | |
41c445ff JB |
5355 | } |
5356 | ||
5357 | /** | |
5358 | * i40e_init_interrupt_scheme - Determine proper interrupt scheme | |
5359 | * @pf: board private structure to initialize | |
5360 | **/ | |
5361 | static void i40e_init_interrupt_scheme(struct i40e_pf *pf) | |
5362 | { | |
5363 | int err = 0; | |
5364 | ||
5365 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
5366 | err = i40e_init_msix(pf); | |
5367 | if (err) { | |
5368 | pf->flags &= ~(I40E_FLAG_RSS_ENABLED | | |
5369 | I40E_FLAG_MQ_ENABLED | | |
5370 | I40E_FLAG_DCB_ENABLED | | |
5371 | I40E_FLAG_SRIOV_ENABLED | | |
5372 | I40E_FLAG_FDIR_ENABLED | | |
5373 | I40E_FLAG_FDIR_ATR_ENABLED | | |
5374 | I40E_FLAG_VMDQ_ENABLED); | |
5375 | ||
5376 | /* rework the queue expectations without MSIX */ | |
5377 | i40e_determine_queue_usage(pf); | |
5378 | } | |
5379 | } | |
5380 | ||
5381 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && | |
5382 | (pf->flags & I40E_FLAG_MSI_ENABLED)) { | |
5383 | err = pci_enable_msi(pf->pdev); | |
5384 | if (err) { | |
5385 | dev_info(&pf->pdev->dev, | |
5386 | "MSI init failed (%d), trying legacy.\n", err); | |
5387 | pf->flags &= ~I40E_FLAG_MSI_ENABLED; | |
5388 | } | |
5389 | } | |
5390 | ||
5391 | /* track first vector for misc interrupts */ | |
5392 | err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1); | |
5393 | } | |
5394 | ||
5395 | /** | |
5396 | * i40e_setup_misc_vector - Setup the misc vector to handle non queue events | |
5397 | * @pf: board private structure | |
5398 | * | |
5399 | * This sets up the handler for MSIX 0, which is used to manage the | |
5400 | * non-queue interrupts, e.g. AdminQ and errors. This is not used | |
5401 | * when in MSI or Legacy interrupt mode. | |
5402 | **/ | |
5403 | static int i40e_setup_misc_vector(struct i40e_pf *pf) | |
5404 | { | |
5405 | struct i40e_hw *hw = &pf->hw; | |
5406 | int err = 0; | |
5407 | ||
5408 | /* Only request the irq if this is the first time through, and | |
5409 | * not when we're rebuilding after a Reset | |
5410 | */ | |
5411 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { | |
5412 | err = request_irq(pf->msix_entries[0].vector, | |
5413 | i40e_intr, 0, pf->misc_int_name, pf); | |
5414 | if (err) { | |
5415 | dev_info(&pf->pdev->dev, | |
5416 | "request_irq for msix_misc failed: %d\n", err); | |
5417 | return -EFAULT; | |
5418 | } | |
5419 | } | |
5420 | ||
5421 | i40e_enable_misc_int_causes(hw); | |
5422 | ||
5423 | /* associate no queues to the misc vector */ | |
5424 | wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); | |
5425 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); | |
5426 | ||
5427 | i40e_flush(hw); | |
5428 | ||
5429 | i40e_irq_dynamic_enable_icr0(pf); | |
5430 | ||
5431 | return err; | |
5432 | } | |
5433 | ||
5434 | /** | |
5435 | * i40e_config_rss - Prepare for RSS if used | |
5436 | * @pf: board private structure | |
5437 | **/ | |
5438 | static int i40e_config_rss(struct i40e_pf *pf) | |
5439 | { | |
5440 | struct i40e_hw *hw = &pf->hw; | |
5441 | u32 lut = 0; | |
5442 | int i, j; | |
5443 | u64 hena; | |
5444 | /* Set of random keys generated using kernel random number generator */ | |
5445 | static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687, | |
5446 | 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377, | |
5447 | 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d, | |
5448 | 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be}; | |
5449 | ||
5450 | /* Fill out hash function seed */ | |
5451 | for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) | |
5452 | wr32(hw, I40E_PFQF_HKEY(i), seed[i]); | |
5453 | ||
5454 | /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ | |
5455 | hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | | |
5456 | ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); | |
5457 | hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | | |
5458 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | | |
5459 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | | |
5460 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | | |
5461 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | | |
5462 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | | |
5463 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | | |
5464 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | | |
5465 | ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4)| | |
5466 | ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6); | |
5467 | wr32(hw, I40E_PFQF_HENA(0), (u32)hena); | |
5468 | wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); | |
5469 | ||
5470 | /* Populate the LUT with max no. of queues in round robin fashion */ | |
5471 | for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) { | |
5472 | ||
5473 | /* The assumption is that lan qp count will be the highest | |
5474 | * qp count for any PF VSI that needs RSS. | |
5475 | * If multiple VSIs need RSS support, all the qp counts | |
5476 | * for those VSIs should be a power of 2 for RSS to work. | |
5477 | * If LAN VSI is the only consumer for RSS then this requirement | |
5478 | * is not necessary. | |
5479 | */ | |
5480 | if (j == pf->rss_size) | |
5481 | j = 0; | |
5482 | /* lut = 4-byte sliding window of 4 lut entries */ | |
5483 | lut = (lut << 8) | (j & | |
5484 | ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1)); | |
5485 | /* On i = 3, we have 4 entries in lut; write to the register */ | |
5486 | if ((i & 3) == 3) | |
5487 | wr32(hw, I40E_PFQF_HLUT(i >> 2), lut); | |
5488 | } | |
5489 | i40e_flush(hw); | |
5490 | ||
5491 | return 0; | |
5492 | } | |
5493 | ||
5494 | /** | |
5495 | * i40e_sw_init - Initialize general software structures (struct i40e_pf) | |
5496 | * @pf: board private structure to initialize | |
5497 | * | |
5498 | * i40e_sw_init initializes the Adapter private data structure. | |
5499 | * Fields are initialized based on PCI device information and | |
5500 | * OS network device settings (MTU size). | |
5501 | **/ | |
5502 | static int i40e_sw_init(struct i40e_pf *pf) | |
5503 | { | |
5504 | int err = 0; | |
5505 | int size; | |
5506 | ||
5507 | pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, | |
5508 | (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); | |
5509 | if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { | |
5510 | if (I40E_DEBUG_USER & debug) | |
5511 | pf->hw.debug_mask = debug; | |
5512 | pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), | |
5513 | I40E_DEFAULT_MSG_ENABLE); | |
5514 | } | |
5515 | ||
5516 | /* Set default capability flags */ | |
5517 | pf->flags = I40E_FLAG_RX_CSUM_ENABLED | | |
5518 | I40E_FLAG_MSI_ENABLED | | |
5519 | I40E_FLAG_MSIX_ENABLED | | |
5520 | I40E_FLAG_RX_PS_ENABLED | | |
5521 | I40E_FLAG_MQ_ENABLED | | |
5522 | I40E_FLAG_RX_1BUF_ENABLED; | |
5523 | ||
5524 | pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width; | |
5525 | if (pf->hw.func_caps.rss) { | |
5526 | pf->flags |= I40E_FLAG_RSS_ENABLED; | |
5527 | pf->rss_size = min_t(int, pf->rss_size_max, | |
5528 | nr_cpus_node(numa_node_id())); | |
5529 | } else { | |
5530 | pf->rss_size = 1; | |
5531 | } | |
5532 | ||
5533 | if (pf->hw.func_caps.dcb) | |
5534 | pf->num_tc_qps = I40E_DEFAULT_QUEUES_PER_TC; | |
5535 | else | |
5536 | pf->num_tc_qps = 0; | |
5537 | ||
5538 | if (pf->hw.func_caps.fd) { | |
5539 | /* FW/NVM is not yet fixed in this regard */ | |
5540 | if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || | |
5541 | (pf->hw.func_caps.fd_filters_best_effort > 0)) { | |
5542 | pf->flags |= I40E_FLAG_FDIR_ATR_ENABLED; | |
5543 | dev_info(&pf->pdev->dev, | |
5544 | "Flow Director ATR mode Enabled\n"); | |
5545 | pf->flags |= I40E_FLAG_FDIR_ENABLED; | |
5546 | dev_info(&pf->pdev->dev, | |
5547 | "Flow Director Side Band mode Enabled\n"); | |
5548 | pf->fdir_pf_filter_count = | |
5549 | pf->hw.func_caps.fd_filters_guaranteed; | |
5550 | } | |
5551 | } else { | |
5552 | pf->fdir_pf_filter_count = 0; | |
5553 | } | |
5554 | ||
5555 | if (pf->hw.func_caps.vmdq) { | |
5556 | pf->flags |= I40E_FLAG_VMDQ_ENABLED; | |
5557 | pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; | |
5558 | pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ; | |
5559 | } | |
5560 | ||
5561 | /* MFP mode enabled */ | |
5562 | if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) { | |
5563 | pf->flags |= I40E_FLAG_MFP_ENABLED; | |
5564 | dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); | |
5565 | } | |
5566 | ||
5567 | #ifdef CONFIG_PCI_IOV | |
5568 | if (pf->hw.func_caps.num_vfs) { | |
5569 | pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; | |
5570 | pf->flags |= I40E_FLAG_SRIOV_ENABLED; | |
5571 | pf->num_req_vfs = min_t(int, | |
5572 | pf->hw.func_caps.num_vfs, | |
5573 | I40E_MAX_VF_COUNT); | |
5574 | } | |
5575 | #endif /* CONFIG_PCI_IOV */ | |
5576 | pf->eeprom_version = 0xDEAD; | |
5577 | pf->lan_veb = I40E_NO_VEB; | |
5578 | pf->lan_vsi = I40E_NO_VSI; | |
5579 | ||
5580 | /* set up queue assignment tracking */ | |
5581 | size = sizeof(struct i40e_lump_tracking) | |
5582 | + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); | |
5583 | pf->qp_pile = kzalloc(size, GFP_KERNEL); | |
5584 | if (!pf->qp_pile) { | |
5585 | err = -ENOMEM; | |
5586 | goto sw_init_done; | |
5587 | } | |
5588 | pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; | |
5589 | pf->qp_pile->search_hint = 0; | |
5590 | ||
5591 | /* set up vector assignment tracking */ | |
5592 | size = sizeof(struct i40e_lump_tracking) | |
5593 | + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors); | |
5594 | pf->irq_pile = kzalloc(size, GFP_KERNEL); | |
5595 | if (!pf->irq_pile) { | |
5596 | kfree(pf->qp_pile); | |
5597 | err = -ENOMEM; | |
5598 | goto sw_init_done; | |
5599 | } | |
5600 | pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors; | |
5601 | pf->irq_pile->search_hint = 0; | |
5602 | ||
5603 | mutex_init(&pf->switch_mutex); | |
5604 | ||
5605 | sw_init_done: | |
5606 | return err; | |
5607 | } | |
5608 | ||
5609 | /** | |
5610 | * i40e_set_features - set the netdev feature flags | |
5611 | * @netdev: ptr to the netdev being adjusted | |
5612 | * @features: the feature set that the stack is suggesting | |
5613 | **/ | |
5614 | static int i40e_set_features(struct net_device *netdev, | |
5615 | netdev_features_t features) | |
5616 | { | |
5617 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5618 | struct i40e_vsi *vsi = np->vsi; | |
5619 | ||
5620 | if (features & NETIF_F_HW_VLAN_CTAG_RX) | |
5621 | i40e_vlan_stripping_enable(vsi); | |
5622 | else | |
5623 | i40e_vlan_stripping_disable(vsi); | |
5624 | ||
5625 | return 0; | |
5626 | } | |
5627 | ||
5628 | static const struct net_device_ops i40e_netdev_ops = { | |
5629 | .ndo_open = i40e_open, | |
5630 | .ndo_stop = i40e_close, | |
5631 | .ndo_start_xmit = i40e_lan_xmit_frame, | |
5632 | .ndo_get_stats64 = i40e_get_netdev_stats_struct, | |
5633 | .ndo_set_rx_mode = i40e_set_rx_mode, | |
5634 | .ndo_validate_addr = eth_validate_addr, | |
5635 | .ndo_set_mac_address = i40e_set_mac, | |
5636 | .ndo_change_mtu = i40e_change_mtu, | |
5637 | .ndo_tx_timeout = i40e_tx_timeout, | |
5638 | .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, | |
5639 | .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, | |
5640 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
5641 | .ndo_poll_controller = i40e_netpoll, | |
5642 | #endif | |
5643 | .ndo_setup_tc = i40e_setup_tc, | |
5644 | .ndo_set_features = i40e_set_features, | |
5645 | .ndo_set_vf_mac = i40e_ndo_set_vf_mac, | |
5646 | .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, | |
5647 | .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw, | |
5648 | .ndo_get_vf_config = i40e_ndo_get_vf_config, | |
5649 | }; | |
5650 | ||
5651 | /** | |
5652 | * i40e_config_netdev - Setup the netdev flags | |
5653 | * @vsi: the VSI being configured | |
5654 | * | |
5655 | * Returns 0 on success, negative value on failure | |
5656 | **/ | |
5657 | static int i40e_config_netdev(struct i40e_vsi *vsi) | |
5658 | { | |
5659 | struct i40e_pf *pf = vsi->back; | |
5660 | struct i40e_hw *hw = &pf->hw; | |
5661 | struct i40e_netdev_priv *np; | |
5662 | struct net_device *netdev; | |
5663 | u8 mac_addr[ETH_ALEN]; | |
5664 | int etherdev_size; | |
5665 | ||
5666 | etherdev_size = sizeof(struct i40e_netdev_priv); | |
5667 | netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); | |
5668 | if (!netdev) | |
5669 | return -ENOMEM; | |
5670 | ||
5671 | vsi->netdev = netdev; | |
5672 | np = netdev_priv(netdev); | |
5673 | np->vsi = vsi; | |
5674 | ||
5675 | netdev->hw_enc_features = NETIF_F_IP_CSUM | | |
5676 | NETIF_F_GSO_UDP_TUNNEL | | |
5677 | NETIF_F_TSO | | |
5678 | NETIF_F_SG; | |
5679 | ||
5680 | netdev->features = NETIF_F_SG | | |
5681 | NETIF_F_IP_CSUM | | |
5682 | NETIF_F_SCTP_CSUM | | |
5683 | NETIF_F_HIGHDMA | | |
5684 | NETIF_F_GSO_UDP_TUNNEL | | |
5685 | NETIF_F_HW_VLAN_CTAG_TX | | |
5686 | NETIF_F_HW_VLAN_CTAG_RX | | |
5687 | NETIF_F_HW_VLAN_CTAG_FILTER | | |
5688 | NETIF_F_IPV6_CSUM | | |
5689 | NETIF_F_TSO | | |
5690 | NETIF_F_TSO6 | | |
5691 | NETIF_F_RXCSUM | | |
5692 | NETIF_F_RXHASH | | |
5693 | 0; | |
5694 | ||
5695 | /* copy netdev features into list of user selectable features */ | |
5696 | netdev->hw_features |= netdev->features; | |
5697 | ||
5698 | if (vsi->type == I40E_VSI_MAIN) { | |
5699 | SET_NETDEV_DEV(netdev, &pf->pdev->dev); | |
5700 | memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN); | |
5701 | } else { | |
5702 | /* relate the VSI_VMDQ name to the VSI_MAIN name */ | |
5703 | snprintf(netdev->name, IFNAMSIZ, "%sv%%d", | |
5704 | pf->vsi[pf->lan_vsi]->netdev->name); | |
5705 | random_ether_addr(mac_addr); | |
5706 | i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); | |
5707 | } | |
5708 | ||
5709 | memcpy(netdev->dev_addr, mac_addr, ETH_ALEN); | |
5710 | memcpy(netdev->perm_addr, mac_addr, ETH_ALEN); | |
5711 | /* vlan gets same features (except vlan offload) | |
5712 | * after any tweaks for specific VSI types | |
5713 | */ | |
5714 | netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX | | |
5715 | NETIF_F_HW_VLAN_CTAG_RX | | |
5716 | NETIF_F_HW_VLAN_CTAG_FILTER); | |
5717 | netdev->priv_flags |= IFF_UNICAST_FLT; | |
5718 | netdev->priv_flags |= IFF_SUPP_NOFCS; | |
5719 | /* Setup netdev TC information */ | |
5720 | i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); | |
5721 | ||
5722 | netdev->netdev_ops = &i40e_netdev_ops; | |
5723 | netdev->watchdog_timeo = 5 * HZ; | |
5724 | i40e_set_ethtool_ops(netdev); | |
5725 | ||
5726 | return 0; | |
5727 | } | |
5728 | ||
5729 | /** | |
5730 | * i40e_vsi_delete - Delete a VSI from the switch | |
5731 | * @vsi: the VSI being removed | |
5732 | * | |
5733 | * Returns 0 on success, negative value on failure | |
5734 | **/ | |
5735 | static void i40e_vsi_delete(struct i40e_vsi *vsi) | |
5736 | { | |
5737 | /* remove default VSI is not allowed */ | |
5738 | if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) | |
5739 | return; | |
5740 | ||
5741 | /* there is no HW VSI for FDIR */ | |
5742 | if (vsi->type == I40E_VSI_FDIR) | |
5743 | return; | |
5744 | ||
5745 | i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); | |
5746 | return; | |
5747 | } | |
5748 | ||
5749 | /** | |
5750 | * i40e_add_vsi - Add a VSI to the switch | |
5751 | * @vsi: the VSI being configured | |
5752 | * | |
5753 | * This initializes a VSI context depending on the VSI type to be added and | |
5754 | * passes it down to the add_vsi aq command. | |
5755 | **/ | |
5756 | static int i40e_add_vsi(struct i40e_vsi *vsi) | |
5757 | { | |
5758 | int ret = -ENODEV; | |
5759 | struct i40e_mac_filter *f, *ftmp; | |
5760 | struct i40e_pf *pf = vsi->back; | |
5761 | struct i40e_hw *hw = &pf->hw; | |
5762 | struct i40e_vsi_context ctxt; | |
5763 | u8 enabled_tc = 0x1; /* TC0 enabled */ | |
5764 | int f_count = 0; | |
5765 | ||
5766 | memset(&ctxt, 0, sizeof(ctxt)); | |
5767 | switch (vsi->type) { | |
5768 | case I40E_VSI_MAIN: | |
5769 | /* The PF's main VSI is already setup as part of the | |
5770 | * device initialization, so we'll not bother with | |
5771 | * the add_vsi call, but we will retrieve the current | |
5772 | * VSI context. | |
5773 | */ | |
5774 | ctxt.seid = pf->main_vsi_seid; | |
5775 | ctxt.pf_num = pf->hw.pf_id; | |
5776 | ctxt.vf_num = 0; | |
5777 | ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); | |
5778 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; | |
5779 | if (ret) { | |
5780 | dev_info(&pf->pdev->dev, | |
5781 | "couldn't get pf vsi config, err %d, aq_err %d\n", | |
5782 | ret, pf->hw.aq.asq_last_status); | |
5783 | return -ENOENT; | |
5784 | } | |
5785 | memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); | |
5786 | vsi->info.valid_sections = 0; | |
5787 | ||
5788 | vsi->seid = ctxt.seid; | |
5789 | vsi->id = ctxt.vsi_number; | |
5790 | ||
5791 | enabled_tc = i40e_pf_get_tc_map(pf); | |
5792 | ||
5793 | /* MFP mode setup queue map and update VSI */ | |
5794 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
5795 | memset(&ctxt, 0, sizeof(ctxt)); | |
5796 | ctxt.seid = pf->main_vsi_seid; | |
5797 | ctxt.pf_num = pf->hw.pf_id; | |
5798 | ctxt.vf_num = 0; | |
5799 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); | |
5800 | ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); | |
5801 | if (ret) { | |
5802 | dev_info(&pf->pdev->dev, | |
5803 | "update vsi failed, aq_err=%d\n", | |
5804 | pf->hw.aq.asq_last_status); | |
5805 | ret = -ENOENT; | |
5806 | goto err; | |
5807 | } | |
5808 | /* update the local VSI info queue map */ | |
5809 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
5810 | vsi->info.valid_sections = 0; | |
5811 | } else { | |
5812 | /* Default/Main VSI is only enabled for TC0 | |
5813 | * reconfigure it to enable all TCs that are | |
5814 | * available on the port in SFP mode. | |
5815 | */ | |
5816 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
5817 | if (ret) { | |
5818 | dev_info(&pf->pdev->dev, | |
5819 | "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n", | |
5820 | enabled_tc, ret, | |
5821 | pf->hw.aq.asq_last_status); | |
5822 | ret = -ENOENT; | |
5823 | } | |
5824 | } | |
5825 | break; | |
5826 | ||
5827 | case I40E_VSI_FDIR: | |
5828 | /* no queue mapping or actual HW VSI needed */ | |
5829 | vsi->info.valid_sections = 0; | |
5830 | vsi->seid = 0; | |
5831 | vsi->id = 0; | |
5832 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
5833 | return 0; | |
5834 | break; | |
5835 | ||
5836 | case I40E_VSI_VMDQ2: | |
5837 | ctxt.pf_num = hw->pf_id; | |
5838 | ctxt.vf_num = 0; | |
5839 | ctxt.uplink_seid = vsi->uplink_seid; | |
5840 | ctxt.connection_type = 0x1; /* regular data port */ | |
5841 | ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; | |
5842 | ||
5843 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
5844 | ||
5845 | /* This VSI is connected to VEB so the switch_id | |
5846 | * should be set to zero by default. | |
5847 | */ | |
5848 | ctxt.info.switch_id = 0; | |
5849 | ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB); | |
5850 | ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
5851 | ||
5852 | /* Setup the VSI tx/rx queue map for TC0 only for now */ | |
5853 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
5854 | break; | |
5855 | ||
5856 | case I40E_VSI_SRIOV: | |
5857 | ctxt.pf_num = hw->pf_id; | |
5858 | ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; | |
5859 | ctxt.uplink_seid = vsi->uplink_seid; | |
5860 | ctxt.connection_type = 0x1; /* regular data port */ | |
5861 | ctxt.flags = I40E_AQ_VSI_TYPE_VF; | |
5862 | ||
5863 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
5864 | ||
5865 | /* This VSI is connected to VEB so the switch_id | |
5866 | * should be set to zero by default. | |
5867 | */ | |
5868 | ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
5869 | ||
5870 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
5871 | ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; | |
5872 | /* Setup the VSI tx/rx queue map for TC0 only for now */ | |
5873 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
5874 | break; | |
5875 | ||
5876 | default: | |
5877 | return -ENODEV; | |
5878 | } | |
5879 | ||
5880 | if (vsi->type != I40E_VSI_MAIN) { | |
5881 | ret = i40e_aq_add_vsi(hw, &ctxt, NULL); | |
5882 | if (ret) { | |
5883 | dev_info(&vsi->back->pdev->dev, | |
5884 | "add vsi failed, aq_err=%d\n", | |
5885 | vsi->back->hw.aq.asq_last_status); | |
5886 | ret = -ENOENT; | |
5887 | goto err; | |
5888 | } | |
5889 | memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); | |
5890 | vsi->info.valid_sections = 0; | |
5891 | vsi->seid = ctxt.seid; | |
5892 | vsi->id = ctxt.vsi_number; | |
5893 | } | |
5894 | ||
5895 | /* If macvlan filters already exist, force them to get loaded */ | |
5896 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
5897 | f->changed = true; | |
5898 | f_count++; | |
5899 | } | |
5900 | if (f_count) { | |
5901 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
5902 | pf->flags |= I40E_FLAG_FILTER_SYNC; | |
5903 | } | |
5904 | ||
5905 | /* Update VSI BW information */ | |
5906 | ret = i40e_vsi_get_bw_info(vsi); | |
5907 | if (ret) { | |
5908 | dev_info(&pf->pdev->dev, | |
5909 | "couldn't get vsi bw info, err %d, aq_err %d\n", | |
5910 | ret, pf->hw.aq.asq_last_status); | |
5911 | /* VSI is already added so not tearing that up */ | |
5912 | ret = 0; | |
5913 | } | |
5914 | ||
5915 | err: | |
5916 | return ret; | |
5917 | } | |
5918 | ||
5919 | /** | |
5920 | * i40e_vsi_release - Delete a VSI and free its resources | |
5921 | * @vsi: the VSI being removed | |
5922 | * | |
5923 | * Returns 0 on success or < 0 on error | |
5924 | **/ | |
5925 | int i40e_vsi_release(struct i40e_vsi *vsi) | |
5926 | { | |
5927 | struct i40e_mac_filter *f, *ftmp; | |
5928 | struct i40e_veb *veb = NULL; | |
5929 | struct i40e_pf *pf; | |
5930 | u16 uplink_seid; | |
5931 | int i, n; | |
5932 | ||
5933 | pf = vsi->back; | |
5934 | ||
5935 | /* release of a VEB-owner or last VSI is not allowed */ | |
5936 | if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
5937 | dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", | |
5938 | vsi->seid, vsi->uplink_seid); | |
5939 | return -ENODEV; | |
5940 | } | |
5941 | if (vsi == pf->vsi[pf->lan_vsi] && | |
5942 | !test_bit(__I40E_DOWN, &pf->state)) { | |
5943 | dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); | |
5944 | return -ENODEV; | |
5945 | } | |
5946 | ||
5947 | uplink_seid = vsi->uplink_seid; | |
5948 | if (vsi->type != I40E_VSI_SRIOV) { | |
5949 | if (vsi->netdev_registered) { | |
5950 | vsi->netdev_registered = false; | |
5951 | if (vsi->netdev) { | |
5952 | /* results in a call to i40e_close() */ | |
5953 | unregister_netdev(vsi->netdev); | |
5954 | free_netdev(vsi->netdev); | |
5955 | vsi->netdev = NULL; | |
5956 | } | |
5957 | } else { | |
5958 | if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) | |
5959 | i40e_down(vsi); | |
5960 | i40e_vsi_free_irq(vsi); | |
5961 | i40e_vsi_free_tx_resources(vsi); | |
5962 | i40e_vsi_free_rx_resources(vsi); | |
5963 | } | |
5964 | i40e_vsi_disable_irq(vsi); | |
5965 | } | |
5966 | ||
5967 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) | |
5968 | i40e_del_filter(vsi, f->macaddr, f->vlan, | |
5969 | f->is_vf, f->is_netdev); | |
5970 | i40e_sync_vsi_filters(vsi); | |
5971 | ||
5972 | i40e_vsi_delete(vsi); | |
5973 | i40e_vsi_free_q_vectors(vsi); | |
5974 | i40e_vsi_clear_rings(vsi); | |
5975 | i40e_vsi_clear(vsi); | |
5976 | ||
5977 | /* If this was the last thing on the VEB, except for the | |
5978 | * controlling VSI, remove the VEB, which puts the controlling | |
5979 | * VSI onto the next level down in the switch. | |
5980 | * | |
5981 | * Well, okay, there's one more exception here: don't remove | |
5982 | * the orphan VEBs yet. We'll wait for an explicit remove request | |
5983 | * from up the network stack. | |
5984 | */ | |
5985 | for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
5986 | if (pf->vsi[i] && | |
5987 | pf->vsi[i]->uplink_seid == uplink_seid && | |
5988 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
5989 | n++; /* count the VSIs */ | |
5990 | } | |
5991 | } | |
5992 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
5993 | if (!pf->veb[i]) | |
5994 | continue; | |
5995 | if (pf->veb[i]->uplink_seid == uplink_seid) | |
5996 | n++; /* count the VEBs */ | |
5997 | if (pf->veb[i]->seid == uplink_seid) | |
5998 | veb = pf->veb[i]; | |
5999 | } | |
6000 | if (n == 0 && veb && veb->uplink_seid != 0) | |
6001 | i40e_veb_release(veb); | |
6002 | ||
6003 | return 0; | |
6004 | } | |
6005 | ||
6006 | /** | |
6007 | * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI | |
6008 | * @vsi: ptr to the VSI | |
6009 | * | |
6010 | * This should only be called after i40e_vsi_mem_alloc() which allocates the | |
6011 | * corresponding SW VSI structure and initializes num_queue_pairs for the | |
6012 | * newly allocated VSI. | |
6013 | * | |
6014 | * Returns 0 on success or negative on failure | |
6015 | **/ | |
6016 | static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) | |
6017 | { | |
6018 | int ret = -ENOENT; | |
6019 | struct i40e_pf *pf = vsi->back; | |
6020 | ||
493fb300 | 6021 | if (vsi->q_vectors[0]) { |
41c445ff JB |
6022 | dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", |
6023 | vsi->seid); | |
6024 | return -EEXIST; | |
6025 | } | |
6026 | ||
6027 | if (vsi->base_vector) { | |
6028 | dev_info(&pf->pdev->dev, | |
6029 | "VSI %d has non-zero base vector %d\n", | |
6030 | vsi->seid, vsi->base_vector); | |
6031 | return -EEXIST; | |
6032 | } | |
6033 | ||
6034 | ret = i40e_alloc_q_vectors(vsi); | |
6035 | if (ret) { | |
6036 | dev_info(&pf->pdev->dev, | |
6037 | "failed to allocate %d q_vector for VSI %d, ret=%d\n", | |
6038 | vsi->num_q_vectors, vsi->seid, ret); | |
6039 | vsi->num_q_vectors = 0; | |
6040 | goto vector_setup_out; | |
6041 | } | |
6042 | ||
6043 | vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, | |
6044 | vsi->num_q_vectors, vsi->idx); | |
6045 | if (vsi->base_vector < 0) { | |
6046 | dev_info(&pf->pdev->dev, | |
6047 | "failed to get q tracking for VSI %d, err=%d\n", | |
6048 | vsi->seid, vsi->base_vector); | |
6049 | i40e_vsi_free_q_vectors(vsi); | |
6050 | ret = -ENOENT; | |
6051 | goto vector_setup_out; | |
6052 | } | |
6053 | ||
6054 | vector_setup_out: | |
6055 | return ret; | |
6056 | } | |
6057 | ||
6058 | /** | |
6059 | * i40e_vsi_setup - Set up a VSI by a given type | |
6060 | * @pf: board private structure | |
6061 | * @type: VSI type | |
6062 | * @uplink_seid: the switch element to link to | |
6063 | * @param1: usage depends upon VSI type. For VF types, indicates VF id | |
6064 | * | |
6065 | * This allocates the sw VSI structure and its queue resources, then add a VSI | |
6066 | * to the identified VEB. | |
6067 | * | |
6068 | * Returns pointer to the successfully allocated and configure VSI sw struct on | |
6069 | * success, otherwise returns NULL on failure. | |
6070 | **/ | |
6071 | struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, | |
6072 | u16 uplink_seid, u32 param1) | |
6073 | { | |
6074 | struct i40e_vsi *vsi = NULL; | |
6075 | struct i40e_veb *veb = NULL; | |
6076 | int ret, i; | |
6077 | int v_idx; | |
6078 | ||
6079 | /* The requested uplink_seid must be either | |
6080 | * - the PF's port seid | |
6081 | * no VEB is needed because this is the PF | |
6082 | * or this is a Flow Director special case VSI | |
6083 | * - seid of an existing VEB | |
6084 | * - seid of a VSI that owns an existing VEB | |
6085 | * - seid of a VSI that doesn't own a VEB | |
6086 | * a new VEB is created and the VSI becomes the owner | |
6087 | * - seid of the PF VSI, which is what creates the first VEB | |
6088 | * this is a special case of the previous | |
6089 | * | |
6090 | * Find which uplink_seid we were given and create a new VEB if needed | |
6091 | */ | |
6092 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
6093 | if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { | |
6094 | veb = pf->veb[i]; | |
6095 | break; | |
6096 | } | |
6097 | } | |
6098 | ||
6099 | if (!veb && uplink_seid != pf->mac_seid) { | |
6100 | ||
6101 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
6102 | if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { | |
6103 | vsi = pf->vsi[i]; | |
6104 | break; | |
6105 | } | |
6106 | } | |
6107 | if (!vsi) { | |
6108 | dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", | |
6109 | uplink_seid); | |
6110 | return NULL; | |
6111 | } | |
6112 | ||
6113 | if (vsi->uplink_seid == pf->mac_seid) | |
6114 | veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, | |
6115 | vsi->tc_config.enabled_tc); | |
6116 | else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) | |
6117 | veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, | |
6118 | vsi->tc_config.enabled_tc); | |
6119 | ||
6120 | for (i = 0; i < I40E_MAX_VEB && !veb; i++) { | |
6121 | if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) | |
6122 | veb = pf->veb[i]; | |
6123 | } | |
6124 | if (!veb) { | |
6125 | dev_info(&pf->pdev->dev, "couldn't add VEB\n"); | |
6126 | return NULL; | |
6127 | } | |
6128 | ||
6129 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
6130 | uplink_seid = veb->seid; | |
6131 | } | |
6132 | ||
6133 | /* get vsi sw struct */ | |
6134 | v_idx = i40e_vsi_mem_alloc(pf, type); | |
6135 | if (v_idx < 0) | |
6136 | goto err_alloc; | |
6137 | vsi = pf->vsi[v_idx]; | |
6138 | vsi->type = type; | |
6139 | vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); | |
6140 | ||
6141 | if (type == I40E_VSI_MAIN) | |
6142 | pf->lan_vsi = v_idx; | |
6143 | else if (type == I40E_VSI_SRIOV) | |
6144 | vsi->vf_id = param1; | |
6145 | /* assign it some queues */ | |
6146 | ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); | |
6147 | if (ret < 0) { | |
6148 | dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n", | |
6149 | vsi->seid, ret); | |
6150 | goto err_vsi; | |
6151 | } | |
6152 | vsi->base_queue = ret; | |
6153 | ||
6154 | /* get a VSI from the hardware */ | |
6155 | vsi->uplink_seid = uplink_seid; | |
6156 | ret = i40e_add_vsi(vsi); | |
6157 | if (ret) | |
6158 | goto err_vsi; | |
6159 | ||
6160 | switch (vsi->type) { | |
6161 | /* setup the netdev if needed */ | |
6162 | case I40E_VSI_MAIN: | |
6163 | case I40E_VSI_VMDQ2: | |
6164 | ret = i40e_config_netdev(vsi); | |
6165 | if (ret) | |
6166 | goto err_netdev; | |
6167 | ret = register_netdev(vsi->netdev); | |
6168 | if (ret) | |
6169 | goto err_netdev; | |
6170 | vsi->netdev_registered = true; | |
6171 | netif_carrier_off(vsi->netdev); | |
6172 | /* fall through */ | |
6173 | ||
6174 | case I40E_VSI_FDIR: | |
6175 | /* set up vectors and rings if needed */ | |
6176 | ret = i40e_vsi_setup_vectors(vsi); | |
6177 | if (ret) | |
6178 | goto err_msix; | |
6179 | ||
6180 | ret = i40e_alloc_rings(vsi); | |
6181 | if (ret) | |
6182 | goto err_rings; | |
6183 | ||
6184 | /* map all of the rings to the q_vectors */ | |
6185 | i40e_vsi_map_rings_to_vectors(vsi); | |
6186 | ||
6187 | i40e_vsi_reset_stats(vsi); | |
6188 | break; | |
6189 | ||
6190 | default: | |
6191 | /* no netdev or rings for the other VSI types */ | |
6192 | break; | |
6193 | } | |
6194 | ||
6195 | return vsi; | |
6196 | ||
6197 | err_rings: | |
6198 | i40e_vsi_free_q_vectors(vsi); | |
6199 | err_msix: | |
6200 | if (vsi->netdev_registered) { | |
6201 | vsi->netdev_registered = false; | |
6202 | unregister_netdev(vsi->netdev); | |
6203 | free_netdev(vsi->netdev); | |
6204 | vsi->netdev = NULL; | |
6205 | } | |
6206 | err_netdev: | |
6207 | i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); | |
6208 | err_vsi: | |
6209 | i40e_vsi_clear(vsi); | |
6210 | err_alloc: | |
6211 | return NULL; | |
6212 | } | |
6213 | ||
6214 | /** | |
6215 | * i40e_veb_get_bw_info - Query VEB BW information | |
6216 | * @veb: the veb to query | |
6217 | * | |
6218 | * Query the Tx scheduler BW configuration data for given VEB | |
6219 | **/ | |
6220 | static int i40e_veb_get_bw_info(struct i40e_veb *veb) | |
6221 | { | |
6222 | struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; | |
6223 | struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; | |
6224 | struct i40e_pf *pf = veb->pf; | |
6225 | struct i40e_hw *hw = &pf->hw; | |
6226 | u32 tc_bw_max; | |
6227 | int ret = 0; | |
6228 | int i; | |
6229 | ||
6230 | ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, | |
6231 | &bw_data, NULL); | |
6232 | if (ret) { | |
6233 | dev_info(&pf->pdev->dev, | |
6234 | "query veb bw config failed, aq_err=%d\n", | |
6235 | hw->aq.asq_last_status); | |
6236 | goto out; | |
6237 | } | |
6238 | ||
6239 | ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, | |
6240 | &ets_data, NULL); | |
6241 | if (ret) { | |
6242 | dev_info(&pf->pdev->dev, | |
6243 | "query veb bw ets config failed, aq_err=%d\n", | |
6244 | hw->aq.asq_last_status); | |
6245 | goto out; | |
6246 | } | |
6247 | ||
6248 | veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); | |
6249 | veb->bw_max_quanta = ets_data.tc_bw_max; | |
6250 | veb->is_abs_credits = bw_data.absolute_credits_enable; | |
6251 | tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | | |
6252 | (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); | |
6253 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
6254 | veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; | |
6255 | veb->bw_tc_limit_credits[i] = | |
6256 | le16_to_cpu(bw_data.tc_bw_limits[i]); | |
6257 | veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); | |
6258 | } | |
6259 | ||
6260 | out: | |
6261 | return ret; | |
6262 | } | |
6263 | ||
6264 | /** | |
6265 | * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF | |
6266 | * @pf: board private structure | |
6267 | * | |
6268 | * On error: returns error code (negative) | |
6269 | * On success: returns vsi index in PF (positive) | |
6270 | **/ | |
6271 | static int i40e_veb_mem_alloc(struct i40e_pf *pf) | |
6272 | { | |
6273 | int ret = -ENOENT; | |
6274 | struct i40e_veb *veb; | |
6275 | int i; | |
6276 | ||
6277 | /* Need to protect the allocation of switch elements at the PF level */ | |
6278 | mutex_lock(&pf->switch_mutex); | |
6279 | ||
6280 | /* VEB list may be fragmented if VEB creation/destruction has | |
6281 | * been happening. We can afford to do a quick scan to look | |
6282 | * for any free slots in the list. | |
6283 | * | |
6284 | * find next empty veb slot, looping back around if necessary | |
6285 | */ | |
6286 | i = 0; | |
6287 | while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) | |
6288 | i++; | |
6289 | if (i >= I40E_MAX_VEB) { | |
6290 | ret = -ENOMEM; | |
6291 | goto err_alloc_veb; /* out of VEB slots! */ | |
6292 | } | |
6293 | ||
6294 | veb = kzalloc(sizeof(*veb), GFP_KERNEL); | |
6295 | if (!veb) { | |
6296 | ret = -ENOMEM; | |
6297 | goto err_alloc_veb; | |
6298 | } | |
6299 | veb->pf = pf; | |
6300 | veb->idx = i; | |
6301 | veb->enabled_tc = 1; | |
6302 | ||
6303 | pf->veb[i] = veb; | |
6304 | ret = i; | |
6305 | err_alloc_veb: | |
6306 | mutex_unlock(&pf->switch_mutex); | |
6307 | return ret; | |
6308 | } | |
6309 | ||
6310 | /** | |
6311 | * i40e_switch_branch_release - Delete a branch of the switch tree | |
6312 | * @branch: where to start deleting | |
6313 | * | |
6314 | * This uses recursion to find the tips of the branch to be | |
6315 | * removed, deleting until we get back to and can delete this VEB. | |
6316 | **/ | |
6317 | static void i40e_switch_branch_release(struct i40e_veb *branch) | |
6318 | { | |
6319 | struct i40e_pf *pf = branch->pf; | |
6320 | u16 branch_seid = branch->seid; | |
6321 | u16 veb_idx = branch->idx; | |
6322 | int i; | |
6323 | ||
6324 | /* release any VEBs on this VEB - RECURSION */ | |
6325 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
6326 | if (!pf->veb[i]) | |
6327 | continue; | |
6328 | if (pf->veb[i]->uplink_seid == branch->seid) | |
6329 | i40e_switch_branch_release(pf->veb[i]); | |
6330 | } | |
6331 | ||
6332 | /* Release the VSIs on this VEB, but not the owner VSI. | |
6333 | * | |
6334 | * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing | |
6335 | * the VEB itself, so don't use (*branch) after this loop. | |
6336 | */ | |
6337 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
6338 | if (!pf->vsi[i]) | |
6339 | continue; | |
6340 | if (pf->vsi[i]->uplink_seid == branch_seid && | |
6341 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
6342 | i40e_vsi_release(pf->vsi[i]); | |
6343 | } | |
6344 | } | |
6345 | ||
6346 | /* There's one corner case where the VEB might not have been | |
6347 | * removed, so double check it here and remove it if needed. | |
6348 | * This case happens if the veb was created from the debugfs | |
6349 | * commands and no VSIs were added to it. | |
6350 | */ | |
6351 | if (pf->veb[veb_idx]) | |
6352 | i40e_veb_release(pf->veb[veb_idx]); | |
6353 | } | |
6354 | ||
6355 | /** | |
6356 | * i40e_veb_clear - remove veb struct | |
6357 | * @veb: the veb to remove | |
6358 | **/ | |
6359 | static void i40e_veb_clear(struct i40e_veb *veb) | |
6360 | { | |
6361 | if (!veb) | |
6362 | return; | |
6363 | ||
6364 | if (veb->pf) { | |
6365 | struct i40e_pf *pf = veb->pf; | |
6366 | ||
6367 | mutex_lock(&pf->switch_mutex); | |
6368 | if (pf->veb[veb->idx] == veb) | |
6369 | pf->veb[veb->idx] = NULL; | |
6370 | mutex_unlock(&pf->switch_mutex); | |
6371 | } | |
6372 | ||
6373 | kfree(veb); | |
6374 | } | |
6375 | ||
6376 | /** | |
6377 | * i40e_veb_release - Delete a VEB and free its resources | |
6378 | * @veb: the VEB being removed | |
6379 | **/ | |
6380 | void i40e_veb_release(struct i40e_veb *veb) | |
6381 | { | |
6382 | struct i40e_vsi *vsi = NULL; | |
6383 | struct i40e_pf *pf; | |
6384 | int i, n = 0; | |
6385 | ||
6386 | pf = veb->pf; | |
6387 | ||
6388 | /* find the remaining VSI and check for extras */ | |
6389 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
6390 | if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { | |
6391 | n++; | |
6392 | vsi = pf->vsi[i]; | |
6393 | } | |
6394 | } | |
6395 | if (n != 1) { | |
6396 | dev_info(&pf->pdev->dev, | |
6397 | "can't remove VEB %d with %d VSIs left\n", | |
6398 | veb->seid, n); | |
6399 | return; | |
6400 | } | |
6401 | ||
6402 | /* move the remaining VSI to uplink veb */ | |
6403 | vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; | |
6404 | if (veb->uplink_seid) { | |
6405 | vsi->uplink_seid = veb->uplink_seid; | |
6406 | if (veb->uplink_seid == pf->mac_seid) | |
6407 | vsi->veb_idx = I40E_NO_VEB; | |
6408 | else | |
6409 | vsi->veb_idx = veb->veb_idx; | |
6410 | } else { | |
6411 | /* floating VEB */ | |
6412 | vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
6413 | vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; | |
6414 | } | |
6415 | ||
6416 | i40e_aq_delete_element(&pf->hw, veb->seid, NULL); | |
6417 | i40e_veb_clear(veb); | |
6418 | ||
6419 | return; | |
6420 | } | |
6421 | ||
6422 | /** | |
6423 | * i40e_add_veb - create the VEB in the switch | |
6424 | * @veb: the VEB to be instantiated | |
6425 | * @vsi: the controlling VSI | |
6426 | **/ | |
6427 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) | |
6428 | { | |
6429 | bool is_default = (vsi->idx == vsi->back->lan_vsi); | |
6430 | int ret; | |
6431 | ||
6432 | /* get a VEB from the hardware */ | |
6433 | ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid, | |
6434 | veb->enabled_tc, is_default, &veb->seid, NULL); | |
6435 | if (ret) { | |
6436 | dev_info(&veb->pf->pdev->dev, | |
6437 | "couldn't add VEB, err %d, aq_err %d\n", | |
6438 | ret, veb->pf->hw.aq.asq_last_status); | |
6439 | return -EPERM; | |
6440 | } | |
6441 | ||
6442 | /* get statistics counter */ | |
6443 | ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL, | |
6444 | &veb->stats_idx, NULL, NULL, NULL); | |
6445 | if (ret) { | |
6446 | dev_info(&veb->pf->pdev->dev, | |
6447 | "couldn't get VEB statistics idx, err %d, aq_err %d\n", | |
6448 | ret, veb->pf->hw.aq.asq_last_status); | |
6449 | return -EPERM; | |
6450 | } | |
6451 | ret = i40e_veb_get_bw_info(veb); | |
6452 | if (ret) { | |
6453 | dev_info(&veb->pf->pdev->dev, | |
6454 | "couldn't get VEB bw info, err %d, aq_err %d\n", | |
6455 | ret, veb->pf->hw.aq.asq_last_status); | |
6456 | i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL); | |
6457 | return -ENOENT; | |
6458 | } | |
6459 | ||
6460 | vsi->uplink_seid = veb->seid; | |
6461 | vsi->veb_idx = veb->idx; | |
6462 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
6463 | ||
6464 | return 0; | |
6465 | } | |
6466 | ||
6467 | /** | |
6468 | * i40e_veb_setup - Set up a VEB | |
6469 | * @pf: board private structure | |
6470 | * @flags: VEB setup flags | |
6471 | * @uplink_seid: the switch element to link to | |
6472 | * @vsi_seid: the initial VSI seid | |
6473 | * @enabled_tc: Enabled TC bit-map | |
6474 | * | |
6475 | * This allocates the sw VEB structure and links it into the switch | |
6476 | * It is possible and legal for this to be a duplicate of an already | |
6477 | * existing VEB. It is also possible for both uplink and vsi seids | |
6478 | * to be zero, in order to create a floating VEB. | |
6479 | * | |
6480 | * Returns pointer to the successfully allocated VEB sw struct on | |
6481 | * success, otherwise returns NULL on failure. | |
6482 | **/ | |
6483 | struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, | |
6484 | u16 uplink_seid, u16 vsi_seid, | |
6485 | u8 enabled_tc) | |
6486 | { | |
6487 | struct i40e_veb *veb, *uplink_veb = NULL; | |
6488 | int vsi_idx, veb_idx; | |
6489 | int ret; | |
6490 | ||
6491 | /* if one seid is 0, the other must be 0 to create a floating relay */ | |
6492 | if ((uplink_seid == 0 || vsi_seid == 0) && | |
6493 | (uplink_seid + vsi_seid != 0)) { | |
6494 | dev_info(&pf->pdev->dev, | |
6495 | "one, not both seid's are 0: uplink=%d vsi=%d\n", | |
6496 | uplink_seid, vsi_seid); | |
6497 | return NULL; | |
6498 | } | |
6499 | ||
6500 | /* make sure there is such a vsi and uplink */ | |
6501 | for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++) | |
6502 | if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) | |
6503 | break; | |
6504 | if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) { | |
6505 | dev_info(&pf->pdev->dev, "vsi seid %d not found\n", | |
6506 | vsi_seid); | |
6507 | return NULL; | |
6508 | } | |
6509 | ||
6510 | if (uplink_seid && uplink_seid != pf->mac_seid) { | |
6511 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
6512 | if (pf->veb[veb_idx] && | |
6513 | pf->veb[veb_idx]->seid == uplink_seid) { | |
6514 | uplink_veb = pf->veb[veb_idx]; | |
6515 | break; | |
6516 | } | |
6517 | } | |
6518 | if (!uplink_veb) { | |
6519 | dev_info(&pf->pdev->dev, | |
6520 | "uplink seid %d not found\n", uplink_seid); | |
6521 | return NULL; | |
6522 | } | |
6523 | } | |
6524 | ||
6525 | /* get veb sw struct */ | |
6526 | veb_idx = i40e_veb_mem_alloc(pf); | |
6527 | if (veb_idx < 0) | |
6528 | goto err_alloc; | |
6529 | veb = pf->veb[veb_idx]; | |
6530 | veb->flags = flags; | |
6531 | veb->uplink_seid = uplink_seid; | |
6532 | veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); | |
6533 | veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); | |
6534 | ||
6535 | /* create the VEB in the switch */ | |
6536 | ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); | |
6537 | if (ret) | |
6538 | goto err_veb; | |
6539 | ||
6540 | return veb; | |
6541 | ||
6542 | err_veb: | |
6543 | i40e_veb_clear(veb); | |
6544 | err_alloc: | |
6545 | return NULL; | |
6546 | } | |
6547 | ||
6548 | /** | |
6549 | * i40e_setup_pf_switch_element - set pf vars based on switch type | |
6550 | * @pf: board private structure | |
6551 | * @ele: element we are building info from | |
6552 | * @num_reported: total number of elements | |
6553 | * @printconfig: should we print the contents | |
6554 | * | |
6555 | * helper function to assist in extracting a few useful SEID values. | |
6556 | **/ | |
6557 | static void i40e_setup_pf_switch_element(struct i40e_pf *pf, | |
6558 | struct i40e_aqc_switch_config_element_resp *ele, | |
6559 | u16 num_reported, bool printconfig) | |
6560 | { | |
6561 | u16 downlink_seid = le16_to_cpu(ele->downlink_seid); | |
6562 | u16 uplink_seid = le16_to_cpu(ele->uplink_seid); | |
6563 | u8 element_type = ele->element_type; | |
6564 | u16 seid = le16_to_cpu(ele->seid); | |
6565 | ||
6566 | if (printconfig) | |
6567 | dev_info(&pf->pdev->dev, | |
6568 | "type=%d seid=%d uplink=%d downlink=%d\n", | |
6569 | element_type, seid, uplink_seid, downlink_seid); | |
6570 | ||
6571 | switch (element_type) { | |
6572 | case I40E_SWITCH_ELEMENT_TYPE_MAC: | |
6573 | pf->mac_seid = seid; | |
6574 | break; | |
6575 | case I40E_SWITCH_ELEMENT_TYPE_VEB: | |
6576 | /* Main VEB? */ | |
6577 | if (uplink_seid != pf->mac_seid) | |
6578 | break; | |
6579 | if (pf->lan_veb == I40E_NO_VEB) { | |
6580 | int v; | |
6581 | ||
6582 | /* find existing or else empty VEB */ | |
6583 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
6584 | if (pf->veb[v] && (pf->veb[v]->seid == seid)) { | |
6585 | pf->lan_veb = v; | |
6586 | break; | |
6587 | } | |
6588 | } | |
6589 | if (pf->lan_veb == I40E_NO_VEB) { | |
6590 | v = i40e_veb_mem_alloc(pf); | |
6591 | if (v < 0) | |
6592 | break; | |
6593 | pf->lan_veb = v; | |
6594 | } | |
6595 | } | |
6596 | ||
6597 | pf->veb[pf->lan_veb]->seid = seid; | |
6598 | pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; | |
6599 | pf->veb[pf->lan_veb]->pf = pf; | |
6600 | pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; | |
6601 | break; | |
6602 | case I40E_SWITCH_ELEMENT_TYPE_VSI: | |
6603 | if (num_reported != 1) | |
6604 | break; | |
6605 | /* This is immediately after a reset so we can assume this is | |
6606 | * the PF's VSI | |
6607 | */ | |
6608 | pf->mac_seid = uplink_seid; | |
6609 | pf->pf_seid = downlink_seid; | |
6610 | pf->main_vsi_seid = seid; | |
6611 | if (printconfig) | |
6612 | dev_info(&pf->pdev->dev, | |
6613 | "pf_seid=%d main_vsi_seid=%d\n", | |
6614 | pf->pf_seid, pf->main_vsi_seid); | |
6615 | break; | |
6616 | case I40E_SWITCH_ELEMENT_TYPE_PF: | |
6617 | case I40E_SWITCH_ELEMENT_TYPE_VF: | |
6618 | case I40E_SWITCH_ELEMENT_TYPE_EMP: | |
6619 | case I40E_SWITCH_ELEMENT_TYPE_BMC: | |
6620 | case I40E_SWITCH_ELEMENT_TYPE_PE: | |
6621 | case I40E_SWITCH_ELEMENT_TYPE_PA: | |
6622 | /* ignore these for now */ | |
6623 | break; | |
6624 | default: | |
6625 | dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", | |
6626 | element_type, seid); | |
6627 | break; | |
6628 | } | |
6629 | } | |
6630 | ||
6631 | /** | |
6632 | * i40e_fetch_switch_configuration - Get switch config from firmware | |
6633 | * @pf: board private structure | |
6634 | * @printconfig: should we print the contents | |
6635 | * | |
6636 | * Get the current switch configuration from the device and | |
6637 | * extract a few useful SEID values. | |
6638 | **/ | |
6639 | int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) | |
6640 | { | |
6641 | struct i40e_aqc_get_switch_config_resp *sw_config; | |
6642 | u16 next_seid = 0; | |
6643 | int ret = 0; | |
6644 | u8 *aq_buf; | |
6645 | int i; | |
6646 | ||
6647 | aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); | |
6648 | if (!aq_buf) | |
6649 | return -ENOMEM; | |
6650 | ||
6651 | sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; | |
6652 | do { | |
6653 | u16 num_reported, num_total; | |
6654 | ||
6655 | ret = i40e_aq_get_switch_config(&pf->hw, sw_config, | |
6656 | I40E_AQ_LARGE_BUF, | |
6657 | &next_seid, NULL); | |
6658 | if (ret) { | |
6659 | dev_info(&pf->pdev->dev, | |
6660 | "get switch config failed %d aq_err=%x\n", | |
6661 | ret, pf->hw.aq.asq_last_status); | |
6662 | kfree(aq_buf); | |
6663 | return -ENOENT; | |
6664 | } | |
6665 | ||
6666 | num_reported = le16_to_cpu(sw_config->header.num_reported); | |
6667 | num_total = le16_to_cpu(sw_config->header.num_total); | |
6668 | ||
6669 | if (printconfig) | |
6670 | dev_info(&pf->pdev->dev, | |
6671 | "header: %d reported %d total\n", | |
6672 | num_reported, num_total); | |
6673 | ||
6674 | if (num_reported) { | |
6675 | int sz = sizeof(*sw_config) * num_reported; | |
6676 | ||
6677 | kfree(pf->sw_config); | |
6678 | pf->sw_config = kzalloc(sz, GFP_KERNEL); | |
6679 | if (pf->sw_config) | |
6680 | memcpy(pf->sw_config, sw_config, sz); | |
6681 | } | |
6682 | ||
6683 | for (i = 0; i < num_reported; i++) { | |
6684 | struct i40e_aqc_switch_config_element_resp *ele = | |
6685 | &sw_config->element[i]; | |
6686 | ||
6687 | i40e_setup_pf_switch_element(pf, ele, num_reported, | |
6688 | printconfig); | |
6689 | } | |
6690 | } while (next_seid != 0); | |
6691 | ||
6692 | kfree(aq_buf); | |
6693 | return ret; | |
6694 | } | |
6695 | ||
6696 | /** | |
6697 | * i40e_setup_pf_switch - Setup the HW switch on startup or after reset | |
6698 | * @pf: board private structure | |
6699 | * | |
6700 | * Returns 0 on success, negative value on failure | |
6701 | **/ | |
6702 | static int i40e_setup_pf_switch(struct i40e_pf *pf) | |
6703 | { | |
6704 | int ret; | |
6705 | ||
6706 | /* find out what's out there already */ | |
6707 | ret = i40e_fetch_switch_configuration(pf, false); | |
6708 | if (ret) { | |
6709 | dev_info(&pf->pdev->dev, | |
6710 | "couldn't fetch switch config, err %d, aq_err %d\n", | |
6711 | ret, pf->hw.aq.asq_last_status); | |
6712 | return ret; | |
6713 | } | |
6714 | i40e_pf_reset_stats(pf); | |
6715 | ||
6716 | /* fdir VSI must happen first to be sure it gets queue 0, but only | |
6717 | * if there is enough room for the fdir VSI | |
6718 | */ | |
6719 | if (pf->num_lan_qps > 1) | |
6720 | i40e_fdir_setup(pf); | |
6721 | ||
6722 | /* first time setup */ | |
6723 | if (pf->lan_vsi == I40E_NO_VSI) { | |
6724 | struct i40e_vsi *vsi = NULL; | |
6725 | u16 uplink_seid; | |
6726 | ||
6727 | /* Set up the PF VSI associated with the PF's main VSI | |
6728 | * that is already in the HW switch | |
6729 | */ | |
6730 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
6731 | uplink_seid = pf->veb[pf->lan_veb]->seid; | |
6732 | else | |
6733 | uplink_seid = pf->mac_seid; | |
6734 | ||
6735 | vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); | |
6736 | if (!vsi) { | |
6737 | dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); | |
6738 | i40e_fdir_teardown(pf); | |
6739 | return -EAGAIN; | |
6740 | } | |
6741 | /* accommodate kcompat by copying the main VSI queue count | |
6742 | * into the pf, since this newer code pushes the pf queue | |
6743 | * info down a level into a VSI | |
6744 | */ | |
6745 | pf->num_rx_queues = vsi->alloc_queue_pairs; | |
6746 | pf->num_tx_queues = vsi->alloc_queue_pairs; | |
6747 | } else { | |
6748 | /* force a reset of TC and queue layout configurations */ | |
6749 | u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; | |
6750 | pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; | |
6751 | pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; | |
6752 | i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); | |
6753 | } | |
6754 | i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); | |
6755 | ||
6756 | /* Setup static PF queue filter control settings */ | |
6757 | ret = i40e_setup_pf_filter_control(pf); | |
6758 | if (ret) { | |
6759 | dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", | |
6760 | ret); | |
6761 | /* Failure here should not stop continuing other steps */ | |
6762 | } | |
6763 | ||
6764 | /* enable RSS in the HW, even for only one queue, as the stack can use | |
6765 | * the hash | |
6766 | */ | |
6767 | if ((pf->flags & I40E_FLAG_RSS_ENABLED)) | |
6768 | i40e_config_rss(pf); | |
6769 | ||
6770 | /* fill in link information and enable LSE reporting */ | |
6771 | i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); | |
6772 | i40e_link_event(pf); | |
6773 | ||
6774 | /* Initialize user-specifics link properties */ | |
6775 | pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & | |
6776 | I40E_AQ_AN_COMPLETED) ? true : false); | |
6777 | pf->hw.fc.requested_mode = I40E_FC_DEFAULT; | |
6778 | if (pf->hw.phy.link_info.an_info & | |
6779 | (I40E_AQ_LINK_PAUSE_TX | I40E_AQ_LINK_PAUSE_RX)) | |
6780 | pf->hw.fc.current_mode = I40E_FC_FULL; | |
6781 | else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) | |
6782 | pf->hw.fc.current_mode = I40E_FC_TX_PAUSE; | |
6783 | else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX) | |
6784 | pf->hw.fc.current_mode = I40E_FC_RX_PAUSE; | |
6785 | else | |
6786 | pf->hw.fc.current_mode = I40E_FC_DEFAULT; | |
6787 | ||
6788 | return ret; | |
6789 | } | |
6790 | ||
6791 | /** | |
6792 | * i40e_set_rss_size - helper to set rss_size | |
6793 | * @pf: board private structure | |
6794 | * @queues_left: how many queues | |
6795 | */ | |
6796 | static u16 i40e_set_rss_size(struct i40e_pf *pf, int queues_left) | |
6797 | { | |
6798 | int num_tc0; | |
6799 | ||
6800 | num_tc0 = min_t(int, queues_left, pf->rss_size_max); | |
6801 | num_tc0 = min_t(int, num_tc0, nr_cpus_node(numa_node_id())); | |
6802 | num_tc0 = rounddown_pow_of_two(num_tc0); | |
6803 | ||
6804 | return num_tc0; | |
6805 | } | |
6806 | ||
6807 | /** | |
6808 | * i40e_determine_queue_usage - Work out queue distribution | |
6809 | * @pf: board private structure | |
6810 | **/ | |
6811 | static void i40e_determine_queue_usage(struct i40e_pf *pf) | |
6812 | { | |
6813 | int accum_tc_size; | |
6814 | int queues_left; | |
6815 | ||
6816 | pf->num_lan_qps = 0; | |
6817 | pf->num_tc_qps = rounddown_pow_of_two(pf->num_tc_qps); | |
6818 | accum_tc_size = (I40E_MAX_TRAFFIC_CLASS - 1) * pf->num_tc_qps; | |
6819 | ||
6820 | /* Find the max queues to be put into basic use. We'll always be | |
6821 | * using TC0, whether or not DCB is running, and TC0 will get the | |
6822 | * big RSS set. | |
6823 | */ | |
6824 | queues_left = pf->hw.func_caps.num_tx_qp; | |
6825 | ||
6826 | if (!((pf->flags & I40E_FLAG_MSIX_ENABLED) && | |
6827 | (pf->flags & I40E_FLAG_MQ_ENABLED)) || | |
6828 | !(pf->flags & (I40E_FLAG_RSS_ENABLED | | |
6829 | I40E_FLAG_FDIR_ENABLED | I40E_FLAG_DCB_ENABLED)) || | |
6830 | (queues_left == 1)) { | |
6831 | ||
6832 | /* one qp for PF, no queues for anything else */ | |
6833 | queues_left = 0; | |
6834 | pf->rss_size = pf->num_lan_qps = 1; | |
6835 | ||
6836 | /* make sure all the fancies are disabled */ | |
6837 | pf->flags &= ~(I40E_FLAG_RSS_ENABLED | | |
6838 | I40E_FLAG_MQ_ENABLED | | |
6839 | I40E_FLAG_FDIR_ENABLED | | |
6840 | I40E_FLAG_FDIR_ATR_ENABLED | | |
6841 | I40E_FLAG_DCB_ENABLED | | |
6842 | I40E_FLAG_SRIOV_ENABLED | | |
6843 | I40E_FLAG_VMDQ_ENABLED); | |
6844 | ||
6845 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
6846 | !(pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
6847 | !(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
6848 | ||
6849 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
6850 | ||
6851 | queues_left -= pf->rss_size; | |
6852 | pf->num_lan_qps = pf->rss_size; | |
6853 | ||
6854 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
6855 | !(pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
6856 | (pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
6857 | ||
6858 | /* save num_tc_qps queues for TCs 1 thru 7 and the rest | |
6859 | * are set up for RSS in TC0 | |
6860 | */ | |
6861 | queues_left -= accum_tc_size; | |
6862 | ||
6863 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
6864 | ||
6865 | queues_left -= pf->rss_size; | |
6866 | if (queues_left < 0) { | |
6867 | dev_info(&pf->pdev->dev, "not enough queues for DCB\n"); | |
6868 | return; | |
6869 | } | |
6870 | ||
6871 | pf->num_lan_qps = pf->rss_size + accum_tc_size; | |
6872 | ||
6873 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
6874 | (pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
6875 | !(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
6876 | ||
6877 | queues_left -= 1; /* save 1 queue for FD */ | |
6878 | ||
6879 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
6880 | ||
6881 | queues_left -= pf->rss_size; | |
6882 | if (queues_left < 0) { | |
6883 | dev_info(&pf->pdev->dev, "not enough queues for Flow Director\n"); | |
6884 | return; | |
6885 | } | |
6886 | ||
6887 | pf->num_lan_qps = pf->rss_size; | |
6888 | ||
6889 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
6890 | (pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
6891 | (pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
6892 | ||
6893 | /* save 1 queue for TCs 1 thru 7, | |
6894 | * 1 queue for flow director, | |
6895 | * and the rest are set up for RSS in TC0 | |
6896 | */ | |
6897 | queues_left -= 1; | |
6898 | queues_left -= accum_tc_size; | |
6899 | ||
6900 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
6901 | queues_left -= pf->rss_size; | |
6902 | if (queues_left < 0) { | |
6903 | dev_info(&pf->pdev->dev, "not enough queues for DCB and Flow Director\n"); | |
6904 | return; | |
6905 | } | |
6906 | ||
6907 | pf->num_lan_qps = pf->rss_size + accum_tc_size; | |
6908 | ||
6909 | } else { | |
6910 | dev_info(&pf->pdev->dev, | |
6911 | "Invalid configuration, flags=0x%08llx\n", pf->flags); | |
6912 | return; | |
6913 | } | |
6914 | ||
6915 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
6916 | pf->num_vf_qps && pf->num_req_vfs && queues_left) { | |
6917 | pf->num_req_vfs = min_t(int, pf->num_req_vfs, (queues_left / | |
6918 | pf->num_vf_qps)); | |
6919 | queues_left -= (pf->num_req_vfs * pf->num_vf_qps); | |
6920 | } | |
6921 | ||
6922 | if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && | |
6923 | pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { | |
6924 | pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, | |
6925 | (queues_left / pf->num_vmdq_qps)); | |
6926 | queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); | |
6927 | } | |
6928 | ||
6929 | return; | |
6930 | } | |
6931 | ||
6932 | /** | |
6933 | * i40e_setup_pf_filter_control - Setup PF static filter control | |
6934 | * @pf: PF to be setup | |
6935 | * | |
6936 | * i40e_setup_pf_filter_control sets up a pf's initial filter control | |
6937 | * settings. If PE/FCoE are enabled then it will also set the per PF | |
6938 | * based filter sizes required for them. It also enables Flow director, | |
6939 | * ethertype and macvlan type filter settings for the pf. | |
6940 | * | |
6941 | * Returns 0 on success, negative on failure | |
6942 | **/ | |
6943 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf) | |
6944 | { | |
6945 | struct i40e_filter_control_settings *settings = &pf->filter_settings; | |
6946 | ||
6947 | settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; | |
6948 | ||
6949 | /* Flow Director is enabled */ | |
6950 | if (pf->flags & (I40E_FLAG_FDIR_ENABLED | I40E_FLAG_FDIR_ATR_ENABLED)) | |
6951 | settings->enable_fdir = true; | |
6952 | ||
6953 | /* Ethtype and MACVLAN filters enabled for PF */ | |
6954 | settings->enable_ethtype = true; | |
6955 | settings->enable_macvlan = true; | |
6956 | ||
6957 | if (i40e_set_filter_control(&pf->hw, settings)) | |
6958 | return -ENOENT; | |
6959 | ||
6960 | return 0; | |
6961 | } | |
6962 | ||
6963 | /** | |
6964 | * i40e_probe - Device initialization routine | |
6965 | * @pdev: PCI device information struct | |
6966 | * @ent: entry in i40e_pci_tbl | |
6967 | * | |
6968 | * i40e_probe initializes a pf identified by a pci_dev structure. | |
6969 | * The OS initialization, configuring of the pf private structure, | |
6970 | * and a hardware reset occur. | |
6971 | * | |
6972 | * Returns 0 on success, negative on failure | |
6973 | **/ | |
6974 | static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
6975 | { | |
6976 | struct i40e_driver_version dv; | |
6977 | struct i40e_pf *pf; | |
6978 | struct i40e_hw *hw; | |
6979 | int err = 0; | |
6980 | u32 len; | |
6981 | ||
6982 | err = pci_enable_device_mem(pdev); | |
6983 | if (err) | |
6984 | return err; | |
6985 | ||
6986 | /* set up for high or low dma */ | |
6987 | if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { | |
6988 | /* coherent mask for the same size will always succeed if | |
6989 | * dma_set_mask does | |
6990 | */ | |
6991 | dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); | |
6992 | } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { | |
6993 | dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
6994 | } else { | |
6995 | dev_err(&pdev->dev, "DMA configuration failed: %d\n", err); | |
6996 | err = -EIO; | |
6997 | goto err_dma; | |
6998 | } | |
6999 | ||
7000 | /* set up pci connections */ | |
7001 | err = pci_request_selected_regions(pdev, pci_select_bars(pdev, | |
7002 | IORESOURCE_MEM), i40e_driver_name); | |
7003 | if (err) { | |
7004 | dev_info(&pdev->dev, | |
7005 | "pci_request_selected_regions failed %d\n", err); | |
7006 | goto err_pci_reg; | |
7007 | } | |
7008 | ||
7009 | pci_enable_pcie_error_reporting(pdev); | |
7010 | pci_set_master(pdev); | |
7011 | ||
7012 | /* Now that we have a PCI connection, we need to do the | |
7013 | * low level device setup. This is primarily setting up | |
7014 | * the Admin Queue structures and then querying for the | |
7015 | * device's current profile information. | |
7016 | */ | |
7017 | pf = kzalloc(sizeof(*pf), GFP_KERNEL); | |
7018 | if (!pf) { | |
7019 | err = -ENOMEM; | |
7020 | goto err_pf_alloc; | |
7021 | } | |
7022 | pf->next_vsi = 0; | |
7023 | pf->pdev = pdev; | |
7024 | set_bit(__I40E_DOWN, &pf->state); | |
7025 | ||
7026 | hw = &pf->hw; | |
7027 | hw->back = pf; | |
7028 | hw->hw_addr = ioremap(pci_resource_start(pdev, 0), | |
7029 | pci_resource_len(pdev, 0)); | |
7030 | if (!hw->hw_addr) { | |
7031 | err = -EIO; | |
7032 | dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", | |
7033 | (unsigned int)pci_resource_start(pdev, 0), | |
7034 | (unsigned int)pci_resource_len(pdev, 0), err); | |
7035 | goto err_ioremap; | |
7036 | } | |
7037 | hw->vendor_id = pdev->vendor; | |
7038 | hw->device_id = pdev->device; | |
7039 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
7040 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
7041 | hw->subsystem_device_id = pdev->subsystem_device; | |
7042 | hw->bus.device = PCI_SLOT(pdev->devfn); | |
7043 | hw->bus.func = PCI_FUNC(pdev->devfn); | |
7044 | ||
7045 | /* Reset here to make sure all is clean and to define PF 'n' */ | |
7046 | err = i40e_pf_reset(hw); | |
7047 | if (err) { | |
7048 | dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); | |
7049 | goto err_pf_reset; | |
7050 | } | |
7051 | pf->pfr_count++; | |
7052 | ||
7053 | hw->aq.num_arq_entries = I40E_AQ_LEN; | |
7054 | hw->aq.num_asq_entries = I40E_AQ_LEN; | |
7055 | hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
7056 | hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
7057 | pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; | |
7058 | snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1, | |
7059 | "%s-pf%d:misc", | |
7060 | dev_driver_string(&pf->pdev->dev), pf->hw.pf_id); | |
7061 | ||
7062 | err = i40e_init_shared_code(hw); | |
7063 | if (err) { | |
7064 | dev_info(&pdev->dev, "init_shared_code failed: %d\n", err); | |
7065 | goto err_pf_reset; | |
7066 | } | |
7067 | ||
7068 | err = i40e_init_adminq(hw); | |
7069 | dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw)); | |
7070 | if (err) { | |
7071 | dev_info(&pdev->dev, | |
7072 | "init_adminq failed: %d expecting API %02x.%02x\n", | |
7073 | err, | |
7074 | I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR); | |
7075 | goto err_pf_reset; | |
7076 | } | |
7077 | ||
7078 | err = i40e_get_capabilities(pf); | |
7079 | if (err) | |
7080 | goto err_adminq_setup; | |
7081 | ||
7082 | err = i40e_sw_init(pf); | |
7083 | if (err) { | |
7084 | dev_info(&pdev->dev, "sw_init failed: %d\n", err); | |
7085 | goto err_sw_init; | |
7086 | } | |
7087 | ||
7088 | err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, | |
7089 | hw->func_caps.num_rx_qp, | |
7090 | pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); | |
7091 | if (err) { | |
7092 | dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); | |
7093 | goto err_init_lan_hmc; | |
7094 | } | |
7095 | ||
7096 | err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
7097 | if (err) { | |
7098 | dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); | |
7099 | err = -ENOENT; | |
7100 | goto err_configure_lan_hmc; | |
7101 | } | |
7102 | ||
7103 | i40e_get_mac_addr(hw, hw->mac.addr); | |
7104 | if (i40e_validate_mac_addr(hw->mac.addr)) { | |
7105 | dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); | |
7106 | err = -EIO; | |
7107 | goto err_mac_addr; | |
7108 | } | |
7109 | dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); | |
7110 | memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN); | |
7111 | ||
7112 | pci_set_drvdata(pdev, pf); | |
7113 | pci_save_state(pdev); | |
7114 | ||
7115 | /* set up periodic task facility */ | |
7116 | setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); | |
7117 | pf->service_timer_period = HZ; | |
7118 | ||
7119 | INIT_WORK(&pf->service_task, i40e_service_task); | |
7120 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); | |
7121 | pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; | |
7122 | pf->link_check_timeout = jiffies; | |
7123 | ||
7124 | /* set up the main switch operations */ | |
7125 | i40e_determine_queue_usage(pf); | |
7126 | i40e_init_interrupt_scheme(pf); | |
7127 | ||
7128 | /* Set up the *vsi struct based on the number of VSIs in the HW, | |
7129 | * and set up our local tracking of the MAIN PF vsi. | |
7130 | */ | |
7131 | len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis; | |
7132 | pf->vsi = kzalloc(len, GFP_KERNEL); | |
7133 | if (!pf->vsi) | |
7134 | goto err_switch_setup; | |
7135 | ||
7136 | err = i40e_setup_pf_switch(pf); | |
7137 | if (err) { | |
7138 | dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); | |
7139 | goto err_vsis; | |
7140 | } | |
7141 | ||
7142 | /* The main driver is (mostly) up and happy. We need to set this state | |
7143 | * before setting up the misc vector or we get a race and the vector | |
7144 | * ends up disabled forever. | |
7145 | */ | |
7146 | clear_bit(__I40E_DOWN, &pf->state); | |
7147 | ||
7148 | /* In case of MSIX we are going to setup the misc vector right here | |
7149 | * to handle admin queue events etc. In case of legacy and MSI | |
7150 | * the misc functionality and queue processing is combined in | |
7151 | * the same vector and that gets setup at open. | |
7152 | */ | |
7153 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
7154 | err = i40e_setup_misc_vector(pf); | |
7155 | if (err) { | |
7156 | dev_info(&pdev->dev, | |
7157 | "setup of misc vector failed: %d\n", err); | |
7158 | goto err_vsis; | |
7159 | } | |
7160 | } | |
7161 | ||
7162 | /* prep for VF support */ | |
7163 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
7164 | (pf->flags & I40E_FLAG_MSIX_ENABLED)) { | |
7165 | u32 val; | |
7166 | ||
7167 | /* disable link interrupts for VFs */ | |
7168 | val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); | |
7169 | val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; | |
7170 | wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); | |
7171 | i40e_flush(hw); | |
7172 | } | |
7173 | ||
7174 | i40e_dbg_pf_init(pf); | |
7175 | ||
7176 | /* tell the firmware that we're starting */ | |
7177 | dv.major_version = DRV_VERSION_MAJOR; | |
7178 | dv.minor_version = DRV_VERSION_MINOR; | |
7179 | dv.build_version = DRV_VERSION_BUILD; | |
7180 | dv.subbuild_version = 0; | |
7181 | i40e_aq_send_driver_version(&pf->hw, &dv, NULL); | |
7182 | ||
7183 | /* since everything's happy, start the service_task timer */ | |
7184 | mod_timer(&pf->service_timer, | |
7185 | round_jiffies(jiffies + pf->service_timer_period)); | |
7186 | ||
7187 | return 0; | |
7188 | ||
7189 | /* Unwind what we've done if something failed in the setup */ | |
7190 | err_vsis: | |
7191 | set_bit(__I40E_DOWN, &pf->state); | |
7192 | err_switch_setup: | |
7193 | i40e_clear_interrupt_scheme(pf); | |
7194 | kfree(pf->vsi); | |
7195 | del_timer_sync(&pf->service_timer); | |
7196 | err_mac_addr: | |
7197 | err_configure_lan_hmc: | |
7198 | (void)i40e_shutdown_lan_hmc(hw); | |
7199 | err_init_lan_hmc: | |
7200 | kfree(pf->qp_pile); | |
7201 | kfree(pf->irq_pile); | |
7202 | err_sw_init: | |
7203 | err_adminq_setup: | |
7204 | (void)i40e_shutdown_adminq(hw); | |
7205 | err_pf_reset: | |
7206 | iounmap(hw->hw_addr); | |
7207 | err_ioremap: | |
7208 | kfree(pf); | |
7209 | err_pf_alloc: | |
7210 | pci_disable_pcie_error_reporting(pdev); | |
7211 | pci_release_selected_regions(pdev, | |
7212 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
7213 | err_pci_reg: | |
7214 | err_dma: | |
7215 | pci_disable_device(pdev); | |
7216 | return err; | |
7217 | } | |
7218 | ||
7219 | /** | |
7220 | * i40e_remove - Device removal routine | |
7221 | * @pdev: PCI device information struct | |
7222 | * | |
7223 | * i40e_remove is called by the PCI subsystem to alert the driver | |
7224 | * that is should release a PCI device. This could be caused by a | |
7225 | * Hot-Plug event, or because the driver is going to be removed from | |
7226 | * memory. | |
7227 | **/ | |
7228 | static void i40e_remove(struct pci_dev *pdev) | |
7229 | { | |
7230 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7231 | i40e_status ret_code; | |
7232 | u32 reg; | |
7233 | int i; | |
7234 | ||
7235 | i40e_dbg_pf_exit(pf); | |
7236 | ||
7237 | if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { | |
7238 | i40e_free_vfs(pf); | |
7239 | pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; | |
7240 | } | |
7241 | ||
7242 | /* no more scheduling of any task */ | |
7243 | set_bit(__I40E_DOWN, &pf->state); | |
7244 | del_timer_sync(&pf->service_timer); | |
7245 | cancel_work_sync(&pf->service_task); | |
7246 | ||
7247 | i40e_fdir_teardown(pf); | |
7248 | ||
7249 | /* If there is a switch structure or any orphans, remove them. | |
7250 | * This will leave only the PF's VSI remaining. | |
7251 | */ | |
7252 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
7253 | if (!pf->veb[i]) | |
7254 | continue; | |
7255 | ||
7256 | if (pf->veb[i]->uplink_seid == pf->mac_seid || | |
7257 | pf->veb[i]->uplink_seid == 0) | |
7258 | i40e_switch_branch_release(pf->veb[i]); | |
7259 | } | |
7260 | ||
7261 | /* Now we can shutdown the PF's VSI, just before we kill | |
7262 | * adminq and hmc. | |
7263 | */ | |
7264 | if (pf->vsi[pf->lan_vsi]) | |
7265 | i40e_vsi_release(pf->vsi[pf->lan_vsi]); | |
7266 | ||
7267 | i40e_stop_misc_vector(pf); | |
7268 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
7269 | synchronize_irq(pf->msix_entries[0].vector); | |
7270 | free_irq(pf->msix_entries[0].vector, pf); | |
7271 | } | |
7272 | ||
7273 | /* shutdown and destroy the HMC */ | |
7274 | ret_code = i40e_shutdown_lan_hmc(&pf->hw); | |
7275 | if (ret_code) | |
7276 | dev_warn(&pdev->dev, | |
7277 | "Failed to destroy the HMC resources: %d\n", ret_code); | |
7278 | ||
7279 | /* shutdown the adminq */ | |
7280 | i40e_aq_queue_shutdown(&pf->hw, true); | |
7281 | ret_code = i40e_shutdown_adminq(&pf->hw); | |
7282 | if (ret_code) | |
7283 | dev_warn(&pdev->dev, | |
7284 | "Failed to destroy the Admin Queue resources: %d\n", | |
7285 | ret_code); | |
7286 | ||
7287 | /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ | |
7288 | i40e_clear_interrupt_scheme(pf); | |
7289 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
7290 | if (pf->vsi[i]) { | |
7291 | i40e_vsi_clear_rings(pf->vsi[i]); | |
7292 | i40e_vsi_clear(pf->vsi[i]); | |
7293 | pf->vsi[i] = NULL; | |
7294 | } | |
7295 | } | |
7296 | ||
7297 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
7298 | kfree(pf->veb[i]); | |
7299 | pf->veb[i] = NULL; | |
7300 | } | |
7301 | ||
7302 | kfree(pf->qp_pile); | |
7303 | kfree(pf->irq_pile); | |
7304 | kfree(pf->sw_config); | |
7305 | kfree(pf->vsi); | |
7306 | ||
7307 | /* force a PF reset to clean anything leftover */ | |
7308 | reg = rd32(&pf->hw, I40E_PFGEN_CTRL); | |
7309 | wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK)); | |
7310 | i40e_flush(&pf->hw); | |
7311 | ||
7312 | iounmap(pf->hw.hw_addr); | |
7313 | kfree(pf); | |
7314 | pci_release_selected_regions(pdev, | |
7315 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
7316 | ||
7317 | pci_disable_pcie_error_reporting(pdev); | |
7318 | pci_disable_device(pdev); | |
7319 | } | |
7320 | ||
7321 | /** | |
7322 | * i40e_pci_error_detected - warning that something funky happened in PCI land | |
7323 | * @pdev: PCI device information struct | |
7324 | * | |
7325 | * Called to warn that something happened and the error handling steps | |
7326 | * are in progress. Allows the driver to quiesce things, be ready for | |
7327 | * remediation. | |
7328 | **/ | |
7329 | static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, | |
7330 | enum pci_channel_state error) | |
7331 | { | |
7332 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7333 | ||
7334 | dev_info(&pdev->dev, "%s: error %d\n", __func__, error); | |
7335 | ||
7336 | /* shutdown all operations */ | |
7337 | i40e_pf_quiesce_all_vsi(pf); | |
7338 | ||
7339 | /* Request a slot reset */ | |
7340 | return PCI_ERS_RESULT_NEED_RESET; | |
7341 | } | |
7342 | ||
7343 | /** | |
7344 | * i40e_pci_error_slot_reset - a PCI slot reset just happened | |
7345 | * @pdev: PCI device information struct | |
7346 | * | |
7347 | * Called to find if the driver can work with the device now that | |
7348 | * the pci slot has been reset. If a basic connection seems good | |
7349 | * (registers are readable and have sane content) then return a | |
7350 | * happy little PCI_ERS_RESULT_xxx. | |
7351 | **/ | |
7352 | static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) | |
7353 | { | |
7354 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7355 | pci_ers_result_t result; | |
7356 | int err; | |
7357 | u32 reg; | |
7358 | ||
7359 | dev_info(&pdev->dev, "%s\n", __func__); | |
7360 | if (pci_enable_device_mem(pdev)) { | |
7361 | dev_info(&pdev->dev, | |
7362 | "Cannot re-enable PCI device after reset.\n"); | |
7363 | result = PCI_ERS_RESULT_DISCONNECT; | |
7364 | } else { | |
7365 | pci_set_master(pdev); | |
7366 | pci_restore_state(pdev); | |
7367 | pci_save_state(pdev); | |
7368 | pci_wake_from_d3(pdev, false); | |
7369 | ||
7370 | reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
7371 | if (reg == 0) | |
7372 | result = PCI_ERS_RESULT_RECOVERED; | |
7373 | else | |
7374 | result = PCI_ERS_RESULT_DISCONNECT; | |
7375 | } | |
7376 | ||
7377 | err = pci_cleanup_aer_uncorrect_error_status(pdev); | |
7378 | if (err) { | |
7379 | dev_info(&pdev->dev, | |
7380 | "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", | |
7381 | err); | |
7382 | /* non-fatal, continue */ | |
7383 | } | |
7384 | ||
7385 | return result; | |
7386 | } | |
7387 | ||
7388 | /** | |
7389 | * i40e_pci_error_resume - restart operations after PCI error recovery | |
7390 | * @pdev: PCI device information struct | |
7391 | * | |
7392 | * Called to allow the driver to bring things back up after PCI error | |
7393 | * and/or reset recovery has finished. | |
7394 | **/ | |
7395 | static void i40e_pci_error_resume(struct pci_dev *pdev) | |
7396 | { | |
7397 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7398 | ||
7399 | dev_info(&pdev->dev, "%s\n", __func__); | |
7400 | i40e_handle_reset_warning(pf); | |
7401 | } | |
7402 | ||
7403 | static const struct pci_error_handlers i40e_err_handler = { | |
7404 | .error_detected = i40e_pci_error_detected, | |
7405 | .slot_reset = i40e_pci_error_slot_reset, | |
7406 | .resume = i40e_pci_error_resume, | |
7407 | }; | |
7408 | ||
7409 | static struct pci_driver i40e_driver = { | |
7410 | .name = i40e_driver_name, | |
7411 | .id_table = i40e_pci_tbl, | |
7412 | .probe = i40e_probe, | |
7413 | .remove = i40e_remove, | |
7414 | .err_handler = &i40e_err_handler, | |
7415 | .sriov_configure = i40e_pci_sriov_configure, | |
7416 | }; | |
7417 | ||
7418 | /** | |
7419 | * i40e_init_module - Driver registration routine | |
7420 | * | |
7421 | * i40e_init_module is the first routine called when the driver is | |
7422 | * loaded. All it does is register with the PCI subsystem. | |
7423 | **/ | |
7424 | static int __init i40e_init_module(void) | |
7425 | { | |
7426 | pr_info("%s: %s - version %s\n", i40e_driver_name, | |
7427 | i40e_driver_string, i40e_driver_version_str); | |
7428 | pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); | |
7429 | i40e_dbg_init(); | |
7430 | return pci_register_driver(&i40e_driver); | |
7431 | } | |
7432 | module_init(i40e_init_module); | |
7433 | ||
7434 | /** | |
7435 | * i40e_exit_module - Driver exit cleanup routine | |
7436 | * | |
7437 | * i40e_exit_module is called just before the driver is removed | |
7438 | * from memory. | |
7439 | **/ | |
7440 | static void __exit i40e_exit_module(void) | |
7441 | { | |
7442 | pci_unregister_driver(&i40e_driver); | |
7443 | i40e_dbg_exit(); | |
7444 | } | |
7445 | module_exit(i40e_exit_module); |