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41c445ff JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
4 | * Copyright(c) 2013 Intel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | * | |
19 | * The full GNU General Public License is included in this distribution in | |
20 | * the file called "COPYING". | |
21 | * | |
22 | * Contact Information: | |
23 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | * | |
26 | ******************************************************************************/ | |
27 | ||
28 | /* Local includes */ | |
29 | #include "i40e.h" | |
30 | ||
31 | const char i40e_driver_name[] = "i40e"; | |
32 | static const char i40e_driver_string[] = | |
33 | "Intel(R) Ethernet Connection XL710 Network Driver"; | |
34 | ||
35 | #define DRV_KERN "-k" | |
36 | ||
37 | #define DRV_VERSION_MAJOR 0 | |
38 | #define DRV_VERSION_MINOR 3 | |
582a74e5 | 39 | #define DRV_VERSION_BUILD 14 |
41c445ff JB |
40 | #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ |
41 | __stringify(DRV_VERSION_MINOR) "." \ | |
42 | __stringify(DRV_VERSION_BUILD) DRV_KERN | |
43 | const char i40e_driver_version_str[] = DRV_VERSION; | |
44 | static const char i40e_copyright[] = "Copyright (c) 2013 Intel Corporation."; | |
45 | ||
46 | /* a bit of forward declarations */ | |
47 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); | |
48 | static void i40e_handle_reset_warning(struct i40e_pf *pf); | |
49 | static int i40e_add_vsi(struct i40e_vsi *vsi); | |
50 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); | |
bc7d338f | 51 | static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); |
41c445ff JB |
52 | static int i40e_setup_misc_vector(struct i40e_pf *pf); |
53 | static void i40e_determine_queue_usage(struct i40e_pf *pf); | |
54 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf); | |
55 | ||
56 | /* i40e_pci_tbl - PCI Device ID Table | |
57 | * | |
58 | * Last entry must be all 0s | |
59 | * | |
60 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
61 | * Class, Class Mask, private data (not used) } | |
62 | */ | |
63 | static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = { | |
64 | {PCI_VDEVICE(INTEL, I40E_SFP_XL710_DEVICE_ID), 0}, | |
65 | {PCI_VDEVICE(INTEL, I40E_SFP_X710_DEVICE_ID), 0}, | |
66 | {PCI_VDEVICE(INTEL, I40E_QEMU_DEVICE_ID), 0}, | |
67 | {PCI_VDEVICE(INTEL, I40E_KX_A_DEVICE_ID), 0}, | |
68 | {PCI_VDEVICE(INTEL, I40E_KX_B_DEVICE_ID), 0}, | |
69 | {PCI_VDEVICE(INTEL, I40E_KX_C_DEVICE_ID), 0}, | |
70 | {PCI_VDEVICE(INTEL, I40E_KX_D_DEVICE_ID), 0}, | |
71 | {PCI_VDEVICE(INTEL, I40E_QSFP_A_DEVICE_ID), 0}, | |
72 | {PCI_VDEVICE(INTEL, I40E_QSFP_B_DEVICE_ID), 0}, | |
73 | {PCI_VDEVICE(INTEL, I40E_QSFP_C_DEVICE_ID), 0}, | |
74 | /* required last entry */ | |
75 | {0, } | |
76 | }; | |
77 | MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); | |
78 | ||
79 | #define I40E_MAX_VF_COUNT 128 | |
80 | static int debug = -1; | |
81 | module_param(debug, int, 0); | |
82 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
83 | ||
84 | MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); | |
85 | MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); | |
86 | MODULE_LICENSE("GPL"); | |
87 | MODULE_VERSION(DRV_VERSION); | |
88 | ||
89 | /** | |
90 | * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code | |
91 | * @hw: pointer to the HW structure | |
92 | * @mem: ptr to mem struct to fill out | |
93 | * @size: size of memory requested | |
94 | * @alignment: what to align the allocation to | |
95 | **/ | |
96 | int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, | |
97 | u64 size, u32 alignment) | |
98 | { | |
99 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
100 | ||
101 | mem->size = ALIGN(size, alignment); | |
102 | mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, | |
103 | &mem->pa, GFP_KERNEL); | |
93bc73b8 JB |
104 | if (!mem->va) |
105 | return -ENOMEM; | |
41c445ff | 106 | |
93bc73b8 | 107 | return 0; |
41c445ff JB |
108 | } |
109 | ||
110 | /** | |
111 | * i40e_free_dma_mem_d - OS specific memory free for shared code | |
112 | * @hw: pointer to the HW structure | |
113 | * @mem: ptr to mem struct to free | |
114 | **/ | |
115 | int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) | |
116 | { | |
117 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
118 | ||
119 | dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); | |
120 | mem->va = NULL; | |
121 | mem->pa = 0; | |
122 | mem->size = 0; | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | /** | |
128 | * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code | |
129 | * @hw: pointer to the HW structure | |
130 | * @mem: ptr to mem struct to fill out | |
131 | * @size: size of memory requested | |
132 | **/ | |
133 | int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, | |
134 | u32 size) | |
135 | { | |
136 | mem->size = size; | |
137 | mem->va = kzalloc(size, GFP_KERNEL); | |
138 | ||
93bc73b8 JB |
139 | if (!mem->va) |
140 | return -ENOMEM; | |
41c445ff | 141 | |
93bc73b8 | 142 | return 0; |
41c445ff JB |
143 | } |
144 | ||
145 | /** | |
146 | * i40e_free_virt_mem_d - OS specific memory free for shared code | |
147 | * @hw: pointer to the HW structure | |
148 | * @mem: ptr to mem struct to free | |
149 | **/ | |
150 | int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) | |
151 | { | |
152 | /* it's ok to kfree a NULL pointer */ | |
153 | kfree(mem->va); | |
154 | mem->va = NULL; | |
155 | mem->size = 0; | |
156 | ||
157 | return 0; | |
158 | } | |
159 | ||
160 | /** | |
161 | * i40e_get_lump - find a lump of free generic resource | |
162 | * @pf: board private structure | |
163 | * @pile: the pile of resource to search | |
164 | * @needed: the number of items needed | |
165 | * @id: an owner id to stick on the items assigned | |
166 | * | |
167 | * Returns the base item index of the lump, or negative for error | |
168 | * | |
169 | * The search_hint trick and lack of advanced fit-finding only work | |
170 | * because we're highly likely to have all the same size lump requests. | |
171 | * Linear search time and any fragmentation should be minimal. | |
172 | **/ | |
173 | static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, | |
174 | u16 needed, u16 id) | |
175 | { | |
176 | int ret = -ENOMEM; | |
ddf434ac | 177 | int i, j; |
41c445ff JB |
178 | |
179 | if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { | |
180 | dev_info(&pf->pdev->dev, | |
181 | "param err: pile=%p needed=%d id=0x%04x\n", | |
182 | pile, needed, id); | |
183 | return -EINVAL; | |
184 | } | |
185 | ||
186 | /* start the linear search with an imperfect hint */ | |
187 | i = pile->search_hint; | |
ddf434ac | 188 | while (i < pile->num_entries) { |
41c445ff JB |
189 | /* skip already allocated entries */ |
190 | if (pile->list[i] & I40E_PILE_VALID_BIT) { | |
191 | i++; | |
192 | continue; | |
193 | } | |
194 | ||
195 | /* do we have enough in this lump? */ | |
196 | for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { | |
197 | if (pile->list[i+j] & I40E_PILE_VALID_BIT) | |
198 | break; | |
199 | } | |
200 | ||
201 | if (j == needed) { | |
202 | /* there was enough, so assign it to the requestor */ | |
203 | for (j = 0; j < needed; j++) | |
204 | pile->list[i+j] = id | I40E_PILE_VALID_BIT; | |
205 | ret = i; | |
206 | pile->search_hint = i + j; | |
ddf434ac | 207 | break; |
41c445ff JB |
208 | } else { |
209 | /* not enough, so skip over it and continue looking */ | |
210 | i += j; | |
211 | } | |
212 | } | |
213 | ||
214 | return ret; | |
215 | } | |
216 | ||
217 | /** | |
218 | * i40e_put_lump - return a lump of generic resource | |
219 | * @pile: the pile of resource to search | |
220 | * @index: the base item index | |
221 | * @id: the owner id of the items assigned | |
222 | * | |
223 | * Returns the count of items in the lump | |
224 | **/ | |
225 | static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) | |
226 | { | |
227 | int valid_id = (id | I40E_PILE_VALID_BIT); | |
228 | int count = 0; | |
229 | int i; | |
230 | ||
231 | if (!pile || index >= pile->num_entries) | |
232 | return -EINVAL; | |
233 | ||
234 | for (i = index; | |
235 | i < pile->num_entries && pile->list[i] == valid_id; | |
236 | i++) { | |
237 | pile->list[i] = 0; | |
238 | count++; | |
239 | } | |
240 | ||
241 | if (count && index < pile->search_hint) | |
242 | pile->search_hint = index; | |
243 | ||
244 | return count; | |
245 | } | |
246 | ||
247 | /** | |
248 | * i40e_service_event_schedule - Schedule the service task to wake up | |
249 | * @pf: board private structure | |
250 | * | |
251 | * If not already scheduled, this puts the task into the work queue | |
252 | **/ | |
253 | static void i40e_service_event_schedule(struct i40e_pf *pf) | |
254 | { | |
255 | if (!test_bit(__I40E_DOWN, &pf->state) && | |
256 | !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && | |
257 | !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) | |
258 | schedule_work(&pf->service_task); | |
259 | } | |
260 | ||
261 | /** | |
262 | * i40e_tx_timeout - Respond to a Tx Hang | |
263 | * @netdev: network interface device structure | |
264 | * | |
265 | * If any port has noticed a Tx timeout, it is likely that the whole | |
266 | * device is munged, not just the one netdev port, so go for the full | |
267 | * reset. | |
268 | **/ | |
269 | static void i40e_tx_timeout(struct net_device *netdev) | |
270 | { | |
271 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
272 | struct i40e_vsi *vsi = np->vsi; | |
273 | struct i40e_pf *pf = vsi->back; | |
274 | ||
275 | pf->tx_timeout_count++; | |
276 | ||
277 | if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) | |
278 | pf->tx_timeout_recovery_level = 0; | |
279 | pf->tx_timeout_last_recovery = jiffies; | |
280 | netdev_info(netdev, "tx_timeout recovery level %d\n", | |
281 | pf->tx_timeout_recovery_level); | |
282 | ||
283 | switch (pf->tx_timeout_recovery_level) { | |
284 | case 0: | |
285 | /* disable and re-enable queues for the VSI */ | |
286 | if (in_interrupt()) { | |
287 | set_bit(__I40E_REINIT_REQUESTED, &pf->state); | |
288 | set_bit(__I40E_REINIT_REQUESTED, &vsi->state); | |
289 | } else { | |
290 | i40e_vsi_reinit_locked(vsi); | |
291 | } | |
292 | break; | |
293 | case 1: | |
294 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
295 | break; | |
296 | case 2: | |
297 | set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); | |
298 | break; | |
299 | case 3: | |
300 | set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); | |
301 | break; | |
302 | default: | |
303 | netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); | |
304 | i40e_down(vsi); | |
305 | break; | |
306 | } | |
307 | i40e_service_event_schedule(pf); | |
308 | pf->tx_timeout_recovery_level++; | |
309 | } | |
310 | ||
311 | /** | |
312 | * i40e_release_rx_desc - Store the new tail and head values | |
313 | * @rx_ring: ring to bump | |
314 | * @val: new head index | |
315 | **/ | |
316 | static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val) | |
317 | { | |
318 | rx_ring->next_to_use = val; | |
319 | ||
320 | /* Force memory writes to complete before letting h/w | |
321 | * know there are new descriptors to fetch. (Only | |
322 | * applicable for weak-ordered memory model archs, | |
323 | * such as IA-64). | |
324 | */ | |
325 | wmb(); | |
326 | writel(val, rx_ring->tail); | |
327 | } | |
328 | ||
329 | /** | |
330 | * i40e_get_vsi_stats_struct - Get System Network Statistics | |
331 | * @vsi: the VSI we care about | |
332 | * | |
333 | * Returns the address of the device statistics structure. | |
334 | * The statistics are actually updated from the service task. | |
335 | **/ | |
336 | struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) | |
337 | { | |
338 | return &vsi->net_stats; | |
339 | } | |
340 | ||
341 | /** | |
342 | * i40e_get_netdev_stats_struct - Get statistics for netdev interface | |
343 | * @netdev: network interface device structure | |
344 | * | |
345 | * Returns the address of the device statistics structure. | |
346 | * The statistics are actually updated from the service task. | |
347 | **/ | |
348 | static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( | |
349 | struct net_device *netdev, | |
980e9b11 | 350 | struct rtnl_link_stats64 *stats) |
41c445ff JB |
351 | { |
352 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
353 | struct i40e_vsi *vsi = np->vsi; | |
980e9b11 AD |
354 | struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); |
355 | int i; | |
356 | ||
143c9054 | 357 | |
bc7d338f ASJ |
358 | if (test_bit(__I40E_DOWN, &vsi->state)) |
359 | return stats; | |
360 | ||
3c325ced JB |
361 | if (!vsi->tx_rings) |
362 | return stats; | |
363 | ||
980e9b11 AD |
364 | rcu_read_lock(); |
365 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
366 | struct i40e_ring *tx_ring, *rx_ring; | |
367 | u64 bytes, packets; | |
368 | unsigned int start; | |
369 | ||
370 | tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); | |
371 | if (!tx_ring) | |
372 | continue; | |
373 | ||
374 | do { | |
375 | start = u64_stats_fetch_begin_bh(&tx_ring->syncp); | |
376 | packets = tx_ring->stats.packets; | |
377 | bytes = tx_ring->stats.bytes; | |
378 | } while (u64_stats_fetch_retry_bh(&tx_ring->syncp, start)); | |
379 | ||
380 | stats->tx_packets += packets; | |
381 | stats->tx_bytes += bytes; | |
382 | rx_ring = &tx_ring[1]; | |
383 | ||
384 | do { | |
385 | start = u64_stats_fetch_begin_bh(&rx_ring->syncp); | |
386 | packets = rx_ring->stats.packets; | |
387 | bytes = rx_ring->stats.bytes; | |
388 | } while (u64_stats_fetch_retry_bh(&rx_ring->syncp, start)); | |
41c445ff | 389 | |
980e9b11 AD |
390 | stats->rx_packets += packets; |
391 | stats->rx_bytes += bytes; | |
392 | } | |
393 | rcu_read_unlock(); | |
394 | ||
395 | /* following stats updated by ixgbe_watchdog_task() */ | |
396 | stats->multicast = vsi_stats->multicast; | |
397 | stats->tx_errors = vsi_stats->tx_errors; | |
398 | stats->tx_dropped = vsi_stats->tx_dropped; | |
399 | stats->rx_errors = vsi_stats->rx_errors; | |
400 | stats->rx_crc_errors = vsi_stats->rx_crc_errors; | |
401 | stats->rx_length_errors = vsi_stats->rx_length_errors; | |
41c445ff | 402 | |
980e9b11 | 403 | return stats; |
41c445ff JB |
404 | } |
405 | ||
406 | /** | |
407 | * i40e_vsi_reset_stats - Resets all stats of the given vsi | |
408 | * @vsi: the VSI to have its stats reset | |
409 | **/ | |
410 | void i40e_vsi_reset_stats(struct i40e_vsi *vsi) | |
411 | { | |
412 | struct rtnl_link_stats64 *ns; | |
413 | int i; | |
414 | ||
415 | if (!vsi) | |
416 | return; | |
417 | ||
418 | ns = i40e_get_vsi_stats_struct(vsi); | |
419 | memset(ns, 0, sizeof(*ns)); | |
420 | memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); | |
421 | memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); | |
422 | memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); | |
423 | if (vsi->rx_rings) | |
424 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
425 | memset(&vsi->rx_rings[i]->stats, 0 , |
426 | sizeof(vsi->rx_rings[i]->stats)); | |
427 | memset(&vsi->rx_rings[i]->rx_stats, 0 , | |
428 | sizeof(vsi->rx_rings[i]->rx_stats)); | |
429 | memset(&vsi->tx_rings[i]->stats, 0 , | |
430 | sizeof(vsi->tx_rings[i]->stats)); | |
431 | memset(&vsi->tx_rings[i]->tx_stats, 0, | |
432 | sizeof(vsi->tx_rings[i]->tx_stats)); | |
41c445ff JB |
433 | } |
434 | vsi->stat_offsets_loaded = false; | |
435 | } | |
436 | ||
437 | /** | |
438 | * i40e_pf_reset_stats - Reset all of the stats for the given pf | |
439 | * @pf: the PF to be reset | |
440 | **/ | |
441 | void i40e_pf_reset_stats(struct i40e_pf *pf) | |
442 | { | |
443 | memset(&pf->stats, 0, sizeof(pf->stats)); | |
444 | memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); | |
445 | pf->stat_offsets_loaded = false; | |
446 | } | |
447 | ||
448 | /** | |
449 | * i40e_stat_update48 - read and update a 48 bit stat from the chip | |
450 | * @hw: ptr to the hardware info | |
451 | * @hireg: the high 32 bit reg to read | |
452 | * @loreg: the low 32 bit reg to read | |
453 | * @offset_loaded: has the initial offset been loaded yet | |
454 | * @offset: ptr to current offset value | |
455 | * @stat: ptr to the stat | |
456 | * | |
457 | * Since the device stats are not reset at PFReset, they likely will not | |
458 | * be zeroed when the driver starts. We'll save the first values read | |
459 | * and use them as offsets to be subtracted from the raw values in order | |
460 | * to report stats that count from zero. In the process, we also manage | |
461 | * the potential roll-over. | |
462 | **/ | |
463 | static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, | |
464 | bool offset_loaded, u64 *offset, u64 *stat) | |
465 | { | |
466 | u64 new_data; | |
467 | ||
468 | if (hw->device_id == I40E_QEMU_DEVICE_ID) { | |
469 | new_data = rd32(hw, loreg); | |
470 | new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; | |
471 | } else { | |
472 | new_data = rd64(hw, loreg); | |
473 | } | |
474 | if (!offset_loaded) | |
475 | *offset = new_data; | |
476 | if (likely(new_data >= *offset)) | |
477 | *stat = new_data - *offset; | |
478 | else | |
479 | *stat = (new_data + ((u64)1 << 48)) - *offset; | |
480 | *stat &= 0xFFFFFFFFFFFFULL; | |
481 | } | |
482 | ||
483 | /** | |
484 | * i40e_stat_update32 - read and update a 32 bit stat from the chip | |
485 | * @hw: ptr to the hardware info | |
486 | * @reg: the hw reg to read | |
487 | * @offset_loaded: has the initial offset been loaded yet | |
488 | * @offset: ptr to current offset value | |
489 | * @stat: ptr to the stat | |
490 | **/ | |
491 | static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, | |
492 | bool offset_loaded, u64 *offset, u64 *stat) | |
493 | { | |
494 | u32 new_data; | |
495 | ||
496 | new_data = rd32(hw, reg); | |
497 | if (!offset_loaded) | |
498 | *offset = new_data; | |
499 | if (likely(new_data >= *offset)) | |
500 | *stat = (u32)(new_data - *offset); | |
501 | else | |
502 | *stat = (u32)((new_data + ((u64)1 << 32)) - *offset); | |
503 | } | |
504 | ||
505 | /** | |
506 | * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. | |
507 | * @vsi: the VSI to be updated | |
508 | **/ | |
509 | void i40e_update_eth_stats(struct i40e_vsi *vsi) | |
510 | { | |
511 | int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); | |
512 | struct i40e_pf *pf = vsi->back; | |
513 | struct i40e_hw *hw = &pf->hw; | |
514 | struct i40e_eth_stats *oes; | |
515 | struct i40e_eth_stats *es; /* device's eth stats */ | |
516 | ||
517 | es = &vsi->eth_stats; | |
518 | oes = &vsi->eth_stats_offsets; | |
519 | ||
520 | /* Gather up the stats that the hw collects */ | |
521 | i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), | |
522 | vsi->stat_offsets_loaded, | |
523 | &oes->tx_errors, &es->tx_errors); | |
524 | i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), | |
525 | vsi->stat_offsets_loaded, | |
526 | &oes->rx_discards, &es->rx_discards); | |
527 | ||
528 | i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), | |
529 | I40E_GLV_GORCL(stat_idx), | |
530 | vsi->stat_offsets_loaded, | |
531 | &oes->rx_bytes, &es->rx_bytes); | |
532 | i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), | |
533 | I40E_GLV_UPRCL(stat_idx), | |
534 | vsi->stat_offsets_loaded, | |
535 | &oes->rx_unicast, &es->rx_unicast); | |
536 | i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), | |
537 | I40E_GLV_MPRCL(stat_idx), | |
538 | vsi->stat_offsets_loaded, | |
539 | &oes->rx_multicast, &es->rx_multicast); | |
540 | i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), | |
541 | I40E_GLV_BPRCL(stat_idx), | |
542 | vsi->stat_offsets_loaded, | |
543 | &oes->rx_broadcast, &es->rx_broadcast); | |
544 | ||
545 | i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), | |
546 | I40E_GLV_GOTCL(stat_idx), | |
547 | vsi->stat_offsets_loaded, | |
548 | &oes->tx_bytes, &es->tx_bytes); | |
549 | i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), | |
550 | I40E_GLV_UPTCL(stat_idx), | |
551 | vsi->stat_offsets_loaded, | |
552 | &oes->tx_unicast, &es->tx_unicast); | |
553 | i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), | |
554 | I40E_GLV_MPTCL(stat_idx), | |
555 | vsi->stat_offsets_loaded, | |
556 | &oes->tx_multicast, &es->tx_multicast); | |
557 | i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), | |
558 | I40E_GLV_BPTCL(stat_idx), | |
559 | vsi->stat_offsets_loaded, | |
560 | &oes->tx_broadcast, &es->tx_broadcast); | |
561 | vsi->stat_offsets_loaded = true; | |
562 | } | |
563 | ||
564 | /** | |
565 | * i40e_update_veb_stats - Update Switch component statistics | |
566 | * @veb: the VEB being updated | |
567 | **/ | |
568 | static void i40e_update_veb_stats(struct i40e_veb *veb) | |
569 | { | |
570 | struct i40e_pf *pf = veb->pf; | |
571 | struct i40e_hw *hw = &pf->hw; | |
572 | struct i40e_eth_stats *oes; | |
573 | struct i40e_eth_stats *es; /* device's eth stats */ | |
574 | int idx = 0; | |
575 | ||
576 | idx = veb->stats_idx; | |
577 | es = &veb->stats; | |
578 | oes = &veb->stats_offsets; | |
579 | ||
580 | /* Gather up the stats that the hw collects */ | |
581 | i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), | |
582 | veb->stat_offsets_loaded, | |
583 | &oes->tx_discards, &es->tx_discards); | |
7134f9ce JB |
584 | if (hw->revision_id > 0) |
585 | i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), | |
586 | veb->stat_offsets_loaded, | |
587 | &oes->rx_unknown_protocol, | |
588 | &es->rx_unknown_protocol); | |
41c445ff JB |
589 | i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), |
590 | veb->stat_offsets_loaded, | |
591 | &oes->rx_bytes, &es->rx_bytes); | |
592 | i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), | |
593 | veb->stat_offsets_loaded, | |
594 | &oes->rx_unicast, &es->rx_unicast); | |
595 | i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), | |
596 | veb->stat_offsets_loaded, | |
597 | &oes->rx_multicast, &es->rx_multicast); | |
598 | i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), | |
599 | veb->stat_offsets_loaded, | |
600 | &oes->rx_broadcast, &es->rx_broadcast); | |
601 | ||
602 | i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), | |
603 | veb->stat_offsets_loaded, | |
604 | &oes->tx_bytes, &es->tx_bytes); | |
605 | i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), | |
606 | veb->stat_offsets_loaded, | |
607 | &oes->tx_unicast, &es->tx_unicast); | |
608 | i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), | |
609 | veb->stat_offsets_loaded, | |
610 | &oes->tx_multicast, &es->tx_multicast); | |
611 | i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), | |
612 | veb->stat_offsets_loaded, | |
613 | &oes->tx_broadcast, &es->tx_broadcast); | |
614 | veb->stat_offsets_loaded = true; | |
615 | } | |
616 | ||
617 | /** | |
618 | * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode | |
619 | * @pf: the corresponding PF | |
620 | * | |
621 | * Update the Rx XOFF counter (PAUSE frames) in link flow control mode | |
622 | **/ | |
623 | static void i40e_update_link_xoff_rx(struct i40e_pf *pf) | |
624 | { | |
625 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
626 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
627 | struct i40e_hw *hw = &pf->hw; | |
628 | u64 xoff = 0; | |
629 | u16 i, v; | |
630 | ||
631 | if ((hw->fc.current_mode != I40E_FC_FULL) && | |
632 | (hw->fc.current_mode != I40E_FC_RX_PAUSE)) | |
633 | return; | |
634 | ||
635 | xoff = nsd->link_xoff_rx; | |
636 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), | |
637 | pf->stat_offsets_loaded, | |
638 | &osd->link_xoff_rx, &nsd->link_xoff_rx); | |
639 | ||
640 | /* No new LFC xoff rx */ | |
641 | if (!(nsd->link_xoff_rx - xoff)) | |
642 | return; | |
643 | ||
644 | /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ | |
645 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
646 | struct i40e_vsi *vsi = pf->vsi[v]; | |
647 | ||
648 | if (!vsi) | |
649 | continue; | |
650 | ||
651 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b | 652 | struct i40e_ring *ring = vsi->tx_rings[i]; |
41c445ff JB |
653 | clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); |
654 | } | |
655 | } | |
656 | } | |
657 | ||
658 | /** | |
659 | * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode | |
660 | * @pf: the corresponding PF | |
661 | * | |
662 | * Update the Rx XOFF counter (PAUSE frames) in PFC mode | |
663 | **/ | |
664 | static void i40e_update_prio_xoff_rx(struct i40e_pf *pf) | |
665 | { | |
666 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
667 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
668 | bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false}; | |
669 | struct i40e_dcbx_config *dcb_cfg; | |
670 | struct i40e_hw *hw = &pf->hw; | |
671 | u16 i, v; | |
672 | u8 tc; | |
673 | ||
674 | dcb_cfg = &hw->local_dcbx_config; | |
675 | ||
676 | /* See if DCB enabled with PFC TC */ | |
677 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED) || | |
678 | !(dcb_cfg->pfc.pfcenable)) { | |
679 | i40e_update_link_xoff_rx(pf); | |
680 | return; | |
681 | } | |
682 | ||
683 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
684 | u64 prio_xoff = nsd->priority_xoff_rx[i]; | |
685 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), | |
686 | pf->stat_offsets_loaded, | |
687 | &osd->priority_xoff_rx[i], | |
688 | &nsd->priority_xoff_rx[i]); | |
689 | ||
690 | /* No new PFC xoff rx */ | |
691 | if (!(nsd->priority_xoff_rx[i] - prio_xoff)) | |
692 | continue; | |
693 | /* Get the TC for given priority */ | |
694 | tc = dcb_cfg->etscfg.prioritytable[i]; | |
695 | xoff[tc] = true; | |
696 | } | |
697 | ||
698 | /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ | |
699 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
700 | struct i40e_vsi *vsi = pf->vsi[v]; | |
701 | ||
702 | if (!vsi) | |
703 | continue; | |
704 | ||
705 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b | 706 | struct i40e_ring *ring = vsi->tx_rings[i]; |
41c445ff JB |
707 | |
708 | tc = ring->dcb_tc; | |
709 | if (xoff[tc]) | |
710 | clear_bit(__I40E_HANG_CHECK_ARMED, | |
711 | &ring->state); | |
712 | } | |
713 | } | |
714 | } | |
715 | ||
716 | /** | |
717 | * i40e_update_stats - Update the board statistics counters. | |
718 | * @vsi: the VSI to be updated | |
719 | * | |
720 | * There are a few instances where we store the same stat in a | |
721 | * couple of different structs. This is partly because we have | |
722 | * the netdev stats that need to be filled out, which is slightly | |
723 | * different from the "eth_stats" defined by the chip and used in | |
724 | * VF communications. We sort it all out here in a central place. | |
725 | **/ | |
726 | void i40e_update_stats(struct i40e_vsi *vsi) | |
727 | { | |
728 | struct i40e_pf *pf = vsi->back; | |
729 | struct i40e_hw *hw = &pf->hw; | |
730 | struct rtnl_link_stats64 *ons; | |
731 | struct rtnl_link_stats64 *ns; /* netdev stats */ | |
732 | struct i40e_eth_stats *oes; | |
733 | struct i40e_eth_stats *es; /* device's eth stats */ | |
734 | u32 tx_restart, tx_busy; | |
735 | u32 rx_page, rx_buf; | |
736 | u64 rx_p, rx_b; | |
737 | u64 tx_p, tx_b; | |
738 | int i; | |
739 | u16 q; | |
740 | ||
741 | if (test_bit(__I40E_DOWN, &vsi->state) || | |
742 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
743 | return; | |
744 | ||
745 | ns = i40e_get_vsi_stats_struct(vsi); | |
746 | ons = &vsi->net_stats_offsets; | |
747 | es = &vsi->eth_stats; | |
748 | oes = &vsi->eth_stats_offsets; | |
749 | ||
750 | /* Gather up the netdev and vsi stats that the driver collects | |
751 | * on the fly during packet processing | |
752 | */ | |
753 | rx_b = rx_p = 0; | |
754 | tx_b = tx_p = 0; | |
755 | tx_restart = tx_busy = 0; | |
756 | rx_page = 0; | |
757 | rx_buf = 0; | |
980e9b11 | 758 | rcu_read_lock(); |
41c445ff JB |
759 | for (q = 0; q < vsi->num_queue_pairs; q++) { |
760 | struct i40e_ring *p; | |
980e9b11 AD |
761 | u64 bytes, packets; |
762 | unsigned int start; | |
763 | ||
764 | /* locate Tx ring */ | |
765 | p = ACCESS_ONCE(vsi->tx_rings[q]); | |
766 | ||
767 | do { | |
768 | start = u64_stats_fetch_begin_bh(&p->syncp); | |
769 | packets = p->stats.packets; | |
770 | bytes = p->stats.bytes; | |
771 | } while (u64_stats_fetch_retry_bh(&p->syncp, start)); | |
772 | tx_b += bytes; | |
773 | tx_p += packets; | |
774 | tx_restart += p->tx_stats.restart_queue; | |
775 | tx_busy += p->tx_stats.tx_busy; | |
41c445ff | 776 | |
980e9b11 AD |
777 | /* Rx queue is part of the same block as Tx queue */ |
778 | p = &p[1]; | |
779 | do { | |
780 | start = u64_stats_fetch_begin_bh(&p->syncp); | |
781 | packets = p->stats.packets; | |
782 | bytes = p->stats.bytes; | |
783 | } while (u64_stats_fetch_retry_bh(&p->syncp, start)); | |
784 | rx_b += bytes; | |
785 | rx_p += packets; | |
41c445ff JB |
786 | rx_buf += p->rx_stats.alloc_rx_buff_failed; |
787 | rx_page += p->rx_stats.alloc_rx_page_failed; | |
41c445ff | 788 | } |
980e9b11 | 789 | rcu_read_unlock(); |
41c445ff JB |
790 | vsi->tx_restart = tx_restart; |
791 | vsi->tx_busy = tx_busy; | |
792 | vsi->rx_page_failed = rx_page; | |
793 | vsi->rx_buf_failed = rx_buf; | |
794 | ||
795 | ns->rx_packets = rx_p; | |
796 | ns->rx_bytes = rx_b; | |
797 | ns->tx_packets = tx_p; | |
798 | ns->tx_bytes = tx_b; | |
799 | ||
800 | i40e_update_eth_stats(vsi); | |
801 | /* update netdev stats from eth stats */ | |
802 | ons->rx_errors = oes->rx_errors; | |
803 | ns->rx_errors = es->rx_errors; | |
804 | ons->tx_errors = oes->tx_errors; | |
805 | ns->tx_errors = es->tx_errors; | |
806 | ons->multicast = oes->rx_multicast; | |
807 | ns->multicast = es->rx_multicast; | |
808 | ons->tx_dropped = oes->tx_discards; | |
809 | ns->tx_dropped = es->tx_discards; | |
810 | ||
811 | /* Get the port data only if this is the main PF VSI */ | |
812 | if (vsi == pf->vsi[pf->lan_vsi]) { | |
813 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
814 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
815 | ||
816 | i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), | |
817 | I40E_GLPRT_GORCL(hw->port), | |
818 | pf->stat_offsets_loaded, | |
819 | &osd->eth.rx_bytes, &nsd->eth.rx_bytes); | |
820 | i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), | |
821 | I40E_GLPRT_GOTCL(hw->port), | |
822 | pf->stat_offsets_loaded, | |
823 | &osd->eth.tx_bytes, &nsd->eth.tx_bytes); | |
824 | i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), | |
825 | pf->stat_offsets_loaded, | |
826 | &osd->eth.rx_discards, | |
827 | &nsd->eth.rx_discards); | |
828 | i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port), | |
829 | pf->stat_offsets_loaded, | |
830 | &osd->eth.tx_discards, | |
831 | &nsd->eth.tx_discards); | |
832 | i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), | |
833 | I40E_GLPRT_MPRCL(hw->port), | |
834 | pf->stat_offsets_loaded, | |
835 | &osd->eth.rx_multicast, | |
836 | &nsd->eth.rx_multicast); | |
837 | ||
838 | i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), | |
839 | pf->stat_offsets_loaded, | |
840 | &osd->tx_dropped_link_down, | |
841 | &nsd->tx_dropped_link_down); | |
842 | ||
843 | i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), | |
844 | pf->stat_offsets_loaded, | |
845 | &osd->crc_errors, &nsd->crc_errors); | |
846 | ns->rx_crc_errors = nsd->crc_errors; | |
847 | ||
848 | i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), | |
849 | pf->stat_offsets_loaded, | |
850 | &osd->illegal_bytes, &nsd->illegal_bytes); | |
851 | ns->rx_errors = nsd->crc_errors | |
852 | + nsd->illegal_bytes; | |
853 | ||
854 | i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), | |
855 | pf->stat_offsets_loaded, | |
856 | &osd->mac_local_faults, | |
857 | &nsd->mac_local_faults); | |
858 | i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), | |
859 | pf->stat_offsets_loaded, | |
860 | &osd->mac_remote_faults, | |
861 | &nsd->mac_remote_faults); | |
862 | ||
863 | i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), | |
864 | pf->stat_offsets_loaded, | |
865 | &osd->rx_length_errors, | |
866 | &nsd->rx_length_errors); | |
867 | ns->rx_length_errors = nsd->rx_length_errors; | |
868 | ||
869 | i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), | |
870 | pf->stat_offsets_loaded, | |
871 | &osd->link_xon_rx, &nsd->link_xon_rx); | |
872 | i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), | |
873 | pf->stat_offsets_loaded, | |
874 | &osd->link_xon_tx, &nsd->link_xon_tx); | |
875 | i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ | |
876 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), | |
877 | pf->stat_offsets_loaded, | |
878 | &osd->link_xoff_tx, &nsd->link_xoff_tx); | |
879 | ||
880 | for (i = 0; i < 8; i++) { | |
881 | i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), | |
882 | pf->stat_offsets_loaded, | |
883 | &osd->priority_xon_rx[i], | |
884 | &nsd->priority_xon_rx[i]); | |
885 | i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), | |
886 | pf->stat_offsets_loaded, | |
887 | &osd->priority_xon_tx[i], | |
888 | &nsd->priority_xon_tx[i]); | |
889 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), | |
890 | pf->stat_offsets_loaded, | |
891 | &osd->priority_xoff_tx[i], | |
892 | &nsd->priority_xoff_tx[i]); | |
893 | i40e_stat_update32(hw, | |
894 | I40E_GLPRT_RXON2OFFCNT(hw->port, i), | |
895 | pf->stat_offsets_loaded, | |
896 | &osd->priority_xon_2_xoff[i], | |
897 | &nsd->priority_xon_2_xoff[i]); | |
898 | } | |
899 | ||
900 | i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), | |
901 | I40E_GLPRT_PRC64L(hw->port), | |
902 | pf->stat_offsets_loaded, | |
903 | &osd->rx_size_64, &nsd->rx_size_64); | |
904 | i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), | |
905 | I40E_GLPRT_PRC127L(hw->port), | |
906 | pf->stat_offsets_loaded, | |
907 | &osd->rx_size_127, &nsd->rx_size_127); | |
908 | i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), | |
909 | I40E_GLPRT_PRC255L(hw->port), | |
910 | pf->stat_offsets_loaded, | |
911 | &osd->rx_size_255, &nsd->rx_size_255); | |
912 | i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), | |
913 | I40E_GLPRT_PRC511L(hw->port), | |
914 | pf->stat_offsets_loaded, | |
915 | &osd->rx_size_511, &nsd->rx_size_511); | |
916 | i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), | |
917 | I40E_GLPRT_PRC1023L(hw->port), | |
918 | pf->stat_offsets_loaded, | |
919 | &osd->rx_size_1023, &nsd->rx_size_1023); | |
920 | i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), | |
921 | I40E_GLPRT_PRC1522L(hw->port), | |
922 | pf->stat_offsets_loaded, | |
923 | &osd->rx_size_1522, &nsd->rx_size_1522); | |
924 | i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), | |
925 | I40E_GLPRT_PRC9522L(hw->port), | |
926 | pf->stat_offsets_loaded, | |
927 | &osd->rx_size_big, &nsd->rx_size_big); | |
928 | ||
929 | i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), | |
930 | I40E_GLPRT_PTC64L(hw->port), | |
931 | pf->stat_offsets_loaded, | |
932 | &osd->tx_size_64, &nsd->tx_size_64); | |
933 | i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), | |
934 | I40E_GLPRT_PTC127L(hw->port), | |
935 | pf->stat_offsets_loaded, | |
936 | &osd->tx_size_127, &nsd->tx_size_127); | |
937 | i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), | |
938 | I40E_GLPRT_PTC255L(hw->port), | |
939 | pf->stat_offsets_loaded, | |
940 | &osd->tx_size_255, &nsd->tx_size_255); | |
941 | i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), | |
942 | I40E_GLPRT_PTC511L(hw->port), | |
943 | pf->stat_offsets_loaded, | |
944 | &osd->tx_size_511, &nsd->tx_size_511); | |
945 | i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), | |
946 | I40E_GLPRT_PTC1023L(hw->port), | |
947 | pf->stat_offsets_loaded, | |
948 | &osd->tx_size_1023, &nsd->tx_size_1023); | |
949 | i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), | |
950 | I40E_GLPRT_PTC1522L(hw->port), | |
951 | pf->stat_offsets_loaded, | |
952 | &osd->tx_size_1522, &nsd->tx_size_1522); | |
953 | i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), | |
954 | I40E_GLPRT_PTC9522L(hw->port), | |
955 | pf->stat_offsets_loaded, | |
956 | &osd->tx_size_big, &nsd->tx_size_big); | |
957 | ||
958 | i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), | |
959 | pf->stat_offsets_loaded, | |
960 | &osd->rx_undersize, &nsd->rx_undersize); | |
961 | i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), | |
962 | pf->stat_offsets_loaded, | |
963 | &osd->rx_fragments, &nsd->rx_fragments); | |
964 | i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), | |
965 | pf->stat_offsets_loaded, | |
966 | &osd->rx_oversize, &nsd->rx_oversize); | |
967 | i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), | |
968 | pf->stat_offsets_loaded, | |
969 | &osd->rx_jabber, &nsd->rx_jabber); | |
970 | } | |
971 | ||
972 | pf->stat_offsets_loaded = true; | |
973 | } | |
974 | ||
975 | /** | |
976 | * i40e_find_filter - Search VSI filter list for specific mac/vlan filter | |
977 | * @vsi: the VSI to be searched | |
978 | * @macaddr: the MAC address | |
979 | * @vlan: the vlan | |
980 | * @is_vf: make sure its a vf filter, else doesn't matter | |
981 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
982 | * | |
983 | * Returns ptr to the filter object or NULL | |
984 | **/ | |
985 | static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, | |
986 | u8 *macaddr, s16 vlan, | |
987 | bool is_vf, bool is_netdev) | |
988 | { | |
989 | struct i40e_mac_filter *f; | |
990 | ||
991 | if (!vsi || !macaddr) | |
992 | return NULL; | |
993 | ||
994 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
995 | if ((ether_addr_equal(macaddr, f->macaddr)) && | |
996 | (vlan == f->vlan) && | |
997 | (!is_vf || f->is_vf) && | |
998 | (!is_netdev || f->is_netdev)) | |
999 | return f; | |
1000 | } | |
1001 | return NULL; | |
1002 | } | |
1003 | ||
1004 | /** | |
1005 | * i40e_find_mac - Find a mac addr in the macvlan filters list | |
1006 | * @vsi: the VSI to be searched | |
1007 | * @macaddr: the MAC address we are searching for | |
1008 | * @is_vf: make sure its a vf filter, else doesn't matter | |
1009 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
1010 | * | |
1011 | * Returns the first filter with the provided MAC address or NULL if | |
1012 | * MAC address was not found | |
1013 | **/ | |
1014 | struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, | |
1015 | bool is_vf, bool is_netdev) | |
1016 | { | |
1017 | struct i40e_mac_filter *f; | |
1018 | ||
1019 | if (!vsi || !macaddr) | |
1020 | return NULL; | |
1021 | ||
1022 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1023 | if ((ether_addr_equal(macaddr, f->macaddr)) && | |
1024 | (!is_vf || f->is_vf) && | |
1025 | (!is_netdev || f->is_netdev)) | |
1026 | return f; | |
1027 | } | |
1028 | return NULL; | |
1029 | } | |
1030 | ||
1031 | /** | |
1032 | * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode | |
1033 | * @vsi: the VSI to be searched | |
1034 | * | |
1035 | * Returns true if VSI is in vlan mode or false otherwise | |
1036 | **/ | |
1037 | bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) | |
1038 | { | |
1039 | struct i40e_mac_filter *f; | |
1040 | ||
1041 | /* Only -1 for all the filters denotes not in vlan mode | |
1042 | * so we have to go through all the list in order to make sure | |
1043 | */ | |
1044 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1045 | if (f->vlan >= 0) | |
1046 | return true; | |
1047 | } | |
1048 | ||
1049 | return false; | |
1050 | } | |
1051 | ||
1052 | /** | |
1053 | * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans | |
1054 | * @vsi: the VSI to be searched | |
1055 | * @macaddr: the mac address to be filtered | |
1056 | * @is_vf: true if it is a vf | |
1057 | * @is_netdev: true if it is a netdev | |
1058 | * | |
1059 | * Goes through all the macvlan filters and adds a | |
1060 | * macvlan filter for each unique vlan that already exists | |
1061 | * | |
1062 | * Returns first filter found on success, else NULL | |
1063 | **/ | |
1064 | struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, | |
1065 | bool is_vf, bool is_netdev) | |
1066 | { | |
1067 | struct i40e_mac_filter *f; | |
1068 | ||
1069 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1070 | if (!i40e_find_filter(vsi, macaddr, f->vlan, | |
1071 | is_vf, is_netdev)) { | |
1072 | if (!i40e_add_filter(vsi, macaddr, f->vlan, | |
1073 | is_vf, is_netdev)) | |
1074 | return NULL; | |
1075 | } | |
1076 | } | |
1077 | ||
1078 | return list_first_entry_or_null(&vsi->mac_filter_list, | |
1079 | struct i40e_mac_filter, list); | |
1080 | } | |
1081 | ||
1082 | /** | |
1083 | * i40e_add_filter - Add a mac/vlan filter to the VSI | |
1084 | * @vsi: the VSI to be searched | |
1085 | * @macaddr: the MAC address | |
1086 | * @vlan: the vlan | |
1087 | * @is_vf: make sure its a vf filter, else doesn't matter | |
1088 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
1089 | * | |
1090 | * Returns ptr to the filter object or NULL when no memory available. | |
1091 | **/ | |
1092 | struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, | |
1093 | u8 *macaddr, s16 vlan, | |
1094 | bool is_vf, bool is_netdev) | |
1095 | { | |
1096 | struct i40e_mac_filter *f; | |
1097 | ||
1098 | if (!vsi || !macaddr) | |
1099 | return NULL; | |
1100 | ||
1101 | f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); | |
1102 | if (!f) { | |
1103 | f = kzalloc(sizeof(*f), GFP_ATOMIC); | |
1104 | if (!f) | |
1105 | goto add_filter_out; | |
1106 | ||
1107 | memcpy(f->macaddr, macaddr, ETH_ALEN); | |
1108 | f->vlan = vlan; | |
1109 | f->changed = true; | |
1110 | ||
1111 | INIT_LIST_HEAD(&f->list); | |
1112 | list_add(&f->list, &vsi->mac_filter_list); | |
1113 | } | |
1114 | ||
1115 | /* increment counter and add a new flag if needed */ | |
1116 | if (is_vf) { | |
1117 | if (!f->is_vf) { | |
1118 | f->is_vf = true; | |
1119 | f->counter++; | |
1120 | } | |
1121 | } else if (is_netdev) { | |
1122 | if (!f->is_netdev) { | |
1123 | f->is_netdev = true; | |
1124 | f->counter++; | |
1125 | } | |
1126 | } else { | |
1127 | f->counter++; | |
1128 | } | |
1129 | ||
1130 | /* changed tells sync_filters_subtask to | |
1131 | * push the filter down to the firmware | |
1132 | */ | |
1133 | if (f->changed) { | |
1134 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1135 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1136 | } | |
1137 | ||
1138 | add_filter_out: | |
1139 | return f; | |
1140 | } | |
1141 | ||
1142 | /** | |
1143 | * i40e_del_filter - Remove a mac/vlan filter from the VSI | |
1144 | * @vsi: the VSI to be searched | |
1145 | * @macaddr: the MAC address | |
1146 | * @vlan: the vlan | |
1147 | * @is_vf: make sure it's a vf filter, else doesn't matter | |
1148 | * @is_netdev: make sure it's a netdev filter, else doesn't matter | |
1149 | **/ | |
1150 | void i40e_del_filter(struct i40e_vsi *vsi, | |
1151 | u8 *macaddr, s16 vlan, | |
1152 | bool is_vf, bool is_netdev) | |
1153 | { | |
1154 | struct i40e_mac_filter *f; | |
1155 | ||
1156 | if (!vsi || !macaddr) | |
1157 | return; | |
1158 | ||
1159 | f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); | |
1160 | if (!f || f->counter == 0) | |
1161 | return; | |
1162 | ||
1163 | if (is_vf) { | |
1164 | if (f->is_vf) { | |
1165 | f->is_vf = false; | |
1166 | f->counter--; | |
1167 | } | |
1168 | } else if (is_netdev) { | |
1169 | if (f->is_netdev) { | |
1170 | f->is_netdev = false; | |
1171 | f->counter--; | |
1172 | } | |
1173 | } else { | |
1174 | /* make sure we don't remove a filter in use by vf or netdev */ | |
1175 | int min_f = 0; | |
1176 | min_f += (f->is_vf ? 1 : 0); | |
1177 | min_f += (f->is_netdev ? 1 : 0); | |
1178 | ||
1179 | if (f->counter > min_f) | |
1180 | f->counter--; | |
1181 | } | |
1182 | ||
1183 | /* counter == 0 tells sync_filters_subtask to | |
1184 | * remove the filter from the firmware's list | |
1185 | */ | |
1186 | if (f->counter == 0) { | |
1187 | f->changed = true; | |
1188 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1189 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1190 | } | |
1191 | } | |
1192 | ||
1193 | /** | |
1194 | * i40e_set_mac - NDO callback to set mac address | |
1195 | * @netdev: network interface device structure | |
1196 | * @p: pointer to an address structure | |
1197 | * | |
1198 | * Returns 0 on success, negative on failure | |
1199 | **/ | |
1200 | static int i40e_set_mac(struct net_device *netdev, void *p) | |
1201 | { | |
1202 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1203 | struct i40e_vsi *vsi = np->vsi; | |
1204 | struct sockaddr *addr = p; | |
1205 | struct i40e_mac_filter *f; | |
1206 | ||
1207 | if (!is_valid_ether_addr(addr->sa_data)) | |
1208 | return -EADDRNOTAVAIL; | |
1209 | ||
1210 | netdev_info(netdev, "set mac address=%pM\n", addr->sa_data); | |
1211 | ||
1212 | if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) | |
1213 | return 0; | |
1214 | ||
1215 | if (vsi->type == I40E_VSI_MAIN) { | |
1216 | i40e_status ret; | |
1217 | ret = i40e_aq_mac_address_write(&vsi->back->hw, | |
1218 | I40E_AQC_WRITE_TYPE_LAA_ONLY, | |
1219 | addr->sa_data, NULL); | |
1220 | if (ret) { | |
1221 | netdev_info(netdev, | |
1222 | "Addr change for Main VSI failed: %d\n", | |
1223 | ret); | |
1224 | return -EADDRNOTAVAIL; | |
1225 | } | |
1226 | ||
1227 | memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len); | |
1228 | } | |
1229 | ||
1230 | /* In order to be sure to not drop any packets, add the new address | |
1231 | * then delete the old one. | |
1232 | */ | |
1233 | f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false); | |
1234 | if (!f) | |
1235 | return -ENOMEM; | |
1236 | ||
1237 | i40e_sync_vsi_filters(vsi); | |
1238 | i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false); | |
1239 | i40e_sync_vsi_filters(vsi); | |
1240 | ||
1241 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1242 | ||
1243 | return 0; | |
1244 | } | |
1245 | ||
1246 | /** | |
1247 | * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc | |
1248 | * @vsi: the VSI being setup | |
1249 | * @ctxt: VSI context structure | |
1250 | * @enabled_tc: Enabled TCs bitmap | |
1251 | * @is_add: True if called before Add VSI | |
1252 | * | |
1253 | * Setup VSI queue mapping for enabled traffic classes. | |
1254 | **/ | |
1255 | static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, | |
1256 | struct i40e_vsi_context *ctxt, | |
1257 | u8 enabled_tc, | |
1258 | bool is_add) | |
1259 | { | |
1260 | struct i40e_pf *pf = vsi->back; | |
1261 | u16 sections = 0; | |
1262 | u8 netdev_tc = 0; | |
1263 | u16 numtc = 0; | |
1264 | u16 qcount; | |
1265 | u8 offset; | |
1266 | u16 qmap; | |
1267 | int i; | |
1268 | ||
1269 | sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; | |
1270 | offset = 0; | |
1271 | ||
1272 | if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { | |
1273 | /* Find numtc from enabled TC bitmap */ | |
1274 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
1275 | if (enabled_tc & (1 << i)) /* TC is enabled */ | |
1276 | numtc++; | |
1277 | } | |
1278 | if (!numtc) { | |
1279 | dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); | |
1280 | numtc = 1; | |
1281 | } | |
1282 | } else { | |
1283 | /* At least TC0 is enabled in case of non-DCB case */ | |
1284 | numtc = 1; | |
1285 | } | |
1286 | ||
1287 | vsi->tc_config.numtc = numtc; | |
1288 | vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; | |
1289 | ||
1290 | /* Setup queue offset/count for all TCs for given VSI */ | |
1291 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
1292 | /* See if the given TC is enabled for the given VSI */ | |
1293 | if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */ | |
1294 | int pow, num_qps; | |
1295 | ||
1296 | vsi->tc_config.tc_info[i].qoffset = offset; | |
1297 | switch (vsi->type) { | |
1298 | case I40E_VSI_MAIN: | |
1299 | if (i == 0) | |
1300 | qcount = pf->rss_size; | |
1301 | else | |
1302 | qcount = pf->num_tc_qps; | |
1303 | vsi->tc_config.tc_info[i].qcount = qcount; | |
1304 | break; | |
1305 | case I40E_VSI_FDIR: | |
1306 | case I40E_VSI_SRIOV: | |
1307 | case I40E_VSI_VMDQ2: | |
1308 | default: | |
1309 | qcount = vsi->alloc_queue_pairs; | |
1310 | vsi->tc_config.tc_info[i].qcount = qcount; | |
1311 | WARN_ON(i != 0); | |
1312 | break; | |
1313 | } | |
1314 | ||
1315 | /* find the power-of-2 of the number of queue pairs */ | |
1316 | num_qps = vsi->tc_config.tc_info[i].qcount; | |
1317 | pow = 0; | |
1318 | while (num_qps && | |
1319 | ((1 << pow) < vsi->tc_config.tc_info[i].qcount)) { | |
1320 | pow++; | |
1321 | num_qps >>= 1; | |
1322 | } | |
1323 | ||
1324 | vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; | |
1325 | qmap = | |
1326 | (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | | |
1327 | (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); | |
1328 | ||
1329 | offset += vsi->tc_config.tc_info[i].qcount; | |
1330 | } else { | |
1331 | /* TC is not enabled so set the offset to | |
1332 | * default queue and allocate one queue | |
1333 | * for the given TC. | |
1334 | */ | |
1335 | vsi->tc_config.tc_info[i].qoffset = 0; | |
1336 | vsi->tc_config.tc_info[i].qcount = 1; | |
1337 | vsi->tc_config.tc_info[i].netdev_tc = 0; | |
1338 | ||
1339 | qmap = 0; | |
1340 | } | |
1341 | ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); | |
1342 | } | |
1343 | ||
1344 | /* Set actual Tx/Rx queue pairs */ | |
1345 | vsi->num_queue_pairs = offset; | |
1346 | ||
1347 | /* Scheduler section valid can only be set for ADD VSI */ | |
1348 | if (is_add) { | |
1349 | sections |= I40E_AQ_VSI_PROP_SCHED_VALID; | |
1350 | ||
1351 | ctxt->info.up_enable_bits = enabled_tc; | |
1352 | } | |
1353 | if (vsi->type == I40E_VSI_SRIOV) { | |
1354 | ctxt->info.mapping_flags |= | |
1355 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); | |
1356 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
1357 | ctxt->info.queue_mapping[i] = | |
1358 | cpu_to_le16(vsi->base_queue + i); | |
1359 | } else { | |
1360 | ctxt->info.mapping_flags |= | |
1361 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); | |
1362 | ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); | |
1363 | } | |
1364 | ctxt->info.valid_sections |= cpu_to_le16(sections); | |
1365 | } | |
1366 | ||
1367 | /** | |
1368 | * i40e_set_rx_mode - NDO callback to set the netdev filters | |
1369 | * @netdev: network interface device structure | |
1370 | **/ | |
1371 | static void i40e_set_rx_mode(struct net_device *netdev) | |
1372 | { | |
1373 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1374 | struct i40e_mac_filter *f, *ftmp; | |
1375 | struct i40e_vsi *vsi = np->vsi; | |
1376 | struct netdev_hw_addr *uca; | |
1377 | struct netdev_hw_addr *mca; | |
1378 | struct netdev_hw_addr *ha; | |
1379 | ||
1380 | /* add addr if not already in the filter list */ | |
1381 | netdev_for_each_uc_addr(uca, netdev) { | |
1382 | if (!i40e_find_mac(vsi, uca->addr, false, true)) { | |
1383 | if (i40e_is_vsi_in_vlan(vsi)) | |
1384 | i40e_put_mac_in_vlan(vsi, uca->addr, | |
1385 | false, true); | |
1386 | else | |
1387 | i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, | |
1388 | false, true); | |
1389 | } | |
1390 | } | |
1391 | ||
1392 | netdev_for_each_mc_addr(mca, netdev) { | |
1393 | if (!i40e_find_mac(vsi, mca->addr, false, true)) { | |
1394 | if (i40e_is_vsi_in_vlan(vsi)) | |
1395 | i40e_put_mac_in_vlan(vsi, mca->addr, | |
1396 | false, true); | |
1397 | else | |
1398 | i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, | |
1399 | false, true); | |
1400 | } | |
1401 | } | |
1402 | ||
1403 | /* remove filter if not in netdev list */ | |
1404 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1405 | bool found = false; | |
1406 | ||
1407 | if (!f->is_netdev) | |
1408 | continue; | |
1409 | ||
1410 | if (is_multicast_ether_addr(f->macaddr)) { | |
1411 | netdev_for_each_mc_addr(mca, netdev) { | |
1412 | if (ether_addr_equal(mca->addr, f->macaddr)) { | |
1413 | found = true; | |
1414 | break; | |
1415 | } | |
1416 | } | |
1417 | } else { | |
1418 | netdev_for_each_uc_addr(uca, netdev) { | |
1419 | if (ether_addr_equal(uca->addr, f->macaddr)) { | |
1420 | found = true; | |
1421 | break; | |
1422 | } | |
1423 | } | |
1424 | ||
1425 | for_each_dev_addr(netdev, ha) { | |
1426 | if (ether_addr_equal(ha->addr, f->macaddr)) { | |
1427 | found = true; | |
1428 | break; | |
1429 | } | |
1430 | } | |
1431 | } | |
1432 | if (!found) | |
1433 | i40e_del_filter( | |
1434 | vsi, f->macaddr, I40E_VLAN_ANY, false, true); | |
1435 | } | |
1436 | ||
1437 | /* check for other flag changes */ | |
1438 | if (vsi->current_netdev_flags != vsi->netdev->flags) { | |
1439 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1440 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1441 | } | |
1442 | } | |
1443 | ||
1444 | /** | |
1445 | * i40e_sync_vsi_filters - Update the VSI filter list to the HW | |
1446 | * @vsi: ptr to the VSI | |
1447 | * | |
1448 | * Push any outstanding VSI filter changes through the AdminQ. | |
1449 | * | |
1450 | * Returns 0 or error value | |
1451 | **/ | |
1452 | int i40e_sync_vsi_filters(struct i40e_vsi *vsi) | |
1453 | { | |
1454 | struct i40e_mac_filter *f, *ftmp; | |
1455 | bool promisc_forced_on = false; | |
1456 | bool add_happened = false; | |
1457 | int filter_list_len = 0; | |
1458 | u32 changed_flags = 0; | |
dcae29be | 1459 | i40e_status aq_ret = 0; |
41c445ff JB |
1460 | struct i40e_pf *pf; |
1461 | int num_add = 0; | |
1462 | int num_del = 0; | |
1463 | u16 cmd_flags; | |
1464 | ||
1465 | /* empty array typed pointers, kcalloc later */ | |
1466 | struct i40e_aqc_add_macvlan_element_data *add_list; | |
1467 | struct i40e_aqc_remove_macvlan_element_data *del_list; | |
1468 | ||
1469 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) | |
1470 | usleep_range(1000, 2000); | |
1471 | pf = vsi->back; | |
1472 | ||
1473 | if (vsi->netdev) { | |
1474 | changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; | |
1475 | vsi->current_netdev_flags = vsi->netdev->flags; | |
1476 | } | |
1477 | ||
1478 | if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { | |
1479 | vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; | |
1480 | ||
1481 | filter_list_len = pf->hw.aq.asq_buf_size / | |
1482 | sizeof(struct i40e_aqc_remove_macvlan_element_data); | |
1483 | del_list = kcalloc(filter_list_len, | |
1484 | sizeof(struct i40e_aqc_remove_macvlan_element_data), | |
1485 | GFP_KERNEL); | |
1486 | if (!del_list) | |
1487 | return -ENOMEM; | |
1488 | ||
1489 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1490 | if (!f->changed) | |
1491 | continue; | |
1492 | ||
1493 | if (f->counter != 0) | |
1494 | continue; | |
1495 | f->changed = false; | |
1496 | cmd_flags = 0; | |
1497 | ||
1498 | /* add to delete list */ | |
1499 | memcpy(del_list[num_del].mac_addr, | |
1500 | f->macaddr, ETH_ALEN); | |
1501 | del_list[num_del].vlan_tag = | |
1502 | cpu_to_le16((u16)(f->vlan == | |
1503 | I40E_VLAN_ANY ? 0 : f->vlan)); | |
1504 | ||
1505 | /* vlan0 as wild card to allow packets from all vlans */ | |
1506 | if (f->vlan == I40E_VLAN_ANY || | |
1507 | (vsi->netdev && !(vsi->netdev->features & | |
1508 | NETIF_F_HW_VLAN_CTAG_FILTER))) | |
1509 | cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; | |
1510 | cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; | |
1511 | del_list[num_del].flags = cmd_flags; | |
1512 | num_del++; | |
1513 | ||
1514 | /* unlink from filter list */ | |
1515 | list_del(&f->list); | |
1516 | kfree(f); | |
1517 | ||
1518 | /* flush a full buffer */ | |
1519 | if (num_del == filter_list_len) { | |
dcae29be | 1520 | aq_ret = i40e_aq_remove_macvlan(&pf->hw, |
41c445ff JB |
1521 | vsi->seid, del_list, num_del, |
1522 | NULL); | |
1523 | num_del = 0; | |
1524 | memset(del_list, 0, sizeof(*del_list)); | |
1525 | ||
dcae29be | 1526 | if (aq_ret) |
41c445ff JB |
1527 | dev_info(&pf->pdev->dev, |
1528 | "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", | |
dcae29be | 1529 | aq_ret, |
41c445ff JB |
1530 | pf->hw.aq.asq_last_status); |
1531 | } | |
1532 | } | |
1533 | if (num_del) { | |
dcae29be | 1534 | aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, |
41c445ff JB |
1535 | del_list, num_del, NULL); |
1536 | num_del = 0; | |
1537 | ||
dcae29be | 1538 | if (aq_ret) |
41c445ff JB |
1539 | dev_info(&pf->pdev->dev, |
1540 | "ignoring delete macvlan error, err %d, aq_err %d\n", | |
dcae29be | 1541 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1542 | } |
1543 | ||
1544 | kfree(del_list); | |
1545 | del_list = NULL; | |
1546 | ||
1547 | /* do all the adds now */ | |
1548 | filter_list_len = pf->hw.aq.asq_buf_size / | |
1549 | sizeof(struct i40e_aqc_add_macvlan_element_data), | |
1550 | add_list = kcalloc(filter_list_len, | |
1551 | sizeof(struct i40e_aqc_add_macvlan_element_data), | |
1552 | GFP_KERNEL); | |
1553 | if (!add_list) | |
1554 | return -ENOMEM; | |
1555 | ||
1556 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1557 | if (!f->changed) | |
1558 | continue; | |
1559 | ||
1560 | if (f->counter == 0) | |
1561 | continue; | |
1562 | f->changed = false; | |
1563 | add_happened = true; | |
1564 | cmd_flags = 0; | |
1565 | ||
1566 | /* add to add array */ | |
1567 | memcpy(add_list[num_add].mac_addr, | |
1568 | f->macaddr, ETH_ALEN); | |
1569 | add_list[num_add].vlan_tag = | |
1570 | cpu_to_le16( | |
1571 | (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); | |
1572 | add_list[num_add].queue_number = 0; | |
1573 | ||
1574 | cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; | |
1575 | ||
1576 | /* vlan0 as wild card to allow packets from all vlans */ | |
1577 | if (f->vlan == I40E_VLAN_ANY || (vsi->netdev && | |
1578 | !(vsi->netdev->features & | |
1579 | NETIF_F_HW_VLAN_CTAG_FILTER))) | |
1580 | cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN; | |
1581 | add_list[num_add].flags = cpu_to_le16(cmd_flags); | |
1582 | num_add++; | |
1583 | ||
1584 | /* flush a full buffer */ | |
1585 | if (num_add == filter_list_len) { | |
dcae29be JB |
1586 | aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, |
1587 | add_list, num_add, | |
1588 | NULL); | |
41c445ff JB |
1589 | num_add = 0; |
1590 | ||
dcae29be | 1591 | if (aq_ret) |
41c445ff JB |
1592 | break; |
1593 | memset(add_list, 0, sizeof(*add_list)); | |
1594 | } | |
1595 | } | |
1596 | if (num_add) { | |
dcae29be JB |
1597 | aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, |
1598 | add_list, num_add, NULL); | |
41c445ff JB |
1599 | num_add = 0; |
1600 | } | |
1601 | kfree(add_list); | |
1602 | add_list = NULL; | |
1603 | ||
dcae29be | 1604 | if (add_happened && (!aq_ret)) { |
41c445ff | 1605 | /* do nothing */; |
dcae29be | 1606 | } else if (add_happened && (aq_ret)) { |
41c445ff JB |
1607 | dev_info(&pf->pdev->dev, |
1608 | "add filter failed, err %d, aq_err %d\n", | |
dcae29be | 1609 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1610 | if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && |
1611 | !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1612 | &vsi->state)) { | |
1613 | promisc_forced_on = true; | |
1614 | set_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1615 | &vsi->state); | |
1616 | dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); | |
1617 | } | |
1618 | } | |
1619 | } | |
1620 | ||
1621 | /* check for changes in promiscuous modes */ | |
1622 | if (changed_flags & IFF_ALLMULTI) { | |
1623 | bool cur_multipromisc; | |
1624 | cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); | |
dcae29be JB |
1625 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, |
1626 | vsi->seid, | |
1627 | cur_multipromisc, | |
1628 | NULL); | |
1629 | if (aq_ret) | |
41c445ff JB |
1630 | dev_info(&pf->pdev->dev, |
1631 | "set multi promisc failed, err %d, aq_err %d\n", | |
dcae29be | 1632 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1633 | } |
1634 | if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { | |
1635 | bool cur_promisc; | |
1636 | cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || | |
1637 | test_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1638 | &vsi->state)); | |
dcae29be JB |
1639 | aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, |
1640 | vsi->seid, | |
1641 | cur_promisc, NULL); | |
1642 | if (aq_ret) | |
41c445ff JB |
1643 | dev_info(&pf->pdev->dev, |
1644 | "set uni promisc failed, err %d, aq_err %d\n", | |
dcae29be | 1645 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1646 | } |
1647 | ||
1648 | clear_bit(__I40E_CONFIG_BUSY, &vsi->state); | |
1649 | return 0; | |
1650 | } | |
1651 | ||
1652 | /** | |
1653 | * i40e_sync_filters_subtask - Sync the VSI filter list with HW | |
1654 | * @pf: board private structure | |
1655 | **/ | |
1656 | static void i40e_sync_filters_subtask(struct i40e_pf *pf) | |
1657 | { | |
1658 | int v; | |
1659 | ||
1660 | if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) | |
1661 | return; | |
1662 | pf->flags &= ~I40E_FLAG_FILTER_SYNC; | |
1663 | ||
1664 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
1665 | if (pf->vsi[v] && | |
1666 | (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) | |
1667 | i40e_sync_vsi_filters(pf->vsi[v]); | |
1668 | } | |
1669 | } | |
1670 | ||
1671 | /** | |
1672 | * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit | |
1673 | * @netdev: network interface device structure | |
1674 | * @new_mtu: new value for maximum frame size | |
1675 | * | |
1676 | * Returns 0 on success, negative on failure | |
1677 | **/ | |
1678 | static int i40e_change_mtu(struct net_device *netdev, int new_mtu) | |
1679 | { | |
1680 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1681 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; | |
1682 | struct i40e_vsi *vsi = np->vsi; | |
1683 | ||
1684 | /* MTU < 68 is an error and causes problems on some kernels */ | |
1685 | if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) | |
1686 | return -EINVAL; | |
1687 | ||
1688 | netdev_info(netdev, "changing MTU from %d to %d\n", | |
1689 | netdev->mtu, new_mtu); | |
1690 | netdev->mtu = new_mtu; | |
1691 | if (netif_running(netdev)) | |
1692 | i40e_vsi_reinit_locked(vsi); | |
1693 | ||
1694 | return 0; | |
1695 | } | |
1696 | ||
1697 | /** | |
1698 | * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI | |
1699 | * @vsi: the vsi being adjusted | |
1700 | **/ | |
1701 | void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) | |
1702 | { | |
1703 | struct i40e_vsi_context ctxt; | |
1704 | i40e_status ret; | |
1705 | ||
1706 | if ((vsi->info.valid_sections & | |
1707 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
1708 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) | |
1709 | return; /* already enabled */ | |
1710 | ||
1711 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
1712 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
1713 | I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; | |
1714 | ||
1715 | ctxt.seid = vsi->seid; | |
1716 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
1717 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
1718 | if (ret) { | |
1719 | dev_info(&vsi->back->pdev->dev, | |
1720 | "%s: update vsi failed, aq_err=%d\n", | |
1721 | __func__, vsi->back->hw.aq.asq_last_status); | |
1722 | } | |
1723 | } | |
1724 | ||
1725 | /** | |
1726 | * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI | |
1727 | * @vsi: the vsi being adjusted | |
1728 | **/ | |
1729 | void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) | |
1730 | { | |
1731 | struct i40e_vsi_context ctxt; | |
1732 | i40e_status ret; | |
1733 | ||
1734 | if ((vsi->info.valid_sections & | |
1735 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
1736 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == | |
1737 | I40E_AQ_VSI_PVLAN_EMOD_MASK)) | |
1738 | return; /* already disabled */ | |
1739 | ||
1740 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
1741 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
1742 | I40E_AQ_VSI_PVLAN_EMOD_NOTHING; | |
1743 | ||
1744 | ctxt.seid = vsi->seid; | |
1745 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
1746 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
1747 | if (ret) { | |
1748 | dev_info(&vsi->back->pdev->dev, | |
1749 | "%s: update vsi failed, aq_err=%d\n", | |
1750 | __func__, vsi->back->hw.aq.asq_last_status); | |
1751 | } | |
1752 | } | |
1753 | ||
1754 | /** | |
1755 | * i40e_vlan_rx_register - Setup or shutdown vlan offload | |
1756 | * @netdev: network interface to be adjusted | |
1757 | * @features: netdev features to test if VLAN offload is enabled or not | |
1758 | **/ | |
1759 | static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) | |
1760 | { | |
1761 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1762 | struct i40e_vsi *vsi = np->vsi; | |
1763 | ||
1764 | if (features & NETIF_F_HW_VLAN_CTAG_RX) | |
1765 | i40e_vlan_stripping_enable(vsi); | |
1766 | else | |
1767 | i40e_vlan_stripping_disable(vsi); | |
1768 | } | |
1769 | ||
1770 | /** | |
1771 | * i40e_vsi_add_vlan - Add vsi membership for given vlan | |
1772 | * @vsi: the vsi being configured | |
1773 | * @vid: vlan id to be added (0 = untagged only , -1 = any) | |
1774 | **/ | |
1775 | int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) | |
1776 | { | |
1777 | struct i40e_mac_filter *f, *add_f; | |
1778 | bool is_netdev, is_vf; | |
1779 | int ret; | |
1780 | ||
1781 | is_vf = (vsi->type == I40E_VSI_SRIOV); | |
1782 | is_netdev = !!(vsi->netdev); | |
1783 | ||
1784 | if (is_netdev) { | |
1785 | add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, | |
1786 | is_vf, is_netdev); | |
1787 | if (!add_f) { | |
1788 | dev_info(&vsi->back->pdev->dev, | |
1789 | "Could not add vlan filter %d for %pM\n", | |
1790 | vid, vsi->netdev->dev_addr); | |
1791 | return -ENOMEM; | |
1792 | } | |
1793 | } | |
1794 | ||
1795 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1796 | add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); | |
1797 | if (!add_f) { | |
1798 | dev_info(&vsi->back->pdev->dev, | |
1799 | "Could not add vlan filter %d for %pM\n", | |
1800 | vid, f->macaddr); | |
1801 | return -ENOMEM; | |
1802 | } | |
1803 | } | |
1804 | ||
1805 | ret = i40e_sync_vsi_filters(vsi); | |
1806 | if (ret) { | |
1807 | dev_info(&vsi->back->pdev->dev, | |
1808 | "Could not sync filters for vid %d\n", vid); | |
1809 | return ret; | |
1810 | } | |
1811 | ||
1812 | /* Now if we add a vlan tag, make sure to check if it is the first | |
1813 | * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" | |
1814 | * with 0, so we now accept untagged and specified tagged traffic | |
1815 | * (and not any taged and untagged) | |
1816 | */ | |
1817 | if (vid > 0) { | |
1818 | if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, | |
1819 | I40E_VLAN_ANY, | |
1820 | is_vf, is_netdev)) { | |
1821 | i40e_del_filter(vsi, vsi->netdev->dev_addr, | |
1822 | I40E_VLAN_ANY, is_vf, is_netdev); | |
1823 | add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, | |
1824 | is_vf, is_netdev); | |
1825 | if (!add_f) { | |
1826 | dev_info(&vsi->back->pdev->dev, | |
1827 | "Could not add filter 0 for %pM\n", | |
1828 | vsi->netdev->dev_addr); | |
1829 | return -ENOMEM; | |
1830 | } | |
1831 | } | |
1832 | ||
1833 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1834 | if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1835 | is_vf, is_netdev)) { | |
1836 | i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1837 | is_vf, is_netdev); | |
1838 | add_f = i40e_add_filter(vsi, f->macaddr, | |
1839 | 0, is_vf, is_netdev); | |
1840 | if (!add_f) { | |
1841 | dev_info(&vsi->back->pdev->dev, | |
1842 | "Could not add filter 0 for %pM\n", | |
1843 | f->macaddr); | |
1844 | return -ENOMEM; | |
1845 | } | |
1846 | } | |
1847 | } | |
1848 | ret = i40e_sync_vsi_filters(vsi); | |
1849 | } | |
1850 | ||
1851 | return ret; | |
1852 | } | |
1853 | ||
1854 | /** | |
1855 | * i40e_vsi_kill_vlan - Remove vsi membership for given vlan | |
1856 | * @vsi: the vsi being configured | |
1857 | * @vid: vlan id to be removed (0 = untagged only , -1 = any) | |
078b5876 JB |
1858 | * |
1859 | * Return: 0 on success or negative otherwise | |
41c445ff JB |
1860 | **/ |
1861 | int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) | |
1862 | { | |
1863 | struct net_device *netdev = vsi->netdev; | |
1864 | struct i40e_mac_filter *f, *add_f; | |
1865 | bool is_vf, is_netdev; | |
1866 | int filter_count = 0; | |
1867 | int ret; | |
1868 | ||
1869 | is_vf = (vsi->type == I40E_VSI_SRIOV); | |
1870 | is_netdev = !!(netdev); | |
1871 | ||
1872 | if (is_netdev) | |
1873 | i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); | |
1874 | ||
1875 | list_for_each_entry(f, &vsi->mac_filter_list, list) | |
1876 | i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); | |
1877 | ||
1878 | ret = i40e_sync_vsi_filters(vsi); | |
1879 | if (ret) { | |
1880 | dev_info(&vsi->back->pdev->dev, "Could not sync filters\n"); | |
1881 | return ret; | |
1882 | } | |
1883 | ||
1884 | /* go through all the filters for this VSI and if there is only | |
1885 | * vid == 0 it means there are no other filters, so vid 0 must | |
1886 | * be replaced with -1. This signifies that we should from now | |
1887 | * on accept any traffic (with any tag present, or untagged) | |
1888 | */ | |
1889 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1890 | if (is_netdev) { | |
1891 | if (f->vlan && | |
1892 | ether_addr_equal(netdev->dev_addr, f->macaddr)) | |
1893 | filter_count++; | |
1894 | } | |
1895 | ||
1896 | if (f->vlan) | |
1897 | filter_count++; | |
1898 | } | |
1899 | ||
1900 | if (!filter_count && is_netdev) { | |
1901 | i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); | |
1902 | f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, | |
1903 | is_vf, is_netdev); | |
1904 | if (!f) { | |
1905 | dev_info(&vsi->back->pdev->dev, | |
1906 | "Could not add filter %d for %pM\n", | |
1907 | I40E_VLAN_ANY, netdev->dev_addr); | |
1908 | return -ENOMEM; | |
1909 | } | |
1910 | } | |
1911 | ||
1912 | if (!filter_count) { | |
1913 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1914 | i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); | |
1915 | add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1916 | is_vf, is_netdev); | |
1917 | if (!add_f) { | |
1918 | dev_info(&vsi->back->pdev->dev, | |
1919 | "Could not add filter %d for %pM\n", | |
1920 | I40E_VLAN_ANY, f->macaddr); | |
1921 | return -ENOMEM; | |
1922 | } | |
1923 | } | |
1924 | } | |
1925 | ||
1926 | return i40e_sync_vsi_filters(vsi); | |
1927 | } | |
1928 | ||
1929 | /** | |
1930 | * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload | |
1931 | * @netdev: network interface to be adjusted | |
1932 | * @vid: vlan id to be added | |
078b5876 JB |
1933 | * |
1934 | * net_device_ops implementation for adding vlan ids | |
41c445ff JB |
1935 | **/ |
1936 | static int i40e_vlan_rx_add_vid(struct net_device *netdev, | |
1937 | __always_unused __be16 proto, u16 vid) | |
1938 | { | |
1939 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1940 | struct i40e_vsi *vsi = np->vsi; | |
078b5876 | 1941 | int ret = 0; |
41c445ff JB |
1942 | |
1943 | if (vid > 4095) | |
078b5876 JB |
1944 | return -EINVAL; |
1945 | ||
1946 | netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); | |
41c445ff | 1947 | |
41c445ff JB |
1948 | /* If the network stack called us with vid = 0, we should |
1949 | * indicate to i40e_vsi_add_vlan() that we want to receive | |
1950 | * any traffic (i.e. with any vlan tag, or untagged) | |
1951 | */ | |
1952 | ret = i40e_vsi_add_vlan(vsi, vid ? vid : I40E_VLAN_ANY); | |
1953 | ||
078b5876 JB |
1954 | if (!ret && (vid < VLAN_N_VID)) |
1955 | set_bit(vid, vsi->active_vlans); | |
41c445ff | 1956 | |
078b5876 | 1957 | return ret; |
41c445ff JB |
1958 | } |
1959 | ||
1960 | /** | |
1961 | * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload | |
1962 | * @netdev: network interface to be adjusted | |
1963 | * @vid: vlan id to be removed | |
078b5876 JB |
1964 | * |
1965 | * net_device_ops implementation for adding vlan ids | |
41c445ff JB |
1966 | **/ |
1967 | static int i40e_vlan_rx_kill_vid(struct net_device *netdev, | |
1968 | __always_unused __be16 proto, u16 vid) | |
1969 | { | |
1970 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1971 | struct i40e_vsi *vsi = np->vsi; | |
1972 | ||
078b5876 JB |
1973 | netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); |
1974 | ||
41c445ff JB |
1975 | /* return code is ignored as there is nothing a user |
1976 | * can do about failure to remove and a log message was | |
078b5876 | 1977 | * already printed from the other function |
41c445ff JB |
1978 | */ |
1979 | i40e_vsi_kill_vlan(vsi, vid); | |
1980 | ||
1981 | clear_bit(vid, vsi->active_vlans); | |
078b5876 | 1982 | |
41c445ff JB |
1983 | return 0; |
1984 | } | |
1985 | ||
1986 | /** | |
1987 | * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up | |
1988 | * @vsi: the vsi being brought back up | |
1989 | **/ | |
1990 | static void i40e_restore_vlan(struct i40e_vsi *vsi) | |
1991 | { | |
1992 | u16 vid; | |
1993 | ||
1994 | if (!vsi->netdev) | |
1995 | return; | |
1996 | ||
1997 | i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); | |
1998 | ||
1999 | for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) | |
2000 | i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), | |
2001 | vid); | |
2002 | } | |
2003 | ||
2004 | /** | |
2005 | * i40e_vsi_add_pvid - Add pvid for the VSI | |
2006 | * @vsi: the vsi being adjusted | |
2007 | * @vid: the vlan id to set as a PVID | |
2008 | **/ | |
dcae29be | 2009 | int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) |
41c445ff JB |
2010 | { |
2011 | struct i40e_vsi_context ctxt; | |
dcae29be | 2012 | i40e_status aq_ret; |
41c445ff JB |
2013 | |
2014 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
2015 | vsi->info.pvid = cpu_to_le16(vid); | |
2016 | vsi->info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_INSERT_PVID; | |
2017 | vsi->info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_UNTAGGED; | |
2018 | ||
2019 | ctxt.seid = vsi->seid; | |
2020 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
dcae29be JB |
2021 | aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
2022 | if (aq_ret) { | |
41c445ff JB |
2023 | dev_info(&vsi->back->pdev->dev, |
2024 | "%s: update vsi failed, aq_err=%d\n", | |
2025 | __func__, vsi->back->hw.aq.asq_last_status); | |
dcae29be | 2026 | return -ENOENT; |
41c445ff JB |
2027 | } |
2028 | ||
dcae29be | 2029 | return 0; |
41c445ff JB |
2030 | } |
2031 | ||
2032 | /** | |
2033 | * i40e_vsi_remove_pvid - Remove the pvid from the VSI | |
2034 | * @vsi: the vsi being adjusted | |
2035 | * | |
2036 | * Just use the vlan_rx_register() service to put it back to normal | |
2037 | **/ | |
2038 | void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) | |
2039 | { | |
2040 | vsi->info.pvid = 0; | |
2041 | i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); | |
2042 | } | |
2043 | ||
2044 | /** | |
2045 | * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources | |
2046 | * @vsi: ptr to the VSI | |
2047 | * | |
2048 | * If this function returns with an error, then it's possible one or | |
2049 | * more of the rings is populated (while the rest are not). It is the | |
2050 | * callers duty to clean those orphaned rings. | |
2051 | * | |
2052 | * Return 0 on success, negative on failure | |
2053 | **/ | |
2054 | static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) | |
2055 | { | |
2056 | int i, err = 0; | |
2057 | ||
2058 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2059 | err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); |
41c445ff JB |
2060 | |
2061 | return err; | |
2062 | } | |
2063 | ||
2064 | /** | |
2065 | * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues | |
2066 | * @vsi: ptr to the VSI | |
2067 | * | |
2068 | * Free VSI's transmit software resources | |
2069 | **/ | |
2070 | static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) | |
2071 | { | |
2072 | int i; | |
2073 | ||
2074 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
9f65e15b AD |
2075 | if (vsi->tx_rings[i]->desc) |
2076 | i40e_free_tx_resources(vsi->tx_rings[i]); | |
41c445ff JB |
2077 | } |
2078 | ||
2079 | /** | |
2080 | * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources | |
2081 | * @vsi: ptr to the VSI | |
2082 | * | |
2083 | * If this function returns with an error, then it's possible one or | |
2084 | * more of the rings is populated (while the rest are not). It is the | |
2085 | * callers duty to clean those orphaned rings. | |
2086 | * | |
2087 | * Return 0 on success, negative on failure | |
2088 | **/ | |
2089 | static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) | |
2090 | { | |
2091 | int i, err = 0; | |
2092 | ||
2093 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2094 | err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); |
41c445ff JB |
2095 | return err; |
2096 | } | |
2097 | ||
2098 | /** | |
2099 | * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues | |
2100 | * @vsi: ptr to the VSI | |
2101 | * | |
2102 | * Free all receive software resources | |
2103 | **/ | |
2104 | static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) | |
2105 | { | |
2106 | int i; | |
2107 | ||
2108 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
9f65e15b AD |
2109 | if (vsi->rx_rings[i]->desc) |
2110 | i40e_free_rx_resources(vsi->rx_rings[i]); | |
41c445ff JB |
2111 | } |
2112 | ||
2113 | /** | |
2114 | * i40e_configure_tx_ring - Configure a transmit ring context and rest | |
2115 | * @ring: The Tx ring to configure | |
2116 | * | |
2117 | * Configure the Tx descriptor ring in the HMC context. | |
2118 | **/ | |
2119 | static int i40e_configure_tx_ring(struct i40e_ring *ring) | |
2120 | { | |
2121 | struct i40e_vsi *vsi = ring->vsi; | |
2122 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2123 | struct i40e_hw *hw = &vsi->back->hw; | |
2124 | struct i40e_hmc_obj_txq tx_ctx; | |
2125 | i40e_status err = 0; | |
2126 | u32 qtx_ctl = 0; | |
2127 | ||
2128 | /* some ATR related tx ring init */ | |
2129 | if (vsi->back->flags & I40E_FLAG_FDIR_ATR_ENABLED) { | |
2130 | ring->atr_sample_rate = vsi->back->atr_sample_rate; | |
2131 | ring->atr_count = 0; | |
2132 | } else { | |
2133 | ring->atr_sample_rate = 0; | |
2134 | } | |
2135 | ||
2136 | /* initialize XPS */ | |
2137 | if (ring->q_vector && ring->netdev && | |
2138 | !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) | |
2139 | netif_set_xps_queue(ring->netdev, | |
2140 | &ring->q_vector->affinity_mask, | |
2141 | ring->queue_index); | |
2142 | ||
2143 | /* clear the context structure first */ | |
2144 | memset(&tx_ctx, 0, sizeof(tx_ctx)); | |
2145 | ||
2146 | tx_ctx.new_context = 1; | |
2147 | tx_ctx.base = (ring->dma / 128); | |
2148 | tx_ctx.qlen = ring->count; | |
2149 | tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FDIR_ENABLED | | |
2150 | I40E_FLAG_FDIR_ATR_ENABLED)); | |
2151 | ||
2152 | /* As part of VSI creation/update, FW allocates certain | |
2153 | * Tx arbitration queue sets for each TC enabled for | |
2154 | * the VSI. The FW returns the handles to these queue | |
2155 | * sets as part of the response buffer to Add VSI, | |
2156 | * Update VSI, etc. AQ commands. It is expected that | |
2157 | * these queue set handles be associated with the Tx | |
2158 | * queues by the driver as part of the TX queue context | |
2159 | * initialization. This has to be done regardless of | |
2160 | * DCB as by default everything is mapped to TC0. | |
2161 | */ | |
2162 | tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); | |
2163 | tx_ctx.rdylist_act = 0; | |
2164 | ||
2165 | /* clear the context in the HMC */ | |
2166 | err = i40e_clear_lan_tx_queue_context(hw, pf_q); | |
2167 | if (err) { | |
2168 | dev_info(&vsi->back->pdev->dev, | |
2169 | "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", | |
2170 | ring->queue_index, pf_q, err); | |
2171 | return -ENOMEM; | |
2172 | } | |
2173 | ||
2174 | /* set the context in the HMC */ | |
2175 | err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); | |
2176 | if (err) { | |
2177 | dev_info(&vsi->back->pdev->dev, | |
2178 | "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", | |
2179 | ring->queue_index, pf_q, err); | |
2180 | return -ENOMEM; | |
2181 | } | |
2182 | ||
2183 | /* Now associate this queue with this PCI function */ | |
2184 | qtx_ctl = I40E_QTX_CTL_PF_QUEUE; | |
13fd9774 SN |
2185 | qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & |
2186 | I40E_QTX_CTL_PF_INDX_MASK); | |
41c445ff JB |
2187 | wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); |
2188 | i40e_flush(hw); | |
2189 | ||
2190 | clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); | |
2191 | ||
2192 | /* cache tail off for easier writes later */ | |
2193 | ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); | |
2194 | ||
2195 | return 0; | |
2196 | } | |
2197 | ||
2198 | /** | |
2199 | * i40e_configure_rx_ring - Configure a receive ring context | |
2200 | * @ring: The Rx ring to configure | |
2201 | * | |
2202 | * Configure the Rx descriptor ring in the HMC context. | |
2203 | **/ | |
2204 | static int i40e_configure_rx_ring(struct i40e_ring *ring) | |
2205 | { | |
2206 | struct i40e_vsi *vsi = ring->vsi; | |
2207 | u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; | |
2208 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2209 | struct i40e_hw *hw = &vsi->back->hw; | |
2210 | struct i40e_hmc_obj_rxq rx_ctx; | |
2211 | i40e_status err = 0; | |
2212 | ||
2213 | ring->state = 0; | |
2214 | ||
2215 | /* clear the context structure first */ | |
2216 | memset(&rx_ctx, 0, sizeof(rx_ctx)); | |
2217 | ||
2218 | ring->rx_buf_len = vsi->rx_buf_len; | |
2219 | ring->rx_hdr_len = vsi->rx_hdr_len; | |
2220 | ||
2221 | rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; | |
2222 | rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT; | |
2223 | ||
2224 | rx_ctx.base = (ring->dma / 128); | |
2225 | rx_ctx.qlen = ring->count; | |
2226 | ||
2227 | if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) { | |
2228 | set_ring_16byte_desc_enabled(ring); | |
2229 | rx_ctx.dsize = 0; | |
2230 | } else { | |
2231 | rx_ctx.dsize = 1; | |
2232 | } | |
2233 | ||
2234 | rx_ctx.dtype = vsi->dtype; | |
2235 | if (vsi->dtype) { | |
2236 | set_ring_ps_enabled(ring); | |
2237 | rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | | |
2238 | I40E_RX_SPLIT_IP | | |
2239 | I40E_RX_SPLIT_TCP_UDP | | |
2240 | I40E_RX_SPLIT_SCTP; | |
2241 | } else { | |
2242 | rx_ctx.hsplit_0 = 0; | |
2243 | } | |
2244 | ||
2245 | rx_ctx.rxmax = min_t(u16, vsi->max_frame, | |
2246 | (chain_len * ring->rx_buf_len)); | |
2247 | rx_ctx.tphrdesc_ena = 1; | |
2248 | rx_ctx.tphwdesc_ena = 1; | |
2249 | rx_ctx.tphdata_ena = 1; | |
2250 | rx_ctx.tphhead_ena = 1; | |
7134f9ce JB |
2251 | if (hw->revision_id == 0) |
2252 | rx_ctx.lrxqthresh = 0; | |
2253 | else | |
2254 | rx_ctx.lrxqthresh = 2; | |
41c445ff JB |
2255 | rx_ctx.crcstrip = 1; |
2256 | rx_ctx.l2tsel = 1; | |
2257 | rx_ctx.showiv = 1; | |
2258 | ||
2259 | /* clear the context in the HMC */ | |
2260 | err = i40e_clear_lan_rx_queue_context(hw, pf_q); | |
2261 | if (err) { | |
2262 | dev_info(&vsi->back->pdev->dev, | |
2263 | "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
2264 | ring->queue_index, pf_q, err); | |
2265 | return -ENOMEM; | |
2266 | } | |
2267 | ||
2268 | /* set the context in the HMC */ | |
2269 | err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); | |
2270 | if (err) { | |
2271 | dev_info(&vsi->back->pdev->dev, | |
2272 | "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
2273 | ring->queue_index, pf_q, err); | |
2274 | return -ENOMEM; | |
2275 | } | |
2276 | ||
2277 | /* cache tail for quicker writes, and clear the reg before use */ | |
2278 | ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); | |
2279 | writel(0, ring->tail); | |
2280 | ||
2281 | i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); | |
2282 | ||
2283 | return 0; | |
2284 | } | |
2285 | ||
2286 | /** | |
2287 | * i40e_vsi_configure_tx - Configure the VSI for Tx | |
2288 | * @vsi: VSI structure describing this set of rings and resources | |
2289 | * | |
2290 | * Configure the Tx VSI for operation. | |
2291 | **/ | |
2292 | static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) | |
2293 | { | |
2294 | int err = 0; | |
2295 | u16 i; | |
2296 | ||
9f65e15b AD |
2297 | for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) |
2298 | err = i40e_configure_tx_ring(vsi->tx_rings[i]); | |
41c445ff JB |
2299 | |
2300 | return err; | |
2301 | } | |
2302 | ||
2303 | /** | |
2304 | * i40e_vsi_configure_rx - Configure the VSI for Rx | |
2305 | * @vsi: the VSI being configured | |
2306 | * | |
2307 | * Configure the Rx VSI for operation. | |
2308 | **/ | |
2309 | static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) | |
2310 | { | |
2311 | int err = 0; | |
2312 | u16 i; | |
2313 | ||
2314 | if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) | |
2315 | vsi->max_frame = vsi->netdev->mtu + ETH_HLEN | |
2316 | + ETH_FCS_LEN + VLAN_HLEN; | |
2317 | else | |
2318 | vsi->max_frame = I40E_RXBUFFER_2048; | |
2319 | ||
2320 | /* figure out correct receive buffer length */ | |
2321 | switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED | | |
2322 | I40E_FLAG_RX_PS_ENABLED)) { | |
2323 | case I40E_FLAG_RX_1BUF_ENABLED: | |
2324 | vsi->rx_hdr_len = 0; | |
2325 | vsi->rx_buf_len = vsi->max_frame; | |
2326 | vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; | |
2327 | break; | |
2328 | case I40E_FLAG_RX_PS_ENABLED: | |
2329 | vsi->rx_hdr_len = I40E_RX_HDR_SIZE; | |
2330 | vsi->rx_buf_len = I40E_RXBUFFER_2048; | |
2331 | vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT; | |
2332 | break; | |
2333 | default: | |
2334 | vsi->rx_hdr_len = I40E_RX_HDR_SIZE; | |
2335 | vsi->rx_buf_len = I40E_RXBUFFER_2048; | |
2336 | vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS; | |
2337 | break; | |
2338 | } | |
2339 | ||
2340 | /* round up for the chip's needs */ | |
2341 | vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len, | |
2342 | (1 << I40E_RXQ_CTX_HBUFF_SHIFT)); | |
2343 | vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, | |
2344 | (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); | |
2345 | ||
2346 | /* set up individual rings */ | |
2347 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2348 | err = i40e_configure_rx_ring(vsi->rx_rings[i]); |
41c445ff JB |
2349 | |
2350 | return err; | |
2351 | } | |
2352 | ||
2353 | /** | |
2354 | * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC | |
2355 | * @vsi: ptr to the VSI | |
2356 | **/ | |
2357 | static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) | |
2358 | { | |
2359 | u16 qoffset, qcount; | |
2360 | int i, n; | |
2361 | ||
2362 | if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) | |
2363 | return; | |
2364 | ||
2365 | for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { | |
2366 | if (!(vsi->tc_config.enabled_tc & (1 << n))) | |
2367 | continue; | |
2368 | ||
2369 | qoffset = vsi->tc_config.tc_info[n].qoffset; | |
2370 | qcount = vsi->tc_config.tc_info[n].qcount; | |
2371 | for (i = qoffset; i < (qoffset + qcount); i++) { | |
9f65e15b AD |
2372 | struct i40e_ring *rx_ring = vsi->rx_rings[i]; |
2373 | struct i40e_ring *tx_ring = vsi->tx_rings[i]; | |
41c445ff JB |
2374 | rx_ring->dcb_tc = n; |
2375 | tx_ring->dcb_tc = n; | |
2376 | } | |
2377 | } | |
2378 | } | |
2379 | ||
2380 | /** | |
2381 | * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI | |
2382 | * @vsi: ptr to the VSI | |
2383 | **/ | |
2384 | static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) | |
2385 | { | |
2386 | if (vsi->netdev) | |
2387 | i40e_set_rx_mode(vsi->netdev); | |
2388 | } | |
2389 | ||
2390 | /** | |
2391 | * i40e_vsi_configure - Set up the VSI for action | |
2392 | * @vsi: the VSI being configured | |
2393 | **/ | |
2394 | static int i40e_vsi_configure(struct i40e_vsi *vsi) | |
2395 | { | |
2396 | int err; | |
2397 | ||
2398 | i40e_set_vsi_rx_mode(vsi); | |
2399 | i40e_restore_vlan(vsi); | |
2400 | i40e_vsi_config_dcb_rings(vsi); | |
2401 | err = i40e_vsi_configure_tx(vsi); | |
2402 | if (!err) | |
2403 | err = i40e_vsi_configure_rx(vsi); | |
2404 | ||
2405 | return err; | |
2406 | } | |
2407 | ||
2408 | /** | |
2409 | * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW | |
2410 | * @vsi: the VSI being configured | |
2411 | **/ | |
2412 | static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) | |
2413 | { | |
2414 | struct i40e_pf *pf = vsi->back; | |
2415 | struct i40e_q_vector *q_vector; | |
2416 | struct i40e_hw *hw = &pf->hw; | |
2417 | u16 vector; | |
2418 | int i, q; | |
2419 | u32 val; | |
2420 | u32 qp; | |
2421 | ||
2422 | /* The interrupt indexing is offset by 1 in the PFINT_ITRn | |
2423 | * and PFINT_LNKLSTn registers, e.g.: | |
2424 | * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) | |
2425 | */ | |
2426 | qp = vsi->base_queue; | |
2427 | vector = vsi->base_vector; | |
493fb300 AD |
2428 | for (i = 0; i < vsi->num_q_vectors; i++, vector++) { |
2429 | q_vector = vsi->q_vectors[i]; | |
41c445ff JB |
2430 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); |
2431 | q_vector->rx.latency_range = I40E_LOW_LATENCY; | |
2432 | wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), | |
2433 | q_vector->rx.itr); | |
2434 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); | |
2435 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
2436 | wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), | |
2437 | q_vector->tx.itr); | |
2438 | ||
2439 | /* Linked list for the queuepairs assigned to this vector */ | |
2440 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); | |
2441 | for (q = 0; q < q_vector->num_ringpairs; q++) { | |
2442 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
2443 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
2444 | (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | | |
2445 | (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| | |
2446 | (I40E_QUEUE_TYPE_TX | |
2447 | << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); | |
2448 | ||
2449 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
2450 | ||
2451 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
2452 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
2453 | (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | | |
2454 | ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| | |
2455 | (I40E_QUEUE_TYPE_RX | |
2456 | << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
2457 | ||
2458 | /* Terminate the linked list */ | |
2459 | if (q == (q_vector->num_ringpairs - 1)) | |
2460 | val |= (I40E_QUEUE_END_OF_LIST | |
2461 | << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
2462 | ||
2463 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
2464 | qp++; | |
2465 | } | |
2466 | } | |
2467 | ||
2468 | i40e_flush(hw); | |
2469 | } | |
2470 | ||
2471 | /** | |
2472 | * i40e_enable_misc_int_causes - enable the non-queue interrupts | |
2473 | * @hw: ptr to the hardware info | |
2474 | **/ | |
2475 | static void i40e_enable_misc_int_causes(struct i40e_hw *hw) | |
2476 | { | |
2477 | u32 val; | |
2478 | ||
2479 | /* clear things first */ | |
2480 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ | |
2481 | rd32(hw, I40E_PFINT_ICR0); /* read to clear */ | |
2482 | ||
2483 | val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | | |
2484 | I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | | |
2485 | I40E_PFINT_ICR0_ENA_GRST_MASK | | |
2486 | I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | | |
2487 | I40E_PFINT_ICR0_ENA_GPIO_MASK | | |
2488 | I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK | | |
2489 | I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | | |
2490 | I40E_PFINT_ICR0_ENA_VFLR_MASK | | |
2491 | I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
2492 | ||
2493 | wr32(hw, I40E_PFINT_ICR0_ENA, val); | |
2494 | ||
2495 | /* SW_ITR_IDX = 0, but don't change INTENA */ | |
84ed40e7 ASJ |
2496 | wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | |
2497 | I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); | |
41c445ff JB |
2498 | |
2499 | /* OTHER_ITR_IDX = 0 */ | |
2500 | wr32(hw, I40E_PFINT_STAT_CTL0, 0); | |
2501 | } | |
2502 | ||
2503 | /** | |
2504 | * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW | |
2505 | * @vsi: the VSI being configured | |
2506 | **/ | |
2507 | static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) | |
2508 | { | |
493fb300 | 2509 | struct i40e_q_vector *q_vector = vsi->q_vectors[0]; |
41c445ff JB |
2510 | struct i40e_pf *pf = vsi->back; |
2511 | struct i40e_hw *hw = &pf->hw; | |
2512 | u32 val; | |
2513 | ||
2514 | /* set the ITR configuration */ | |
2515 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); | |
2516 | q_vector->rx.latency_range = I40E_LOW_LATENCY; | |
2517 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); | |
2518 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); | |
2519 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
2520 | wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); | |
2521 | ||
2522 | i40e_enable_misc_int_causes(hw); | |
2523 | ||
2524 | /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ | |
2525 | wr32(hw, I40E_PFINT_LNKLST0, 0); | |
2526 | ||
2527 | /* Associate the queue pair to the vector and enable the q int */ | |
2528 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
2529 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
2530 | (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
2531 | ||
2532 | wr32(hw, I40E_QINT_RQCTL(0), val); | |
2533 | ||
2534 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
2535 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
2536 | (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
2537 | ||
2538 | wr32(hw, I40E_QINT_TQCTL(0), val); | |
2539 | i40e_flush(hw); | |
2540 | } | |
2541 | ||
2542 | /** | |
2543 | * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 | |
2544 | * @pf: board private structure | |
2545 | **/ | |
116a57d4 | 2546 | void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) |
41c445ff JB |
2547 | { |
2548 | struct i40e_hw *hw = &pf->hw; | |
2549 | u32 val; | |
2550 | ||
2551 | val = I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
2552 | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | | |
2553 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); | |
2554 | ||
2555 | wr32(hw, I40E_PFINT_DYN_CTL0, val); | |
2556 | i40e_flush(hw); | |
2557 | } | |
2558 | ||
2559 | /** | |
2560 | * i40e_irq_dynamic_enable - Enable default interrupt generation settings | |
2561 | * @vsi: pointer to a vsi | |
2562 | * @vector: enable a particular Hw Interrupt vector | |
2563 | **/ | |
2564 | void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) | |
2565 | { | |
2566 | struct i40e_pf *pf = vsi->back; | |
2567 | struct i40e_hw *hw = &pf->hw; | |
2568 | u32 val; | |
2569 | ||
2570 | val = I40E_PFINT_DYN_CTLN_INTENA_MASK | | |
2571 | I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | | |
2572 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); | |
2573 | wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); | |
1022cb6c | 2574 | /* skip the flush */ |
41c445ff JB |
2575 | } |
2576 | ||
2577 | /** | |
2578 | * i40e_msix_clean_rings - MSIX mode Interrupt Handler | |
2579 | * @irq: interrupt number | |
2580 | * @data: pointer to a q_vector | |
2581 | **/ | |
2582 | static irqreturn_t i40e_msix_clean_rings(int irq, void *data) | |
2583 | { | |
2584 | struct i40e_q_vector *q_vector = data; | |
2585 | ||
cd0b6fa6 | 2586 | if (!q_vector->tx.ring && !q_vector->rx.ring) |
41c445ff JB |
2587 | return IRQ_HANDLED; |
2588 | ||
2589 | napi_schedule(&q_vector->napi); | |
2590 | ||
2591 | return IRQ_HANDLED; | |
2592 | } | |
2593 | ||
2594 | /** | |
2595 | * i40e_fdir_clean_rings - Interrupt Handler for FDIR rings | |
2596 | * @irq: interrupt number | |
2597 | * @data: pointer to a q_vector | |
2598 | **/ | |
2599 | static irqreturn_t i40e_fdir_clean_rings(int irq, void *data) | |
2600 | { | |
2601 | struct i40e_q_vector *q_vector = data; | |
2602 | ||
cd0b6fa6 | 2603 | if (!q_vector->tx.ring && !q_vector->rx.ring) |
41c445ff JB |
2604 | return IRQ_HANDLED; |
2605 | ||
2606 | pr_info("fdir ring cleaning needed\n"); | |
2607 | ||
2608 | return IRQ_HANDLED; | |
2609 | } | |
2610 | ||
2611 | /** | |
2612 | * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts | |
2613 | * @vsi: the VSI being configured | |
2614 | * @basename: name for the vector | |
2615 | * | |
2616 | * Allocates MSI-X vectors and requests interrupts from the kernel. | |
2617 | **/ | |
2618 | static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) | |
2619 | { | |
2620 | int q_vectors = vsi->num_q_vectors; | |
2621 | struct i40e_pf *pf = vsi->back; | |
2622 | int base = vsi->base_vector; | |
2623 | int rx_int_idx = 0; | |
2624 | int tx_int_idx = 0; | |
2625 | int vector, err; | |
2626 | ||
2627 | for (vector = 0; vector < q_vectors; vector++) { | |
493fb300 | 2628 | struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; |
41c445ff | 2629 | |
cd0b6fa6 | 2630 | if (q_vector->tx.ring && q_vector->rx.ring) { |
41c445ff JB |
2631 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
2632 | "%s-%s-%d", basename, "TxRx", rx_int_idx++); | |
2633 | tx_int_idx++; | |
cd0b6fa6 | 2634 | } else if (q_vector->rx.ring) { |
41c445ff JB |
2635 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
2636 | "%s-%s-%d", basename, "rx", rx_int_idx++); | |
cd0b6fa6 | 2637 | } else if (q_vector->tx.ring) { |
41c445ff JB |
2638 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
2639 | "%s-%s-%d", basename, "tx", tx_int_idx++); | |
2640 | } else { | |
2641 | /* skip this unused q_vector */ | |
2642 | continue; | |
2643 | } | |
2644 | err = request_irq(pf->msix_entries[base + vector].vector, | |
2645 | vsi->irq_handler, | |
2646 | 0, | |
2647 | q_vector->name, | |
2648 | q_vector); | |
2649 | if (err) { | |
2650 | dev_info(&pf->pdev->dev, | |
2651 | "%s: request_irq failed, error: %d\n", | |
2652 | __func__, err); | |
2653 | goto free_queue_irqs; | |
2654 | } | |
2655 | /* assign the mask for this irq */ | |
2656 | irq_set_affinity_hint(pf->msix_entries[base + vector].vector, | |
2657 | &q_vector->affinity_mask); | |
2658 | } | |
2659 | ||
2660 | return 0; | |
2661 | ||
2662 | free_queue_irqs: | |
2663 | while (vector) { | |
2664 | vector--; | |
2665 | irq_set_affinity_hint(pf->msix_entries[base + vector].vector, | |
2666 | NULL); | |
2667 | free_irq(pf->msix_entries[base + vector].vector, | |
2668 | &(vsi->q_vectors[vector])); | |
2669 | } | |
2670 | return err; | |
2671 | } | |
2672 | ||
2673 | /** | |
2674 | * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI | |
2675 | * @vsi: the VSI being un-configured | |
2676 | **/ | |
2677 | static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) | |
2678 | { | |
2679 | struct i40e_pf *pf = vsi->back; | |
2680 | struct i40e_hw *hw = &pf->hw; | |
2681 | int base = vsi->base_vector; | |
2682 | int i; | |
2683 | ||
2684 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
2685 | wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); |
2686 | wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); | |
41c445ff JB |
2687 | } |
2688 | ||
2689 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2690 | for (i = vsi->base_vector; | |
2691 | i < (vsi->num_q_vectors + vsi->base_vector); i++) | |
2692 | wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); | |
2693 | ||
2694 | i40e_flush(hw); | |
2695 | for (i = 0; i < vsi->num_q_vectors; i++) | |
2696 | synchronize_irq(pf->msix_entries[i + base].vector); | |
2697 | } else { | |
2698 | /* Legacy and MSI mode - this stops all interrupt handling */ | |
2699 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); | |
2700 | wr32(hw, I40E_PFINT_DYN_CTL0, 0); | |
2701 | i40e_flush(hw); | |
2702 | synchronize_irq(pf->pdev->irq); | |
2703 | } | |
2704 | } | |
2705 | ||
2706 | /** | |
2707 | * i40e_vsi_enable_irq - Enable IRQ for the given VSI | |
2708 | * @vsi: the VSI being configured | |
2709 | **/ | |
2710 | static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) | |
2711 | { | |
2712 | struct i40e_pf *pf = vsi->back; | |
2713 | int i; | |
2714 | ||
2715 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2716 | for (i = vsi->base_vector; | |
2717 | i < (vsi->num_q_vectors + vsi->base_vector); i++) | |
2718 | i40e_irq_dynamic_enable(vsi, i); | |
2719 | } else { | |
2720 | i40e_irq_dynamic_enable_icr0(pf); | |
2721 | } | |
2722 | ||
1022cb6c | 2723 | i40e_flush(&pf->hw); |
41c445ff JB |
2724 | return 0; |
2725 | } | |
2726 | ||
2727 | /** | |
2728 | * i40e_stop_misc_vector - Stop the vector that handles non-queue events | |
2729 | * @pf: board private structure | |
2730 | **/ | |
2731 | static void i40e_stop_misc_vector(struct i40e_pf *pf) | |
2732 | { | |
2733 | /* Disable ICR 0 */ | |
2734 | wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); | |
2735 | i40e_flush(&pf->hw); | |
2736 | } | |
2737 | ||
2738 | /** | |
2739 | * i40e_intr - MSI/Legacy and non-queue interrupt handler | |
2740 | * @irq: interrupt number | |
2741 | * @data: pointer to a q_vector | |
2742 | * | |
2743 | * This is the handler used for all MSI/Legacy interrupts, and deals | |
2744 | * with both queue and non-queue interrupts. This is also used in | |
2745 | * MSIX mode to handle the non-queue interrupts. | |
2746 | **/ | |
2747 | static irqreturn_t i40e_intr(int irq, void *data) | |
2748 | { | |
2749 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
2750 | struct i40e_hw *hw = &pf->hw; | |
2751 | u32 icr0, icr0_remaining; | |
2752 | u32 val, ena_mask; | |
2753 | ||
2754 | icr0 = rd32(hw, I40E_PFINT_ICR0); | |
2755 | ||
41c445ff JB |
2756 | val = rd32(hw, I40E_PFINT_DYN_CTL0); |
2757 | val = val | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK; | |
2758 | wr32(hw, I40E_PFINT_DYN_CTL0, val); | |
2759 | ||
116a57d4 SN |
2760 | /* if sharing a legacy IRQ, we might get called w/o an intr pending */ |
2761 | if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) | |
2762 | return IRQ_NONE; | |
2763 | ||
41c445ff JB |
2764 | ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); |
2765 | ||
cd92e72f SN |
2766 | /* if interrupt but no bits showing, must be SWINT */ |
2767 | if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || | |
2768 | (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) | |
2769 | pf->sw_int_count++; | |
2770 | ||
41c445ff JB |
2771 | /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ |
2772 | if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { | |
2773 | ||
2774 | /* temporarily disable queue cause for NAPI processing */ | |
2775 | u32 qval = rd32(hw, I40E_QINT_RQCTL(0)); | |
2776 | qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; | |
2777 | wr32(hw, I40E_QINT_RQCTL(0), qval); | |
2778 | ||
2779 | qval = rd32(hw, I40E_QINT_TQCTL(0)); | |
2780 | qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; | |
2781 | wr32(hw, I40E_QINT_TQCTL(0), qval); | |
41c445ff JB |
2782 | |
2783 | if (!test_bit(__I40E_DOWN, &pf->state)) | |
493fb300 | 2784 | napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi); |
41c445ff JB |
2785 | } |
2786 | ||
2787 | if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { | |
2788 | ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
2789 | set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
2790 | } | |
2791 | ||
2792 | if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { | |
2793 | ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
2794 | set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
2795 | } | |
2796 | ||
2797 | if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { | |
2798 | ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; | |
2799 | set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); | |
2800 | } | |
2801 | ||
2802 | if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { | |
2803 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
2804 | set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
2805 | ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; | |
2806 | val = rd32(hw, I40E_GLGEN_RSTAT); | |
2807 | val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) | |
2808 | >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; | |
d52cf0a9 | 2809 | if (val == I40E_RESET_CORER) |
41c445ff | 2810 | pf->corer_count++; |
d52cf0a9 | 2811 | else if (val == I40E_RESET_GLOBR) |
41c445ff | 2812 | pf->globr_count++; |
d52cf0a9 | 2813 | else if (val == I40E_RESET_EMPR) |
41c445ff JB |
2814 | pf->empr_count++; |
2815 | } | |
2816 | ||
9c010ee0 ASJ |
2817 | if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { |
2818 | icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; | |
2819 | dev_info(&pf->pdev->dev, "HMC error interrupt\n"); | |
2820 | } | |
2821 | ||
41c445ff JB |
2822 | /* If a critical error is pending we have no choice but to reset the |
2823 | * device. | |
2824 | * Report and mask out any remaining unexpected interrupts. | |
2825 | */ | |
2826 | icr0_remaining = icr0 & ena_mask; | |
2827 | if (icr0_remaining) { | |
2828 | dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", | |
2829 | icr0_remaining); | |
9c010ee0 | 2830 | if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || |
41c445ff JB |
2831 | (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || |
2832 | (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) || | |
2833 | (icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) { | |
9c010ee0 ASJ |
2834 | dev_info(&pf->pdev->dev, "device will be reset\n"); |
2835 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
2836 | i40e_service_event_schedule(pf); | |
41c445ff JB |
2837 | } |
2838 | ena_mask &= ~icr0_remaining; | |
2839 | } | |
2840 | ||
2841 | /* re-enable interrupt causes */ | |
2842 | wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); | |
41c445ff JB |
2843 | if (!test_bit(__I40E_DOWN, &pf->state)) { |
2844 | i40e_service_event_schedule(pf); | |
2845 | i40e_irq_dynamic_enable_icr0(pf); | |
2846 | } | |
2847 | ||
2848 | return IRQ_HANDLED; | |
2849 | } | |
2850 | ||
2851 | /** | |
cd0b6fa6 | 2852 | * i40e_map_vector_to_qp - Assigns the queue pair to the vector |
41c445ff JB |
2853 | * @vsi: the VSI being configured |
2854 | * @v_idx: vector index | |
cd0b6fa6 | 2855 | * @qp_idx: queue pair index |
41c445ff | 2856 | **/ |
cd0b6fa6 | 2857 | static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) |
41c445ff | 2858 | { |
493fb300 | 2859 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; |
9f65e15b AD |
2860 | struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; |
2861 | struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; | |
41c445ff JB |
2862 | |
2863 | tx_ring->q_vector = q_vector; | |
cd0b6fa6 AD |
2864 | tx_ring->next = q_vector->tx.ring; |
2865 | q_vector->tx.ring = tx_ring; | |
41c445ff | 2866 | q_vector->tx.count++; |
cd0b6fa6 AD |
2867 | |
2868 | rx_ring->q_vector = q_vector; | |
2869 | rx_ring->next = q_vector->rx.ring; | |
2870 | q_vector->rx.ring = rx_ring; | |
2871 | q_vector->rx.count++; | |
41c445ff JB |
2872 | } |
2873 | ||
2874 | /** | |
2875 | * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors | |
2876 | * @vsi: the VSI being configured | |
2877 | * | |
2878 | * This function maps descriptor rings to the queue-specific vectors | |
2879 | * we were allotted through the MSI-X enabling code. Ideally, we'd have | |
2880 | * one vector per queue pair, but on a constrained vector budget, we | |
2881 | * group the queue pairs as "efficiently" as possible. | |
2882 | **/ | |
2883 | static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) | |
2884 | { | |
2885 | int qp_remaining = vsi->num_queue_pairs; | |
2886 | int q_vectors = vsi->num_q_vectors; | |
cd0b6fa6 | 2887 | int num_ringpairs; |
41c445ff JB |
2888 | int v_start = 0; |
2889 | int qp_idx = 0; | |
2890 | ||
2891 | /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to | |
2892 | * group them so there are multiple queues per vector. | |
2893 | */ | |
2894 | for (; v_start < q_vectors && qp_remaining; v_start++) { | |
cd0b6fa6 AD |
2895 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; |
2896 | ||
2897 | num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); | |
2898 | ||
2899 | q_vector->num_ringpairs = num_ringpairs; | |
2900 | ||
2901 | q_vector->rx.count = 0; | |
2902 | q_vector->tx.count = 0; | |
2903 | q_vector->rx.ring = NULL; | |
2904 | q_vector->tx.ring = NULL; | |
2905 | ||
2906 | while (num_ringpairs--) { | |
2907 | map_vector_to_qp(vsi, v_start, qp_idx); | |
2908 | qp_idx++; | |
2909 | qp_remaining--; | |
41c445ff JB |
2910 | } |
2911 | } | |
2912 | } | |
2913 | ||
2914 | /** | |
2915 | * i40e_vsi_request_irq - Request IRQ from the OS | |
2916 | * @vsi: the VSI being configured | |
2917 | * @basename: name for the vector | |
2918 | **/ | |
2919 | static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) | |
2920 | { | |
2921 | struct i40e_pf *pf = vsi->back; | |
2922 | int err; | |
2923 | ||
2924 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
2925 | err = i40e_vsi_request_irq_msix(vsi, basename); | |
2926 | else if (pf->flags & I40E_FLAG_MSI_ENABLED) | |
2927 | err = request_irq(pf->pdev->irq, i40e_intr, 0, | |
2928 | pf->misc_int_name, pf); | |
2929 | else | |
2930 | err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, | |
2931 | pf->misc_int_name, pf); | |
2932 | ||
2933 | if (err) | |
2934 | dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); | |
2935 | ||
2936 | return err; | |
2937 | } | |
2938 | ||
2939 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
2940 | /** | |
2941 | * i40e_netpoll - A Polling 'interrupt'handler | |
2942 | * @netdev: network interface device structure | |
2943 | * | |
2944 | * This is used by netconsole to send skbs without having to re-enable | |
2945 | * interrupts. It's not called while the normal interrupt routine is executing. | |
2946 | **/ | |
2947 | static void i40e_netpoll(struct net_device *netdev) | |
2948 | { | |
2949 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2950 | struct i40e_vsi *vsi = np->vsi; | |
2951 | struct i40e_pf *pf = vsi->back; | |
2952 | int i; | |
2953 | ||
2954 | /* if interface is down do nothing */ | |
2955 | if (test_bit(__I40E_DOWN, &vsi->state)) | |
2956 | return; | |
2957 | ||
2958 | pf->flags |= I40E_FLAG_IN_NETPOLL; | |
2959 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2960 | for (i = 0; i < vsi->num_q_vectors; i++) | |
493fb300 | 2961 | i40e_msix_clean_rings(0, vsi->q_vectors[i]); |
41c445ff JB |
2962 | } else { |
2963 | i40e_intr(pf->pdev->irq, netdev); | |
2964 | } | |
2965 | pf->flags &= ~I40E_FLAG_IN_NETPOLL; | |
2966 | } | |
2967 | #endif | |
2968 | ||
2969 | /** | |
2970 | * i40e_vsi_control_tx - Start or stop a VSI's rings | |
2971 | * @vsi: the VSI being configured | |
2972 | * @enable: start or stop the rings | |
2973 | **/ | |
2974 | static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) | |
2975 | { | |
2976 | struct i40e_pf *pf = vsi->back; | |
2977 | struct i40e_hw *hw = &pf->hw; | |
2978 | int i, j, pf_q; | |
2979 | u32 tx_reg; | |
2980 | ||
2981 | pf_q = vsi->base_queue; | |
2982 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
2983 | j = 1000; | |
2984 | do { | |
2985 | usleep_range(1000, 2000); | |
2986 | tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); | |
2987 | } while (j-- && ((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) | |
2988 | ^ (tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT)) & 1); | |
2989 | ||
2990 | if (enable) { | |
2991 | /* is STAT set ? */ | |
2992 | if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) { | |
2993 | dev_info(&pf->pdev->dev, | |
2994 | "Tx %d already enabled\n", i); | |
2995 | continue; | |
2996 | } | |
2997 | } else { | |
2998 | /* is !STAT set ? */ | |
2999 | if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) { | |
3000 | dev_info(&pf->pdev->dev, | |
3001 | "Tx %d already disabled\n", i); | |
3002 | continue; | |
3003 | } | |
3004 | } | |
3005 | ||
3006 | /* turn on/off the queue */ | |
3007 | if (enable) | |
3008 | tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK | | |
3009 | I40E_QTX_ENA_QENA_STAT_MASK; | |
3010 | else | |
3011 | tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; | |
3012 | ||
3013 | wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); | |
3014 | ||
3015 | /* wait for the change to finish */ | |
3016 | for (j = 0; j < 10; j++) { | |
3017 | tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); | |
3018 | if (enable) { | |
3019 | if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) | |
3020 | break; | |
3021 | } else { | |
3022 | if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) | |
3023 | break; | |
3024 | } | |
3025 | ||
3026 | udelay(10); | |
3027 | } | |
3028 | if (j >= 10) { | |
3029 | dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n", | |
3030 | pf_q, (enable ? "en" : "dis")); | |
3031 | return -ETIMEDOUT; | |
3032 | } | |
3033 | } | |
3034 | ||
7134f9ce JB |
3035 | if (hw->revision_id == 0) |
3036 | mdelay(50); | |
3037 | ||
41c445ff JB |
3038 | return 0; |
3039 | } | |
3040 | ||
3041 | /** | |
3042 | * i40e_vsi_control_rx - Start or stop a VSI's rings | |
3043 | * @vsi: the VSI being configured | |
3044 | * @enable: start or stop the rings | |
3045 | **/ | |
3046 | static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) | |
3047 | { | |
3048 | struct i40e_pf *pf = vsi->back; | |
3049 | struct i40e_hw *hw = &pf->hw; | |
3050 | int i, j, pf_q; | |
3051 | u32 rx_reg; | |
3052 | ||
3053 | pf_q = vsi->base_queue; | |
3054 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
3055 | j = 1000; | |
3056 | do { | |
3057 | usleep_range(1000, 2000); | |
3058 | rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); | |
3059 | } while (j-- && ((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) | |
3060 | ^ (rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT)) & 1); | |
3061 | ||
3062 | if (enable) { | |
3063 | /* is STAT set ? */ | |
3064 | if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3065 | continue; | |
3066 | } else { | |
3067 | /* is !STAT set ? */ | |
3068 | if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3069 | continue; | |
3070 | } | |
3071 | ||
3072 | /* turn on/off the queue */ | |
3073 | if (enable) | |
3074 | rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK | | |
3075 | I40E_QRX_ENA_QENA_STAT_MASK; | |
3076 | else | |
3077 | rx_reg &= ~(I40E_QRX_ENA_QENA_REQ_MASK | | |
3078 | I40E_QRX_ENA_QENA_STAT_MASK); | |
3079 | wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); | |
3080 | ||
3081 | /* wait for the change to finish */ | |
3082 | for (j = 0; j < 10; j++) { | |
3083 | rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); | |
3084 | ||
3085 | if (enable) { | |
3086 | if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3087 | break; | |
3088 | } else { | |
3089 | if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3090 | break; | |
3091 | } | |
3092 | ||
3093 | udelay(10); | |
3094 | } | |
3095 | if (j >= 10) { | |
3096 | dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n", | |
3097 | pf_q, (enable ? "en" : "dis")); | |
3098 | return -ETIMEDOUT; | |
3099 | } | |
3100 | } | |
3101 | ||
3102 | return 0; | |
3103 | } | |
3104 | ||
3105 | /** | |
3106 | * i40e_vsi_control_rings - Start or stop a VSI's rings | |
3107 | * @vsi: the VSI being configured | |
3108 | * @enable: start or stop the rings | |
3109 | **/ | |
3110 | static int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) | |
3111 | { | |
3112 | int ret; | |
3113 | ||
3114 | /* do rx first for enable and last for disable */ | |
3115 | if (request) { | |
3116 | ret = i40e_vsi_control_rx(vsi, request); | |
3117 | if (ret) | |
3118 | return ret; | |
3119 | ret = i40e_vsi_control_tx(vsi, request); | |
3120 | } else { | |
3121 | ret = i40e_vsi_control_tx(vsi, request); | |
3122 | if (ret) | |
3123 | return ret; | |
3124 | ret = i40e_vsi_control_rx(vsi, request); | |
3125 | } | |
3126 | ||
3127 | return ret; | |
3128 | } | |
3129 | ||
3130 | /** | |
3131 | * i40e_vsi_free_irq - Free the irq association with the OS | |
3132 | * @vsi: the VSI being configured | |
3133 | **/ | |
3134 | static void i40e_vsi_free_irq(struct i40e_vsi *vsi) | |
3135 | { | |
3136 | struct i40e_pf *pf = vsi->back; | |
3137 | struct i40e_hw *hw = &pf->hw; | |
3138 | int base = vsi->base_vector; | |
3139 | u32 val, qp; | |
3140 | int i; | |
3141 | ||
3142 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3143 | if (!vsi->q_vectors) | |
3144 | return; | |
3145 | ||
3146 | for (i = 0; i < vsi->num_q_vectors; i++) { | |
3147 | u16 vector = i + base; | |
3148 | ||
3149 | /* free only the irqs that were actually requested */ | |
493fb300 | 3150 | if (vsi->q_vectors[i]->num_ringpairs == 0) |
41c445ff JB |
3151 | continue; |
3152 | ||
3153 | /* clear the affinity_mask in the IRQ descriptor */ | |
3154 | irq_set_affinity_hint(pf->msix_entries[vector].vector, | |
3155 | NULL); | |
3156 | free_irq(pf->msix_entries[vector].vector, | |
493fb300 | 3157 | vsi->q_vectors[i]); |
41c445ff JB |
3158 | |
3159 | /* Tear down the interrupt queue link list | |
3160 | * | |
3161 | * We know that they come in pairs and always | |
3162 | * the Rx first, then the Tx. To clear the | |
3163 | * link list, stick the EOL value into the | |
3164 | * next_q field of the registers. | |
3165 | */ | |
3166 | val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); | |
3167 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
3168 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3169 | val |= I40E_QUEUE_END_OF_LIST | |
3170 | << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3171 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); | |
3172 | ||
3173 | while (qp != I40E_QUEUE_END_OF_LIST) { | |
3174 | u32 next; | |
3175 | ||
3176 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
3177 | ||
3178 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
3179 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
3180 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
3181 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
3182 | ||
3183 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
3184 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
3185 | ||
3186 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
3187 | ||
3188 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
3189 | ||
3190 | next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) | |
3191 | >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; | |
3192 | ||
3193 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
3194 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
3195 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3196 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
3197 | ||
3198 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
3199 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
3200 | ||
3201 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
3202 | qp = next; | |
3203 | } | |
3204 | } | |
3205 | } else { | |
3206 | free_irq(pf->pdev->irq, pf); | |
3207 | ||
3208 | val = rd32(hw, I40E_PFINT_LNKLST0); | |
3209 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
3210 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3211 | val |= I40E_QUEUE_END_OF_LIST | |
3212 | << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; | |
3213 | wr32(hw, I40E_PFINT_LNKLST0, val); | |
3214 | ||
3215 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
3216 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
3217 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
3218 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
3219 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
3220 | ||
3221 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
3222 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
3223 | ||
3224 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
3225 | ||
3226 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
3227 | ||
3228 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
3229 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
3230 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3231 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
3232 | ||
3233 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
3234 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
3235 | ||
3236 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
3237 | } | |
3238 | } | |
3239 | ||
493fb300 AD |
3240 | /** |
3241 | * i40e_free_q_vector - Free memory allocated for specific interrupt vector | |
3242 | * @vsi: the VSI being configured | |
3243 | * @v_idx: Index of vector to be freed | |
3244 | * | |
3245 | * This function frees the memory allocated to the q_vector. In addition if | |
3246 | * NAPI is enabled it will delete any references to the NAPI struct prior | |
3247 | * to freeing the q_vector. | |
3248 | **/ | |
3249 | static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) | |
3250 | { | |
3251 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; | |
cd0b6fa6 | 3252 | struct i40e_ring *ring; |
493fb300 AD |
3253 | |
3254 | if (!q_vector) | |
3255 | return; | |
3256 | ||
3257 | /* disassociate q_vector from rings */ | |
cd0b6fa6 AD |
3258 | i40e_for_each_ring(ring, q_vector->tx) |
3259 | ring->q_vector = NULL; | |
3260 | ||
3261 | i40e_for_each_ring(ring, q_vector->rx) | |
3262 | ring->q_vector = NULL; | |
493fb300 AD |
3263 | |
3264 | /* only VSI w/ an associated netdev is set up w/ NAPI */ | |
3265 | if (vsi->netdev) | |
3266 | netif_napi_del(&q_vector->napi); | |
3267 | ||
3268 | vsi->q_vectors[v_idx] = NULL; | |
3269 | ||
3270 | kfree_rcu(q_vector, rcu); | |
3271 | } | |
3272 | ||
41c445ff JB |
3273 | /** |
3274 | * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors | |
3275 | * @vsi: the VSI being un-configured | |
3276 | * | |
3277 | * This frees the memory allocated to the q_vectors and | |
3278 | * deletes references to the NAPI struct. | |
3279 | **/ | |
3280 | static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) | |
3281 | { | |
3282 | int v_idx; | |
3283 | ||
493fb300 AD |
3284 | for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) |
3285 | i40e_free_q_vector(vsi, v_idx); | |
41c445ff JB |
3286 | } |
3287 | ||
3288 | /** | |
3289 | * i40e_reset_interrupt_capability - Disable interrupt setup in OS | |
3290 | * @pf: board private structure | |
3291 | **/ | |
3292 | static void i40e_reset_interrupt_capability(struct i40e_pf *pf) | |
3293 | { | |
3294 | /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ | |
3295 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3296 | pci_disable_msix(pf->pdev); | |
3297 | kfree(pf->msix_entries); | |
3298 | pf->msix_entries = NULL; | |
3299 | } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { | |
3300 | pci_disable_msi(pf->pdev); | |
3301 | } | |
3302 | pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); | |
3303 | } | |
3304 | ||
3305 | /** | |
3306 | * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings | |
3307 | * @pf: board private structure | |
3308 | * | |
3309 | * We go through and clear interrupt specific resources and reset the structure | |
3310 | * to pre-load conditions | |
3311 | **/ | |
3312 | static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) | |
3313 | { | |
3314 | int i; | |
3315 | ||
3316 | i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); | |
3317 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
3318 | if (pf->vsi[i]) | |
3319 | i40e_vsi_free_q_vectors(pf->vsi[i]); | |
3320 | i40e_reset_interrupt_capability(pf); | |
3321 | } | |
3322 | ||
3323 | /** | |
3324 | * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI | |
3325 | * @vsi: the VSI being configured | |
3326 | **/ | |
3327 | static void i40e_napi_enable_all(struct i40e_vsi *vsi) | |
3328 | { | |
3329 | int q_idx; | |
3330 | ||
3331 | if (!vsi->netdev) | |
3332 | return; | |
3333 | ||
3334 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) | |
493fb300 | 3335 | napi_enable(&vsi->q_vectors[q_idx]->napi); |
41c445ff JB |
3336 | } |
3337 | ||
3338 | /** | |
3339 | * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI | |
3340 | * @vsi: the VSI being configured | |
3341 | **/ | |
3342 | static void i40e_napi_disable_all(struct i40e_vsi *vsi) | |
3343 | { | |
3344 | int q_idx; | |
3345 | ||
3346 | if (!vsi->netdev) | |
3347 | return; | |
3348 | ||
3349 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) | |
493fb300 | 3350 | napi_disable(&vsi->q_vectors[q_idx]->napi); |
41c445ff JB |
3351 | } |
3352 | ||
3353 | /** | |
3354 | * i40e_quiesce_vsi - Pause a given VSI | |
3355 | * @vsi: the VSI being paused | |
3356 | **/ | |
3357 | static void i40e_quiesce_vsi(struct i40e_vsi *vsi) | |
3358 | { | |
3359 | if (test_bit(__I40E_DOWN, &vsi->state)) | |
3360 | return; | |
3361 | ||
3362 | set_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
3363 | if (vsi->netdev && netif_running(vsi->netdev)) { | |
3364 | vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); | |
3365 | } else { | |
3366 | set_bit(__I40E_DOWN, &vsi->state); | |
3367 | i40e_down(vsi); | |
3368 | } | |
3369 | } | |
3370 | ||
3371 | /** | |
3372 | * i40e_unquiesce_vsi - Resume a given VSI | |
3373 | * @vsi: the VSI being resumed | |
3374 | **/ | |
3375 | static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) | |
3376 | { | |
3377 | if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) | |
3378 | return; | |
3379 | ||
3380 | clear_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
3381 | if (vsi->netdev && netif_running(vsi->netdev)) | |
3382 | vsi->netdev->netdev_ops->ndo_open(vsi->netdev); | |
3383 | else | |
3384 | i40e_up(vsi); /* this clears the DOWN bit */ | |
3385 | } | |
3386 | ||
3387 | /** | |
3388 | * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF | |
3389 | * @pf: the PF | |
3390 | **/ | |
3391 | static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) | |
3392 | { | |
3393 | int v; | |
3394 | ||
3395 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
3396 | if (pf->vsi[v]) | |
3397 | i40e_quiesce_vsi(pf->vsi[v]); | |
3398 | } | |
3399 | } | |
3400 | ||
3401 | /** | |
3402 | * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF | |
3403 | * @pf: the PF | |
3404 | **/ | |
3405 | static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) | |
3406 | { | |
3407 | int v; | |
3408 | ||
3409 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
3410 | if (pf->vsi[v]) | |
3411 | i40e_unquiesce_vsi(pf->vsi[v]); | |
3412 | } | |
3413 | } | |
3414 | ||
3415 | /** | |
3416 | * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config | |
3417 | * @dcbcfg: the corresponding DCBx configuration structure | |
3418 | * | |
3419 | * Return the number of TCs from given DCBx configuration | |
3420 | **/ | |
3421 | static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) | |
3422 | { | |
078b5876 JB |
3423 | u8 num_tc = 0; |
3424 | int i; | |
41c445ff JB |
3425 | |
3426 | /* Scan the ETS Config Priority Table to find | |
3427 | * traffic class enabled for a given priority | |
3428 | * and use the traffic class index to get the | |
3429 | * number of traffic classes enabled | |
3430 | */ | |
3431 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
3432 | if (dcbcfg->etscfg.prioritytable[i] > num_tc) | |
3433 | num_tc = dcbcfg->etscfg.prioritytable[i]; | |
3434 | } | |
3435 | ||
3436 | /* Traffic class index starts from zero so | |
3437 | * increment to return the actual count | |
3438 | */ | |
078b5876 | 3439 | return num_tc + 1; |
41c445ff JB |
3440 | } |
3441 | ||
3442 | /** | |
3443 | * i40e_dcb_get_enabled_tc - Get enabled traffic classes | |
3444 | * @dcbcfg: the corresponding DCBx configuration structure | |
3445 | * | |
3446 | * Query the current DCB configuration and return the number of | |
3447 | * traffic classes enabled from the given DCBX config | |
3448 | **/ | |
3449 | static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) | |
3450 | { | |
3451 | u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); | |
3452 | u8 enabled_tc = 1; | |
3453 | u8 i; | |
3454 | ||
3455 | for (i = 0; i < num_tc; i++) | |
3456 | enabled_tc |= 1 << i; | |
3457 | ||
3458 | return enabled_tc; | |
3459 | } | |
3460 | ||
3461 | /** | |
3462 | * i40e_pf_get_num_tc - Get enabled traffic classes for PF | |
3463 | * @pf: PF being queried | |
3464 | * | |
3465 | * Return number of traffic classes enabled for the given PF | |
3466 | **/ | |
3467 | static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) | |
3468 | { | |
3469 | struct i40e_hw *hw = &pf->hw; | |
3470 | u8 i, enabled_tc; | |
3471 | u8 num_tc = 0; | |
3472 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
3473 | ||
3474 | /* If DCB is not enabled then always in single TC */ | |
3475 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
3476 | return 1; | |
3477 | ||
3478 | /* MFP mode return count of enabled TCs for this PF */ | |
3479 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
3480 | enabled_tc = pf->hw.func_caps.enabled_tcmap; | |
3481 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3482 | if (enabled_tc & (1 << i)) | |
3483 | num_tc++; | |
3484 | } | |
3485 | return num_tc; | |
3486 | } | |
3487 | ||
3488 | /* SFP mode will be enabled for all TCs on port */ | |
3489 | return i40e_dcb_get_num_tc(dcbcfg); | |
3490 | } | |
3491 | ||
3492 | /** | |
3493 | * i40e_pf_get_default_tc - Get bitmap for first enabled TC | |
3494 | * @pf: PF being queried | |
3495 | * | |
3496 | * Return a bitmap for first enabled traffic class for this PF. | |
3497 | **/ | |
3498 | static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) | |
3499 | { | |
3500 | u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; | |
3501 | u8 i = 0; | |
3502 | ||
3503 | if (!enabled_tc) | |
3504 | return 0x1; /* TC0 */ | |
3505 | ||
3506 | /* Find the first enabled TC */ | |
3507 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3508 | if (enabled_tc & (1 << i)) | |
3509 | break; | |
3510 | } | |
3511 | ||
3512 | return 1 << i; | |
3513 | } | |
3514 | ||
3515 | /** | |
3516 | * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes | |
3517 | * @pf: PF being queried | |
3518 | * | |
3519 | * Return a bitmap for enabled traffic classes for this PF. | |
3520 | **/ | |
3521 | static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) | |
3522 | { | |
3523 | /* If DCB is not enabled for this PF then just return default TC */ | |
3524 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
3525 | return i40e_pf_get_default_tc(pf); | |
3526 | ||
3527 | /* MFP mode will have enabled TCs set by FW */ | |
3528 | if (pf->flags & I40E_FLAG_MFP_ENABLED) | |
3529 | return pf->hw.func_caps.enabled_tcmap; | |
3530 | ||
3531 | /* SFP mode we want PF to be enabled for all TCs */ | |
3532 | return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); | |
3533 | } | |
3534 | ||
3535 | /** | |
3536 | * i40e_vsi_get_bw_info - Query VSI BW Information | |
3537 | * @vsi: the VSI being queried | |
3538 | * | |
3539 | * Returns 0 on success, negative value on failure | |
3540 | **/ | |
3541 | static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) | |
3542 | { | |
3543 | struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; | |
3544 | struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; | |
3545 | struct i40e_pf *pf = vsi->back; | |
3546 | struct i40e_hw *hw = &pf->hw; | |
dcae29be | 3547 | i40e_status aq_ret; |
41c445ff | 3548 | u32 tc_bw_max; |
41c445ff JB |
3549 | int i; |
3550 | ||
3551 | /* Get the VSI level BW configuration */ | |
dcae29be JB |
3552 | aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); |
3553 | if (aq_ret) { | |
41c445ff JB |
3554 | dev_info(&pf->pdev->dev, |
3555 | "couldn't get pf vsi bw config, err %d, aq_err %d\n", | |
dcae29be JB |
3556 | aq_ret, pf->hw.aq.asq_last_status); |
3557 | return -EINVAL; | |
41c445ff JB |
3558 | } |
3559 | ||
3560 | /* Get the VSI level BW configuration per TC */ | |
dcae29be JB |
3561 | aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, |
3562 | NULL); | |
3563 | if (aq_ret) { | |
41c445ff JB |
3564 | dev_info(&pf->pdev->dev, |
3565 | "couldn't get pf vsi ets bw config, err %d, aq_err %d\n", | |
dcae29be JB |
3566 | aq_ret, pf->hw.aq.asq_last_status); |
3567 | return -EINVAL; | |
41c445ff JB |
3568 | } |
3569 | ||
3570 | if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { | |
3571 | dev_info(&pf->pdev->dev, | |
3572 | "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", | |
3573 | bw_config.tc_valid_bits, | |
3574 | bw_ets_config.tc_valid_bits); | |
3575 | /* Still continuing */ | |
3576 | } | |
3577 | ||
3578 | vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); | |
3579 | vsi->bw_max_quanta = bw_config.max_bw; | |
3580 | tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | | |
3581 | (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); | |
3582 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3583 | vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; | |
3584 | vsi->bw_ets_limit_credits[i] = | |
3585 | le16_to_cpu(bw_ets_config.credits[i]); | |
3586 | /* 3 bits out of 4 for each TC */ | |
3587 | vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); | |
3588 | } | |
078b5876 | 3589 | |
dcae29be | 3590 | return 0; |
41c445ff JB |
3591 | } |
3592 | ||
3593 | /** | |
3594 | * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC | |
3595 | * @vsi: the VSI being configured | |
3596 | * @enabled_tc: TC bitmap | |
3597 | * @bw_credits: BW shared credits per TC | |
3598 | * | |
3599 | * Returns 0 on success, negative value on failure | |
3600 | **/ | |
dcae29be | 3601 | static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, |
41c445ff JB |
3602 | u8 *bw_share) |
3603 | { | |
3604 | struct i40e_aqc_configure_vsi_tc_bw_data bw_data; | |
dcae29be JB |
3605 | i40e_status aq_ret; |
3606 | int i; | |
41c445ff JB |
3607 | |
3608 | bw_data.tc_valid_bits = enabled_tc; | |
3609 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
3610 | bw_data.tc_bw_credits[i] = bw_share[i]; | |
3611 | ||
dcae29be JB |
3612 | aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, |
3613 | NULL); | |
3614 | if (aq_ret) { | |
41c445ff JB |
3615 | dev_info(&vsi->back->pdev->dev, |
3616 | "%s: AQ command Config VSI BW allocation per TC failed = %d\n", | |
3617 | __func__, vsi->back->hw.aq.asq_last_status); | |
dcae29be | 3618 | return -EINVAL; |
41c445ff JB |
3619 | } |
3620 | ||
3621 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
3622 | vsi->info.qs_handle[i] = bw_data.qs_handles[i]; | |
3623 | ||
dcae29be | 3624 | return 0; |
41c445ff JB |
3625 | } |
3626 | ||
3627 | /** | |
3628 | * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration | |
3629 | * @vsi: the VSI being configured | |
3630 | * @enabled_tc: TC map to be enabled | |
3631 | * | |
3632 | **/ | |
3633 | static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
3634 | { | |
3635 | struct net_device *netdev = vsi->netdev; | |
3636 | struct i40e_pf *pf = vsi->back; | |
3637 | struct i40e_hw *hw = &pf->hw; | |
3638 | u8 netdev_tc = 0; | |
3639 | int i; | |
3640 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
3641 | ||
3642 | if (!netdev) | |
3643 | return; | |
3644 | ||
3645 | if (!enabled_tc) { | |
3646 | netdev_reset_tc(netdev); | |
3647 | return; | |
3648 | } | |
3649 | ||
3650 | /* Set up actual enabled TCs on the VSI */ | |
3651 | if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) | |
3652 | return; | |
3653 | ||
3654 | /* set per TC queues for the VSI */ | |
3655 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3656 | /* Only set TC queues for enabled tcs | |
3657 | * | |
3658 | * e.g. For a VSI that has TC0 and TC3 enabled the | |
3659 | * enabled_tc bitmap would be 0x00001001; the driver | |
3660 | * will set the numtc for netdev as 2 that will be | |
3661 | * referenced by the netdev layer as TC 0 and 1. | |
3662 | */ | |
3663 | if (vsi->tc_config.enabled_tc & (1 << i)) | |
3664 | netdev_set_tc_queue(netdev, | |
3665 | vsi->tc_config.tc_info[i].netdev_tc, | |
3666 | vsi->tc_config.tc_info[i].qcount, | |
3667 | vsi->tc_config.tc_info[i].qoffset); | |
3668 | } | |
3669 | ||
3670 | /* Assign UP2TC map for the VSI */ | |
3671 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
3672 | /* Get the actual TC# for the UP */ | |
3673 | u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; | |
3674 | /* Get the mapped netdev TC# for the UP */ | |
3675 | netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; | |
3676 | netdev_set_prio_tc_map(netdev, i, netdev_tc); | |
3677 | } | |
3678 | } | |
3679 | ||
3680 | /** | |
3681 | * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map | |
3682 | * @vsi: the VSI being configured | |
3683 | * @ctxt: the ctxt buffer returned from AQ VSI update param command | |
3684 | **/ | |
3685 | static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, | |
3686 | struct i40e_vsi_context *ctxt) | |
3687 | { | |
3688 | /* copy just the sections touched not the entire info | |
3689 | * since not all sections are valid as returned by | |
3690 | * update vsi params | |
3691 | */ | |
3692 | vsi->info.mapping_flags = ctxt->info.mapping_flags; | |
3693 | memcpy(&vsi->info.queue_mapping, | |
3694 | &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); | |
3695 | memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, | |
3696 | sizeof(vsi->info.tc_mapping)); | |
3697 | } | |
3698 | ||
3699 | /** | |
3700 | * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map | |
3701 | * @vsi: VSI to be configured | |
3702 | * @enabled_tc: TC bitmap | |
3703 | * | |
3704 | * This configures a particular VSI for TCs that are mapped to the | |
3705 | * given TC bitmap. It uses default bandwidth share for TCs across | |
3706 | * VSIs to configure TC for a particular VSI. | |
3707 | * | |
3708 | * NOTE: | |
3709 | * It is expected that the VSI queues have been quisced before calling | |
3710 | * this function. | |
3711 | **/ | |
3712 | static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
3713 | { | |
3714 | u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; | |
3715 | struct i40e_vsi_context ctxt; | |
3716 | int ret = 0; | |
3717 | int i; | |
3718 | ||
3719 | /* Check if enabled_tc is same as existing or new TCs */ | |
3720 | if (vsi->tc_config.enabled_tc == enabled_tc) | |
3721 | return ret; | |
3722 | ||
3723 | /* Enable ETS TCs with equal BW Share for now across all VSIs */ | |
3724 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3725 | if (enabled_tc & (1 << i)) | |
3726 | bw_share[i] = 1; | |
3727 | } | |
3728 | ||
3729 | ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); | |
3730 | if (ret) { | |
3731 | dev_info(&vsi->back->pdev->dev, | |
3732 | "Failed configuring TC map %d for VSI %d\n", | |
3733 | enabled_tc, vsi->seid); | |
3734 | goto out; | |
3735 | } | |
3736 | ||
3737 | /* Update Queue Pairs Mapping for currently enabled UPs */ | |
3738 | ctxt.seid = vsi->seid; | |
3739 | ctxt.pf_num = vsi->back->hw.pf_id; | |
3740 | ctxt.vf_num = 0; | |
3741 | ctxt.uplink_seid = vsi->uplink_seid; | |
3742 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
3743 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); | |
3744 | ||
3745 | /* Update the VSI after updating the VSI queue-mapping information */ | |
3746 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
3747 | if (ret) { | |
3748 | dev_info(&vsi->back->pdev->dev, | |
3749 | "update vsi failed, aq_err=%d\n", | |
3750 | vsi->back->hw.aq.asq_last_status); | |
3751 | goto out; | |
3752 | } | |
3753 | /* update the local VSI info with updated queue map */ | |
3754 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
3755 | vsi->info.valid_sections = 0; | |
3756 | ||
3757 | /* Update current VSI BW information */ | |
3758 | ret = i40e_vsi_get_bw_info(vsi); | |
3759 | if (ret) { | |
3760 | dev_info(&vsi->back->pdev->dev, | |
3761 | "Failed updating vsi bw info, aq_err=%d\n", | |
3762 | vsi->back->hw.aq.asq_last_status); | |
3763 | goto out; | |
3764 | } | |
3765 | ||
3766 | /* Update the netdev TC setup */ | |
3767 | i40e_vsi_config_netdev_tc(vsi, enabled_tc); | |
3768 | out: | |
3769 | return ret; | |
3770 | } | |
3771 | ||
3772 | /** | |
3773 | * i40e_up_complete - Finish the last steps of bringing up a connection | |
3774 | * @vsi: the VSI being configured | |
3775 | **/ | |
3776 | static int i40e_up_complete(struct i40e_vsi *vsi) | |
3777 | { | |
3778 | struct i40e_pf *pf = vsi->back; | |
3779 | int err; | |
3780 | ||
3781 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
3782 | i40e_vsi_configure_msix(vsi); | |
3783 | else | |
3784 | i40e_configure_msi_and_legacy(vsi); | |
3785 | ||
3786 | /* start rings */ | |
3787 | err = i40e_vsi_control_rings(vsi, true); | |
3788 | if (err) | |
3789 | return err; | |
3790 | ||
3791 | clear_bit(__I40E_DOWN, &vsi->state); | |
3792 | i40e_napi_enable_all(vsi); | |
3793 | i40e_vsi_enable_irq(vsi); | |
3794 | ||
3795 | if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && | |
3796 | (vsi->netdev)) { | |
6d779b41 | 3797 | netdev_info(vsi->netdev, "NIC Link is Up\n"); |
41c445ff JB |
3798 | netif_tx_start_all_queues(vsi->netdev); |
3799 | netif_carrier_on(vsi->netdev); | |
6d779b41 AS |
3800 | } else if (vsi->netdev) { |
3801 | netdev_info(vsi->netdev, "NIC Link is Down\n"); | |
41c445ff JB |
3802 | } |
3803 | i40e_service_event_schedule(pf); | |
3804 | ||
3805 | return 0; | |
3806 | } | |
3807 | ||
3808 | /** | |
3809 | * i40e_vsi_reinit_locked - Reset the VSI | |
3810 | * @vsi: the VSI being configured | |
3811 | * | |
3812 | * Rebuild the ring structs after some configuration | |
3813 | * has changed, e.g. MTU size. | |
3814 | **/ | |
3815 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) | |
3816 | { | |
3817 | struct i40e_pf *pf = vsi->back; | |
3818 | ||
3819 | WARN_ON(in_interrupt()); | |
3820 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
3821 | usleep_range(1000, 2000); | |
3822 | i40e_down(vsi); | |
3823 | ||
3824 | /* Give a VF some time to respond to the reset. The | |
3825 | * two second wait is based upon the watchdog cycle in | |
3826 | * the VF driver. | |
3827 | */ | |
3828 | if (vsi->type == I40E_VSI_SRIOV) | |
3829 | msleep(2000); | |
3830 | i40e_up(vsi); | |
3831 | clear_bit(__I40E_CONFIG_BUSY, &pf->state); | |
3832 | } | |
3833 | ||
3834 | /** | |
3835 | * i40e_up - Bring the connection back up after being down | |
3836 | * @vsi: the VSI being configured | |
3837 | **/ | |
3838 | int i40e_up(struct i40e_vsi *vsi) | |
3839 | { | |
3840 | int err; | |
3841 | ||
3842 | err = i40e_vsi_configure(vsi); | |
3843 | if (!err) | |
3844 | err = i40e_up_complete(vsi); | |
3845 | ||
3846 | return err; | |
3847 | } | |
3848 | ||
3849 | /** | |
3850 | * i40e_down - Shutdown the connection processing | |
3851 | * @vsi: the VSI being stopped | |
3852 | **/ | |
3853 | void i40e_down(struct i40e_vsi *vsi) | |
3854 | { | |
3855 | int i; | |
3856 | ||
3857 | /* It is assumed that the caller of this function | |
3858 | * sets the vsi->state __I40E_DOWN bit. | |
3859 | */ | |
3860 | if (vsi->netdev) { | |
3861 | netif_carrier_off(vsi->netdev); | |
3862 | netif_tx_disable(vsi->netdev); | |
3863 | } | |
3864 | i40e_vsi_disable_irq(vsi); | |
3865 | i40e_vsi_control_rings(vsi, false); | |
3866 | i40e_napi_disable_all(vsi); | |
3867 | ||
3868 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
3869 | i40e_clean_tx_ring(vsi->tx_rings[i]); |
3870 | i40e_clean_rx_ring(vsi->rx_rings[i]); | |
41c445ff JB |
3871 | } |
3872 | } | |
3873 | ||
3874 | /** | |
3875 | * i40e_setup_tc - configure multiple traffic classes | |
3876 | * @netdev: net device to configure | |
3877 | * @tc: number of traffic classes to enable | |
3878 | **/ | |
3879 | static int i40e_setup_tc(struct net_device *netdev, u8 tc) | |
3880 | { | |
3881 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3882 | struct i40e_vsi *vsi = np->vsi; | |
3883 | struct i40e_pf *pf = vsi->back; | |
3884 | u8 enabled_tc = 0; | |
3885 | int ret = -EINVAL; | |
3886 | int i; | |
3887 | ||
3888 | /* Check if DCB enabled to continue */ | |
3889 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
3890 | netdev_info(netdev, "DCB is not enabled for adapter\n"); | |
3891 | goto exit; | |
3892 | } | |
3893 | ||
3894 | /* Check if MFP enabled */ | |
3895 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
3896 | netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); | |
3897 | goto exit; | |
3898 | } | |
3899 | ||
3900 | /* Check whether tc count is within enabled limit */ | |
3901 | if (tc > i40e_pf_get_num_tc(pf)) { | |
3902 | netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); | |
3903 | goto exit; | |
3904 | } | |
3905 | ||
3906 | /* Generate TC map for number of tc requested */ | |
3907 | for (i = 0; i < tc; i++) | |
3908 | enabled_tc |= (1 << i); | |
3909 | ||
3910 | /* Requesting same TC configuration as already enabled */ | |
3911 | if (enabled_tc == vsi->tc_config.enabled_tc) | |
3912 | return 0; | |
3913 | ||
3914 | /* Quiesce VSI queues */ | |
3915 | i40e_quiesce_vsi(vsi); | |
3916 | ||
3917 | /* Configure VSI for enabled TCs */ | |
3918 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
3919 | if (ret) { | |
3920 | netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", | |
3921 | vsi->seid); | |
3922 | goto exit; | |
3923 | } | |
3924 | ||
3925 | /* Unquiesce VSI */ | |
3926 | i40e_unquiesce_vsi(vsi); | |
3927 | ||
3928 | exit: | |
3929 | return ret; | |
3930 | } | |
3931 | ||
3932 | /** | |
3933 | * i40e_open - Called when a network interface is made active | |
3934 | * @netdev: network interface device structure | |
3935 | * | |
3936 | * The open entry point is called when a network interface is made | |
3937 | * active by the system (IFF_UP). At this point all resources needed | |
3938 | * for transmit and receive operations are allocated, the interrupt | |
3939 | * handler is registered with the OS, the netdev watchdog subtask is | |
3940 | * enabled, and the stack is notified that the interface is ready. | |
3941 | * | |
3942 | * Returns 0 on success, negative value on failure | |
3943 | **/ | |
3944 | static int i40e_open(struct net_device *netdev) | |
3945 | { | |
3946 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3947 | struct i40e_vsi *vsi = np->vsi; | |
3948 | struct i40e_pf *pf = vsi->back; | |
3949 | char int_name[IFNAMSIZ]; | |
3950 | int err; | |
3951 | ||
3952 | /* disallow open during test */ | |
3953 | if (test_bit(__I40E_TESTING, &pf->state)) | |
3954 | return -EBUSY; | |
3955 | ||
3956 | netif_carrier_off(netdev); | |
3957 | ||
3958 | /* allocate descriptors */ | |
3959 | err = i40e_vsi_setup_tx_resources(vsi); | |
3960 | if (err) | |
3961 | goto err_setup_tx; | |
3962 | err = i40e_vsi_setup_rx_resources(vsi); | |
3963 | if (err) | |
3964 | goto err_setup_rx; | |
3965 | ||
3966 | err = i40e_vsi_configure(vsi); | |
3967 | if (err) | |
3968 | goto err_setup_rx; | |
3969 | ||
3970 | snprintf(int_name, sizeof(int_name) - 1, "%s-%s", | |
3971 | dev_driver_string(&pf->pdev->dev), netdev->name); | |
3972 | err = i40e_vsi_request_irq(vsi, int_name); | |
3973 | if (err) | |
3974 | goto err_setup_rx; | |
3975 | ||
25946ddb ASJ |
3976 | /* Notify the stack of the actual queue counts. */ |
3977 | err = netif_set_real_num_tx_queues(netdev, pf->num_tx_queues); | |
3978 | if (err) | |
3979 | goto err_set_queues; | |
3980 | ||
3981 | err = netif_set_real_num_rx_queues(netdev, pf->num_rx_queues); | |
3982 | if (err) | |
3983 | goto err_set_queues; | |
3984 | ||
41c445ff JB |
3985 | err = i40e_up_complete(vsi); |
3986 | if (err) | |
3987 | goto err_up_complete; | |
3988 | ||
3989 | if ((vsi->type == I40E_VSI_MAIN) || (vsi->type == I40E_VSI_VMDQ2)) { | |
3990 | err = i40e_aq_set_vsi_broadcast(&pf->hw, vsi->seid, true, NULL); | |
3991 | if (err) | |
3992 | netdev_info(netdev, | |
3993 | "couldn't set broadcast err %d aq_err %d\n", | |
3994 | err, pf->hw.aq.asq_last_status); | |
3995 | } | |
3996 | ||
3997 | return 0; | |
3998 | ||
3999 | err_up_complete: | |
4000 | i40e_down(vsi); | |
25946ddb | 4001 | err_set_queues: |
41c445ff JB |
4002 | i40e_vsi_free_irq(vsi); |
4003 | err_setup_rx: | |
4004 | i40e_vsi_free_rx_resources(vsi); | |
4005 | err_setup_tx: | |
4006 | i40e_vsi_free_tx_resources(vsi); | |
4007 | if (vsi == pf->vsi[pf->lan_vsi]) | |
4008 | i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); | |
4009 | ||
4010 | return err; | |
4011 | } | |
4012 | ||
4013 | /** | |
4014 | * i40e_close - Disables a network interface | |
4015 | * @netdev: network interface device structure | |
4016 | * | |
4017 | * The close entry point is called when an interface is de-activated | |
4018 | * by the OS. The hardware is still under the driver's control, but | |
4019 | * this netdev interface is disabled. | |
4020 | * | |
4021 | * Returns 0, this is not allowed to fail | |
4022 | **/ | |
4023 | static int i40e_close(struct net_device *netdev) | |
4024 | { | |
4025 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
4026 | struct i40e_vsi *vsi = np->vsi; | |
4027 | ||
4028 | if (test_and_set_bit(__I40E_DOWN, &vsi->state)) | |
4029 | return 0; | |
4030 | ||
4031 | i40e_down(vsi); | |
4032 | i40e_vsi_free_irq(vsi); | |
4033 | ||
4034 | i40e_vsi_free_tx_resources(vsi); | |
4035 | i40e_vsi_free_rx_resources(vsi); | |
4036 | ||
4037 | return 0; | |
4038 | } | |
4039 | ||
4040 | /** | |
4041 | * i40e_do_reset - Start a PF or Core Reset sequence | |
4042 | * @pf: board private structure | |
4043 | * @reset_flags: which reset is requested | |
4044 | * | |
4045 | * The essential difference in resets is that the PF Reset | |
4046 | * doesn't clear the packet buffers, doesn't reset the PE | |
4047 | * firmware, and doesn't bother the other PFs on the chip. | |
4048 | **/ | |
4049 | void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) | |
4050 | { | |
4051 | u32 val; | |
4052 | ||
4053 | WARN_ON(in_interrupt()); | |
4054 | ||
4055 | /* do the biggest reset indicated */ | |
4056 | if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) { | |
4057 | ||
4058 | /* Request a Global Reset | |
4059 | * | |
4060 | * This will start the chip's countdown to the actual full | |
4061 | * chip reset event, and a warning interrupt to be sent | |
4062 | * to all PFs, including the requestor. Our handler | |
4063 | * for the warning interrupt will deal with the shutdown | |
4064 | * and recovery of the switch setup. | |
4065 | */ | |
4066 | dev_info(&pf->pdev->dev, "GlobalR requested\n"); | |
4067 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
4068 | val |= I40E_GLGEN_RTRIG_GLOBR_MASK; | |
4069 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
4070 | ||
4071 | } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) { | |
4072 | ||
4073 | /* Request a Core Reset | |
4074 | * | |
4075 | * Same as Global Reset, except does *not* include the MAC/PHY | |
4076 | */ | |
4077 | dev_info(&pf->pdev->dev, "CoreR requested\n"); | |
4078 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
4079 | val |= I40E_GLGEN_RTRIG_CORER_MASK; | |
4080 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
4081 | i40e_flush(&pf->hw); | |
4082 | ||
7823fe34 SN |
4083 | } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) { |
4084 | ||
4085 | /* Request a Firmware Reset | |
4086 | * | |
4087 | * Same as Global reset, plus restarting the | |
4088 | * embedded firmware engine. | |
4089 | */ | |
4090 | /* enable EMP Reset */ | |
4091 | val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP); | |
4092 | val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK; | |
4093 | wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val); | |
4094 | ||
4095 | /* force the reset */ | |
4096 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
4097 | val |= I40E_GLGEN_RTRIG_EMPFWR_MASK; | |
4098 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
4099 | i40e_flush(&pf->hw); | |
4100 | ||
41c445ff JB |
4101 | } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) { |
4102 | ||
4103 | /* Request a PF Reset | |
4104 | * | |
4105 | * Resets only the PF-specific registers | |
4106 | * | |
4107 | * This goes directly to the tear-down and rebuild of | |
4108 | * the switch, since we need to do all the recovery as | |
4109 | * for the Core Reset. | |
4110 | */ | |
4111 | dev_info(&pf->pdev->dev, "PFR requested\n"); | |
4112 | i40e_handle_reset_warning(pf); | |
4113 | ||
4114 | } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) { | |
4115 | int v; | |
4116 | ||
4117 | /* Find the VSI(s) that requested a re-init */ | |
4118 | dev_info(&pf->pdev->dev, | |
4119 | "VSI reinit requested\n"); | |
4120 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4121 | struct i40e_vsi *vsi = pf->vsi[v]; | |
4122 | if (vsi != NULL && | |
4123 | test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { | |
4124 | i40e_vsi_reinit_locked(pf->vsi[v]); | |
4125 | clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); | |
4126 | } | |
4127 | } | |
4128 | ||
4129 | /* no further action needed, so return now */ | |
4130 | return; | |
4131 | } else { | |
4132 | dev_info(&pf->pdev->dev, | |
4133 | "bad reset request 0x%08x\n", reset_flags); | |
4134 | return; | |
4135 | } | |
4136 | } | |
4137 | ||
23326186 ASJ |
4138 | /** |
4139 | * i40e_do_reset_safe - Protected reset path for userland calls. | |
4140 | * @pf: board private structure | |
4141 | * @reset_flags: which reset is requested | |
4142 | * | |
4143 | **/ | |
4144 | void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) | |
4145 | { | |
4146 | rtnl_lock(); | |
4147 | i40e_do_reset(pf, reset_flags); | |
4148 | rtnl_unlock(); | |
4149 | } | |
4150 | ||
41c445ff JB |
4151 | /** |
4152 | * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event | |
4153 | * @pf: board private structure | |
4154 | * @e: event info posted on ARQ | |
4155 | * | |
4156 | * Handler for LAN Queue Overflow Event generated by the firmware for PF | |
4157 | * and VF queues | |
4158 | **/ | |
4159 | static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, | |
4160 | struct i40e_arq_event_info *e) | |
4161 | { | |
4162 | struct i40e_aqc_lan_overflow *data = | |
4163 | (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; | |
4164 | u32 queue = le32_to_cpu(data->prtdcb_rupto); | |
4165 | u32 qtx_ctl = le32_to_cpu(data->otx_ctl); | |
4166 | struct i40e_hw *hw = &pf->hw; | |
4167 | struct i40e_vf *vf; | |
4168 | u16 vf_id; | |
4169 | ||
4170 | dev_info(&pf->pdev->dev, "%s: Rx Queue Number = %d QTX_CTL=0x%08x\n", | |
4171 | __func__, queue, qtx_ctl); | |
4172 | ||
4173 | /* Queue belongs to VF, find the VF and issue VF reset */ | |
4174 | if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) | |
4175 | >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { | |
4176 | vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) | |
4177 | >> I40E_QTX_CTL_VFVM_INDX_SHIFT); | |
4178 | vf_id -= hw->func_caps.vf_base_id; | |
4179 | vf = &pf->vf[vf_id]; | |
4180 | i40e_vc_notify_vf_reset(vf); | |
4181 | /* Allow VF to process pending reset notification */ | |
4182 | msleep(20); | |
4183 | i40e_reset_vf(vf, false); | |
4184 | } | |
4185 | } | |
4186 | ||
4187 | /** | |
4188 | * i40e_service_event_complete - Finish up the service event | |
4189 | * @pf: board private structure | |
4190 | **/ | |
4191 | static void i40e_service_event_complete(struct i40e_pf *pf) | |
4192 | { | |
4193 | BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); | |
4194 | ||
4195 | /* flush memory to make sure state is correct before next watchog */ | |
4196 | smp_mb__before_clear_bit(); | |
4197 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); | |
4198 | } | |
4199 | ||
4200 | /** | |
4201 | * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table | |
4202 | * @pf: board private structure | |
4203 | **/ | |
4204 | static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) | |
4205 | { | |
4206 | if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT)) | |
4207 | return; | |
4208 | ||
4209 | pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT; | |
4210 | ||
4211 | /* if interface is down do nothing */ | |
4212 | if (test_bit(__I40E_DOWN, &pf->state)) | |
4213 | return; | |
4214 | } | |
4215 | ||
4216 | /** | |
4217 | * i40e_vsi_link_event - notify VSI of a link event | |
4218 | * @vsi: vsi to be notified | |
4219 | * @link_up: link up or down | |
4220 | **/ | |
4221 | static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) | |
4222 | { | |
4223 | if (!vsi) | |
4224 | return; | |
4225 | ||
4226 | switch (vsi->type) { | |
4227 | case I40E_VSI_MAIN: | |
4228 | if (!vsi->netdev || !vsi->netdev_registered) | |
4229 | break; | |
4230 | ||
4231 | if (link_up) { | |
4232 | netif_carrier_on(vsi->netdev); | |
4233 | netif_tx_wake_all_queues(vsi->netdev); | |
4234 | } else { | |
4235 | netif_carrier_off(vsi->netdev); | |
4236 | netif_tx_stop_all_queues(vsi->netdev); | |
4237 | } | |
4238 | break; | |
4239 | ||
4240 | case I40E_VSI_SRIOV: | |
4241 | break; | |
4242 | ||
4243 | case I40E_VSI_VMDQ2: | |
4244 | case I40E_VSI_CTRL: | |
4245 | case I40E_VSI_MIRROR: | |
4246 | default: | |
4247 | /* there is no notification for other VSIs */ | |
4248 | break; | |
4249 | } | |
4250 | } | |
4251 | ||
4252 | /** | |
4253 | * i40e_veb_link_event - notify elements on the veb of a link event | |
4254 | * @veb: veb to be notified | |
4255 | * @link_up: link up or down | |
4256 | **/ | |
4257 | static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) | |
4258 | { | |
4259 | struct i40e_pf *pf; | |
4260 | int i; | |
4261 | ||
4262 | if (!veb || !veb->pf) | |
4263 | return; | |
4264 | pf = veb->pf; | |
4265 | ||
4266 | /* depth first... */ | |
4267 | for (i = 0; i < I40E_MAX_VEB; i++) | |
4268 | if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) | |
4269 | i40e_veb_link_event(pf->veb[i], link_up); | |
4270 | ||
4271 | /* ... now the local VSIs */ | |
4272 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
4273 | if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) | |
4274 | i40e_vsi_link_event(pf->vsi[i], link_up); | |
4275 | } | |
4276 | ||
4277 | /** | |
4278 | * i40e_link_event - Update netif_carrier status | |
4279 | * @pf: board private structure | |
4280 | **/ | |
4281 | static void i40e_link_event(struct i40e_pf *pf) | |
4282 | { | |
4283 | bool new_link, old_link; | |
4284 | ||
4285 | new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP); | |
4286 | old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); | |
4287 | ||
4288 | if (new_link == old_link) | |
4289 | return; | |
4290 | ||
6d779b41 AS |
4291 | if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state)) |
4292 | netdev_info(pf->vsi[pf->lan_vsi]->netdev, | |
4293 | "NIC Link is %s\n", (new_link ? "Up" : "Down")); | |
41c445ff JB |
4294 | |
4295 | /* Notify the base of the switch tree connected to | |
4296 | * the link. Floating VEBs are not notified. | |
4297 | */ | |
4298 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
4299 | i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); | |
4300 | else | |
4301 | i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link); | |
4302 | ||
4303 | if (pf->vf) | |
4304 | i40e_vc_notify_link_state(pf); | |
4305 | } | |
4306 | ||
4307 | /** | |
4308 | * i40e_check_hang_subtask - Check for hung queues and dropped interrupts | |
4309 | * @pf: board private structure | |
4310 | * | |
4311 | * Set the per-queue flags to request a check for stuck queues in the irq | |
4312 | * clean functions, then force interrupts to be sure the irq clean is called. | |
4313 | **/ | |
4314 | static void i40e_check_hang_subtask(struct i40e_pf *pf) | |
4315 | { | |
4316 | int i, v; | |
4317 | ||
4318 | /* If we're down or resetting, just bail */ | |
4319 | if (test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
4320 | return; | |
4321 | ||
4322 | /* for each VSI/netdev | |
4323 | * for each Tx queue | |
4324 | * set the check flag | |
4325 | * for each q_vector | |
4326 | * force an interrupt | |
4327 | */ | |
4328 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4329 | struct i40e_vsi *vsi = pf->vsi[v]; | |
4330 | int armed = 0; | |
4331 | ||
4332 | if (!pf->vsi[v] || | |
4333 | test_bit(__I40E_DOWN, &vsi->state) || | |
4334 | (vsi->netdev && !netif_carrier_ok(vsi->netdev))) | |
4335 | continue; | |
4336 | ||
4337 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b | 4338 | set_check_for_tx_hang(vsi->tx_rings[i]); |
41c445ff | 4339 | if (test_bit(__I40E_HANG_CHECK_ARMED, |
9f65e15b | 4340 | &vsi->tx_rings[i]->state)) |
41c445ff JB |
4341 | armed++; |
4342 | } | |
4343 | ||
4344 | if (armed) { | |
4345 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) { | |
4346 | wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, | |
4347 | (I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
4348 | I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK)); | |
4349 | } else { | |
4350 | u16 vec = vsi->base_vector - 1; | |
4351 | u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK | | |
4352 | I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK); | |
4353 | for (i = 0; i < vsi->num_q_vectors; i++, vec++) | |
4354 | wr32(&vsi->back->hw, | |
4355 | I40E_PFINT_DYN_CTLN(vec), val); | |
4356 | } | |
4357 | i40e_flush(&vsi->back->hw); | |
4358 | } | |
4359 | } | |
4360 | } | |
4361 | ||
4362 | /** | |
4363 | * i40e_watchdog_subtask - Check and bring link up | |
4364 | * @pf: board private structure | |
4365 | **/ | |
4366 | static void i40e_watchdog_subtask(struct i40e_pf *pf) | |
4367 | { | |
4368 | int i; | |
4369 | ||
4370 | /* if interface is down do nothing */ | |
4371 | if (test_bit(__I40E_DOWN, &pf->state) || | |
4372 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
4373 | return; | |
4374 | ||
4375 | /* Update the stats for active netdevs so the network stack | |
4376 | * can look at updated numbers whenever it cares to | |
4377 | */ | |
4378 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
4379 | if (pf->vsi[i] && pf->vsi[i]->netdev) | |
4380 | i40e_update_stats(pf->vsi[i]); | |
4381 | ||
4382 | /* Update the stats for the active switching components */ | |
4383 | for (i = 0; i < I40E_MAX_VEB; i++) | |
4384 | if (pf->veb[i]) | |
4385 | i40e_update_veb_stats(pf->veb[i]); | |
4386 | } | |
4387 | ||
4388 | /** | |
4389 | * i40e_reset_subtask - Set up for resetting the device and driver | |
4390 | * @pf: board private structure | |
4391 | **/ | |
4392 | static void i40e_reset_subtask(struct i40e_pf *pf) | |
4393 | { | |
4394 | u32 reset_flags = 0; | |
4395 | ||
23326186 | 4396 | rtnl_lock(); |
41c445ff JB |
4397 | if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { |
4398 | reset_flags |= (1 << __I40E_REINIT_REQUESTED); | |
4399 | clear_bit(__I40E_REINIT_REQUESTED, &pf->state); | |
4400 | } | |
4401 | if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { | |
4402 | reset_flags |= (1 << __I40E_PF_RESET_REQUESTED); | |
4403 | clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
4404 | } | |
4405 | if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { | |
4406 | reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED); | |
4407 | clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); | |
4408 | } | |
4409 | if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { | |
4410 | reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED); | |
4411 | clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); | |
4412 | } | |
4413 | ||
4414 | /* If there's a recovery already waiting, it takes | |
4415 | * precedence before starting a new reset sequence. | |
4416 | */ | |
4417 | if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { | |
4418 | i40e_handle_reset_warning(pf); | |
23326186 | 4419 | goto unlock; |
41c445ff JB |
4420 | } |
4421 | ||
4422 | /* If we're already down or resetting, just bail */ | |
4423 | if (reset_flags && | |
4424 | !test_bit(__I40E_DOWN, &pf->state) && | |
4425 | !test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
4426 | i40e_do_reset(pf, reset_flags); | |
23326186 ASJ |
4427 | |
4428 | unlock: | |
4429 | rtnl_unlock(); | |
41c445ff JB |
4430 | } |
4431 | ||
4432 | /** | |
4433 | * i40e_handle_link_event - Handle link event | |
4434 | * @pf: board private structure | |
4435 | * @e: event info posted on ARQ | |
4436 | **/ | |
4437 | static void i40e_handle_link_event(struct i40e_pf *pf, | |
4438 | struct i40e_arq_event_info *e) | |
4439 | { | |
4440 | struct i40e_hw *hw = &pf->hw; | |
4441 | struct i40e_aqc_get_link_status *status = | |
4442 | (struct i40e_aqc_get_link_status *)&e->desc.params.raw; | |
4443 | struct i40e_link_status *hw_link_info = &hw->phy.link_info; | |
4444 | ||
4445 | /* save off old link status information */ | |
4446 | memcpy(&pf->hw.phy.link_info_old, hw_link_info, | |
4447 | sizeof(pf->hw.phy.link_info_old)); | |
4448 | ||
4449 | /* update link status */ | |
4450 | hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type; | |
4451 | hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed; | |
4452 | hw_link_info->link_info = status->link_info; | |
4453 | hw_link_info->an_info = status->an_info; | |
4454 | hw_link_info->ext_info = status->ext_info; | |
4455 | hw_link_info->lse_enable = | |
4456 | le16_to_cpu(status->command_flags) & | |
4457 | I40E_AQ_LSE_ENABLE; | |
4458 | ||
4459 | /* process the event */ | |
4460 | i40e_link_event(pf); | |
4461 | ||
4462 | /* Do a new status request to re-enable LSE reporting | |
4463 | * and load new status information into the hw struct, | |
4464 | * then see if the status changed while processing the | |
4465 | * initial event. | |
4466 | */ | |
4467 | i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); | |
4468 | i40e_link_event(pf); | |
4469 | } | |
4470 | ||
4471 | /** | |
4472 | * i40e_clean_adminq_subtask - Clean the AdminQ rings | |
4473 | * @pf: board private structure | |
4474 | **/ | |
4475 | static void i40e_clean_adminq_subtask(struct i40e_pf *pf) | |
4476 | { | |
4477 | struct i40e_arq_event_info event; | |
4478 | struct i40e_hw *hw = &pf->hw; | |
4479 | u16 pending, i = 0; | |
4480 | i40e_status ret; | |
4481 | u16 opcode; | |
4482 | u32 val; | |
4483 | ||
4484 | if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state)) | |
4485 | return; | |
4486 | ||
4487 | event.msg_size = I40E_MAX_AQ_BUF_SIZE; | |
4488 | event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL); | |
4489 | if (!event.msg_buf) | |
4490 | return; | |
4491 | ||
4492 | do { | |
4493 | ret = i40e_clean_arq_element(hw, &event, &pending); | |
4494 | if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) { | |
4495 | dev_info(&pf->pdev->dev, "No ARQ event found\n"); | |
4496 | break; | |
4497 | } else if (ret) { | |
4498 | dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); | |
4499 | break; | |
4500 | } | |
4501 | ||
4502 | opcode = le16_to_cpu(event.desc.opcode); | |
4503 | switch (opcode) { | |
4504 | ||
4505 | case i40e_aqc_opc_get_link_status: | |
4506 | i40e_handle_link_event(pf, &event); | |
4507 | break; | |
4508 | case i40e_aqc_opc_send_msg_to_pf: | |
4509 | ret = i40e_vc_process_vf_msg(pf, | |
4510 | le16_to_cpu(event.desc.retval), | |
4511 | le32_to_cpu(event.desc.cookie_high), | |
4512 | le32_to_cpu(event.desc.cookie_low), | |
4513 | event.msg_buf, | |
4514 | event.msg_size); | |
4515 | break; | |
4516 | case i40e_aqc_opc_lldp_update_mib: | |
4517 | dev_info(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); | |
4518 | break; | |
4519 | case i40e_aqc_opc_event_lan_overflow: | |
4520 | dev_info(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); | |
4521 | i40e_handle_lan_overflow_event(pf, &event); | |
4522 | break; | |
4523 | default: | |
4524 | dev_info(&pf->pdev->dev, | |
4525 | "ARQ Error: Unknown event %d received\n", | |
4526 | event.desc.opcode); | |
4527 | break; | |
4528 | } | |
4529 | } while (pending && (i++ < pf->adminq_work_limit)); | |
4530 | ||
4531 | clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
4532 | /* re-enable Admin queue interrupt cause */ | |
4533 | val = rd32(hw, I40E_PFINT_ICR0_ENA); | |
4534 | val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
4535 | wr32(hw, I40E_PFINT_ICR0_ENA, val); | |
4536 | i40e_flush(hw); | |
4537 | ||
4538 | kfree(event.msg_buf); | |
4539 | } | |
4540 | ||
4541 | /** | |
4542 | * i40e_reconstitute_veb - rebuild the VEB and anything connected to it | |
4543 | * @veb: pointer to the VEB instance | |
4544 | * | |
4545 | * This is a recursive function that first builds the attached VSIs then | |
4546 | * recurses in to build the next layer of VEB. We track the connections | |
4547 | * through our own index numbers because the seid's from the HW could | |
4548 | * change across the reset. | |
4549 | **/ | |
4550 | static int i40e_reconstitute_veb(struct i40e_veb *veb) | |
4551 | { | |
4552 | struct i40e_vsi *ctl_vsi = NULL; | |
4553 | struct i40e_pf *pf = veb->pf; | |
4554 | int v, veb_idx; | |
4555 | int ret; | |
4556 | ||
4557 | /* build VSI that owns this VEB, temporarily attached to base VEB */ | |
4558 | for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) { | |
4559 | if (pf->vsi[v] && | |
4560 | pf->vsi[v]->veb_idx == veb->idx && | |
4561 | pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
4562 | ctl_vsi = pf->vsi[v]; | |
4563 | break; | |
4564 | } | |
4565 | } | |
4566 | if (!ctl_vsi) { | |
4567 | dev_info(&pf->pdev->dev, | |
4568 | "missing owner VSI for veb_idx %d\n", veb->idx); | |
4569 | ret = -ENOENT; | |
4570 | goto end_reconstitute; | |
4571 | } | |
4572 | if (ctl_vsi != pf->vsi[pf->lan_vsi]) | |
4573 | ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
4574 | ret = i40e_add_vsi(ctl_vsi); | |
4575 | if (ret) { | |
4576 | dev_info(&pf->pdev->dev, | |
4577 | "rebuild of owner VSI failed: %d\n", ret); | |
4578 | goto end_reconstitute; | |
4579 | } | |
4580 | i40e_vsi_reset_stats(ctl_vsi); | |
4581 | ||
4582 | /* create the VEB in the switch and move the VSI onto the VEB */ | |
4583 | ret = i40e_add_veb(veb, ctl_vsi); | |
4584 | if (ret) | |
4585 | goto end_reconstitute; | |
4586 | ||
4587 | /* create the remaining VSIs attached to this VEB */ | |
4588 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4589 | if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) | |
4590 | continue; | |
4591 | ||
4592 | if (pf->vsi[v]->veb_idx == veb->idx) { | |
4593 | struct i40e_vsi *vsi = pf->vsi[v]; | |
4594 | vsi->uplink_seid = veb->seid; | |
4595 | ret = i40e_add_vsi(vsi); | |
4596 | if (ret) { | |
4597 | dev_info(&pf->pdev->dev, | |
4598 | "rebuild of vsi_idx %d failed: %d\n", | |
4599 | v, ret); | |
4600 | goto end_reconstitute; | |
4601 | } | |
4602 | i40e_vsi_reset_stats(vsi); | |
4603 | } | |
4604 | } | |
4605 | ||
4606 | /* create any VEBs attached to this VEB - RECURSION */ | |
4607 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
4608 | if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { | |
4609 | pf->veb[veb_idx]->uplink_seid = veb->seid; | |
4610 | ret = i40e_reconstitute_veb(pf->veb[veb_idx]); | |
4611 | if (ret) | |
4612 | break; | |
4613 | } | |
4614 | } | |
4615 | ||
4616 | end_reconstitute: | |
4617 | return ret; | |
4618 | } | |
4619 | ||
4620 | /** | |
4621 | * i40e_get_capabilities - get info about the HW | |
4622 | * @pf: the PF struct | |
4623 | **/ | |
4624 | static int i40e_get_capabilities(struct i40e_pf *pf) | |
4625 | { | |
4626 | struct i40e_aqc_list_capabilities_element_resp *cap_buf; | |
4627 | u16 data_size; | |
4628 | int buf_len; | |
4629 | int err; | |
4630 | ||
4631 | buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); | |
4632 | do { | |
4633 | cap_buf = kzalloc(buf_len, GFP_KERNEL); | |
4634 | if (!cap_buf) | |
4635 | return -ENOMEM; | |
4636 | ||
4637 | /* this loads the data into the hw struct for us */ | |
4638 | err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, | |
4639 | &data_size, | |
4640 | i40e_aqc_opc_list_func_capabilities, | |
4641 | NULL); | |
4642 | /* data loaded, buffer no longer needed */ | |
4643 | kfree(cap_buf); | |
4644 | ||
4645 | if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { | |
4646 | /* retry with a larger buffer */ | |
4647 | buf_len = data_size; | |
4648 | } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { | |
4649 | dev_info(&pf->pdev->dev, | |
4650 | "capability discovery failed: aq=%d\n", | |
4651 | pf->hw.aq.asq_last_status); | |
4652 | return -ENODEV; | |
4653 | } | |
4654 | } while (err); | |
4655 | ||
7134f9ce JB |
4656 | if (pf->hw.revision_id == 0 && pf->hw.func_caps.npar_enable) { |
4657 | pf->hw.func_caps.num_msix_vectors += 1; | |
4658 | pf->hw.func_caps.num_tx_qp = | |
4659 | min_t(int, pf->hw.func_caps.num_tx_qp, | |
4660 | I40E_MAX_NPAR_QPS); | |
4661 | } | |
4662 | ||
41c445ff JB |
4663 | if (pf->hw.debug_mask & I40E_DEBUG_USER) |
4664 | dev_info(&pf->pdev->dev, | |
4665 | "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", | |
4666 | pf->hw.pf_id, pf->hw.func_caps.num_vfs, | |
4667 | pf->hw.func_caps.num_msix_vectors, | |
4668 | pf->hw.func_caps.num_msix_vectors_vf, | |
4669 | pf->hw.func_caps.fd_filters_guaranteed, | |
4670 | pf->hw.func_caps.fd_filters_best_effort, | |
4671 | pf->hw.func_caps.num_tx_qp, | |
4672 | pf->hw.func_caps.num_vsis); | |
4673 | ||
7134f9ce JB |
4674 | #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ |
4675 | + pf->hw.func_caps.num_vfs) | |
4676 | if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { | |
4677 | dev_info(&pf->pdev->dev, | |
4678 | "got num_vsis %d, setting num_vsis to %d\n", | |
4679 | pf->hw.func_caps.num_vsis, DEF_NUM_VSI); | |
4680 | pf->hw.func_caps.num_vsis = DEF_NUM_VSI; | |
4681 | } | |
4682 | ||
41c445ff JB |
4683 | return 0; |
4684 | } | |
4685 | ||
4686 | /** | |
4687 | * i40e_fdir_setup - initialize the Flow Director resources | |
4688 | * @pf: board private structure | |
4689 | **/ | |
4690 | static void i40e_fdir_setup(struct i40e_pf *pf) | |
4691 | { | |
4692 | struct i40e_vsi *vsi; | |
4693 | bool new_vsi = false; | |
4694 | int err, i; | |
4695 | ||
958a3e3b SN |
4696 | if (!(pf->flags & (I40E_FLAG_FDIR_ENABLED | |
4697 | I40E_FLAG_FDIR_ATR_ENABLED))) | |
41c445ff JB |
4698 | return; |
4699 | ||
4700 | pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; | |
4701 | ||
4702 | /* find existing or make new FDIR VSI */ | |
4703 | vsi = NULL; | |
4704 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) | |
4705 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) | |
4706 | vsi = pf->vsi[i]; | |
4707 | if (!vsi) { | |
4708 | vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, pf->mac_seid, 0); | |
4709 | if (!vsi) { | |
4710 | dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); | |
4711 | pf->flags &= ~I40E_FLAG_FDIR_ENABLED; | |
4712 | return; | |
4713 | } | |
4714 | new_vsi = true; | |
4715 | } | |
4716 | WARN_ON(vsi->base_queue != I40E_FDIR_RING); | |
4717 | i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_rings); | |
4718 | ||
4719 | err = i40e_vsi_setup_tx_resources(vsi); | |
4720 | if (!err) | |
4721 | err = i40e_vsi_setup_rx_resources(vsi); | |
4722 | if (!err) | |
4723 | err = i40e_vsi_configure(vsi); | |
4724 | if (!err && new_vsi) { | |
4725 | char int_name[IFNAMSIZ + 9]; | |
4726 | snprintf(int_name, sizeof(int_name) - 1, "%s-fdir", | |
4727 | dev_driver_string(&pf->pdev->dev)); | |
4728 | err = i40e_vsi_request_irq(vsi, int_name); | |
4729 | } | |
4730 | if (!err) | |
4731 | err = i40e_up_complete(vsi); | |
4732 | ||
4733 | clear_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
4734 | } | |
4735 | ||
4736 | /** | |
4737 | * i40e_fdir_teardown - release the Flow Director resources | |
4738 | * @pf: board private structure | |
4739 | **/ | |
4740 | static void i40e_fdir_teardown(struct i40e_pf *pf) | |
4741 | { | |
4742 | int i; | |
4743 | ||
4744 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
4745 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { | |
4746 | i40e_vsi_release(pf->vsi[i]); | |
4747 | break; | |
4748 | } | |
4749 | } | |
4750 | } | |
4751 | ||
4752 | /** | |
f650a38b | 4753 | * i40e_prep_for_reset - prep for the core to reset |
41c445ff JB |
4754 | * @pf: board private structure |
4755 | * | |
f650a38b ASJ |
4756 | * Close up the VFs and other things in prep for pf Reset. |
4757 | **/ | |
4758 | static int i40e_prep_for_reset(struct i40e_pf *pf) | |
41c445ff | 4759 | { |
41c445ff JB |
4760 | struct i40e_hw *hw = &pf->hw; |
4761 | i40e_status ret; | |
4762 | u32 v; | |
4763 | ||
4764 | clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
4765 | if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
f650a38b | 4766 | return 0; |
41c445ff JB |
4767 | |
4768 | dev_info(&pf->pdev->dev, "Tearing down internal switch for reset\n"); | |
4769 | ||
4770 | i40e_vc_notify_reset(pf); | |
4771 | ||
4772 | /* quiesce the VSIs and their queues that are not already DOWN */ | |
4773 | i40e_pf_quiesce_all_vsi(pf); | |
4774 | ||
4775 | for (v = 0; v < pf->hw.func_caps.num_vsis; v++) { | |
4776 | if (pf->vsi[v]) | |
4777 | pf->vsi[v]->seid = 0; | |
4778 | } | |
4779 | ||
4780 | i40e_shutdown_adminq(&pf->hw); | |
4781 | ||
f650a38b ASJ |
4782 | /* call shutdown HMC */ |
4783 | ret = i40e_shutdown_lan_hmc(hw); | |
4784 | if (ret) { | |
4785 | dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret); | |
4786 | clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); | |
4787 | } | |
4788 | return ret; | |
4789 | } | |
4790 | ||
4791 | /** | |
4792 | * i40e_reset_and_rebuild - reset and rebuid using a saved config | |
4793 | * @pf: board private structure | |
bc7d338f | 4794 | * @reinit: if the Main VSI needs to re-initialized. |
f650a38b | 4795 | **/ |
bc7d338f | 4796 | static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) |
f650a38b ASJ |
4797 | { |
4798 | struct i40e_driver_version dv; | |
4799 | struct i40e_hw *hw = &pf->hw; | |
4800 | i40e_status ret; | |
4801 | u32 v; | |
4802 | ||
41c445ff JB |
4803 | /* Now we wait for GRST to settle out. |
4804 | * We don't have to delete the VEBs or VSIs from the hw switch | |
4805 | * because the reset will make them disappear. | |
4806 | */ | |
4807 | ret = i40e_pf_reset(hw); | |
4808 | if (ret) | |
4809 | dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); | |
4810 | pf->pfr_count++; | |
4811 | ||
4812 | if (test_bit(__I40E_DOWN, &pf->state)) | |
4813 | goto end_core_reset; | |
4814 | dev_info(&pf->pdev->dev, "Rebuilding internal switch\n"); | |
4815 | ||
4816 | /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ | |
4817 | ret = i40e_init_adminq(&pf->hw); | |
4818 | if (ret) { | |
4819 | dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret); | |
4820 | goto end_core_reset; | |
4821 | } | |
4822 | ||
4823 | ret = i40e_get_capabilities(pf); | |
4824 | if (ret) { | |
4825 | dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n", | |
4826 | ret); | |
4827 | goto end_core_reset; | |
4828 | } | |
4829 | ||
41c445ff JB |
4830 | ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, |
4831 | hw->func_caps.num_rx_qp, | |
4832 | pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); | |
4833 | if (ret) { | |
4834 | dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); | |
4835 | goto end_core_reset; | |
4836 | } | |
4837 | ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
4838 | if (ret) { | |
4839 | dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); | |
4840 | goto end_core_reset; | |
4841 | } | |
4842 | ||
4843 | /* do basic switch setup */ | |
bc7d338f | 4844 | ret = i40e_setup_pf_switch(pf, reinit); |
41c445ff JB |
4845 | if (ret) |
4846 | goto end_core_reset; | |
4847 | ||
4848 | /* Rebuild the VSIs and VEBs that existed before reset. | |
4849 | * They are still in our local switch element arrays, so only | |
4850 | * need to rebuild the switch model in the HW. | |
4851 | * | |
4852 | * If there were VEBs but the reconstitution failed, we'll try | |
4853 | * try to recover minimal use by getting the basic PF VSI working. | |
4854 | */ | |
4855 | if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { | |
4856 | dev_info(&pf->pdev->dev, "attempting to rebuild switch\n"); | |
4857 | /* find the one VEB connected to the MAC, and find orphans */ | |
4858 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
4859 | if (!pf->veb[v]) | |
4860 | continue; | |
4861 | ||
4862 | if (pf->veb[v]->uplink_seid == pf->mac_seid || | |
4863 | pf->veb[v]->uplink_seid == 0) { | |
4864 | ret = i40e_reconstitute_veb(pf->veb[v]); | |
4865 | ||
4866 | if (!ret) | |
4867 | continue; | |
4868 | ||
4869 | /* If Main VEB failed, we're in deep doodoo, | |
4870 | * so give up rebuilding the switch and set up | |
4871 | * for minimal rebuild of PF VSI. | |
4872 | * If orphan failed, we'll report the error | |
4873 | * but try to keep going. | |
4874 | */ | |
4875 | if (pf->veb[v]->uplink_seid == pf->mac_seid) { | |
4876 | dev_info(&pf->pdev->dev, | |
4877 | "rebuild of switch failed: %d, will try to set up simple PF connection\n", | |
4878 | ret); | |
4879 | pf->vsi[pf->lan_vsi]->uplink_seid | |
4880 | = pf->mac_seid; | |
4881 | break; | |
4882 | } else if (pf->veb[v]->uplink_seid == 0) { | |
4883 | dev_info(&pf->pdev->dev, | |
4884 | "rebuild of orphan VEB failed: %d\n", | |
4885 | ret); | |
4886 | } | |
4887 | } | |
4888 | } | |
4889 | } | |
4890 | ||
4891 | if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { | |
4892 | dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); | |
4893 | /* no VEB, so rebuild only the Main VSI */ | |
4894 | ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); | |
4895 | if (ret) { | |
4896 | dev_info(&pf->pdev->dev, | |
4897 | "rebuild of Main VSI failed: %d\n", ret); | |
4898 | goto end_core_reset; | |
4899 | } | |
4900 | } | |
4901 | ||
4902 | /* reinit the misc interrupt */ | |
4903 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
4904 | ret = i40e_setup_misc_vector(pf); | |
4905 | ||
4906 | /* restart the VSIs that were rebuilt and running before the reset */ | |
4907 | i40e_pf_unquiesce_all_vsi(pf); | |
4908 | ||
4909 | /* tell the firmware that we're starting */ | |
4910 | dv.major_version = DRV_VERSION_MAJOR; | |
4911 | dv.minor_version = DRV_VERSION_MINOR; | |
4912 | dv.build_version = DRV_VERSION_BUILD; | |
4913 | dv.subbuild_version = 0; | |
4914 | i40e_aq_send_driver_version(&pf->hw, &dv, NULL); | |
4915 | ||
4916 | dev_info(&pf->pdev->dev, "PF reset done\n"); | |
4917 | ||
4918 | end_core_reset: | |
4919 | clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); | |
4920 | } | |
4921 | ||
f650a38b ASJ |
4922 | /** |
4923 | * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild | |
4924 | * @pf: board private structure | |
4925 | * | |
4926 | * Close up the VFs and other things in prep for a Core Reset, | |
4927 | * then get ready to rebuild the world. | |
4928 | **/ | |
4929 | static void i40e_handle_reset_warning(struct i40e_pf *pf) | |
4930 | { | |
4931 | i40e_status ret; | |
4932 | ||
4933 | ret = i40e_prep_for_reset(pf); | |
4934 | if (!ret) | |
bc7d338f | 4935 | i40e_reset_and_rebuild(pf, false); |
f650a38b ASJ |
4936 | } |
4937 | ||
41c445ff JB |
4938 | /** |
4939 | * i40e_handle_mdd_event | |
4940 | * @pf: pointer to the pf structure | |
4941 | * | |
4942 | * Called from the MDD irq handler to identify possibly malicious vfs | |
4943 | **/ | |
4944 | static void i40e_handle_mdd_event(struct i40e_pf *pf) | |
4945 | { | |
4946 | struct i40e_hw *hw = &pf->hw; | |
4947 | bool mdd_detected = false; | |
4948 | struct i40e_vf *vf; | |
4949 | u32 reg; | |
4950 | int i; | |
4951 | ||
4952 | if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) | |
4953 | return; | |
4954 | ||
4955 | /* find what triggered the MDD event */ | |
4956 | reg = rd32(hw, I40E_GL_MDET_TX); | |
4957 | if (reg & I40E_GL_MDET_TX_VALID_MASK) { | |
4958 | u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK) | |
4959 | >> I40E_GL_MDET_TX_FUNCTION_SHIFT; | |
4960 | u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT) | |
4961 | >> I40E_GL_MDET_TX_EVENT_SHIFT; | |
4962 | u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) | |
4963 | >> I40E_GL_MDET_TX_QUEUE_SHIFT; | |
4964 | dev_info(&pf->pdev->dev, | |
4965 | "Malicious Driver Detection TX event 0x%02x on q %d of function 0x%02x\n", | |
4966 | event, queue, func); | |
4967 | wr32(hw, I40E_GL_MDET_TX, 0xffffffff); | |
4968 | mdd_detected = true; | |
4969 | } | |
4970 | reg = rd32(hw, I40E_GL_MDET_RX); | |
4971 | if (reg & I40E_GL_MDET_RX_VALID_MASK) { | |
4972 | u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) | |
4973 | >> I40E_GL_MDET_RX_FUNCTION_SHIFT; | |
4974 | u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT) | |
4975 | >> I40E_GL_MDET_RX_EVENT_SHIFT; | |
4976 | u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) | |
4977 | >> I40E_GL_MDET_RX_QUEUE_SHIFT; | |
4978 | dev_info(&pf->pdev->dev, | |
4979 | "Malicious Driver Detection RX event 0x%02x on q %d of function 0x%02x\n", | |
4980 | event, queue, func); | |
4981 | wr32(hw, I40E_GL_MDET_RX, 0xffffffff); | |
4982 | mdd_detected = true; | |
4983 | } | |
4984 | ||
4985 | /* see if one of the VFs needs its hand slapped */ | |
4986 | for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { | |
4987 | vf = &(pf->vf[i]); | |
4988 | reg = rd32(hw, I40E_VP_MDET_TX(i)); | |
4989 | if (reg & I40E_VP_MDET_TX_VALID_MASK) { | |
4990 | wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); | |
4991 | vf->num_mdd_events++; | |
4992 | dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i); | |
4993 | } | |
4994 | ||
4995 | reg = rd32(hw, I40E_VP_MDET_RX(i)); | |
4996 | if (reg & I40E_VP_MDET_RX_VALID_MASK) { | |
4997 | wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); | |
4998 | vf->num_mdd_events++; | |
4999 | dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i); | |
5000 | } | |
5001 | ||
5002 | if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { | |
5003 | dev_info(&pf->pdev->dev, | |
5004 | "Too many MDD events on VF %d, disabled\n", i); | |
5005 | dev_info(&pf->pdev->dev, | |
5006 | "Use PF Control I/F to re-enable the VF\n"); | |
5007 | set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); | |
5008 | } | |
5009 | } | |
5010 | ||
5011 | /* re-enable mdd interrupt cause */ | |
5012 | clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
5013 | reg = rd32(hw, I40E_PFINT_ICR0_ENA); | |
5014 | reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
5015 | wr32(hw, I40E_PFINT_ICR0_ENA, reg); | |
5016 | i40e_flush(hw); | |
5017 | } | |
5018 | ||
5019 | /** | |
5020 | * i40e_service_task - Run the driver's async subtasks | |
5021 | * @work: pointer to work_struct containing our data | |
5022 | **/ | |
5023 | static void i40e_service_task(struct work_struct *work) | |
5024 | { | |
5025 | struct i40e_pf *pf = container_of(work, | |
5026 | struct i40e_pf, | |
5027 | service_task); | |
5028 | unsigned long start_time = jiffies; | |
5029 | ||
5030 | i40e_reset_subtask(pf); | |
5031 | i40e_handle_mdd_event(pf); | |
5032 | i40e_vc_process_vflr_event(pf); | |
5033 | i40e_watchdog_subtask(pf); | |
5034 | i40e_fdir_reinit_subtask(pf); | |
5035 | i40e_check_hang_subtask(pf); | |
5036 | i40e_sync_filters_subtask(pf); | |
5037 | i40e_clean_adminq_subtask(pf); | |
5038 | ||
5039 | i40e_service_event_complete(pf); | |
5040 | ||
5041 | /* If the tasks have taken longer than one timer cycle or there | |
5042 | * is more work to be done, reschedule the service task now | |
5043 | * rather than wait for the timer to tick again. | |
5044 | */ | |
5045 | if (time_after(jiffies, (start_time + pf->service_timer_period)) || | |
5046 | test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || | |
5047 | test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || | |
5048 | test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) | |
5049 | i40e_service_event_schedule(pf); | |
5050 | } | |
5051 | ||
5052 | /** | |
5053 | * i40e_service_timer - timer callback | |
5054 | * @data: pointer to PF struct | |
5055 | **/ | |
5056 | static void i40e_service_timer(unsigned long data) | |
5057 | { | |
5058 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
5059 | ||
5060 | mod_timer(&pf->service_timer, | |
5061 | round_jiffies(jiffies + pf->service_timer_period)); | |
5062 | i40e_service_event_schedule(pf); | |
5063 | } | |
5064 | ||
5065 | /** | |
5066 | * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI | |
5067 | * @vsi: the VSI being configured | |
5068 | **/ | |
5069 | static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) | |
5070 | { | |
5071 | struct i40e_pf *pf = vsi->back; | |
5072 | ||
5073 | switch (vsi->type) { | |
5074 | case I40E_VSI_MAIN: | |
5075 | vsi->alloc_queue_pairs = pf->num_lan_qps; | |
5076 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
5077 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
5078 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
5079 | vsi->num_q_vectors = pf->num_lan_msix; | |
5080 | else | |
5081 | vsi->num_q_vectors = 1; | |
5082 | ||
5083 | break; | |
5084 | ||
5085 | case I40E_VSI_FDIR: | |
5086 | vsi->alloc_queue_pairs = 1; | |
5087 | vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, | |
5088 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
5089 | vsi->num_q_vectors = 1; | |
5090 | break; | |
5091 | ||
5092 | case I40E_VSI_VMDQ2: | |
5093 | vsi->alloc_queue_pairs = pf->num_vmdq_qps; | |
5094 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
5095 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
5096 | vsi->num_q_vectors = pf->num_vmdq_msix; | |
5097 | break; | |
5098 | ||
5099 | case I40E_VSI_SRIOV: | |
5100 | vsi->alloc_queue_pairs = pf->num_vf_qps; | |
5101 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
5102 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
5103 | break; | |
5104 | ||
5105 | default: | |
5106 | WARN_ON(1); | |
5107 | return -ENODATA; | |
5108 | } | |
5109 | ||
5110 | return 0; | |
5111 | } | |
5112 | ||
f650a38b ASJ |
5113 | /** |
5114 | * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi | |
5115 | * @type: VSI pointer | |
bc7d338f | 5116 | * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. |
f650a38b ASJ |
5117 | * |
5118 | * On error: returns error code (negative) | |
5119 | * On success: returns 0 | |
5120 | **/ | |
bc7d338f | 5121 | static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) |
f650a38b ASJ |
5122 | { |
5123 | int size; | |
5124 | int ret = 0; | |
5125 | ||
ac6c5e3d | 5126 | /* allocate memory for both Tx and Rx ring pointers */ |
f650a38b ASJ |
5127 | size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; |
5128 | vsi->tx_rings = kzalloc(size, GFP_KERNEL); | |
5129 | if (!vsi->tx_rings) | |
5130 | return -ENOMEM; | |
f650a38b ASJ |
5131 | vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; |
5132 | ||
bc7d338f ASJ |
5133 | if (alloc_qvectors) { |
5134 | /* allocate memory for q_vector pointers */ | |
5135 | size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors; | |
5136 | vsi->q_vectors = kzalloc(size, GFP_KERNEL); | |
5137 | if (!vsi->q_vectors) { | |
5138 | ret = -ENOMEM; | |
5139 | goto err_vectors; | |
5140 | } | |
f650a38b ASJ |
5141 | } |
5142 | return ret; | |
5143 | ||
5144 | err_vectors: | |
5145 | kfree(vsi->tx_rings); | |
5146 | return ret; | |
5147 | } | |
5148 | ||
41c445ff JB |
5149 | /** |
5150 | * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF | |
5151 | * @pf: board private structure | |
5152 | * @type: type of VSI | |
5153 | * | |
5154 | * On error: returns error code (negative) | |
5155 | * On success: returns vsi index in PF (positive) | |
5156 | **/ | |
5157 | static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) | |
5158 | { | |
5159 | int ret = -ENODEV; | |
5160 | struct i40e_vsi *vsi; | |
5161 | int vsi_idx; | |
5162 | int i; | |
5163 | ||
5164 | /* Need to protect the allocation of the VSIs at the PF level */ | |
5165 | mutex_lock(&pf->switch_mutex); | |
5166 | ||
5167 | /* VSI list may be fragmented if VSI creation/destruction has | |
5168 | * been happening. We can afford to do a quick scan to look | |
5169 | * for any free VSIs in the list. | |
5170 | * | |
5171 | * find next empty vsi slot, looping back around if necessary | |
5172 | */ | |
5173 | i = pf->next_vsi; | |
5174 | while (i < pf->hw.func_caps.num_vsis && pf->vsi[i]) | |
5175 | i++; | |
5176 | if (i >= pf->hw.func_caps.num_vsis) { | |
5177 | i = 0; | |
5178 | while (i < pf->next_vsi && pf->vsi[i]) | |
5179 | i++; | |
5180 | } | |
5181 | ||
5182 | if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) { | |
5183 | vsi_idx = i; /* Found one! */ | |
5184 | } else { | |
5185 | ret = -ENODEV; | |
493fb300 | 5186 | goto unlock_pf; /* out of VSI slots! */ |
41c445ff JB |
5187 | } |
5188 | pf->next_vsi = ++i; | |
5189 | ||
5190 | vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); | |
5191 | if (!vsi) { | |
5192 | ret = -ENOMEM; | |
493fb300 | 5193 | goto unlock_pf; |
41c445ff JB |
5194 | } |
5195 | vsi->type = type; | |
5196 | vsi->back = pf; | |
5197 | set_bit(__I40E_DOWN, &vsi->state); | |
5198 | vsi->flags = 0; | |
5199 | vsi->idx = vsi_idx; | |
5200 | vsi->rx_itr_setting = pf->rx_itr_default; | |
5201 | vsi->tx_itr_setting = pf->tx_itr_default; | |
5202 | vsi->netdev_registered = false; | |
5203 | vsi->work_limit = I40E_DEFAULT_IRQ_WORK; | |
5204 | INIT_LIST_HEAD(&vsi->mac_filter_list); | |
5205 | ||
9f65e15b AD |
5206 | ret = i40e_set_num_rings_in_vsi(vsi); |
5207 | if (ret) | |
5208 | goto err_rings; | |
5209 | ||
bc7d338f | 5210 | ret = i40e_vsi_alloc_arrays(vsi, true); |
f650a38b | 5211 | if (ret) |
9f65e15b | 5212 | goto err_rings; |
493fb300 | 5213 | |
41c445ff JB |
5214 | /* Setup default MSIX irq handler for VSI */ |
5215 | i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); | |
5216 | ||
5217 | pf->vsi[vsi_idx] = vsi; | |
5218 | ret = vsi_idx; | |
493fb300 AD |
5219 | goto unlock_pf; |
5220 | ||
9f65e15b | 5221 | err_rings: |
493fb300 AD |
5222 | pf->next_vsi = i - 1; |
5223 | kfree(vsi); | |
5224 | unlock_pf: | |
41c445ff JB |
5225 | mutex_unlock(&pf->switch_mutex); |
5226 | return ret; | |
5227 | } | |
5228 | ||
f650a38b ASJ |
5229 | /** |
5230 | * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI | |
5231 | * @type: VSI pointer | |
bc7d338f | 5232 | * @free_qvectors: a bool to specify if q_vectors need to be freed. |
f650a38b ASJ |
5233 | * |
5234 | * On error: returns error code (negative) | |
5235 | * On success: returns 0 | |
5236 | **/ | |
bc7d338f | 5237 | static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) |
f650a38b ASJ |
5238 | { |
5239 | /* free the ring and vector containers */ | |
bc7d338f ASJ |
5240 | if (free_qvectors) { |
5241 | kfree(vsi->q_vectors); | |
5242 | vsi->q_vectors = NULL; | |
5243 | } | |
f650a38b ASJ |
5244 | kfree(vsi->tx_rings); |
5245 | vsi->tx_rings = NULL; | |
5246 | vsi->rx_rings = NULL; | |
5247 | } | |
5248 | ||
41c445ff JB |
5249 | /** |
5250 | * i40e_vsi_clear - Deallocate the VSI provided | |
5251 | * @vsi: the VSI being un-configured | |
5252 | **/ | |
5253 | static int i40e_vsi_clear(struct i40e_vsi *vsi) | |
5254 | { | |
5255 | struct i40e_pf *pf; | |
5256 | ||
5257 | if (!vsi) | |
5258 | return 0; | |
5259 | ||
5260 | if (!vsi->back) | |
5261 | goto free_vsi; | |
5262 | pf = vsi->back; | |
5263 | ||
5264 | mutex_lock(&pf->switch_mutex); | |
5265 | if (!pf->vsi[vsi->idx]) { | |
5266 | dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", | |
5267 | vsi->idx, vsi->idx, vsi, vsi->type); | |
5268 | goto unlock_vsi; | |
5269 | } | |
5270 | ||
5271 | if (pf->vsi[vsi->idx] != vsi) { | |
5272 | dev_err(&pf->pdev->dev, | |
5273 | "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", | |
5274 | pf->vsi[vsi->idx]->idx, | |
5275 | pf->vsi[vsi->idx], | |
5276 | pf->vsi[vsi->idx]->type, | |
5277 | vsi->idx, vsi, vsi->type); | |
5278 | goto unlock_vsi; | |
5279 | } | |
5280 | ||
5281 | /* updates the pf for this cleared vsi */ | |
5282 | i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); | |
5283 | i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); | |
5284 | ||
bc7d338f | 5285 | i40e_vsi_free_arrays(vsi, true); |
493fb300 | 5286 | |
41c445ff JB |
5287 | pf->vsi[vsi->idx] = NULL; |
5288 | if (vsi->idx < pf->next_vsi) | |
5289 | pf->next_vsi = vsi->idx; | |
5290 | ||
5291 | unlock_vsi: | |
5292 | mutex_unlock(&pf->switch_mutex); | |
5293 | free_vsi: | |
5294 | kfree(vsi); | |
5295 | ||
5296 | return 0; | |
5297 | } | |
5298 | ||
9f65e15b AD |
5299 | /** |
5300 | * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI | |
5301 | * @vsi: the VSI being cleaned | |
5302 | **/ | |
be1d5eea | 5303 | static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) |
9f65e15b AD |
5304 | { |
5305 | int i; | |
5306 | ||
be1d5eea | 5307 | if (vsi->tx_rings[0]) { |
ac6c5e3d | 5308 | for (i = 0; i < vsi->num_queue_pairs; i++) { |
00403f04 MW |
5309 | kfree_rcu(vsi->tx_rings[i], rcu); |
5310 | vsi->tx_rings[i] = NULL; | |
5311 | vsi->rx_rings[i] = NULL; | |
5312 | } | |
be1d5eea | 5313 | } |
9f65e15b AD |
5314 | } |
5315 | ||
41c445ff JB |
5316 | /** |
5317 | * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI | |
5318 | * @vsi: the VSI being configured | |
5319 | **/ | |
5320 | static int i40e_alloc_rings(struct i40e_vsi *vsi) | |
5321 | { | |
5322 | struct i40e_pf *pf = vsi->back; | |
41c445ff JB |
5323 | int i; |
5324 | ||
41c445ff | 5325 | /* Set basic values in the rings to be used later during open() */ |
ac6c5e3d | 5326 | for (i = 0; i < vsi->num_queue_pairs; i++) { |
9f65e15b AD |
5327 | struct i40e_ring *tx_ring; |
5328 | struct i40e_ring *rx_ring; | |
5329 | ||
ac6c5e3d | 5330 | /* allocate space for both Tx and Rx in one shot */ |
9f65e15b AD |
5331 | tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); |
5332 | if (!tx_ring) | |
5333 | goto err_out; | |
41c445ff JB |
5334 | |
5335 | tx_ring->queue_index = i; | |
5336 | tx_ring->reg_idx = vsi->base_queue + i; | |
5337 | tx_ring->ring_active = false; | |
5338 | tx_ring->vsi = vsi; | |
5339 | tx_ring->netdev = vsi->netdev; | |
5340 | tx_ring->dev = &pf->pdev->dev; | |
5341 | tx_ring->count = vsi->num_desc; | |
5342 | tx_ring->size = 0; | |
5343 | tx_ring->dcb_tc = 0; | |
9f65e15b | 5344 | vsi->tx_rings[i] = tx_ring; |
41c445ff | 5345 | |
9f65e15b | 5346 | rx_ring = &tx_ring[1]; |
41c445ff JB |
5347 | rx_ring->queue_index = i; |
5348 | rx_ring->reg_idx = vsi->base_queue + i; | |
5349 | rx_ring->ring_active = false; | |
5350 | rx_ring->vsi = vsi; | |
5351 | rx_ring->netdev = vsi->netdev; | |
5352 | rx_ring->dev = &pf->pdev->dev; | |
5353 | rx_ring->count = vsi->num_desc; | |
5354 | rx_ring->size = 0; | |
5355 | rx_ring->dcb_tc = 0; | |
5356 | if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) | |
5357 | set_ring_16byte_desc_enabled(rx_ring); | |
5358 | else | |
5359 | clear_ring_16byte_desc_enabled(rx_ring); | |
9f65e15b | 5360 | vsi->rx_rings[i] = rx_ring; |
41c445ff JB |
5361 | } |
5362 | ||
5363 | return 0; | |
9f65e15b AD |
5364 | |
5365 | err_out: | |
5366 | i40e_vsi_clear_rings(vsi); | |
5367 | return -ENOMEM; | |
41c445ff JB |
5368 | } |
5369 | ||
5370 | /** | |
5371 | * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel | |
5372 | * @pf: board private structure | |
5373 | * @vectors: the number of MSI-X vectors to request | |
5374 | * | |
5375 | * Returns the number of vectors reserved, or error | |
5376 | **/ | |
5377 | static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) | |
5378 | { | |
5379 | int err = 0; | |
5380 | ||
5381 | pf->num_msix_entries = 0; | |
5382 | while (vectors >= I40E_MIN_MSIX) { | |
5383 | err = pci_enable_msix(pf->pdev, pf->msix_entries, vectors); | |
5384 | if (err == 0) { | |
5385 | /* good to go */ | |
5386 | pf->num_msix_entries = vectors; | |
5387 | break; | |
5388 | } else if (err < 0) { | |
5389 | /* total failure */ | |
5390 | dev_info(&pf->pdev->dev, | |
5391 | "MSI-X vector reservation failed: %d\n", err); | |
5392 | vectors = 0; | |
5393 | break; | |
5394 | } else { | |
5395 | /* err > 0 is the hint for retry */ | |
5396 | dev_info(&pf->pdev->dev, | |
5397 | "MSI-X vectors wanted %d, retrying with %d\n", | |
5398 | vectors, err); | |
5399 | vectors = err; | |
5400 | } | |
5401 | } | |
5402 | ||
5403 | if (vectors > 0 && vectors < I40E_MIN_MSIX) { | |
5404 | dev_info(&pf->pdev->dev, | |
5405 | "Couldn't get enough vectors, only %d available\n", | |
5406 | vectors); | |
5407 | vectors = 0; | |
5408 | } | |
5409 | ||
5410 | return vectors; | |
5411 | } | |
5412 | ||
5413 | /** | |
5414 | * i40e_init_msix - Setup the MSIX capability | |
5415 | * @pf: board private structure | |
5416 | * | |
5417 | * Work with the OS to set up the MSIX vectors needed. | |
5418 | * | |
5419 | * Returns 0 on success, negative on failure | |
5420 | **/ | |
5421 | static int i40e_init_msix(struct i40e_pf *pf) | |
5422 | { | |
5423 | i40e_status err = 0; | |
5424 | struct i40e_hw *hw = &pf->hw; | |
5425 | int v_budget, i; | |
5426 | int vec; | |
5427 | ||
5428 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) | |
5429 | return -ENODEV; | |
5430 | ||
5431 | /* The number of vectors we'll request will be comprised of: | |
5432 | * - Add 1 for "other" cause for Admin Queue events, etc. | |
5433 | * - The number of LAN queue pairs | |
f8ff1464 ASJ |
5434 | * - Queues being used for RSS. |
5435 | * We don't need as many as max_rss_size vectors. | |
5436 | * use rss_size instead in the calculation since that | |
5437 | * is governed by number of cpus in the system. | |
5438 | * - assumes symmetric Tx/Rx pairing | |
41c445ff JB |
5439 | * - The number of VMDq pairs |
5440 | * Once we count this up, try the request. | |
5441 | * | |
5442 | * If we can't get what we want, we'll simplify to nearly nothing | |
5443 | * and try again. If that still fails, we punt. | |
5444 | */ | |
f8ff1464 | 5445 | pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size); |
41c445ff JB |
5446 | pf->num_vmdq_msix = pf->num_vmdq_qps; |
5447 | v_budget = 1 + pf->num_lan_msix; | |
5448 | v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix); | |
5449 | if (pf->flags & I40E_FLAG_FDIR_ENABLED) | |
5450 | v_budget++; | |
5451 | ||
5452 | /* Scale down if necessary, and the rings will share vectors */ | |
5453 | v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors); | |
5454 | ||
5455 | pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), | |
5456 | GFP_KERNEL); | |
5457 | if (!pf->msix_entries) | |
5458 | return -ENOMEM; | |
5459 | ||
5460 | for (i = 0; i < v_budget; i++) | |
5461 | pf->msix_entries[i].entry = i; | |
5462 | vec = i40e_reserve_msix_vectors(pf, v_budget); | |
5463 | if (vec < I40E_MIN_MSIX) { | |
5464 | pf->flags &= ~I40E_FLAG_MSIX_ENABLED; | |
5465 | kfree(pf->msix_entries); | |
5466 | pf->msix_entries = NULL; | |
5467 | return -ENODEV; | |
5468 | ||
5469 | } else if (vec == I40E_MIN_MSIX) { | |
5470 | /* Adjust for minimal MSIX use */ | |
5471 | dev_info(&pf->pdev->dev, "Features disabled, not enough MSIX vectors\n"); | |
5472 | pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; | |
5473 | pf->num_vmdq_vsis = 0; | |
5474 | pf->num_vmdq_qps = 0; | |
5475 | pf->num_vmdq_msix = 0; | |
5476 | pf->num_lan_qps = 1; | |
5477 | pf->num_lan_msix = 1; | |
5478 | ||
5479 | } else if (vec != v_budget) { | |
5480 | /* Scale vector usage down */ | |
5481 | pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ | |
5482 | vec--; /* reserve the misc vector */ | |
5483 | ||
5484 | /* partition out the remaining vectors */ | |
5485 | switch (vec) { | |
5486 | case 2: | |
5487 | pf->num_vmdq_vsis = 1; | |
5488 | pf->num_lan_msix = 1; | |
5489 | break; | |
5490 | case 3: | |
5491 | pf->num_vmdq_vsis = 1; | |
5492 | pf->num_lan_msix = 2; | |
5493 | break; | |
5494 | default: | |
5495 | pf->num_lan_msix = min_t(int, (vec / 2), | |
5496 | pf->num_lan_qps); | |
5497 | pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix), | |
5498 | I40E_DEFAULT_NUM_VMDQ_VSI); | |
5499 | break; | |
5500 | } | |
5501 | } | |
5502 | ||
5503 | return err; | |
5504 | } | |
5505 | ||
493fb300 AD |
5506 | /** |
5507 | * i40e_alloc_q_vector - Allocate memory for a single interrupt vector | |
5508 | * @vsi: the VSI being configured | |
5509 | * @v_idx: index of the vector in the vsi struct | |
5510 | * | |
5511 | * We allocate one q_vector. If allocation fails we return -ENOMEM. | |
5512 | **/ | |
5513 | static int i40e_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) | |
5514 | { | |
5515 | struct i40e_q_vector *q_vector; | |
5516 | ||
5517 | /* allocate q_vector */ | |
5518 | q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); | |
5519 | if (!q_vector) | |
5520 | return -ENOMEM; | |
5521 | ||
5522 | q_vector->vsi = vsi; | |
5523 | q_vector->v_idx = v_idx; | |
5524 | cpumask_set_cpu(v_idx, &q_vector->affinity_mask); | |
5525 | if (vsi->netdev) | |
5526 | netif_napi_add(vsi->netdev, &q_vector->napi, | |
5527 | i40e_napi_poll, vsi->work_limit); | |
5528 | ||
cd0b6fa6 AD |
5529 | q_vector->rx.latency_range = I40E_LOW_LATENCY; |
5530 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
5531 | ||
493fb300 AD |
5532 | /* tie q_vector and vsi together */ |
5533 | vsi->q_vectors[v_idx] = q_vector; | |
5534 | ||
5535 | return 0; | |
5536 | } | |
5537 | ||
41c445ff JB |
5538 | /** |
5539 | * i40e_alloc_q_vectors - Allocate memory for interrupt vectors | |
5540 | * @vsi: the VSI being configured | |
5541 | * | |
5542 | * We allocate one q_vector per queue interrupt. If allocation fails we | |
5543 | * return -ENOMEM. | |
5544 | **/ | |
5545 | static int i40e_alloc_q_vectors(struct i40e_vsi *vsi) | |
5546 | { | |
5547 | struct i40e_pf *pf = vsi->back; | |
5548 | int v_idx, num_q_vectors; | |
493fb300 | 5549 | int err; |
41c445ff JB |
5550 | |
5551 | /* if not MSIX, give the one vector only to the LAN VSI */ | |
5552 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
5553 | num_q_vectors = vsi->num_q_vectors; | |
5554 | else if (vsi == pf->vsi[pf->lan_vsi]) | |
5555 | num_q_vectors = 1; | |
5556 | else | |
5557 | return -EINVAL; | |
5558 | ||
41c445ff | 5559 | for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { |
493fb300 AD |
5560 | err = i40e_alloc_q_vector(vsi, v_idx); |
5561 | if (err) | |
5562 | goto err_out; | |
41c445ff JB |
5563 | } |
5564 | ||
5565 | return 0; | |
493fb300 AD |
5566 | |
5567 | err_out: | |
5568 | while (v_idx--) | |
5569 | i40e_free_q_vector(vsi, v_idx); | |
5570 | ||
5571 | return err; | |
41c445ff JB |
5572 | } |
5573 | ||
5574 | /** | |
5575 | * i40e_init_interrupt_scheme - Determine proper interrupt scheme | |
5576 | * @pf: board private structure to initialize | |
5577 | **/ | |
5578 | static void i40e_init_interrupt_scheme(struct i40e_pf *pf) | |
5579 | { | |
5580 | int err = 0; | |
5581 | ||
5582 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
5583 | err = i40e_init_msix(pf); | |
5584 | if (err) { | |
958a3e3b SN |
5585 | pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | |
5586 | I40E_FLAG_RSS_ENABLED | | |
41c445ff JB |
5587 | I40E_FLAG_MQ_ENABLED | |
5588 | I40E_FLAG_DCB_ENABLED | | |
5589 | I40E_FLAG_SRIOV_ENABLED | | |
5590 | I40E_FLAG_FDIR_ENABLED | | |
5591 | I40E_FLAG_FDIR_ATR_ENABLED | | |
5592 | I40E_FLAG_VMDQ_ENABLED); | |
5593 | ||
5594 | /* rework the queue expectations without MSIX */ | |
5595 | i40e_determine_queue_usage(pf); | |
5596 | } | |
5597 | } | |
5598 | ||
5599 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && | |
5600 | (pf->flags & I40E_FLAG_MSI_ENABLED)) { | |
958a3e3b | 5601 | dev_info(&pf->pdev->dev, "MSIX not available, trying MSI\n"); |
41c445ff JB |
5602 | err = pci_enable_msi(pf->pdev); |
5603 | if (err) { | |
958a3e3b | 5604 | dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err); |
41c445ff JB |
5605 | pf->flags &= ~I40E_FLAG_MSI_ENABLED; |
5606 | } | |
5607 | } | |
5608 | ||
958a3e3b SN |
5609 | if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) |
5610 | dev_info(&pf->pdev->dev, "MSIX and MSI not available, falling back to Legacy IRQ\n"); | |
5611 | ||
41c445ff JB |
5612 | /* track first vector for misc interrupts */ |
5613 | err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1); | |
5614 | } | |
5615 | ||
5616 | /** | |
5617 | * i40e_setup_misc_vector - Setup the misc vector to handle non queue events | |
5618 | * @pf: board private structure | |
5619 | * | |
5620 | * This sets up the handler for MSIX 0, which is used to manage the | |
5621 | * non-queue interrupts, e.g. AdminQ and errors. This is not used | |
5622 | * when in MSI or Legacy interrupt mode. | |
5623 | **/ | |
5624 | static int i40e_setup_misc_vector(struct i40e_pf *pf) | |
5625 | { | |
5626 | struct i40e_hw *hw = &pf->hw; | |
5627 | int err = 0; | |
5628 | ||
5629 | /* Only request the irq if this is the first time through, and | |
5630 | * not when we're rebuilding after a Reset | |
5631 | */ | |
5632 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { | |
5633 | err = request_irq(pf->msix_entries[0].vector, | |
5634 | i40e_intr, 0, pf->misc_int_name, pf); | |
5635 | if (err) { | |
5636 | dev_info(&pf->pdev->dev, | |
5637 | "request_irq for msix_misc failed: %d\n", err); | |
5638 | return -EFAULT; | |
5639 | } | |
5640 | } | |
5641 | ||
5642 | i40e_enable_misc_int_causes(hw); | |
5643 | ||
5644 | /* associate no queues to the misc vector */ | |
5645 | wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); | |
5646 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); | |
5647 | ||
5648 | i40e_flush(hw); | |
5649 | ||
5650 | i40e_irq_dynamic_enable_icr0(pf); | |
5651 | ||
5652 | return err; | |
5653 | } | |
5654 | ||
5655 | /** | |
5656 | * i40e_config_rss - Prepare for RSS if used | |
5657 | * @pf: board private structure | |
5658 | **/ | |
5659 | static int i40e_config_rss(struct i40e_pf *pf) | |
5660 | { | |
4617e8c0 ASJ |
5661 | const u64 default_hena = |
5662 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | | |
5663 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | | |
5664 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | | |
5665 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | | |
5666 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN) | | |
5667 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | | |
5668 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | | |
5669 | ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4) | | |
5670 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | | |
5671 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | | |
5672 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | | |
5673 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN) | | |
5674 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | | |
5675 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | | |
5676 | ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | | |
5677 | ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6) | | |
5678 | ((u64)1 << I40E_FILTER_PCTYPE_L2_PAYLOAD); | |
5679 | ||
41c445ff JB |
5680 | /* Set of random keys generated using kernel random number generator */ |
5681 | static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687, | |
5682 | 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377, | |
5683 | 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d, | |
5684 | 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be}; | |
4617e8c0 ASJ |
5685 | struct i40e_hw *hw = &pf->hw; |
5686 | u32 lut = 0; | |
5687 | int i, j; | |
5688 | u64 hena; | |
41c445ff JB |
5689 | |
5690 | /* Fill out hash function seed */ | |
5691 | for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) | |
5692 | wr32(hw, I40E_PFQF_HKEY(i), seed[i]); | |
5693 | ||
5694 | /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ | |
5695 | hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | | |
5696 | ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); | |
4617e8c0 | 5697 | hena |= default_hena; |
41c445ff JB |
5698 | wr32(hw, I40E_PFQF_HENA(0), (u32)hena); |
5699 | wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); | |
5700 | ||
5701 | /* Populate the LUT with max no. of queues in round robin fashion */ | |
5702 | for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) { | |
5703 | ||
5704 | /* The assumption is that lan qp count will be the highest | |
5705 | * qp count for any PF VSI that needs RSS. | |
5706 | * If multiple VSIs need RSS support, all the qp counts | |
5707 | * for those VSIs should be a power of 2 for RSS to work. | |
5708 | * If LAN VSI is the only consumer for RSS then this requirement | |
5709 | * is not necessary. | |
5710 | */ | |
5711 | if (j == pf->rss_size) | |
5712 | j = 0; | |
5713 | /* lut = 4-byte sliding window of 4 lut entries */ | |
5714 | lut = (lut << 8) | (j & | |
5715 | ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1)); | |
5716 | /* On i = 3, we have 4 entries in lut; write to the register */ | |
5717 | if ((i & 3) == 3) | |
5718 | wr32(hw, I40E_PFQF_HLUT(i >> 2), lut); | |
5719 | } | |
5720 | i40e_flush(hw); | |
5721 | ||
5722 | return 0; | |
5723 | } | |
5724 | ||
f8ff1464 ASJ |
5725 | /** |
5726 | * i40e_reconfig_rss_queues - change number of queues for rss and rebuild | |
5727 | * @pf: board private structure | |
5728 | * @queue_count: the requested queue count for rss. | |
5729 | * | |
5730 | * returns 0 if rss is not enabled, if enabled returns the final rss queue | |
5731 | * count which may be different from the requested queue count. | |
5732 | **/ | |
5733 | int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) | |
5734 | { | |
5735 | if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) | |
5736 | return 0; | |
5737 | ||
5738 | queue_count = min_t(int, queue_count, pf->rss_size_max); | |
5739 | queue_count = rounddown_pow_of_two(queue_count); | |
5740 | ||
5741 | if (queue_count != pf->rss_size) { | |
5742 | if (pf->queues_left < (queue_count - pf->rss_size)) { | |
5743 | dev_info(&pf->pdev->dev, | |
5744 | "Not enough queues to do RSS on %d queues: remaining queues %d\n", | |
5745 | queue_count, pf->queues_left); | |
5746 | return pf->rss_size; | |
5747 | } | |
5748 | i40e_prep_for_reset(pf); | |
5749 | ||
5750 | pf->num_lan_qps += (queue_count - pf->rss_size); | |
5751 | pf->queues_left -= (queue_count - pf->rss_size); | |
5752 | pf->rss_size = queue_count; | |
5753 | ||
5754 | i40e_reset_and_rebuild(pf, true); | |
5755 | i40e_config_rss(pf); | |
5756 | } | |
5757 | dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size); | |
5758 | return pf->rss_size; | |
5759 | } | |
5760 | ||
41c445ff JB |
5761 | /** |
5762 | * i40e_sw_init - Initialize general software structures (struct i40e_pf) | |
5763 | * @pf: board private structure to initialize | |
5764 | * | |
5765 | * i40e_sw_init initializes the Adapter private data structure. | |
5766 | * Fields are initialized based on PCI device information and | |
5767 | * OS network device settings (MTU size). | |
5768 | **/ | |
5769 | static int i40e_sw_init(struct i40e_pf *pf) | |
5770 | { | |
5771 | int err = 0; | |
5772 | int size; | |
5773 | ||
5774 | pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, | |
5775 | (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); | |
2759997b | 5776 | pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG; |
41c445ff JB |
5777 | if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { |
5778 | if (I40E_DEBUG_USER & debug) | |
5779 | pf->hw.debug_mask = debug; | |
5780 | pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), | |
5781 | I40E_DEFAULT_MSG_ENABLE); | |
5782 | } | |
5783 | ||
5784 | /* Set default capability flags */ | |
5785 | pf->flags = I40E_FLAG_RX_CSUM_ENABLED | | |
5786 | I40E_FLAG_MSI_ENABLED | | |
5787 | I40E_FLAG_MSIX_ENABLED | | |
5788 | I40E_FLAG_RX_PS_ENABLED | | |
5789 | I40E_FLAG_MQ_ENABLED | | |
5790 | I40E_FLAG_RX_1BUF_ENABLED; | |
5791 | ||
7134f9ce JB |
5792 | /* Depending on PF configurations, it is possible that the RSS |
5793 | * maximum might end up larger than the available queues | |
5794 | */ | |
41c445ff | 5795 | pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width; |
7134f9ce JB |
5796 | pf->rss_size_max = min_t(int, pf->rss_size_max, |
5797 | pf->hw.func_caps.num_tx_qp); | |
41c445ff JB |
5798 | if (pf->hw.func_caps.rss) { |
5799 | pf->flags |= I40E_FLAG_RSS_ENABLED; | |
bf051a3b | 5800 | pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus()); |
41c445ff JB |
5801 | } else { |
5802 | pf->rss_size = 1; | |
5803 | } | |
5804 | ||
5805 | if (pf->hw.func_caps.dcb) | |
5806 | pf->num_tc_qps = I40E_DEFAULT_QUEUES_PER_TC; | |
5807 | else | |
5808 | pf->num_tc_qps = 0; | |
5809 | ||
5810 | if (pf->hw.func_caps.fd) { | |
5811 | /* FW/NVM is not yet fixed in this regard */ | |
5812 | if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || | |
5813 | (pf->hw.func_caps.fd_filters_best_effort > 0)) { | |
5814 | pf->flags |= I40E_FLAG_FDIR_ATR_ENABLED; | |
5815 | dev_info(&pf->pdev->dev, | |
5816 | "Flow Director ATR mode Enabled\n"); | |
5817 | pf->flags |= I40E_FLAG_FDIR_ENABLED; | |
5818 | dev_info(&pf->pdev->dev, | |
5819 | "Flow Director Side Band mode Enabled\n"); | |
5820 | pf->fdir_pf_filter_count = | |
5821 | pf->hw.func_caps.fd_filters_guaranteed; | |
5822 | } | |
5823 | } else { | |
5824 | pf->fdir_pf_filter_count = 0; | |
5825 | } | |
5826 | ||
5827 | if (pf->hw.func_caps.vmdq) { | |
5828 | pf->flags |= I40E_FLAG_VMDQ_ENABLED; | |
5829 | pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; | |
5830 | pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ; | |
5831 | } | |
5832 | ||
5833 | /* MFP mode enabled */ | |
5834 | if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) { | |
5835 | pf->flags |= I40E_FLAG_MFP_ENABLED; | |
5836 | dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); | |
5837 | } | |
5838 | ||
5839 | #ifdef CONFIG_PCI_IOV | |
5840 | if (pf->hw.func_caps.num_vfs) { | |
5841 | pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; | |
5842 | pf->flags |= I40E_FLAG_SRIOV_ENABLED; | |
5843 | pf->num_req_vfs = min_t(int, | |
5844 | pf->hw.func_caps.num_vfs, | |
5845 | I40E_MAX_VF_COUNT); | |
4a38d09c ASJ |
5846 | dev_info(&pf->pdev->dev, |
5847 | "Number of VFs being requested for PF[%d] = %d\n", | |
5848 | pf->hw.pf_id, pf->num_req_vfs); | |
41c445ff JB |
5849 | } |
5850 | #endif /* CONFIG_PCI_IOV */ | |
5851 | pf->eeprom_version = 0xDEAD; | |
5852 | pf->lan_veb = I40E_NO_VEB; | |
5853 | pf->lan_vsi = I40E_NO_VSI; | |
5854 | ||
5855 | /* set up queue assignment tracking */ | |
5856 | size = sizeof(struct i40e_lump_tracking) | |
5857 | + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); | |
5858 | pf->qp_pile = kzalloc(size, GFP_KERNEL); | |
5859 | if (!pf->qp_pile) { | |
5860 | err = -ENOMEM; | |
5861 | goto sw_init_done; | |
5862 | } | |
5863 | pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; | |
5864 | pf->qp_pile->search_hint = 0; | |
5865 | ||
5866 | /* set up vector assignment tracking */ | |
5867 | size = sizeof(struct i40e_lump_tracking) | |
5868 | + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors); | |
5869 | pf->irq_pile = kzalloc(size, GFP_KERNEL); | |
5870 | if (!pf->irq_pile) { | |
5871 | kfree(pf->qp_pile); | |
5872 | err = -ENOMEM; | |
5873 | goto sw_init_done; | |
5874 | } | |
5875 | pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors; | |
5876 | pf->irq_pile->search_hint = 0; | |
5877 | ||
5878 | mutex_init(&pf->switch_mutex); | |
5879 | ||
5880 | sw_init_done: | |
5881 | return err; | |
5882 | } | |
5883 | ||
5884 | /** | |
5885 | * i40e_set_features - set the netdev feature flags | |
5886 | * @netdev: ptr to the netdev being adjusted | |
5887 | * @features: the feature set that the stack is suggesting | |
5888 | **/ | |
5889 | static int i40e_set_features(struct net_device *netdev, | |
5890 | netdev_features_t features) | |
5891 | { | |
5892 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5893 | struct i40e_vsi *vsi = np->vsi; | |
5894 | ||
5895 | if (features & NETIF_F_HW_VLAN_CTAG_RX) | |
5896 | i40e_vlan_stripping_enable(vsi); | |
5897 | else | |
5898 | i40e_vlan_stripping_disable(vsi); | |
5899 | ||
5900 | return 0; | |
5901 | } | |
5902 | ||
5903 | static const struct net_device_ops i40e_netdev_ops = { | |
5904 | .ndo_open = i40e_open, | |
5905 | .ndo_stop = i40e_close, | |
5906 | .ndo_start_xmit = i40e_lan_xmit_frame, | |
5907 | .ndo_get_stats64 = i40e_get_netdev_stats_struct, | |
5908 | .ndo_set_rx_mode = i40e_set_rx_mode, | |
5909 | .ndo_validate_addr = eth_validate_addr, | |
5910 | .ndo_set_mac_address = i40e_set_mac, | |
5911 | .ndo_change_mtu = i40e_change_mtu, | |
5912 | .ndo_tx_timeout = i40e_tx_timeout, | |
5913 | .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, | |
5914 | .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, | |
5915 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
5916 | .ndo_poll_controller = i40e_netpoll, | |
5917 | #endif | |
5918 | .ndo_setup_tc = i40e_setup_tc, | |
5919 | .ndo_set_features = i40e_set_features, | |
5920 | .ndo_set_vf_mac = i40e_ndo_set_vf_mac, | |
5921 | .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, | |
5922 | .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw, | |
5923 | .ndo_get_vf_config = i40e_ndo_get_vf_config, | |
5924 | }; | |
5925 | ||
5926 | /** | |
5927 | * i40e_config_netdev - Setup the netdev flags | |
5928 | * @vsi: the VSI being configured | |
5929 | * | |
5930 | * Returns 0 on success, negative value on failure | |
5931 | **/ | |
5932 | static int i40e_config_netdev(struct i40e_vsi *vsi) | |
5933 | { | |
5934 | struct i40e_pf *pf = vsi->back; | |
5935 | struct i40e_hw *hw = &pf->hw; | |
5936 | struct i40e_netdev_priv *np; | |
5937 | struct net_device *netdev; | |
5938 | u8 mac_addr[ETH_ALEN]; | |
5939 | int etherdev_size; | |
5940 | ||
5941 | etherdev_size = sizeof(struct i40e_netdev_priv); | |
f8ff1464 | 5942 | netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); |
41c445ff JB |
5943 | if (!netdev) |
5944 | return -ENOMEM; | |
5945 | ||
5946 | vsi->netdev = netdev; | |
5947 | np = netdev_priv(netdev); | |
5948 | np->vsi = vsi; | |
5949 | ||
5950 | netdev->hw_enc_features = NETIF_F_IP_CSUM | | |
5951 | NETIF_F_GSO_UDP_TUNNEL | | |
5952 | NETIF_F_TSO | | |
5953 | NETIF_F_SG; | |
5954 | ||
5955 | netdev->features = NETIF_F_SG | | |
5956 | NETIF_F_IP_CSUM | | |
5957 | NETIF_F_SCTP_CSUM | | |
5958 | NETIF_F_HIGHDMA | | |
5959 | NETIF_F_GSO_UDP_TUNNEL | | |
5960 | NETIF_F_HW_VLAN_CTAG_TX | | |
5961 | NETIF_F_HW_VLAN_CTAG_RX | | |
5962 | NETIF_F_HW_VLAN_CTAG_FILTER | | |
5963 | NETIF_F_IPV6_CSUM | | |
5964 | NETIF_F_TSO | | |
5965 | NETIF_F_TSO6 | | |
5966 | NETIF_F_RXCSUM | | |
5967 | NETIF_F_RXHASH | | |
5968 | 0; | |
5969 | ||
5970 | /* copy netdev features into list of user selectable features */ | |
5971 | netdev->hw_features |= netdev->features; | |
5972 | ||
5973 | if (vsi->type == I40E_VSI_MAIN) { | |
5974 | SET_NETDEV_DEV(netdev, &pf->pdev->dev); | |
5975 | memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN); | |
5976 | } else { | |
5977 | /* relate the VSI_VMDQ name to the VSI_MAIN name */ | |
5978 | snprintf(netdev->name, IFNAMSIZ, "%sv%%d", | |
5979 | pf->vsi[pf->lan_vsi]->netdev->name); | |
5980 | random_ether_addr(mac_addr); | |
5981 | i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); | |
5982 | } | |
5983 | ||
5984 | memcpy(netdev->dev_addr, mac_addr, ETH_ALEN); | |
5985 | memcpy(netdev->perm_addr, mac_addr, ETH_ALEN); | |
5986 | /* vlan gets same features (except vlan offload) | |
5987 | * after any tweaks for specific VSI types | |
5988 | */ | |
5989 | netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX | | |
5990 | NETIF_F_HW_VLAN_CTAG_RX | | |
5991 | NETIF_F_HW_VLAN_CTAG_FILTER); | |
5992 | netdev->priv_flags |= IFF_UNICAST_FLT; | |
5993 | netdev->priv_flags |= IFF_SUPP_NOFCS; | |
5994 | /* Setup netdev TC information */ | |
5995 | i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); | |
5996 | ||
5997 | netdev->netdev_ops = &i40e_netdev_ops; | |
5998 | netdev->watchdog_timeo = 5 * HZ; | |
5999 | i40e_set_ethtool_ops(netdev); | |
6000 | ||
6001 | return 0; | |
6002 | } | |
6003 | ||
6004 | /** | |
6005 | * i40e_vsi_delete - Delete a VSI from the switch | |
6006 | * @vsi: the VSI being removed | |
6007 | * | |
6008 | * Returns 0 on success, negative value on failure | |
6009 | **/ | |
6010 | static void i40e_vsi_delete(struct i40e_vsi *vsi) | |
6011 | { | |
6012 | /* remove default VSI is not allowed */ | |
6013 | if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) | |
6014 | return; | |
6015 | ||
6016 | /* there is no HW VSI for FDIR */ | |
6017 | if (vsi->type == I40E_VSI_FDIR) | |
6018 | return; | |
6019 | ||
6020 | i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); | |
6021 | return; | |
6022 | } | |
6023 | ||
6024 | /** | |
6025 | * i40e_add_vsi - Add a VSI to the switch | |
6026 | * @vsi: the VSI being configured | |
6027 | * | |
6028 | * This initializes a VSI context depending on the VSI type to be added and | |
6029 | * passes it down to the add_vsi aq command. | |
6030 | **/ | |
6031 | static int i40e_add_vsi(struct i40e_vsi *vsi) | |
6032 | { | |
6033 | int ret = -ENODEV; | |
6034 | struct i40e_mac_filter *f, *ftmp; | |
6035 | struct i40e_pf *pf = vsi->back; | |
6036 | struct i40e_hw *hw = &pf->hw; | |
6037 | struct i40e_vsi_context ctxt; | |
6038 | u8 enabled_tc = 0x1; /* TC0 enabled */ | |
6039 | int f_count = 0; | |
6040 | ||
6041 | memset(&ctxt, 0, sizeof(ctxt)); | |
6042 | switch (vsi->type) { | |
6043 | case I40E_VSI_MAIN: | |
6044 | /* The PF's main VSI is already setup as part of the | |
6045 | * device initialization, so we'll not bother with | |
6046 | * the add_vsi call, but we will retrieve the current | |
6047 | * VSI context. | |
6048 | */ | |
6049 | ctxt.seid = pf->main_vsi_seid; | |
6050 | ctxt.pf_num = pf->hw.pf_id; | |
6051 | ctxt.vf_num = 0; | |
6052 | ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); | |
6053 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; | |
6054 | if (ret) { | |
6055 | dev_info(&pf->pdev->dev, | |
6056 | "couldn't get pf vsi config, err %d, aq_err %d\n", | |
6057 | ret, pf->hw.aq.asq_last_status); | |
6058 | return -ENOENT; | |
6059 | } | |
6060 | memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); | |
6061 | vsi->info.valid_sections = 0; | |
6062 | ||
6063 | vsi->seid = ctxt.seid; | |
6064 | vsi->id = ctxt.vsi_number; | |
6065 | ||
6066 | enabled_tc = i40e_pf_get_tc_map(pf); | |
6067 | ||
6068 | /* MFP mode setup queue map and update VSI */ | |
6069 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
6070 | memset(&ctxt, 0, sizeof(ctxt)); | |
6071 | ctxt.seid = pf->main_vsi_seid; | |
6072 | ctxt.pf_num = pf->hw.pf_id; | |
6073 | ctxt.vf_num = 0; | |
6074 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); | |
6075 | ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); | |
6076 | if (ret) { | |
6077 | dev_info(&pf->pdev->dev, | |
6078 | "update vsi failed, aq_err=%d\n", | |
6079 | pf->hw.aq.asq_last_status); | |
6080 | ret = -ENOENT; | |
6081 | goto err; | |
6082 | } | |
6083 | /* update the local VSI info queue map */ | |
6084 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
6085 | vsi->info.valid_sections = 0; | |
6086 | } else { | |
6087 | /* Default/Main VSI is only enabled for TC0 | |
6088 | * reconfigure it to enable all TCs that are | |
6089 | * available on the port in SFP mode. | |
6090 | */ | |
6091 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
6092 | if (ret) { | |
6093 | dev_info(&pf->pdev->dev, | |
6094 | "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n", | |
6095 | enabled_tc, ret, | |
6096 | pf->hw.aq.asq_last_status); | |
6097 | ret = -ENOENT; | |
6098 | } | |
6099 | } | |
6100 | break; | |
6101 | ||
6102 | case I40E_VSI_FDIR: | |
6103 | /* no queue mapping or actual HW VSI needed */ | |
6104 | vsi->info.valid_sections = 0; | |
6105 | vsi->seid = 0; | |
6106 | vsi->id = 0; | |
6107 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
6108 | return 0; | |
6109 | break; | |
6110 | ||
6111 | case I40E_VSI_VMDQ2: | |
6112 | ctxt.pf_num = hw->pf_id; | |
6113 | ctxt.vf_num = 0; | |
6114 | ctxt.uplink_seid = vsi->uplink_seid; | |
6115 | ctxt.connection_type = 0x1; /* regular data port */ | |
6116 | ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; | |
6117 | ||
6118 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
6119 | ||
6120 | /* This VSI is connected to VEB so the switch_id | |
6121 | * should be set to zero by default. | |
6122 | */ | |
6123 | ctxt.info.switch_id = 0; | |
6124 | ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB); | |
6125 | ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
6126 | ||
6127 | /* Setup the VSI tx/rx queue map for TC0 only for now */ | |
6128 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
6129 | break; | |
6130 | ||
6131 | case I40E_VSI_SRIOV: | |
6132 | ctxt.pf_num = hw->pf_id; | |
6133 | ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; | |
6134 | ctxt.uplink_seid = vsi->uplink_seid; | |
6135 | ctxt.connection_type = 0x1; /* regular data port */ | |
6136 | ctxt.flags = I40E_AQ_VSI_TYPE_VF; | |
6137 | ||
6138 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
6139 | ||
6140 | /* This VSI is connected to VEB so the switch_id | |
6141 | * should be set to zero by default. | |
6142 | */ | |
6143 | ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
6144 | ||
6145 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
6146 | ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; | |
6147 | /* Setup the VSI tx/rx queue map for TC0 only for now */ | |
6148 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
6149 | break; | |
6150 | ||
6151 | default: | |
6152 | return -ENODEV; | |
6153 | } | |
6154 | ||
6155 | if (vsi->type != I40E_VSI_MAIN) { | |
6156 | ret = i40e_aq_add_vsi(hw, &ctxt, NULL); | |
6157 | if (ret) { | |
6158 | dev_info(&vsi->back->pdev->dev, | |
6159 | "add vsi failed, aq_err=%d\n", | |
6160 | vsi->back->hw.aq.asq_last_status); | |
6161 | ret = -ENOENT; | |
6162 | goto err; | |
6163 | } | |
6164 | memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); | |
6165 | vsi->info.valid_sections = 0; | |
6166 | vsi->seid = ctxt.seid; | |
6167 | vsi->id = ctxt.vsi_number; | |
6168 | } | |
6169 | ||
6170 | /* If macvlan filters already exist, force them to get loaded */ | |
6171 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
6172 | f->changed = true; | |
6173 | f_count++; | |
6174 | } | |
6175 | if (f_count) { | |
6176 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
6177 | pf->flags |= I40E_FLAG_FILTER_SYNC; | |
6178 | } | |
6179 | ||
6180 | /* Update VSI BW information */ | |
6181 | ret = i40e_vsi_get_bw_info(vsi); | |
6182 | if (ret) { | |
6183 | dev_info(&pf->pdev->dev, | |
6184 | "couldn't get vsi bw info, err %d, aq_err %d\n", | |
6185 | ret, pf->hw.aq.asq_last_status); | |
6186 | /* VSI is already added so not tearing that up */ | |
6187 | ret = 0; | |
6188 | } | |
6189 | ||
6190 | err: | |
6191 | return ret; | |
6192 | } | |
6193 | ||
6194 | /** | |
6195 | * i40e_vsi_release - Delete a VSI and free its resources | |
6196 | * @vsi: the VSI being removed | |
6197 | * | |
6198 | * Returns 0 on success or < 0 on error | |
6199 | **/ | |
6200 | int i40e_vsi_release(struct i40e_vsi *vsi) | |
6201 | { | |
6202 | struct i40e_mac_filter *f, *ftmp; | |
6203 | struct i40e_veb *veb = NULL; | |
6204 | struct i40e_pf *pf; | |
6205 | u16 uplink_seid; | |
6206 | int i, n; | |
6207 | ||
6208 | pf = vsi->back; | |
6209 | ||
6210 | /* release of a VEB-owner or last VSI is not allowed */ | |
6211 | if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
6212 | dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", | |
6213 | vsi->seid, vsi->uplink_seid); | |
6214 | return -ENODEV; | |
6215 | } | |
6216 | if (vsi == pf->vsi[pf->lan_vsi] && | |
6217 | !test_bit(__I40E_DOWN, &pf->state)) { | |
6218 | dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); | |
6219 | return -ENODEV; | |
6220 | } | |
6221 | ||
6222 | uplink_seid = vsi->uplink_seid; | |
6223 | if (vsi->type != I40E_VSI_SRIOV) { | |
6224 | if (vsi->netdev_registered) { | |
6225 | vsi->netdev_registered = false; | |
6226 | if (vsi->netdev) { | |
6227 | /* results in a call to i40e_close() */ | |
6228 | unregister_netdev(vsi->netdev); | |
6229 | free_netdev(vsi->netdev); | |
6230 | vsi->netdev = NULL; | |
6231 | } | |
6232 | } else { | |
6233 | if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) | |
6234 | i40e_down(vsi); | |
6235 | i40e_vsi_free_irq(vsi); | |
6236 | i40e_vsi_free_tx_resources(vsi); | |
6237 | i40e_vsi_free_rx_resources(vsi); | |
6238 | } | |
6239 | i40e_vsi_disable_irq(vsi); | |
6240 | } | |
6241 | ||
6242 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) | |
6243 | i40e_del_filter(vsi, f->macaddr, f->vlan, | |
6244 | f->is_vf, f->is_netdev); | |
6245 | i40e_sync_vsi_filters(vsi); | |
6246 | ||
6247 | i40e_vsi_delete(vsi); | |
6248 | i40e_vsi_free_q_vectors(vsi); | |
6249 | i40e_vsi_clear_rings(vsi); | |
6250 | i40e_vsi_clear(vsi); | |
6251 | ||
6252 | /* If this was the last thing on the VEB, except for the | |
6253 | * controlling VSI, remove the VEB, which puts the controlling | |
6254 | * VSI onto the next level down in the switch. | |
6255 | * | |
6256 | * Well, okay, there's one more exception here: don't remove | |
6257 | * the orphan VEBs yet. We'll wait for an explicit remove request | |
6258 | * from up the network stack. | |
6259 | */ | |
6260 | for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
6261 | if (pf->vsi[i] && | |
6262 | pf->vsi[i]->uplink_seid == uplink_seid && | |
6263 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
6264 | n++; /* count the VSIs */ | |
6265 | } | |
6266 | } | |
6267 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
6268 | if (!pf->veb[i]) | |
6269 | continue; | |
6270 | if (pf->veb[i]->uplink_seid == uplink_seid) | |
6271 | n++; /* count the VEBs */ | |
6272 | if (pf->veb[i]->seid == uplink_seid) | |
6273 | veb = pf->veb[i]; | |
6274 | } | |
6275 | if (n == 0 && veb && veb->uplink_seid != 0) | |
6276 | i40e_veb_release(veb); | |
6277 | ||
6278 | return 0; | |
6279 | } | |
6280 | ||
6281 | /** | |
6282 | * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI | |
6283 | * @vsi: ptr to the VSI | |
6284 | * | |
6285 | * This should only be called after i40e_vsi_mem_alloc() which allocates the | |
6286 | * corresponding SW VSI structure and initializes num_queue_pairs for the | |
6287 | * newly allocated VSI. | |
6288 | * | |
6289 | * Returns 0 on success or negative on failure | |
6290 | **/ | |
6291 | static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) | |
6292 | { | |
6293 | int ret = -ENOENT; | |
6294 | struct i40e_pf *pf = vsi->back; | |
6295 | ||
493fb300 | 6296 | if (vsi->q_vectors[0]) { |
41c445ff JB |
6297 | dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", |
6298 | vsi->seid); | |
6299 | return -EEXIST; | |
6300 | } | |
6301 | ||
6302 | if (vsi->base_vector) { | |
6303 | dev_info(&pf->pdev->dev, | |
6304 | "VSI %d has non-zero base vector %d\n", | |
6305 | vsi->seid, vsi->base_vector); | |
6306 | return -EEXIST; | |
6307 | } | |
6308 | ||
6309 | ret = i40e_alloc_q_vectors(vsi); | |
6310 | if (ret) { | |
6311 | dev_info(&pf->pdev->dev, | |
6312 | "failed to allocate %d q_vector for VSI %d, ret=%d\n", | |
6313 | vsi->num_q_vectors, vsi->seid, ret); | |
6314 | vsi->num_q_vectors = 0; | |
6315 | goto vector_setup_out; | |
6316 | } | |
6317 | ||
958a3e3b SN |
6318 | if (vsi->num_q_vectors) |
6319 | vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, | |
6320 | vsi->num_q_vectors, vsi->idx); | |
41c445ff JB |
6321 | if (vsi->base_vector < 0) { |
6322 | dev_info(&pf->pdev->dev, | |
6323 | "failed to get q tracking for VSI %d, err=%d\n", | |
6324 | vsi->seid, vsi->base_vector); | |
6325 | i40e_vsi_free_q_vectors(vsi); | |
6326 | ret = -ENOENT; | |
6327 | goto vector_setup_out; | |
6328 | } | |
6329 | ||
6330 | vector_setup_out: | |
6331 | return ret; | |
6332 | } | |
6333 | ||
bc7d338f ASJ |
6334 | /** |
6335 | * i40e_vsi_reinit_setup - return and reallocate resources for a VSI | |
6336 | * @vsi: pointer to the vsi. | |
6337 | * | |
6338 | * This re-allocates a vsi's queue resources. | |
6339 | * | |
6340 | * Returns pointer to the successfully allocated and configured VSI sw struct | |
6341 | * on success, otherwise returns NULL on failure. | |
6342 | **/ | |
6343 | static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) | |
6344 | { | |
6345 | struct i40e_pf *pf = vsi->back; | |
6346 | u8 enabled_tc; | |
6347 | int ret; | |
6348 | ||
6349 | i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); | |
6350 | i40e_vsi_clear_rings(vsi); | |
6351 | ||
6352 | i40e_vsi_free_arrays(vsi, false); | |
6353 | i40e_set_num_rings_in_vsi(vsi); | |
6354 | ret = i40e_vsi_alloc_arrays(vsi, false); | |
6355 | if (ret) | |
6356 | goto err_vsi; | |
6357 | ||
6358 | ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); | |
6359 | if (ret < 0) { | |
6360 | dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n", | |
6361 | vsi->seid, ret); | |
6362 | goto err_vsi; | |
6363 | } | |
6364 | vsi->base_queue = ret; | |
6365 | ||
6366 | /* Update the FW view of the VSI. Force a reset of TC and queue | |
6367 | * layout configurations. | |
6368 | */ | |
6369 | enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; | |
6370 | pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; | |
6371 | pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; | |
6372 | i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); | |
6373 | ||
6374 | /* assign it some queues */ | |
6375 | ret = i40e_alloc_rings(vsi); | |
6376 | if (ret) | |
6377 | goto err_rings; | |
6378 | ||
6379 | /* map all of the rings to the q_vectors */ | |
6380 | i40e_vsi_map_rings_to_vectors(vsi); | |
6381 | return vsi; | |
6382 | ||
6383 | err_rings: | |
6384 | i40e_vsi_free_q_vectors(vsi); | |
6385 | if (vsi->netdev_registered) { | |
6386 | vsi->netdev_registered = false; | |
6387 | unregister_netdev(vsi->netdev); | |
6388 | free_netdev(vsi->netdev); | |
6389 | vsi->netdev = NULL; | |
6390 | } | |
6391 | i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); | |
6392 | err_vsi: | |
6393 | i40e_vsi_clear(vsi); | |
6394 | return NULL; | |
6395 | } | |
6396 | ||
41c445ff JB |
6397 | /** |
6398 | * i40e_vsi_setup - Set up a VSI by a given type | |
6399 | * @pf: board private structure | |
6400 | * @type: VSI type | |
6401 | * @uplink_seid: the switch element to link to | |
6402 | * @param1: usage depends upon VSI type. For VF types, indicates VF id | |
6403 | * | |
6404 | * This allocates the sw VSI structure and its queue resources, then add a VSI | |
6405 | * to the identified VEB. | |
6406 | * | |
6407 | * Returns pointer to the successfully allocated and configure VSI sw struct on | |
6408 | * success, otherwise returns NULL on failure. | |
6409 | **/ | |
6410 | struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, | |
6411 | u16 uplink_seid, u32 param1) | |
6412 | { | |
6413 | struct i40e_vsi *vsi = NULL; | |
6414 | struct i40e_veb *veb = NULL; | |
6415 | int ret, i; | |
6416 | int v_idx; | |
6417 | ||
6418 | /* The requested uplink_seid must be either | |
6419 | * - the PF's port seid | |
6420 | * no VEB is needed because this is the PF | |
6421 | * or this is a Flow Director special case VSI | |
6422 | * - seid of an existing VEB | |
6423 | * - seid of a VSI that owns an existing VEB | |
6424 | * - seid of a VSI that doesn't own a VEB | |
6425 | * a new VEB is created and the VSI becomes the owner | |
6426 | * - seid of the PF VSI, which is what creates the first VEB | |
6427 | * this is a special case of the previous | |
6428 | * | |
6429 | * Find which uplink_seid we were given and create a new VEB if needed | |
6430 | */ | |
6431 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
6432 | if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { | |
6433 | veb = pf->veb[i]; | |
6434 | break; | |
6435 | } | |
6436 | } | |
6437 | ||
6438 | if (!veb && uplink_seid != pf->mac_seid) { | |
6439 | ||
6440 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
6441 | if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { | |
6442 | vsi = pf->vsi[i]; | |
6443 | break; | |
6444 | } | |
6445 | } | |
6446 | if (!vsi) { | |
6447 | dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", | |
6448 | uplink_seid); | |
6449 | return NULL; | |
6450 | } | |
6451 | ||
6452 | if (vsi->uplink_seid == pf->mac_seid) | |
6453 | veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, | |
6454 | vsi->tc_config.enabled_tc); | |
6455 | else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) | |
6456 | veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, | |
6457 | vsi->tc_config.enabled_tc); | |
6458 | ||
6459 | for (i = 0; i < I40E_MAX_VEB && !veb; i++) { | |
6460 | if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) | |
6461 | veb = pf->veb[i]; | |
6462 | } | |
6463 | if (!veb) { | |
6464 | dev_info(&pf->pdev->dev, "couldn't add VEB\n"); | |
6465 | return NULL; | |
6466 | } | |
6467 | ||
6468 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
6469 | uplink_seid = veb->seid; | |
6470 | } | |
6471 | ||
6472 | /* get vsi sw struct */ | |
6473 | v_idx = i40e_vsi_mem_alloc(pf, type); | |
6474 | if (v_idx < 0) | |
6475 | goto err_alloc; | |
6476 | vsi = pf->vsi[v_idx]; | |
6477 | vsi->type = type; | |
6478 | vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); | |
6479 | ||
6480 | if (type == I40E_VSI_MAIN) | |
6481 | pf->lan_vsi = v_idx; | |
6482 | else if (type == I40E_VSI_SRIOV) | |
6483 | vsi->vf_id = param1; | |
6484 | /* assign it some queues */ | |
6485 | ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); | |
6486 | if (ret < 0) { | |
6487 | dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n", | |
6488 | vsi->seid, ret); | |
6489 | goto err_vsi; | |
6490 | } | |
6491 | vsi->base_queue = ret; | |
6492 | ||
6493 | /* get a VSI from the hardware */ | |
6494 | vsi->uplink_seid = uplink_seid; | |
6495 | ret = i40e_add_vsi(vsi); | |
6496 | if (ret) | |
6497 | goto err_vsi; | |
6498 | ||
6499 | switch (vsi->type) { | |
6500 | /* setup the netdev if needed */ | |
6501 | case I40E_VSI_MAIN: | |
6502 | case I40E_VSI_VMDQ2: | |
6503 | ret = i40e_config_netdev(vsi); | |
6504 | if (ret) | |
6505 | goto err_netdev; | |
6506 | ret = register_netdev(vsi->netdev); | |
6507 | if (ret) | |
6508 | goto err_netdev; | |
6509 | vsi->netdev_registered = true; | |
6510 | netif_carrier_off(vsi->netdev); | |
6511 | /* fall through */ | |
6512 | ||
6513 | case I40E_VSI_FDIR: | |
6514 | /* set up vectors and rings if needed */ | |
6515 | ret = i40e_vsi_setup_vectors(vsi); | |
6516 | if (ret) | |
6517 | goto err_msix; | |
6518 | ||
6519 | ret = i40e_alloc_rings(vsi); | |
6520 | if (ret) | |
6521 | goto err_rings; | |
6522 | ||
6523 | /* map all of the rings to the q_vectors */ | |
6524 | i40e_vsi_map_rings_to_vectors(vsi); | |
6525 | ||
6526 | i40e_vsi_reset_stats(vsi); | |
6527 | break; | |
6528 | ||
6529 | default: | |
6530 | /* no netdev or rings for the other VSI types */ | |
6531 | break; | |
6532 | } | |
6533 | ||
6534 | return vsi; | |
6535 | ||
6536 | err_rings: | |
6537 | i40e_vsi_free_q_vectors(vsi); | |
6538 | err_msix: | |
6539 | if (vsi->netdev_registered) { | |
6540 | vsi->netdev_registered = false; | |
6541 | unregister_netdev(vsi->netdev); | |
6542 | free_netdev(vsi->netdev); | |
6543 | vsi->netdev = NULL; | |
6544 | } | |
6545 | err_netdev: | |
6546 | i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); | |
6547 | err_vsi: | |
6548 | i40e_vsi_clear(vsi); | |
6549 | err_alloc: | |
6550 | return NULL; | |
6551 | } | |
6552 | ||
6553 | /** | |
6554 | * i40e_veb_get_bw_info - Query VEB BW information | |
6555 | * @veb: the veb to query | |
6556 | * | |
6557 | * Query the Tx scheduler BW configuration data for given VEB | |
6558 | **/ | |
6559 | static int i40e_veb_get_bw_info(struct i40e_veb *veb) | |
6560 | { | |
6561 | struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; | |
6562 | struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; | |
6563 | struct i40e_pf *pf = veb->pf; | |
6564 | struct i40e_hw *hw = &pf->hw; | |
6565 | u32 tc_bw_max; | |
6566 | int ret = 0; | |
6567 | int i; | |
6568 | ||
6569 | ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, | |
6570 | &bw_data, NULL); | |
6571 | if (ret) { | |
6572 | dev_info(&pf->pdev->dev, | |
6573 | "query veb bw config failed, aq_err=%d\n", | |
6574 | hw->aq.asq_last_status); | |
6575 | goto out; | |
6576 | } | |
6577 | ||
6578 | ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, | |
6579 | &ets_data, NULL); | |
6580 | if (ret) { | |
6581 | dev_info(&pf->pdev->dev, | |
6582 | "query veb bw ets config failed, aq_err=%d\n", | |
6583 | hw->aq.asq_last_status); | |
6584 | goto out; | |
6585 | } | |
6586 | ||
6587 | veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); | |
6588 | veb->bw_max_quanta = ets_data.tc_bw_max; | |
6589 | veb->is_abs_credits = bw_data.absolute_credits_enable; | |
6590 | tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | | |
6591 | (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); | |
6592 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
6593 | veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; | |
6594 | veb->bw_tc_limit_credits[i] = | |
6595 | le16_to_cpu(bw_data.tc_bw_limits[i]); | |
6596 | veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); | |
6597 | } | |
6598 | ||
6599 | out: | |
6600 | return ret; | |
6601 | } | |
6602 | ||
6603 | /** | |
6604 | * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF | |
6605 | * @pf: board private structure | |
6606 | * | |
6607 | * On error: returns error code (negative) | |
6608 | * On success: returns vsi index in PF (positive) | |
6609 | **/ | |
6610 | static int i40e_veb_mem_alloc(struct i40e_pf *pf) | |
6611 | { | |
6612 | int ret = -ENOENT; | |
6613 | struct i40e_veb *veb; | |
6614 | int i; | |
6615 | ||
6616 | /* Need to protect the allocation of switch elements at the PF level */ | |
6617 | mutex_lock(&pf->switch_mutex); | |
6618 | ||
6619 | /* VEB list may be fragmented if VEB creation/destruction has | |
6620 | * been happening. We can afford to do a quick scan to look | |
6621 | * for any free slots in the list. | |
6622 | * | |
6623 | * find next empty veb slot, looping back around if necessary | |
6624 | */ | |
6625 | i = 0; | |
6626 | while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) | |
6627 | i++; | |
6628 | if (i >= I40E_MAX_VEB) { | |
6629 | ret = -ENOMEM; | |
6630 | goto err_alloc_veb; /* out of VEB slots! */ | |
6631 | } | |
6632 | ||
6633 | veb = kzalloc(sizeof(*veb), GFP_KERNEL); | |
6634 | if (!veb) { | |
6635 | ret = -ENOMEM; | |
6636 | goto err_alloc_veb; | |
6637 | } | |
6638 | veb->pf = pf; | |
6639 | veb->idx = i; | |
6640 | veb->enabled_tc = 1; | |
6641 | ||
6642 | pf->veb[i] = veb; | |
6643 | ret = i; | |
6644 | err_alloc_veb: | |
6645 | mutex_unlock(&pf->switch_mutex); | |
6646 | return ret; | |
6647 | } | |
6648 | ||
6649 | /** | |
6650 | * i40e_switch_branch_release - Delete a branch of the switch tree | |
6651 | * @branch: where to start deleting | |
6652 | * | |
6653 | * This uses recursion to find the tips of the branch to be | |
6654 | * removed, deleting until we get back to and can delete this VEB. | |
6655 | **/ | |
6656 | static void i40e_switch_branch_release(struct i40e_veb *branch) | |
6657 | { | |
6658 | struct i40e_pf *pf = branch->pf; | |
6659 | u16 branch_seid = branch->seid; | |
6660 | u16 veb_idx = branch->idx; | |
6661 | int i; | |
6662 | ||
6663 | /* release any VEBs on this VEB - RECURSION */ | |
6664 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
6665 | if (!pf->veb[i]) | |
6666 | continue; | |
6667 | if (pf->veb[i]->uplink_seid == branch->seid) | |
6668 | i40e_switch_branch_release(pf->veb[i]); | |
6669 | } | |
6670 | ||
6671 | /* Release the VSIs on this VEB, but not the owner VSI. | |
6672 | * | |
6673 | * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing | |
6674 | * the VEB itself, so don't use (*branch) after this loop. | |
6675 | */ | |
6676 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
6677 | if (!pf->vsi[i]) | |
6678 | continue; | |
6679 | if (pf->vsi[i]->uplink_seid == branch_seid && | |
6680 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
6681 | i40e_vsi_release(pf->vsi[i]); | |
6682 | } | |
6683 | } | |
6684 | ||
6685 | /* There's one corner case where the VEB might not have been | |
6686 | * removed, so double check it here and remove it if needed. | |
6687 | * This case happens if the veb was created from the debugfs | |
6688 | * commands and no VSIs were added to it. | |
6689 | */ | |
6690 | if (pf->veb[veb_idx]) | |
6691 | i40e_veb_release(pf->veb[veb_idx]); | |
6692 | } | |
6693 | ||
6694 | /** | |
6695 | * i40e_veb_clear - remove veb struct | |
6696 | * @veb: the veb to remove | |
6697 | **/ | |
6698 | static void i40e_veb_clear(struct i40e_veb *veb) | |
6699 | { | |
6700 | if (!veb) | |
6701 | return; | |
6702 | ||
6703 | if (veb->pf) { | |
6704 | struct i40e_pf *pf = veb->pf; | |
6705 | ||
6706 | mutex_lock(&pf->switch_mutex); | |
6707 | if (pf->veb[veb->idx] == veb) | |
6708 | pf->veb[veb->idx] = NULL; | |
6709 | mutex_unlock(&pf->switch_mutex); | |
6710 | } | |
6711 | ||
6712 | kfree(veb); | |
6713 | } | |
6714 | ||
6715 | /** | |
6716 | * i40e_veb_release - Delete a VEB and free its resources | |
6717 | * @veb: the VEB being removed | |
6718 | **/ | |
6719 | void i40e_veb_release(struct i40e_veb *veb) | |
6720 | { | |
6721 | struct i40e_vsi *vsi = NULL; | |
6722 | struct i40e_pf *pf; | |
6723 | int i, n = 0; | |
6724 | ||
6725 | pf = veb->pf; | |
6726 | ||
6727 | /* find the remaining VSI and check for extras */ | |
6728 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
6729 | if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { | |
6730 | n++; | |
6731 | vsi = pf->vsi[i]; | |
6732 | } | |
6733 | } | |
6734 | if (n != 1) { | |
6735 | dev_info(&pf->pdev->dev, | |
6736 | "can't remove VEB %d with %d VSIs left\n", | |
6737 | veb->seid, n); | |
6738 | return; | |
6739 | } | |
6740 | ||
6741 | /* move the remaining VSI to uplink veb */ | |
6742 | vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; | |
6743 | if (veb->uplink_seid) { | |
6744 | vsi->uplink_seid = veb->uplink_seid; | |
6745 | if (veb->uplink_seid == pf->mac_seid) | |
6746 | vsi->veb_idx = I40E_NO_VEB; | |
6747 | else | |
6748 | vsi->veb_idx = veb->veb_idx; | |
6749 | } else { | |
6750 | /* floating VEB */ | |
6751 | vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
6752 | vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; | |
6753 | } | |
6754 | ||
6755 | i40e_aq_delete_element(&pf->hw, veb->seid, NULL); | |
6756 | i40e_veb_clear(veb); | |
6757 | ||
6758 | return; | |
6759 | } | |
6760 | ||
6761 | /** | |
6762 | * i40e_add_veb - create the VEB in the switch | |
6763 | * @veb: the VEB to be instantiated | |
6764 | * @vsi: the controlling VSI | |
6765 | **/ | |
6766 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) | |
6767 | { | |
6768 | bool is_default = (vsi->idx == vsi->back->lan_vsi); | |
e1c51b95 | 6769 | bool is_cloud = false; |
41c445ff JB |
6770 | int ret; |
6771 | ||
6772 | /* get a VEB from the hardware */ | |
6773 | ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid, | |
e1c51b95 KS |
6774 | veb->enabled_tc, is_default, |
6775 | is_cloud, &veb->seid, NULL); | |
41c445ff JB |
6776 | if (ret) { |
6777 | dev_info(&veb->pf->pdev->dev, | |
6778 | "couldn't add VEB, err %d, aq_err %d\n", | |
6779 | ret, veb->pf->hw.aq.asq_last_status); | |
6780 | return -EPERM; | |
6781 | } | |
6782 | ||
6783 | /* get statistics counter */ | |
6784 | ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL, | |
6785 | &veb->stats_idx, NULL, NULL, NULL); | |
6786 | if (ret) { | |
6787 | dev_info(&veb->pf->pdev->dev, | |
6788 | "couldn't get VEB statistics idx, err %d, aq_err %d\n", | |
6789 | ret, veb->pf->hw.aq.asq_last_status); | |
6790 | return -EPERM; | |
6791 | } | |
6792 | ret = i40e_veb_get_bw_info(veb); | |
6793 | if (ret) { | |
6794 | dev_info(&veb->pf->pdev->dev, | |
6795 | "couldn't get VEB bw info, err %d, aq_err %d\n", | |
6796 | ret, veb->pf->hw.aq.asq_last_status); | |
6797 | i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL); | |
6798 | return -ENOENT; | |
6799 | } | |
6800 | ||
6801 | vsi->uplink_seid = veb->seid; | |
6802 | vsi->veb_idx = veb->idx; | |
6803 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
6804 | ||
6805 | return 0; | |
6806 | } | |
6807 | ||
6808 | /** | |
6809 | * i40e_veb_setup - Set up a VEB | |
6810 | * @pf: board private structure | |
6811 | * @flags: VEB setup flags | |
6812 | * @uplink_seid: the switch element to link to | |
6813 | * @vsi_seid: the initial VSI seid | |
6814 | * @enabled_tc: Enabled TC bit-map | |
6815 | * | |
6816 | * This allocates the sw VEB structure and links it into the switch | |
6817 | * It is possible and legal for this to be a duplicate of an already | |
6818 | * existing VEB. It is also possible for both uplink and vsi seids | |
6819 | * to be zero, in order to create a floating VEB. | |
6820 | * | |
6821 | * Returns pointer to the successfully allocated VEB sw struct on | |
6822 | * success, otherwise returns NULL on failure. | |
6823 | **/ | |
6824 | struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, | |
6825 | u16 uplink_seid, u16 vsi_seid, | |
6826 | u8 enabled_tc) | |
6827 | { | |
6828 | struct i40e_veb *veb, *uplink_veb = NULL; | |
6829 | int vsi_idx, veb_idx; | |
6830 | int ret; | |
6831 | ||
6832 | /* if one seid is 0, the other must be 0 to create a floating relay */ | |
6833 | if ((uplink_seid == 0 || vsi_seid == 0) && | |
6834 | (uplink_seid + vsi_seid != 0)) { | |
6835 | dev_info(&pf->pdev->dev, | |
6836 | "one, not both seid's are 0: uplink=%d vsi=%d\n", | |
6837 | uplink_seid, vsi_seid); | |
6838 | return NULL; | |
6839 | } | |
6840 | ||
6841 | /* make sure there is such a vsi and uplink */ | |
6842 | for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++) | |
6843 | if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) | |
6844 | break; | |
6845 | if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) { | |
6846 | dev_info(&pf->pdev->dev, "vsi seid %d not found\n", | |
6847 | vsi_seid); | |
6848 | return NULL; | |
6849 | } | |
6850 | ||
6851 | if (uplink_seid && uplink_seid != pf->mac_seid) { | |
6852 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
6853 | if (pf->veb[veb_idx] && | |
6854 | pf->veb[veb_idx]->seid == uplink_seid) { | |
6855 | uplink_veb = pf->veb[veb_idx]; | |
6856 | break; | |
6857 | } | |
6858 | } | |
6859 | if (!uplink_veb) { | |
6860 | dev_info(&pf->pdev->dev, | |
6861 | "uplink seid %d not found\n", uplink_seid); | |
6862 | return NULL; | |
6863 | } | |
6864 | } | |
6865 | ||
6866 | /* get veb sw struct */ | |
6867 | veb_idx = i40e_veb_mem_alloc(pf); | |
6868 | if (veb_idx < 0) | |
6869 | goto err_alloc; | |
6870 | veb = pf->veb[veb_idx]; | |
6871 | veb->flags = flags; | |
6872 | veb->uplink_seid = uplink_seid; | |
6873 | veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); | |
6874 | veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); | |
6875 | ||
6876 | /* create the VEB in the switch */ | |
6877 | ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); | |
6878 | if (ret) | |
6879 | goto err_veb; | |
6880 | ||
6881 | return veb; | |
6882 | ||
6883 | err_veb: | |
6884 | i40e_veb_clear(veb); | |
6885 | err_alloc: | |
6886 | return NULL; | |
6887 | } | |
6888 | ||
6889 | /** | |
6890 | * i40e_setup_pf_switch_element - set pf vars based on switch type | |
6891 | * @pf: board private structure | |
6892 | * @ele: element we are building info from | |
6893 | * @num_reported: total number of elements | |
6894 | * @printconfig: should we print the contents | |
6895 | * | |
6896 | * helper function to assist in extracting a few useful SEID values. | |
6897 | **/ | |
6898 | static void i40e_setup_pf_switch_element(struct i40e_pf *pf, | |
6899 | struct i40e_aqc_switch_config_element_resp *ele, | |
6900 | u16 num_reported, bool printconfig) | |
6901 | { | |
6902 | u16 downlink_seid = le16_to_cpu(ele->downlink_seid); | |
6903 | u16 uplink_seid = le16_to_cpu(ele->uplink_seid); | |
6904 | u8 element_type = ele->element_type; | |
6905 | u16 seid = le16_to_cpu(ele->seid); | |
6906 | ||
6907 | if (printconfig) | |
6908 | dev_info(&pf->pdev->dev, | |
6909 | "type=%d seid=%d uplink=%d downlink=%d\n", | |
6910 | element_type, seid, uplink_seid, downlink_seid); | |
6911 | ||
6912 | switch (element_type) { | |
6913 | case I40E_SWITCH_ELEMENT_TYPE_MAC: | |
6914 | pf->mac_seid = seid; | |
6915 | break; | |
6916 | case I40E_SWITCH_ELEMENT_TYPE_VEB: | |
6917 | /* Main VEB? */ | |
6918 | if (uplink_seid != pf->mac_seid) | |
6919 | break; | |
6920 | if (pf->lan_veb == I40E_NO_VEB) { | |
6921 | int v; | |
6922 | ||
6923 | /* find existing or else empty VEB */ | |
6924 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
6925 | if (pf->veb[v] && (pf->veb[v]->seid == seid)) { | |
6926 | pf->lan_veb = v; | |
6927 | break; | |
6928 | } | |
6929 | } | |
6930 | if (pf->lan_veb == I40E_NO_VEB) { | |
6931 | v = i40e_veb_mem_alloc(pf); | |
6932 | if (v < 0) | |
6933 | break; | |
6934 | pf->lan_veb = v; | |
6935 | } | |
6936 | } | |
6937 | ||
6938 | pf->veb[pf->lan_veb]->seid = seid; | |
6939 | pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; | |
6940 | pf->veb[pf->lan_veb]->pf = pf; | |
6941 | pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; | |
6942 | break; | |
6943 | case I40E_SWITCH_ELEMENT_TYPE_VSI: | |
6944 | if (num_reported != 1) | |
6945 | break; | |
6946 | /* This is immediately after a reset so we can assume this is | |
6947 | * the PF's VSI | |
6948 | */ | |
6949 | pf->mac_seid = uplink_seid; | |
6950 | pf->pf_seid = downlink_seid; | |
6951 | pf->main_vsi_seid = seid; | |
6952 | if (printconfig) | |
6953 | dev_info(&pf->pdev->dev, | |
6954 | "pf_seid=%d main_vsi_seid=%d\n", | |
6955 | pf->pf_seid, pf->main_vsi_seid); | |
6956 | break; | |
6957 | case I40E_SWITCH_ELEMENT_TYPE_PF: | |
6958 | case I40E_SWITCH_ELEMENT_TYPE_VF: | |
6959 | case I40E_SWITCH_ELEMENT_TYPE_EMP: | |
6960 | case I40E_SWITCH_ELEMENT_TYPE_BMC: | |
6961 | case I40E_SWITCH_ELEMENT_TYPE_PE: | |
6962 | case I40E_SWITCH_ELEMENT_TYPE_PA: | |
6963 | /* ignore these for now */ | |
6964 | break; | |
6965 | default: | |
6966 | dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", | |
6967 | element_type, seid); | |
6968 | break; | |
6969 | } | |
6970 | } | |
6971 | ||
6972 | /** | |
6973 | * i40e_fetch_switch_configuration - Get switch config from firmware | |
6974 | * @pf: board private structure | |
6975 | * @printconfig: should we print the contents | |
6976 | * | |
6977 | * Get the current switch configuration from the device and | |
6978 | * extract a few useful SEID values. | |
6979 | **/ | |
6980 | int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) | |
6981 | { | |
6982 | struct i40e_aqc_get_switch_config_resp *sw_config; | |
6983 | u16 next_seid = 0; | |
6984 | int ret = 0; | |
6985 | u8 *aq_buf; | |
6986 | int i; | |
6987 | ||
6988 | aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); | |
6989 | if (!aq_buf) | |
6990 | return -ENOMEM; | |
6991 | ||
6992 | sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; | |
6993 | do { | |
6994 | u16 num_reported, num_total; | |
6995 | ||
6996 | ret = i40e_aq_get_switch_config(&pf->hw, sw_config, | |
6997 | I40E_AQ_LARGE_BUF, | |
6998 | &next_seid, NULL); | |
6999 | if (ret) { | |
7000 | dev_info(&pf->pdev->dev, | |
7001 | "get switch config failed %d aq_err=%x\n", | |
7002 | ret, pf->hw.aq.asq_last_status); | |
7003 | kfree(aq_buf); | |
7004 | return -ENOENT; | |
7005 | } | |
7006 | ||
7007 | num_reported = le16_to_cpu(sw_config->header.num_reported); | |
7008 | num_total = le16_to_cpu(sw_config->header.num_total); | |
7009 | ||
7010 | if (printconfig) | |
7011 | dev_info(&pf->pdev->dev, | |
7012 | "header: %d reported %d total\n", | |
7013 | num_reported, num_total); | |
7014 | ||
7015 | if (num_reported) { | |
7016 | int sz = sizeof(*sw_config) * num_reported; | |
7017 | ||
7018 | kfree(pf->sw_config); | |
7019 | pf->sw_config = kzalloc(sz, GFP_KERNEL); | |
7020 | if (pf->sw_config) | |
7021 | memcpy(pf->sw_config, sw_config, sz); | |
7022 | } | |
7023 | ||
7024 | for (i = 0; i < num_reported; i++) { | |
7025 | struct i40e_aqc_switch_config_element_resp *ele = | |
7026 | &sw_config->element[i]; | |
7027 | ||
7028 | i40e_setup_pf_switch_element(pf, ele, num_reported, | |
7029 | printconfig); | |
7030 | } | |
7031 | } while (next_seid != 0); | |
7032 | ||
7033 | kfree(aq_buf); | |
7034 | return ret; | |
7035 | } | |
7036 | ||
7037 | /** | |
7038 | * i40e_setup_pf_switch - Setup the HW switch on startup or after reset | |
7039 | * @pf: board private structure | |
bc7d338f | 7040 | * @reinit: if the Main VSI needs to re-initialized. |
41c445ff JB |
7041 | * |
7042 | * Returns 0 on success, negative value on failure | |
7043 | **/ | |
bc7d338f | 7044 | static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) |
41c445ff | 7045 | { |
895106a5 | 7046 | u32 rxfc = 0, txfc = 0, rxfc_reg; |
41c445ff JB |
7047 | int ret; |
7048 | ||
7049 | /* find out what's out there already */ | |
7050 | ret = i40e_fetch_switch_configuration(pf, false); | |
7051 | if (ret) { | |
7052 | dev_info(&pf->pdev->dev, | |
7053 | "couldn't fetch switch config, err %d, aq_err %d\n", | |
7054 | ret, pf->hw.aq.asq_last_status); | |
7055 | return ret; | |
7056 | } | |
7057 | i40e_pf_reset_stats(pf); | |
7058 | ||
7059 | /* fdir VSI must happen first to be sure it gets queue 0, but only | |
7060 | * if there is enough room for the fdir VSI | |
7061 | */ | |
7062 | if (pf->num_lan_qps > 1) | |
7063 | i40e_fdir_setup(pf); | |
7064 | ||
7065 | /* first time setup */ | |
bc7d338f | 7066 | if (pf->lan_vsi == I40E_NO_VSI || reinit) { |
41c445ff JB |
7067 | struct i40e_vsi *vsi = NULL; |
7068 | u16 uplink_seid; | |
7069 | ||
7070 | /* Set up the PF VSI associated with the PF's main VSI | |
7071 | * that is already in the HW switch | |
7072 | */ | |
7073 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
7074 | uplink_seid = pf->veb[pf->lan_veb]->seid; | |
7075 | else | |
7076 | uplink_seid = pf->mac_seid; | |
bc7d338f ASJ |
7077 | if (pf->lan_vsi == I40E_NO_VSI) |
7078 | vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); | |
7079 | else if (reinit) | |
7080 | vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); | |
41c445ff JB |
7081 | if (!vsi) { |
7082 | dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); | |
7083 | i40e_fdir_teardown(pf); | |
7084 | return -EAGAIN; | |
7085 | } | |
7086 | /* accommodate kcompat by copying the main VSI queue count | |
7087 | * into the pf, since this newer code pushes the pf queue | |
7088 | * info down a level into a VSI | |
7089 | */ | |
ac6c5e3d SN |
7090 | pf->num_rx_queues = vsi->num_queue_pairs; |
7091 | pf->num_tx_queues = vsi->num_queue_pairs; | |
41c445ff JB |
7092 | } else { |
7093 | /* force a reset of TC and queue layout configurations */ | |
7094 | u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; | |
7095 | pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; | |
7096 | pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; | |
7097 | i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); | |
7098 | } | |
7099 | i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); | |
7100 | ||
7101 | /* Setup static PF queue filter control settings */ | |
7102 | ret = i40e_setup_pf_filter_control(pf); | |
7103 | if (ret) { | |
7104 | dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", | |
7105 | ret); | |
7106 | /* Failure here should not stop continuing other steps */ | |
7107 | } | |
7108 | ||
7109 | /* enable RSS in the HW, even for only one queue, as the stack can use | |
7110 | * the hash | |
7111 | */ | |
7112 | if ((pf->flags & I40E_FLAG_RSS_ENABLED)) | |
7113 | i40e_config_rss(pf); | |
7114 | ||
7115 | /* fill in link information and enable LSE reporting */ | |
7116 | i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); | |
7117 | i40e_link_event(pf); | |
7118 | ||
d52c20b7 | 7119 | /* Initialize user-specific link properties */ |
41c445ff JB |
7120 | pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & |
7121 | I40E_AQ_AN_COMPLETED) ? true : false); | |
d52c20b7 JB |
7122 | /* requested_mode is set in probe or by ethtool */ |
7123 | if (!pf->fc_autoneg_status) | |
7124 | goto no_autoneg; | |
7125 | ||
7126 | if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) && | |
7127 | (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)) | |
41c445ff JB |
7128 | pf->hw.fc.current_mode = I40E_FC_FULL; |
7129 | else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) | |
7130 | pf->hw.fc.current_mode = I40E_FC_TX_PAUSE; | |
7131 | else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX) | |
7132 | pf->hw.fc.current_mode = I40E_FC_RX_PAUSE; | |
7133 | else | |
d52c20b7 JB |
7134 | pf->hw.fc.current_mode = I40E_FC_NONE; |
7135 | ||
7136 | /* sync the flow control settings with the auto-neg values */ | |
7137 | switch (pf->hw.fc.current_mode) { | |
7138 | case I40E_FC_FULL: | |
7139 | txfc = 1; | |
7140 | rxfc = 1; | |
7141 | break; | |
7142 | case I40E_FC_TX_PAUSE: | |
7143 | txfc = 1; | |
7144 | rxfc = 0; | |
7145 | break; | |
7146 | case I40E_FC_RX_PAUSE: | |
7147 | txfc = 0; | |
7148 | rxfc = 1; | |
7149 | break; | |
7150 | case I40E_FC_NONE: | |
7151 | case I40E_FC_DEFAULT: | |
7152 | txfc = 0; | |
7153 | rxfc = 0; | |
7154 | break; | |
7155 | case I40E_FC_PFC: | |
7156 | /* TBD */ | |
7157 | break; | |
7158 | /* no default case, we have to handle all possibilities here */ | |
7159 | } | |
7160 | ||
7161 | wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT); | |
7162 | ||
7163 | rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) & | |
7164 | ~I40E_PRTDCB_MFLCN_RFCE_MASK; | |
7165 | rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT); | |
7166 | ||
7167 | wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg); | |
41c445ff | 7168 | |
d52c20b7 JB |
7169 | goto fc_complete; |
7170 | ||
7171 | no_autoneg: | |
7172 | /* disable L2 flow control, user can turn it on if they wish */ | |
7173 | wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0); | |
7174 | wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) & | |
7175 | ~I40E_PRTDCB_MFLCN_RFCE_MASK); | |
7176 | ||
7177 | fc_complete: | |
41c445ff JB |
7178 | return ret; |
7179 | } | |
7180 | ||
7181 | /** | |
7182 | * i40e_set_rss_size - helper to set rss_size | |
7183 | * @pf: board private structure | |
7184 | * @queues_left: how many queues | |
7185 | */ | |
7186 | static u16 i40e_set_rss_size(struct i40e_pf *pf, int queues_left) | |
7187 | { | |
7188 | int num_tc0; | |
7189 | ||
7190 | num_tc0 = min_t(int, queues_left, pf->rss_size_max); | |
bf051a3b | 7191 | num_tc0 = min_t(int, num_tc0, num_online_cpus()); |
41c445ff JB |
7192 | num_tc0 = rounddown_pow_of_two(num_tc0); |
7193 | ||
7194 | return num_tc0; | |
7195 | } | |
7196 | ||
7197 | /** | |
7198 | * i40e_determine_queue_usage - Work out queue distribution | |
7199 | * @pf: board private structure | |
7200 | **/ | |
7201 | static void i40e_determine_queue_usage(struct i40e_pf *pf) | |
7202 | { | |
7203 | int accum_tc_size; | |
7204 | int queues_left; | |
7205 | ||
7206 | pf->num_lan_qps = 0; | |
7207 | pf->num_tc_qps = rounddown_pow_of_two(pf->num_tc_qps); | |
7208 | accum_tc_size = (I40E_MAX_TRAFFIC_CLASS - 1) * pf->num_tc_qps; | |
7209 | ||
7210 | /* Find the max queues to be put into basic use. We'll always be | |
7211 | * using TC0, whether or not DCB is running, and TC0 will get the | |
7212 | * big RSS set. | |
7213 | */ | |
7214 | queues_left = pf->hw.func_caps.num_tx_qp; | |
7215 | ||
7216 | if (!((pf->flags & I40E_FLAG_MSIX_ENABLED) && | |
7217 | (pf->flags & I40E_FLAG_MQ_ENABLED)) || | |
7218 | !(pf->flags & (I40E_FLAG_RSS_ENABLED | | |
7219 | I40E_FLAG_FDIR_ENABLED | I40E_FLAG_DCB_ENABLED)) || | |
7220 | (queues_left == 1)) { | |
7221 | ||
7222 | /* one qp for PF, no queues for anything else */ | |
7223 | queues_left = 0; | |
7224 | pf->rss_size = pf->num_lan_qps = 1; | |
7225 | ||
7226 | /* make sure all the fancies are disabled */ | |
7227 | pf->flags &= ~(I40E_FLAG_RSS_ENABLED | | |
7228 | I40E_FLAG_MQ_ENABLED | | |
7229 | I40E_FLAG_FDIR_ENABLED | | |
7230 | I40E_FLAG_FDIR_ATR_ENABLED | | |
7231 | I40E_FLAG_DCB_ENABLED | | |
7232 | I40E_FLAG_SRIOV_ENABLED | | |
7233 | I40E_FLAG_VMDQ_ENABLED); | |
7234 | ||
7235 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
7236 | !(pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
7237 | !(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
7238 | ||
7239 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
7240 | ||
7241 | queues_left -= pf->rss_size; | |
f8ff1464 | 7242 | pf->num_lan_qps = pf->rss_size_max; |
41c445ff JB |
7243 | |
7244 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
7245 | !(pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
7246 | (pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
7247 | ||
7248 | /* save num_tc_qps queues for TCs 1 thru 7 and the rest | |
7249 | * are set up for RSS in TC0 | |
7250 | */ | |
7251 | queues_left -= accum_tc_size; | |
7252 | ||
7253 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
7254 | ||
7255 | queues_left -= pf->rss_size; | |
7256 | if (queues_left < 0) { | |
7257 | dev_info(&pf->pdev->dev, "not enough queues for DCB\n"); | |
7258 | return; | |
7259 | } | |
7260 | ||
f8ff1464 | 7261 | pf->num_lan_qps = pf->rss_size_max + accum_tc_size; |
41c445ff JB |
7262 | |
7263 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
7264 | (pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
7265 | !(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
7266 | ||
7267 | queues_left -= 1; /* save 1 queue for FD */ | |
7268 | ||
7269 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
7270 | ||
7271 | queues_left -= pf->rss_size; | |
7272 | if (queues_left < 0) { | |
7273 | dev_info(&pf->pdev->dev, "not enough queues for Flow Director\n"); | |
7274 | return; | |
7275 | } | |
7276 | ||
f8ff1464 | 7277 | pf->num_lan_qps = pf->rss_size_max; |
41c445ff JB |
7278 | |
7279 | } else if (pf->flags & I40E_FLAG_RSS_ENABLED && | |
7280 | (pf->flags & I40E_FLAG_FDIR_ENABLED) && | |
7281 | (pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
7282 | ||
7283 | /* save 1 queue for TCs 1 thru 7, | |
7284 | * 1 queue for flow director, | |
7285 | * and the rest are set up for RSS in TC0 | |
7286 | */ | |
7287 | queues_left -= 1; | |
7288 | queues_left -= accum_tc_size; | |
7289 | ||
7290 | pf->rss_size = i40e_set_rss_size(pf, queues_left); | |
7291 | queues_left -= pf->rss_size; | |
7292 | if (queues_left < 0) { | |
7293 | dev_info(&pf->pdev->dev, "not enough queues for DCB and Flow Director\n"); | |
7294 | return; | |
7295 | } | |
7296 | ||
f8ff1464 | 7297 | pf->num_lan_qps = pf->rss_size_max + accum_tc_size; |
41c445ff JB |
7298 | |
7299 | } else { | |
7300 | dev_info(&pf->pdev->dev, | |
7301 | "Invalid configuration, flags=0x%08llx\n", pf->flags); | |
7302 | return; | |
7303 | } | |
7304 | ||
7305 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
7306 | pf->num_vf_qps && pf->num_req_vfs && queues_left) { | |
7307 | pf->num_req_vfs = min_t(int, pf->num_req_vfs, (queues_left / | |
7308 | pf->num_vf_qps)); | |
7309 | queues_left -= (pf->num_req_vfs * pf->num_vf_qps); | |
7310 | } | |
7311 | ||
7312 | if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && | |
7313 | pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { | |
7314 | pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, | |
7315 | (queues_left / pf->num_vmdq_qps)); | |
7316 | queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); | |
7317 | } | |
7318 | ||
f8ff1464 | 7319 | pf->queues_left = queues_left; |
41c445ff JB |
7320 | return; |
7321 | } | |
7322 | ||
7323 | /** | |
7324 | * i40e_setup_pf_filter_control - Setup PF static filter control | |
7325 | * @pf: PF to be setup | |
7326 | * | |
7327 | * i40e_setup_pf_filter_control sets up a pf's initial filter control | |
7328 | * settings. If PE/FCoE are enabled then it will also set the per PF | |
7329 | * based filter sizes required for them. It also enables Flow director, | |
7330 | * ethertype and macvlan type filter settings for the pf. | |
7331 | * | |
7332 | * Returns 0 on success, negative on failure | |
7333 | **/ | |
7334 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf) | |
7335 | { | |
7336 | struct i40e_filter_control_settings *settings = &pf->filter_settings; | |
7337 | ||
7338 | settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; | |
7339 | ||
7340 | /* Flow Director is enabled */ | |
7341 | if (pf->flags & (I40E_FLAG_FDIR_ENABLED | I40E_FLAG_FDIR_ATR_ENABLED)) | |
7342 | settings->enable_fdir = true; | |
7343 | ||
7344 | /* Ethtype and MACVLAN filters enabled for PF */ | |
7345 | settings->enable_ethtype = true; | |
7346 | settings->enable_macvlan = true; | |
7347 | ||
7348 | if (i40e_set_filter_control(&pf->hw, settings)) | |
7349 | return -ENOENT; | |
7350 | ||
7351 | return 0; | |
7352 | } | |
7353 | ||
7354 | /** | |
7355 | * i40e_probe - Device initialization routine | |
7356 | * @pdev: PCI device information struct | |
7357 | * @ent: entry in i40e_pci_tbl | |
7358 | * | |
7359 | * i40e_probe initializes a pf identified by a pci_dev structure. | |
7360 | * The OS initialization, configuring of the pf private structure, | |
7361 | * and a hardware reset occur. | |
7362 | * | |
7363 | * Returns 0 on success, negative on failure | |
7364 | **/ | |
7365 | static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
7366 | { | |
7367 | struct i40e_driver_version dv; | |
7368 | struct i40e_pf *pf; | |
7369 | struct i40e_hw *hw; | |
93cd765b | 7370 | static u16 pfs_found; |
d4dfb81a | 7371 | u16 link_status; |
41c445ff JB |
7372 | int err = 0; |
7373 | u32 len; | |
7374 | ||
7375 | err = pci_enable_device_mem(pdev); | |
7376 | if (err) | |
7377 | return err; | |
7378 | ||
7379 | /* set up for high or low dma */ | |
7380 | if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { | |
7381 | /* coherent mask for the same size will always succeed if | |
7382 | * dma_set_mask does | |
7383 | */ | |
7384 | dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); | |
7385 | } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { | |
7386 | dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
7387 | } else { | |
7388 | dev_err(&pdev->dev, "DMA configuration failed: %d\n", err); | |
7389 | err = -EIO; | |
7390 | goto err_dma; | |
7391 | } | |
7392 | ||
7393 | /* set up pci connections */ | |
7394 | err = pci_request_selected_regions(pdev, pci_select_bars(pdev, | |
7395 | IORESOURCE_MEM), i40e_driver_name); | |
7396 | if (err) { | |
7397 | dev_info(&pdev->dev, | |
7398 | "pci_request_selected_regions failed %d\n", err); | |
7399 | goto err_pci_reg; | |
7400 | } | |
7401 | ||
7402 | pci_enable_pcie_error_reporting(pdev); | |
7403 | pci_set_master(pdev); | |
7404 | ||
7405 | /* Now that we have a PCI connection, we need to do the | |
7406 | * low level device setup. This is primarily setting up | |
7407 | * the Admin Queue structures and then querying for the | |
7408 | * device's current profile information. | |
7409 | */ | |
7410 | pf = kzalloc(sizeof(*pf), GFP_KERNEL); | |
7411 | if (!pf) { | |
7412 | err = -ENOMEM; | |
7413 | goto err_pf_alloc; | |
7414 | } | |
7415 | pf->next_vsi = 0; | |
7416 | pf->pdev = pdev; | |
7417 | set_bit(__I40E_DOWN, &pf->state); | |
7418 | ||
7419 | hw = &pf->hw; | |
7420 | hw->back = pf; | |
7421 | hw->hw_addr = ioremap(pci_resource_start(pdev, 0), | |
7422 | pci_resource_len(pdev, 0)); | |
7423 | if (!hw->hw_addr) { | |
7424 | err = -EIO; | |
7425 | dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", | |
7426 | (unsigned int)pci_resource_start(pdev, 0), | |
7427 | (unsigned int)pci_resource_len(pdev, 0), err); | |
7428 | goto err_ioremap; | |
7429 | } | |
7430 | hw->vendor_id = pdev->vendor; | |
7431 | hw->device_id = pdev->device; | |
7432 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
7433 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
7434 | hw->subsystem_device_id = pdev->subsystem_device; | |
7435 | hw->bus.device = PCI_SLOT(pdev->devfn); | |
7436 | hw->bus.func = PCI_FUNC(pdev->devfn); | |
93cd765b | 7437 | pf->instance = pfs_found; |
41c445ff | 7438 | |
7134f9ce JB |
7439 | /* do a special CORER for clearing PXE mode once at init */ |
7440 | if (hw->revision_id == 0 && | |
7441 | (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { | |
7442 | wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); | |
7443 | i40e_flush(hw); | |
7444 | msleep(200); | |
7445 | pf->corer_count++; | |
7446 | ||
7447 | i40e_clear_pxe_mode(hw); | |
7448 | } | |
7449 | ||
41c445ff JB |
7450 | /* Reset here to make sure all is clean and to define PF 'n' */ |
7451 | err = i40e_pf_reset(hw); | |
7452 | if (err) { | |
7453 | dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); | |
7454 | goto err_pf_reset; | |
7455 | } | |
7456 | pf->pfr_count++; | |
7457 | ||
7458 | hw->aq.num_arq_entries = I40E_AQ_LEN; | |
7459 | hw->aq.num_asq_entries = I40E_AQ_LEN; | |
7460 | hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
7461 | hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
7462 | pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; | |
7463 | snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1, | |
7464 | "%s-pf%d:misc", | |
7465 | dev_driver_string(&pf->pdev->dev), pf->hw.pf_id); | |
7466 | ||
7467 | err = i40e_init_shared_code(hw); | |
7468 | if (err) { | |
7469 | dev_info(&pdev->dev, "init_shared_code failed: %d\n", err); | |
7470 | goto err_pf_reset; | |
7471 | } | |
7472 | ||
d52c20b7 JB |
7473 | /* set up a default setting for link flow control */ |
7474 | pf->hw.fc.requested_mode = I40E_FC_NONE; | |
7475 | ||
41c445ff JB |
7476 | err = i40e_init_adminq(hw); |
7477 | dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw)); | |
fe310704 AS |
7478 | if (((hw->nvm.version & I40E_NVM_VERSION_HI_MASK) |
7479 | >> I40E_NVM_VERSION_HI_SHIFT) != I40E_CURRENT_NVM_VERSION_HI) { | |
7480 | dev_info(&pdev->dev, | |
7481 | "warning: NVM version not supported, supported version: %02x.%02x\n", | |
7482 | I40E_CURRENT_NVM_VERSION_HI, | |
7483 | I40E_CURRENT_NVM_VERSION_LO); | |
7484 | } | |
41c445ff JB |
7485 | if (err) { |
7486 | dev_info(&pdev->dev, | |
7487 | "init_adminq failed: %d expecting API %02x.%02x\n", | |
7488 | err, | |
7489 | I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR); | |
7490 | goto err_pf_reset; | |
7491 | } | |
7492 | ||
7493 | err = i40e_get_capabilities(pf); | |
7494 | if (err) | |
7495 | goto err_adminq_setup; | |
7496 | ||
7497 | err = i40e_sw_init(pf); | |
7498 | if (err) { | |
7499 | dev_info(&pdev->dev, "sw_init failed: %d\n", err); | |
7500 | goto err_sw_init; | |
7501 | } | |
7502 | ||
7503 | err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, | |
7504 | hw->func_caps.num_rx_qp, | |
7505 | pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); | |
7506 | if (err) { | |
7507 | dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); | |
7508 | goto err_init_lan_hmc; | |
7509 | } | |
7510 | ||
7511 | err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
7512 | if (err) { | |
7513 | dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); | |
7514 | err = -ENOENT; | |
7515 | goto err_configure_lan_hmc; | |
7516 | } | |
7517 | ||
7518 | i40e_get_mac_addr(hw, hw->mac.addr); | |
7519 | if (i40e_validate_mac_addr(hw->mac.addr)) { | |
7520 | dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); | |
7521 | err = -EIO; | |
7522 | goto err_mac_addr; | |
7523 | } | |
7524 | dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); | |
7525 | memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN); | |
7526 | ||
7527 | pci_set_drvdata(pdev, pf); | |
7528 | pci_save_state(pdev); | |
7529 | ||
7530 | /* set up periodic task facility */ | |
7531 | setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); | |
7532 | pf->service_timer_period = HZ; | |
7533 | ||
7534 | INIT_WORK(&pf->service_task, i40e_service_task); | |
7535 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); | |
7536 | pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; | |
7537 | pf->link_check_timeout = jiffies; | |
7538 | ||
8e2773ae SN |
7539 | /* WoL defaults to disabled */ |
7540 | pf->wol_en = false; | |
7541 | device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); | |
7542 | ||
41c445ff JB |
7543 | /* set up the main switch operations */ |
7544 | i40e_determine_queue_usage(pf); | |
7545 | i40e_init_interrupt_scheme(pf); | |
7546 | ||
7547 | /* Set up the *vsi struct based on the number of VSIs in the HW, | |
7548 | * and set up our local tracking of the MAIN PF vsi. | |
7549 | */ | |
7550 | len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis; | |
7551 | pf->vsi = kzalloc(len, GFP_KERNEL); | |
ed87ac09 WY |
7552 | if (!pf->vsi) { |
7553 | err = -ENOMEM; | |
41c445ff | 7554 | goto err_switch_setup; |
ed87ac09 | 7555 | } |
41c445ff | 7556 | |
bc7d338f | 7557 | err = i40e_setup_pf_switch(pf, false); |
41c445ff JB |
7558 | if (err) { |
7559 | dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); | |
7560 | goto err_vsis; | |
7561 | } | |
7562 | ||
7563 | /* The main driver is (mostly) up and happy. We need to set this state | |
7564 | * before setting up the misc vector or we get a race and the vector | |
7565 | * ends up disabled forever. | |
7566 | */ | |
7567 | clear_bit(__I40E_DOWN, &pf->state); | |
7568 | ||
7569 | /* In case of MSIX we are going to setup the misc vector right here | |
7570 | * to handle admin queue events etc. In case of legacy and MSI | |
7571 | * the misc functionality and queue processing is combined in | |
7572 | * the same vector and that gets setup at open. | |
7573 | */ | |
7574 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
7575 | err = i40e_setup_misc_vector(pf); | |
7576 | if (err) { | |
7577 | dev_info(&pdev->dev, | |
7578 | "setup of misc vector failed: %d\n", err); | |
7579 | goto err_vsis; | |
7580 | } | |
7581 | } | |
7582 | ||
7583 | /* prep for VF support */ | |
7584 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
7585 | (pf->flags & I40E_FLAG_MSIX_ENABLED)) { | |
7586 | u32 val; | |
7587 | ||
7588 | /* disable link interrupts for VFs */ | |
7589 | val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); | |
7590 | val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; | |
7591 | wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); | |
7592 | i40e_flush(hw); | |
7593 | } | |
7594 | ||
93cd765b ASJ |
7595 | pfs_found++; |
7596 | ||
41c445ff JB |
7597 | i40e_dbg_pf_init(pf); |
7598 | ||
7599 | /* tell the firmware that we're starting */ | |
7600 | dv.major_version = DRV_VERSION_MAJOR; | |
7601 | dv.minor_version = DRV_VERSION_MINOR; | |
7602 | dv.build_version = DRV_VERSION_BUILD; | |
7603 | dv.subbuild_version = 0; | |
7604 | i40e_aq_send_driver_version(&pf->hw, &dv, NULL); | |
7605 | ||
7606 | /* since everything's happy, start the service_task timer */ | |
7607 | mod_timer(&pf->service_timer, | |
7608 | round_jiffies(jiffies + pf->service_timer_period)); | |
7609 | ||
d4dfb81a CS |
7610 | /* Get the negotiated link width and speed from PCI config space */ |
7611 | pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status); | |
7612 | ||
7613 | i40e_set_pci_config_data(hw, link_status); | |
7614 | ||
7615 | dev_info(&pdev->dev, "PCI Express: %s %s\n", | |
7616 | (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" : | |
7617 | hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" : | |
7618 | hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" : | |
7619 | "Unknown"), | |
7620 | (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" : | |
7621 | hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" : | |
7622 | hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" : | |
7623 | hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" : | |
7624 | "Unknown")); | |
7625 | ||
7626 | if (hw->bus.width < i40e_bus_width_pcie_x8 || | |
7627 | hw->bus.speed < i40e_bus_speed_8000) { | |
7628 | dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); | |
7629 | dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); | |
7630 | } | |
7631 | ||
41c445ff JB |
7632 | return 0; |
7633 | ||
7634 | /* Unwind what we've done if something failed in the setup */ | |
7635 | err_vsis: | |
7636 | set_bit(__I40E_DOWN, &pf->state); | |
7637 | err_switch_setup: | |
7638 | i40e_clear_interrupt_scheme(pf); | |
7639 | kfree(pf->vsi); | |
7640 | del_timer_sync(&pf->service_timer); | |
7641 | err_mac_addr: | |
7642 | err_configure_lan_hmc: | |
7643 | (void)i40e_shutdown_lan_hmc(hw); | |
7644 | err_init_lan_hmc: | |
7645 | kfree(pf->qp_pile); | |
7646 | kfree(pf->irq_pile); | |
7647 | err_sw_init: | |
7648 | err_adminq_setup: | |
7649 | (void)i40e_shutdown_adminq(hw); | |
7650 | err_pf_reset: | |
7651 | iounmap(hw->hw_addr); | |
7652 | err_ioremap: | |
7653 | kfree(pf); | |
7654 | err_pf_alloc: | |
7655 | pci_disable_pcie_error_reporting(pdev); | |
7656 | pci_release_selected_regions(pdev, | |
7657 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
7658 | err_pci_reg: | |
7659 | err_dma: | |
7660 | pci_disable_device(pdev); | |
7661 | return err; | |
7662 | } | |
7663 | ||
7664 | /** | |
7665 | * i40e_remove - Device removal routine | |
7666 | * @pdev: PCI device information struct | |
7667 | * | |
7668 | * i40e_remove is called by the PCI subsystem to alert the driver | |
7669 | * that is should release a PCI device. This could be caused by a | |
7670 | * Hot-Plug event, or because the driver is going to be removed from | |
7671 | * memory. | |
7672 | **/ | |
7673 | static void i40e_remove(struct pci_dev *pdev) | |
7674 | { | |
7675 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7676 | i40e_status ret_code; | |
7677 | u32 reg; | |
7678 | int i; | |
7679 | ||
7680 | i40e_dbg_pf_exit(pf); | |
7681 | ||
7682 | if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { | |
7683 | i40e_free_vfs(pf); | |
7684 | pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; | |
7685 | } | |
7686 | ||
7687 | /* no more scheduling of any task */ | |
7688 | set_bit(__I40E_DOWN, &pf->state); | |
7689 | del_timer_sync(&pf->service_timer); | |
7690 | cancel_work_sync(&pf->service_task); | |
7691 | ||
7692 | i40e_fdir_teardown(pf); | |
7693 | ||
7694 | /* If there is a switch structure or any orphans, remove them. | |
7695 | * This will leave only the PF's VSI remaining. | |
7696 | */ | |
7697 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
7698 | if (!pf->veb[i]) | |
7699 | continue; | |
7700 | ||
7701 | if (pf->veb[i]->uplink_seid == pf->mac_seid || | |
7702 | pf->veb[i]->uplink_seid == 0) | |
7703 | i40e_switch_branch_release(pf->veb[i]); | |
7704 | } | |
7705 | ||
7706 | /* Now we can shutdown the PF's VSI, just before we kill | |
7707 | * adminq and hmc. | |
7708 | */ | |
7709 | if (pf->vsi[pf->lan_vsi]) | |
7710 | i40e_vsi_release(pf->vsi[pf->lan_vsi]); | |
7711 | ||
7712 | i40e_stop_misc_vector(pf); | |
7713 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
7714 | synchronize_irq(pf->msix_entries[0].vector); | |
7715 | free_irq(pf->msix_entries[0].vector, pf); | |
7716 | } | |
7717 | ||
7718 | /* shutdown and destroy the HMC */ | |
7719 | ret_code = i40e_shutdown_lan_hmc(&pf->hw); | |
7720 | if (ret_code) | |
7721 | dev_warn(&pdev->dev, | |
7722 | "Failed to destroy the HMC resources: %d\n", ret_code); | |
7723 | ||
7724 | /* shutdown the adminq */ | |
7725 | i40e_aq_queue_shutdown(&pf->hw, true); | |
7726 | ret_code = i40e_shutdown_adminq(&pf->hw); | |
7727 | if (ret_code) | |
7728 | dev_warn(&pdev->dev, | |
7729 | "Failed to destroy the Admin Queue resources: %d\n", | |
7730 | ret_code); | |
7731 | ||
7732 | /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ | |
7733 | i40e_clear_interrupt_scheme(pf); | |
7734 | for (i = 0; i < pf->hw.func_caps.num_vsis; i++) { | |
7735 | if (pf->vsi[i]) { | |
7736 | i40e_vsi_clear_rings(pf->vsi[i]); | |
7737 | i40e_vsi_clear(pf->vsi[i]); | |
7738 | pf->vsi[i] = NULL; | |
7739 | } | |
7740 | } | |
7741 | ||
7742 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
7743 | kfree(pf->veb[i]); | |
7744 | pf->veb[i] = NULL; | |
7745 | } | |
7746 | ||
7747 | kfree(pf->qp_pile); | |
7748 | kfree(pf->irq_pile); | |
7749 | kfree(pf->sw_config); | |
7750 | kfree(pf->vsi); | |
7751 | ||
7752 | /* force a PF reset to clean anything leftover */ | |
7753 | reg = rd32(&pf->hw, I40E_PFGEN_CTRL); | |
7754 | wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK)); | |
7755 | i40e_flush(&pf->hw); | |
7756 | ||
7757 | iounmap(pf->hw.hw_addr); | |
7758 | kfree(pf); | |
7759 | pci_release_selected_regions(pdev, | |
7760 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
7761 | ||
7762 | pci_disable_pcie_error_reporting(pdev); | |
7763 | pci_disable_device(pdev); | |
7764 | } | |
7765 | ||
7766 | /** | |
7767 | * i40e_pci_error_detected - warning that something funky happened in PCI land | |
7768 | * @pdev: PCI device information struct | |
7769 | * | |
7770 | * Called to warn that something happened and the error handling steps | |
7771 | * are in progress. Allows the driver to quiesce things, be ready for | |
7772 | * remediation. | |
7773 | **/ | |
7774 | static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, | |
7775 | enum pci_channel_state error) | |
7776 | { | |
7777 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7778 | ||
7779 | dev_info(&pdev->dev, "%s: error %d\n", __func__, error); | |
7780 | ||
7781 | /* shutdown all operations */ | |
9007bccd SN |
7782 | if (!test_bit(__I40E_SUSPENDED, &pf->state)) { |
7783 | rtnl_lock(); | |
7784 | i40e_prep_for_reset(pf); | |
7785 | rtnl_unlock(); | |
7786 | } | |
41c445ff JB |
7787 | |
7788 | /* Request a slot reset */ | |
7789 | return PCI_ERS_RESULT_NEED_RESET; | |
7790 | } | |
7791 | ||
7792 | /** | |
7793 | * i40e_pci_error_slot_reset - a PCI slot reset just happened | |
7794 | * @pdev: PCI device information struct | |
7795 | * | |
7796 | * Called to find if the driver can work with the device now that | |
7797 | * the pci slot has been reset. If a basic connection seems good | |
7798 | * (registers are readable and have sane content) then return a | |
7799 | * happy little PCI_ERS_RESULT_xxx. | |
7800 | **/ | |
7801 | static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) | |
7802 | { | |
7803 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7804 | pci_ers_result_t result; | |
7805 | int err; | |
7806 | u32 reg; | |
7807 | ||
7808 | dev_info(&pdev->dev, "%s\n", __func__); | |
7809 | if (pci_enable_device_mem(pdev)) { | |
7810 | dev_info(&pdev->dev, | |
7811 | "Cannot re-enable PCI device after reset.\n"); | |
7812 | result = PCI_ERS_RESULT_DISCONNECT; | |
7813 | } else { | |
7814 | pci_set_master(pdev); | |
7815 | pci_restore_state(pdev); | |
7816 | pci_save_state(pdev); | |
7817 | pci_wake_from_d3(pdev, false); | |
7818 | ||
7819 | reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
7820 | if (reg == 0) | |
7821 | result = PCI_ERS_RESULT_RECOVERED; | |
7822 | else | |
7823 | result = PCI_ERS_RESULT_DISCONNECT; | |
7824 | } | |
7825 | ||
7826 | err = pci_cleanup_aer_uncorrect_error_status(pdev); | |
7827 | if (err) { | |
7828 | dev_info(&pdev->dev, | |
7829 | "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", | |
7830 | err); | |
7831 | /* non-fatal, continue */ | |
7832 | } | |
7833 | ||
7834 | return result; | |
7835 | } | |
7836 | ||
7837 | /** | |
7838 | * i40e_pci_error_resume - restart operations after PCI error recovery | |
7839 | * @pdev: PCI device information struct | |
7840 | * | |
7841 | * Called to allow the driver to bring things back up after PCI error | |
7842 | * and/or reset recovery has finished. | |
7843 | **/ | |
7844 | static void i40e_pci_error_resume(struct pci_dev *pdev) | |
7845 | { | |
7846 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7847 | ||
7848 | dev_info(&pdev->dev, "%s\n", __func__); | |
9007bccd SN |
7849 | if (test_bit(__I40E_SUSPENDED, &pf->state)) |
7850 | return; | |
7851 | ||
7852 | rtnl_lock(); | |
41c445ff | 7853 | i40e_handle_reset_warning(pf); |
9007bccd SN |
7854 | rtnl_lock(); |
7855 | } | |
7856 | ||
7857 | /** | |
7858 | * i40e_shutdown - PCI callback for shutting down | |
7859 | * @pdev: PCI device information struct | |
7860 | **/ | |
7861 | static void i40e_shutdown(struct pci_dev *pdev) | |
7862 | { | |
7863 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8e2773ae | 7864 | struct i40e_hw *hw = &pf->hw; |
9007bccd SN |
7865 | |
7866 | set_bit(__I40E_SUSPENDED, &pf->state); | |
7867 | set_bit(__I40E_DOWN, &pf->state); | |
7868 | rtnl_lock(); | |
7869 | i40e_prep_for_reset(pf); | |
7870 | rtnl_unlock(); | |
7871 | ||
8e2773ae SN |
7872 | wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); |
7873 | wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); | |
7874 | ||
9007bccd | 7875 | if (system_state == SYSTEM_POWER_OFF) { |
8e2773ae | 7876 | pci_wake_from_d3(pdev, pf->wol_en); |
9007bccd SN |
7877 | pci_set_power_state(pdev, PCI_D3hot); |
7878 | } | |
7879 | } | |
7880 | ||
7881 | #ifdef CONFIG_PM | |
7882 | /** | |
7883 | * i40e_suspend - PCI callback for moving to D3 | |
7884 | * @pdev: PCI device information struct | |
7885 | **/ | |
7886 | static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) | |
7887 | { | |
7888 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8e2773ae | 7889 | struct i40e_hw *hw = &pf->hw; |
9007bccd SN |
7890 | |
7891 | set_bit(__I40E_SUSPENDED, &pf->state); | |
7892 | set_bit(__I40E_DOWN, &pf->state); | |
7893 | rtnl_lock(); | |
7894 | i40e_prep_for_reset(pf); | |
7895 | rtnl_unlock(); | |
7896 | ||
8e2773ae SN |
7897 | wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); |
7898 | wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); | |
7899 | ||
7900 | pci_wake_from_d3(pdev, pf->wol_en); | |
9007bccd SN |
7901 | pci_set_power_state(pdev, PCI_D3hot); |
7902 | ||
7903 | return 0; | |
41c445ff JB |
7904 | } |
7905 | ||
9007bccd SN |
7906 | /** |
7907 | * i40e_resume - PCI callback for waking up from D3 | |
7908 | * @pdev: PCI device information struct | |
7909 | **/ | |
7910 | static int i40e_resume(struct pci_dev *pdev) | |
7911 | { | |
7912 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
7913 | u32 err; | |
7914 | ||
7915 | pci_set_power_state(pdev, PCI_D0); | |
7916 | pci_restore_state(pdev); | |
7917 | /* pci_restore_state() clears dev->state_saves, so | |
7918 | * call pci_save_state() again to restore it. | |
7919 | */ | |
7920 | pci_save_state(pdev); | |
7921 | ||
7922 | err = pci_enable_device_mem(pdev); | |
7923 | if (err) { | |
7924 | dev_err(&pdev->dev, | |
7925 | "%s: Cannot enable PCI device from suspend\n", | |
7926 | __func__); | |
7927 | return err; | |
7928 | } | |
7929 | pci_set_master(pdev); | |
7930 | ||
7931 | /* no wakeup events while running */ | |
7932 | pci_wake_from_d3(pdev, false); | |
7933 | ||
7934 | /* handling the reset will rebuild the device state */ | |
7935 | if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { | |
7936 | clear_bit(__I40E_DOWN, &pf->state); | |
7937 | rtnl_lock(); | |
7938 | i40e_reset_and_rebuild(pf, false); | |
7939 | rtnl_unlock(); | |
7940 | } | |
7941 | ||
7942 | return 0; | |
7943 | } | |
7944 | ||
7945 | #endif | |
41c445ff JB |
7946 | static const struct pci_error_handlers i40e_err_handler = { |
7947 | .error_detected = i40e_pci_error_detected, | |
7948 | .slot_reset = i40e_pci_error_slot_reset, | |
7949 | .resume = i40e_pci_error_resume, | |
7950 | }; | |
7951 | ||
7952 | static struct pci_driver i40e_driver = { | |
7953 | .name = i40e_driver_name, | |
7954 | .id_table = i40e_pci_tbl, | |
7955 | .probe = i40e_probe, | |
7956 | .remove = i40e_remove, | |
9007bccd SN |
7957 | #ifdef CONFIG_PM |
7958 | .suspend = i40e_suspend, | |
7959 | .resume = i40e_resume, | |
7960 | #endif | |
7961 | .shutdown = i40e_shutdown, | |
41c445ff JB |
7962 | .err_handler = &i40e_err_handler, |
7963 | .sriov_configure = i40e_pci_sriov_configure, | |
7964 | }; | |
7965 | ||
7966 | /** | |
7967 | * i40e_init_module - Driver registration routine | |
7968 | * | |
7969 | * i40e_init_module is the first routine called when the driver is | |
7970 | * loaded. All it does is register with the PCI subsystem. | |
7971 | **/ | |
7972 | static int __init i40e_init_module(void) | |
7973 | { | |
7974 | pr_info("%s: %s - version %s\n", i40e_driver_name, | |
7975 | i40e_driver_string, i40e_driver_version_str); | |
7976 | pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); | |
7977 | i40e_dbg_init(); | |
7978 | return pci_register_driver(&i40e_driver); | |
7979 | } | |
7980 | module_init(i40e_init_module); | |
7981 | ||
7982 | /** | |
7983 | * i40e_exit_module - Driver exit cleanup routine | |
7984 | * | |
7985 | * i40e_exit_module is called just before the driver is removed | |
7986 | * from memory. | |
7987 | **/ | |
7988 | static void __exit i40e_exit_module(void) | |
7989 | { | |
7990 | pci_unregister_driver(&i40e_driver); | |
7991 | i40e_dbg_exit(); | |
7992 | } | |
7993 | module_exit(i40e_exit_module); |