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56a62fc8 JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
8a187f44 | 4 | * Copyright(c) 2013 - 2016 Intel Corporation. |
56a62fc8 JB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
56a62fc8 JB |
17 | * |
18 | * The full GNU General Public License is included in this distribution in | |
19 | * the file called "COPYING". | |
20 | * | |
21 | * Contact Information: | |
22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | ******************************************************************************/ | |
26 | ||
27 | #ifndef _I40E_PROTOTYPE_H_ | |
28 | #define _I40E_PROTOTYPE_H_ | |
29 | ||
30 | #include "i40e_type.h" | |
31 | #include "i40e_alloc.h" | |
32 | #include "i40e_virtchnl.h" | |
33 | ||
34 | /* Prototypes for shared code functions that are not in | |
35 | * the standard function pointer structures. These are | |
36 | * mostly because they are needed even before the init | |
37 | * has happened and will assist in the early SW and FW | |
38 | * setup. | |
39 | */ | |
40 | ||
41 | /* adminq functions */ | |
42 | i40e_status i40e_init_adminq(struct i40e_hw *hw); | |
43 | i40e_status i40e_shutdown_adminq(struct i40e_hw *hw); | |
44 | void i40e_adminq_init_ring_data(struct i40e_hw *hw); | |
45 | i40e_status i40e_clean_arq_element(struct i40e_hw *hw, | |
46 | struct i40e_arq_event_info *e, | |
47 | u16 *events_pending); | |
48 | i40e_status i40e_asq_send_command(struct i40e_hw *hw, | |
49 | struct i40e_aq_desc *desc, | |
50 | void *buff, /* can be NULL */ | |
51 | u16 buff_size, | |
52 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
53 | |
54 | /* debug function for adminq */ | |
f905dd62 SN |
55 | void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, |
56 | void *desc, void *buffer, u16 buf_len); | |
56a62fc8 JB |
57 | |
58 | void i40e_idle_aq(struct i40e_hw *hw); | |
e1860d8f | 59 | bool i40e_check_asq_alive(struct i40e_hw *hw); |
8fb905b3 | 60 | i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading); |
4e68adfe JW |
61 | const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err); |
62 | const char *i40e_stat_str(struct i40e_hw *hw, i40e_status stat_err); | |
56a62fc8 | 63 | |
e50c8d6d ASJ |
64 | i40e_status i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid, |
65 | bool pf_lut, u8 *lut, u16 lut_size); | |
66 | i40e_status i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 seid, | |
67 | bool pf_lut, u8 *lut, u16 lut_size); | |
68 | i40e_status i40e_aq_get_rss_key(struct i40e_hw *hw, | |
69 | u16 seid, | |
70 | struct i40e_aqc_get_set_rss_key_data *key); | |
71 | i40e_status i40e_aq_set_rss_key(struct i40e_hw *hw, | |
72 | u16 seid, | |
73 | struct i40e_aqc_get_set_rss_key_data *key); | |
74 | ||
56a62fc8 | 75 | u32 i40e_led_get(struct i40e_hw *hw); |
0556a9e3 | 76 | void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink); |
56a62fc8 JB |
77 | |
78 | /* admin send queue commands */ | |
79 | ||
80 | i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw, | |
81 | u16 *fw_major_version, u16 *fw_minor_version, | |
7edf810c | 82 | u32 *fw_build, |
56a62fc8 JB |
83 | u16 *api_major_version, u16 *api_minor_version, |
84 | struct i40e_asq_cmd_details *cmd_details); | |
53db45cd SN |
85 | i40e_status i40e_aq_debug_write_register(struct i40e_hw *hw, |
86 | u32 reg_addr, u64 reg_val, | |
87 | struct i40e_asq_cmd_details *cmd_details); | |
9fee9db5 SN |
88 | i40e_status i40e_aq_debug_read_register(struct i40e_hw *hw, |
89 | u32 reg_addr, u64 *reg_val, | |
90 | struct i40e_asq_cmd_details *cmd_details); | |
f94234ee | 91 | i40e_status i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags, |
56a62fc8 JB |
92 | struct i40e_asq_cmd_details *cmd_details); |
93 | i40e_status i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id, | |
94 | struct i40e_asq_cmd_details *cmd_details); | |
c56999f9 CS |
95 | enum i40e_status_code i40e_aq_get_phy_capabilities(struct i40e_hw *hw, |
96 | bool qualified_modules, bool report_init, | |
97 | struct i40e_aq_get_phy_abilities_resp *abilities, | |
98 | struct i40e_asq_cmd_details *cmd_details); | |
99 | enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw, | |
100 | struct i40e_aq_set_phy_config *config, | |
101 | struct i40e_asq_cmd_details *cmd_details); | |
102 | enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, | |
103 | bool atomic_reset); | |
7e2453fe JB |
104 | i40e_status i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask, |
105 | struct i40e_asq_cmd_details *cmd_details); | |
c9b9b0ae SN |
106 | i40e_status i40e_aq_clear_pxe_mode(struct i40e_hw *hw, |
107 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 | 108 | i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw, |
1ac978af CS |
109 | bool enable_link, |
110 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
111 | i40e_status i40e_aq_get_link_info(struct i40e_hw *hw, |
112 | bool enable_lse, struct i40e_link_status *link, | |
113 | struct i40e_asq_cmd_details *cmd_details); | |
114 | i40e_status i40e_aq_set_local_advt_reg(struct i40e_hw *hw, | |
115 | u64 advt_reg, | |
116 | struct i40e_asq_cmd_details *cmd_details); | |
117 | i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw, | |
118 | struct i40e_driver_version *dv, | |
119 | struct i40e_asq_cmd_details *cmd_details); | |
120 | i40e_status i40e_aq_add_vsi(struct i40e_hw *hw, | |
121 | struct i40e_vsi_context *vsi_ctx, | |
122 | struct i40e_asq_cmd_details *cmd_details); | |
123 | i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw, | |
124 | u16 vsi_id, bool set_filter, | |
125 | struct i40e_asq_cmd_details *cmd_details); | |
126 | i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw, | |
885552a2 | 127 | u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details); |
56a62fc8 | 128 | i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw, |
885552a2 | 129 | u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details); |
7bd6875b KP |
130 | i40e_status i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw, |
131 | u16 seid, bool enable, | |
132 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
133 | i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw, |
134 | struct i40e_vsi_context *vsi_ctx, | |
135 | struct i40e_asq_cmd_details *cmd_details); | |
136 | i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw, | |
137 | struct i40e_vsi_context *vsi_ctx, | |
138 | struct i40e_asq_cmd_details *cmd_details); | |
139 | i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid, | |
140 | u16 downlink_seid, u8 enabled_tc, | |
8a187f44 SN |
141 | bool default_port, u16 *pveb_seid, |
142 | bool enable_stats, | |
56a62fc8 JB |
143 | struct i40e_asq_cmd_details *cmd_details); |
144 | i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw, | |
145 | u16 veb_seid, u16 *switch_id, bool *floating, | |
146 | u16 *statistic_index, u16 *vebs_used, | |
147 | u16 *vebs_free, | |
148 | struct i40e_asq_cmd_details *cmd_details); | |
149 | i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 vsi_id, | |
150 | struct i40e_aqc_add_macvlan_element_data *mv_list, | |
151 | u16 count, struct i40e_asq_cmd_details *cmd_details); | |
152 | i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 vsi_id, | |
153 | struct i40e_aqc_remove_macvlan_element_data *mv_list, | |
154 | u16 count, struct i40e_asq_cmd_details *cmd_details); | |
7bd6875b KP |
155 | i40e_status i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid, |
156 | u16 rule_type, u16 dest_vsi, u16 count, __le16 *mr_list, | |
157 | struct i40e_asq_cmd_details *cmd_details, | |
158 | u16 *rule_id, u16 *rules_used, u16 *rules_free); | |
159 | i40e_status i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid, | |
160 | u16 rule_type, u16 rule_id, u16 count, __le16 *mr_list, | |
161 | struct i40e_asq_cmd_details *cmd_details, | |
162 | u16 *rules_used, u16 *rules_free); | |
163 | ||
56a62fc8 JB |
164 | i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid, |
165 | u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen, | |
166 | struct i40e_asq_cmd_details *cmd_details); | |
167 | i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw, | |
168 | struct i40e_aqc_get_switch_config_resp *buf, | |
169 | u16 buf_size, u16 *start_seid, | |
170 | struct i40e_asq_cmd_details *cmd_details); | |
171 | i40e_status i40e_aq_request_resource(struct i40e_hw *hw, | |
172 | enum i40e_aq_resources_ids resource, | |
173 | enum i40e_aq_resource_access_type access, | |
174 | u8 sdp_number, u64 *timeout, | |
175 | struct i40e_asq_cmd_details *cmd_details); | |
176 | i40e_status i40e_aq_release_resource(struct i40e_hw *hw, | |
177 | enum i40e_aq_resources_ids resource, | |
178 | u8 sdp_number, | |
179 | struct i40e_asq_cmd_details *cmd_details); | |
180 | i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer, | |
181 | u32 offset, u16 length, void *data, | |
182 | bool last_command, | |
183 | struct i40e_asq_cmd_details *cmd_details); | |
cd552cb4 SN |
184 | i40e_status i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer, |
185 | u32 offset, u16 length, bool last_command, | |
186 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
187 | i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw, |
188 | void *buff, u16 buff_size, u16 *data_size, | |
189 | enum i40e_admin_queue_opc list_type_opc, | |
190 | struct i40e_asq_cmd_details *cmd_details); | |
191 | i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer, | |
192 | u32 offset, u16 length, void *data, | |
193 | bool last_command, | |
194 | struct i40e_asq_cmd_details *cmd_details); | |
195 | i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type, | |
196 | u8 mib_type, void *buff, u16 buff_size, | |
197 | u16 *local_len, u16 *remote_len, | |
198 | struct i40e_asq_cmd_details *cmd_details); | |
199 | i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw, | |
200 | bool enable_update, | |
201 | struct i40e_asq_cmd_details *cmd_details); | |
202 | i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent, | |
203 | struct i40e_asq_cmd_details *cmd_details); | |
204 | i40e_status i40e_aq_start_lldp(struct i40e_hw *hw, | |
205 | struct i40e_asq_cmd_details *cmd_details); | |
9fa61dd2 NP |
206 | i40e_status i40e_aq_get_cee_dcb_config(struct i40e_hw *hw, |
207 | void *buff, u16 buff_size, | |
208 | struct i40e_asq_cmd_details *cmd_details); | |
a1c9a9d9 | 209 | i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw, |
f4f94b94 KS |
210 | u16 udp_port, u8 protocol_index, |
211 | u8 *filter_index, | |
a1c9a9d9 JK |
212 | struct i40e_asq_cmd_details *cmd_details); |
213 | i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index, | |
214 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
215 | i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid, |
216 | struct i40e_asq_cmd_details *cmd_details); | |
217 | i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw, | |
218 | u16 flags, u8 *mac_addr, | |
219 | struct i40e_asq_cmd_details *cmd_details); | |
6b192891 MW |
220 | i40e_status i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw, |
221 | u16 seid, u16 credit, u8 max_credit, | |
222 | struct i40e_asq_cmd_details *cmd_details); | |
afb3ff0d NP |
223 | i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw, |
224 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
225 | i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw, |
226 | enum i40e_aq_hmc_profile profile, | |
227 | u8 pe_vf_enabled_count, | |
228 | struct i40e_asq_cmd_details *cmd_details); | |
229 | i40e_status i40e_aq_config_switch_comp_bw_limit(struct i40e_hw *hw, | |
230 | u16 seid, u16 credit, u8 max_bw, | |
231 | struct i40e_asq_cmd_details *cmd_details); | |
232 | i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw, u16 seid, | |
233 | struct i40e_aqc_configure_vsi_tc_bw_data *bw_data, | |
234 | struct i40e_asq_cmd_details *cmd_details); | |
afb3ff0d NP |
235 | i40e_status i40e_aq_config_switch_comp_ets(struct i40e_hw *hw, |
236 | u16 seid, | |
237 | struct i40e_aqc_configure_switching_comp_ets_data *ets_data, | |
238 | enum i40e_admin_queue_opc opcode, | |
239 | struct i40e_asq_cmd_details *cmd_details); | |
240 | i40e_status i40e_aq_config_switch_comp_bw_config(struct i40e_hw *hw, | |
241 | u16 seid, | |
242 | struct i40e_aqc_configure_switching_comp_bw_config_data *bw_data, | |
243 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
244 | i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw, |
245 | u16 seid, | |
246 | struct i40e_aqc_query_vsi_bw_config_resp *bw_data, | |
247 | struct i40e_asq_cmd_details *cmd_details); | |
248 | i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw, | |
249 | u16 seid, | |
250 | struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data, | |
251 | struct i40e_asq_cmd_details *cmd_details); | |
252 | i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw, | |
253 | u16 seid, | |
254 | struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data, | |
255 | struct i40e_asq_cmd_details *cmd_details); | |
256 | i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw, | |
257 | u16 seid, | |
258 | struct i40e_aqc_query_port_ets_config_resp *bw_data, | |
259 | struct i40e_asq_cmd_details *cmd_details); | |
260 | i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw, | |
261 | u16 seid, | |
262 | struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data, | |
263 | struct i40e_asq_cmd_details *cmd_details); | |
2fd75f31 NP |
264 | i40e_status i40e_aq_resume_port_tx(struct i40e_hw *hw, |
265 | struct i40e_asq_cmd_details *cmd_details); | |
e1c4751e NP |
266 | i40e_status i40e_read_lldp_cfg(struct i40e_hw *hw, |
267 | struct i40e_lldp_variables *lldp_cfg); | |
56a62fc8 JB |
268 | /* i40e_common */ |
269 | i40e_status i40e_init_shared_code(struct i40e_hw *hw); | |
270 | i40e_status i40e_pf_reset(struct i40e_hw *hw); | |
838d41d9 | 271 | void i40e_clear_hw(struct i40e_hw *hw); |
56a62fc8 | 272 | void i40e_clear_pxe_mode(struct i40e_hw *hw); |
a72a5abc | 273 | i40e_status i40e_get_link_status(struct i40e_hw *hw, bool *link_up); |
0a862b43 | 274 | i40e_status i40e_update_link_info(struct i40e_hw *hw); |
1f224ad2 | 275 | i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr); |
f4492db1 GR |
276 | i40e_status i40e_read_bw_from_alt_ram(struct i40e_hw *hw, |
277 | u32 *max_bw, u32 *min_bw, bool *min_valid, | |
278 | bool *max_valid); | |
279 | i40e_status i40e_aq_configure_partition_bw(struct i40e_hw *hw, | |
280 | struct i40e_aqc_configure_partition_bw_data *bw_data, | |
281 | struct i40e_asq_cmd_details *cmd_details); | |
1f224ad2 | 282 | i40e_status i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr); |
18f680c6 KK |
283 | i40e_status i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num, |
284 | u32 pba_num_size); | |
afb3ff0d | 285 | i40e_status i40e_validate_mac_addr(u8 *mac_addr); |
351499ab | 286 | void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable); |
38e00438 VD |
287 | #ifdef I40E_FCOE |
288 | i40e_status i40e_get_san_mac_addr(struct i40e_hw *hw, u8 *mac_addr); | |
289 | #endif | |
56a62fc8 JB |
290 | /* prototype for functions used for NVM access */ |
291 | i40e_status i40e_init_nvm(struct i40e_hw *hw); | |
292 | i40e_status i40e_acquire_nvm(struct i40e_hw *hw, | |
293 | enum i40e_aq_resource_access_type access); | |
294 | void i40e_release_nvm(struct i40e_hw *hw); | |
56a62fc8 JB |
295 | i40e_status i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, |
296 | u16 *data); | |
297 | i40e_status i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, | |
298 | u16 *words, u16 *data); | |
cd552cb4 | 299 | i40e_status i40e_update_nvm_checksum(struct i40e_hw *hw); |
56a62fc8 JB |
300 | i40e_status i40e_validate_nvm_checksum(struct i40e_hw *hw, |
301 | u16 *checksum); | |
cd552cb4 SN |
302 | i40e_status i40e_nvmupd_command(struct i40e_hw *hw, |
303 | struct i40e_nvm_access *cmd, | |
304 | u8 *bytes, int *); | |
d4dfb81a | 305 | void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status); |
56a62fc8 | 306 | |
206812b5 JB |
307 | extern struct i40e_rx_ptype_decoded i40e_ptype_lookup[]; |
308 | ||
309 | static inline struct i40e_rx_ptype_decoded decode_rx_desc_ptype(u8 ptype) | |
310 | { | |
311 | return i40e_ptype_lookup[ptype]; | |
312 | } | |
313 | ||
56a62fc8 JB |
314 | /* prototype for functions used for SW locks */ |
315 | ||
316 | /* i40e_common for VF drivers*/ | |
317 | void i40e_vf_parse_hw_config(struct i40e_hw *hw, | |
318 | struct i40e_virtchnl_vf_resource *msg); | |
319 | i40e_status i40e_vf_reset(struct i40e_hw *hw); | |
320 | i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw, | |
321 | enum i40e_virtchnl_ops v_opcode, | |
322 | i40e_status v_retval, | |
323 | u8 *msg, u16 msglen, | |
324 | struct i40e_asq_cmd_details *cmd_details); | |
325 | i40e_status i40e_set_filter_control(struct i40e_hw *hw, | |
326 | struct i40e_filter_control_settings *settings); | |
afb3ff0d NP |
327 | i40e_status i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw, |
328 | u8 *mac_addr, u16 ethtype, u16 flags, | |
329 | u16 vsi_seid, u16 queue, bool is_add, | |
330 | struct i40e_control_filter_stats *stats, | |
331 | struct i40e_asq_cmd_details *cmd_details); | |
3169c323 JB |
332 | i40e_status i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id, |
333 | u8 table_id, u32 start_index, u16 buff_size, | |
334 | void *buff, u16 *ret_buff_size, | |
335 | u8 *ret_next_table, u32 *ret_next_index, | |
336 | struct i40e_asq_cmd_details *cmd_details); | |
e7358f54 ASJ |
337 | void i40e_add_filter_to_drop_tx_flow_control_frames(struct i40e_hw *hw, |
338 | u16 vsi_seid); | |
56a62fc8 | 339 | #endif /* _I40E_PROTOTYPE_H_ */ |