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i40e: Record dma buffer info for dummy packets
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28#include "i40e.h"
29
30/***********************misc routines*****************************/
31
32/**
33 * i40e_vc_isvalid_vsi_id
34 * @vf: pointer to the vf info
35 * @vsi_id: vf relative vsi id
36 *
37 * check for the valid vsi id
38 **/
39static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u8 vsi_id)
40{
41 struct i40e_pf *pf = vf->pf;
42
43 return pf->vsi[vsi_id]->vf_id == vf->vf_id;
44}
45
46/**
47 * i40e_vc_isvalid_queue_id
48 * @vf: pointer to the vf info
49 * @vsi_id: vsi id
50 * @qid: vsi relative queue id
51 *
52 * check for the valid queue id
53 **/
54static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u8 vsi_id,
55 u8 qid)
56{
57 struct i40e_pf *pf = vf->pf;
58
59 return qid < pf->vsi[vsi_id]->num_queue_pairs;
60}
61
62/**
63 * i40e_vc_isvalid_vector_id
64 * @vf: pointer to the vf info
65 * @vector_id: vf relative vector id
66 *
67 * check for the valid vector id
68 **/
69static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
70{
71 struct i40e_pf *pf = vf->pf;
72
54692b40 73 return vector_id <= pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 74}
75
76/***********************vf resource mgmt routines*****************/
77
78/**
79 * i40e_vc_get_pf_queue_id
80 * @vf: pointer to the vf info
81 * @vsi_idx: index of VSI in PF struct
82 * @vsi_queue_id: vsi relative queue id
83 *
84 * return pf relative queue id
85 **/
86static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u8 vsi_idx,
87 u8 vsi_queue_id)
88{
89 struct i40e_pf *pf = vf->pf;
90 struct i40e_vsi *vsi = pf->vsi[vsi_idx];
91 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
92
93 if (le16_to_cpu(vsi->info.mapping_flags) &
94 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
95 pf_queue_id =
96 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
97 else
98 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
99 vsi_queue_id;
100
101 return pf_queue_id;
102}
103
5c3c48ac
JB		 104/**
105 * i40e_config_irq_link_list
106 * @vf: pointer to the vf info
107 * @vsi_idx: index of VSI in PF struct
108 * @vecmap: irq map info
109 *
110 * configure irq link list from the map
111 **/
112static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_idx,
113 struct i40e_virtchnl_vector_map *vecmap)
114{
115 unsigned long linklistmap = 0, tempmap;
116 struct i40e_pf *pf = vf->pf;
117 struct i40e_hw *hw = &pf->hw;
118 u16 vsi_queue_id, pf_queue_id;
119 enum i40e_queue_type qtype;
120 u16 next_q, vector_id;
121 u32 reg, reg_idx;
122 u16 itr_idx = 0;
123
124 vector_id = vecmap->vector_id;
125 /* setup the head */
126 if (0 == vector_id)
127 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
128 else
129 reg_idx = I40E_VPINT_LNKLSTN(
13c60b99 130 (pf->hw.func_caps.num_msix_vectors_vf
5c3c48ac
JB		 131 * vf->vf_id) + (vector_id - 1));
132
133 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
134 /* Special case - No queues mapped on this vector */
135 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
136 goto irq_list_done;
137 }
138 tempmap = vecmap->rxq_map;
4836650b 139 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 140 linklistmap |= (1 <<
141 (I40E_VIRTCHNL_SUPPORTED_QTYPES *
142 vsi_queue_id));
5c3c48ac
JB		 143 }
144
145 tempmap = vecmap->txq_map;
4836650b 146 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 147 linklistmap |= (1 <<
148 (I40E_VIRTCHNL_SUPPORTED_QTYPES * vsi_queue_id
149 + 1));
5c3c48ac
JB		 150 }
151
152 next_q = find_first_bit(&linklistmap,
153 (I40E_MAX_VSI_QP *
154 I40E_VIRTCHNL_SUPPORTED_QTYPES));
155 vsi_queue_id = next_q/I40E_VIRTCHNL_SUPPORTED_QTYPES;
156 qtype = next_q%I40E_VIRTCHNL_SUPPORTED_QTYPES;
157 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
158 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
159
160 wr32(hw, reg_idx, reg);
161
162 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
163 switch (qtype) {
164 case I40E_QUEUE_TYPE_RX:
165 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
166 itr_idx = vecmap->rxitr_idx;
167 break;
168 case I40E_QUEUE_TYPE_TX:
169 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
170 itr_idx = vecmap->txitr_idx;
171 break;
172 default:
173 break;
174 }
175
176 next_q = find_next_bit(&linklistmap,
177 (I40E_MAX_VSI_QP *
178 I40E_VIRTCHNL_SUPPORTED_QTYPES),
179 next_q + 1);
180 if (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
181 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
182 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
183 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx,
184 vsi_queue_id);
185 } else {
186 pf_queue_id = I40E_QUEUE_END_OF_LIST;
187 qtype = 0;
188 }
189
190 /* format for the RQCTL & TQCTL regs is same */
191 reg = (vector_id) |
192 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
193 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
194 (1 << I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
195 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
196 wr32(hw, reg_idx, reg);
197 }
198
199irq_list_done:
200 i40e_flush(hw);
201}
202
203/**
204 * i40e_config_vsi_tx_queue
205 * @vf: pointer to the vf info
206 * @vsi_idx: index of VSI in PF struct
207 * @vsi_queue_id: vsi relative queue index
208 * @info: config. info
209 *
210 * configure tx queue
211 **/
212static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx,
213 u16 vsi_queue_id,
214 struct i40e_virtchnl_txq_info *info)
215{
216 struct i40e_pf *pf = vf->pf;
217 struct i40e_hw *hw = &pf->hw;
218 struct i40e_hmc_obj_txq tx_ctx;
219 u16 pf_queue_id;
220 u32 qtx_ctl;
221 int ret = 0;
222
223 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
224
225 /* clear the context structure first */
226 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
227
228 /* only set the required fields */
229 tx_ctx.base = info->dma_ring_addr / 128;
230 tx_ctx.qlen = info->ring_len;
231 tx_ctx.rdylist = le16_to_cpu(pf->vsi[vsi_idx]->info.qs_handle[0]);
232 tx_ctx.rdylist_act = 0;
233
234 /* clear the context in the HMC */
235 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
236 if (ret) {
237 dev_err(&pf->pdev->dev,
238 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
239 pf_queue_id, ret);
240 ret = -ENOENT;
241 goto error_context;
242 }
243
244 /* set the context in the HMC */
245 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
246 if (ret) {
247 dev_err(&pf->pdev->dev,
248 "Failed to set VF LAN Tx queue context %d error: %d\n",
249 pf_queue_id, ret);
250 ret = -ENOENT;
251 goto error_context;
252 }
253
254 /* associate this queue with the PCI VF function */
255 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 256 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 257 & I40E_QTX_CTL_PF_INDX_MASK);
258 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
259 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
260 & I40E_QTX_CTL_VFVM_INDX_MASK);
261 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
262 i40e_flush(hw);
263
264error_context:
265 return ret;
266}
267
268/**
269 * i40e_config_vsi_rx_queue
270 * @vf: pointer to the vf info
271 * @vsi_idx: index of VSI in PF struct
272 * @vsi_queue_id: vsi relative queue index
273 * @info: config. info
274 *
275 * configure rx queue
276 **/
277static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx,
278 u16 vsi_queue_id,
279 struct i40e_virtchnl_rxq_info *info)
280{
281 struct i40e_pf *pf = vf->pf;
282 struct i40e_hw *hw = &pf->hw;
283 struct i40e_hmc_obj_rxq rx_ctx;
284 u16 pf_queue_id;
285 int ret = 0;
286
287 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
288
289 /* clear the context structure first */
290 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
291
292 /* only set the required fields */
293 rx_ctx.base = info->dma_ring_addr / 128;
294 rx_ctx.qlen = info->ring_len;
295
296 if (info->splithdr_enabled) {
297 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
298 I40E_RX_SPLIT_IP |
299 I40E_RX_SPLIT_TCP_UDP |
300 I40E_RX_SPLIT_SCTP;
301 /* header length validation */
302 if (info->hdr_size > ((2 * 1024) - 64)) {
303 ret = -EINVAL;
304 goto error_param;
305 }
306 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
307
308 /* set splitalways mode 10b */
309 rx_ctx.dtype = 0x2;
310 }
311
312 /* databuffer length validation */
313 if (info->databuffer_size > ((16 * 1024) - 128)) {
314 ret = -EINVAL;
315 goto error_param;
316 }
317 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
318
319 /* max pkt. length validation */
320 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
321 ret = -EINVAL;
322 goto error_param;
323 }
324 rx_ctx.rxmax = info->max_pkt_size;
325
326 /* enable 32bytes desc always */
327 rx_ctx.dsize = 1;
328
329 /* default values */
330 rx_ctx.tphrdesc_ena = 1;
331 rx_ctx.tphwdesc_ena = 1;
332 rx_ctx.tphdata_ena = 1;
333 rx_ctx.tphhead_ena = 1;
334 rx_ctx.lrxqthresh = 2;
335 rx_ctx.crcstrip = 1;
336
337 /* clear the context in the HMC */
338 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
339 if (ret) {
340 dev_err(&pf->pdev->dev,
341 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
342 pf_queue_id, ret);
343 ret = -ENOENT;
344 goto error_param;
345 }
346
347 /* set the context in the HMC */
348 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
349 if (ret) {
350 dev_err(&pf->pdev->dev,
351 "Failed to set VF LAN Rx queue context %d error: %d\n",
352 pf_queue_id, ret);
353 ret = -ENOENT;
354 goto error_param;
355 }
356
357error_param:
358 return ret;
359}
360
361/**
362 * i40e_alloc_vsi_res
363 * @vf: pointer to the vf info
364 * @type: type of VSI to allocate
365 *
366 * alloc vf vsi context & resources
367 **/
368static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
369{
370 struct i40e_mac_filter *f = NULL;
371 struct i40e_pf *pf = vf->pf;
372 struct i40e_hw *hw = &pf->hw;
373 struct i40e_vsi *vsi;
374 int ret = 0;
375
376 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
377
378 if (!vsi) {
379 dev_err(&pf->pdev->dev,
380 "add vsi failed for vf %d, aq_err %d\n",
381 vf->vf_id, pf->hw.aq.asq_last_status);
382 ret = -ENOENT;
383 goto error_alloc_vsi_res;
384 }
385 if (type == I40E_VSI_SRIOV) {
386 vf->lan_vsi_index = vsi->idx;
387 vf->lan_vsi_id = vsi->id;
388 dev_info(&pf->pdev->dev,
389 "LAN VSI index %d, VSI id %d\n",
390 vsi->idx, vsi->id);
391 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
392 0, true, false);
393 }
6dbbbfb2 394
5c3c48ac
JB		 395 if (!f) {
396 dev_err(&pf->pdev->dev, "Unable to add ucast filter\n");
397 ret = -ENOMEM;
398 goto error_alloc_vsi_res;
399 }
400
401 /* program mac filter */
402 ret = i40e_sync_vsi_filters(vsi);
403 if (ret) {
404 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
405 goto error_alloc_vsi_res;
406 }
407
408 /* accept bcast pkts. by default */
409 ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
410 if (ret) {
411 dev_err(&pf->pdev->dev,
412 "set vsi bcast failed for vf %d, vsi %d, aq_err %d\n",
413 vf->vf_id, vsi->idx, pf->hw.aq.asq_last_status);
414 ret = -EINVAL;
415 }
416
417error_alloc_vsi_res:
418 return ret;
419}
420
805bd5bd
MW		 421/**
422 * i40e_enable_vf_mappings
423 * @vf: pointer to the vf info
424 *
425 * enable vf mappings
426 **/
427static void i40e_enable_vf_mappings(struct i40e_vf *vf)
428{
429 struct i40e_pf *pf = vf->pf;
430 struct i40e_hw *hw = &pf->hw;
431 u32 reg, total_queue_pairs = 0;
432 int j;
433
434 /* Tell the hardware we're using noncontiguous mapping. HW requires
435 * that VF queues be mapped using this method, even when they are
436 * contiguous in real life
437 */
438 wr32(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
439 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
440
441 /* enable VF vplan_qtable mappings */
442 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
443 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
444
445 /* map PF queues to VF queues */
446 for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) {
447 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, j);
448 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
449 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
450 total_queue_pairs++;
451 }
452
453 /* map PF queues to VSI */
454 for (j = 0; j < 7; j++) {
455 if (j * 2 >= pf->vsi[vf->lan_vsi_index]->num_queue_pairs) {
456 reg = 0x07FF07FF; /* unused */
457 } else {
458 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index,
459 j * 2);
460 reg = qid;
461 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index,
462 (j * 2) + 1);
463 reg |= qid << 16;
464 }
465 wr32(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), reg);
466 }
467
468 i40e_flush(hw);
469}
470
471/**
472 * i40e_disable_vf_mappings
473 * @vf: pointer to the vf info
474 *
475 * disable vf mappings
476 **/
477static void i40e_disable_vf_mappings(struct i40e_vf *vf)
478{
479 struct i40e_pf *pf = vf->pf;
480 struct i40e_hw *hw = &pf->hw;
481 int i;
482
483 /* disable qp mappings */
484 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
485 for (i = 0; i < I40E_MAX_VSI_QP; i++)
486 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
487 I40E_QUEUE_END_OF_LIST);
488 i40e_flush(hw);
489}
490
491/**
492 * i40e_free_vf_res
493 * @vf: pointer to the vf info
494 *
495 * free vf resources
496 **/
497static void i40e_free_vf_res(struct i40e_vf *vf)
498{
499 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 500 struct i40e_hw *hw = &pf->hw;
501 u32 reg_idx, reg;
502 int i, msix_vf;
805bd5bd
MW		 503
504 /* free vsi & disconnect it from the parent uplink */
505 if (vf->lan_vsi_index) {
506 i40e_vsi_release(pf->vsi[vf->lan_vsi_index]);
507 vf->lan_vsi_index = 0;
508 vf->lan_vsi_id = 0;
509 }
fc18eaa0
MW		 510 msix_vf = pf->hw.func_caps.num_msix_vectors_vf + 1;
511 /* disable interrupts so the VF starts in a known state */
512 for (i = 0; i < msix_vf; i++) {
513 /* format is same for both registers */
514 if (0 == i)
515 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
516 else
517 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
518 (vf->vf_id))
519 + (i - 1));
520 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
521 i40e_flush(hw);
522 }
805bd5bd 523
fc18eaa0
MW		 524 /* clear the irq settings */
525 for (i = 0; i < msix_vf; i++) {
526 /* format is same for both registers */
527 if (0 == i)
528 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
529 else
530 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
531 (vf->vf_id))
532 + (i - 1));
533 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
534 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
535 wr32(hw, reg_idx, reg);
536 i40e_flush(hw);
537 }
805bd5bd
MW		 538 /* reset some of the state varibles keeping
539 * track of the resources
540 */
541 vf->num_queue_pairs = 0;
542 vf->vf_states = 0;
543}
544
545/**
546 * i40e_alloc_vf_res
547 * @vf: pointer to the vf info
548 *
549 * allocate vf resources
550 **/
551static int i40e_alloc_vf_res(struct i40e_vf *vf)
552{
553 struct i40e_pf *pf = vf->pf;
554 int total_queue_pairs = 0;
555 int ret;
556
557 /* allocate hw vsi context & associated resources */
558 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
559 if (ret)
560 goto error_alloc;
561 total_queue_pairs += pf->vsi[vf->lan_vsi_index]->num_queue_pairs;
562 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
563
564 /* store the total qps number for the runtime
565 * vf req validation
566 */
567 vf->num_queue_pairs = total_queue_pairs;
568
569 /* vf is now completely initialized */
570 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
571
572error_alloc:
573 if (ret)
574 i40e_free_vf_res(vf);
575
576 return ret;
577}
578
fc18eaa0
MW		 579#define VF_DEVICE_STATUS 0xAA
580#define VF_TRANS_PENDING_MASK 0x20
581/**
582 * i40e_quiesce_vf_pci
583 * @vf: pointer to the vf structure
584 *
585 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
586 * if the transactions never clear.
587 **/
588static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
589{
590 struct i40e_pf *pf = vf->pf;
591 struct i40e_hw *hw = &pf->hw;
592 int vf_abs_id, i;
593 u32 reg;
594
595 reg = rd32(hw, I40E_PF_VT_PFALLOC);
596 vf_abs_id = vf->vf_id + (reg & I40E_PF_VT_PFALLOC_FIRSTVF_MASK);
597
598 wr32(hw, I40E_PF_PCI_CIAA,
599 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
600 for (i = 0; i < 100; i++) {
601 reg = rd32(hw, I40E_PF_PCI_CIAD);
602 if ((reg & VF_TRANS_PENDING_MASK) == 0)
603 return 0;
604 udelay(1);
605 }
606 return -EIO;
607}
608
5c3c48ac
JB		 609/**
610 * i40e_reset_vf
611 * @vf: pointer to the vf structure
612 * @flr: VFLR was issued or not
613 *
614 * reset the vf
615 **/
fc18eaa0 616void i40e_reset_vf(struct i40e_vf *vf, bool flr)
5c3c48ac 617{
5c3c48ac
JB		 618 struct i40e_pf *pf = vf->pf;
619 struct i40e_hw *hw = &pf->hw;
5c3c48ac 620 bool rsd = false;
fc18eaa0
MW		 621 int i;
622 u32 reg;
5c3c48ac
JB		 623
624 /* warn the VF */
5c3c48ac
JB		 625 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
626
fc18eaa0
MW		 627 /* In the case of a VFLR, the HW has already reset the VF and we
628 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 629 */
630 if (!flr) {
631 /* reset vf using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 632 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
633 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 634 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
635 i40e_flush(hw);
636 }
637
fc18eaa0
MW		 638 if (i40e_quiesce_vf_pci(vf))
639 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
640 vf->vf_id);
641
5c3c48ac
JB		 642 /* poll VPGEN_VFRSTAT reg to make sure
643 * that reset is complete
644 */
fc18eaa0 645 for (i = 0; i < 100; i++) {
5c3c48ac
JB		 646 /* vf reset requires driver to first reset the
647 * vf & than poll the status register to make sure
648 * that the requested op was completed
649 * successfully
650 */
651 udelay(10);
652 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
653 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
654 rsd = true;
655 break;
656 }
657 }
658
659 if (!rsd)
fc18eaa0 660 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
5c3c48ac 661 vf->vf_id);
fc18eaa0 662 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
5c3c48ac
JB		 663 /* clear the reset bit in the VPGEN_VFRTRIG reg */
664 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
665 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
666 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
fc18eaa0
MW		 667
668 /* On initial reset, we won't have any queues */
669 if (vf->lan_vsi_index == 0)
670 goto complete_reset;
671
672 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_index], false);
673complete_reset:
674 /* reallocate vf resources to reset the VSI state */
675 i40e_free_vf_res(vf);
676 mdelay(10);
677 i40e_alloc_vf_res(vf);
678 i40e_enable_vf_mappings(vf);
679
5c3c48ac 680 /* tell the VF the reset is done */
fc18eaa0 681 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
5c3c48ac 682 i40e_flush(hw);
5c3c48ac
JB		 683}
684
5c3c48ac
JB		 685/**
686 * i40e_vfs_are_assigned
687 * @pf: pointer to the pf structure
688 *
689 * Determine if any VFs are assigned to VMs
690 **/
691static bool i40e_vfs_are_assigned(struct i40e_pf *pf)
692{
693 struct pci_dev *pdev = pf->pdev;
694 struct pci_dev *vfdev;
695
696 /* loop through all the VFs to see if we own any that are assigned */
697 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, I40E_VF_DEVICE_ID , NULL);
698 while (vfdev) {
699 /* if we don't own it we don't care */
700 if (vfdev->is_virtfn && pci_physfn(vfdev) == pdev) {
701 /* if it is assigned we cannot release it */
702 if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
703 return true;
704 }
705
706 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
707 I40E_VF_DEVICE_ID,
708 vfdev);
709 }
710
711 return false;
712}
713
714/**
715 * i40e_free_vfs
716 * @pf: pointer to the pf structure
717 *
718 * free vf resources
719 **/
720void i40e_free_vfs(struct i40e_pf *pf)
721{
6c1b5bff 722 int i, tmp;
5c3c48ac
JB		 723
724 if (!pf->vf)
725 return;
726
727 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 728 i40e_irq_dynamic_disable_icr0(pf);
729
6c1b5bff 730 mdelay(10); /* let any messages in transit get finished up */
5c3c48ac 731 /* free up vf resources */
6c1b5bff
MW		 732 tmp = pf->num_alloc_vfs;
733 pf->num_alloc_vfs = 0;
734 for (i = 0; i < tmp; i++) {
5c3c48ac
JB		 735 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
736 i40e_free_vf_res(&pf->vf[i]);
737 /* disable qp mappings */
738 i40e_disable_vf_mappings(&pf->vf[i]);
739 }
740
741 kfree(pf->vf);
742 pf->vf = NULL;
5c3c48ac
JB		 743
744 if (!i40e_vfs_are_assigned(pf))
745 pci_disable_sriov(pf->pdev);
746 else
747 dev_warn(&pf->pdev->dev,
748 "unable to disable SR-IOV because VFs are assigned.\n");
749
750 /* Re-enable interrupt 0. */
2ef28cfb 751 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 752}
753
754#ifdef CONFIG_PCI_IOV
755/**
756 * i40e_alloc_vfs
757 * @pf: pointer to the pf structure
758 * @num_alloc_vfs: number of vfs to allocate
759 *
760 * allocate vf resources
761 **/
762static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
763{
764 struct i40e_vf *vfs;
765 int i, ret = 0;
766
6c1b5bff 767 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 768 i40e_irq_dynamic_disable_icr0(pf);
769
5c3c48ac
JB		 770 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
771 if (ret) {
772 dev_err(&pf->pdev->dev,
773 "pci_enable_sriov failed with error %d!\n", ret);
774 pf->num_alloc_vfs = 0;
775 goto err_iov;
776 }
777
778 /* allocate memory */
779 vfs = kzalloc(num_alloc_vfs * sizeof(struct i40e_vf), GFP_KERNEL);
780 if (!vfs) {
781 ret = -ENOMEM;
782 goto err_alloc;
783 }
784
785 /* apply default profile */
786 for (i = 0; i < num_alloc_vfs; i++) {
787 vfs[i].pf = pf;
788 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
789 vfs[i].vf_id = i;
790
791 /* assign default capabilities */
792 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
fc18eaa0
MW		 793 /* vf resources get allocated during reset */
794 i40e_reset_vf(&vfs[i], false);
5c3c48ac
JB		 795
796 /* enable vf vplan_qtable mappings */
797 i40e_enable_vf_mappings(&vfs[i]);
798 }
799 pf->vf = vfs;
800 pf->num_alloc_vfs = num_alloc_vfs;
801
802err_alloc:
803 if (ret)
804 i40e_free_vfs(pf);
805err_iov:
6c1b5bff 806 /* Re-enable interrupt 0. */
2ef28cfb 807 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 808 return ret;
809}
810
811#endif
812/**
813 * i40e_pci_sriov_enable
814 * @pdev: pointer to a pci_dev structure
815 * @num_vfs: number of vfs to allocate
816 *
817 * Enable or change the number of VFs
818 **/
819static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
820{
821#ifdef CONFIG_PCI_IOV
822 struct i40e_pf *pf = pci_get_drvdata(pdev);
823 int pre_existing_vfs = pci_num_vf(pdev);
824 int err = 0;
825
826 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
827 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
828 i40e_free_vfs(pf);
829 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
830 goto out;
831
832 if (num_vfs > pf->num_req_vfs) {
833 err = -EPERM;
834 goto err_out;
835 }
836
837 err = i40e_alloc_vfs(pf, num_vfs);
838 if (err) {
839 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
840 goto err_out;
841 }
842
843out:
844 return num_vfs;
845
846err_out:
847 return err;
848#endif
849 return 0;
850}
851
852/**
853 * i40e_pci_sriov_configure
854 * @pdev: pointer to a pci_dev structure
855 * @num_vfs: number of vfs to allocate
856 *
857 * Enable or change the number of VFs. Called when the user updates the number
858 * of VFs in sysfs.
859 **/
860int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
861{
862 struct i40e_pf *pf = pci_get_drvdata(pdev);
863
864 if (num_vfs)
865 return i40e_pci_sriov_enable(pdev, num_vfs);
866
867 i40e_free_vfs(pf);
868 return 0;
869}
870
871/***********************virtual channel routines******************/
872
873/**
874 * i40e_vc_send_msg_to_vf
875 * @vf: pointer to the vf info
876 * @v_opcode: virtual channel opcode
877 * @v_retval: virtual channel return value
878 * @msg: pointer to the msg buffer
879 * @msglen: msg length
880 *
881 * send msg to vf
882 **/
883static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
884 u32 v_retval, u8 *msg, u16 msglen)
885{
886 struct i40e_pf *pf = vf->pf;
887 struct i40e_hw *hw = &pf->hw;
888 i40e_status aq_ret;
889
890 /* single place to detect unsuccessful return values */
891 if (v_retval) {
892 vf->num_invalid_msgs++;
893 dev_err(&pf->pdev->dev, "Failed opcode %d Error: %d\n",
894 v_opcode, v_retval);
895 if (vf->num_invalid_msgs >
896 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
897 dev_err(&pf->pdev->dev,
898 "Number of invalid messages exceeded for VF %d\n",
899 vf->vf_id);
900 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
901 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
902 }
903 } else {
904 vf->num_valid_msgs++;
905 }
906
907 aq_ret = i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval,
908 msg, msglen, NULL);
909 if (aq_ret) {
910 dev_err(&pf->pdev->dev,
911 "Unable to send the message to VF %d aq_err %d\n",
912 vf->vf_id, pf->hw.aq.asq_last_status);
913 return -EIO;
914 }
915
916 return 0;
917}
918
919/**
920 * i40e_vc_send_resp_to_vf
921 * @vf: pointer to the vf info
922 * @opcode: operation code
923 * @retval: return value
924 *
925 * send resp msg to vf
926 **/
927static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
928 enum i40e_virtchnl_ops opcode,
929 i40e_status retval)
930{
931 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
932}
933
934/**
935 * i40e_vc_get_version_msg
936 * @vf: pointer to the vf info
937 *
938 * called from the vf to request the API version used by the PF
939 **/
940static int i40e_vc_get_version_msg(struct i40e_vf *vf)
941{
942 struct i40e_virtchnl_version_info info = {
943 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
944 };
945
946 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
947 I40E_SUCCESS, (u8 *)&info,
948 sizeof(struct
949 i40e_virtchnl_version_info));
950}
951
952/**
953 * i40e_vc_get_vf_resources_msg
954 * @vf: pointer to the vf info
955 * @msg: pointer to the msg buffer
956 * @msglen: msg length
957 *
958 * called from the vf to request its resources
959 **/
960static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf)
961{
962 struct i40e_virtchnl_vf_resource *vfres = NULL;
963 struct i40e_pf *pf = vf->pf;
964 i40e_status aq_ret = 0;
965 struct i40e_vsi *vsi;
966 int i = 0, len = 0;
967 int num_vsis = 1;
968 int ret;
969
970 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
971 aq_ret = I40E_ERR_PARAM;
972 goto err;
973 }
974
975 len = (sizeof(struct i40e_virtchnl_vf_resource) +
976 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
977
978 vfres = kzalloc(len, GFP_KERNEL);
979 if (!vfres) {
980 aq_ret = I40E_ERR_NO_MEMORY;
981 len = 0;
982 goto err;
983 }
984
985 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
986 vsi = pf->vsi[vf->lan_vsi_index];
987 if (!vsi->info.pvid)
988 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
989
990 vfres->num_vsis = num_vsis;
991 vfres->num_queue_pairs = vf->num_queue_pairs;
992 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
993 if (vf->lan_vsi_index) {
994 vfres->vsi_res[i].vsi_id = vf->lan_vsi_index;
995 vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV;
996 vfres->vsi_res[i].num_queue_pairs =
997 pf->vsi[vf->lan_vsi_index]->num_queue_pairs;
998 memcpy(vfres->vsi_res[i].default_mac_addr,
999 vf->default_lan_addr.addr, ETH_ALEN);
1000 i++;
1001 }
1002 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1003
1004err:
1005 /* send the response back to the vf */
1006 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1007 aq_ret, (u8 *)vfres, len);
1008
1009 kfree(vfres);
1010 return ret;
1011}
1012
1013/**
1014 * i40e_vc_reset_vf_msg
1015 * @vf: pointer to the vf info
1016 * @msg: pointer to the msg buffer
1017 * @msglen: msg length
1018 *
1019 * called from the vf to reset itself,
1020 * unlike other virtchnl messages, pf driver
1021 * doesn't send the response back to the vf
1022 **/
fc18eaa0 1023static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1024{
fc18eaa0
MW		 1025 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1026 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1027}
1028
1029/**
1030 * i40e_vc_config_promiscuous_mode_msg
1031 * @vf: pointer to the vf info
1032 * @msg: pointer to the msg buffer
1033 * @msglen: msg length
1034 *
1035 * called from the vf to configure the promiscuous mode of
1036 * vf vsis
1037 **/
1038static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1039 u8 *msg, u16 msglen)
1040{
1041 struct i40e_virtchnl_promisc_info *info =
1042 (struct i40e_virtchnl_promisc_info *)msg;
1043 struct i40e_pf *pf = vf->pf;
1044 struct i40e_hw *hw = &pf->hw;
1045 bool allmulti = false;
1046 bool promisc = false;
1047 i40e_status aq_ret;
1048
1049 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1050 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1051 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1052 (pf->vsi[info->vsi_id]->type != I40E_VSI_FCOE)) {
1053 aq_ret = I40E_ERR_PARAM;
1054 goto error_param;
1055 }
1056
1057 if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1058 promisc = true;
1059 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, info->vsi_id,
1060 promisc, NULL);
1061 if (aq_ret)
1062 goto error_param;
1063
1064 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1065 allmulti = true;
1066 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, info->vsi_id,
1067 allmulti, NULL);
1068
1069error_param:
1070 /* send the response to the vf */
1071 return i40e_vc_send_resp_to_vf(vf,
1072 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1073 aq_ret);
1074}
1075
1076/**
1077 * i40e_vc_config_queues_msg
1078 * @vf: pointer to the vf info
1079 * @msg: pointer to the msg buffer
1080 * @msglen: msg length
1081 *
1082 * called from the vf to configure the rx/tx
1083 * queues
1084 **/
1085static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1086{
1087 struct i40e_virtchnl_vsi_queue_config_info *qci =
1088 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1089 struct i40e_virtchnl_queue_pair_info *qpi;
1090 u16 vsi_id, vsi_queue_id;
1091 i40e_status aq_ret = 0;
1092 int i;
1093
1094 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1095 aq_ret = I40E_ERR_PARAM;
1096 goto error_param;
1097 }
1098
1099 vsi_id = qci->vsi_id;
1100 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1101 aq_ret = I40E_ERR_PARAM;
1102 goto error_param;
1103 }
1104 for (i = 0; i < qci->num_queue_pairs; i++) {
1105 qpi = &qci->qpair[i];
1106 vsi_queue_id = qpi->txq.queue_id;
1107 if ((qpi->txq.vsi_id != vsi_id) ||
1108 (qpi->rxq.vsi_id != vsi_id) ||
1109 (qpi->rxq.queue_id != vsi_queue_id) ||
1110 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1111 aq_ret = I40E_ERR_PARAM;
1112 goto error_param;
1113 }
1114
1115 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1116 &qpi->rxq) ||
1117 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1118 &qpi->txq)) {
1119 aq_ret = I40E_ERR_PARAM;
1120 goto error_param;
1121 }
1122 }
1123
1124error_param:
1125 /* send the response to the vf */
1126 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1127 aq_ret);
1128}
1129
1130/**
1131 * i40e_vc_config_irq_map_msg
1132 * @vf: pointer to the vf info
1133 * @msg: pointer to the msg buffer
1134 * @msglen: msg length
1135 *
1136 * called from the vf to configure the irq to
1137 * queue map
1138 **/
1139static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1140{
1141 struct i40e_virtchnl_irq_map_info *irqmap_info =
1142 (struct i40e_virtchnl_irq_map_info *)msg;
1143 struct i40e_virtchnl_vector_map *map;
1144 u16 vsi_id, vsi_queue_id, vector_id;
1145 i40e_status aq_ret = 0;
1146 unsigned long tempmap;
1147 int i;
1148
1149 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1150 aq_ret = I40E_ERR_PARAM;
1151 goto error_param;
1152 }
1153
1154 for (i = 0; i < irqmap_info->num_vectors; i++) {
1155 map = &irqmap_info->vecmap[i];
1156
1157 vector_id = map->vector_id;
1158 vsi_id = map->vsi_id;
1159 /* validate msg params */
1160 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1161 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1162 aq_ret = I40E_ERR_PARAM;
1163 goto error_param;
1164 }
1165
1166 /* lookout for the invalid queue index */
1167 tempmap = map->rxq_map;
4836650b 1168 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1169 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1170 vsi_queue_id)) {
1171 aq_ret = I40E_ERR_PARAM;
1172 goto error_param;
1173 }
5c3c48ac
JB		 1174 }
1175
1176 tempmap = map->txq_map;
4836650b 1177 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1178 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1179 vsi_queue_id)) {
1180 aq_ret = I40E_ERR_PARAM;
1181 goto error_param;
1182 }
5c3c48ac
JB		 1183 }
1184
1185 i40e_config_irq_link_list(vf, vsi_id, map);
1186 }
1187error_param:
1188 /* send the response to the vf */
1189 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1190 aq_ret);
1191}
1192
1193/**
1194 * i40e_vc_enable_queues_msg
1195 * @vf: pointer to the vf info
1196 * @msg: pointer to the msg buffer
1197 * @msglen: msg length
1198 *
1199 * called from the vf to enable all or specific queue(s)
1200 **/
1201static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1202{
1203 struct i40e_virtchnl_queue_select *vqs =
1204 (struct i40e_virtchnl_queue_select *)msg;
1205 struct i40e_pf *pf = vf->pf;
1206 u16 vsi_id = vqs->vsi_id;
1207 i40e_status aq_ret = 0;
5c3c48ac
JB		 1208
1209 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1210 aq_ret = I40E_ERR_PARAM;
1211 goto error_param;
1212 }
1213
1214 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1215 aq_ret = I40E_ERR_PARAM;
1216 goto error_param;
1217 }
1218
1219 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1220 aq_ret = I40E_ERR_PARAM;
1221 goto error_param;
1222 }
88f6563d
MW		 1223 if (i40e_vsi_control_rings(pf->vsi[vsi_id], true))
1224 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB		 1225error_param:
1226 /* send the response to the vf */
1227 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1228 aq_ret);
1229}
1230
1231/**
1232 * i40e_vc_disable_queues_msg
1233 * @vf: pointer to the vf info
1234 * @msg: pointer to the msg buffer
1235 * @msglen: msg length
1236 *
1237 * called from the vf to disable all or specific
1238 * queue(s)
1239 **/
1240static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1241{
1242 struct i40e_virtchnl_queue_select *vqs =
1243 (struct i40e_virtchnl_queue_select *)msg;
1244 struct i40e_pf *pf = vf->pf;
1245 u16 vsi_id = vqs->vsi_id;
1246 i40e_status aq_ret = 0;
5c3c48ac
JB		 1247
1248 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1249 aq_ret = I40E_ERR_PARAM;
1250 goto error_param;
1251 }
1252
1253 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1254 aq_ret = I40E_ERR_PARAM;
1255 goto error_param;
1256 }
1257
1258 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1259 aq_ret = I40E_ERR_PARAM;
1260 goto error_param;
1261 }
88f6563d
MW		 1262 if (i40e_vsi_control_rings(pf->vsi[vsi_id], false))
1263 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB		 1264
1265error_param:
1266 /* send the response to the vf */
1267 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1268 aq_ret);
1269}
1270
1271/**
1272 * i40e_vc_get_stats_msg
1273 * @vf: pointer to the vf info
1274 * @msg: pointer to the msg buffer
1275 * @msglen: msg length
1276 *
1277 * called from the vf to get vsi stats
1278 **/
1279static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1280{
1281 struct i40e_virtchnl_queue_select *vqs =
1282 (struct i40e_virtchnl_queue_select *)msg;
1283 struct i40e_pf *pf = vf->pf;
1284 struct i40e_eth_stats stats;
1285 i40e_status aq_ret = 0;
1286 struct i40e_vsi *vsi;
1287
1288 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1289
1290 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1291 aq_ret = I40E_ERR_PARAM;
1292 goto error_param;
1293 }
1294
1295 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1296 aq_ret = I40E_ERR_PARAM;
1297 goto error_param;
1298 }
1299
1300 vsi = pf->vsi[vqs->vsi_id];
1301 if (!vsi) {
1302 aq_ret = I40E_ERR_PARAM;
1303 goto error_param;
1304 }
1305 i40e_update_eth_stats(vsi);
1306 memcpy(&stats, &vsi->eth_stats, sizeof(struct i40e_eth_stats));
1307
1308error_param:
1309 /* send the response back to the vf */
1310 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1311 (u8 *)&stats, sizeof(stats));
1312}
1313
1314/**
1315 * i40e_vc_add_mac_addr_msg
1316 * @vf: pointer to the vf info
1317 * @msg: pointer to the msg buffer
1318 * @msglen: msg length
1319 *
1320 * add guest mac address filter
1321 **/
1322static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1323{
1324 struct i40e_virtchnl_ether_addr_list *al =
1325 (struct i40e_virtchnl_ether_addr_list *)msg;
1326 struct i40e_pf *pf = vf->pf;
1327 struct i40e_vsi *vsi = NULL;
1328 u16 vsi_id = al->vsi_id;
1329 i40e_status aq_ret = 0;
1330 int i;
1331
1332 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1333 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1334 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1335 aq_ret = I40E_ERR_PARAM;
1336 goto error_param;
1337 }
1338
1339 for (i = 0; i < al->num_elements; i++) {
1340 if (is_broadcast_ether_addr(al->list[i].addr) ||
1341 is_zero_ether_addr(al->list[i].addr)) {
1342 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pMAC\n",
1343 al->list[i].addr);
adaf3560 1344 aq_ret = I40E_ERR_INVALID_MAC_ADDR;
5c3c48ac
JB		 1345 goto error_param;
1346 }
1347 }
1348 vsi = pf->vsi[vsi_id];
1349
1350 /* add new addresses to the list */
1351 for (i = 0; i < al->num_elements; i++) {
1352 struct i40e_mac_filter *f;
1353
1354 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
7e68edf9 1355 if (!f) {
5c3c48ac
JB		 1356 if (i40e_is_vsi_in_vlan(vsi))
1357 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1358 true, false);
1359 else
1360 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1361 true, false);
1362 }
1363
1364 if (!f) {
1365 dev_err(&pf->pdev->dev,
1366 "Unable to add VF MAC filter\n");
1367 aq_ret = I40E_ERR_PARAM;
1368 goto error_param;
1369 }
1370 }
1371
1372 /* program the updated filter list */
1373 if (i40e_sync_vsi_filters(vsi))
1374 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1375
1376error_param:
1377 /* send the response to the vf */
1378 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
1379 aq_ret);
1380}
1381
1382/**
1383 * i40e_vc_del_mac_addr_msg
1384 * @vf: pointer to the vf info
1385 * @msg: pointer to the msg buffer
1386 * @msglen: msg length
1387 *
1388 * remove guest mac address filter
1389 **/
1390static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1391{
1392 struct i40e_virtchnl_ether_addr_list *al =
1393 (struct i40e_virtchnl_ether_addr_list *)msg;
1394 struct i40e_pf *pf = vf->pf;
1395 struct i40e_vsi *vsi = NULL;
1396 u16 vsi_id = al->vsi_id;
1397 i40e_status aq_ret = 0;
1398 int i;
1399
1400 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1401 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1402 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1403 aq_ret = I40E_ERR_PARAM;
1404 goto error_param;
1405 }
1406 vsi = pf->vsi[vsi_id];
1407
1408 /* delete addresses from the list */
1409 for (i = 0; i < al->num_elements; i++)
1410 i40e_del_filter(vsi, al->list[i].addr,
1411 I40E_VLAN_ANY, true, false);
1412
1413 /* program the updated filter list */
1414 if (i40e_sync_vsi_filters(vsi))
1415 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1416
1417error_param:
1418 /* send the response to the vf */
1419 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
1420 aq_ret);
1421}
1422
1423/**
1424 * i40e_vc_add_vlan_msg
1425 * @vf: pointer to the vf info
1426 * @msg: pointer to the msg buffer
1427 * @msglen: msg length
1428 *
1429 * program guest vlan id
1430 **/
1431static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1432{
1433 struct i40e_virtchnl_vlan_filter_list *vfl =
1434 (struct i40e_virtchnl_vlan_filter_list *)msg;
1435 struct i40e_pf *pf = vf->pf;
1436 struct i40e_vsi *vsi = NULL;
1437 u16 vsi_id = vfl->vsi_id;
1438 i40e_status aq_ret = 0;
1439 int i;
1440
1441 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1442 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1443 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1444 aq_ret = I40E_ERR_PARAM;
1445 goto error_param;
1446 }
1447
1448 for (i = 0; i < vfl->num_elements; i++) {
1449 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1450 aq_ret = I40E_ERR_PARAM;
1451 dev_err(&pf->pdev->dev,
1452 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
1453 goto error_param;
1454 }
1455 }
1456 vsi = pf->vsi[vsi_id];
1457 if (vsi->info.pvid) {
1458 aq_ret = I40E_ERR_PARAM;
1459 goto error_param;
1460 }
1461
1462 i40e_vlan_stripping_enable(vsi);
1463 for (i = 0; i < vfl->num_elements; i++) {
1464 /* add new VLAN filter */
1465 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
1466 if (ret)
1467 dev_err(&pf->pdev->dev,
1468 "Unable to add VF vlan filter %d, error %d\n",
1469 vfl->vlan_id[i], ret);
1470 }
1471
1472error_param:
1473 /* send the response to the vf */
1474 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
1475}
1476
1477/**
1478 * i40e_vc_remove_vlan_msg
1479 * @vf: pointer to the vf info
1480 * @msg: pointer to the msg buffer
1481 * @msglen: msg length
1482 *
1483 * remove programmed guest vlan id
1484 **/
1485static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1486{
1487 struct i40e_virtchnl_vlan_filter_list *vfl =
1488 (struct i40e_virtchnl_vlan_filter_list *)msg;
1489 struct i40e_pf *pf = vf->pf;
1490 struct i40e_vsi *vsi = NULL;
1491 u16 vsi_id = vfl->vsi_id;
1492 i40e_status aq_ret = 0;
1493 int i;
1494
1495 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1496 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1497 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1498 aq_ret = I40E_ERR_PARAM;
1499 goto error_param;
1500 }
1501
1502 for (i = 0; i < vfl->num_elements; i++) {
1503 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1504 aq_ret = I40E_ERR_PARAM;
1505 goto error_param;
1506 }
1507 }
1508
1509 vsi = pf->vsi[vsi_id];
1510 if (vsi->info.pvid) {
1511 aq_ret = I40E_ERR_PARAM;
1512 goto error_param;
1513 }
1514
1515 for (i = 0; i < vfl->num_elements; i++) {
1516 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
1517 if (ret)
1518 dev_err(&pf->pdev->dev,
1519 "Unable to delete VF vlan filter %d, error %d\n",
1520 vfl->vlan_id[i], ret);
1521 }
1522
1523error_param:
1524 /* send the response to the vf */
1525 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
1526}
1527
5c3c48ac
JB		 1528/**
1529 * i40e_vc_validate_vf_msg
1530 * @vf: pointer to the vf info
1531 * @msg: pointer to the msg buffer
1532 * @msglen: msg length
1533 * @msghndl: msg handle
1534 *
1535 * validate msg
1536 **/
1537static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
1538 u32 v_retval, u8 *msg, u16 msglen)
1539{
1540 bool err_msg_format = false;
1541 int valid_len;
1542
1543 /* Check if VF is disabled. */
1544 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
1545 return I40E_ERR_PARAM;
1546
1547 /* Validate message length. */
1548 switch (v_opcode) {
1549 case I40E_VIRTCHNL_OP_VERSION:
1550 valid_len = sizeof(struct i40e_virtchnl_version_info);
1551 break;
1552 case I40E_VIRTCHNL_OP_RESET_VF:
1553 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1554 valid_len = 0;
1555 break;
1556 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
1557 valid_len = sizeof(struct i40e_virtchnl_txq_info);
1558 break;
1559 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
1560 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
1561 break;
1562 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1563 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
1564 if (msglen >= valid_len) {
1565 struct i40e_virtchnl_vsi_queue_config_info *vqc =
1566 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1567 valid_len += (vqc->num_queue_pairs *
1568 sizeof(struct
1569 i40e_virtchnl_queue_pair_info));
1570 if (vqc->num_queue_pairs == 0)
1571 err_msg_format = true;
1572 }
1573 break;
1574 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1575 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
1576 if (msglen >= valid_len) {
1577 struct i40e_virtchnl_irq_map_info *vimi =
1578 (struct i40e_virtchnl_irq_map_info *)msg;
1579 valid_len += (vimi->num_vectors *
1580 sizeof(struct i40e_virtchnl_vector_map));
1581 if (vimi->num_vectors == 0)
1582 err_msg_format = true;
1583 }
1584 break;
1585 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1586 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1587 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1588 break;
1589 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1590 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1591 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
1592 if (msglen >= valid_len) {
1593 struct i40e_virtchnl_ether_addr_list *veal =
1594 (struct i40e_virtchnl_ether_addr_list *)msg;
1595 valid_len += veal->num_elements *
1596 sizeof(struct i40e_virtchnl_ether_addr);
1597 if (veal->num_elements == 0)
1598 err_msg_format = true;
1599 }
1600 break;
1601 case I40E_VIRTCHNL_OP_ADD_VLAN:
1602 case I40E_VIRTCHNL_OP_DEL_VLAN:
1603 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
1604 if (msglen >= valid_len) {
1605 struct i40e_virtchnl_vlan_filter_list *vfl =
1606 (struct i40e_virtchnl_vlan_filter_list *)msg;
1607 valid_len += vfl->num_elements * sizeof(u16);
1608 if (vfl->num_elements == 0)
1609 err_msg_format = true;
1610 }
1611 break;
1612 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1613 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
1614 break;
1615 case I40E_VIRTCHNL_OP_GET_STATS:
1616 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1617 break;
1618 /* These are always errors coming from the VF. */
1619 case I40E_VIRTCHNL_OP_EVENT:
1620 case I40E_VIRTCHNL_OP_UNKNOWN:
1621 default:
1622 return -EPERM;
1623 break;
1624 }
1625 /* few more checks */
1626 if ((valid_len != msglen) || (err_msg_format)) {
1627 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
1628 return -EINVAL;
1629 } else {
1630 return 0;
1631 }
1632}
1633
1634/**
1635 * i40e_vc_process_vf_msg
1636 * @pf: pointer to the pf structure
1637 * @vf_id: source vf id
1638 * @msg: pointer to the msg buffer
1639 * @msglen: msg length
1640 * @msghndl: msg handle
1641 *
1642 * called from the common aeq/arq handler to
1643 * process request from vf
1644 **/
1645int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode,
1646 u32 v_retval, u8 *msg, u16 msglen)
1647{
5c3c48ac 1648 struct i40e_hw *hw = &pf->hw;
6c1b5bff 1649 struct i40e_vf *vf;
5c3c48ac
JB		 1650 int ret;
1651
1652 pf->vf_aq_requests++;
6c1b5bff
MW		 1653 if (vf_id >= pf->num_alloc_vfs)
1654 return -EINVAL;
1655 vf = &(pf->vf[vf_id]);
5c3c48ac
JB		 1656 /* perform basic checks on the msg */
1657 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
1658
1659 if (ret) {
499ec80f
MW		 1660 dev_err(&pf->pdev->dev, "Invalid message from vf %d, opcode %d, len %d\n",
1661 vf_id, v_opcode, msglen);
5c3c48ac
JB		 1662 return ret;
1663 }
1664 wr32(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_VFACTIVE);
1665 switch (v_opcode) {
1666 case I40E_VIRTCHNL_OP_VERSION:
1667 ret = i40e_vc_get_version_msg(vf);
1668 break;
1669 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1670 ret = i40e_vc_get_vf_resources_msg(vf);
1671 break;
1672 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 1673 i40e_vc_reset_vf_msg(vf);
1674 ret = 0;
5c3c48ac
JB		 1675 break;
1676 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1677 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
1678 break;
1679 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1680 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
1681 break;
1682 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1683 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
1684 break;
1685 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1686 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
1687 break;
1688 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1689 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
1690 break;
1691 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1692 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
1693 break;
1694 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1695 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
1696 break;
1697 case I40E_VIRTCHNL_OP_ADD_VLAN:
1698 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
1699 break;
1700 case I40E_VIRTCHNL_OP_DEL_VLAN:
1701 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
1702 break;
1703 case I40E_VIRTCHNL_OP_GET_STATS:
1704 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
1705 break;
5c3c48ac
JB		 1706 case I40E_VIRTCHNL_OP_UNKNOWN:
1707 default:
1708 dev_err(&pf->pdev->dev,
1709 "Unsupported opcode %d from vf %d\n", v_opcode, vf_id);
1710 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
1711 I40E_ERR_NOT_IMPLEMENTED);
1712 break;
1713 }
1714
1715 return ret;
1716}
1717
1718/**
1719 * i40e_vc_process_vflr_event
1720 * @pf: pointer to the pf structure
1721 *
1722 * called from the vlfr irq handler to
1723 * free up vf resources and state variables
1724 **/
1725int i40e_vc_process_vflr_event(struct i40e_pf *pf)
1726{
1727 u32 reg, reg_idx, bit_idx, vf_id;
1728 struct i40e_hw *hw = &pf->hw;
1729 struct i40e_vf *vf;
1730
1731 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
1732 return 0;
1733
1734 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
1735 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
1736 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1737 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
1738 /* read GLGEN_VFLRSTAT register to find out the flr vfs */
1739 vf = &pf->vf[vf_id];
1740 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
1741 if (reg & (1 << bit_idx)) {
1742 /* clear the bit in GLGEN_VFLRSTAT */
1743 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx));
1744
fc18eaa0 1745 i40e_reset_vf(vf, true);
5c3c48ac
JB		 1746 }
1747 }
1748
1749 /* re-enable vflr interrupt cause */
1750 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
1751 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
1752 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
1753 i40e_flush(hw);
1754
1755 return 0;
1756}
1757
1758/**
1759 * i40e_vc_vf_broadcast
1760 * @pf: pointer to the pf structure
1761 * @opcode: operation code
1762 * @retval: return value
1763 * @msg: pointer to the msg buffer
1764 * @msglen: msg length
1765 *
1766 * send a message to all VFs on a given PF
1767 **/
1768static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
1769 enum i40e_virtchnl_ops v_opcode,
1770 i40e_status v_retval, u8 *msg,
1771 u16 msglen)
1772{
1773 struct i40e_hw *hw = &pf->hw;
1774 struct i40e_vf *vf = pf->vf;
1775 int i;
1776
1777 for (i = 0; i < pf->num_alloc_vfs; i++) {
1778 /* Ignore return value on purpose - a given VF may fail, but
1779 * we need to keep going and send to all of them
1780 */
1781 i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval,
1782 msg, msglen, NULL);
1783 vf++;
1784 }
1785}
1786
1787/**
1788 * i40e_vc_notify_link_state
1789 * @pf: pointer to the pf structure
1790 *
1791 * send a link status message to all VFs on a given PF
1792 **/
1793void i40e_vc_notify_link_state(struct i40e_pf *pf)
1794{
1795 struct i40e_virtchnl_pf_event pfe;
1796
1797 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
1798 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
1799 pfe.event_data.link_event.link_status =
1800 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
1801 pfe.event_data.link_event.link_speed = pf->hw.phy.link_info.link_speed;
1802
1803 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS,
1804 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
1805}
1806
1807/**
1808 * i40e_vc_notify_reset
1809 * @pf: pointer to the pf structure
1810 *
1811 * indicate a pending reset to all VFs on a given PF
1812 **/
1813void i40e_vc_notify_reset(struct i40e_pf *pf)
1814{
1815 struct i40e_virtchnl_pf_event pfe;
1816
1817 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
1818 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
1819 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS,
1820 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
1821}
1822
1823/**
1824 * i40e_vc_notify_vf_reset
1825 * @vf: pointer to the vf structure
1826 *
1827 * indicate a pending reset to the given VF
1828 **/
1829void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
1830{
1831 struct i40e_virtchnl_pf_event pfe;
1832
1833 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
1834 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
1835 i40e_aq_send_msg_to_vf(&vf->pf->hw, vf->vf_id, I40E_VIRTCHNL_OP_EVENT,
1836 I40E_SUCCESS, (u8 *)&pfe,
1837 sizeof(struct i40e_virtchnl_pf_event), NULL);
1838}
1839
1840/**
1841 * i40e_ndo_set_vf_mac
1842 * @netdev: network interface device structure
1843 * @vf_id: vf identifier
1844 * @mac: mac address
1845 *
1846 * program vf mac address
1847 **/
1848int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
1849{
1850 struct i40e_netdev_priv *np = netdev_priv(netdev);
1851 struct i40e_vsi *vsi = np->vsi;
1852 struct i40e_pf *pf = vsi->back;
1853 struct i40e_mac_filter *f;
1854 struct i40e_vf *vf;
1855 int ret = 0;
1856
1857 /* validate the request */
1858 if (vf_id >= pf->num_alloc_vfs) {
1859 dev_err(&pf->pdev->dev,
1860 "Invalid VF Identifier %d\n", vf_id);
1861 ret = -EINVAL;
1862 goto error_param;
1863 }
1864
1865 vf = &(pf->vf[vf_id]);
1866 vsi = pf->vsi[vf->lan_vsi_index];
1867 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1868 dev_err(&pf->pdev->dev,
1869 "Uninitialized VF %d\n", vf_id);
1870 ret = -EINVAL;
1871 goto error_param;
1872 }
1873
1874 if (!is_valid_ether_addr(mac)) {
1875 dev_err(&pf->pdev->dev,
1876 "Invalid VF ethernet address\n");
1877 ret = -EINVAL;
1878 goto error_param;
1879 }
1880
1881 /* delete the temporary mac address */
1882 i40e_del_filter(vsi, vf->default_lan_addr.addr, 0, true, false);
1883
1884 /* add the new mac address */
1885 f = i40e_add_filter(vsi, mac, 0, true, false);
1886 if (!f) {
1887 dev_err(&pf->pdev->dev,
1888 "Unable to add VF ucast filter\n");
1889 ret = -ENOMEM;
1890 goto error_param;
1891 }
1892
1893 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
1894 /* program mac filter */
1895 if (i40e_sync_vsi_filters(vsi)) {
1896 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
1897 ret = -EIO;
1898 goto error_param;
1899 }
1900 memcpy(vf->default_lan_addr.addr, mac, ETH_ALEN);
1901 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
1902 ret = 0;
1903
1904error_param:
1905 return ret;
1906}
1907
1908/**
1909 * i40e_ndo_set_vf_port_vlan
1910 * @netdev: network interface device structure
1911 * @vf_id: vf identifier
1912 * @vlan_id: mac address
1913 * @qos: priority setting
1914 *
1915 * program vf vlan id and/or qos
1916 **/
1917int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
1918 int vf_id, u16 vlan_id, u8 qos)
1919{
1920 struct i40e_netdev_priv *np = netdev_priv(netdev);
1921 struct i40e_pf *pf = np->vsi->back;
1922 struct i40e_vsi *vsi;
1923 struct i40e_vf *vf;
1924 int ret = 0;
1925
1926 /* validate the request */
1927 if (vf_id >= pf->num_alloc_vfs) {
1928 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
1929 ret = -EINVAL;
1930 goto error_pvid;
1931 }
1932
1933 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
1934 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
1935 ret = -EINVAL;
1936 goto error_pvid;
1937 }
1938
1939 vf = &(pf->vf[vf_id]);
1940 vsi = pf->vsi[vf->lan_vsi_index];
1941 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1942 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
1943 ret = -EINVAL;
1944 goto error_pvid;
1945 }
1946
1947 if (vsi->info.pvid) {
1948 /* kill old VLAN */
1949 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
1950 VLAN_VID_MASK));
1951 if (ret) {
1952 dev_info(&vsi->back->pdev->dev,
1953 "remove VLAN failed, ret=%d, aq_err=%d\n",
1954 ret, pf->hw.aq.asq_last_status);
1955 }
1956 }
1957 if (vlan_id || qos)
1958 ret = i40e_vsi_add_pvid(vsi,
1959 vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT));
1960 else
1961 i40e_vlan_stripping_disable(vsi);
1962
1963 if (vlan_id) {
1964 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
1965 vlan_id, qos, vf_id);
1966
1967 /* add new VLAN filter */
1968 ret = i40e_vsi_add_vlan(vsi, vlan_id);
1969 if (ret) {
1970 dev_info(&vsi->back->pdev->dev,
1971 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
1972 vsi->back->hw.aq.asq_last_status);
1973 goto error_pvid;
1974 }
1975 }
1976
1977 if (ret) {
1978 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
1979 goto error_pvid;
1980 }
1981 ret = 0;
1982
1983error_pvid:
1984 return ret;
1985}
1986
1987/**
1988 * i40e_ndo_set_vf_bw
1989 * @netdev: network interface device structure
1990 * @vf_id: vf identifier
1991 * @tx_rate: tx rate
1992 *
1993 * configure vf tx rate
1994 **/
1995int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int tx_rate)
1996{
1997 return -EOPNOTSUPP;
1998}
1999
2000/**
2001 * i40e_ndo_get_vf_config
2002 * @netdev: network interface device structure
2003 * @vf_id: vf identifier
2004 * @ivi: vf configuration structure
2005 *
2006 * return vf configuration
2007 **/
2008int i40e_ndo_get_vf_config(struct net_device *netdev,
2009 int vf_id, struct ifla_vf_info *ivi)
2010{
2011 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 2012 struct i40e_vsi *vsi = np->vsi;
2013 struct i40e_pf *pf = vsi->back;
2014 struct i40e_vf *vf;
2015 int ret = 0;
2016
2017 /* validate the request */
2018 if (vf_id >= pf->num_alloc_vfs) {
2019 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2020 ret = -EINVAL;
2021 goto error_param;
2022 }
2023
2024 vf = &(pf->vf[vf_id]);
2025 /* first vsi is always the LAN vsi */
2026 vsi = pf->vsi[vf->lan_vsi_index];
2027 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2028 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
2029 ret = -EINVAL;
2030 goto error_param;
2031 }
2032
2033 ivi->vf = vf_id;
2034
f4a1c5cf 2035 memcpy(&ivi->mac, vf->default_lan_addr.addr, ETH_ALEN);
5c3c48ac
JB		 2036
2037 ivi->tx_rate = 0;
2038 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2039 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2040 I40E_VLAN_PRIORITY_SHIFT;
2041 ret = 0;
2042
2043error_param:
2044 return ret;
2045}
Linux kernel - Deliverables
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