i40e/i40evf: clean up some code
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
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1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
51616018 4 * Copyright(c) 2013 - 2015 Intel Corporation.
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5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
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15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
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17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW
29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
42 enum i40e_virtchnl_ops v_opcode,
43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
51 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
52 /* Not all vfs are enabled so skip the ones that are not */
53 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
66 * i40e_vc_notify_link_state
67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
73 struct i40e_virtchnl_pf_event pfe;
74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
77 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
78
79 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
80 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
84 (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
88 pfe.event_data.link_event.link_speed = ls->link_speed;
89 }
90 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
91 0, (u8 *)&pfe, sizeof(pfe), NULL);
92}
93
94/**
95 * i40e_vc_notify_link_state
96 * @pf: pointer to the PF structure
97 *
98 * send a link status message to all VFs on a given PF
99 **/
100void i40e_vc_notify_link_state(struct i40e_pf *pf)
101{
102 int i;
103
104 for (i = 0; i < pf->num_alloc_vfs; i++)
105 i40e_vc_notify_vf_link_state(&pf->vf[i]);
106}
107
108/**
109 * i40e_vc_notify_reset
110 * @pf: pointer to the PF structure
111 *
112 * indicate a pending reset to all VFs on a given PF
113 **/
114void i40e_vc_notify_reset(struct i40e_pf *pf)
115{
116 struct i40e_virtchnl_pf_event pfe;
117
118 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
119 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
120 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0,
121 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
122}
123
124/**
125 * i40e_vc_notify_vf_reset
126 * @vf: pointer to the VF structure
127 *
128 * indicate a pending reset to the given VF
129 **/
130void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
131{
132 struct i40e_virtchnl_pf_event pfe;
133 int abs_vf_id;
134
135 /* validate the request */
136 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
137 return;
138
139 /* verify if the VF is in either init or active before proceeding */
140 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
141 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
142 return;
143
144 abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id;
145
146 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
147 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
148 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
149 0, (u8 *)&pfe,
150 sizeof(struct i40e_virtchnl_pf_event), NULL);
151}
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JB
152/***********************misc routines*****************************/
153
f9b4b627
GR
154/**
155 * i40e_vc_disable_vf
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156 * @pf: pointer to the PF info
157 * @vf: pointer to the VF info
f9b4b627
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158 *
159 * Disable the VF through a SW reset
160 **/
161static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
162{
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163 i40e_vc_notify_vf_reset(vf);
164 i40e_reset_vf(vf, false);
f9b4b627
GR
165}
166
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JB
167/**
168 * i40e_vc_isvalid_vsi_id
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JK
169 * @vf: pointer to the VF info
170 * @vsi_id: VF relative VSI id
5c3c48ac 171 *
b40c82e6 172 * check for the valid VSI id
5c3c48ac 173 **/
fdf0e0bf 174static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
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JB
175{
176 struct i40e_pf *pf = vf->pf;
fdf0e0bf 177 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 178
fdf0e0bf 179 return (vsi && (vsi->vf_id == vf->vf_id));
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180}
181
182/**
183 * i40e_vc_isvalid_queue_id
b40c82e6 184 * @vf: pointer to the VF info
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185 * @vsi_id: vsi id
186 * @qid: vsi relative queue id
187 *
188 * check for the valid queue id
189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
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191 u8 qid)
192{
193 struct i40e_pf *pf = vf->pf;
fdf0e0bf 194 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 195
fdf0e0bf 196 return (vsi && (qid < vsi->alloc_queue_pairs));
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197}
198
199/**
200 * i40e_vc_isvalid_vector_id
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201 * @vf: pointer to the VF info
202 * @vector_id: VF relative vector id
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203 *
204 * check for the valid vector id
205 **/
206static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
207{
208 struct i40e_pf *pf = vf->pf;
209
9347eb77 210 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
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211}
212
213/***********************vf resource mgmt routines*****************/
214
215/**
216 * i40e_vc_get_pf_queue_id
b40c82e6 217 * @vf: pointer to the VF info
fdf0e0bf 218 * @vsi_id: id of VSI as provided by the FW
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219 * @vsi_queue_id: vsi relative queue id
220 *
b40c82e6 221 * return PF relative queue id
5c3c48ac 222 **/
fdf0e0bf 223static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
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224 u8 vsi_queue_id)
225{
226 struct i40e_pf *pf = vf->pf;
fdf0e0bf 227 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
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228 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
229
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ASJ
230 if (!vsi)
231 return pf_queue_id;
232
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JB
233 if (le16_to_cpu(vsi->info.mapping_flags) &
234 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
235 pf_queue_id =
236 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
237 else
238 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
239 vsi_queue_id;
240
241 return pf_queue_id;
242}
243
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JB
244/**
245 * i40e_config_irq_link_list
b40c82e6 246 * @vf: pointer to the VF info
fdf0e0bf 247 * @vsi_id: id of VSI as given by the FW
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248 * @vecmap: irq map info
249 *
250 * configure irq link list from the map
251 **/
fdf0e0bf 252static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
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253 struct i40e_virtchnl_vector_map *vecmap)
254{
255 unsigned long linklistmap = 0, tempmap;
256 struct i40e_pf *pf = vf->pf;
257 struct i40e_hw *hw = &pf->hw;
258 u16 vsi_queue_id, pf_queue_id;
259 enum i40e_queue_type qtype;
260 u16 next_q, vector_id;
261 u32 reg, reg_idx;
262 u16 itr_idx = 0;
263
264 vector_id = vecmap->vector_id;
265 /* setup the head */
266 if (0 == vector_id)
267 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
268 else
269 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
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270 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
271 (vector_id - 1));
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272
273 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
274 /* Special case - No queues mapped on this vector */
275 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
276 goto irq_list_done;
277 }
278 tempmap = vecmap->rxq_map;
4836650b 279 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
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280 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
281 vsi_queue_id));
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282 }
283
284 tempmap = vecmap->txq_map;
4836650b 285 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
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JB
286 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
287 vsi_queue_id + 1));
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288 }
289
290 next_q = find_first_bit(&linklistmap,
291 (I40E_MAX_VSI_QP *
292 I40E_VIRTCHNL_SUPPORTED_QTYPES));
293 vsi_queue_id = next_q/I40E_VIRTCHNL_SUPPORTED_QTYPES;
294 qtype = next_q%I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 295 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
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296 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
297
298 wr32(hw, reg_idx, reg);
299
300 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
301 switch (qtype) {
302 case I40E_QUEUE_TYPE_RX:
303 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
304 itr_idx = vecmap->rxitr_idx;
305 break;
306 case I40E_QUEUE_TYPE_TX:
307 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
308 itr_idx = vecmap->txitr_idx;
309 break;
310 default:
311 break;
312 }
313
314 next_q = find_next_bit(&linklistmap,
315 (I40E_MAX_VSI_QP *
316 I40E_VIRTCHNL_SUPPORTED_QTYPES),
317 next_q + 1);
829af3ac
MW
318 if (next_q <
319 (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
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JB
320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 322 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
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JB
323 vsi_queue_id);
324 } else {
325 pf_queue_id = I40E_QUEUE_END_OF_LIST;
326 qtype = 0;
327 }
328
329 /* format for the RQCTL & TQCTL regs is same */
330 reg = (vector_id) |
331 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
332 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 333 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
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JB
334 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
335 wr32(hw, reg_idx, reg);
336 }
337
b8262a6d
ASJ
338 /* if the vf is running in polling mode and using interrupt zero,
339 * need to disable auto-mask on enabling zero interrupt for VFs.
340 */
341 if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
342 (vector_id == 0)) {
343 reg = rd32(hw, I40E_GLINT_CTL);
344 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
345 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
346 wr32(hw, I40E_GLINT_CTL, reg);
347 }
348 }
349
5c3c48ac
JB
350irq_list_done:
351 i40e_flush(hw);
352}
353
354/**
355 * i40e_config_vsi_tx_queue
b40c82e6 356 * @vf: pointer to the VF info
fdf0e0bf 357 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB
358 * @vsi_queue_id: vsi relative queue index
359 * @info: config. info
360 *
361 * configure tx queue
362 **/
fdf0e0bf 363static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB
364 u16 vsi_queue_id,
365 struct i40e_virtchnl_txq_info *info)
366{
367 struct i40e_pf *pf = vf->pf;
368 struct i40e_hw *hw = &pf->hw;
369 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 370 struct i40e_vsi *vsi;
5c3c48ac
JB
371 u16 pf_queue_id;
372 u32 qtx_ctl;
373 int ret = 0;
374
fdf0e0bf
ASJ
375 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
376 vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB
377
378 /* clear the context structure first */
379 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
380
381 /* only set the required fields */
382 tx_ctx.base = info->dma_ring_addr / 128;
383 tx_ctx.qlen = info->ring_len;
fdf0e0bf 384 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 385 tx_ctx.rdylist_act = 0;
5d29896a
AS
386 tx_ctx.head_wb_ena = info->headwb_enabled;
387 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB
388
389 /* clear the context in the HMC */
390 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
391 if (ret) {
392 dev_err(&pf->pdev->dev,
393 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
394 pf_queue_id, ret);
395 ret = -ENOENT;
396 goto error_context;
397 }
398
399 /* set the context in the HMC */
400 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
401 if (ret) {
402 dev_err(&pf->pdev->dev,
403 "Failed to set VF LAN Tx queue context %d error: %d\n",
404 pf_queue_id, ret);
405 ret = -ENOENT;
406 goto error_context;
407 }
408
409 /* associate this queue with the PCI VF function */
410 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 411 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB
412 & I40E_QTX_CTL_PF_INDX_MASK);
413 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
414 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
415 & I40E_QTX_CTL_VFVM_INDX_MASK);
416 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
417 i40e_flush(hw);
418
419error_context:
420 return ret;
421}
422
423/**
424 * i40e_config_vsi_rx_queue
b40c82e6 425 * @vf: pointer to the VF info
fdf0e0bf 426 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB
427 * @vsi_queue_id: vsi relative queue index
428 * @info: config. info
429 *
430 * configure rx queue
431 **/
fdf0e0bf 432static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB
433 u16 vsi_queue_id,
434 struct i40e_virtchnl_rxq_info *info)
435{
436 struct i40e_pf *pf = vf->pf;
437 struct i40e_hw *hw = &pf->hw;
438 struct i40e_hmc_obj_rxq rx_ctx;
439 u16 pf_queue_id;
440 int ret = 0;
441
fdf0e0bf 442 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB
443
444 /* clear the context structure first */
445 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
446
447 /* only set the required fields */
448 rx_ctx.base = info->dma_ring_addr / 128;
449 rx_ctx.qlen = info->ring_len;
450
451 if (info->splithdr_enabled) {
452 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
453 I40E_RX_SPLIT_IP |
454 I40E_RX_SPLIT_TCP_UDP |
455 I40E_RX_SPLIT_SCTP;
456 /* header length validation */
457 if (info->hdr_size > ((2 * 1024) - 64)) {
458 ret = -EINVAL;
459 goto error_param;
460 }
461 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
462
463 /* set splitalways mode 10b */
464 rx_ctx.dtype = 0x2;
465 }
466
467 /* databuffer length validation */
468 if (info->databuffer_size > ((16 * 1024) - 128)) {
469 ret = -EINVAL;
470 goto error_param;
471 }
472 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
473
474 /* max pkt. length validation */
475 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
476 ret = -EINVAL;
477 goto error_param;
478 }
479 rx_ctx.rxmax = info->max_pkt_size;
480
481 /* enable 32bytes desc always */
482 rx_ctx.dsize = 1;
483
484 /* default values */
5c3c48ac
JB
485 rx_ctx.lrxqthresh = 2;
486 rx_ctx.crcstrip = 1;
50d41659 487 rx_ctx.prefena = 1;
c1d11cef 488 rx_ctx.l2tsel = 1;
5c3c48ac
JB
489
490 /* clear the context in the HMC */
491 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
492 if (ret) {
493 dev_err(&pf->pdev->dev,
494 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
495 pf_queue_id, ret);
496 ret = -ENOENT;
497 goto error_param;
498 }
499
500 /* set the context in the HMC */
501 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
502 if (ret) {
503 dev_err(&pf->pdev->dev,
504 "Failed to set VF LAN Rx queue context %d error: %d\n",
505 pf_queue_id, ret);
506 ret = -ENOENT;
507 goto error_param;
508 }
509
510error_param:
511 return ret;
512}
513
514/**
515 * i40e_alloc_vsi_res
b40c82e6 516 * @vf: pointer to the VF info
5c3c48ac
JB
517 * @type: type of VSI to allocate
518 *
b40c82e6 519 * alloc VF vsi context & resources
5c3c48ac
JB
520 **/
521static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
522{
523 struct i40e_mac_filter *f = NULL;
524 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB
525 struct i40e_vsi *vsi;
526 int ret = 0;
527
528 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
529
530 if (!vsi) {
531 dev_err(&pf->pdev->dev,
b40c82e6 532 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB
533 vf->vf_id, pf->hw.aq.asq_last_status);
534 ret = -ENOENT;
535 goto error_alloc_vsi_res;
536 }
537 if (type == I40E_VSI_SRIOV) {
1a10370a 538 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6995b36c 539
fdf0e0bf 540 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 541 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR
542 /* If the port VLAN has been configured and then the
543 * VF driver was removed then the VSI port VLAN
544 * configuration was destroyed. Check if there is
545 * a port VLAN and restore the VSI configuration if
546 * needed.
547 */
548 if (vf->port_vlan_id)
549 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
5c3c48ac 550 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
e995163c
MW
551 vf->port_vlan_id ? vf->port_vlan_id : -1,
552 true, false);
1a10370a
GR
553 if (!f)
554 dev_info(&pf->pdev->dev,
555 "Could not allocate VF MAC addr\n");
e995163c
MW
556 f = i40e_add_filter(vsi, brdcast,
557 vf->port_vlan_id ? vf->port_vlan_id : -1,
1a10370a
GR
558 true, false);
559 if (!f)
560 dev_info(&pf->pdev->dev,
561 "Could not allocate VF broadcast filter\n");
5c3c48ac 562 }
6dbbbfb2 563
5c3c48ac 564 /* program mac filter */
30e2561b 565 ret = i40e_sync_vsi_filters(vsi, false);
fd1646ee 566 if (ret)
5c3c48ac 567 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 568
6b192891
MW
569 /* Set VF bandwidth if specified */
570 if (vf->tx_rate) {
571 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
572 vf->tx_rate / 50, 0, NULL);
573 if (ret)
574 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
575 vf->vf_id, ret);
576 }
577
5c3c48ac
JB
578error_alloc_vsi_res:
579 return ret;
580}
581
805bd5bd
MW
582/**
583 * i40e_enable_vf_mappings
b40c82e6 584 * @vf: pointer to the VF info
805bd5bd 585 *
b40c82e6 586 * enable VF mappings
805bd5bd
MW
587 **/
588static void i40e_enable_vf_mappings(struct i40e_vf *vf)
589{
590 struct i40e_pf *pf = vf->pf;
591 struct i40e_hw *hw = &pf->hw;
592 u32 reg, total_queue_pairs = 0;
593 int j;
594
595 /* Tell the hardware we're using noncontiguous mapping. HW requires
596 * that VF queues be mapped using this method, even when they are
597 * contiguous in real life
598 */
599 wr32(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
600 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
601
602 /* enable VF vplan_qtable mappings */
603 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
604 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
605
606 /* map PF queues to VF queues */
fdf0e0bf
ASJ
607 for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
608 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
6995b36c 609
805bd5bd
MW
610 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
611 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
612 total_queue_pairs++;
613 }
614
615 /* map PF queues to VSI */
616 for (j = 0; j < 7; j++) {
fdf0e0bf 617 if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
805bd5bd
MW
618 reg = 0x07FF07FF; /* unused */
619 } else {
fdf0e0bf 620 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW
621 j * 2);
622 reg = qid;
fdf0e0bf 623 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW
624 (j * 2) + 1);
625 reg |= qid << 16;
626 }
627 wr32(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), reg);
628 }
629
630 i40e_flush(hw);
631}
632
633/**
634 * i40e_disable_vf_mappings
b40c82e6 635 * @vf: pointer to the VF info
805bd5bd 636 *
b40c82e6 637 * disable VF mappings
805bd5bd
MW
638 **/
639static void i40e_disable_vf_mappings(struct i40e_vf *vf)
640{
641 struct i40e_pf *pf = vf->pf;
642 struct i40e_hw *hw = &pf->hw;
643 int i;
644
645 /* disable qp mappings */
646 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
647 for (i = 0; i < I40E_MAX_VSI_QP; i++)
648 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
649 I40E_QUEUE_END_OF_LIST);
650 i40e_flush(hw);
651}
652
653/**
654 * i40e_free_vf_res
b40c82e6 655 * @vf: pointer to the VF info
805bd5bd 656 *
b40c82e6 657 * free VF resources
805bd5bd
MW
658 **/
659static void i40e_free_vf_res(struct i40e_vf *vf)
660{
661 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW
662 struct i40e_hw *hw = &pf->hw;
663 u32 reg_idx, reg;
664 int i, msix_vf;
805bd5bd
MW
665
666 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ
667 if (vf->lan_vsi_idx) {
668 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
669 vf->lan_vsi_idx = 0;
805bd5bd
MW
670 vf->lan_vsi_id = 0;
671 }
9347eb77
MW
672 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
673
fc18eaa0
MW
674 /* disable interrupts so the VF starts in a known state */
675 for (i = 0; i < msix_vf; i++) {
676 /* format is same for both registers */
677 if (0 == i)
678 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
679 else
680 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
681 (vf->vf_id))
682 + (i - 1));
683 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
684 i40e_flush(hw);
685 }
805bd5bd 686
fc18eaa0
MW
687 /* clear the irq settings */
688 for (i = 0; i < msix_vf; i++) {
689 /* format is same for both registers */
690 if (0 == i)
691 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
692 else
693 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
694 (vf->vf_id))
695 + (i - 1));
696 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
697 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
698 wr32(hw, reg_idx, reg);
699 i40e_flush(hw);
700 }
805bd5bd
MW
701 /* reset some of the state varibles keeping
702 * track of the resources
703 */
704 vf->num_queue_pairs = 0;
705 vf->vf_states = 0;
706}
707
708/**
709 * i40e_alloc_vf_res
b40c82e6 710 * @vf: pointer to the VF info
805bd5bd 711 *
b40c82e6 712 * allocate VF resources
805bd5bd
MW
713 **/
714static int i40e_alloc_vf_res(struct i40e_vf *vf)
715{
716 struct i40e_pf *pf = vf->pf;
717 int total_queue_pairs = 0;
718 int ret;
719
720 /* allocate hw vsi context & associated resources */
721 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
722 if (ret)
723 goto error_alloc;
fdf0e0bf 724 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
805bd5bd
MW
725 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
726
727 /* store the total qps number for the runtime
b40c82e6 728 * VF req validation
805bd5bd
MW
729 */
730 vf->num_queue_pairs = total_queue_pairs;
731
b40c82e6 732 /* VF is now completely initialized */
805bd5bd
MW
733 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
734
735error_alloc:
736 if (ret)
737 i40e_free_vf_res(vf);
738
739 return ret;
740}
741
fc18eaa0
MW
742#define VF_DEVICE_STATUS 0xAA
743#define VF_TRANS_PENDING_MASK 0x20
744/**
745 * i40e_quiesce_vf_pci
b40c82e6 746 * @vf: pointer to the VF structure
fc18eaa0
MW
747 *
748 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
749 * if the transactions never clear.
750 **/
751static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
752{
753 struct i40e_pf *pf = vf->pf;
754 struct i40e_hw *hw = &pf->hw;
755 int vf_abs_id, i;
756 u32 reg;
757
b141d619 758 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW
759
760 wr32(hw, I40E_PF_PCI_CIAA,
761 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
762 for (i = 0; i < 100; i++) {
763 reg = rd32(hw, I40E_PF_PCI_CIAD);
764 if ((reg & VF_TRANS_PENDING_MASK) == 0)
765 return 0;
766 udelay(1);
767 }
768 return -EIO;
769}
770
5c3c48ac
JB
771/**
772 * i40e_reset_vf
b40c82e6 773 * @vf: pointer to the VF structure
5c3c48ac
JB
774 * @flr: VFLR was issued or not
775 *
b40c82e6 776 * reset the VF
5c3c48ac 777 **/
fc18eaa0 778void i40e_reset_vf(struct i40e_vf *vf, bool flr)
5c3c48ac 779{
5c3c48ac
JB
780 struct i40e_pf *pf = vf->pf;
781 struct i40e_hw *hw = &pf->hw;
5c3c48ac 782 bool rsd = false;
fc18eaa0
MW
783 int i;
784 u32 reg;
5c3c48ac 785
3ba9bcb4
MW
786 if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
787 return;
788
5c3c48ac 789 /* warn the VF */
5c3c48ac
JB
790 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
791
fc18eaa0
MW
792 /* In the case of a VFLR, the HW has already reset the VF and we
793 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB
794 */
795 if (!flr) {
b40c82e6 796 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW
797 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
798 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB
799 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
800 i40e_flush(hw);
801 }
802
fc18eaa0
MW
803 if (i40e_quiesce_vf_pci(vf))
804 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
805 vf->vf_id);
806
5c3c48ac
JB
807 /* poll VPGEN_VFRSTAT reg to make sure
808 * that reset is complete
809 */
1750a22f
MW
810 for (i = 0; i < 10; i++) {
811 /* VF reset requires driver to first reset the VF and then
812 * poll the status register to make sure that the reset
813 * completed successfully. Due to internal HW FIFO flushes,
814 * we must wait 10ms before the register will be valid.
5c3c48ac 815 */
1750a22f 816 usleep_range(10000, 20000);
5c3c48ac
JB
817 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
818 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
819 rsd = true;
820 break;
821 }
822 }
823
57175ac1
ASJ
824 if (flr)
825 usleep_range(10000, 20000);
826
5c3c48ac 827 if (!rsd)
fc18eaa0 828 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
5c3c48ac 829 vf->vf_id);
fc18eaa0 830 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
5c3c48ac
JB
831 /* clear the reset bit in the VPGEN_VFRTRIG reg */
832 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
833 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
834 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
fc18eaa0
MW
835
836 /* On initial reset, we won't have any queues */
fdf0e0bf 837 if (vf->lan_vsi_idx == 0)
fc18eaa0
MW
838 goto complete_reset;
839
fdf0e0bf 840 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false);
fc18eaa0 841complete_reset:
b40c82e6 842 /* reallocate VF resources to reset the VSI state */
fc18eaa0 843 i40e_free_vf_res(vf);
fc18eaa0
MW
844 i40e_alloc_vf_res(vf);
845 i40e_enable_vf_mappings(vf);
c17b362b 846 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
5b8f8505 847 clear_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
fc18eaa0 848
5c3c48ac 849 /* tell the VF the reset is done */
fc18eaa0 850 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
5c3c48ac 851 i40e_flush(hw);
3ba9bcb4 852 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac 853}
c354229f 854
5c3c48ac
JB
855/**
856 * i40e_free_vfs
b40c82e6 857 * @pf: pointer to the PF structure
5c3c48ac 858 *
b40c82e6 859 * free VF resources
5c3c48ac
JB
860 **/
861void i40e_free_vfs(struct i40e_pf *pf)
862{
f7414531
MW
863 struct i40e_hw *hw = &pf->hw;
864 u32 reg_idx, bit_idx;
865 int i, tmp, vf_id;
5c3c48ac
JB
866
867 if (!pf->vf)
868 return;
3ba9bcb4
MW
869 while (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
870 usleep_range(1000, 2000);
5c3c48ac 871
44434638
MW
872 for (i = 0; i < pf->num_alloc_vfs; i++)
873 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
874 i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
875 false);
0325fca7
MW
876
877 for (i = 0; i < pf->num_alloc_vfs; i++)
878 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
879 i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
880 false);
44434638 881
6a9ddb36
MW
882 /* Disable IOV before freeing resources. This lets any VF drivers
883 * running in the host get themselves cleaned up before we yank
884 * the carpet out from underneath their feet.
885 */
886 if (!pci_vfs_assigned(pf->pdev))
887 pci_disable_sriov(pf->pdev);
6d7b967d
MW
888 else
889 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36
MW
890
891 msleep(20); /* let any messages in transit get finished up */
892
b40c82e6 893 /* free up VF resources */
6c1b5bff
MW
894 tmp = pf->num_alloc_vfs;
895 pf->num_alloc_vfs = 0;
896 for (i = 0; i < tmp; i++) {
5c3c48ac
JB
897 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
898 i40e_free_vf_res(&pf->vf[i]);
899 /* disable qp mappings */
900 i40e_disable_vf_mappings(&pf->vf[i]);
901 }
902
903 kfree(pf->vf);
904 pf->vf = NULL;
5c3c48ac 905
9e5634df
MW
906 /* This check is for when the driver is unloaded while VFs are
907 * assigned. Setting the number of VFs to 0 through sysfs is caught
908 * before this function ever gets called.
909 */
c24817b6 910 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW
911 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
912 * work correctly when SR-IOV gets re-enabled.
913 */
914 for (vf_id = 0; vf_id < tmp; vf_id++) {
915 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
916 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 917 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 918 }
c354229f 919 }
3ba9bcb4 920 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac
JB
921}
922
923#ifdef CONFIG_PCI_IOV
924/**
925 * i40e_alloc_vfs
b40c82e6
JK
926 * @pf: pointer to the PF structure
927 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 928 *
b40c82e6 929 * allocate VF resources
5c3c48ac 930 **/
4aeec010 931int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB
932{
933 struct i40e_vf *vfs;
934 int i, ret = 0;
935
6c1b5bff 936 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW
937 i40e_irq_dynamic_disable_icr0(pf);
938
4aeec010
MW
939 /* Check to see if we're just allocating resources for extant VFs */
940 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
941 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
942 if (ret) {
4aeec010
MW
943 pf->num_alloc_vfs = 0;
944 goto err_iov;
945 }
5c3c48ac 946 }
5c3c48ac 947 /* allocate memory */
cc6456af 948 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB
949 if (!vfs) {
950 ret = -ENOMEM;
951 goto err_alloc;
952 }
c674d125 953 pf->vf = vfs;
5c3c48ac
JB
954
955 /* apply default profile */
956 for (i = 0; i < num_alloc_vfs; i++) {
957 vfs[i].pf = pf;
958 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
959 vfs[i].vf_id = i;
960
961 /* assign default capabilities */
962 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 963 vfs[i].spoofchk = true;
b40c82e6 964 /* VF resources get allocated during reset */
fc18eaa0 965 i40e_reset_vf(&vfs[i], false);
5c3c48ac 966
b40c82e6 967 /* enable VF vplan_qtable mappings */
5c3c48ac
JB
968 i40e_enable_vf_mappings(&vfs[i]);
969 }
5c3c48ac
JB
970 pf->num_alloc_vfs = num_alloc_vfs;
971
972err_alloc:
973 if (ret)
974 i40e_free_vfs(pf);
975err_iov:
6c1b5bff 976 /* Re-enable interrupt 0. */
2ef28cfb 977 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB
978 return ret;
979}
980
981#endif
982/**
983 * i40e_pci_sriov_enable
984 * @pdev: pointer to a pci_dev structure
b40c82e6 985 * @num_vfs: number of VFs to allocate
5c3c48ac
JB
986 *
987 * Enable or change the number of VFs
988 **/
989static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
990{
991#ifdef CONFIG_PCI_IOV
992 struct i40e_pf *pf = pci_get_drvdata(pdev);
993 int pre_existing_vfs = pci_num_vf(pdev);
994 int err = 0;
995
6995b36c 996 if (test_bit(__I40E_TESTING, &pf->state)) {
e17bc411
GR
997 dev_warn(&pdev->dev,
998 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
999 err = -EPERM;
1000 goto err_out;
1001 }
1002
5c3c48ac
JB
1003 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1004 i40e_free_vfs(pf);
1005 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1006 goto out;
1007
1008 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW
1009 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1010 num_vfs, pf->num_req_vfs);
5c3c48ac
JB
1011 err = -EPERM;
1012 goto err_out;
1013 }
1014
96c8d073 1015 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB
1016 err = i40e_alloc_vfs(pf, num_vfs);
1017 if (err) {
1018 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1019 goto err_out;
1020 }
1021
1022out:
1023 return num_vfs;
1024
1025err_out:
1026 return err;
1027#endif
1028 return 0;
1029}
1030
1031/**
1032 * i40e_pci_sriov_configure
1033 * @pdev: pointer to a pci_dev structure
b40c82e6 1034 * @num_vfs: number of VFs to allocate
5c3c48ac
JB
1035 *
1036 * Enable or change the number of VFs. Called when the user updates the number
1037 * of VFs in sysfs.
1038 **/
1039int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1040{
1041 struct i40e_pf *pf = pci_get_drvdata(pdev);
1042
fc60861e
ASJ
1043 if (num_vfs) {
1044 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1045 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
1046 i40e_do_reset_safe(pf,
1047 BIT_ULL(__I40E_PF_RESET_REQUESTED));
1048 }
5c3c48ac 1049 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1050 }
5c3c48ac 1051
c24817b6 1052 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1053 i40e_free_vfs(pf);
fc60861e
ASJ
1054 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1055 i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9e5634df
MW
1056 } else {
1057 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1058 return -EINVAL;
1059 }
5c3c48ac
JB
1060 return 0;
1061}
1062
1063/***********************virtual channel routines******************/
1064
1065/**
1066 * i40e_vc_send_msg_to_vf
b40c82e6 1067 * @vf: pointer to the VF info
5c3c48ac
JB
1068 * @v_opcode: virtual channel opcode
1069 * @v_retval: virtual channel return value
1070 * @msg: pointer to the msg buffer
1071 * @msglen: msg length
1072 *
b40c82e6 1073 * send msg to VF
5c3c48ac
JB
1074 **/
1075static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1076 u32 v_retval, u8 *msg, u16 msglen)
1077{
6e7b5bd3
ASJ
1078 struct i40e_pf *pf;
1079 struct i40e_hw *hw;
1080 int abs_vf_id;
5c3c48ac
JB
1081 i40e_status aq_ret;
1082
6e7b5bd3
ASJ
1083 /* validate the request */
1084 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1085 return -EINVAL;
1086
1087 pf = vf->pf;
1088 hw = &pf->hw;
1089 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1090
5c3c48ac
JB
1091 /* single place to detect unsuccessful return values */
1092 if (v_retval) {
1093 vf->num_invalid_msgs++;
1094 dev_err(&pf->pdev->dev, "Failed opcode %d Error: %d\n",
1095 v_opcode, v_retval);
1096 if (vf->num_invalid_msgs >
1097 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1098 dev_err(&pf->pdev->dev,
1099 "Number of invalid messages exceeded for VF %d\n",
1100 vf->vf_id);
1101 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
1102 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
1103 }
1104 } else {
1105 vf->num_valid_msgs++;
1106 }
1107
f19efbb5 1108 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1109 msg, msglen, NULL);
5c3c48ac
JB
1110 if (aq_ret) {
1111 dev_err(&pf->pdev->dev,
1112 "Unable to send the message to VF %d aq_err %d\n",
1113 vf->vf_id, pf->hw.aq.asq_last_status);
1114 return -EIO;
1115 }
1116
1117 return 0;
1118}
1119
1120/**
1121 * i40e_vc_send_resp_to_vf
b40c82e6 1122 * @vf: pointer to the VF info
5c3c48ac
JB
1123 * @opcode: operation code
1124 * @retval: return value
1125 *
b40c82e6 1126 * send resp msg to VF
5c3c48ac
JB
1127 **/
1128static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
1129 enum i40e_virtchnl_ops opcode,
1130 i40e_status retval)
1131{
1132 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1133}
1134
1135/**
1136 * i40e_vc_get_version_msg
b40c82e6 1137 * @vf: pointer to the VF info
5c3c48ac 1138 *
b40c82e6 1139 * called from the VF to request the API version used by the PF
5c3c48ac 1140 **/
f4ca1a22 1141static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB
1142{
1143 struct i40e_virtchnl_version_info info = {
1144 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
1145 };
1146
f4ca1a22 1147 vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg;
606a5488
MW
1148 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
1149 if (VF_IS_V10(vf))
1150 info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
5c3c48ac
JB
1151 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
1152 I40E_SUCCESS, (u8 *)&info,
1153 sizeof(struct
1154 i40e_virtchnl_version_info));
1155}
1156
1157/**
1158 * i40e_vc_get_vf_resources_msg
b40c82e6 1159 * @vf: pointer to the VF info
5c3c48ac
JB
1160 * @msg: pointer to the msg buffer
1161 * @msglen: msg length
1162 *
b40c82e6 1163 * called from the VF to request its resources
5c3c48ac 1164 **/
f4ca1a22 1165static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB
1166{
1167 struct i40e_virtchnl_vf_resource *vfres = NULL;
1168 struct i40e_pf *pf = vf->pf;
1169 i40e_status aq_ret = 0;
1170 struct i40e_vsi *vsi;
1171 int i = 0, len = 0;
1172 int num_vsis = 1;
1173 int ret;
1174
1175 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1176 aq_ret = I40E_ERR_PARAM;
1177 goto err;
1178 }
1179
1180 len = (sizeof(struct i40e_virtchnl_vf_resource) +
1181 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
1182
1183 vfres = kzalloc(len, GFP_KERNEL);
1184 if (!vfres) {
1185 aq_ret = I40E_ERR_NO_MEMORY;
1186 len = 0;
1187 goto err;
1188 }
f4ca1a22
MW
1189 if (VF_IS_V11(vf))
1190 vf->driver_caps = *(u32 *)msg;
1191 else
1192 vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
1193 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
1194 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac
JB
1195
1196 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1197 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1198 if (!vsi->info.pvid)
e25d00b8
ASJ
1199 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
1200 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
1201 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ)
1202 vfres->vf_offload_flags |=
1203 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ;
1204 } else {
1205 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
1206 }
5c3c48ac
JB
1207 vfres->num_vsis = num_vsis;
1208 vfres->num_queue_pairs = vf->num_queue_pairs;
1209 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
fdf0e0bf
ASJ
1210 if (vf->lan_vsi_idx) {
1211 vfres->vsi_res[i].vsi_id = vf->lan_vsi_id;
5c3c48ac
JB
1212 vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV;
1213 vfres->vsi_res[i].num_queue_pairs =
fdf0e0bf 1214 pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
6995b36c
JB
1215 ether_addr_copy(vfres->vsi_res[i].default_mac_addr,
1216 vf->default_lan_addr.addr);
5c3c48ac
JB
1217 i++;
1218 }
1219 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1220
1221err:
b40c82e6 1222 /* send the response back to the VF */
5c3c48ac
JB
1223 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1224 aq_ret, (u8 *)vfres, len);
1225
1226 kfree(vfres);
1227 return ret;
1228}
1229
1230/**
1231 * i40e_vc_reset_vf_msg
b40c82e6 1232 * @vf: pointer to the VF info
5c3c48ac
JB
1233 * @msg: pointer to the msg buffer
1234 * @msglen: msg length
1235 *
b40c82e6
JK
1236 * called from the VF to reset itself,
1237 * unlike other virtchnl messages, PF driver
1238 * doesn't send the response back to the VF
5c3c48ac 1239 **/
fc18eaa0 1240static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1241{
fc18eaa0
MW
1242 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1243 i40e_reset_vf(vf, false);
5c3c48ac
JB
1244}
1245
1246/**
1247 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1248 * @vf: pointer to the VF info
5c3c48ac
JB
1249 * @msg: pointer to the msg buffer
1250 * @msglen: msg length
1251 *
b40c82e6
JK
1252 * called from the VF to configure the promiscuous mode of
1253 * VF vsis
5c3c48ac
JB
1254 **/
1255static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1256 u8 *msg, u16 msglen)
1257{
1258 struct i40e_virtchnl_promisc_info *info =
1259 (struct i40e_virtchnl_promisc_info *)msg;
1260 struct i40e_pf *pf = vf->pf;
1261 struct i40e_hw *hw = &pf->hw;
89cb86c3 1262 struct i40e_vsi *vsi;
5c3c48ac 1263 bool allmulti = false;
5c3c48ac
JB
1264 i40e_status aq_ret;
1265
fdf0e0bf 1266 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
5c3c48ac
JB
1267 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1268 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1269 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
fdf0e0bf 1270 (vsi->type != I40E_VSI_FCOE)) {
5c3c48ac
JB
1271 aq_ret = I40E_ERR_PARAM;
1272 goto error_param;
1273 }
5c3c48ac
JB
1274 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1275 allmulti = true;
89cb86c3 1276 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
5c3c48ac
JB
1277 allmulti, NULL);
1278
1279error_param:
b40c82e6 1280 /* send the response to the VF */
5c3c48ac
JB
1281 return i40e_vc_send_resp_to_vf(vf,
1282 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1283 aq_ret);
1284}
1285
1286/**
1287 * i40e_vc_config_queues_msg
b40c82e6 1288 * @vf: pointer to the VF info
5c3c48ac
JB
1289 * @msg: pointer to the msg buffer
1290 * @msglen: msg length
1291 *
b40c82e6 1292 * called from the VF to configure the rx/tx
5c3c48ac
JB
1293 * queues
1294 **/
1295static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1296{
1297 struct i40e_virtchnl_vsi_queue_config_info *qci =
1298 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1299 struct i40e_virtchnl_queue_pair_info *qpi;
5f5e33b6 1300 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB
1301 u16 vsi_id, vsi_queue_id;
1302 i40e_status aq_ret = 0;
1303 int i;
1304
1305 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1306 aq_ret = I40E_ERR_PARAM;
1307 goto error_param;
1308 }
1309
1310 vsi_id = qci->vsi_id;
1311 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1312 aq_ret = I40E_ERR_PARAM;
1313 goto error_param;
1314 }
1315 for (i = 0; i < qci->num_queue_pairs; i++) {
1316 qpi = &qci->qpair[i];
1317 vsi_queue_id = qpi->txq.queue_id;
1318 if ((qpi->txq.vsi_id != vsi_id) ||
1319 (qpi->rxq.vsi_id != vsi_id) ||
1320 (qpi->rxq.queue_id != vsi_queue_id) ||
1321 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1322 aq_ret = I40E_ERR_PARAM;
1323 goto error_param;
1324 }
1325
1326 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1327 &qpi->rxq) ||
1328 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1329 &qpi->txq)) {
1330 aq_ret = I40E_ERR_PARAM;
1331 goto error_param;
1332 }
1333 }
b40c82e6 1334 /* set vsi num_queue_pairs in use to num configured by VF */
fdf0e0bf 1335 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
5c3c48ac
JB
1336
1337error_param:
b40c82e6 1338 /* send the response to the VF */
5c3c48ac
JB
1339 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1340 aq_ret);
1341}
1342
1343/**
1344 * i40e_vc_config_irq_map_msg
b40c82e6 1345 * @vf: pointer to the VF info
5c3c48ac
JB
1346 * @msg: pointer to the msg buffer
1347 * @msglen: msg length
1348 *
b40c82e6 1349 * called from the VF to configure the irq to
5c3c48ac
JB
1350 * queue map
1351 **/
1352static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1353{
1354 struct i40e_virtchnl_irq_map_info *irqmap_info =
1355 (struct i40e_virtchnl_irq_map_info *)msg;
1356 struct i40e_virtchnl_vector_map *map;
1357 u16 vsi_id, vsi_queue_id, vector_id;
1358 i40e_status aq_ret = 0;
1359 unsigned long tempmap;
1360 int i;
1361
1362 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1363 aq_ret = I40E_ERR_PARAM;
1364 goto error_param;
1365 }
1366
1367 for (i = 0; i < irqmap_info->num_vectors; i++) {
1368 map = &irqmap_info->vecmap[i];
1369
1370 vector_id = map->vector_id;
1371 vsi_id = map->vsi_id;
1372 /* validate msg params */
1373 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1374 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1375 aq_ret = I40E_ERR_PARAM;
1376 goto error_param;
1377 }
1378
1379 /* lookout for the invalid queue index */
1380 tempmap = map->rxq_map;
4836650b 1381 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB
1382 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1383 vsi_queue_id)) {
1384 aq_ret = I40E_ERR_PARAM;
1385 goto error_param;
1386 }
5c3c48ac
JB
1387 }
1388
1389 tempmap = map->txq_map;
4836650b 1390 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB
1391 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1392 vsi_queue_id)) {
1393 aq_ret = I40E_ERR_PARAM;
1394 goto error_param;
1395 }
5c3c48ac
JB
1396 }
1397
1398 i40e_config_irq_link_list(vf, vsi_id, map);
1399 }
1400error_param:
b40c82e6 1401 /* send the response to the VF */
5c3c48ac
JB
1402 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1403 aq_ret);
1404}
1405
1406/**
1407 * i40e_vc_enable_queues_msg
b40c82e6 1408 * @vf: pointer to the VF info
5c3c48ac
JB
1409 * @msg: pointer to the msg buffer
1410 * @msglen: msg length
1411 *
b40c82e6 1412 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB
1413 **/
1414static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1415{
1416 struct i40e_virtchnl_queue_select *vqs =
1417 (struct i40e_virtchnl_queue_select *)msg;
1418 struct i40e_pf *pf = vf->pf;
1419 u16 vsi_id = vqs->vsi_id;
1420 i40e_status aq_ret = 0;
5c3c48ac
JB
1421
1422 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1423 aq_ret = I40E_ERR_PARAM;
1424 goto error_param;
1425 }
1426
1427 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1428 aq_ret = I40E_ERR_PARAM;
1429 goto error_param;
1430 }
1431
1432 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1433 aq_ret = I40E_ERR_PARAM;
1434 goto error_param;
1435 }
fdf0e0bf
ASJ
1436
1437 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], true))
88f6563d 1438 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac 1439error_param:
b40c82e6 1440 /* send the response to the VF */
5c3c48ac
JB
1441 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1442 aq_ret);
1443}
1444
1445/**
1446 * i40e_vc_disable_queues_msg
b40c82e6 1447 * @vf: pointer to the VF info
5c3c48ac
JB
1448 * @msg: pointer to the msg buffer
1449 * @msglen: msg length
1450 *
b40c82e6 1451 * called from the VF to disable all or specific
5c3c48ac
JB
1452 * queue(s)
1453 **/
1454static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1455{
1456 struct i40e_virtchnl_queue_select *vqs =
1457 (struct i40e_virtchnl_queue_select *)msg;
1458 struct i40e_pf *pf = vf->pf;
5c3c48ac 1459 i40e_status aq_ret = 0;
5c3c48ac
JB
1460
1461 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1462 aq_ret = I40E_ERR_PARAM;
1463 goto error_param;
1464 }
1465
1466 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1467 aq_ret = I40E_ERR_PARAM;
1468 goto error_param;
1469 }
1470
1471 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1472 aq_ret = I40E_ERR_PARAM;
1473 goto error_param;
1474 }
fdf0e0bf
ASJ
1475
1476 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false))
88f6563d 1477 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB
1478
1479error_param:
b40c82e6 1480 /* send the response to the VF */
5c3c48ac
JB
1481 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1482 aq_ret);
1483}
1484
1485/**
1486 * i40e_vc_get_stats_msg
b40c82e6 1487 * @vf: pointer to the VF info
5c3c48ac
JB
1488 * @msg: pointer to the msg buffer
1489 * @msglen: msg length
1490 *
b40c82e6 1491 * called from the VF to get vsi stats
5c3c48ac
JB
1492 **/
1493static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1494{
1495 struct i40e_virtchnl_queue_select *vqs =
1496 (struct i40e_virtchnl_queue_select *)msg;
1497 struct i40e_pf *pf = vf->pf;
1498 struct i40e_eth_stats stats;
1499 i40e_status aq_ret = 0;
1500 struct i40e_vsi *vsi;
1501
1502 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1503
1504 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1505 aq_ret = I40E_ERR_PARAM;
1506 goto error_param;
1507 }
1508
1509 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1510 aq_ret = I40E_ERR_PARAM;
1511 goto error_param;
1512 }
1513
fdf0e0bf 1514 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
1515 if (!vsi) {
1516 aq_ret = I40E_ERR_PARAM;
1517 goto error_param;
1518 }
1519 i40e_update_eth_stats(vsi);
5a9769c8 1520 stats = vsi->eth_stats;
5c3c48ac
JB
1521
1522error_param:
b40c82e6 1523 /* send the response back to the VF */
5c3c48ac
JB
1524 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1525 (u8 *)&stats, sizeof(stats));
1526}
1527
f657a6e1
GR
1528/**
1529 * i40e_check_vf_permission
b40c82e6 1530 * @vf: pointer to the VF info
f657a6e1
GR
1531 * @macaddr: pointer to the MAC Address being checked
1532 *
1533 * Check if the VF has permission to add or delete unicast MAC address
1534 * filters and return error code -EPERM if not. Then check if the
1535 * address filter requested is broadcast or zero and if so return
1536 * an invalid MAC address error code.
1537 **/
1538static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
1539{
1540 struct i40e_pf *pf = vf->pf;
1541 int ret = 0;
1542
1543 if (is_broadcast_ether_addr(macaddr) ||
1544 is_zero_ether_addr(macaddr)) {
1545 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
1546 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8
GR
1547 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
1548 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR
1549 /* If the host VMM administrator has set the VF MAC address
1550 * administratively via the ndo_set_vf_mac command then deny
1551 * permission to the VF to add or delete unicast MAC addresses.
5017c2a8
GR
1552 * The VF may request to set the MAC address filter already
1553 * assigned to it so do not return an error in that case.
f657a6e1
GR
1554 */
1555 dev_err(&pf->pdev->dev,
1556 "VF attempting to override administratively set MAC address\nPlease reload the VF driver to resume normal operation\n");
1557 ret = -EPERM;
1558 }
1559 return ret;
1560}
1561
5c3c48ac
JB
1562/**
1563 * i40e_vc_add_mac_addr_msg
b40c82e6 1564 * @vf: pointer to the VF info
5c3c48ac
JB
1565 * @msg: pointer to the msg buffer
1566 * @msglen: msg length
1567 *
1568 * add guest mac address filter
1569 **/
1570static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1571{
1572 struct i40e_virtchnl_ether_addr_list *al =
1573 (struct i40e_virtchnl_ether_addr_list *)msg;
1574 struct i40e_pf *pf = vf->pf;
1575 struct i40e_vsi *vsi = NULL;
1576 u16 vsi_id = al->vsi_id;
f657a6e1 1577 i40e_status ret = 0;
5c3c48ac
JB
1578 int i;
1579
1580 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1581 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1582 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1583 ret = I40E_ERR_PARAM;
5c3c48ac
JB
1584 goto error_param;
1585 }
1586
1587 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR
1588 ret = i40e_check_vf_permission(vf, al->list[i].addr);
1589 if (ret)
5c3c48ac 1590 goto error_param;
5c3c48ac 1591 }
fdf0e0bf 1592 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
1593
1594 /* add new addresses to the list */
1595 for (i = 0; i < al->num_elements; i++) {
1596 struct i40e_mac_filter *f;
1597
1598 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
7e68edf9 1599 if (!f) {
5c3c48ac
JB
1600 if (i40e_is_vsi_in_vlan(vsi))
1601 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1602 true, false);
1603 else
1604 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1605 true, false);
1606 }
1607
1608 if (!f) {
1609 dev_err(&pf->pdev->dev,
1610 "Unable to add VF MAC filter\n");
f657a6e1 1611 ret = I40E_ERR_PARAM;
5c3c48ac
JB
1612 goto error_param;
1613 }
1614 }
1615
1616 /* program the updated filter list */
30e2561b 1617 if (i40e_sync_vsi_filters(vsi, false))
5c3c48ac
JB
1618 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1619
1620error_param:
b40c82e6 1621 /* send the response to the VF */
5c3c48ac 1622 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
f657a6e1 1623 ret);
5c3c48ac
JB
1624}
1625
1626/**
1627 * i40e_vc_del_mac_addr_msg
b40c82e6 1628 * @vf: pointer to the VF info
5c3c48ac
JB
1629 * @msg: pointer to the msg buffer
1630 * @msglen: msg length
1631 *
1632 * remove guest mac address filter
1633 **/
1634static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1635{
1636 struct i40e_virtchnl_ether_addr_list *al =
1637 (struct i40e_virtchnl_ether_addr_list *)msg;
1638 struct i40e_pf *pf = vf->pf;
1639 struct i40e_vsi *vsi = NULL;
1640 u16 vsi_id = al->vsi_id;
f657a6e1 1641 i40e_status ret = 0;
5c3c48ac
JB
1642 int i;
1643
1644 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1645 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1646 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1647 ret = I40E_ERR_PARAM;
5c3c48ac
JB
1648 goto error_param;
1649 }
f657a6e1
GR
1650
1651 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW
1652 if (is_broadcast_ether_addr(al->list[i].addr) ||
1653 is_zero_ether_addr(al->list[i].addr)) {
1654 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n",
1655 al->list[i].addr);
1656 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 1657 goto error_param;
700bbf6c 1658 }
f657a6e1 1659 }
fdf0e0bf 1660 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
1661
1662 /* delete addresses from the list */
1663 for (i = 0; i < al->num_elements; i++)
1664 i40e_del_filter(vsi, al->list[i].addr,
1665 I40E_VLAN_ANY, true, false);
1666
1667 /* program the updated filter list */
30e2561b 1668 if (i40e_sync_vsi_filters(vsi, false))
5c3c48ac
JB
1669 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1670
1671error_param:
b40c82e6 1672 /* send the response to the VF */
5c3c48ac 1673 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
f657a6e1 1674 ret);
5c3c48ac
JB
1675}
1676
1677/**
1678 * i40e_vc_add_vlan_msg
b40c82e6 1679 * @vf: pointer to the VF info
5c3c48ac
JB
1680 * @msg: pointer to the msg buffer
1681 * @msglen: msg length
1682 *
1683 * program guest vlan id
1684 **/
1685static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1686{
1687 struct i40e_virtchnl_vlan_filter_list *vfl =
1688 (struct i40e_virtchnl_vlan_filter_list *)msg;
1689 struct i40e_pf *pf = vf->pf;
1690 struct i40e_vsi *vsi = NULL;
1691 u16 vsi_id = vfl->vsi_id;
1692 i40e_status aq_ret = 0;
1693 int i;
1694
1695 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1696 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1697 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1698 aq_ret = I40E_ERR_PARAM;
1699 goto error_param;
1700 }
1701
1702 for (i = 0; i < vfl->num_elements; i++) {
1703 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1704 aq_ret = I40E_ERR_PARAM;
1705 dev_err(&pf->pdev->dev,
1706 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
1707 goto error_param;
1708 }
1709 }
fdf0e0bf 1710 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
1711 if (vsi->info.pvid) {
1712 aq_ret = I40E_ERR_PARAM;
1713 goto error_param;
1714 }
1715
1716 i40e_vlan_stripping_enable(vsi);
1717 for (i = 0; i < vfl->num_elements; i++) {
1718 /* add new VLAN filter */
1719 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
6995b36c 1720
5c3c48ac
JB
1721 if (ret)
1722 dev_err(&pf->pdev->dev,
1723 "Unable to add VF vlan filter %d, error %d\n",
1724 vfl->vlan_id[i], ret);
1725 }
1726
1727error_param:
b40c82e6 1728 /* send the response to the VF */
5c3c48ac
JB
1729 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
1730}
1731
1732/**
1733 * i40e_vc_remove_vlan_msg
b40c82e6 1734 * @vf: pointer to the VF info
5c3c48ac
JB
1735 * @msg: pointer to the msg buffer
1736 * @msglen: msg length
1737 *
1738 * remove programmed guest vlan id
1739 **/
1740static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1741{
1742 struct i40e_virtchnl_vlan_filter_list *vfl =
1743 (struct i40e_virtchnl_vlan_filter_list *)msg;
1744 struct i40e_pf *pf = vf->pf;
1745 struct i40e_vsi *vsi = NULL;
1746 u16 vsi_id = vfl->vsi_id;
1747 i40e_status aq_ret = 0;
1748 int i;
1749
1750 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1751 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1752 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1753 aq_ret = I40E_ERR_PARAM;
1754 goto error_param;
1755 }
1756
1757 for (i = 0; i < vfl->num_elements; i++) {
1758 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1759 aq_ret = I40E_ERR_PARAM;
1760 goto error_param;
1761 }
1762 }
1763
fdf0e0bf 1764 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
1765 if (vsi->info.pvid) {
1766 aq_ret = I40E_ERR_PARAM;
1767 goto error_param;
1768 }
1769
1770 for (i = 0; i < vfl->num_elements; i++) {
1771 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
6995b36c 1772
5c3c48ac
JB
1773 if (ret)
1774 dev_err(&pf->pdev->dev,
1775 "Unable to delete VF vlan filter %d, error %d\n",
1776 vfl->vlan_id[i], ret);
1777 }
1778
1779error_param:
b40c82e6 1780 /* send the response to the VF */
5c3c48ac
JB
1781 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
1782}
1783
5c3c48ac
JB
1784/**
1785 * i40e_vc_validate_vf_msg
b40c82e6 1786 * @vf: pointer to the VF info
5c3c48ac
JB
1787 * @msg: pointer to the msg buffer
1788 * @msglen: msg length
1789 * @msghndl: msg handle
1790 *
1791 * validate msg
1792 **/
1793static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
1794 u32 v_retval, u8 *msg, u16 msglen)
1795{
1796 bool err_msg_format = false;
1797 int valid_len;
1798
1799 /* Check if VF is disabled. */
1800 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
1801 return I40E_ERR_PARAM;
1802
1803 /* Validate message length. */
1804 switch (v_opcode) {
1805 case I40E_VIRTCHNL_OP_VERSION:
1806 valid_len = sizeof(struct i40e_virtchnl_version_info);
1807 break;
1808 case I40E_VIRTCHNL_OP_RESET_VF:
5c3c48ac
JB
1809 valid_len = 0;
1810 break;
f4ca1a22
MW
1811 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1812 if (VF_IS_V11(vf))
1813 valid_len = sizeof(u32);
1814 else
1815 valid_len = 0;
1816 break;
5c3c48ac
JB
1817 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
1818 valid_len = sizeof(struct i40e_virtchnl_txq_info);
1819 break;
1820 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
1821 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
1822 break;
1823 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1824 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
1825 if (msglen >= valid_len) {
1826 struct i40e_virtchnl_vsi_queue_config_info *vqc =
1827 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1828 valid_len += (vqc->num_queue_pairs *
1829 sizeof(struct
1830 i40e_virtchnl_queue_pair_info));
1831 if (vqc->num_queue_pairs == 0)
1832 err_msg_format = true;
1833 }
1834 break;
1835 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1836 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
1837 if (msglen >= valid_len) {
1838 struct i40e_virtchnl_irq_map_info *vimi =
1839 (struct i40e_virtchnl_irq_map_info *)msg;
1840 valid_len += (vimi->num_vectors *
1841 sizeof(struct i40e_virtchnl_vector_map));
1842 if (vimi->num_vectors == 0)
1843 err_msg_format = true;
1844 }
1845 break;
1846 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1847 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1848 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1849 break;
1850 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1851 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1852 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
1853 if (msglen >= valid_len) {
1854 struct i40e_virtchnl_ether_addr_list *veal =
1855 (struct i40e_virtchnl_ether_addr_list *)msg;
1856 valid_len += veal->num_elements *
1857 sizeof(struct i40e_virtchnl_ether_addr);
1858 if (veal->num_elements == 0)
1859 err_msg_format = true;
1860 }
1861 break;
1862 case I40E_VIRTCHNL_OP_ADD_VLAN:
1863 case I40E_VIRTCHNL_OP_DEL_VLAN:
1864 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
1865 if (msglen >= valid_len) {
1866 struct i40e_virtchnl_vlan_filter_list *vfl =
1867 (struct i40e_virtchnl_vlan_filter_list *)msg;
1868 valid_len += vfl->num_elements * sizeof(u16);
1869 if (vfl->num_elements == 0)
1870 err_msg_format = true;
1871 }
1872 break;
1873 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1874 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
1875 break;
1876 case I40E_VIRTCHNL_OP_GET_STATS:
1877 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1878 break;
1879 /* These are always errors coming from the VF. */
1880 case I40E_VIRTCHNL_OP_EVENT:
1881 case I40E_VIRTCHNL_OP_UNKNOWN:
1882 default:
1883 return -EPERM;
5c3c48ac
JB
1884 }
1885 /* few more checks */
1886 if ((valid_len != msglen) || (err_msg_format)) {
1887 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
1888 return -EINVAL;
1889 } else {
1890 return 0;
1891 }
1892}
1893
1894/**
1895 * i40e_vc_process_vf_msg
b40c82e6
JK
1896 * @pf: pointer to the PF structure
1897 * @vf_id: source VF id
5c3c48ac
JB
1898 * @msg: pointer to the msg buffer
1899 * @msglen: msg length
1900 * @msghndl: msg handle
1901 *
1902 * called from the common aeq/arq handler to
b40c82e6 1903 * process request from VF
5c3c48ac
JB
1904 **/
1905int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode,
1906 u32 v_retval, u8 *msg, u16 msglen)
1907{
5c3c48ac 1908 struct i40e_hw *hw = &pf->hw;
c243e963 1909 unsigned int local_vf_id = vf_id - hw->func_caps.vf_base_id;
6c1b5bff 1910 struct i40e_vf *vf;
5c3c48ac
JB
1911 int ret;
1912
1913 pf->vf_aq_requests++;
7efa84b7 1914 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 1915 return -EINVAL;
7efa84b7 1916 vf = &(pf->vf[local_vf_id]);
5c3c48ac
JB
1917 /* perform basic checks on the msg */
1918 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
1919
1920 if (ret) {
b40c82e6 1921 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 1922 local_vf_id, v_opcode, msglen);
5c3c48ac
JB
1923 return ret;
1924 }
bae3cae4 1925
5c3c48ac
JB
1926 switch (v_opcode) {
1927 case I40E_VIRTCHNL_OP_VERSION:
f4ca1a22 1928 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac
JB
1929 break;
1930 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 1931 ret = i40e_vc_get_vf_resources_msg(vf, msg);
5c3c48ac
JB
1932 break;
1933 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW
1934 i40e_vc_reset_vf_msg(vf);
1935 ret = 0;
5c3c48ac
JB
1936 break;
1937 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1938 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
1939 break;
1940 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1941 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
1942 break;
1943 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1944 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
1945 break;
1946 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1947 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 1948 i40e_vc_notify_vf_link_state(vf);
5c3c48ac
JB
1949 break;
1950 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1951 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
1952 break;
1953 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1954 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
1955 break;
1956 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1957 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
1958 break;
1959 case I40E_VIRTCHNL_OP_ADD_VLAN:
1960 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
1961 break;
1962 case I40E_VIRTCHNL_OP_DEL_VLAN:
1963 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
1964 break;
1965 case I40E_VIRTCHNL_OP_GET_STATS:
1966 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
1967 break;
5c3c48ac
JB
1968 case I40E_VIRTCHNL_OP_UNKNOWN:
1969 default:
b40c82e6 1970 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 1971 v_opcode, local_vf_id);
5c3c48ac
JB
1972 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
1973 I40E_ERR_NOT_IMPLEMENTED);
1974 break;
1975 }
1976
1977 return ret;
1978}
1979
1980/**
1981 * i40e_vc_process_vflr_event
b40c82e6 1982 * @pf: pointer to the PF structure
5c3c48ac
JB
1983 *
1984 * called from the vlfr irq handler to
b40c82e6 1985 * free up VF resources and state variables
5c3c48ac
JB
1986 **/
1987int i40e_vc_process_vflr_event(struct i40e_pf *pf)
1988{
1989 u32 reg, reg_idx, bit_idx, vf_id;
1990 struct i40e_hw *hw = &pf->hw;
1991 struct i40e_vf *vf;
1992
1993 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
1994 return 0;
1995
c5c2f7c3
MW
1996 /* re-enable vflr interrupt cause */
1997 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
1998 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
1999 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
2000 i40e_flush(hw);
2001
5c3c48ac
JB
2002 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2003 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
2004 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
2005 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 2006 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB
2007 vf = &pf->vf[vf_id];
2008 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
41a1d04b 2009 if (reg & BIT(bit_idx)) {
5c3c48ac 2010 /* clear the bit in GLGEN_VFLRSTAT */
41a1d04b 2011 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
5c3c48ac 2012
eb2d80bc
MW
2013 if (!test_bit(__I40E_DOWN, &pf->state))
2014 i40e_reset_vf(vf, true);
5c3c48ac
JB
2015 }
2016 }
2017
5c3c48ac
JB
2018 return 0;
2019}
2020
5c3c48ac
JB
2021/**
2022 * i40e_ndo_set_vf_mac
2023 * @netdev: network interface device structure
b40c82e6 2024 * @vf_id: VF identifier
5c3c48ac
JB
2025 * @mac: mac address
2026 *
b40c82e6 2027 * program VF mac address
5c3c48ac
JB
2028 **/
2029int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2030{
2031 struct i40e_netdev_priv *np = netdev_priv(netdev);
2032 struct i40e_vsi *vsi = np->vsi;
2033 struct i40e_pf *pf = vsi->back;
2034 struct i40e_mac_filter *f;
2035 struct i40e_vf *vf;
2036 int ret = 0;
2037
2038 /* validate the request */
2039 if (vf_id >= pf->num_alloc_vfs) {
2040 dev_err(&pf->pdev->dev,
2041 "Invalid VF Identifier %d\n", vf_id);
2042 ret = -EINVAL;
2043 goto error_param;
2044 }
2045
2046 vf = &(pf->vf[vf_id]);
fdf0e0bf 2047 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
2048 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2049 dev_err(&pf->pdev->dev,
2050 "Uninitialized VF %d\n", vf_id);
2051 ret = -EINVAL;
2052 goto error_param;
2053 }
2054
2055 if (!is_valid_ether_addr(mac)) {
2056 dev_err(&pf->pdev->dev,
2057 "Invalid VF ethernet address\n");
2058 ret = -EINVAL;
2059 goto error_param;
2060 }
2061
2062 /* delete the temporary mac address */
e995163c
MW
2063 i40e_del_filter(vsi, vf->default_lan_addr.addr,
2064 vf->port_vlan_id ? vf->port_vlan_id : -1,
37cc0d2f 2065 true, false);
5c3c48ac 2066
29f71bb0
GR
2067 /* Delete all the filters for this VSI - we're going to kill it
2068 * anyway.
2069 */
2070 list_for_each_entry(f, &vsi->mac_filter_list, list)
2071 i40e_del_filter(vsi, f->macaddr, f->vlan, true, false);
5c3c48ac
JB
2072
2073 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
2074 /* program mac filter */
30e2561b 2075 if (i40e_sync_vsi_filters(vsi, false)) {
5c3c48ac
JB
2076 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
2077 ret = -EIO;
2078 goto error_param;
2079 }
9a173901 2080 ether_addr_copy(vf->default_lan_addr.addr, mac);
f657a6e1 2081 vf->pf_set_mac = true;
17413a80
GR
2082 /* Force the VF driver stop so it has to reload with new MAC address */
2083 i40e_vc_disable_vf(pf, vf);
5c3c48ac 2084 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB
2085
2086error_param:
2087 return ret;
2088}
2089
2090/**
2091 * i40e_ndo_set_vf_port_vlan
2092 * @netdev: network interface device structure
b40c82e6 2093 * @vf_id: VF identifier
5c3c48ac
JB
2094 * @vlan_id: mac address
2095 * @qos: priority setting
2096 *
b40c82e6 2097 * program VF vlan id and/or qos
5c3c48ac
JB
2098 **/
2099int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
2100 int vf_id, u16 vlan_id, u8 qos)
2101{
f7fc2f2e 2102 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB
2103 struct i40e_netdev_priv *np = netdev_priv(netdev);
2104 struct i40e_pf *pf = np->vsi->back;
2105 struct i40e_vsi *vsi;
2106 struct i40e_vf *vf;
2107 int ret = 0;
2108
2109 /* validate the request */
2110 if (vf_id >= pf->num_alloc_vfs) {
2111 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2112 ret = -EINVAL;
2113 goto error_pvid;
2114 }
2115
2116 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
2117 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
2118 ret = -EINVAL;
2119 goto error_pvid;
2120 }
2121
2122 vf = &(pf->vf[vf_id]);
fdf0e0bf 2123 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
2124 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2125 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
2126 ret = -EINVAL;
2127 goto error_pvid;
2128 }
2129
f7fc2f2e 2130 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW
2131 /* duplicate request, so just return success */
2132 goto error_pvid;
2133
ecbb44e8 2134 if (le16_to_cpu(vsi->info.pvid) == 0 && i40e_is_vsi_in_vlan(vsi)) {
99a4973c
GR
2135 dev_err(&pf->pdev->dev,
2136 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
2137 vf_id);
f9b4b627
GR
2138 /* Administrator Error - knock the VF offline until he does
2139 * the right thing by reconfiguring his network correctly
2140 * and then reloading the VF driver.
2141 */
2142 i40e_vc_disable_vf(pf, vf);
2143 }
99a4973c 2144
8d82a7c5
GR
2145 /* Check for condition where there was already a port VLAN ID
2146 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR
2147 * Additionally check for the condition where there was a port
2148 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR
2149 * Before deleting all the old VLAN filters we must add new ones
2150 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
2151 * MAC addresses deleted.
2152 */
1315f7c3 2153 if ((!(vlan_id || qos) ||
f7fc2f2e 2154 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
1315f7c3 2155 vsi->info.pvid)
8d82a7c5
GR
2156 ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY);
2157
5c3c48ac
JB
2158 if (vsi->info.pvid) {
2159 /* kill old VLAN */
2160 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
2161 VLAN_VID_MASK));
2162 if (ret) {
2163 dev_info(&vsi->back->pdev->dev,
2164 "remove VLAN failed, ret=%d, aq_err=%d\n",
2165 ret, pf->hw.aq.asq_last_status);
2166 }
2167 }
2168 if (vlan_id || qos)
f7fc2f2e 2169 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 2170 else
6c12fcbf 2171 i40e_vsi_remove_pvid(vsi);
5c3c48ac
JB
2172
2173 if (vlan_id) {
2174 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
2175 vlan_id, qos, vf_id);
2176
2177 /* add new VLAN filter */
2178 ret = i40e_vsi_add_vlan(vsi, vlan_id);
2179 if (ret) {
2180 dev_info(&vsi->back->pdev->dev,
2181 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
2182 vsi->back->hw.aq.asq_last_status);
2183 goto error_pvid;
2184 }
8d82a7c5
GR
2185 /* Kill non-vlan MAC filters - ignore error return since
2186 * there might not be any non-vlan MAC filters.
2187 */
2188 i40e_vsi_kill_vlan(vsi, I40E_VLAN_ANY);
5c3c48ac
JB
2189 }
2190
2191 if (ret) {
2192 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
2193 goto error_pvid;
2194 }
6c12fcbf
GR
2195 /* The Port VLAN needs to be saved across resets the same as the
2196 * default LAN MAC address.
2197 */
2198 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB
2199 ret = 0;
2200
2201error_pvid:
2202 return ret;
2203}
2204
84590fd9
MW
2205#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
2206#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
5c3c48ac
JB
2207/**
2208 * i40e_ndo_set_vf_bw
2209 * @netdev: network interface device structure
b40c82e6
JK
2210 * @vf_id: VF identifier
2211 * @tx_rate: Tx rate
5c3c48ac 2212 *
b40c82e6 2213 * configure VF Tx rate
5c3c48ac 2214 **/
ed616689
SC
2215int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
2216 int max_tx_rate)
5c3c48ac 2217{
6b192891
MW
2218 struct i40e_netdev_priv *np = netdev_priv(netdev);
2219 struct i40e_pf *pf = np->vsi->back;
2220 struct i40e_vsi *vsi;
2221 struct i40e_vf *vf;
2222 int speed = 0;
2223 int ret = 0;
2224
2225 /* validate the request */
2226 if (vf_id >= pf->num_alloc_vfs) {
2227 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
2228 ret = -EINVAL;
2229 goto error;
2230 }
2231
ed616689 2232 if (min_tx_rate) {
b40c82e6 2233 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC
2234 min_tx_rate, vf_id);
2235 return -EINVAL;
2236 }
2237
6b192891 2238 vf = &(pf->vf[vf_id]);
fdf0e0bf 2239 vsi = pf->vsi[vf->lan_vsi_idx];
6b192891
MW
2240 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2241 dev_err(&pf->pdev->dev, "Uninitialized VF %d.\n", vf_id);
2242 ret = -EINVAL;
2243 goto error;
2244 }
2245
2246 switch (pf->hw.phy.link_info.link_speed) {
2247 case I40E_LINK_SPEED_40GB:
2248 speed = 40000;
2249 break;
2250 case I40E_LINK_SPEED_10GB:
2251 speed = 10000;
2252 break;
2253 case I40E_LINK_SPEED_1GB:
2254 speed = 1000;
2255 break;
2256 default:
2257 break;
2258 }
2259
ed616689 2260 if (max_tx_rate > speed) {
b40c82e6 2261 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.",
ed616689 2262 max_tx_rate, vf->vf_id);
6b192891
MW
2263 ret = -EINVAL;
2264 goto error;
2265 }
2266
dac9b31a
MW
2267 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
2268 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
2269 max_tx_rate = 50;
2270 }
2271
6b192891 2272 /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
84590fd9
MW
2273 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
2274 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
2275 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6b192891 2276 if (ret) {
ed616689 2277 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
6b192891
MW
2278 ret);
2279 ret = -EIO;
2280 goto error;
2281 }
ed616689 2282 vf->tx_rate = max_tx_rate;
6b192891
MW
2283error:
2284 return ret;
5c3c48ac
JB
2285}
2286
2287/**
2288 * i40e_ndo_get_vf_config
2289 * @netdev: network interface device structure
b40c82e6
JK
2290 * @vf_id: VF identifier
2291 * @ivi: VF configuration structure
5c3c48ac 2292 *
b40c82e6 2293 * return VF configuration
5c3c48ac
JB
2294 **/
2295int i40e_ndo_get_vf_config(struct net_device *netdev,
2296 int vf_id, struct ifla_vf_info *ivi)
2297{
2298 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB
2299 struct i40e_vsi *vsi = np->vsi;
2300 struct i40e_pf *pf = vsi->back;
2301 struct i40e_vf *vf;
2302 int ret = 0;
2303
2304 /* validate the request */
2305 if (vf_id >= pf->num_alloc_vfs) {
2306 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2307 ret = -EINVAL;
2308 goto error_param;
2309 }
2310
2311 vf = &(pf->vf[vf_id]);
2312 /* first vsi is always the LAN vsi */
fdf0e0bf 2313 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB
2314 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2315 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
2316 ret = -EINVAL;
2317 goto error_param;
2318 }
2319
2320 ivi->vf = vf_id;
2321
6995b36c 2322 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 2323
ed616689
SC
2324 ivi->max_tx_rate = vf->tx_rate;
2325 ivi->min_tx_rate = 0;
5c3c48ac
JB
2326 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2327 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2328 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW
2329 if (vf->link_forced == false)
2330 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
2331 else if (vf->link_up == true)
2332 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
2333 else
2334 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 2335 ivi->spoofchk = vf->spoofchk;
5c3c48ac
JB
2336 ret = 0;
2337
2338error_param:
2339 return ret;
2340}
588aefa0
MW
2341
2342/**
2343 * i40e_ndo_set_vf_link_state
2344 * @netdev: network interface device structure
b40c82e6 2345 * @vf_id: VF identifier
588aefa0
MW
2346 * @link: required link state
2347 *
2348 * Set the link state of a specified VF, regardless of physical link state
2349 **/
2350int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
2351{
2352 struct i40e_netdev_priv *np = netdev_priv(netdev);
2353 struct i40e_pf *pf = np->vsi->back;
2354 struct i40e_virtchnl_pf_event pfe;
2355 struct i40e_hw *hw = &pf->hw;
2356 struct i40e_vf *vf;
f19efbb5 2357 int abs_vf_id;
588aefa0
MW
2358 int ret = 0;
2359
2360 /* validate the request */
2361 if (vf_id >= pf->num_alloc_vfs) {
2362 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2363 ret = -EINVAL;
2364 goto error_out;
2365 }
2366
2367 vf = &pf->vf[vf_id];
f19efbb5 2368 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0
MW
2369
2370 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
2371 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
2372
2373 switch (link) {
2374 case IFLA_VF_LINK_STATE_AUTO:
2375 vf->link_forced = false;
2376 pfe.event_data.link_event.link_status =
2377 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
2378 pfe.event_data.link_event.link_speed =
2379 pf->hw.phy.link_info.link_speed;
2380 break;
2381 case IFLA_VF_LINK_STATE_ENABLE:
2382 vf->link_forced = true;
2383 vf->link_up = true;
2384 pfe.event_data.link_event.link_status = true;
2385 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
2386 break;
2387 case IFLA_VF_LINK_STATE_DISABLE:
2388 vf->link_forced = true;
2389 vf->link_up = false;
2390 pfe.event_data.link_event.link_status = false;
2391 pfe.event_data.link_event.link_speed = 0;
2392 break;
2393 default:
2394 ret = -EINVAL;
2395 goto error_out;
2396 }
2397 /* Notify the VF of its new link state */
f19efbb5 2398 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
588aefa0
MW
2399 0, (u8 *)&pfe, sizeof(pfe), NULL);
2400
2401error_out:
2402 return ret;
2403}
c674d125
MW
2404
2405/**
2406 * i40e_ndo_set_vf_spoofchk
2407 * @netdev: network interface device structure
b40c82e6 2408 * @vf_id: VF identifier
c674d125
MW
2409 * @enable: flag to enable or disable feature
2410 *
2411 * Enable or disable VF spoof checking
2412 **/
e6d9004d 2413int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW
2414{
2415 struct i40e_netdev_priv *np = netdev_priv(netdev);
2416 struct i40e_vsi *vsi = np->vsi;
2417 struct i40e_pf *pf = vsi->back;
2418 struct i40e_vsi_context ctxt;
2419 struct i40e_hw *hw = &pf->hw;
2420 struct i40e_vf *vf;
2421 int ret = 0;
2422
2423 /* validate the request */
2424 if (vf_id >= pf->num_alloc_vfs) {
2425 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2426 ret = -EINVAL;
2427 goto out;
2428 }
2429
2430 vf = &(pf->vf[vf_id]);
2431
2432 if (enable == vf->spoofchk)
2433 goto out;
2434
2435 vf->spoofchk = enable;
2436 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 2437 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW
2438 ctxt.pf_num = pf->hw.pf_id;
2439 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
2440 if (enable)
30d71af5
GR
2441 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
2442 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW
2443 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
2444 if (ret) {
2445 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
2446 ret);
2447 ret = -EIO;
2448 }
2449out:
2450 return ret;
2451}
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