Commit | Line | Data |
---|---|---|
c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/cpumask.h> | |
35 | #include <linux/module.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/netdevice.h> | |
5a0e3ad6 | 38 | #include <linux/slab.h> |
c27a02cd YP |
39 | |
40 | #include <linux/mlx4/driver.h> | |
41 | #include <linux/mlx4/device.h> | |
42 | #include <linux/mlx4/cmd.h> | |
43 | ||
44 | #include "mlx4_en.h" | |
45 | ||
46 | MODULE_AUTHOR("Liran Liss, Yevgeny Petrilin"); | |
47 | MODULE_DESCRIPTION("Mellanox ConnectX HCA Ethernet driver"); | |
48 | MODULE_LICENSE("Dual BSD/GPL"); | |
49 | MODULE_VERSION(DRV_VERSION " ("DRV_RELDATE")"); | |
50 | ||
51 | static const char mlx4_en_version[] = | |
52 | DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v" | |
53 | DRV_VERSION " (" DRV_RELDATE ")\n"; | |
54 | ||
a2b28737 YP |
55 | #define MLX4_EN_PARM_INT(X, def_val, desc) \ |
56 | static unsigned int X = def_val;\ | |
57 | module_param(X , uint, 0444); \ | |
58 | MODULE_PARM_DESC(X, desc); | |
59 | ||
60 | ||
61 | /* | |
62 | * Device scope module parameters | |
63 | */ | |
64 | ||
0533943c YP |
65 | /* Enable RSS UDP traffic */ |
66 | MLX4_EN_PARM_INT(udp_rss, 1, | |
67 | "Enable RSS for incomming UDP traffic or disabled (0)"); | |
a2b28737 | 68 | |
a2b28737 YP |
69 | /* Priority pausing */ |
70 | MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." | |
71 | " Per priority bit mask"); | |
72 | MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." | |
73 | " Per priority bit mask"); | |
74 | ||
0a645e80 JP |
75 | int en_print(const char *level, const struct mlx4_en_priv *priv, |
76 | const char *format, ...) | |
77 | { | |
78 | va_list args; | |
79 | struct va_format vaf; | |
80 | int i; | |
81 | ||
82 | va_start(args, format); | |
83 | ||
84 | vaf.fmt = format; | |
85 | vaf.va = &args; | |
86 | if (priv->registered) | |
87 | i = printk("%s%s: %s: %pV", | |
88 | level, DRV_NAME, priv->dev->name, &vaf); | |
89 | else | |
90 | i = printk("%s%s: %s: Port %d: %pV", | |
91 | level, DRV_NAME, dev_name(&priv->mdev->pdev->dev), | |
92 | priv->port, &vaf); | |
93 | va_end(args); | |
94 | ||
95 | return i; | |
96 | } | |
97 | ||
a2b28737 YP |
98 | static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) |
99 | { | |
100 | struct mlx4_en_profile *params = &mdev->profile; | |
101 | int i; | |
102 | ||
0533943c | 103 | params->udp_rss = udp_rss; |
bc6a4744 AV |
104 | params->num_tx_rings_p_up = min_t(int, num_online_cpus(), |
105 | MLX4_EN_MAX_TX_RING_P_UP); | |
ccf86321 OG |
106 | if (params->udp_rss && !(mdev->dev->caps.flags |
107 | & MLX4_DEV_CAP_FLAG_UDP_RSS)) { | |
0533943c YP |
108 | mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); |
109 | params->udp_rss = 0; | |
110 | } | |
a2b28737 YP |
111 | for (i = 1; i <= MLX4_MAX_PORTS; i++) { |
112 | params->prof[i].rx_pause = 1; | |
113 | params->prof[i].rx_ppp = pfcrx; | |
114 | params->prof[i].tx_pause = 1; | |
115 | params->prof[i].tx_ppp = pfctx; | |
116 | params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE; | |
117 | params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE; | |
bc6a4744 AV |
118 | params->prof[i].tx_ring_num = params->num_tx_rings_p_up * |
119 | MLX4_EN_NUM_UP; | |
93d3e367 | 120 | params->prof[i].rss_rings = 0; |
a2b28737 YP |
121 | } |
122 | ||
123 | return 0; | |
124 | } | |
125 | ||
33c87f0a EC |
126 | static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port) |
127 | { | |
128 | struct mlx4_en_dev *endev = ctx; | |
129 | ||
130 | return endev->pndev[port]; | |
131 | } | |
132 | ||
c27a02cd YP |
133 | static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, |
134 | enum mlx4_dev_event event, int port) | |
135 | { | |
136 | struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; | |
137 | struct mlx4_en_priv *priv; | |
138 | ||
139 | if (!mdev->pndev[port]) | |
140 | return; | |
141 | ||
142 | priv = netdev_priv(mdev->pndev[port]); | |
143 | switch (event) { | |
144 | case MLX4_DEV_EVENT_PORT_UP: | |
145 | case MLX4_DEV_EVENT_PORT_DOWN: | |
146 | /* To prevent races, we poll the link state in a separate | |
147 | task rather than changing it here */ | |
148 | priv->link_state = event; | |
149 | queue_work(mdev->workqueue, &priv->linkstate_task); | |
150 | break; | |
151 | ||
152 | case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: | |
153 | mlx4_err(mdev, "Internal error detected, restarting device\n"); | |
154 | break; | |
155 | ||
156 | default: | |
157 | mlx4_warn(mdev, "Unhandled event: %d\n", event); | |
158 | } | |
159 | } | |
160 | ||
161 | static void mlx4_en_remove(struct mlx4_dev *dev, void *endev_ptr) | |
162 | { | |
163 | struct mlx4_en_dev *mdev = endev_ptr; | |
164 | int i; | |
165 | ||
166 | mutex_lock(&mdev->state_lock); | |
167 | mdev->device_up = false; | |
168 | mutex_unlock(&mdev->state_lock); | |
169 | ||
170 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | |
171 | if (mdev->pndev[i]) | |
172 | mlx4_en_destroy_netdev(mdev->pndev[i]); | |
173 | ||
174 | flush_workqueue(mdev->workqueue); | |
175 | destroy_workqueue(mdev->workqueue); | |
176 | mlx4_mr_free(dev, &mdev->mr); | |
7398af40 | 177 | iounmap(mdev->uar_map); |
c27a02cd YP |
178 | mlx4_uar_free(dev, &mdev->priv_uar); |
179 | mlx4_pd_free(dev, mdev->priv_pdn); | |
180 | kfree(mdev); | |
181 | } | |
182 | ||
183 | static void *mlx4_en_add(struct mlx4_dev *dev) | |
184 | { | |
c27a02cd YP |
185 | struct mlx4_en_dev *mdev; |
186 | int i; | |
187 | int err; | |
188 | ||
0a645e80 | 189 | printk_once(KERN_INFO "%s", mlx4_en_version); |
c27a02cd YP |
190 | |
191 | mdev = kzalloc(sizeof *mdev, GFP_KERNEL); | |
192 | if (!mdev) { | |
193 | dev_err(&dev->pdev->dev, "Device struct alloc failed, " | |
194 | "aborting.\n"); | |
195 | err = -ENOMEM; | |
196 | goto err_free_res; | |
197 | } | |
198 | ||
199 | if (mlx4_pd_alloc(dev, &mdev->priv_pdn)) | |
200 | goto err_free_dev; | |
201 | ||
202 | if (mlx4_uar_alloc(dev, &mdev->priv_uar)) | |
203 | goto err_pd; | |
204 | ||
4979d18f RD |
205 | mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT, |
206 | PAGE_SIZE); | |
c27a02cd YP |
207 | if (!mdev->uar_map) |
208 | goto err_uar; | |
209 | spin_lock_init(&mdev->uar_lock); | |
210 | ||
211 | mdev->dev = dev; | |
212 | mdev->dma_device = &(dev->pdev->dev); | |
213 | mdev->pdev = dev->pdev; | |
214 | mdev->device_up = false; | |
215 | ||
216 | mdev->LSO_support = !!(dev->caps.flags & (1 << 15)); | |
217 | if (!mdev->LSO_support) | |
218 | mlx4_warn(mdev, "LSO not supported, please upgrade to later " | |
219 | "FW version to enable LSO\n"); | |
220 | ||
221 | if (mlx4_mr_alloc(mdev->dev, mdev->priv_pdn, 0, ~0ull, | |
222 | MLX4_PERM_LOCAL_WRITE | MLX4_PERM_LOCAL_READ, | |
223 | 0, 0, &mdev->mr)) { | |
224 | mlx4_err(mdev, "Failed allocating memory region\n"); | |
7398af40 | 225 | goto err_map; |
c27a02cd YP |
226 | } |
227 | if (mlx4_mr_enable(mdev->dev, &mdev->mr)) { | |
228 | mlx4_err(mdev, "Failed enabling memory region\n"); | |
229 | goto err_mr; | |
230 | } | |
231 | ||
232 | /* Build device profile according to supplied module parameters */ | |
233 | err = mlx4_en_get_profile(mdev); | |
234 | if (err) { | |
235 | mlx4_err(mdev, "Bad module parameters, aborting.\n"); | |
236 | goto err_mr; | |
237 | } | |
238 | ||
25985edc | 239 | /* Configure which ports to start according to module parameters */ |
c27a02cd YP |
240 | mdev->port_cnt = 0; |
241 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | |
242 | mdev->port_cnt++; | |
243 | ||
c27a02cd | 244 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { |
1fb9876e YP |
245 | if (!dev->caps.comp_pool) { |
246 | mdev->profile.prof[i].rx_ring_num = | |
247 | rounddown_pow_of_two(max_t(int, MIN_RX_RINGS, | |
248 | min_t(int, | |
249 | dev->caps.num_comp_vectors, | |
250 | MAX_RX_RINGS))); | |
251 | } else { | |
252 | mdev->profile.prof[i].rx_ring_num = rounddown_pow_of_two( | |
253 | min_t(int, dev->caps.comp_pool/ | |
254 | dev->caps.num_ports - 1 , MAX_MSIX_P_PORT - 1)); | |
255 | } | |
c27a02cd YP |
256 | } |
257 | ||
258 | /* Create our own workqueue for reset/multicast tasks | |
259 | * Note: we cannot use the shared workqueue because of deadlocks caused | |
260 | * by the rtnl lock */ | |
261 | mdev->workqueue = create_singlethread_workqueue("mlx4_en"); | |
262 | if (!mdev->workqueue) { | |
263 | err = -ENOMEM; | |
1a44cc37 | 264 | goto err_mr; |
c27a02cd YP |
265 | } |
266 | ||
267 | /* At this stage all non-port specific tasks are complete: | |
268 | * mark the card state as up */ | |
269 | mutex_init(&mdev->state_lock); | |
270 | mdev->device_up = true; | |
271 | ||
272 | /* Setup ports */ | |
273 | ||
274 | /* Create a netdev for each port */ | |
275 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { | |
276 | mlx4_info(mdev, "Activating port:%d\n", i); | |
3c2fa83f | 277 | if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i])) |
c27a02cd | 278 | mdev->pndev[i] = NULL; |
c27a02cd YP |
279 | } |
280 | return mdev; | |
281 | ||
c27a02cd YP |
282 | err_mr: |
283 | mlx4_mr_free(dev, &mdev->mr); | |
7398af40 AG |
284 | err_map: |
285 | if (!mdev->uar_map) | |
286 | iounmap(mdev->uar_map); | |
c27a02cd YP |
287 | err_uar: |
288 | mlx4_uar_free(dev, &mdev->priv_uar); | |
289 | err_pd: | |
290 | mlx4_pd_free(dev, mdev->priv_pdn); | |
291 | err_free_dev: | |
292 | kfree(mdev); | |
293 | err_free_res: | |
294 | return NULL; | |
295 | } | |
296 | ||
297 | static struct mlx4_interface mlx4_en_interface = { | |
33c87f0a EC |
298 | .add = mlx4_en_add, |
299 | .remove = mlx4_en_remove, | |
300 | .event = mlx4_en_event, | |
301 | .get_dev = mlx4_en_get_netdev, | |
0345584e | 302 | .protocol = MLX4_PROT_ETH, |
c27a02cd YP |
303 | }; |
304 | ||
305 | static int __init mlx4_en_init(void) | |
306 | { | |
307 | return mlx4_register_interface(&mlx4_en_interface); | |
308 | } | |
309 | ||
310 | static void __exit mlx4_en_cleanup(void) | |
311 | { | |
312 | mlx4_unregister_interface(&mlx4_en_interface); | |
313 | } | |
314 | ||
315 | module_init(mlx4_en_init); | |
316 | module_exit(mlx4_en_cleanup); | |
317 |