[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / eswitch.h

/*
 * Copyright (c) 2015, Mellanox Technologies, Ltd.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef __MLX5_ESWITCH_H__
#define __MLX5_ESWITCH_H__

#include <linux/if_ether.h>
#include <linux/if_link.h>
#include <linux/mlx5/device.h>

#define MLX5_MAX_UC_PER_VPORT(dev) \
	(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))

#define MLX5_MAX_MC_PER_VPORT(dev) \
	(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))

#define MLX5_L2_ADDR_HASH_SIZE (BIT(BITS_PER_BYTE))
#define MLX5_L2_ADDR_HASH(addr) (addr[5])

/* L2 -mac address based- hash helpers */
struct l2addr_node {
	struct hlist_node hlist;
	u8                addr[ETH_ALEN];
};

#define for_each_l2hash_node(hn, tmp, hash, i) \
	for (i = 0; i < MLX5_L2_ADDR_HASH_SIZE; i++) \
		hlist_for_each_entry_safe(hn, tmp, &hash[i], hlist)

#define l2addr_hash_find(hash, mac, type) ({                \
	int ix = MLX5_L2_ADDR_HASH(mac);                    \
	bool found = false;                                 \
	type *ptr = NULL;                                   \
							    \
	hlist_for_each_entry(ptr, &hash[ix], node.hlist)    \
		if (ether_addr_equal(ptr->node.addr, mac)) {\
			found = true;                       \
			break;                              \
		}                                           \
	if (!found)                                         \
		ptr = NULL;                                 \
	ptr;                                                \
})

#define l2addr_hash_add(hash, mac, type, gfp) ({            \
	int ix = MLX5_L2_ADDR_HASH(mac);                    \
	type *ptr = NULL;                                   \
							    \
	ptr = kzalloc(sizeof(type), gfp);                   \
	if (ptr) {                                          \
		ether_addr_copy(ptr->node.addr, mac);       \
		hlist_add_head(&ptr->node.hlist, &hash[ix]);\
	}                                                   \
	ptr;                                                \
})

#define l2addr_hash_del(ptr) ({                             \
	hlist_del(&ptr->node.hlist);                        \
	kfree(ptr);                                         \
})

struct vport_ingress {
	struct mlx5_flow_table *acl;
	struct mlx5_flow_group *allow_untagged_spoofchk_grp;
	struct mlx5_flow_group *allow_spoofchk_only_grp;
	struct mlx5_flow_group *allow_untagged_only_grp;
	struct mlx5_flow_group *drop_grp;
	struct mlx5_flow_rule  *allow_rule;
	struct mlx5_flow_rule  *drop_rule;
};

struct vport_egress {
	struct mlx5_flow_table *acl;
	struct mlx5_flow_group *allowed_vlans_grp;
	struct mlx5_flow_group *drop_grp;
	struct mlx5_flow_rule  *allowed_vlan;
	struct mlx5_flow_rule  *drop_rule;
};

struct mlx5_vport {
	struct mlx5_core_dev    *dev;
	int                     vport;
	struct hlist_head       uc_list[MLX5_L2_ADDR_HASH_SIZE];
	struct hlist_head       mc_list[MLX5_L2_ADDR_HASH_SIZE];
	struct mlx5_flow_rule   *promisc_rule;
	struct mlx5_flow_rule   *allmulti_rule;
	struct work_struct      vport_change_handler;

	struct vport_ingress    ingress;
	struct vport_egress     egress;

	u16                     vlan;
	u8                      qos;
	bool                    spoofchk;
	bool                    trusted;
	bool                    enabled;
	u16                     enabled_events;
};

struct mlx5_l2_table {
	struct hlist_head l2_hash[MLX5_L2_ADDR_HASH_SIZE];
	u32                  size;
	unsigned long        *bitmap;
};

struct mlx5_eswitch_fdb {
	void *fdb;
	union {
		struct legacy_fdb {
			struct mlx5_flow_group *addr_grp;
			struct mlx5_flow_group *allmulti_grp;
			struct mlx5_flow_group *promisc_grp;
		} legacy;

		struct offloads_fdb {
			struct mlx5_flow_group *send_to_vport_grp;
			struct mlx5_flow_group *miss_grp;
			struct mlx5_flow_rule  *miss_rule;
		} offloads;
	};
};

enum {
	SRIOV_NONE,
	SRIOV_LEGACY,
	SRIOV_OFFLOADS
};

struct mlx5_esw_offload {
	struct mlx5_flow_table *ft_offloads;
	struct mlx5_flow_group *vport_rx_group;
};

struct mlx5_eswitch {
	struct mlx5_core_dev    *dev;
	struct mlx5_l2_table    l2_table;
	struct mlx5_eswitch_fdb fdb_table;
	struct hlist_head       mc_table[MLX5_L2_ADDR_HASH_SIZE];
	struct workqueue_struct *work_queue;
	struct mlx5_vport       *vports;
	int                     total_vports;
	int                     enabled_vports;
	/* Synchronize between vport change events
	 * and async SRIOV admin state changes
	 */
	struct mutex            state_lock;
	struct esw_mc_addr      *mc_promisc;
	struct mlx5_esw_offload offloads;
	int                     mode;
};

/* E-Switch API */
int mlx5_eswitch_init(struct mlx5_core_dev *dev);
void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe);
int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode);
void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
			       int vport, u8 mac[ETH_ALEN]);
int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
				 int vport, int link_state);
int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
				int vport, u16 vlan, u8 qos);
int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
				    int vport, bool spoofchk);
int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
				 int vport_num, bool setting);
int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
				  int vport, struct ifla_vf_info *ivi);
int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
				 int vport,
				 struct ifla_vf_stats *vf_stats);
struct mlx5_flow_rule *
mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw, int vport, u32 sqn);

struct mlx5_flow_rule *
mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn);

#define MLX5_DEBUG_ESWITCH_MASK BIT(3)

#define esw_info(dev, format, ...)				\
	pr_info("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)

#define esw_warn(dev, format, ...)				\
	pr_warn("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)

#define esw_debug(dev, format, ...)				\
	mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
#endif /* __MLX5_ESWITCH_H__ */
Commit	Line	Data
073bb189 SM	1	/*
	2	* Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#ifndef __MLX5_ESWITCH_H__
	34	#define __MLX5_ESWITCH_H__
	35
77256579 SM	36	#include <linux/if_ether.h>
77256579 SM	37	#include <linux/if_link.h>
073bb189 SM	38	#include <linux/mlx5/device.h>
	39
	40	#define MLX5_MAX_UC_PER_VPORT(dev) \
	41	(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
	42
	43	#define MLX5_MAX_MC_PER_VPORT(dev) \
	44	(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
	45
	46	#define MLX5_L2_ADDR_HASH_SIZE (BIT(BITS_PER_BYTE))
	47	#define MLX5_L2_ADDR_HASH(addr) (addr[5])
	48
	49	/* L2 -mac address based- hash helpers */
	50	struct l2addr_node {
	51	struct hlist_node hlist;
	52	u8 addr[ETH_ALEN];
	53	};
	54
	55	#define for_each_l2hash_node(hn, tmp, hash, i) \
	56	for (i = 0; i < MLX5_L2_ADDR_HASH_SIZE; i++) \
	57	hlist_for_each_entry_safe(hn, tmp, &hash[i], hlist)
	58
	59	#define l2addr_hash_find(hash, mac, type) ({ \
	60	int ix = MLX5_L2_ADDR_HASH(mac); \
	61	bool found = false; \
	62	type *ptr = NULL; \
	63	\
	64	hlist_for_each_entry(ptr, &hash[ix], node.hlist) \
	65	if (ether_addr_equal(ptr->node.addr, mac)) {\
	66	found = true; \
	67	break; \
	68	} \
	69	if (!found) \
	70	ptr = NULL; \
	71	ptr; \
	72	})
	73
	74	#define l2addr_hash_add(hash, mac, type, gfp) ({ \
	75	int ix = MLX5_L2_ADDR_HASH(mac); \
	76	type *ptr = NULL; \
	77	\
	78	ptr = kzalloc(sizeof(type), gfp); \
	79	if (ptr) { \
	80	ether_addr_copy(ptr->node.addr, mac); \
	81	hlist_add_head(&ptr->node.hlist, &hash[ix]);\
	82	} \
	83	ptr; \
	84	})
	85
	86	#define l2addr_hash_del(ptr) ({ \
	87	hlist_del(&ptr->node.hlist); \
	88	kfree(ptr); \
	89	})
	90
5742df0f MHY	91	struct vport_ingress {
	92	struct mlx5_flow_table *acl;
	93	struct mlx5_flow_group *allow_untagged_spoofchk_grp;
	94	struct mlx5_flow_group *allow_spoofchk_only_grp;
	95	struct mlx5_flow_group *allow_untagged_only_grp;
	96	struct mlx5_flow_group *drop_grp;
dfcb1ed3 MHY	97	struct mlx5_flow_rule *allow_rule;
dfcb1ed3 MHY	98	struct mlx5_flow_rule *drop_rule;
5742df0f MHY	99	};
	100
	101	struct vport_egress {
	102	struct mlx5_flow_table *acl;
	103	struct mlx5_flow_group *allowed_vlans_grp;
	104	struct mlx5_flow_group *drop_grp;
dfcb1ed3 MHY	105	struct mlx5_flow_rule *allowed_vlan;
dfcb1ed3 MHY	106	struct mlx5_flow_rule *drop_rule;
5742df0f MHY	107	};
5742df0f MHY	108
073bb189 SM	109	struct mlx5_vport {
	110	struct mlx5_core_dev *dev;
	111	int vport;
	112	struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
81848731	113	struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
a35f71f2 MHY	114	struct mlx5_flow_rule *promisc_rule;
a35f71f2 MHY	115	struct mlx5_flow_rule *allmulti_rule;
073bb189 SM	116	struct work_struct vport_change_handler;
073bb189 SM	117
5742df0f MHY	118	struct vport_ingress ingress;
	119	struct vport_egress egress;
	120
dfcb1ed3 MHY	121	u16 vlan;
dfcb1ed3 MHY	122	u8 qos;
f942380c	123	bool spoofchk;
a35f71f2	124	bool trusted;
073bb189	125	bool enabled;
81848731	126	u16 enabled_events;
073bb189 SM	127	};
	128
	129	struct mlx5_l2_table {
	130	struct hlist_head l2_hash[MLX5_L2_ADDR_HASH_SIZE];
	131	u32 size;
	132	unsigned long *bitmap;
	133	};
	134
81848731 SM	135	struct mlx5_eswitch_fdb {
81848731 SM	136	void *fdb;
6ab36e35 OG	137	union {
	138	struct legacy_fdb {
	139	struct mlx5_flow_group *addr_grp;
	140	struct mlx5_flow_group *allmulti_grp;
	141	struct mlx5_flow_group *promisc_grp;
	142	} legacy;
69697b6e OG	143
	144	struct offloads_fdb {
	145	struct mlx5_flow_group *send_to_vport_grp;
	146	struct mlx5_flow_group *miss_grp;
3aa33572	147	struct mlx5_flow_rule *miss_rule;
69697b6e	148	} offloads;
6ab36e35 OG	149	};
	150	};
	151
	152	enum {
	153	SRIOV_NONE,
	154	SRIOV_LEGACY,
	155	SRIOV_OFFLOADS
81848731 SM	156	};
81848731 SM	157
c116c6ee OG	158	struct mlx5_esw_offload {
c116c6ee OG	159	struct mlx5_flow_table *ft_offloads;
fed9ce22	160	struct mlx5_flow_group *vport_rx_group;
c116c6ee OG	161	};
c116c6ee OG	162
073bb189 SM	163	struct mlx5_eswitch {
	164	struct mlx5_core_dev *dev;
	165	struct mlx5_l2_table l2_table;
81848731 SM	166	struct mlx5_eswitch_fdb fdb_table;
81848731 SM	167	struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
073bb189 SM	168	struct workqueue_struct *work_queue;
	169	struct mlx5_vport *vports;
	170	int total_vports;
81848731	171	int enabled_vports;
dfcb1ed3 MHY	172	/* Synchronize between vport change events
	173	* and async SRIOV admin state changes
	174	*/
	175	struct mutex state_lock;
a35f71f2	176	struct esw_mc_addr *mc_promisc;
c116c6ee	177	struct mlx5_esw_offload offloads;
6ab36e35	178	int mode;
073bb189 SM	179	};
	180
	181	/* E-Switch API */
	182	int mlx5_eswitch_init(struct mlx5_core_dev *dev);
	183	void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
	184	void mlx5_eswitch_vport_event(struct mlx5_eswitch esw, struct mlx5_eqe eqe);
6ab36e35	185	int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode);
81848731	186	void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
77256579 SM	187	int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
	188	int vport, u8 mac[ETH_ALEN]);
	189	int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
	190	int vport, int link_state);
9e7ea352 SM	191	int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
9e7ea352 SM	192	int vport, u16 vlan, u8 qos);
f942380c MHY	193	int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
f942380c MHY	194	int vport, bool spoofchk);
1edc57e2 MHY	195	int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
1edc57e2 MHY	196	int vport_num, bool setting);
77256579 SM	197	int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
77256579 SM	198	int vport, struct ifla_vf_info *ivi);
3b751a2a SM	199	int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
	200	int vport,
	201	struct ifla_vf_stats *vf_stats);
ab22be9b OG	202	struct mlx5_flow_rule *
ab22be9b OG	203	mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw, int vport, u32 sqn);
073bb189	204
fed9ce22 OG	205	struct mlx5_flow_rule *
	206	mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn);
	207
69697b6e OG	208	#define MLX5_DEBUG_ESWITCH_MASK BIT(3)
	209
	210	#define esw_info(dev, format, ...) \
	211	pr_info("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)
	212
	213	#define esw_warn(dev, format, ...) \
	214	pr_warn("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)
	215
	216	#define esw_debug(dev, format, ...) \
	217	mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
073bb189	218	#endif /* __MLX5_ESWITCH_H__ */