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56ade8fe JP |
1 | /* |
2 | * drivers/net/ethernet/mellanox/mlxsw/spectrum.c | |
3 | * Copyright (c) 2015 Mellanox Technologies. All rights reserved. | |
4 | * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> | |
5 | * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> | |
6 | * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> | |
7 | * | |
8 | * Redistribution and use in source and binary forms, with or without | |
9 | * modification, are permitted provided that the following conditions are met: | |
10 | * | |
11 | * 1. Redistributions of source code must retain the above copyright | |
12 | * notice, this list of conditions and the following disclaimer. | |
13 | * 2. Redistributions in binary form must reproduce the above copyright | |
14 | * notice, this list of conditions and the following disclaimer in the | |
15 | * documentation and/or other materials provided with the distribution. | |
16 | * 3. Neither the names of the copyright holders nor the names of its | |
17 | * contributors may be used to endorse or promote products derived from | |
18 | * this software without specific prior written permission. | |
19 | * | |
20 | * Alternatively, this software may be distributed under the terms of the | |
21 | * GNU General Public License ("GPL") version 2 as published by the Free | |
22 | * Software Foundation. | |
23 | * | |
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | |
28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
34 | * POSSIBILITY OF SUCH DAMAGE. | |
35 | */ | |
36 | ||
37 | #include <linux/kernel.h> | |
38 | #include <linux/module.h> | |
39 | #include <linux/types.h> | |
40 | #include <linux/netdevice.h> | |
41 | #include <linux/etherdevice.h> | |
42 | #include <linux/ethtool.h> | |
43 | #include <linux/slab.h> | |
44 | #include <linux/device.h> | |
45 | #include <linux/skbuff.h> | |
46 | #include <linux/if_vlan.h> | |
47 | #include <linux/if_bridge.h> | |
48 | #include <linux/workqueue.h> | |
49 | #include <linux/jiffies.h> | |
50 | #include <linux/bitops.h> | |
7f71eb46 | 51 | #include <linux/list.h> |
80bedf1a | 52 | #include <linux/notifier.h> |
90183b98 | 53 | #include <linux/dcbnl.h> |
99724c18 | 54 | #include <linux/inetdevice.h> |
56ade8fe JP |
55 | #include <net/switchdev.h> |
56 | #include <generated/utsrelease.h> | |
763b4b70 YG |
57 | #include <net/pkt_cls.h> |
58 | #include <net/tc_act/tc_mirred.h> | |
e7322638 | 59 | #include <net/netevent.h> |
56ade8fe JP |
60 | |
61 | #include "spectrum.h" | |
62 | #include "core.h" | |
63 | #include "reg.h" | |
64 | #include "port.h" | |
65 | #include "trap.h" | |
66 | #include "txheader.h" | |
67 | ||
68 | static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum"; | |
69 | static const char mlxsw_sp_driver_version[] = "1.0"; | |
70 | ||
71 | /* tx_hdr_version | |
72 | * Tx header version. | |
73 | * Must be set to 1. | |
74 | */ | |
75 | MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4); | |
76 | ||
77 | /* tx_hdr_ctl | |
78 | * Packet control type. | |
79 | * 0 - Ethernet control (e.g. EMADs, LACP) | |
80 | * 1 - Ethernet data | |
81 | */ | |
82 | MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2); | |
83 | ||
84 | /* tx_hdr_proto | |
85 | * Packet protocol type. Must be set to 1 (Ethernet). | |
86 | */ | |
87 | MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3); | |
88 | ||
89 | /* tx_hdr_rx_is_router | |
90 | * Packet is sent from the router. Valid for data packets only. | |
91 | */ | |
92 | MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1); | |
93 | ||
94 | /* tx_hdr_fid_valid | |
95 | * Indicates if the 'fid' field is valid and should be used for | |
96 | * forwarding lookup. Valid for data packets only. | |
97 | */ | |
98 | MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1); | |
99 | ||
100 | /* tx_hdr_swid | |
101 | * Switch partition ID. Must be set to 0. | |
102 | */ | |
103 | MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3); | |
104 | ||
105 | /* tx_hdr_control_tclass | |
106 | * Indicates if the packet should use the control TClass and not one | |
107 | * of the data TClasses. | |
108 | */ | |
109 | MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1); | |
110 | ||
111 | /* tx_hdr_etclass | |
112 | * Egress TClass to be used on the egress device on the egress port. | |
113 | */ | |
114 | MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4); | |
115 | ||
116 | /* tx_hdr_port_mid | |
117 | * Destination local port for unicast packets. | |
118 | * Destination multicast ID for multicast packets. | |
119 | * | |
120 | * Control packets are directed to a specific egress port, while data | |
121 | * packets are transmitted through the CPU port (0) into the switch partition, | |
122 | * where forwarding rules are applied. | |
123 | */ | |
124 | MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16); | |
125 | ||
126 | /* tx_hdr_fid | |
127 | * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is | |
128 | * set, otherwise calculated based on the packet's VID using VID to FID mapping. | |
129 | * Valid for data packets only. | |
130 | */ | |
131 | MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16); | |
132 | ||
133 | /* tx_hdr_type | |
134 | * 0 - Data packets | |
135 | * 6 - Control packets | |
136 | */ | |
137 | MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4); | |
138 | ||
763b4b70 YG |
139 | static bool mlxsw_sp_port_dev_check(const struct net_device *dev); |
140 | ||
56ade8fe JP |
141 | static void mlxsw_sp_txhdr_construct(struct sk_buff *skb, |
142 | const struct mlxsw_tx_info *tx_info) | |
143 | { | |
144 | char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN); | |
145 | ||
146 | memset(txhdr, 0, MLXSW_TXHDR_LEN); | |
147 | ||
148 | mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1); | |
149 | mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL); | |
150 | mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH); | |
151 | mlxsw_tx_hdr_swid_set(txhdr, 0); | |
152 | mlxsw_tx_hdr_control_tclass_set(txhdr, 1); | |
153 | mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port); | |
154 | mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL); | |
155 | } | |
156 | ||
157 | static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp) | |
158 | { | |
159 | char spad_pl[MLXSW_REG_SPAD_LEN]; | |
160 | int err; | |
161 | ||
162 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl); | |
163 | if (err) | |
164 | return err; | |
165 | mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac); | |
166 | return 0; | |
167 | } | |
168 | ||
763b4b70 YG |
169 | static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp) |
170 | { | |
171 | struct mlxsw_resources *resources; | |
172 | int i; | |
173 | ||
174 | resources = mlxsw_core_resources_get(mlxsw_sp->core); | |
175 | if (!resources->max_span_valid) | |
176 | return -EIO; | |
177 | ||
178 | mlxsw_sp->span.entries_count = resources->max_span; | |
179 | mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count, | |
180 | sizeof(struct mlxsw_sp_span_entry), | |
181 | GFP_KERNEL); | |
182 | if (!mlxsw_sp->span.entries) | |
183 | return -ENOMEM; | |
184 | ||
185 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) | |
186 | INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list); | |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
191 | static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp) | |
192 | { | |
193 | int i; | |
194 | ||
195 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { | |
196 | struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; | |
197 | ||
198 | WARN_ON_ONCE(!list_empty(&curr->bound_ports_list)); | |
199 | } | |
200 | kfree(mlxsw_sp->span.entries); | |
201 | } | |
202 | ||
203 | static struct mlxsw_sp_span_entry * | |
204 | mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port) | |
205 | { | |
206 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; | |
207 | struct mlxsw_sp_span_entry *span_entry; | |
208 | char mpat_pl[MLXSW_REG_MPAT_LEN]; | |
209 | u8 local_port = port->local_port; | |
210 | int index; | |
211 | int i; | |
212 | int err; | |
213 | ||
214 | /* find a free entry to use */ | |
215 | index = -1; | |
216 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { | |
217 | if (!mlxsw_sp->span.entries[i].used) { | |
218 | index = i; | |
219 | span_entry = &mlxsw_sp->span.entries[i]; | |
220 | break; | |
221 | } | |
222 | } | |
223 | if (index < 0) | |
224 | return NULL; | |
225 | ||
226 | /* create a new port analayzer entry for local_port */ | |
227 | mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true); | |
228 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); | |
229 | if (err) | |
230 | return NULL; | |
231 | ||
232 | span_entry->used = true; | |
233 | span_entry->id = index; | |
234 | span_entry->ref_count = 0; | |
235 | span_entry->local_port = local_port; | |
236 | return span_entry; | |
237 | } | |
238 | ||
239 | static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp, | |
240 | struct mlxsw_sp_span_entry *span_entry) | |
241 | { | |
242 | u8 local_port = span_entry->local_port; | |
243 | char mpat_pl[MLXSW_REG_MPAT_LEN]; | |
244 | int pa_id = span_entry->id; | |
245 | ||
246 | mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false); | |
247 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); | |
248 | span_entry->used = false; | |
249 | } | |
250 | ||
251 | struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port) | |
252 | { | |
253 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; | |
254 | int i; | |
255 | ||
256 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { | |
257 | struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; | |
258 | ||
259 | if (curr->used && curr->local_port == port->local_port) | |
260 | return curr; | |
261 | } | |
262 | return NULL; | |
263 | } | |
264 | ||
265 | struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port) | |
266 | { | |
267 | struct mlxsw_sp_span_entry *span_entry; | |
268 | ||
269 | span_entry = mlxsw_sp_span_entry_find(port); | |
270 | if (span_entry) { | |
271 | span_entry->ref_count++; | |
272 | return span_entry; | |
273 | } | |
274 | ||
275 | return mlxsw_sp_span_entry_create(port); | |
276 | } | |
277 | ||
278 | static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp, | |
279 | struct mlxsw_sp_span_entry *span_entry) | |
280 | { | |
281 | if (--span_entry->ref_count == 0) | |
282 | mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry); | |
283 | return 0; | |
284 | } | |
285 | ||
286 | static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port) | |
287 | { | |
288 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; | |
289 | struct mlxsw_sp_span_inspected_port *p; | |
290 | int i; | |
291 | ||
292 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { | |
293 | struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; | |
294 | ||
295 | list_for_each_entry(p, &curr->bound_ports_list, list) | |
296 | if (p->local_port == port->local_port && | |
297 | p->type == MLXSW_SP_SPAN_EGRESS) | |
298 | return true; | |
299 | } | |
300 | ||
301 | return false; | |
302 | } | |
303 | ||
304 | static int mlxsw_sp_span_mtu_to_buffsize(int mtu) | |
305 | { | |
306 | return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1; | |
307 | } | |
308 | ||
309 | static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu) | |
310 | { | |
311 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; | |
312 | char sbib_pl[MLXSW_REG_SBIB_LEN]; | |
313 | int err; | |
314 | ||
315 | /* If port is egress mirrored, the shared buffer size should be | |
316 | * updated according to the mtu value | |
317 | */ | |
318 | if (mlxsw_sp_span_is_egress_mirror(port)) { | |
319 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, | |
320 | mlxsw_sp_span_mtu_to_buffsize(mtu)); | |
321 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); | |
322 | if (err) { | |
323 | netdev_err(port->dev, "Could not update shared buffer for mirroring\n"); | |
324 | return err; | |
325 | } | |
326 | } | |
327 | ||
328 | return 0; | |
329 | } | |
330 | ||
331 | static struct mlxsw_sp_span_inspected_port * | |
332 | mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port, | |
333 | struct mlxsw_sp_span_entry *span_entry) | |
334 | { | |
335 | struct mlxsw_sp_span_inspected_port *p; | |
336 | ||
337 | list_for_each_entry(p, &span_entry->bound_ports_list, list) | |
338 | if (port->local_port == p->local_port) | |
339 | return p; | |
340 | return NULL; | |
341 | } | |
342 | ||
343 | static int | |
344 | mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port, | |
345 | struct mlxsw_sp_span_entry *span_entry, | |
346 | enum mlxsw_sp_span_type type) | |
347 | { | |
348 | struct mlxsw_sp_span_inspected_port *inspected_port; | |
349 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; | |
350 | char mpar_pl[MLXSW_REG_MPAR_LEN]; | |
351 | char sbib_pl[MLXSW_REG_SBIB_LEN]; | |
352 | int pa_id = span_entry->id; | |
353 | int err; | |
354 | ||
355 | /* if it is an egress SPAN, bind a shared buffer to it */ | |
356 | if (type == MLXSW_SP_SPAN_EGRESS) { | |
357 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, | |
358 | mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu)); | |
359 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); | |
360 | if (err) { | |
361 | netdev_err(port->dev, "Could not create shared buffer for mirroring\n"); | |
362 | return err; | |
363 | } | |
364 | } | |
365 | ||
366 | /* bind the port to the SPAN entry */ | |
367 | mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id); | |
368 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); | |
369 | if (err) | |
370 | goto err_mpar_reg_write; | |
371 | ||
372 | inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL); | |
373 | if (!inspected_port) { | |
374 | err = -ENOMEM; | |
375 | goto err_inspected_port_alloc; | |
376 | } | |
377 | inspected_port->local_port = port->local_port; | |
378 | inspected_port->type = type; | |
379 | list_add_tail(&inspected_port->list, &span_entry->bound_ports_list); | |
380 | ||
381 | return 0; | |
382 | ||
383 | err_mpar_reg_write: | |
384 | err_inspected_port_alloc: | |
385 | if (type == MLXSW_SP_SPAN_EGRESS) { | |
386 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0); | |
387 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); | |
388 | } | |
389 | return err; | |
390 | } | |
391 | ||
392 | static void | |
393 | mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port, | |
394 | struct mlxsw_sp_span_entry *span_entry, | |
395 | enum mlxsw_sp_span_type type) | |
396 | { | |
397 | struct mlxsw_sp_span_inspected_port *inspected_port; | |
398 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; | |
399 | char mpar_pl[MLXSW_REG_MPAR_LEN]; | |
400 | char sbib_pl[MLXSW_REG_SBIB_LEN]; | |
401 | int pa_id = span_entry->id; | |
402 | ||
403 | inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry); | |
404 | if (!inspected_port) | |
405 | return; | |
406 | ||
407 | /* remove the inspected port */ | |
408 | mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id); | |
409 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); | |
410 | ||
411 | /* remove the SBIB buffer if it was egress SPAN */ | |
412 | if (type == MLXSW_SP_SPAN_EGRESS) { | |
413 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0); | |
414 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); | |
415 | } | |
416 | ||
417 | mlxsw_sp_span_entry_put(mlxsw_sp, span_entry); | |
418 | ||
419 | list_del(&inspected_port->list); | |
420 | kfree(inspected_port); | |
421 | } | |
422 | ||
423 | static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from, | |
424 | struct mlxsw_sp_port *to, | |
425 | enum mlxsw_sp_span_type type) | |
426 | { | |
427 | struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp; | |
428 | struct mlxsw_sp_span_entry *span_entry; | |
429 | int err; | |
430 | ||
431 | span_entry = mlxsw_sp_span_entry_get(to); | |
432 | if (!span_entry) | |
433 | return -ENOENT; | |
434 | ||
435 | netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n", | |
436 | span_entry->id); | |
437 | ||
438 | err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type); | |
439 | if (err) | |
440 | goto err_port_bind; | |
441 | ||
442 | return 0; | |
443 | ||
444 | err_port_bind: | |
445 | mlxsw_sp_span_entry_put(mlxsw_sp, span_entry); | |
446 | return err; | |
447 | } | |
448 | ||
449 | static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from, | |
450 | struct mlxsw_sp_port *to, | |
451 | enum mlxsw_sp_span_type type) | |
452 | { | |
453 | struct mlxsw_sp_span_entry *span_entry; | |
454 | ||
455 | span_entry = mlxsw_sp_span_entry_find(to); | |
456 | if (!span_entry) { | |
457 | netdev_err(from->dev, "no span entry found\n"); | |
458 | return; | |
459 | } | |
460 | ||
461 | netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n", | |
462 | span_entry->id); | |
463 | mlxsw_sp_span_inspected_port_unbind(from, span_entry, type); | |
464 | } | |
465 | ||
56ade8fe JP |
466 | static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port, |
467 | bool is_up) | |
468 | { | |
469 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
470 | char paos_pl[MLXSW_REG_PAOS_LEN]; | |
471 | ||
472 | mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, | |
473 | is_up ? MLXSW_PORT_ADMIN_STATUS_UP : | |
474 | MLXSW_PORT_ADMIN_STATUS_DOWN); | |
475 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); | |
476 | } | |
477 | ||
56ade8fe JP |
478 | static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port, |
479 | unsigned char *addr) | |
480 | { | |
481 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
482 | char ppad_pl[MLXSW_REG_PPAD_LEN]; | |
483 | ||
484 | mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port); | |
485 | mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr); | |
486 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); | |
487 | } | |
488 | ||
489 | static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port) | |
490 | { | |
491 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
492 | unsigned char *addr = mlxsw_sp_port->dev->dev_addr; | |
493 | ||
494 | ether_addr_copy(addr, mlxsw_sp->base_mac); | |
495 | addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port; | |
496 | return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr); | |
497 | } | |
498 | ||
56ade8fe JP |
499 | static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu) |
500 | { | |
501 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
502 | char pmtu_pl[MLXSW_REG_PMTU_LEN]; | |
503 | int max_mtu; | |
504 | int err; | |
505 | ||
506 | mtu += MLXSW_TXHDR_LEN + ETH_HLEN; | |
507 | mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0); | |
508 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); | |
509 | if (err) | |
510 | return err; | |
511 | max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl); | |
512 | ||
513 | if (mtu > max_mtu) | |
514 | return -EINVAL; | |
515 | ||
516 | mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu); | |
517 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); | |
518 | } | |
519 | ||
be94535f IS |
520 | static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
521 | u8 swid) | |
56ade8fe | 522 | { |
56ade8fe JP |
523 | char pspa_pl[MLXSW_REG_PSPA_LEN]; |
524 | ||
be94535f | 525 | mlxsw_reg_pspa_pack(pspa_pl, swid, local_port); |
56ade8fe JP |
526 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); |
527 | } | |
528 | ||
be94535f IS |
529 | static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid) |
530 | { | |
531 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
532 | ||
533 | return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port, | |
534 | swid); | |
535 | } | |
536 | ||
56ade8fe JP |
537 | static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port, |
538 | bool enable) | |
539 | { | |
540 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
541 | char svpe_pl[MLXSW_REG_SVPE_LEN]; | |
542 | ||
543 | mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable); | |
544 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); | |
545 | } | |
546 | ||
547 | int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
548 | enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid, | |
549 | u16 vid) | |
550 | { | |
551 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
552 | char svfa_pl[MLXSW_REG_SVFA_LEN]; | |
553 | ||
554 | mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid, | |
555 | fid, vid); | |
556 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); | |
557 | } | |
558 | ||
559 | static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
560 | u16 vid, bool learn_enable) | |
561 | { | |
562 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
563 | char *spvmlr_pl; | |
564 | int err; | |
565 | ||
566 | spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL); | |
567 | if (!spvmlr_pl) | |
568 | return -ENOMEM; | |
569 | mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid, | |
570 | learn_enable); | |
571 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl); | |
572 | kfree(spvmlr_pl); | |
573 | return err; | |
574 | } | |
575 | ||
576 | static int | |
577 | mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port) | |
578 | { | |
579 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
580 | char sspr_pl[MLXSW_REG_SSPR_LEN]; | |
581 | ||
582 | mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port); | |
583 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl); | |
584 | } | |
585 | ||
d664b41e IS |
586 | static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp, |
587 | u8 local_port, u8 *p_module, | |
588 | u8 *p_width, u8 *p_lane) | |
56ade8fe | 589 | { |
56ade8fe JP |
590 | char pmlp_pl[MLXSW_REG_PMLP_LEN]; |
591 | int err; | |
592 | ||
558c2d5e | 593 | mlxsw_reg_pmlp_pack(pmlp_pl, local_port); |
56ade8fe JP |
594 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); |
595 | if (err) | |
596 | return err; | |
558c2d5e IS |
597 | *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0); |
598 | *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl); | |
2bf9a586 | 599 | *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0); |
56ade8fe JP |
600 | return 0; |
601 | } | |
602 | ||
18f1e70c IS |
603 | static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
604 | u8 module, u8 width, u8 lane) | |
605 | { | |
606 | char pmlp_pl[MLXSW_REG_PMLP_LEN]; | |
607 | int i; | |
608 | ||
609 | mlxsw_reg_pmlp_pack(pmlp_pl, local_port); | |
610 | mlxsw_reg_pmlp_width_set(pmlp_pl, width); | |
611 | for (i = 0; i < width; i++) { | |
612 | mlxsw_reg_pmlp_module_set(pmlp_pl, i, module); | |
613 | mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */ | |
614 | } | |
615 | ||
616 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); | |
617 | } | |
618 | ||
3e9b27b8 IS |
619 | static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port) |
620 | { | |
621 | char pmlp_pl[MLXSW_REG_PMLP_LEN]; | |
622 | ||
623 | mlxsw_reg_pmlp_pack(pmlp_pl, local_port); | |
624 | mlxsw_reg_pmlp_width_set(pmlp_pl, 0); | |
625 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); | |
626 | } | |
627 | ||
56ade8fe JP |
628 | static int mlxsw_sp_port_open(struct net_device *dev) |
629 | { | |
630 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
631 | int err; | |
632 | ||
633 | err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true); | |
634 | if (err) | |
635 | return err; | |
636 | netif_start_queue(dev); | |
637 | return 0; | |
638 | } | |
639 | ||
640 | static int mlxsw_sp_port_stop(struct net_device *dev) | |
641 | { | |
642 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
643 | ||
644 | netif_stop_queue(dev); | |
645 | return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); | |
646 | } | |
647 | ||
648 | static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb, | |
649 | struct net_device *dev) | |
650 | { | |
651 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
652 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
653 | struct mlxsw_sp_port_pcpu_stats *pcpu_stats; | |
654 | const struct mlxsw_tx_info tx_info = { | |
655 | .local_port = mlxsw_sp_port->local_port, | |
656 | .is_emad = false, | |
657 | }; | |
658 | u64 len; | |
659 | int err; | |
660 | ||
307c2431 | 661 | if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info)) |
56ade8fe JP |
662 | return NETDEV_TX_BUSY; |
663 | ||
664 | if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) { | |
665 | struct sk_buff *skb_orig = skb; | |
666 | ||
667 | skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN); | |
668 | if (!skb) { | |
669 | this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); | |
670 | dev_kfree_skb_any(skb_orig); | |
671 | return NETDEV_TX_OK; | |
672 | } | |
673 | } | |
674 | ||
675 | if (eth_skb_pad(skb)) { | |
676 | this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); | |
677 | return NETDEV_TX_OK; | |
678 | } | |
679 | ||
680 | mlxsw_sp_txhdr_construct(skb, &tx_info); | |
63dcdd35 NF |
681 | /* TX header is consumed by HW on the way so we shouldn't count its |
682 | * bytes as being sent. | |
683 | */ | |
684 | len = skb->len - MLXSW_TXHDR_LEN; | |
685 | ||
56ade8fe JP |
686 | /* Due to a race we might fail here because of a full queue. In that |
687 | * unlikely case we simply drop the packet. | |
688 | */ | |
307c2431 | 689 | err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info); |
56ade8fe JP |
690 | |
691 | if (!err) { | |
692 | pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats); | |
693 | u64_stats_update_begin(&pcpu_stats->syncp); | |
694 | pcpu_stats->tx_packets++; | |
695 | pcpu_stats->tx_bytes += len; | |
696 | u64_stats_update_end(&pcpu_stats->syncp); | |
697 | } else { | |
698 | this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); | |
699 | dev_kfree_skb_any(skb); | |
700 | } | |
701 | return NETDEV_TX_OK; | |
702 | } | |
703 | ||
c5b9b518 JP |
704 | static void mlxsw_sp_set_rx_mode(struct net_device *dev) |
705 | { | |
706 | } | |
707 | ||
56ade8fe JP |
708 | static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p) |
709 | { | |
710 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
711 | struct sockaddr *addr = p; | |
712 | int err; | |
713 | ||
714 | if (!is_valid_ether_addr(addr->sa_data)) | |
715 | return -EADDRNOTAVAIL; | |
716 | ||
717 | err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data); | |
718 | if (err) | |
719 | return err; | |
720 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | |
721 | return 0; | |
722 | } | |
723 | ||
9f7ec052 | 724 | static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu, |
d81a6bdb | 725 | bool pause_en, bool pfc_en, u16 delay) |
ff6551ec | 726 | { |
ff6551ec | 727 | u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu); |
8e8dfe9f | 728 | |
d81a6bdb IS |
729 | delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) : |
730 | MLXSW_SP_PAUSE_DELAY; | |
9f7ec052 | 731 | |
d81a6bdb | 732 | if (pause_en || pfc_en) |
9f7ec052 | 733 | mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index, |
d81a6bdb IS |
734 | pg_size + delay, pg_size); |
735 | else | |
9f7ec052 | 736 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size); |
8e8dfe9f IS |
737 | } |
738 | ||
739 | int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu, | |
d81a6bdb IS |
740 | u8 *prio_tc, bool pause_en, |
741 | struct ieee_pfc *my_pfc) | |
8e8dfe9f IS |
742 | { |
743 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
d81a6bdb IS |
744 | u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0; |
745 | u16 delay = !!my_pfc ? my_pfc->delay : 0; | |
ff6551ec | 746 | char pbmc_pl[MLXSW_REG_PBMC_LEN]; |
8e8dfe9f | 747 | int i, j, err; |
ff6551ec IS |
748 | |
749 | mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0); | |
750 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); | |
751 | if (err) | |
752 | return err; | |
8e8dfe9f IS |
753 | |
754 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
755 | bool configure = false; | |
d81a6bdb | 756 | bool pfc = false; |
8e8dfe9f IS |
757 | |
758 | for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) { | |
759 | if (prio_tc[j] == i) { | |
d81a6bdb | 760 | pfc = pfc_en & BIT(j); |
8e8dfe9f IS |
761 | configure = true; |
762 | break; | |
763 | } | |
764 | } | |
765 | ||
766 | if (!configure) | |
767 | continue; | |
d81a6bdb | 768 | mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay); |
8e8dfe9f IS |
769 | } |
770 | ||
ff6551ec IS |
771 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); |
772 | } | |
773 | ||
8e8dfe9f | 774 | static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, |
9f7ec052 | 775 | int mtu, bool pause_en) |
8e8dfe9f IS |
776 | { |
777 | u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0}; | |
778 | bool dcb_en = !!mlxsw_sp_port->dcb.ets; | |
d81a6bdb | 779 | struct ieee_pfc *my_pfc; |
8e8dfe9f IS |
780 | u8 *prio_tc; |
781 | ||
782 | prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc; | |
d81a6bdb | 783 | my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL; |
8e8dfe9f | 784 | |
9f7ec052 | 785 | return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc, |
d81a6bdb | 786 | pause_en, my_pfc); |
8e8dfe9f IS |
787 | } |
788 | ||
56ade8fe JP |
789 | static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu) |
790 | { | |
791 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
9f7ec052 | 792 | bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port); |
56ade8fe JP |
793 | int err; |
794 | ||
9f7ec052 | 795 | err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en); |
56ade8fe JP |
796 | if (err) |
797 | return err; | |
763b4b70 YG |
798 | err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu); |
799 | if (err) | |
800 | goto err_span_port_mtu_update; | |
ff6551ec IS |
801 | err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu); |
802 | if (err) | |
803 | goto err_port_mtu_set; | |
56ade8fe JP |
804 | dev->mtu = mtu; |
805 | return 0; | |
ff6551ec IS |
806 | |
807 | err_port_mtu_set: | |
763b4b70 YG |
808 | mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu); |
809 | err_span_port_mtu_update: | |
9f7ec052 | 810 | mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); |
ff6551ec | 811 | return err; |
56ade8fe JP |
812 | } |
813 | ||
814 | static struct rtnl_link_stats64 * | |
815 | mlxsw_sp_port_get_stats64(struct net_device *dev, | |
816 | struct rtnl_link_stats64 *stats) | |
817 | { | |
818 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
819 | struct mlxsw_sp_port_pcpu_stats *p; | |
820 | u64 rx_packets, rx_bytes, tx_packets, tx_bytes; | |
821 | u32 tx_dropped = 0; | |
822 | unsigned int start; | |
823 | int i; | |
824 | ||
825 | for_each_possible_cpu(i) { | |
826 | p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i); | |
827 | do { | |
828 | start = u64_stats_fetch_begin_irq(&p->syncp); | |
829 | rx_packets = p->rx_packets; | |
830 | rx_bytes = p->rx_bytes; | |
831 | tx_packets = p->tx_packets; | |
832 | tx_bytes = p->tx_bytes; | |
833 | } while (u64_stats_fetch_retry_irq(&p->syncp, start)); | |
834 | ||
835 | stats->rx_packets += rx_packets; | |
836 | stats->rx_bytes += rx_bytes; | |
837 | stats->tx_packets += tx_packets; | |
838 | stats->tx_bytes += tx_bytes; | |
839 | /* tx_dropped is u32, updated without syncp protection. */ | |
840 | tx_dropped += p->tx_dropped; | |
841 | } | |
842 | stats->tx_dropped = tx_dropped; | |
843 | return stats; | |
844 | } | |
845 | ||
846 | int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin, | |
847 | u16 vid_end, bool is_member, bool untagged) | |
848 | { | |
849 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
850 | char *spvm_pl; | |
851 | int err; | |
852 | ||
853 | spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL); | |
854 | if (!spvm_pl) | |
855 | return -ENOMEM; | |
856 | ||
857 | mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin, | |
858 | vid_end, is_member, untagged); | |
859 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl); | |
860 | kfree(spvm_pl); | |
861 | return err; | |
862 | } | |
863 | ||
864 | static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port) | |
865 | { | |
866 | enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; | |
867 | u16 vid, last_visited_vid; | |
868 | int err; | |
869 | ||
870 | for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) { | |
871 | err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid, | |
872 | vid); | |
873 | if (err) { | |
874 | last_visited_vid = vid; | |
875 | goto err_port_vid_to_fid_set; | |
876 | } | |
877 | } | |
878 | ||
879 | err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true); | |
880 | if (err) { | |
881 | last_visited_vid = VLAN_N_VID; | |
882 | goto err_port_vid_to_fid_set; | |
883 | } | |
884 | ||
885 | return 0; | |
886 | ||
887 | err_port_vid_to_fid_set: | |
888 | for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid) | |
889 | mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid, | |
890 | vid); | |
891 | return err; | |
892 | } | |
893 | ||
894 | static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port) | |
895 | { | |
896 | enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; | |
897 | u16 vid; | |
898 | int err; | |
899 | ||
900 | err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false); | |
901 | if (err) | |
902 | return err; | |
903 | ||
904 | for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) { | |
905 | err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, | |
906 | vid, vid); | |
907 | if (err) | |
908 | return err; | |
909 | } | |
910 | ||
911 | return 0; | |
912 | } | |
913 | ||
7f71eb46 | 914 | static struct mlxsw_sp_port * |
0355b59f | 915 | mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid) |
7f71eb46 IS |
916 | { |
917 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
918 | ||
919 | mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL); | |
920 | if (!mlxsw_sp_vport) | |
921 | return NULL; | |
922 | ||
923 | /* dev will be set correctly after the VLAN device is linked | |
924 | * with the real device. In case of bridge SELF invocation, dev | |
925 | * will remain as is. | |
926 | */ | |
927 | mlxsw_sp_vport->dev = mlxsw_sp_port->dev; | |
928 | mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
929 | mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port; | |
930 | mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING; | |
272c4470 IS |
931 | mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged; |
932 | mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id; | |
0355b59f | 933 | mlxsw_sp_vport->vport.vid = vid; |
7f71eb46 IS |
934 | |
935 | list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list); | |
936 | ||
937 | return mlxsw_sp_vport; | |
938 | } | |
939 | ||
940 | static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport) | |
941 | { | |
942 | list_del(&mlxsw_sp_vport->vport.list); | |
943 | kfree(mlxsw_sp_vport); | |
944 | } | |
945 | ||
05978481 IS |
946 | static int mlxsw_sp_port_add_vid(struct net_device *dev, |
947 | __be16 __always_unused proto, u16 vid) | |
56ade8fe JP |
948 | { |
949 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
7f71eb46 | 950 | struct mlxsw_sp_port *mlxsw_sp_vport; |
52697a9e | 951 | bool untagged = vid == 1; |
56ade8fe JP |
952 | int err; |
953 | ||
954 | /* VLAN 0 is added to HW filter when device goes up, but it is | |
955 | * reserved in our case, so simply return. | |
956 | */ | |
957 | if (!vid) | |
958 | return 0; | |
959 | ||
fa66d7e3 | 960 | if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) |
56ade8fe | 961 | return 0; |
56ade8fe | 962 | |
0355b59f | 963 | mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid); |
fa66d7e3 | 964 | if (!mlxsw_sp_vport) |
0355b59f | 965 | return -ENOMEM; |
56ade8fe | 966 | |
56ade8fe JP |
967 | /* When adding the first VLAN interface on a bridged port we need to |
968 | * transition all the active 802.1Q bridge VLANs to use explicit | |
969 | * {Port, VID} to FID mappings and set the port's mode to Virtual mode. | |
970 | */ | |
7f71eb46 | 971 | if (list_is_singular(&mlxsw_sp_port->vports_list)) { |
56ade8fe | 972 | err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port); |
fa66d7e3 | 973 | if (err) |
7f71eb46 | 974 | goto err_port_vp_mode_trans; |
56ade8fe JP |
975 | } |
976 | ||
7f71eb46 | 977 | err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false); |
fa66d7e3 | 978 | if (err) |
56ade8fe | 979 | goto err_port_vid_learning_set; |
56ade8fe | 980 | |
52697a9e | 981 | err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged); |
fa66d7e3 | 982 | if (err) |
56ade8fe | 983 | goto err_port_add_vid; |
56ade8fe | 984 | |
56ade8fe JP |
985 | return 0; |
986 | ||
56ade8fe | 987 | err_port_add_vid: |
7f71eb46 | 988 | mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true); |
56ade8fe | 989 | err_port_vid_learning_set: |
7f71eb46 IS |
990 | if (list_is_singular(&mlxsw_sp_port->vports_list)) |
991 | mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port); | |
992 | err_port_vp_mode_trans: | |
7f71eb46 | 993 | mlxsw_sp_port_vport_destroy(mlxsw_sp_vport); |
56ade8fe JP |
994 | return err; |
995 | } | |
996 | ||
32d863fb IS |
997 | static int mlxsw_sp_port_kill_vid(struct net_device *dev, |
998 | __be16 __always_unused proto, u16 vid) | |
56ade8fe JP |
999 | { |
1000 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
7f71eb46 | 1001 | struct mlxsw_sp_port *mlxsw_sp_vport; |
1c800759 | 1002 | struct mlxsw_sp_fid *f; |
56ade8fe JP |
1003 | |
1004 | /* VLAN 0 is removed from HW filter when device goes down, but | |
1005 | * it is reserved in our case, so simply return. | |
1006 | */ | |
1007 | if (!vid) | |
1008 | return 0; | |
1009 | ||
7f71eb46 | 1010 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); |
7a35583e | 1011 | if (WARN_ON(!mlxsw_sp_vport)) |
56ade8fe | 1012 | return 0; |
56ade8fe | 1013 | |
7a35583e | 1014 | mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false); |
56ade8fe | 1015 | |
7a35583e | 1016 | mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true); |
56ade8fe | 1017 | |
1c800759 IS |
1018 | /* Drop FID reference. If this was the last reference the |
1019 | * resources will be freed. | |
1020 | */ | |
1021 | f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); | |
1022 | if (f && !WARN_ON(!f->leave)) | |
1023 | f->leave(mlxsw_sp_vport); | |
56ade8fe JP |
1024 | |
1025 | /* When removing the last VLAN interface on a bridged port we need to | |
1026 | * transition all active 802.1Q bridge VLANs to use VID to FID | |
1027 | * mappings and set port's mode to VLAN mode. | |
1028 | */ | |
7a35583e IS |
1029 | if (list_is_singular(&mlxsw_sp_port->vports_list)) |
1030 | mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port); | |
56ade8fe | 1031 | |
7f71eb46 IS |
1032 | mlxsw_sp_port_vport_destroy(mlxsw_sp_vport); |
1033 | ||
56ade8fe JP |
1034 | return 0; |
1035 | } | |
1036 | ||
2bf9a586 IS |
1037 | static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name, |
1038 | size_t len) | |
1039 | { | |
1040 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
d664b41e IS |
1041 | u8 module = mlxsw_sp_port->mapping.module; |
1042 | u8 width = mlxsw_sp_port->mapping.width; | |
1043 | u8 lane = mlxsw_sp_port->mapping.lane; | |
2bf9a586 IS |
1044 | int err; |
1045 | ||
2bf9a586 IS |
1046 | if (!mlxsw_sp_port->split) |
1047 | err = snprintf(name, len, "p%d", module + 1); | |
1048 | else | |
1049 | err = snprintf(name, len, "p%ds%d", module + 1, | |
1050 | lane / width); | |
1051 | ||
1052 | if (err >= len) | |
1053 | return -EINVAL; | |
1054 | ||
1055 | return 0; | |
1056 | } | |
1057 | ||
763b4b70 YG |
1058 | static struct mlxsw_sp_port_mall_tc_entry * |
1059 | mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port, | |
1060 | unsigned long cookie) { | |
1061 | struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; | |
1062 | ||
1063 | list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list) | |
1064 | if (mall_tc_entry->cookie == cookie) | |
1065 | return mall_tc_entry; | |
1066 | ||
1067 | return NULL; | |
1068 | } | |
1069 | ||
1070 | static int | |
1071 | mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port, | |
1072 | struct tc_cls_matchall_offload *cls, | |
1073 | const struct tc_action *a, | |
1074 | bool ingress) | |
1075 | { | |
1076 | struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; | |
1077 | struct net *net = dev_net(mlxsw_sp_port->dev); | |
1078 | enum mlxsw_sp_span_type span_type; | |
1079 | struct mlxsw_sp_port *to_port; | |
1080 | struct net_device *to_dev; | |
1081 | int ifindex; | |
1082 | int err; | |
1083 | ||
1084 | ifindex = tcf_mirred_ifindex(a); | |
1085 | to_dev = __dev_get_by_index(net, ifindex); | |
1086 | if (!to_dev) { | |
1087 | netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n"); | |
1088 | return -EINVAL; | |
1089 | } | |
1090 | ||
1091 | if (!mlxsw_sp_port_dev_check(to_dev)) { | |
1092 | netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port"); | |
1093 | return -ENOTSUPP; | |
1094 | } | |
1095 | to_port = netdev_priv(to_dev); | |
1096 | ||
1097 | mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL); | |
1098 | if (!mall_tc_entry) | |
1099 | return -ENOMEM; | |
1100 | ||
1101 | mall_tc_entry->cookie = cls->cookie; | |
1102 | mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR; | |
1103 | mall_tc_entry->mirror.to_local_port = to_port->local_port; | |
1104 | mall_tc_entry->mirror.ingress = ingress; | |
1105 | list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list); | |
1106 | ||
1107 | span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS; | |
1108 | err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type); | |
1109 | if (err) | |
1110 | goto err_mirror_add; | |
1111 | return 0; | |
1112 | ||
1113 | err_mirror_add: | |
1114 | list_del(&mall_tc_entry->list); | |
1115 | kfree(mall_tc_entry); | |
1116 | return err; | |
1117 | } | |
1118 | ||
1119 | static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port, | |
1120 | __be16 protocol, | |
1121 | struct tc_cls_matchall_offload *cls, | |
1122 | bool ingress) | |
1123 | { | |
763b4b70 | 1124 | const struct tc_action *a; |
22dc13c8 | 1125 | LIST_HEAD(actions); |
763b4b70 YG |
1126 | int err; |
1127 | ||
86cb13e4 | 1128 | if (!tc_single_action(cls->exts)) { |
763b4b70 YG |
1129 | netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n"); |
1130 | return -ENOTSUPP; | |
1131 | } | |
1132 | ||
22dc13c8 WC |
1133 | tcf_exts_to_list(cls->exts, &actions); |
1134 | list_for_each_entry(a, &actions, list) { | |
86cb13e4 IS |
1135 | if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL)) |
1136 | return -ENOTSUPP; | |
1137 | ||
763b4b70 YG |
1138 | err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls, |
1139 | a, ingress); | |
1140 | if (err) | |
1141 | return err; | |
763b4b70 YG |
1142 | } |
1143 | ||
1144 | return 0; | |
1145 | } | |
1146 | ||
1147 | static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port, | |
1148 | struct tc_cls_matchall_offload *cls) | |
1149 | { | |
1150 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1151 | struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; | |
1152 | enum mlxsw_sp_span_type span_type; | |
1153 | struct mlxsw_sp_port *to_port; | |
1154 | ||
1155 | mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port, | |
1156 | cls->cookie); | |
1157 | if (!mall_tc_entry) { | |
1158 | netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n"); | |
1159 | return; | |
1160 | } | |
1161 | ||
1162 | switch (mall_tc_entry->type) { | |
1163 | case MLXSW_SP_PORT_MALL_MIRROR: | |
1164 | to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port]; | |
1165 | span_type = mall_tc_entry->mirror.ingress ? | |
1166 | MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS; | |
1167 | ||
1168 | mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type); | |
1169 | break; | |
1170 | default: | |
1171 | WARN_ON(1); | |
1172 | } | |
1173 | ||
1174 | list_del(&mall_tc_entry->list); | |
1175 | kfree(mall_tc_entry); | |
1176 | } | |
1177 | ||
1178 | static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle, | |
1179 | __be16 proto, struct tc_to_netdev *tc) | |
1180 | { | |
1181 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1182 | bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS); | |
1183 | ||
1184 | if (tc->type == TC_SETUP_MATCHALL) { | |
1185 | switch (tc->cls_mall->command) { | |
1186 | case TC_CLSMATCHALL_REPLACE: | |
1187 | return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port, | |
1188 | proto, | |
1189 | tc->cls_mall, | |
1190 | ingress); | |
1191 | case TC_CLSMATCHALL_DESTROY: | |
1192 | mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port, | |
1193 | tc->cls_mall); | |
1194 | return 0; | |
1195 | default: | |
1196 | return -EINVAL; | |
1197 | } | |
1198 | } | |
1199 | ||
1200 | return -ENOTSUPP; | |
1201 | } | |
1202 | ||
56ade8fe JP |
1203 | static const struct net_device_ops mlxsw_sp_port_netdev_ops = { |
1204 | .ndo_open = mlxsw_sp_port_open, | |
1205 | .ndo_stop = mlxsw_sp_port_stop, | |
1206 | .ndo_start_xmit = mlxsw_sp_port_xmit, | |
763b4b70 | 1207 | .ndo_setup_tc = mlxsw_sp_setup_tc, |
c5b9b518 | 1208 | .ndo_set_rx_mode = mlxsw_sp_set_rx_mode, |
56ade8fe JP |
1209 | .ndo_set_mac_address = mlxsw_sp_port_set_mac_address, |
1210 | .ndo_change_mtu = mlxsw_sp_port_change_mtu, | |
1211 | .ndo_get_stats64 = mlxsw_sp_port_get_stats64, | |
1212 | .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid, | |
1213 | .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid, | |
6cf3c971 JP |
1214 | .ndo_neigh_construct = mlxsw_sp_router_neigh_construct, |
1215 | .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy, | |
56ade8fe JP |
1216 | .ndo_fdb_add = switchdev_port_fdb_add, |
1217 | .ndo_fdb_del = switchdev_port_fdb_del, | |
1218 | .ndo_fdb_dump = switchdev_port_fdb_dump, | |
1219 | .ndo_bridge_setlink = switchdev_port_bridge_setlink, | |
1220 | .ndo_bridge_getlink = switchdev_port_bridge_getlink, | |
1221 | .ndo_bridge_dellink = switchdev_port_bridge_dellink, | |
2bf9a586 | 1222 | .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name, |
56ade8fe JP |
1223 | }; |
1224 | ||
1225 | static void mlxsw_sp_port_get_drvinfo(struct net_device *dev, | |
1226 | struct ethtool_drvinfo *drvinfo) | |
1227 | { | |
1228 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1229 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1230 | ||
1231 | strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver)); | |
1232 | strlcpy(drvinfo->version, mlxsw_sp_driver_version, | |
1233 | sizeof(drvinfo->version)); | |
1234 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), | |
1235 | "%d.%d.%d", | |
1236 | mlxsw_sp->bus_info->fw_rev.major, | |
1237 | mlxsw_sp->bus_info->fw_rev.minor, | |
1238 | mlxsw_sp->bus_info->fw_rev.subminor); | |
1239 | strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name, | |
1240 | sizeof(drvinfo->bus_info)); | |
1241 | } | |
1242 | ||
9f7ec052 IS |
1243 | static void mlxsw_sp_port_get_pauseparam(struct net_device *dev, |
1244 | struct ethtool_pauseparam *pause) | |
1245 | { | |
1246 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1247 | ||
1248 | pause->rx_pause = mlxsw_sp_port->link.rx_pause; | |
1249 | pause->tx_pause = mlxsw_sp_port->link.tx_pause; | |
1250 | } | |
1251 | ||
1252 | static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
1253 | struct ethtool_pauseparam *pause) | |
1254 | { | |
1255 | char pfcc_pl[MLXSW_REG_PFCC_LEN]; | |
1256 | ||
1257 | mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port); | |
1258 | mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause); | |
1259 | mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause); | |
1260 | ||
1261 | return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), | |
1262 | pfcc_pl); | |
1263 | } | |
1264 | ||
1265 | static int mlxsw_sp_port_set_pauseparam(struct net_device *dev, | |
1266 | struct ethtool_pauseparam *pause) | |
1267 | { | |
1268 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1269 | bool pause_en = pause->tx_pause || pause->rx_pause; | |
1270 | int err; | |
1271 | ||
d81a6bdb IS |
1272 | if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) { |
1273 | netdev_err(dev, "PFC already enabled on port\n"); | |
1274 | return -EINVAL; | |
1275 | } | |
1276 | ||
9f7ec052 IS |
1277 | if (pause->autoneg) { |
1278 | netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n"); | |
1279 | return -EINVAL; | |
1280 | } | |
1281 | ||
1282 | err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); | |
1283 | if (err) { | |
1284 | netdev_err(dev, "Failed to configure port's headroom\n"); | |
1285 | return err; | |
1286 | } | |
1287 | ||
1288 | err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause); | |
1289 | if (err) { | |
1290 | netdev_err(dev, "Failed to set PAUSE parameters\n"); | |
1291 | goto err_port_pause_configure; | |
1292 | } | |
1293 | ||
1294 | mlxsw_sp_port->link.rx_pause = pause->rx_pause; | |
1295 | mlxsw_sp_port->link.tx_pause = pause->tx_pause; | |
1296 | ||
1297 | return 0; | |
1298 | ||
1299 | err_port_pause_configure: | |
1300 | pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port); | |
1301 | mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); | |
1302 | return err; | |
1303 | } | |
1304 | ||
56ade8fe JP |
1305 | struct mlxsw_sp_port_hw_stats { |
1306 | char str[ETH_GSTRING_LEN]; | |
1307 | u64 (*getter)(char *payload); | |
1308 | }; | |
1309 | ||
7ed674bc | 1310 | static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = { |
56ade8fe JP |
1311 | { |
1312 | .str = "a_frames_transmitted_ok", | |
1313 | .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get, | |
1314 | }, | |
1315 | { | |
1316 | .str = "a_frames_received_ok", | |
1317 | .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get, | |
1318 | }, | |
1319 | { | |
1320 | .str = "a_frame_check_sequence_errors", | |
1321 | .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get, | |
1322 | }, | |
1323 | { | |
1324 | .str = "a_alignment_errors", | |
1325 | .getter = mlxsw_reg_ppcnt_a_alignment_errors_get, | |
1326 | }, | |
1327 | { | |
1328 | .str = "a_octets_transmitted_ok", | |
1329 | .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get, | |
1330 | }, | |
1331 | { | |
1332 | .str = "a_octets_received_ok", | |
1333 | .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get, | |
1334 | }, | |
1335 | { | |
1336 | .str = "a_multicast_frames_xmitted_ok", | |
1337 | .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get, | |
1338 | }, | |
1339 | { | |
1340 | .str = "a_broadcast_frames_xmitted_ok", | |
1341 | .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get, | |
1342 | }, | |
1343 | { | |
1344 | .str = "a_multicast_frames_received_ok", | |
1345 | .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get, | |
1346 | }, | |
1347 | { | |
1348 | .str = "a_broadcast_frames_received_ok", | |
1349 | .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get, | |
1350 | }, | |
1351 | { | |
1352 | .str = "a_in_range_length_errors", | |
1353 | .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get, | |
1354 | }, | |
1355 | { | |
1356 | .str = "a_out_of_range_length_field", | |
1357 | .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get, | |
1358 | }, | |
1359 | { | |
1360 | .str = "a_frame_too_long_errors", | |
1361 | .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get, | |
1362 | }, | |
1363 | { | |
1364 | .str = "a_symbol_error_during_carrier", | |
1365 | .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get, | |
1366 | }, | |
1367 | { | |
1368 | .str = "a_mac_control_frames_transmitted", | |
1369 | .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get, | |
1370 | }, | |
1371 | { | |
1372 | .str = "a_mac_control_frames_received", | |
1373 | .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get, | |
1374 | }, | |
1375 | { | |
1376 | .str = "a_unsupported_opcodes_received", | |
1377 | .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get, | |
1378 | }, | |
1379 | { | |
1380 | .str = "a_pause_mac_ctrl_frames_received", | |
1381 | .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get, | |
1382 | }, | |
1383 | { | |
1384 | .str = "a_pause_mac_ctrl_frames_xmitted", | |
1385 | .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get, | |
1386 | }, | |
1387 | }; | |
1388 | ||
1389 | #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats) | |
1390 | ||
7ed674bc IS |
1391 | static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = { |
1392 | { | |
1393 | .str = "rx_octets_prio", | |
1394 | .getter = mlxsw_reg_ppcnt_rx_octets_get, | |
1395 | }, | |
1396 | { | |
1397 | .str = "rx_frames_prio", | |
1398 | .getter = mlxsw_reg_ppcnt_rx_frames_get, | |
1399 | }, | |
1400 | { | |
1401 | .str = "tx_octets_prio", | |
1402 | .getter = mlxsw_reg_ppcnt_tx_octets_get, | |
1403 | }, | |
1404 | { | |
1405 | .str = "tx_frames_prio", | |
1406 | .getter = mlxsw_reg_ppcnt_tx_frames_get, | |
1407 | }, | |
1408 | { | |
1409 | .str = "rx_pause_prio", | |
1410 | .getter = mlxsw_reg_ppcnt_rx_pause_get, | |
1411 | }, | |
1412 | { | |
1413 | .str = "rx_pause_duration_prio", | |
1414 | .getter = mlxsw_reg_ppcnt_rx_pause_duration_get, | |
1415 | }, | |
1416 | { | |
1417 | .str = "tx_pause_prio", | |
1418 | .getter = mlxsw_reg_ppcnt_tx_pause_get, | |
1419 | }, | |
1420 | { | |
1421 | .str = "tx_pause_duration_prio", | |
1422 | .getter = mlxsw_reg_ppcnt_tx_pause_duration_get, | |
1423 | }, | |
1424 | }; | |
1425 | ||
1426 | #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats) | |
1427 | ||
df4750e8 IS |
1428 | static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl) |
1429 | { | |
1430 | u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl); | |
1431 | ||
1432 | return MLXSW_SP_CELLS_TO_BYTES(transmit_queue); | |
1433 | } | |
1434 | ||
1435 | static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = { | |
1436 | { | |
1437 | .str = "tc_transmit_queue_tc", | |
1438 | .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get, | |
1439 | }, | |
1440 | { | |
1441 | .str = "tc_no_buffer_discard_uc_tc", | |
1442 | .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get, | |
1443 | }, | |
1444 | }; | |
1445 | ||
1446 | #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats) | |
1447 | ||
7ed674bc | 1448 | #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \ |
df4750e8 IS |
1449 | (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \ |
1450 | MLXSW_SP_PORT_HW_TC_STATS_LEN) * \ | |
7ed674bc IS |
1451 | IEEE_8021QAZ_MAX_TCS) |
1452 | ||
1453 | static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio) | |
1454 | { | |
1455 | int i; | |
1456 | ||
1457 | for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) { | |
1458 | snprintf(*p, ETH_GSTRING_LEN, "%s_%d", | |
1459 | mlxsw_sp_port_hw_prio_stats[i].str, prio); | |
1460 | *p += ETH_GSTRING_LEN; | |
1461 | } | |
1462 | } | |
1463 | ||
df4750e8 IS |
1464 | static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc) |
1465 | { | |
1466 | int i; | |
1467 | ||
1468 | for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) { | |
1469 | snprintf(*p, ETH_GSTRING_LEN, "%s_%d", | |
1470 | mlxsw_sp_port_hw_tc_stats[i].str, tc); | |
1471 | *p += ETH_GSTRING_LEN; | |
1472 | } | |
1473 | } | |
1474 | ||
56ade8fe JP |
1475 | static void mlxsw_sp_port_get_strings(struct net_device *dev, |
1476 | u32 stringset, u8 *data) | |
1477 | { | |
1478 | u8 *p = data; | |
1479 | int i; | |
1480 | ||
1481 | switch (stringset) { | |
1482 | case ETH_SS_STATS: | |
1483 | for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) { | |
1484 | memcpy(p, mlxsw_sp_port_hw_stats[i].str, | |
1485 | ETH_GSTRING_LEN); | |
1486 | p += ETH_GSTRING_LEN; | |
1487 | } | |
7ed674bc IS |
1488 | |
1489 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) | |
1490 | mlxsw_sp_port_get_prio_strings(&p, i); | |
1491 | ||
df4750e8 IS |
1492 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
1493 | mlxsw_sp_port_get_tc_strings(&p, i); | |
1494 | ||
56ade8fe JP |
1495 | break; |
1496 | } | |
1497 | } | |
1498 | ||
3a66ee38 IS |
1499 | static int mlxsw_sp_port_set_phys_id(struct net_device *dev, |
1500 | enum ethtool_phys_id_state state) | |
1501 | { | |
1502 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1503 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1504 | char mlcr_pl[MLXSW_REG_MLCR_LEN]; | |
1505 | bool active; | |
1506 | ||
1507 | switch (state) { | |
1508 | case ETHTOOL_ID_ACTIVE: | |
1509 | active = true; | |
1510 | break; | |
1511 | case ETHTOOL_ID_INACTIVE: | |
1512 | active = false; | |
1513 | break; | |
1514 | default: | |
1515 | return -EOPNOTSUPP; | |
1516 | } | |
1517 | ||
1518 | mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active); | |
1519 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl); | |
1520 | } | |
1521 | ||
7ed674bc IS |
1522 | static int |
1523 | mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats, | |
1524 | int *p_len, enum mlxsw_reg_ppcnt_grp grp) | |
1525 | { | |
1526 | switch (grp) { | |
1527 | case MLXSW_REG_PPCNT_IEEE_8023_CNT: | |
1528 | *p_hw_stats = mlxsw_sp_port_hw_stats; | |
1529 | *p_len = MLXSW_SP_PORT_HW_STATS_LEN; | |
1530 | break; | |
1531 | case MLXSW_REG_PPCNT_PRIO_CNT: | |
1532 | *p_hw_stats = mlxsw_sp_port_hw_prio_stats; | |
1533 | *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN; | |
1534 | break; | |
df4750e8 IS |
1535 | case MLXSW_REG_PPCNT_TC_CNT: |
1536 | *p_hw_stats = mlxsw_sp_port_hw_tc_stats; | |
1537 | *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN; | |
1538 | break; | |
7ed674bc IS |
1539 | default: |
1540 | WARN_ON(1); | |
1541 | return -ENOTSUPP; | |
1542 | } | |
1543 | return 0; | |
1544 | } | |
1545 | ||
1546 | static void __mlxsw_sp_port_get_stats(struct net_device *dev, | |
1547 | enum mlxsw_reg_ppcnt_grp grp, int prio, | |
1548 | u64 *data, int data_index) | |
56ade8fe JP |
1549 | { |
1550 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1551 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
7ed674bc | 1552 | struct mlxsw_sp_port_hw_stats *hw_stats; |
56ade8fe | 1553 | char ppcnt_pl[MLXSW_REG_PPCNT_LEN]; |
7ed674bc | 1554 | int i, len; |
56ade8fe JP |
1555 | int err; |
1556 | ||
7ed674bc IS |
1557 | err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp); |
1558 | if (err) | |
1559 | return; | |
1560 | mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio); | |
56ade8fe | 1561 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl); |
7ed674bc IS |
1562 | for (i = 0; i < len; i++) |
1563 | data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0; | |
1564 | } | |
1565 | ||
1566 | static void mlxsw_sp_port_get_stats(struct net_device *dev, | |
1567 | struct ethtool_stats *stats, u64 *data) | |
1568 | { | |
1569 | int i, data_index = 0; | |
1570 | ||
1571 | /* IEEE 802.3 Counters */ | |
1572 | __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0, | |
1573 | data, data_index); | |
1574 | data_index = MLXSW_SP_PORT_HW_STATS_LEN; | |
1575 | ||
1576 | /* Per-Priority Counters */ | |
1577 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
1578 | __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i, | |
1579 | data, data_index); | |
1580 | data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN; | |
1581 | } | |
df4750e8 IS |
1582 | |
1583 | /* Per-TC Counters */ | |
1584 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
1585 | __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i, | |
1586 | data, data_index); | |
1587 | data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN; | |
1588 | } | |
56ade8fe JP |
1589 | } |
1590 | ||
1591 | static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset) | |
1592 | { | |
1593 | switch (sset) { | |
1594 | case ETH_SS_STATS: | |
7ed674bc | 1595 | return MLXSW_SP_PORT_ETHTOOL_STATS_LEN; |
56ade8fe JP |
1596 | default: |
1597 | return -EOPNOTSUPP; | |
1598 | } | |
1599 | } | |
1600 | ||
1601 | struct mlxsw_sp_port_link_mode { | |
1602 | u32 mask; | |
1603 | u32 supported; | |
1604 | u32 advertised; | |
1605 | u32 speed; | |
1606 | }; | |
1607 | ||
1608 | static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = { | |
1609 | { | |
1610 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T, | |
1611 | .supported = SUPPORTED_100baseT_Full, | |
1612 | .advertised = ADVERTISED_100baseT_Full, | |
1613 | .speed = 100, | |
1614 | }, | |
1615 | { | |
1616 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX, | |
1617 | .speed = 100, | |
1618 | }, | |
1619 | { | |
1620 | .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII | | |
1621 | MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX, | |
1622 | .supported = SUPPORTED_1000baseKX_Full, | |
1623 | .advertised = ADVERTISED_1000baseKX_Full, | |
1624 | .speed = 1000, | |
1625 | }, | |
1626 | { | |
1627 | .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T, | |
1628 | .supported = SUPPORTED_10000baseT_Full, | |
1629 | .advertised = ADVERTISED_10000baseT_Full, | |
1630 | .speed = 10000, | |
1631 | }, | |
1632 | { | |
1633 | .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 | | |
1634 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4, | |
1635 | .supported = SUPPORTED_10000baseKX4_Full, | |
1636 | .advertised = ADVERTISED_10000baseKX4_Full, | |
1637 | .speed = 10000, | |
1638 | }, | |
1639 | { | |
1640 | .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | | |
1641 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | | |
1642 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | | |
1643 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR, | |
1644 | .supported = SUPPORTED_10000baseKR_Full, | |
1645 | .advertised = ADVERTISED_10000baseKR_Full, | |
1646 | .speed = 10000, | |
1647 | }, | |
1648 | { | |
1649 | .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2, | |
1650 | .supported = SUPPORTED_20000baseKR2_Full, | |
1651 | .advertised = ADVERTISED_20000baseKR2_Full, | |
1652 | .speed = 20000, | |
1653 | }, | |
1654 | { | |
1655 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4, | |
1656 | .supported = SUPPORTED_40000baseCR4_Full, | |
1657 | .advertised = ADVERTISED_40000baseCR4_Full, | |
1658 | .speed = 40000, | |
1659 | }, | |
1660 | { | |
1661 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4, | |
1662 | .supported = SUPPORTED_40000baseKR4_Full, | |
1663 | .advertised = ADVERTISED_40000baseKR4_Full, | |
1664 | .speed = 40000, | |
1665 | }, | |
1666 | { | |
1667 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4, | |
1668 | .supported = SUPPORTED_40000baseSR4_Full, | |
1669 | .advertised = ADVERTISED_40000baseSR4_Full, | |
1670 | .speed = 40000, | |
1671 | }, | |
1672 | { | |
1673 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4, | |
1674 | .supported = SUPPORTED_40000baseLR4_Full, | |
1675 | .advertised = ADVERTISED_40000baseLR4_Full, | |
1676 | .speed = 40000, | |
1677 | }, | |
1678 | { | |
1679 | .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR | | |
1680 | MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR | | |
1681 | MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR, | |
1682 | .speed = 25000, | |
1683 | }, | |
1684 | { | |
1685 | .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 | | |
1686 | MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 | | |
1687 | MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2, | |
1688 | .speed = 50000, | |
1689 | }, | |
1690 | { | |
1691 | .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, | |
1692 | .supported = SUPPORTED_56000baseKR4_Full, | |
1693 | .advertised = ADVERTISED_56000baseKR4_Full, | |
1694 | .speed = 56000, | |
1695 | }, | |
1696 | { | |
1697 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 | | |
1698 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 | | |
1699 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 | | |
1700 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4, | |
1701 | .speed = 100000, | |
1702 | }, | |
1703 | }; | |
1704 | ||
1705 | #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode) | |
1706 | ||
1707 | static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto) | |
1708 | { | |
1709 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | | |
1710 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | | |
1711 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 | | |
1712 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 | | |
1713 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 | | |
1714 | MLXSW_REG_PTYS_ETH_SPEED_SGMII)) | |
1715 | return SUPPORTED_FIBRE; | |
1716 | ||
1717 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | | |
1718 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 | | |
1719 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 | | |
1720 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 | | |
1721 | MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX)) | |
1722 | return SUPPORTED_Backplane; | |
1723 | return 0; | |
1724 | } | |
1725 | ||
1726 | static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto) | |
1727 | { | |
1728 | u32 modes = 0; | |
1729 | int i; | |
1730 | ||
1731 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { | |
1732 | if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) | |
1733 | modes |= mlxsw_sp_port_link_mode[i].supported; | |
1734 | } | |
1735 | return modes; | |
1736 | } | |
1737 | ||
1738 | static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto) | |
1739 | { | |
1740 | u32 modes = 0; | |
1741 | int i; | |
1742 | ||
1743 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { | |
1744 | if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) | |
1745 | modes |= mlxsw_sp_port_link_mode[i].advertised; | |
1746 | } | |
1747 | return modes; | |
1748 | } | |
1749 | ||
1750 | static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto, | |
1751 | struct ethtool_cmd *cmd) | |
1752 | { | |
1753 | u32 speed = SPEED_UNKNOWN; | |
1754 | u8 duplex = DUPLEX_UNKNOWN; | |
1755 | int i; | |
1756 | ||
1757 | if (!carrier_ok) | |
1758 | goto out; | |
1759 | ||
1760 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { | |
1761 | if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) { | |
1762 | speed = mlxsw_sp_port_link_mode[i].speed; | |
1763 | duplex = DUPLEX_FULL; | |
1764 | break; | |
1765 | } | |
1766 | } | |
1767 | out: | |
1768 | ethtool_cmd_speed_set(cmd, speed); | |
1769 | cmd->duplex = duplex; | |
1770 | } | |
1771 | ||
1772 | static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto) | |
1773 | { | |
1774 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | | |
1775 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 | | |
1776 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 | | |
1777 | MLXSW_REG_PTYS_ETH_SPEED_SGMII)) | |
1778 | return PORT_FIBRE; | |
1779 | ||
1780 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | | |
1781 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 | | |
1782 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4)) | |
1783 | return PORT_DA; | |
1784 | ||
1785 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | | |
1786 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 | | |
1787 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 | | |
1788 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4)) | |
1789 | return PORT_NONE; | |
1790 | ||
1791 | return PORT_OTHER; | |
1792 | } | |
1793 | ||
1794 | static int mlxsw_sp_port_get_settings(struct net_device *dev, | |
1795 | struct ethtool_cmd *cmd) | |
1796 | { | |
1797 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1798 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1799 | char ptys_pl[MLXSW_REG_PTYS_LEN]; | |
1800 | u32 eth_proto_cap; | |
1801 | u32 eth_proto_admin; | |
1802 | u32 eth_proto_oper; | |
1803 | int err; | |
1804 | ||
1805 | mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0); | |
1806 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); | |
1807 | if (err) { | |
1808 | netdev_err(dev, "Failed to get proto"); | |
1809 | return err; | |
1810 | } | |
1811 | mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap, | |
1812 | ð_proto_admin, ð_proto_oper); | |
1813 | ||
1814 | cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) | | |
1815 | mlxsw_sp_from_ptys_supported_link(eth_proto_cap) | | |
c3f15768 IS |
1816 | SUPPORTED_Pause | SUPPORTED_Asym_Pause | |
1817 | SUPPORTED_Autoneg; | |
56ade8fe JP |
1818 | cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin); |
1819 | mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), | |
1820 | eth_proto_oper, cmd); | |
1821 | ||
1822 | eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap; | |
1823 | cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper); | |
1824 | cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper); | |
1825 | ||
1826 | cmd->transceiver = XCVR_INTERNAL; | |
1827 | return 0; | |
1828 | } | |
1829 | ||
1830 | static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising) | |
1831 | { | |
1832 | u32 ptys_proto = 0; | |
1833 | int i; | |
1834 | ||
1835 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { | |
1836 | if (advertising & mlxsw_sp_port_link_mode[i].advertised) | |
1837 | ptys_proto |= mlxsw_sp_port_link_mode[i].mask; | |
1838 | } | |
1839 | return ptys_proto; | |
1840 | } | |
1841 | ||
1842 | static u32 mlxsw_sp_to_ptys_speed(u32 speed) | |
1843 | { | |
1844 | u32 ptys_proto = 0; | |
1845 | int i; | |
1846 | ||
1847 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { | |
1848 | if (speed == mlxsw_sp_port_link_mode[i].speed) | |
1849 | ptys_proto |= mlxsw_sp_port_link_mode[i].mask; | |
1850 | } | |
1851 | return ptys_proto; | |
1852 | } | |
1853 | ||
18f1e70c IS |
1854 | static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed) |
1855 | { | |
1856 | u32 ptys_proto = 0; | |
1857 | int i; | |
1858 | ||
1859 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { | |
1860 | if (mlxsw_sp_port_link_mode[i].speed <= upper_speed) | |
1861 | ptys_proto |= mlxsw_sp_port_link_mode[i].mask; | |
1862 | } | |
1863 | return ptys_proto; | |
1864 | } | |
1865 | ||
56ade8fe JP |
1866 | static int mlxsw_sp_port_set_settings(struct net_device *dev, |
1867 | struct ethtool_cmd *cmd) | |
1868 | { | |
1869 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
1870 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1871 | char ptys_pl[MLXSW_REG_PTYS_LEN]; | |
1872 | u32 speed; | |
1873 | u32 eth_proto_new; | |
1874 | u32 eth_proto_cap; | |
1875 | u32 eth_proto_admin; | |
56ade8fe JP |
1876 | int err; |
1877 | ||
1878 | speed = ethtool_cmd_speed(cmd); | |
1879 | ||
1880 | eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ? | |
1881 | mlxsw_sp_to_ptys_advert_link(cmd->advertising) : | |
1882 | mlxsw_sp_to_ptys_speed(speed); | |
1883 | ||
1884 | mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0); | |
1885 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); | |
1886 | if (err) { | |
1887 | netdev_err(dev, "Failed to get proto"); | |
1888 | return err; | |
1889 | } | |
1890 | mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap, ð_proto_admin, NULL); | |
1891 | ||
1892 | eth_proto_new = eth_proto_new & eth_proto_cap; | |
1893 | if (!eth_proto_new) { | |
1894 | netdev_err(dev, "Not supported proto admin requested"); | |
1895 | return -EINVAL; | |
1896 | } | |
1897 | if (eth_proto_new == eth_proto_admin) | |
1898 | return 0; | |
1899 | ||
1900 | mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new); | |
1901 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); | |
1902 | if (err) { | |
1903 | netdev_err(dev, "Failed to set proto admin"); | |
1904 | return err; | |
1905 | } | |
1906 | ||
6277d46b | 1907 | if (!netif_running(dev)) |
56ade8fe JP |
1908 | return 0; |
1909 | ||
1910 | err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); | |
1911 | if (err) { | |
1912 | netdev_err(dev, "Failed to set admin status"); | |
1913 | return err; | |
1914 | } | |
1915 | ||
1916 | err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true); | |
1917 | if (err) { | |
1918 | netdev_err(dev, "Failed to set admin status"); | |
1919 | return err; | |
1920 | } | |
1921 | ||
1922 | return 0; | |
1923 | } | |
1924 | ||
1925 | static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = { | |
1926 | .get_drvinfo = mlxsw_sp_port_get_drvinfo, | |
1927 | .get_link = ethtool_op_get_link, | |
9f7ec052 IS |
1928 | .get_pauseparam = mlxsw_sp_port_get_pauseparam, |
1929 | .set_pauseparam = mlxsw_sp_port_set_pauseparam, | |
56ade8fe | 1930 | .get_strings = mlxsw_sp_port_get_strings, |
3a66ee38 | 1931 | .set_phys_id = mlxsw_sp_port_set_phys_id, |
56ade8fe JP |
1932 | .get_ethtool_stats = mlxsw_sp_port_get_stats, |
1933 | .get_sset_count = mlxsw_sp_port_get_sset_count, | |
1934 | .get_settings = mlxsw_sp_port_get_settings, | |
1935 | .set_settings = mlxsw_sp_port_set_settings, | |
1936 | }; | |
1937 | ||
18f1e70c IS |
1938 | static int |
1939 | mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width) | |
1940 | { | |
1941 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1942 | u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width; | |
1943 | char ptys_pl[MLXSW_REG_PTYS_LEN]; | |
1944 | u32 eth_proto_admin; | |
1945 | ||
1946 | eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed); | |
1947 | mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, | |
1948 | eth_proto_admin); | |
1949 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); | |
1950 | } | |
1951 | ||
8e8dfe9f IS |
1952 | int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port, |
1953 | enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index, | |
1954 | bool dwrr, u8 dwrr_weight) | |
90183b98 IS |
1955 | { |
1956 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1957 | char qeec_pl[MLXSW_REG_QEEC_LEN]; | |
1958 | ||
1959 | mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index, | |
1960 | next_index); | |
1961 | mlxsw_reg_qeec_de_set(qeec_pl, true); | |
1962 | mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr); | |
1963 | mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight); | |
1964 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); | |
1965 | } | |
1966 | ||
cc7cf517 IS |
1967 | int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port, |
1968 | enum mlxsw_reg_qeec_hr hr, u8 index, | |
1969 | u8 next_index, u32 maxrate) | |
90183b98 IS |
1970 | { |
1971 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1972 | char qeec_pl[MLXSW_REG_QEEC_LEN]; | |
1973 | ||
1974 | mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index, | |
1975 | next_index); | |
1976 | mlxsw_reg_qeec_mase_set(qeec_pl, true); | |
1977 | mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate); | |
1978 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); | |
1979 | } | |
1980 | ||
8e8dfe9f IS |
1981 | int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port, |
1982 | u8 switch_prio, u8 tclass) | |
90183b98 IS |
1983 | { |
1984 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
1985 | char qtct_pl[MLXSW_REG_QTCT_LEN]; | |
1986 | ||
1987 | mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio, | |
1988 | tclass); | |
1989 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl); | |
1990 | } | |
1991 | ||
1992 | static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port) | |
1993 | { | |
1994 | int err, i; | |
1995 | ||
1996 | /* Setup the elements hierarcy, so that each TC is linked to | |
1997 | * one subgroup, which are all member in the same group. | |
1998 | */ | |
1999 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, | |
2000 | MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false, | |
2001 | 0); | |
2002 | if (err) | |
2003 | return err; | |
2004 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
2005 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, | |
2006 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i, | |
2007 | 0, false, 0); | |
2008 | if (err) | |
2009 | return err; | |
2010 | } | |
2011 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
2012 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, | |
2013 | MLXSW_REG_QEEC_HIERARCY_TC, i, i, | |
2014 | false, 0); | |
2015 | if (err) | |
2016 | return err; | |
2017 | } | |
2018 | ||
2019 | /* Make sure the max shaper is disabled in all hierarcies that | |
2020 | * support it. | |
2021 | */ | |
2022 | err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, | |
2023 | MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0, | |
2024 | MLXSW_REG_QEEC_MAS_DIS); | |
2025 | if (err) | |
2026 | return err; | |
2027 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
2028 | err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, | |
2029 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, | |
2030 | i, 0, | |
2031 | MLXSW_REG_QEEC_MAS_DIS); | |
2032 | if (err) | |
2033 | return err; | |
2034 | } | |
2035 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
2036 | err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, | |
2037 | MLXSW_REG_QEEC_HIERARCY_TC, | |
2038 | i, i, | |
2039 | MLXSW_REG_QEEC_MAS_DIS); | |
2040 | if (err) | |
2041 | return err; | |
2042 | } | |
2043 | ||
2044 | /* Map all priorities to traffic class 0. */ | |
2045 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { | |
2046 | err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0); | |
2047 | if (err) | |
2048 | return err; | |
2049 | } | |
2050 | ||
2051 | return 0; | |
2052 | } | |
2053 | ||
05978481 IS |
2054 | static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port) |
2055 | { | |
2056 | mlxsw_sp_port->pvid = 1; | |
2057 | ||
2058 | return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1); | |
2059 | } | |
2060 | ||
2061 | static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port) | |
2062 | { | |
2063 | return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1); | |
2064 | } | |
2065 | ||
be94535f | 2066 | static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
d664b41e | 2067 | bool split, u8 module, u8 width, u8 lane) |
56ade8fe JP |
2068 | { |
2069 | struct mlxsw_sp_port *mlxsw_sp_port; | |
2070 | struct net_device *dev; | |
bd40e9d6 | 2071 | size_t bytes; |
56ade8fe JP |
2072 | int err; |
2073 | ||
2074 | dev = alloc_etherdev(sizeof(struct mlxsw_sp_port)); | |
2075 | if (!dev) | |
2076 | return -ENOMEM; | |
2077 | mlxsw_sp_port = netdev_priv(dev); | |
2078 | mlxsw_sp_port->dev = dev; | |
2079 | mlxsw_sp_port->mlxsw_sp = mlxsw_sp; | |
2080 | mlxsw_sp_port->local_port = local_port; | |
18f1e70c | 2081 | mlxsw_sp_port->split = split; |
d664b41e IS |
2082 | mlxsw_sp_port->mapping.module = module; |
2083 | mlxsw_sp_port->mapping.width = width; | |
2084 | mlxsw_sp_port->mapping.lane = lane; | |
bd40e9d6 IS |
2085 | bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE); |
2086 | mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL); | |
2087 | if (!mlxsw_sp_port->active_vlans) { | |
2088 | err = -ENOMEM; | |
2089 | goto err_port_active_vlans_alloc; | |
2090 | } | |
fc1273af ER |
2091 | mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL); |
2092 | if (!mlxsw_sp_port->untagged_vlans) { | |
2093 | err = -ENOMEM; | |
2094 | goto err_port_untagged_vlans_alloc; | |
2095 | } | |
7f71eb46 | 2096 | INIT_LIST_HEAD(&mlxsw_sp_port->vports_list); |
763b4b70 | 2097 | INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list); |
56ade8fe JP |
2098 | |
2099 | mlxsw_sp_port->pcpu_stats = | |
2100 | netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats); | |
2101 | if (!mlxsw_sp_port->pcpu_stats) { | |
2102 | err = -ENOMEM; | |
2103 | goto err_alloc_stats; | |
2104 | } | |
2105 | ||
2106 | dev->netdev_ops = &mlxsw_sp_port_netdev_ops; | |
2107 | dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops; | |
2108 | ||
3247ff2b IS |
2109 | err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0); |
2110 | if (err) { | |
2111 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n", | |
2112 | mlxsw_sp_port->local_port); | |
2113 | goto err_port_swid_set; | |
2114 | } | |
2115 | ||
56ade8fe JP |
2116 | err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port); |
2117 | if (err) { | |
2118 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n", | |
2119 | mlxsw_sp_port->local_port); | |
2120 | goto err_dev_addr_init; | |
2121 | } | |
2122 | ||
2123 | netif_carrier_off(dev); | |
2124 | ||
2125 | dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG | | |
763b4b70 YG |
2126 | NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC; |
2127 | dev->hw_features |= NETIF_F_HW_TC; | |
56ade8fe JP |
2128 | |
2129 | /* Each packet needs to have a Tx header (metadata) on top all other | |
2130 | * headers. | |
2131 | */ | |
2132 | dev->hard_header_len += MLXSW_TXHDR_LEN; | |
2133 | ||
56ade8fe JP |
2134 | err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port); |
2135 | if (err) { | |
2136 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n", | |
2137 | mlxsw_sp_port->local_port); | |
2138 | goto err_port_system_port_mapping_set; | |
2139 | } | |
2140 | ||
18f1e70c IS |
2141 | err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width); |
2142 | if (err) { | |
2143 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n", | |
2144 | mlxsw_sp_port->local_port); | |
2145 | goto err_port_speed_by_width_set; | |
2146 | } | |
2147 | ||
56ade8fe JP |
2148 | err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN); |
2149 | if (err) { | |
2150 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n", | |
2151 | mlxsw_sp_port->local_port); | |
2152 | goto err_port_mtu_set; | |
2153 | } | |
2154 | ||
2155 | err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); | |
2156 | if (err) | |
2157 | goto err_port_admin_status_set; | |
2158 | ||
2159 | err = mlxsw_sp_port_buffers_init(mlxsw_sp_port); | |
2160 | if (err) { | |
2161 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n", | |
2162 | mlxsw_sp_port->local_port); | |
2163 | goto err_port_buffers_init; | |
2164 | } | |
2165 | ||
90183b98 IS |
2166 | err = mlxsw_sp_port_ets_init(mlxsw_sp_port); |
2167 | if (err) { | |
2168 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n", | |
2169 | mlxsw_sp_port->local_port); | |
2170 | goto err_port_ets_init; | |
2171 | } | |
2172 | ||
f00817df IS |
2173 | /* ETS and buffers must be initialized before DCB. */ |
2174 | err = mlxsw_sp_port_dcb_init(mlxsw_sp_port); | |
2175 | if (err) { | |
2176 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n", | |
2177 | mlxsw_sp_port->local_port); | |
2178 | goto err_port_dcb_init; | |
2179 | } | |
2180 | ||
05978481 IS |
2181 | err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port); |
2182 | if (err) { | |
2183 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n", | |
2184 | mlxsw_sp_port->local_port); | |
2185 | goto err_port_pvid_vport_create; | |
2186 | } | |
2187 | ||
56ade8fe | 2188 | mlxsw_sp_port_switchdev_init(mlxsw_sp_port); |
2f25844c | 2189 | mlxsw_sp->ports[local_port] = mlxsw_sp_port; |
56ade8fe JP |
2190 | err = register_netdev(dev); |
2191 | if (err) { | |
2192 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n", | |
2193 | mlxsw_sp_port->local_port); | |
2194 | goto err_register_netdev; | |
2195 | } | |
2196 | ||
932762b6 JP |
2197 | err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port, |
2198 | mlxsw_sp_port->local_port, dev, | |
2199 | mlxsw_sp_port->split, module); | |
2200 | if (err) { | |
2201 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n", | |
2202 | mlxsw_sp_port->local_port); | |
2203 | goto err_core_port_init; | |
2204 | } | |
c4745500 | 2205 | |
56ade8fe JP |
2206 | return 0; |
2207 | ||
932762b6 | 2208 | err_core_port_init: |
56ade8fe JP |
2209 | unregister_netdev(dev); |
2210 | err_register_netdev: | |
2f25844c | 2211 | mlxsw_sp->ports[local_port] = NULL; |
0583272d | 2212 | mlxsw_sp_port_switchdev_fini(mlxsw_sp_port); |
05978481 IS |
2213 | mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port); |
2214 | err_port_pvid_vport_create: | |
4de34eb5 | 2215 | mlxsw_sp_port_dcb_fini(mlxsw_sp_port); |
f00817df | 2216 | err_port_dcb_init: |
90183b98 | 2217 | err_port_ets_init: |
56ade8fe JP |
2218 | err_port_buffers_init: |
2219 | err_port_admin_status_set: | |
2220 | err_port_mtu_set: | |
18f1e70c | 2221 | err_port_speed_by_width_set: |
56ade8fe | 2222 | err_port_system_port_mapping_set: |
56ade8fe | 2223 | err_dev_addr_init: |
3247ff2b IS |
2224 | mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT); |
2225 | err_port_swid_set: | |
56ade8fe JP |
2226 | free_percpu(mlxsw_sp_port->pcpu_stats); |
2227 | err_alloc_stats: | |
fc1273af ER |
2228 | kfree(mlxsw_sp_port->untagged_vlans); |
2229 | err_port_untagged_vlans_alloc: | |
bd40e9d6 IS |
2230 | kfree(mlxsw_sp_port->active_vlans); |
2231 | err_port_active_vlans_alloc: | |
56ade8fe JP |
2232 | free_netdev(dev); |
2233 | return err; | |
2234 | } | |
2235 | ||
56ade8fe JP |
2236 | static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port) |
2237 | { | |
2238 | struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port]; | |
2239 | ||
2240 | if (!mlxsw_sp_port) | |
2241 | return; | |
932762b6 | 2242 | mlxsw_core_port_fini(&mlxsw_sp_port->core_port); |
56ade8fe | 2243 | unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */ |
2f25844c | 2244 | mlxsw_sp->ports[local_port] = NULL; |
0583272d | 2245 | mlxsw_sp_port_switchdev_fini(mlxsw_sp_port); |
05978481 | 2246 | mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port); |
f00817df | 2247 | mlxsw_sp_port_dcb_fini(mlxsw_sp_port); |
3e9b27b8 IS |
2248 | mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT); |
2249 | mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port); | |
56ade8fe | 2250 | free_percpu(mlxsw_sp_port->pcpu_stats); |
fc1273af | 2251 | kfree(mlxsw_sp_port->untagged_vlans); |
bd40e9d6 | 2252 | kfree(mlxsw_sp_port->active_vlans); |
32d863fb | 2253 | WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list)); |
56ade8fe JP |
2254 | free_netdev(mlxsw_sp_port->dev); |
2255 | } | |
2256 | ||
2257 | static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp) | |
2258 | { | |
2259 | int i; | |
2260 | ||
2261 | for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) | |
2262 | mlxsw_sp_port_remove(mlxsw_sp, i); | |
2263 | kfree(mlxsw_sp->ports); | |
2264 | } | |
2265 | ||
2266 | static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp) | |
2267 | { | |
d664b41e | 2268 | u8 module, width, lane; |
56ade8fe JP |
2269 | size_t alloc_size; |
2270 | int i; | |
2271 | int err; | |
2272 | ||
2273 | alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS; | |
2274 | mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL); | |
2275 | if (!mlxsw_sp->ports) | |
2276 | return -ENOMEM; | |
2277 | ||
2278 | for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) { | |
558c2d5e | 2279 | err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module, |
d664b41e | 2280 | &width, &lane); |
558c2d5e IS |
2281 | if (err) |
2282 | goto err_port_module_info_get; | |
2283 | if (!width) | |
2284 | continue; | |
2285 | mlxsw_sp->port_to_module[i] = module; | |
d664b41e IS |
2286 | err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width, |
2287 | lane); | |
56ade8fe JP |
2288 | if (err) |
2289 | goto err_port_create; | |
2290 | } | |
2291 | return 0; | |
2292 | ||
2293 | err_port_create: | |
558c2d5e | 2294 | err_port_module_info_get: |
56ade8fe JP |
2295 | for (i--; i >= 1; i--) |
2296 | mlxsw_sp_port_remove(mlxsw_sp, i); | |
2297 | kfree(mlxsw_sp->ports); | |
2298 | return err; | |
2299 | } | |
2300 | ||
18f1e70c IS |
2301 | static u8 mlxsw_sp_cluster_base_port_get(u8 local_port) |
2302 | { | |
2303 | u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX; | |
2304 | ||
2305 | return local_port - offset; | |
2306 | } | |
2307 | ||
be94535f IS |
2308 | static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port, |
2309 | u8 module, unsigned int count) | |
2310 | { | |
2311 | u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count; | |
2312 | int err, i; | |
2313 | ||
2314 | for (i = 0; i < count; i++) { | |
2315 | err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module, | |
2316 | width, i * width); | |
2317 | if (err) | |
2318 | goto err_port_module_map; | |
2319 | } | |
2320 | ||
2321 | for (i = 0; i < count; i++) { | |
2322 | err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0); | |
2323 | if (err) | |
2324 | goto err_port_swid_set; | |
2325 | } | |
2326 | ||
2327 | for (i = 0; i < count; i++) { | |
2328 | err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true, | |
d664b41e | 2329 | module, width, i * width); |
be94535f IS |
2330 | if (err) |
2331 | goto err_port_create; | |
2332 | } | |
2333 | ||
2334 | return 0; | |
2335 | ||
2336 | err_port_create: | |
2337 | for (i--; i >= 0; i--) | |
2338 | mlxsw_sp_port_remove(mlxsw_sp, base_port + i); | |
2339 | i = count; | |
2340 | err_port_swid_set: | |
2341 | for (i--; i >= 0; i--) | |
2342 | __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, | |
2343 | MLXSW_PORT_SWID_DISABLED_PORT); | |
2344 | i = count; | |
2345 | err_port_module_map: | |
2346 | for (i--; i >= 0; i--) | |
2347 | mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i); | |
2348 | return err; | |
2349 | } | |
2350 | ||
2351 | static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp, | |
2352 | u8 base_port, unsigned int count) | |
2353 | { | |
2354 | u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH; | |
2355 | int i; | |
2356 | ||
2357 | /* Split by four means we need to re-create two ports, otherwise | |
2358 | * only one. | |
2359 | */ | |
2360 | count = count / 2; | |
2361 | ||
2362 | for (i = 0; i < count; i++) { | |
2363 | local_port = base_port + i * 2; | |
2364 | module = mlxsw_sp->port_to_module[local_port]; | |
2365 | ||
2366 | mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width, | |
2367 | 0); | |
2368 | } | |
2369 | ||
2370 | for (i = 0; i < count; i++) | |
2371 | __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0); | |
2372 | ||
2373 | for (i = 0; i < count; i++) { | |
2374 | local_port = base_port + i * 2; | |
2375 | module = mlxsw_sp->port_to_module[local_port]; | |
2376 | ||
2377 | mlxsw_sp_port_create(mlxsw_sp, local_port, false, module, | |
d664b41e | 2378 | width, 0); |
be94535f IS |
2379 | } |
2380 | } | |
2381 | ||
b2f10571 JP |
2382 | static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port, |
2383 | unsigned int count) | |
18f1e70c | 2384 | { |
b2f10571 | 2385 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
18f1e70c | 2386 | struct mlxsw_sp_port *mlxsw_sp_port; |
18f1e70c IS |
2387 | u8 module, cur_width, base_port; |
2388 | int i; | |
2389 | int err; | |
2390 | ||
2391 | mlxsw_sp_port = mlxsw_sp->ports[local_port]; | |
2392 | if (!mlxsw_sp_port) { | |
2393 | dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n", | |
2394 | local_port); | |
2395 | return -EINVAL; | |
2396 | } | |
2397 | ||
d664b41e IS |
2398 | module = mlxsw_sp_port->mapping.module; |
2399 | cur_width = mlxsw_sp_port->mapping.width; | |
2400 | ||
18f1e70c IS |
2401 | if (count != 2 && count != 4) { |
2402 | netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n"); | |
2403 | return -EINVAL; | |
2404 | } | |
2405 | ||
18f1e70c IS |
2406 | if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) { |
2407 | netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n"); | |
2408 | return -EINVAL; | |
2409 | } | |
2410 | ||
2411 | /* Make sure we have enough slave (even) ports for the split. */ | |
2412 | if (count == 2) { | |
2413 | base_port = local_port; | |
2414 | if (mlxsw_sp->ports[base_port + 1]) { | |
2415 | netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n"); | |
2416 | return -EINVAL; | |
2417 | } | |
2418 | } else { | |
2419 | base_port = mlxsw_sp_cluster_base_port_get(local_port); | |
2420 | if (mlxsw_sp->ports[base_port + 1] || | |
2421 | mlxsw_sp->ports[base_port + 3]) { | |
2422 | netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n"); | |
2423 | return -EINVAL; | |
2424 | } | |
2425 | } | |
2426 | ||
2427 | for (i = 0; i < count; i++) | |
2428 | mlxsw_sp_port_remove(mlxsw_sp, base_port + i); | |
2429 | ||
be94535f IS |
2430 | err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count); |
2431 | if (err) { | |
2432 | dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n"); | |
2433 | goto err_port_split_create; | |
18f1e70c IS |
2434 | } |
2435 | ||
2436 | return 0; | |
2437 | ||
be94535f IS |
2438 | err_port_split_create: |
2439 | mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count); | |
18f1e70c IS |
2440 | return err; |
2441 | } | |
2442 | ||
b2f10571 | 2443 | static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port) |
18f1e70c | 2444 | { |
b2f10571 | 2445 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
18f1e70c | 2446 | struct mlxsw_sp_port *mlxsw_sp_port; |
d664b41e | 2447 | u8 cur_width, base_port; |
18f1e70c IS |
2448 | unsigned int count; |
2449 | int i; | |
18f1e70c IS |
2450 | |
2451 | mlxsw_sp_port = mlxsw_sp->ports[local_port]; | |
2452 | if (!mlxsw_sp_port) { | |
2453 | dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n", | |
2454 | local_port); | |
2455 | return -EINVAL; | |
2456 | } | |
2457 | ||
2458 | if (!mlxsw_sp_port->split) { | |
2459 | netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n"); | |
2460 | return -EINVAL; | |
2461 | } | |
2462 | ||
d664b41e | 2463 | cur_width = mlxsw_sp_port->mapping.width; |
18f1e70c IS |
2464 | count = cur_width == 1 ? 4 : 2; |
2465 | ||
2466 | base_port = mlxsw_sp_cluster_base_port_get(local_port); | |
2467 | ||
2468 | /* Determine which ports to remove. */ | |
2469 | if (count == 2 && local_port >= base_port + 2) | |
2470 | base_port = base_port + 2; | |
2471 | ||
2472 | for (i = 0; i < count; i++) | |
2473 | mlxsw_sp_port_remove(mlxsw_sp, base_port + i); | |
2474 | ||
be94535f | 2475 | mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count); |
18f1e70c IS |
2476 | |
2477 | return 0; | |
2478 | } | |
2479 | ||
56ade8fe JP |
2480 | static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg, |
2481 | char *pude_pl, void *priv) | |
2482 | { | |
2483 | struct mlxsw_sp *mlxsw_sp = priv; | |
2484 | struct mlxsw_sp_port *mlxsw_sp_port; | |
2485 | enum mlxsw_reg_pude_oper_status status; | |
2486 | u8 local_port; | |
2487 | ||
2488 | local_port = mlxsw_reg_pude_local_port_get(pude_pl); | |
2489 | mlxsw_sp_port = mlxsw_sp->ports[local_port]; | |
bbf2a475 | 2490 | if (!mlxsw_sp_port) |
56ade8fe | 2491 | return; |
56ade8fe JP |
2492 | |
2493 | status = mlxsw_reg_pude_oper_status_get(pude_pl); | |
2494 | if (status == MLXSW_PORT_OPER_STATUS_UP) { | |
2495 | netdev_info(mlxsw_sp_port->dev, "link up\n"); | |
2496 | netif_carrier_on(mlxsw_sp_port->dev); | |
2497 | } else { | |
2498 | netdev_info(mlxsw_sp_port->dev, "link down\n"); | |
2499 | netif_carrier_off(mlxsw_sp_port->dev); | |
2500 | } | |
2501 | } | |
2502 | ||
2503 | static struct mlxsw_event_listener mlxsw_sp_pude_event = { | |
2504 | .func = mlxsw_sp_pude_event_func, | |
2505 | .trap_id = MLXSW_TRAP_ID_PUDE, | |
2506 | }; | |
2507 | ||
2508 | static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp, | |
2509 | enum mlxsw_event_trap_id trap_id) | |
2510 | { | |
2511 | struct mlxsw_event_listener *el; | |
2512 | char hpkt_pl[MLXSW_REG_HPKT_LEN]; | |
2513 | int err; | |
2514 | ||
2515 | switch (trap_id) { | |
2516 | case MLXSW_TRAP_ID_PUDE: | |
2517 | el = &mlxsw_sp_pude_event; | |
2518 | break; | |
2519 | } | |
2520 | err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp); | |
2521 | if (err) | |
2522 | return err; | |
2523 | ||
2524 | mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id); | |
2525 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); | |
2526 | if (err) | |
2527 | goto err_event_trap_set; | |
2528 | ||
2529 | return 0; | |
2530 | ||
2531 | err_event_trap_set: | |
2532 | mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp); | |
2533 | return err; | |
2534 | } | |
2535 | ||
2536 | static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp, | |
2537 | enum mlxsw_event_trap_id trap_id) | |
2538 | { | |
2539 | struct mlxsw_event_listener *el; | |
2540 | ||
2541 | switch (trap_id) { | |
2542 | case MLXSW_TRAP_ID_PUDE: | |
2543 | el = &mlxsw_sp_pude_event; | |
2544 | break; | |
2545 | } | |
2546 | mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp); | |
2547 | } | |
2548 | ||
2549 | static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port, | |
2550 | void *priv) | |
2551 | { | |
2552 | struct mlxsw_sp *mlxsw_sp = priv; | |
2553 | struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port]; | |
2554 | struct mlxsw_sp_port_pcpu_stats *pcpu_stats; | |
2555 | ||
2556 | if (unlikely(!mlxsw_sp_port)) { | |
2557 | dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n", | |
2558 | local_port); | |
2559 | return; | |
2560 | } | |
2561 | ||
2562 | skb->dev = mlxsw_sp_port->dev; | |
2563 | ||
2564 | pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats); | |
2565 | u64_stats_update_begin(&pcpu_stats->syncp); | |
2566 | pcpu_stats->rx_packets++; | |
2567 | pcpu_stats->rx_bytes += skb->len; | |
2568 | u64_stats_update_end(&pcpu_stats->syncp); | |
2569 | ||
2570 | skb->protocol = eth_type_trans(skb, skb->dev); | |
2571 | netif_receive_skb(skb); | |
2572 | } | |
2573 | ||
2574 | static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = { | |
2575 | { | |
2576 | .func = mlxsw_sp_rx_listener_func, | |
2577 | .local_port = MLXSW_PORT_DONT_CARE, | |
2578 | .trap_id = MLXSW_TRAP_ID_FDB_MC, | |
2579 | }, | |
2580 | /* Traps for specific L2 packet types, not trapped as FDB MC */ | |
2581 | { | |
2582 | .func = mlxsw_sp_rx_listener_func, | |
2583 | .local_port = MLXSW_PORT_DONT_CARE, | |
2584 | .trap_id = MLXSW_TRAP_ID_STP, | |
2585 | }, | |
2586 | { | |
2587 | .func = mlxsw_sp_rx_listener_func, | |
2588 | .local_port = MLXSW_PORT_DONT_CARE, | |
2589 | .trap_id = MLXSW_TRAP_ID_LACP, | |
2590 | }, | |
2591 | { | |
2592 | .func = mlxsw_sp_rx_listener_func, | |
2593 | .local_port = MLXSW_PORT_DONT_CARE, | |
2594 | .trap_id = MLXSW_TRAP_ID_EAPOL, | |
2595 | }, | |
2596 | { | |
2597 | .func = mlxsw_sp_rx_listener_func, | |
2598 | .local_port = MLXSW_PORT_DONT_CARE, | |
2599 | .trap_id = MLXSW_TRAP_ID_LLDP, | |
2600 | }, | |
2601 | { | |
2602 | .func = mlxsw_sp_rx_listener_func, | |
2603 | .local_port = MLXSW_PORT_DONT_CARE, | |
2604 | .trap_id = MLXSW_TRAP_ID_MMRP, | |
2605 | }, | |
2606 | { | |
2607 | .func = mlxsw_sp_rx_listener_func, | |
2608 | .local_port = MLXSW_PORT_DONT_CARE, | |
2609 | .trap_id = MLXSW_TRAP_ID_MVRP, | |
2610 | }, | |
2611 | { | |
2612 | .func = mlxsw_sp_rx_listener_func, | |
2613 | .local_port = MLXSW_PORT_DONT_CARE, | |
2614 | .trap_id = MLXSW_TRAP_ID_RPVST, | |
2615 | }, | |
2616 | { | |
2617 | .func = mlxsw_sp_rx_listener_func, | |
2618 | .local_port = MLXSW_PORT_DONT_CARE, | |
2619 | .trap_id = MLXSW_TRAP_ID_DHCP, | |
2620 | }, | |
2621 | { | |
2622 | .func = mlxsw_sp_rx_listener_func, | |
2623 | .local_port = MLXSW_PORT_DONT_CARE, | |
2624 | .trap_id = MLXSW_TRAP_ID_IGMP_QUERY, | |
2625 | }, | |
2626 | { | |
2627 | .func = mlxsw_sp_rx_listener_func, | |
2628 | .local_port = MLXSW_PORT_DONT_CARE, | |
2629 | .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT, | |
2630 | }, | |
2631 | { | |
2632 | .func = mlxsw_sp_rx_listener_func, | |
2633 | .local_port = MLXSW_PORT_DONT_CARE, | |
2634 | .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT, | |
2635 | }, | |
2636 | { | |
2637 | .func = mlxsw_sp_rx_listener_func, | |
2638 | .local_port = MLXSW_PORT_DONT_CARE, | |
2639 | .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE, | |
2640 | }, | |
2641 | { | |
2642 | .func = mlxsw_sp_rx_listener_func, | |
2643 | .local_port = MLXSW_PORT_DONT_CARE, | |
2644 | .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT, | |
2645 | }, | |
7b27ce7b JP |
2646 | { |
2647 | .func = mlxsw_sp_rx_listener_func, | |
2648 | .local_port = MLXSW_PORT_DONT_CARE, | |
2649 | .trap_id = MLXSW_TRAP_ID_ARPBC, | |
2650 | }, | |
2651 | { | |
2652 | .func = mlxsw_sp_rx_listener_func, | |
2653 | .local_port = MLXSW_PORT_DONT_CARE, | |
2654 | .trap_id = MLXSW_TRAP_ID_ARPUC, | |
2655 | }, | |
c20b8018 ER |
2656 | { |
2657 | .func = mlxsw_sp_rx_listener_func, | |
2658 | .local_port = MLXSW_PORT_DONT_CARE, | |
2659 | .trap_id = MLXSW_TRAP_ID_MTUERROR, | |
2660 | }, | |
2661 | { | |
2662 | .func = mlxsw_sp_rx_listener_func, | |
2663 | .local_port = MLXSW_PORT_DONT_CARE, | |
2664 | .trap_id = MLXSW_TRAP_ID_TTLERROR, | |
2665 | }, | |
a94a614f IS |
2666 | { |
2667 | .func = mlxsw_sp_rx_listener_func, | |
2668 | .local_port = MLXSW_PORT_DONT_CARE, | |
2669 | .trap_id = MLXSW_TRAP_ID_LBERROR, | |
2670 | }, | |
c20b8018 ER |
2671 | { |
2672 | .func = mlxsw_sp_rx_listener_func, | |
2673 | .local_port = MLXSW_PORT_DONT_CARE, | |
2674 | .trap_id = MLXSW_TRAP_ID_OSPF, | |
2675 | }, | |
7b27ce7b JP |
2676 | { |
2677 | .func = mlxsw_sp_rx_listener_func, | |
2678 | .local_port = MLXSW_PORT_DONT_CARE, | |
2679 | .trap_id = MLXSW_TRAP_ID_IP2ME, | |
2680 | }, | |
2681 | { | |
2682 | .func = mlxsw_sp_rx_listener_func, | |
2683 | .local_port = MLXSW_PORT_DONT_CARE, | |
2684 | .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0, | |
2685 | }, | |
2686 | { | |
2687 | .func = mlxsw_sp_rx_listener_func, | |
2688 | .local_port = MLXSW_PORT_DONT_CARE, | |
2689 | .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4, | |
2690 | }, | |
56ade8fe JP |
2691 | }; |
2692 | ||
2693 | static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp) | |
2694 | { | |
2695 | char htgt_pl[MLXSW_REG_HTGT_LEN]; | |
2696 | char hpkt_pl[MLXSW_REG_HPKT_LEN]; | |
2697 | int i; | |
2698 | int err; | |
2699 | ||
2700 | mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX); | |
2701 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl); | |
2702 | if (err) | |
2703 | return err; | |
2704 | ||
2705 | mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL); | |
2706 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl); | |
2707 | if (err) | |
2708 | return err; | |
2709 | ||
2710 | for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) { | |
2711 | err = mlxsw_core_rx_listener_register(mlxsw_sp->core, | |
2712 | &mlxsw_sp_rx_listener[i], | |
2713 | mlxsw_sp); | |
2714 | if (err) | |
2715 | goto err_rx_listener_register; | |
2716 | ||
2717 | mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, | |
2718 | mlxsw_sp_rx_listener[i].trap_id); | |
2719 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); | |
2720 | if (err) | |
2721 | goto err_rx_trap_set; | |
2722 | } | |
2723 | return 0; | |
2724 | ||
2725 | err_rx_trap_set: | |
2726 | mlxsw_core_rx_listener_unregister(mlxsw_sp->core, | |
2727 | &mlxsw_sp_rx_listener[i], | |
2728 | mlxsw_sp); | |
2729 | err_rx_listener_register: | |
2730 | for (i--; i >= 0; i--) { | |
10f00aa1 | 2731 | mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD, |
56ade8fe JP |
2732 | mlxsw_sp_rx_listener[i].trap_id); |
2733 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); | |
2734 | ||
2735 | mlxsw_core_rx_listener_unregister(mlxsw_sp->core, | |
2736 | &mlxsw_sp_rx_listener[i], | |
2737 | mlxsw_sp); | |
2738 | } | |
2739 | return err; | |
2740 | } | |
2741 | ||
2742 | static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp) | |
2743 | { | |
2744 | char hpkt_pl[MLXSW_REG_HPKT_LEN]; | |
2745 | int i; | |
2746 | ||
2747 | for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) { | |
10f00aa1 | 2748 | mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD, |
56ade8fe JP |
2749 | mlxsw_sp_rx_listener[i].trap_id); |
2750 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); | |
2751 | ||
2752 | mlxsw_core_rx_listener_unregister(mlxsw_sp->core, | |
2753 | &mlxsw_sp_rx_listener[i], | |
2754 | mlxsw_sp); | |
2755 | } | |
2756 | } | |
2757 | ||
2758 | static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core, | |
2759 | enum mlxsw_reg_sfgc_type type, | |
2760 | enum mlxsw_reg_sfgc_bridge_type bridge_type) | |
2761 | { | |
2762 | enum mlxsw_flood_table_type table_type; | |
2763 | enum mlxsw_sp_flood_table flood_table; | |
2764 | char sfgc_pl[MLXSW_REG_SFGC_LEN]; | |
2765 | ||
19ae6124 | 2766 | if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID) |
56ade8fe | 2767 | table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID; |
19ae6124 | 2768 | else |
56ade8fe | 2769 | table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST; |
19ae6124 IS |
2770 | |
2771 | if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST) | |
2772 | flood_table = MLXSW_SP_FLOOD_TABLE_UC; | |
2773 | else | |
2774 | flood_table = MLXSW_SP_FLOOD_TABLE_BM; | |
56ade8fe JP |
2775 | |
2776 | mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type, | |
2777 | flood_table); | |
2778 | return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl); | |
2779 | } | |
2780 | ||
2781 | static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp) | |
2782 | { | |
2783 | int type, err; | |
2784 | ||
56ade8fe JP |
2785 | for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) { |
2786 | if (type == MLXSW_REG_SFGC_TYPE_RESERVED) | |
2787 | continue; | |
2788 | ||
2789 | err = __mlxsw_sp_flood_init(mlxsw_sp->core, type, | |
2790 | MLXSW_REG_SFGC_BRIDGE_TYPE_VFID); | |
2791 | if (err) | |
2792 | return err; | |
56ade8fe JP |
2793 | |
2794 | err = __mlxsw_sp_flood_init(mlxsw_sp->core, type, | |
2795 | MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID); | |
2796 | if (err) | |
2797 | return err; | |
2798 | } | |
2799 | ||
2800 | return 0; | |
2801 | } | |
2802 | ||
0d65fc13 JP |
2803 | static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp) |
2804 | { | |
2805 | char slcr_pl[MLXSW_REG_SLCR_LEN]; | |
2806 | ||
2807 | mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC | | |
2808 | MLXSW_REG_SLCR_LAG_HASH_DMAC | | |
2809 | MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE | | |
2810 | MLXSW_REG_SLCR_LAG_HASH_VLANID | | |
2811 | MLXSW_REG_SLCR_LAG_HASH_SIP | | |
2812 | MLXSW_REG_SLCR_LAG_HASH_DIP | | |
2813 | MLXSW_REG_SLCR_LAG_HASH_SPORT | | |
2814 | MLXSW_REG_SLCR_LAG_HASH_DPORT | | |
2815 | MLXSW_REG_SLCR_LAG_HASH_IPPROTO); | |
2816 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); | |
2817 | } | |
2818 | ||
b2f10571 | 2819 | static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core, |
56ade8fe JP |
2820 | const struct mlxsw_bus_info *mlxsw_bus_info) |
2821 | { | |
b2f10571 | 2822 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
56ade8fe JP |
2823 | int err; |
2824 | ||
2825 | mlxsw_sp->core = mlxsw_core; | |
2826 | mlxsw_sp->bus_info = mlxsw_bus_info; | |
14d39461 | 2827 | INIT_LIST_HEAD(&mlxsw_sp->fids); |
3ba2ebf4 | 2828 | INIT_LIST_HEAD(&mlxsw_sp->vfids.list); |
3a49b4fd | 2829 | INIT_LIST_HEAD(&mlxsw_sp->br_mids.list); |
56ade8fe JP |
2830 | |
2831 | err = mlxsw_sp_base_mac_get(mlxsw_sp); | |
2832 | if (err) { | |
2833 | dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n"); | |
2834 | return err; | |
2835 | } | |
2836 | ||
56ade8fe JP |
2837 | err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE); |
2838 | if (err) { | |
2839 | dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n"); | |
bbf2a475 | 2840 | return err; |
56ade8fe JP |
2841 | } |
2842 | ||
2843 | err = mlxsw_sp_traps_init(mlxsw_sp); | |
2844 | if (err) { | |
2845 | dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n"); | |
2846 | goto err_rx_listener_register; | |
2847 | } | |
2848 | ||
2849 | err = mlxsw_sp_flood_init(mlxsw_sp); | |
2850 | if (err) { | |
2851 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n"); | |
2852 | goto err_flood_init; | |
2853 | } | |
2854 | ||
2855 | err = mlxsw_sp_buffers_init(mlxsw_sp); | |
2856 | if (err) { | |
2857 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n"); | |
2858 | goto err_buffers_init; | |
2859 | } | |
2860 | ||
0d65fc13 JP |
2861 | err = mlxsw_sp_lag_init(mlxsw_sp); |
2862 | if (err) { | |
2863 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n"); | |
2864 | goto err_lag_init; | |
2865 | } | |
2866 | ||
56ade8fe JP |
2867 | err = mlxsw_sp_switchdev_init(mlxsw_sp); |
2868 | if (err) { | |
2869 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n"); | |
2870 | goto err_switchdev_init; | |
2871 | } | |
2872 | ||
464dce18 IS |
2873 | err = mlxsw_sp_router_init(mlxsw_sp); |
2874 | if (err) { | |
2875 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n"); | |
2876 | goto err_router_init; | |
2877 | } | |
2878 | ||
763b4b70 YG |
2879 | err = mlxsw_sp_span_init(mlxsw_sp); |
2880 | if (err) { | |
2881 | dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n"); | |
2882 | goto err_span_init; | |
2883 | } | |
2884 | ||
bbf2a475 IS |
2885 | err = mlxsw_sp_ports_create(mlxsw_sp); |
2886 | if (err) { | |
2887 | dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n"); | |
2888 | goto err_ports_create; | |
2889 | } | |
2890 | ||
56ade8fe JP |
2891 | return 0; |
2892 | ||
bbf2a475 | 2893 | err_ports_create: |
763b4b70 YG |
2894 | mlxsw_sp_span_fini(mlxsw_sp); |
2895 | err_span_init: | |
464dce18 IS |
2896 | mlxsw_sp_router_fini(mlxsw_sp); |
2897 | err_router_init: | |
bbf2a475 | 2898 | mlxsw_sp_switchdev_fini(mlxsw_sp); |
56ade8fe | 2899 | err_switchdev_init: |
0d65fc13 | 2900 | err_lag_init: |
0f433fa0 | 2901 | mlxsw_sp_buffers_fini(mlxsw_sp); |
56ade8fe JP |
2902 | err_buffers_init: |
2903 | err_flood_init: | |
2904 | mlxsw_sp_traps_fini(mlxsw_sp); | |
2905 | err_rx_listener_register: | |
2906 | mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE); | |
56ade8fe JP |
2907 | return err; |
2908 | } | |
2909 | ||
b2f10571 | 2910 | static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core) |
56ade8fe | 2911 | { |
b2f10571 | 2912 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
fa3054f5 | 2913 | int i; |
56ade8fe | 2914 | |
bbf2a475 | 2915 | mlxsw_sp_ports_remove(mlxsw_sp); |
763b4b70 | 2916 | mlxsw_sp_span_fini(mlxsw_sp); |
464dce18 | 2917 | mlxsw_sp_router_fini(mlxsw_sp); |
56ade8fe | 2918 | mlxsw_sp_switchdev_fini(mlxsw_sp); |
5113bfdb | 2919 | mlxsw_sp_buffers_fini(mlxsw_sp); |
56ade8fe JP |
2920 | mlxsw_sp_traps_fini(mlxsw_sp); |
2921 | mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE); | |
3ba2ebf4 | 2922 | WARN_ON(!list_empty(&mlxsw_sp->vfids.list)); |
14d39461 | 2923 | WARN_ON(!list_empty(&mlxsw_sp->fids)); |
fa3054f5 IS |
2924 | for (i = 0; i < MLXSW_SP_RIF_MAX; i++) |
2925 | WARN_ON_ONCE(mlxsw_sp->rifs[i]); | |
56ade8fe JP |
2926 | } |
2927 | ||
2928 | static struct mlxsw_config_profile mlxsw_sp_config_profile = { | |
2929 | .used_max_vepa_channels = 1, | |
2930 | .max_vepa_channels = 0, | |
2931 | .used_max_lag = 1, | |
0d65fc13 | 2932 | .max_lag = MLXSW_SP_LAG_MAX, |
56ade8fe | 2933 | .used_max_port_per_lag = 1, |
0d65fc13 | 2934 | .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX, |
56ade8fe | 2935 | .used_max_mid = 1, |
53ae6283 | 2936 | .max_mid = MLXSW_SP_MID_MAX, |
56ade8fe JP |
2937 | .used_max_pgt = 1, |
2938 | .max_pgt = 0, | |
2939 | .used_max_system_port = 1, | |
2940 | .max_system_port = 64, | |
2941 | .used_max_vlan_groups = 1, | |
2942 | .max_vlan_groups = 127, | |
2943 | .used_max_regions = 1, | |
2944 | .max_regions = 400, | |
2945 | .used_flood_tables = 1, | |
2946 | .used_flood_mode = 1, | |
2947 | .flood_mode = 3, | |
2948 | .max_fid_offset_flood_tables = 2, | |
2949 | .fid_offset_flood_table_size = VLAN_N_VID - 1, | |
19ae6124 IS |
2950 | .max_fid_flood_tables = 2, |
2951 | .fid_flood_table_size = MLXSW_SP_VFID_MAX, | |
56ade8fe JP |
2952 | .used_max_ib_mc = 1, |
2953 | .max_ib_mc = 0, | |
2954 | .used_max_pkey = 1, | |
2955 | .max_pkey = 0, | |
c6022427 JP |
2956 | .used_kvd_sizes = 1, |
2957 | .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE, | |
2958 | .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE, | |
2959 | .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE, | |
56ade8fe JP |
2960 | .swid_config = { |
2961 | { | |
2962 | .used_type = 1, | |
2963 | .type = MLXSW_PORT_SWID_TYPE_ETH, | |
2964 | } | |
2965 | }, | |
57d316ba | 2966 | .resource_query_enable = 1, |
56ade8fe JP |
2967 | }; |
2968 | ||
2969 | static struct mlxsw_driver mlxsw_sp_driver = { | |
2d0ed39f JP |
2970 | .kind = MLXSW_DEVICE_KIND_SPECTRUM, |
2971 | .owner = THIS_MODULE, | |
2972 | .priv_size = sizeof(struct mlxsw_sp), | |
2973 | .init = mlxsw_sp_init, | |
2974 | .fini = mlxsw_sp_fini, | |
2975 | .port_split = mlxsw_sp_port_split, | |
2976 | .port_unsplit = mlxsw_sp_port_unsplit, | |
2977 | .sb_pool_get = mlxsw_sp_sb_pool_get, | |
2978 | .sb_pool_set = mlxsw_sp_sb_pool_set, | |
2979 | .sb_port_pool_get = mlxsw_sp_sb_port_pool_get, | |
2980 | .sb_port_pool_set = mlxsw_sp_sb_port_pool_set, | |
2981 | .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get, | |
2982 | .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set, | |
2983 | .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot, | |
2984 | .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear, | |
2985 | .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get, | |
2986 | .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get, | |
2987 | .txhdr_construct = mlxsw_sp_txhdr_construct, | |
2988 | .txhdr_len = MLXSW_TXHDR_LEN, | |
2989 | .profile = &mlxsw_sp_config_profile, | |
56ade8fe JP |
2990 | }; |
2991 | ||
7ce856aa JP |
2992 | static bool mlxsw_sp_port_dev_check(const struct net_device *dev) |
2993 | { | |
2994 | return dev->netdev_ops == &mlxsw_sp_port_netdev_ops; | |
2995 | } | |
2996 | ||
2997 | static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev) | |
2998 | { | |
2999 | struct net_device *lower_dev; | |
3000 | struct list_head *iter; | |
3001 | ||
3002 | if (mlxsw_sp_port_dev_check(dev)) | |
3003 | return netdev_priv(dev); | |
3004 | ||
3005 | netdev_for_each_all_lower_dev(dev, lower_dev, iter) { | |
3006 | if (mlxsw_sp_port_dev_check(lower_dev)) | |
3007 | return netdev_priv(lower_dev); | |
3008 | } | |
3009 | return NULL; | |
3010 | } | |
3011 | ||
3012 | static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev) | |
3013 | { | |
3014 | struct mlxsw_sp_port *mlxsw_sp_port; | |
3015 | ||
3016 | mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev); | |
3017 | return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL; | |
3018 | } | |
3019 | ||
3020 | static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev) | |
3021 | { | |
3022 | struct net_device *lower_dev; | |
3023 | struct list_head *iter; | |
3024 | ||
3025 | if (mlxsw_sp_port_dev_check(dev)) | |
3026 | return netdev_priv(dev); | |
3027 | ||
3028 | netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) { | |
3029 | if (mlxsw_sp_port_dev_check(lower_dev)) | |
3030 | return netdev_priv(lower_dev); | |
3031 | } | |
3032 | return NULL; | |
3033 | } | |
3034 | ||
3035 | struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev) | |
3036 | { | |
3037 | struct mlxsw_sp_port *mlxsw_sp_port; | |
3038 | ||
3039 | rcu_read_lock(); | |
3040 | mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev); | |
3041 | if (mlxsw_sp_port) | |
3042 | dev_hold(mlxsw_sp_port->dev); | |
3043 | rcu_read_unlock(); | |
3044 | return mlxsw_sp_port; | |
3045 | } | |
3046 | ||
3047 | void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port) | |
3048 | { | |
3049 | dev_put(mlxsw_sp_port->dev); | |
3050 | } | |
3051 | ||
99724c18 IS |
3052 | static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r, |
3053 | unsigned long event) | |
3054 | { | |
3055 | switch (event) { | |
3056 | case NETDEV_UP: | |
3057 | if (!r) | |
3058 | return true; | |
3059 | r->ref_count++; | |
3060 | return false; | |
3061 | case NETDEV_DOWN: | |
3062 | if (r && --r->ref_count == 0) | |
3063 | return true; | |
3064 | /* It is possible we already removed the RIF ourselves | |
3065 | * if it was assigned to a netdev that is now a bridge | |
3066 | * or LAG slave. | |
3067 | */ | |
3068 | return false; | |
3069 | } | |
3070 | ||
3071 | return false; | |
3072 | } | |
3073 | ||
3074 | static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp) | |
3075 | { | |
3076 | int i; | |
3077 | ||
3078 | for (i = 0; i < MLXSW_SP_RIF_MAX; i++) | |
3079 | if (!mlxsw_sp->rifs[i]) | |
3080 | return i; | |
3081 | ||
3082 | return MLXSW_SP_RIF_MAX; | |
3083 | } | |
3084 | ||
3085 | static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport, | |
3086 | bool *p_lagged, u16 *p_system_port) | |
3087 | { | |
3088 | u8 local_port = mlxsw_sp_vport->local_port; | |
3089 | ||
3090 | *p_lagged = mlxsw_sp_vport->lagged; | |
3091 | *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port; | |
3092 | } | |
3093 | ||
3094 | static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport, | |
3095 | struct net_device *l3_dev, u16 rif, | |
3096 | bool create) | |
3097 | { | |
3098 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; | |
3099 | bool lagged = mlxsw_sp_vport->lagged; | |
3100 | char ritr_pl[MLXSW_REG_RITR_LEN]; | |
3101 | u16 system_port; | |
3102 | ||
3103 | mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif, | |
3104 | l3_dev->mtu, l3_dev->dev_addr); | |
3105 | ||
3106 | mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port); | |
3107 | mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port, | |
3108 | mlxsw_sp_vport_vid_get(mlxsw_sp_vport)); | |
3109 | ||
3110 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); | |
3111 | } | |
3112 | ||
3113 | static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport); | |
3114 | ||
3115 | static struct mlxsw_sp_fid * | |
3116 | mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev) | |
3117 | { | |
3118 | struct mlxsw_sp_fid *f; | |
3119 | ||
3120 | f = kzalloc(sizeof(*f), GFP_KERNEL); | |
3121 | if (!f) | |
3122 | return NULL; | |
3123 | ||
3124 | f->leave = mlxsw_sp_vport_rif_sp_leave; | |
3125 | f->ref_count = 0; | |
3126 | f->dev = l3_dev; | |
3127 | f->fid = fid; | |
3128 | ||
3129 | return f; | |
3130 | } | |
3131 | ||
3132 | static struct mlxsw_sp_rif * | |
3133 | mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f) | |
3134 | { | |
3135 | struct mlxsw_sp_rif *r; | |
3136 | ||
3137 | r = kzalloc(sizeof(*r), GFP_KERNEL); | |
3138 | if (!r) | |
3139 | return NULL; | |
3140 | ||
3141 | ether_addr_copy(r->addr, l3_dev->dev_addr); | |
3142 | r->mtu = l3_dev->mtu; | |
3143 | r->ref_count = 1; | |
3144 | r->dev = l3_dev; | |
3145 | r->rif = rif; | |
3146 | r->f = f; | |
3147 | ||
3148 | return r; | |
3149 | } | |
3150 | ||
3151 | static struct mlxsw_sp_rif * | |
3152 | mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport, | |
3153 | struct net_device *l3_dev) | |
3154 | { | |
3155 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; | |
3156 | struct mlxsw_sp_fid *f; | |
3157 | struct mlxsw_sp_rif *r; | |
3158 | u16 fid, rif; | |
3159 | int err; | |
3160 | ||
3161 | rif = mlxsw_sp_avail_rif_get(mlxsw_sp); | |
3162 | if (rif == MLXSW_SP_RIF_MAX) | |
3163 | return ERR_PTR(-ERANGE); | |
3164 | ||
3165 | err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true); | |
3166 | if (err) | |
3167 | return ERR_PTR(err); | |
3168 | ||
3169 | fid = mlxsw_sp_rif_sp_to_fid(rif); | |
3170 | err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true); | |
3171 | if (err) | |
3172 | goto err_rif_fdb_op; | |
3173 | ||
3174 | f = mlxsw_sp_rfid_alloc(fid, l3_dev); | |
3175 | if (!f) { | |
3176 | err = -ENOMEM; | |
3177 | goto err_rfid_alloc; | |
3178 | } | |
3179 | ||
3180 | r = mlxsw_sp_rif_alloc(rif, l3_dev, f); | |
3181 | if (!r) { | |
3182 | err = -ENOMEM; | |
3183 | goto err_rif_alloc; | |
3184 | } | |
3185 | ||
3186 | f->r = r; | |
3187 | mlxsw_sp->rifs[rif] = r; | |
3188 | ||
3189 | return r; | |
3190 | ||
3191 | err_rif_alloc: | |
3192 | kfree(f); | |
3193 | err_rfid_alloc: | |
3194 | mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false); | |
3195 | err_rif_fdb_op: | |
3196 | mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false); | |
3197 | return ERR_PTR(err); | |
3198 | } | |
3199 | ||
3200 | static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport, | |
3201 | struct mlxsw_sp_rif *r) | |
3202 | { | |
3203 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; | |
3204 | struct net_device *l3_dev = r->dev; | |
3205 | struct mlxsw_sp_fid *f = r->f; | |
3206 | u16 fid = f->fid; | |
3207 | u16 rif = r->rif; | |
3208 | ||
3209 | mlxsw_sp->rifs[rif] = NULL; | |
3210 | f->r = NULL; | |
3211 | ||
3212 | kfree(r); | |
3213 | ||
3214 | kfree(f); | |
3215 | ||
3216 | mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false); | |
3217 | ||
3218 | mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false); | |
3219 | } | |
3220 | ||
3221 | static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport, | |
3222 | struct net_device *l3_dev) | |
3223 | { | |
3224 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; | |
3225 | struct mlxsw_sp_rif *r; | |
3226 | ||
3227 | r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev); | |
3228 | if (!r) { | |
3229 | r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev); | |
3230 | if (IS_ERR(r)) | |
3231 | return PTR_ERR(r); | |
3232 | } | |
3233 | ||
3234 | mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f); | |
3235 | r->f->ref_count++; | |
3236 | ||
3237 | netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid); | |
3238 | ||
3239 | return 0; | |
3240 | } | |
3241 | ||
3242 | static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport) | |
3243 | { | |
3244 | struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); | |
3245 | ||
3246 | netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid); | |
3247 | ||
3248 | mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL); | |
3249 | if (--f->ref_count == 0) | |
3250 | mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r); | |
3251 | } | |
3252 | ||
3253 | static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev, | |
3254 | struct net_device *port_dev, | |
3255 | unsigned long event, u16 vid) | |
3256 | { | |
3257 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev); | |
3258 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
3259 | ||
3260 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); | |
3261 | if (WARN_ON(!mlxsw_sp_vport)) | |
3262 | return -EINVAL; | |
3263 | ||
3264 | switch (event) { | |
3265 | case NETDEV_UP: | |
3266 | return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev); | |
3267 | case NETDEV_DOWN: | |
3268 | mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport); | |
3269 | break; | |
3270 | } | |
3271 | ||
3272 | return 0; | |
3273 | } | |
3274 | ||
3275 | static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev, | |
3276 | unsigned long event) | |
3277 | { | |
3278 | if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev)) | |
3279 | return 0; | |
3280 | ||
3281 | return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1); | |
3282 | } | |
3283 | ||
3284 | static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev, | |
3285 | struct net_device *lag_dev, | |
3286 | unsigned long event, u16 vid) | |
3287 | { | |
3288 | struct net_device *port_dev; | |
3289 | struct list_head *iter; | |
3290 | int err; | |
3291 | ||
3292 | netdev_for_each_lower_dev(lag_dev, port_dev, iter) { | |
3293 | if (mlxsw_sp_port_dev_check(port_dev)) { | |
3294 | err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev, | |
3295 | event, vid); | |
3296 | if (err) | |
3297 | return err; | |
3298 | } | |
3299 | } | |
3300 | ||
3301 | return 0; | |
3302 | } | |
3303 | ||
3304 | static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev, | |
3305 | unsigned long event) | |
3306 | { | |
3307 | if (netif_is_bridge_port(lag_dev)) | |
3308 | return 0; | |
3309 | ||
3310 | return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1); | |
3311 | } | |
3312 | ||
99f44bb3 IS |
3313 | static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp, |
3314 | struct net_device *l3_dev) | |
3315 | { | |
3316 | u16 fid; | |
3317 | ||
3318 | if (is_vlan_dev(l3_dev)) | |
3319 | fid = vlan_dev_vlan_id(l3_dev); | |
3320 | else if (mlxsw_sp->master_bridge.dev == l3_dev) | |
3321 | fid = 1; | |
3322 | else | |
3323 | return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev); | |
3324 | ||
3325 | return mlxsw_sp_fid_find(mlxsw_sp, fid); | |
3326 | } | |
3327 | ||
f888f587 IS |
3328 | static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid) |
3329 | { | |
3330 | return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID : | |
3331 | MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST; | |
3332 | } | |
3333 | ||
3334 | static u16 mlxsw_sp_flood_table_index_get(u16 fid) | |
3335 | { | |
3336 | return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid; | |
3337 | } | |
3338 | ||
3339 | static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid, | |
3340 | bool set) | |
3341 | { | |
3342 | enum mlxsw_flood_table_type table_type; | |
3343 | char *sftr_pl; | |
3344 | u16 index; | |
3345 | int err; | |
3346 | ||
3347 | sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL); | |
3348 | if (!sftr_pl) | |
3349 | return -ENOMEM; | |
3350 | ||
3351 | table_type = mlxsw_sp_flood_table_type_get(fid); | |
3352 | index = mlxsw_sp_flood_table_index_get(fid); | |
3353 | mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type, | |
3354 | 1, MLXSW_PORT_ROUTER_PORT, set); | |
3355 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl); | |
3356 | ||
3357 | kfree(sftr_pl); | |
3358 | return err; | |
3359 | } | |
3360 | ||
99f44bb3 IS |
3361 | static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid) |
3362 | { | |
3363 | if (mlxsw_sp_fid_is_vfid(fid)) | |
3364 | return MLXSW_REG_RITR_FID_IF; | |
3365 | else | |
3366 | return MLXSW_REG_RITR_VLAN_IF; | |
3367 | } | |
3368 | ||
3369 | static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp, | |
3370 | struct net_device *l3_dev, | |
3371 | u16 fid, u16 rif, | |
3372 | bool create) | |
3373 | { | |
3374 | enum mlxsw_reg_ritr_if_type rif_type; | |
3375 | char ritr_pl[MLXSW_REG_RITR_LEN]; | |
3376 | ||
3377 | rif_type = mlxsw_sp_rif_type_get(fid); | |
3378 | mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu, | |
3379 | l3_dev->dev_addr); | |
3380 | mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid); | |
3381 | ||
3382 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); | |
3383 | } | |
3384 | ||
3385 | static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp, | |
3386 | struct net_device *l3_dev, | |
3387 | struct mlxsw_sp_fid *f) | |
3388 | { | |
3389 | struct mlxsw_sp_rif *r; | |
3390 | u16 rif; | |
3391 | int err; | |
3392 | ||
3393 | rif = mlxsw_sp_avail_rif_get(mlxsw_sp); | |
3394 | if (rif == MLXSW_SP_RIF_MAX) | |
3395 | return -ERANGE; | |
3396 | ||
f888f587 | 3397 | err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true); |
99f44bb3 IS |
3398 | if (err) |
3399 | return err; | |
3400 | ||
f888f587 IS |
3401 | err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true); |
3402 | if (err) | |
3403 | goto err_rif_bridge_op; | |
3404 | ||
99f44bb3 IS |
3405 | err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true); |
3406 | if (err) | |
3407 | goto err_rif_fdb_op; | |
3408 | ||
3409 | r = mlxsw_sp_rif_alloc(rif, l3_dev, f); | |
3410 | if (!r) { | |
3411 | err = -ENOMEM; | |
3412 | goto err_rif_alloc; | |
3413 | } | |
3414 | ||
3415 | f->r = r; | |
3416 | mlxsw_sp->rifs[rif] = r; | |
3417 | ||
3418 | netdev_dbg(l3_dev, "RIF=%d created\n", rif); | |
3419 | ||
3420 | return 0; | |
3421 | ||
3422 | err_rif_alloc: | |
3423 | mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false); | |
3424 | err_rif_fdb_op: | |
3425 | mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false); | |
f888f587 IS |
3426 | err_rif_bridge_op: |
3427 | mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false); | |
99f44bb3 IS |
3428 | return err; |
3429 | } | |
3430 | ||
3431 | void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp, | |
3432 | struct mlxsw_sp_rif *r) | |
3433 | { | |
3434 | struct net_device *l3_dev = r->dev; | |
3435 | struct mlxsw_sp_fid *f = r->f; | |
3436 | u16 rif = r->rif; | |
3437 | ||
3438 | mlxsw_sp->rifs[rif] = NULL; | |
3439 | f->r = NULL; | |
3440 | ||
3441 | kfree(r); | |
3442 | ||
3443 | mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false); | |
3444 | ||
3445 | mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false); | |
3446 | ||
f888f587 IS |
3447 | mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false); |
3448 | ||
99f44bb3 IS |
3449 | netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif); |
3450 | } | |
3451 | ||
3452 | static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev, | |
3453 | struct net_device *br_dev, | |
3454 | unsigned long event) | |
3455 | { | |
3456 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev); | |
3457 | struct mlxsw_sp_fid *f; | |
3458 | ||
3459 | /* FID can either be an actual FID if the L3 device is the | |
3460 | * VLAN-aware bridge or a VLAN device on top. Otherwise, the | |
3461 | * L3 device is a VLAN-unaware bridge and we get a vFID. | |
3462 | */ | |
3463 | f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev); | |
3464 | if (WARN_ON(!f)) | |
3465 | return -EINVAL; | |
3466 | ||
3467 | switch (event) { | |
3468 | case NETDEV_UP: | |
3469 | return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f); | |
3470 | case NETDEV_DOWN: | |
3471 | mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r); | |
3472 | break; | |
3473 | } | |
3474 | ||
3475 | return 0; | |
3476 | } | |
3477 | ||
99724c18 IS |
3478 | static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev, |
3479 | unsigned long event) | |
3480 | { | |
3481 | struct net_device *real_dev = vlan_dev_real_dev(vlan_dev); | |
99f44bb3 | 3482 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev); |
99724c18 IS |
3483 | u16 vid = vlan_dev_vlan_id(vlan_dev); |
3484 | ||
3485 | if (mlxsw_sp_port_dev_check(real_dev)) | |
3486 | return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event, | |
3487 | vid); | |
3488 | else if (netif_is_lag_master(real_dev)) | |
3489 | return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event, | |
3490 | vid); | |
99f44bb3 IS |
3491 | else if (netif_is_bridge_master(real_dev) && |
3492 | mlxsw_sp->master_bridge.dev == real_dev) | |
3493 | return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev, | |
3494 | event); | |
99724c18 IS |
3495 | |
3496 | return 0; | |
3497 | } | |
3498 | ||
3499 | static int mlxsw_sp_inetaddr_event(struct notifier_block *unused, | |
3500 | unsigned long event, void *ptr) | |
3501 | { | |
3502 | struct in_ifaddr *ifa = (struct in_ifaddr *) ptr; | |
3503 | struct net_device *dev = ifa->ifa_dev->dev; | |
3504 | struct mlxsw_sp *mlxsw_sp; | |
3505 | struct mlxsw_sp_rif *r; | |
3506 | int err = 0; | |
3507 | ||
3508 | mlxsw_sp = mlxsw_sp_lower_get(dev); | |
3509 | if (!mlxsw_sp) | |
3510 | goto out; | |
3511 | ||
3512 | r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev); | |
3513 | if (!mlxsw_sp_rif_should_config(r, event)) | |
3514 | goto out; | |
3515 | ||
3516 | if (mlxsw_sp_port_dev_check(dev)) | |
3517 | err = mlxsw_sp_inetaddr_port_event(dev, event); | |
3518 | else if (netif_is_lag_master(dev)) | |
3519 | err = mlxsw_sp_inetaddr_lag_event(dev, event); | |
99f44bb3 IS |
3520 | else if (netif_is_bridge_master(dev)) |
3521 | err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event); | |
99724c18 IS |
3522 | else if (is_vlan_dev(dev)) |
3523 | err = mlxsw_sp_inetaddr_vlan_event(dev, event); | |
3524 | ||
3525 | out: | |
3526 | return notifier_from_errno(err); | |
3527 | } | |
3528 | ||
6e095fd4 IS |
3529 | static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif, |
3530 | const char *mac, int mtu) | |
3531 | { | |
3532 | char ritr_pl[MLXSW_REG_RITR_LEN]; | |
3533 | int err; | |
3534 | ||
3535 | mlxsw_reg_ritr_rif_pack(ritr_pl, rif); | |
3536 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); | |
3537 | if (err) | |
3538 | return err; | |
3539 | ||
3540 | mlxsw_reg_ritr_mtu_set(ritr_pl, mtu); | |
3541 | mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac); | |
3542 | mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE); | |
3543 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); | |
3544 | } | |
3545 | ||
3546 | static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev) | |
3547 | { | |
3548 | struct mlxsw_sp *mlxsw_sp; | |
3549 | struct mlxsw_sp_rif *r; | |
3550 | int err; | |
3551 | ||
3552 | mlxsw_sp = mlxsw_sp_lower_get(dev); | |
3553 | if (!mlxsw_sp) | |
3554 | return 0; | |
3555 | ||
3556 | r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev); | |
3557 | if (!r) | |
3558 | return 0; | |
3559 | ||
3560 | err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false); | |
3561 | if (err) | |
3562 | return err; | |
3563 | ||
3564 | err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu); | |
3565 | if (err) | |
3566 | goto err_rif_edit; | |
3567 | ||
3568 | err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true); | |
3569 | if (err) | |
3570 | goto err_rif_fdb_op; | |
3571 | ||
3572 | ether_addr_copy(r->addr, dev->dev_addr); | |
3573 | r->mtu = dev->mtu; | |
3574 | ||
3575 | netdev_dbg(dev, "Updated RIF=%d\n", r->rif); | |
3576 | ||
3577 | return 0; | |
3578 | ||
3579 | err_rif_fdb_op: | |
3580 | mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu); | |
3581 | err_rif_edit: | |
3582 | mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true); | |
3583 | return err; | |
3584 | } | |
3585 | ||
fe3f6d14 IS |
3586 | static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port, |
3587 | u16 fid) | |
3588 | { | |
3589 | if (mlxsw_sp_fid_is_vfid(fid)) | |
3590 | return mlxsw_sp_port_vport_find_by_fid(lag_port, fid); | |
3591 | else | |
3592 | return test_bit(fid, lag_port->active_vlans); | |
3593 | } | |
3594 | ||
3595 | static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port, | |
3596 | u16 fid) | |
039c49a6 IS |
3597 | { |
3598 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
fe3f6d14 IS |
3599 | u8 local_port = mlxsw_sp_port->local_port; |
3600 | u16 lag_id = mlxsw_sp_port->lag_id; | |
3601 | int i, count = 0; | |
039c49a6 | 3602 | |
fe3f6d14 IS |
3603 | if (!mlxsw_sp_port->lagged) |
3604 | return true; | |
039c49a6 | 3605 | |
fe3f6d14 IS |
3606 | for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) { |
3607 | struct mlxsw_sp_port *lag_port; | |
3608 | ||
3609 | lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i); | |
3610 | if (!lag_port || lag_port->local_port == local_port) | |
3611 | continue; | |
3612 | if (mlxsw_sp_lag_port_fid_member(lag_port, fid)) | |
3613 | count++; | |
3614 | } | |
3615 | ||
3616 | return !count; | |
039c49a6 IS |
3617 | } |
3618 | ||
3619 | static int | |
3620 | mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port, | |
3621 | u16 fid) | |
3622 | { | |
3623 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3624 | char sfdf_pl[MLXSW_REG_SFDF_LEN]; | |
3625 | ||
3626 | mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID); | |
3627 | mlxsw_reg_sfdf_fid_set(sfdf_pl, fid); | |
3628 | mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl, | |
3629 | mlxsw_sp_port->local_port); | |
3630 | ||
22305378 IS |
3631 | netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n", |
3632 | mlxsw_sp_port->local_port, fid); | |
3633 | ||
039c49a6 IS |
3634 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); |
3635 | } | |
3636 | ||
039c49a6 IS |
3637 | static int |
3638 | mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port, | |
3639 | u16 fid) | |
3640 | { | |
3641 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3642 | char sfdf_pl[MLXSW_REG_SFDF_LEN]; | |
3643 | ||
3644 | mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID); | |
3645 | mlxsw_reg_sfdf_fid_set(sfdf_pl, fid); | |
3646 | mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id); | |
3647 | ||
22305378 IS |
3648 | netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n", |
3649 | mlxsw_sp_port->lag_id, fid); | |
3650 | ||
039c49a6 IS |
3651 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); |
3652 | } | |
3653 | ||
fe3f6d14 | 3654 | int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid) |
039c49a6 | 3655 | { |
fe3f6d14 IS |
3656 | if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid)) |
3657 | return 0; | |
039c49a6 | 3658 | |
fe3f6d14 IS |
3659 | if (mlxsw_sp_port->lagged) |
3660 | return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port, | |
039c49a6 IS |
3661 | fid); |
3662 | else | |
fe3f6d14 | 3663 | return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid); |
039c49a6 IS |
3664 | } |
3665 | ||
701b186e IS |
3666 | static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp) |
3667 | { | |
3668 | struct mlxsw_sp_fid *f, *tmp; | |
3669 | ||
3670 | list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list) | |
3671 | if (--f->ref_count == 0) | |
3672 | mlxsw_sp_fid_destroy(mlxsw_sp, f); | |
3673 | else | |
3674 | WARN_ON_ONCE(1); | |
3675 | } | |
3676 | ||
7117a570 IS |
3677 | static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp, |
3678 | struct net_device *br_dev) | |
3679 | { | |
3680 | return !mlxsw_sp->master_bridge.dev || | |
3681 | mlxsw_sp->master_bridge.dev == br_dev; | |
3682 | } | |
3683 | ||
3684 | static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp, | |
3685 | struct net_device *br_dev) | |
3686 | { | |
3687 | mlxsw_sp->master_bridge.dev = br_dev; | |
3688 | mlxsw_sp->master_bridge.ref_count++; | |
3689 | } | |
3690 | ||
3691 | static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp) | |
3692 | { | |
701b186e | 3693 | if (--mlxsw_sp->master_bridge.ref_count == 0) { |
7117a570 | 3694 | mlxsw_sp->master_bridge.dev = NULL; |
701b186e IS |
3695 | /* It's possible upper VLAN devices are still holding |
3696 | * references to underlying FIDs. Drop the reference | |
3697 | * and release the resources if it was the last one. | |
3698 | * If it wasn't, then something bad happened. | |
3699 | */ | |
3700 | mlxsw_sp_master_bridge_gone_sync(mlxsw_sp); | |
3701 | } | |
7117a570 IS |
3702 | } |
3703 | ||
3704 | static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port, | |
3705 | struct net_device *br_dev) | |
56ade8fe JP |
3706 | { |
3707 | struct net_device *dev = mlxsw_sp_port->dev; | |
3708 | int err; | |
3709 | ||
3710 | /* When port is not bridged untagged packets are tagged with | |
3711 | * PVID=VID=1, thereby creating an implicit VLAN interface in | |
3712 | * the device. Remove it and let bridge code take care of its | |
3713 | * own VLANs. | |
3714 | */ | |
3715 | err = mlxsw_sp_port_kill_vid(dev, 0, 1); | |
6c72a3d0 IS |
3716 | if (err) |
3717 | return err; | |
56ade8fe | 3718 | |
7117a570 IS |
3719 | mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev); |
3720 | ||
6c72a3d0 IS |
3721 | mlxsw_sp_port->learning = 1; |
3722 | mlxsw_sp_port->learning_sync = 1; | |
3723 | mlxsw_sp_port->uc_flood = 1; | |
3724 | mlxsw_sp_port->bridged = 1; | |
3725 | ||
3726 | return 0; | |
56ade8fe JP |
3727 | } |
3728 | ||
fe3f6d14 | 3729 | static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port) |
56ade8fe JP |
3730 | { |
3731 | struct net_device *dev = mlxsw_sp_port->dev; | |
5a8f4525 | 3732 | |
28a01d2d IS |
3733 | mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1); |
3734 | ||
7117a570 IS |
3735 | mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp); |
3736 | ||
6c72a3d0 IS |
3737 | mlxsw_sp_port->learning = 0; |
3738 | mlxsw_sp_port->learning_sync = 0; | |
3739 | mlxsw_sp_port->uc_flood = 0; | |
5a8f4525 | 3740 | mlxsw_sp_port->bridged = 0; |
56ade8fe JP |
3741 | |
3742 | /* Add implicit VLAN interface in the device, so that untagged | |
3743 | * packets will be classified to the default vFID. | |
3744 | */ | |
82e6db03 | 3745 | mlxsw_sp_port_add_vid(dev, 0, 1); |
56ade8fe JP |
3746 | } |
3747 | ||
0d65fc13 JP |
3748 | static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id) |
3749 | { | |
3750 | char sldr_pl[MLXSW_REG_SLDR_LEN]; | |
3751 | ||
3752 | mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id); | |
3753 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); | |
3754 | } | |
3755 | ||
3756 | static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id) | |
3757 | { | |
3758 | char sldr_pl[MLXSW_REG_SLDR_LEN]; | |
3759 | ||
3760 | mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id); | |
3761 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); | |
3762 | } | |
3763 | ||
3764 | static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port, | |
3765 | u16 lag_id, u8 port_index) | |
3766 | { | |
3767 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3768 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; | |
3769 | ||
3770 | mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port, | |
3771 | lag_id, port_index); | |
3772 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); | |
3773 | } | |
3774 | ||
3775 | static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port, | |
3776 | u16 lag_id) | |
3777 | { | |
3778 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3779 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; | |
3780 | ||
3781 | mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port, | |
3782 | lag_id); | |
3783 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); | |
3784 | } | |
3785 | ||
3786 | static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port, | |
3787 | u16 lag_id) | |
3788 | { | |
3789 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3790 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; | |
3791 | ||
3792 | mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port, | |
3793 | lag_id); | |
3794 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); | |
3795 | } | |
3796 | ||
3797 | static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port, | |
3798 | u16 lag_id) | |
3799 | { | |
3800 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3801 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; | |
3802 | ||
3803 | mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port, | |
3804 | lag_id); | |
3805 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); | |
3806 | } | |
3807 | ||
3808 | static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp, | |
3809 | struct net_device *lag_dev, | |
3810 | u16 *p_lag_id) | |
3811 | { | |
3812 | struct mlxsw_sp_upper *lag; | |
3813 | int free_lag_id = -1; | |
3814 | int i; | |
3815 | ||
3816 | for (i = 0; i < MLXSW_SP_LAG_MAX; i++) { | |
3817 | lag = mlxsw_sp_lag_get(mlxsw_sp, i); | |
3818 | if (lag->ref_count) { | |
3819 | if (lag->dev == lag_dev) { | |
3820 | *p_lag_id = i; | |
3821 | return 0; | |
3822 | } | |
3823 | } else if (free_lag_id < 0) { | |
3824 | free_lag_id = i; | |
3825 | } | |
3826 | } | |
3827 | if (free_lag_id < 0) | |
3828 | return -EBUSY; | |
3829 | *p_lag_id = free_lag_id; | |
3830 | return 0; | |
3831 | } | |
3832 | ||
3833 | static bool | |
3834 | mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp, | |
3835 | struct net_device *lag_dev, | |
3836 | struct netdev_lag_upper_info *lag_upper_info) | |
3837 | { | |
3838 | u16 lag_id; | |
3839 | ||
3840 | if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0) | |
3841 | return false; | |
3842 | if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH) | |
3843 | return false; | |
3844 | return true; | |
3845 | } | |
3846 | ||
3847 | static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp, | |
3848 | u16 lag_id, u8 *p_port_index) | |
3849 | { | |
3850 | int i; | |
3851 | ||
3852 | for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) { | |
3853 | if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) { | |
3854 | *p_port_index = i; | |
3855 | return 0; | |
3856 | } | |
3857 | } | |
3858 | return -EBUSY; | |
3859 | } | |
3860 | ||
86bf95b3 IS |
3861 | static void |
3862 | mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port, | |
3863 | u16 lag_id) | |
3864 | { | |
3865 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
11943ff4 | 3866 | struct mlxsw_sp_fid *f; |
86bf95b3 IS |
3867 | |
3868 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1); | |
3869 | if (WARN_ON(!mlxsw_sp_vport)) | |
3870 | return; | |
3871 | ||
11943ff4 IS |
3872 | /* If vPort is assigned a RIF, then leave it since it's no |
3873 | * longer valid. | |
3874 | */ | |
3875 | f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); | |
3876 | if (f) | |
3877 | f->leave(mlxsw_sp_vport); | |
3878 | ||
86bf95b3 IS |
3879 | mlxsw_sp_vport->lag_id = lag_id; |
3880 | mlxsw_sp_vport->lagged = 1; | |
3881 | } | |
3882 | ||
3883 | static void | |
3884 | mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port) | |
3885 | { | |
3886 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
11943ff4 | 3887 | struct mlxsw_sp_fid *f; |
86bf95b3 IS |
3888 | |
3889 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1); | |
3890 | if (WARN_ON(!mlxsw_sp_vport)) | |
3891 | return; | |
3892 | ||
11943ff4 IS |
3893 | f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); |
3894 | if (f) | |
3895 | f->leave(mlxsw_sp_vport); | |
3896 | ||
86bf95b3 IS |
3897 | mlxsw_sp_vport->lagged = 0; |
3898 | } | |
3899 | ||
0d65fc13 JP |
3900 | static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port, |
3901 | struct net_device *lag_dev) | |
3902 | { | |
3903 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3904 | struct mlxsw_sp_upper *lag; | |
3905 | u16 lag_id; | |
3906 | u8 port_index; | |
3907 | int err; | |
3908 | ||
3909 | err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id); | |
3910 | if (err) | |
3911 | return err; | |
3912 | lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id); | |
3913 | if (!lag->ref_count) { | |
3914 | err = mlxsw_sp_lag_create(mlxsw_sp, lag_id); | |
3915 | if (err) | |
3916 | return err; | |
3917 | lag->dev = lag_dev; | |
3918 | } | |
3919 | ||
3920 | err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index); | |
3921 | if (err) | |
3922 | return err; | |
3923 | err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index); | |
3924 | if (err) | |
3925 | goto err_col_port_add; | |
3926 | err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id); | |
3927 | if (err) | |
3928 | goto err_col_port_enable; | |
3929 | ||
3930 | mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index, | |
3931 | mlxsw_sp_port->local_port); | |
3932 | mlxsw_sp_port->lag_id = lag_id; | |
3933 | mlxsw_sp_port->lagged = 1; | |
3934 | lag->ref_count++; | |
86bf95b3 IS |
3935 | |
3936 | mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id); | |
3937 | ||
0d65fc13 JP |
3938 | return 0; |
3939 | ||
51554db2 IS |
3940 | err_col_port_enable: |
3941 | mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id); | |
0d65fc13 JP |
3942 | err_col_port_add: |
3943 | if (!lag->ref_count) | |
3944 | mlxsw_sp_lag_destroy(mlxsw_sp, lag_id); | |
0d65fc13 JP |
3945 | return err; |
3946 | } | |
3947 | ||
82e6db03 IS |
3948 | static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port, |
3949 | struct net_device *lag_dev) | |
0d65fc13 JP |
3950 | { |
3951 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
0d65fc13 | 3952 | u16 lag_id = mlxsw_sp_port->lag_id; |
1c800759 | 3953 | struct mlxsw_sp_upper *lag; |
0d65fc13 JP |
3954 | |
3955 | if (!mlxsw_sp_port->lagged) | |
82e6db03 | 3956 | return; |
0d65fc13 JP |
3957 | lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id); |
3958 | WARN_ON(lag->ref_count == 0); | |
3959 | ||
82e6db03 IS |
3960 | mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id); |
3961 | mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id); | |
0d65fc13 | 3962 | |
4dc236c3 IS |
3963 | if (mlxsw_sp_port->bridged) { |
3964 | mlxsw_sp_port_active_vlans_del(mlxsw_sp_port); | |
fe3f6d14 | 3965 | mlxsw_sp_port_bridge_leave(mlxsw_sp_port); |
4dc236c3 IS |
3966 | } |
3967 | ||
fe3f6d14 | 3968 | if (lag->ref_count == 1) |
82e6db03 | 3969 | mlxsw_sp_lag_destroy(mlxsw_sp, lag_id); |
0d65fc13 JP |
3970 | |
3971 | mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id, | |
3972 | mlxsw_sp_port->local_port); | |
3973 | mlxsw_sp_port->lagged = 0; | |
3974 | lag->ref_count--; | |
86bf95b3 IS |
3975 | |
3976 | mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port); | |
0d65fc13 JP |
3977 | } |
3978 | ||
74581206 JP |
3979 | static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port, |
3980 | u16 lag_id) | |
3981 | { | |
3982 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3983 | char sldr_pl[MLXSW_REG_SLDR_LEN]; | |
3984 | ||
3985 | mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id, | |
3986 | mlxsw_sp_port->local_port); | |
3987 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); | |
3988 | } | |
3989 | ||
3990 | static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port, | |
3991 | u16 lag_id) | |
3992 | { | |
3993 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
3994 | char sldr_pl[MLXSW_REG_SLDR_LEN]; | |
3995 | ||
3996 | mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id, | |
3997 | mlxsw_sp_port->local_port); | |
3998 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); | |
3999 | } | |
4000 | ||
4001 | static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
4002 | bool lag_tx_enabled) | |
4003 | { | |
4004 | if (lag_tx_enabled) | |
4005 | return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port, | |
4006 | mlxsw_sp_port->lag_id); | |
4007 | else | |
4008 | return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port, | |
4009 | mlxsw_sp_port->lag_id); | |
4010 | } | |
4011 | ||
4012 | static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port, | |
4013 | struct netdev_lag_lower_state_info *info) | |
4014 | { | |
4015 | return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled); | |
4016 | } | |
4017 | ||
9589a7b5 IS |
4018 | static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port, |
4019 | struct net_device *vlan_dev) | |
4020 | { | |
4021 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
4022 | u16 vid = vlan_dev_vlan_id(vlan_dev); | |
4023 | ||
4024 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); | |
423b937e | 4025 | if (WARN_ON(!mlxsw_sp_vport)) |
9589a7b5 | 4026 | return -EINVAL; |
9589a7b5 IS |
4027 | |
4028 | mlxsw_sp_vport->dev = vlan_dev; | |
4029 | ||
4030 | return 0; | |
4031 | } | |
4032 | ||
82e6db03 IS |
4033 | static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port, |
4034 | struct net_device *vlan_dev) | |
9589a7b5 IS |
4035 | { |
4036 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
4037 | u16 vid = vlan_dev_vlan_id(vlan_dev); | |
4038 | ||
4039 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); | |
423b937e | 4040 | if (WARN_ON(!mlxsw_sp_vport)) |
82e6db03 | 4041 | return; |
9589a7b5 IS |
4042 | |
4043 | mlxsw_sp_vport->dev = mlxsw_sp_port->dev; | |
9589a7b5 IS |
4044 | } |
4045 | ||
74581206 JP |
4046 | static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev, |
4047 | unsigned long event, void *ptr) | |
56ade8fe | 4048 | { |
56ade8fe JP |
4049 | struct netdev_notifier_changeupper_info *info; |
4050 | struct mlxsw_sp_port *mlxsw_sp_port; | |
4051 | struct net_device *upper_dev; | |
4052 | struct mlxsw_sp *mlxsw_sp; | |
80bedf1a | 4053 | int err = 0; |
56ade8fe | 4054 | |
56ade8fe JP |
4055 | mlxsw_sp_port = netdev_priv(dev); |
4056 | mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
4057 | info = ptr; | |
4058 | ||
4059 | switch (event) { | |
4060 | case NETDEV_PRECHANGEUPPER: | |
4061 | upper_dev = info->upper_dev; | |
59fe9b3f IS |
4062 | if (!is_vlan_dev(upper_dev) && |
4063 | !netif_is_lag_master(upper_dev) && | |
4064 | !netif_is_bridge_master(upper_dev)) | |
4065 | return -EINVAL; | |
6ec43904 | 4066 | if (!info->linking) |
0d65fc13 | 4067 | break; |
56ade8fe | 4068 | /* HW limitation forbids to put ports to multiple bridges. */ |
0d65fc13 | 4069 | if (netif_is_bridge_master(upper_dev) && |
56ade8fe | 4070 | !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev)) |
80bedf1a | 4071 | return -EINVAL; |
0d65fc13 JP |
4072 | if (netif_is_lag_master(upper_dev) && |
4073 | !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev, | |
4074 | info->upper_info)) | |
80bedf1a | 4075 | return -EINVAL; |
6ec43904 IS |
4076 | if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev)) |
4077 | return -EINVAL; | |
4078 | if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) && | |
4079 | !netif_is_lag_master(vlan_dev_real_dev(upper_dev))) | |
4080 | return -EINVAL; | |
56ade8fe JP |
4081 | break; |
4082 | case NETDEV_CHANGEUPPER: | |
4083 | upper_dev = info->upper_dev; | |
9589a7b5 | 4084 | if (is_vlan_dev(upper_dev)) { |
80bedf1a | 4085 | if (info->linking) |
9589a7b5 IS |
4086 | err = mlxsw_sp_port_vlan_link(mlxsw_sp_port, |
4087 | upper_dev); | |
80bedf1a | 4088 | else |
82e6db03 IS |
4089 | mlxsw_sp_port_vlan_unlink(mlxsw_sp_port, |
4090 | upper_dev); | |
9589a7b5 | 4091 | } else if (netif_is_bridge_master(upper_dev)) { |
7117a570 IS |
4092 | if (info->linking) |
4093 | err = mlxsw_sp_port_bridge_join(mlxsw_sp_port, | |
4094 | upper_dev); | |
4095 | else | |
fe3f6d14 | 4096 | mlxsw_sp_port_bridge_leave(mlxsw_sp_port); |
0d65fc13 | 4097 | } else if (netif_is_lag_master(upper_dev)) { |
80bedf1a | 4098 | if (info->linking) |
0d65fc13 JP |
4099 | err = mlxsw_sp_port_lag_join(mlxsw_sp_port, |
4100 | upper_dev); | |
80bedf1a | 4101 | else |
82e6db03 IS |
4102 | mlxsw_sp_port_lag_leave(mlxsw_sp_port, |
4103 | upper_dev); | |
59fe9b3f IS |
4104 | } else { |
4105 | err = -EINVAL; | |
4106 | WARN_ON(1); | |
56ade8fe JP |
4107 | } |
4108 | break; | |
4109 | } | |
4110 | ||
80bedf1a | 4111 | return err; |
56ade8fe JP |
4112 | } |
4113 | ||
74581206 JP |
4114 | static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev, |
4115 | unsigned long event, void *ptr) | |
4116 | { | |
4117 | struct netdev_notifier_changelowerstate_info *info; | |
4118 | struct mlxsw_sp_port *mlxsw_sp_port; | |
4119 | int err; | |
4120 | ||
4121 | mlxsw_sp_port = netdev_priv(dev); | |
4122 | info = ptr; | |
4123 | ||
4124 | switch (event) { | |
4125 | case NETDEV_CHANGELOWERSTATE: | |
4126 | if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) { | |
4127 | err = mlxsw_sp_port_lag_changed(mlxsw_sp_port, | |
4128 | info->lower_state_info); | |
4129 | if (err) | |
4130 | netdev_err(dev, "Failed to reflect link aggregation lower state change\n"); | |
4131 | } | |
4132 | break; | |
4133 | } | |
4134 | ||
80bedf1a | 4135 | return 0; |
74581206 JP |
4136 | } |
4137 | ||
4138 | static int mlxsw_sp_netdevice_port_event(struct net_device *dev, | |
4139 | unsigned long event, void *ptr) | |
4140 | { | |
4141 | switch (event) { | |
4142 | case NETDEV_PRECHANGEUPPER: | |
4143 | case NETDEV_CHANGEUPPER: | |
4144 | return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr); | |
4145 | case NETDEV_CHANGELOWERSTATE: | |
4146 | return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr); | |
4147 | } | |
4148 | ||
80bedf1a | 4149 | return 0; |
74581206 JP |
4150 | } |
4151 | ||
0d65fc13 JP |
4152 | static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev, |
4153 | unsigned long event, void *ptr) | |
4154 | { | |
4155 | struct net_device *dev; | |
4156 | struct list_head *iter; | |
4157 | int ret; | |
4158 | ||
4159 | netdev_for_each_lower_dev(lag_dev, dev, iter) { | |
4160 | if (mlxsw_sp_port_dev_check(dev)) { | |
4161 | ret = mlxsw_sp_netdevice_port_event(dev, event, ptr); | |
80bedf1a | 4162 | if (ret) |
0d65fc13 JP |
4163 | return ret; |
4164 | } | |
4165 | } | |
4166 | ||
80bedf1a | 4167 | return 0; |
0d65fc13 JP |
4168 | } |
4169 | ||
701b186e IS |
4170 | static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp, |
4171 | struct net_device *vlan_dev) | |
26f0e7fb | 4172 | { |
701b186e | 4173 | u16 fid = vlan_dev_vlan_id(vlan_dev); |
d0ec875a | 4174 | struct mlxsw_sp_fid *f; |
26f0e7fb | 4175 | |
701b186e IS |
4176 | f = mlxsw_sp_fid_find(mlxsw_sp, fid); |
4177 | if (!f) { | |
4178 | f = mlxsw_sp_fid_create(mlxsw_sp, fid); | |
4179 | if (IS_ERR(f)) | |
4180 | return PTR_ERR(f); | |
26f0e7fb IS |
4181 | } |
4182 | ||
701b186e IS |
4183 | f->ref_count++; |
4184 | ||
4185 | return 0; | |
4186 | } | |
4187 | ||
4188 | static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp, | |
4189 | struct net_device *vlan_dev) | |
4190 | { | |
4191 | u16 fid = vlan_dev_vlan_id(vlan_dev); | |
4192 | struct mlxsw_sp_fid *f; | |
4193 | ||
4194 | f = mlxsw_sp_fid_find(mlxsw_sp, fid); | |
99f44bb3 IS |
4195 | if (f && f->r) |
4196 | mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r); | |
701b186e IS |
4197 | if (f && --f->ref_count == 0) |
4198 | mlxsw_sp_fid_destroy(mlxsw_sp, f); | |
4199 | } | |
4200 | ||
4201 | static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev, | |
4202 | unsigned long event, void *ptr) | |
4203 | { | |
4204 | struct netdev_notifier_changeupper_info *info; | |
4205 | struct net_device *upper_dev; | |
4206 | struct mlxsw_sp *mlxsw_sp; | |
4207 | int err; | |
4208 | ||
4209 | mlxsw_sp = mlxsw_sp_lower_get(br_dev); | |
4210 | if (!mlxsw_sp) | |
4211 | return 0; | |
4212 | if (br_dev != mlxsw_sp->master_bridge.dev) | |
4213 | return 0; | |
4214 | ||
4215 | info = ptr; | |
4216 | ||
4217 | switch (event) { | |
4218 | case NETDEV_CHANGEUPPER: | |
4219 | upper_dev = info->upper_dev; | |
4220 | if (!is_vlan_dev(upper_dev)) | |
4221 | break; | |
4222 | if (info->linking) { | |
4223 | err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp, | |
4224 | upper_dev); | |
4225 | if (err) | |
4226 | return err; | |
4227 | } else { | |
4228 | mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev); | |
4229 | } | |
4230 | break; | |
4231 | } | |
4232 | ||
4233 | return 0; | |
26f0e7fb IS |
4234 | } |
4235 | ||
3ba2ebf4 | 4236 | static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp) |
26f0e7fb | 4237 | { |
3ba2ebf4 | 4238 | return find_first_zero_bit(mlxsw_sp->vfids.mapped, |
99724c18 | 4239 | MLXSW_SP_VFID_MAX); |
26f0e7fb IS |
4240 | } |
4241 | ||
99724c18 | 4242 | static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create) |
26f0e7fb | 4243 | { |
99724c18 | 4244 | char sfmr_pl[MLXSW_REG_SFMR_LEN]; |
26f0e7fb | 4245 | |
99724c18 IS |
4246 | mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0); |
4247 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); | |
26f0e7fb IS |
4248 | } |
4249 | ||
3ba2ebf4 | 4250 | static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport); |
1c800759 | 4251 | |
3ba2ebf4 IS |
4252 | static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, |
4253 | struct net_device *br_dev) | |
26f0e7fb IS |
4254 | { |
4255 | struct device *dev = mlxsw_sp->bus_info->dev; | |
d0ec875a | 4256 | struct mlxsw_sp_fid *f; |
c7e920b5 | 4257 | u16 vfid, fid; |
26f0e7fb IS |
4258 | int err; |
4259 | ||
3ba2ebf4 | 4260 | vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp); |
c7e920b5 | 4261 | if (vfid == MLXSW_SP_VFID_MAX) { |
26f0e7fb IS |
4262 | dev_err(dev, "No available vFIDs\n"); |
4263 | return ERR_PTR(-ERANGE); | |
4264 | } | |
4265 | ||
c7e920b5 IS |
4266 | fid = mlxsw_sp_vfid_to_fid(vfid); |
4267 | err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true); | |
26f0e7fb | 4268 | if (err) { |
c7e920b5 | 4269 | dev_err(dev, "Failed to create FID=%d\n", fid); |
26f0e7fb IS |
4270 | return ERR_PTR(err); |
4271 | } | |
4272 | ||
c7e920b5 IS |
4273 | f = kzalloc(sizeof(*f), GFP_KERNEL); |
4274 | if (!f) | |
26f0e7fb IS |
4275 | goto err_allocate_vfid; |
4276 | ||
3ba2ebf4 | 4277 | f->leave = mlxsw_sp_vport_vfid_leave; |
d0ec875a IS |
4278 | f->fid = fid; |
4279 | f->dev = br_dev; | |
26f0e7fb | 4280 | |
3ba2ebf4 IS |
4281 | list_add(&f->list, &mlxsw_sp->vfids.list); |
4282 | set_bit(vfid, mlxsw_sp->vfids.mapped); | |
26f0e7fb | 4283 | |
c7e920b5 | 4284 | return f; |
26f0e7fb IS |
4285 | |
4286 | err_allocate_vfid: | |
c7e920b5 | 4287 | mlxsw_sp_vfid_op(mlxsw_sp, fid, false); |
26f0e7fb IS |
4288 | return ERR_PTR(-ENOMEM); |
4289 | } | |
4290 | ||
3ba2ebf4 IS |
4291 | static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, |
4292 | struct mlxsw_sp_fid *f) | |
26f0e7fb | 4293 | { |
d0ec875a | 4294 | u16 vfid = mlxsw_sp_fid_to_vfid(f->fid); |
99f44bb3 | 4295 | u16 fid = f->fid; |
26f0e7fb | 4296 | |
3ba2ebf4 | 4297 | clear_bit(vfid, mlxsw_sp->vfids.mapped); |
d0ec875a | 4298 | list_del(&f->list); |
26f0e7fb | 4299 | |
99f44bb3 IS |
4300 | if (f->r) |
4301 | mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r); | |
26f0e7fb | 4302 | |
d0ec875a | 4303 | kfree(f); |
99f44bb3 IS |
4304 | |
4305 | mlxsw_sp_vfid_op(mlxsw_sp, fid, false); | |
26f0e7fb IS |
4306 | } |
4307 | ||
99724c18 IS |
4308 | static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid, |
4309 | bool valid) | |
4310 | { | |
4311 | enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; | |
4312 | u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); | |
4313 | ||
4314 | return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid, | |
4315 | vid); | |
4316 | } | |
4317 | ||
3ba2ebf4 IS |
4318 | static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport, |
4319 | struct net_device *br_dev) | |
26f0e7fb | 4320 | { |
0355b59f | 4321 | struct mlxsw_sp_fid *f; |
26f0e7fb IS |
4322 | int err; |
4323 | ||
3ba2ebf4 | 4324 | f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev); |
0355b59f | 4325 | if (!f) { |
3ba2ebf4 | 4326 | f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev); |
0355b59f IS |
4327 | if (IS_ERR(f)) |
4328 | return PTR_ERR(f); | |
26f0e7fb IS |
4329 | } |
4330 | ||
0355b59f IS |
4331 | err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true); |
4332 | if (err) | |
4333 | goto err_vport_flood_set; | |
26f0e7fb | 4334 | |
0355b59f IS |
4335 | err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true); |
4336 | if (err) | |
9c4d4423 | 4337 | goto err_vport_fid_map; |
26f0e7fb | 4338 | |
41b996cc | 4339 | mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f); |
0355b59f | 4340 | f->ref_count++; |
6a9863a6 | 4341 | |
22305378 IS |
4342 | netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid); |
4343 | ||
0355b59f | 4344 | return 0; |
039c49a6 | 4345 | |
0355b59f IS |
4346 | err_vport_fid_map: |
4347 | mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false); | |
4348 | err_vport_flood_set: | |
d0ec875a | 4349 | if (!f->ref_count) |
3ba2ebf4 | 4350 | mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f); |
0355b59f IS |
4351 | return err; |
4352 | } | |
26f0e7fb | 4353 | |
3ba2ebf4 | 4354 | static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport) |
0355b59f | 4355 | { |
41b996cc | 4356 | struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); |
26f0e7fb | 4357 | |
22305378 IS |
4358 | netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid); |
4359 | ||
0355b59f | 4360 | mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false); |
26f0e7fb | 4361 | |
0355b59f IS |
4362 | mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false); |
4363 | ||
fe3f6d14 IS |
4364 | mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid); |
4365 | ||
41b996cc | 4366 | mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL); |
0355b59f | 4367 | if (--f->ref_count == 0) |
3ba2ebf4 | 4368 | mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f); |
26f0e7fb IS |
4369 | } |
4370 | ||
4371 | static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport, | |
4372 | struct net_device *br_dev) | |
4373 | { | |
99724c18 | 4374 | struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); |
26f0e7fb IS |
4375 | u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); |
4376 | struct net_device *dev = mlxsw_sp_vport->dev; | |
26f0e7fb IS |
4377 | int err; |
4378 | ||
99724c18 IS |
4379 | if (f && !WARN_ON(!f->leave)) |
4380 | f->leave(mlxsw_sp_vport); | |
26f0e7fb | 4381 | |
3ba2ebf4 | 4382 | err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev); |
26f0e7fb | 4383 | if (err) { |
0355b59f | 4384 | netdev_err(dev, "Failed to join vFID\n"); |
99724c18 | 4385 | return err; |
26f0e7fb IS |
4386 | } |
4387 | ||
4388 | err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true); | |
4389 | if (err) { | |
4390 | netdev_err(dev, "Failed to enable learning\n"); | |
4391 | goto err_port_vid_learning_set; | |
4392 | } | |
4393 | ||
26f0e7fb IS |
4394 | mlxsw_sp_vport->learning = 1; |
4395 | mlxsw_sp_vport->learning_sync = 1; | |
4396 | mlxsw_sp_vport->uc_flood = 1; | |
4397 | mlxsw_sp_vport->bridged = 1; | |
4398 | ||
4399 | return 0; | |
4400 | ||
26f0e7fb | 4401 | err_port_vid_learning_set: |
3ba2ebf4 | 4402 | mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport); |
26f0e7fb IS |
4403 | return err; |
4404 | } | |
4405 | ||
fe3f6d14 | 4406 | static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport) |
0355b59f IS |
4407 | { |
4408 | u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); | |
0355b59f IS |
4409 | |
4410 | mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false); | |
4411 | ||
3ba2ebf4 | 4412 | mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport); |
0355b59f | 4413 | |
0355b59f IS |
4414 | mlxsw_sp_vport->learning = 0; |
4415 | mlxsw_sp_vport->learning_sync = 0; | |
4416 | mlxsw_sp_vport->uc_flood = 0; | |
4417 | mlxsw_sp_vport->bridged = 0; | |
4418 | } | |
4419 | ||
26f0e7fb IS |
4420 | static bool |
4421 | mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port, | |
4422 | const struct net_device *br_dev) | |
4423 | { | |
4424 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
4425 | ||
4426 | list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list, | |
4427 | vport.list) { | |
3ba2ebf4 | 4428 | struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport); |
56918b6b IS |
4429 | |
4430 | if (dev && dev == br_dev) | |
26f0e7fb IS |
4431 | return false; |
4432 | } | |
4433 | ||
4434 | return true; | |
4435 | } | |
4436 | ||
4437 | static int mlxsw_sp_netdevice_vport_event(struct net_device *dev, | |
4438 | unsigned long event, void *ptr, | |
4439 | u16 vid) | |
4440 | { | |
4441 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
4442 | struct netdev_notifier_changeupper_info *info = ptr; | |
4443 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
4444 | struct net_device *upper_dev; | |
80bedf1a | 4445 | int err = 0; |
26f0e7fb IS |
4446 | |
4447 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); | |
4448 | ||
4449 | switch (event) { | |
4450 | case NETDEV_PRECHANGEUPPER: | |
4451 | upper_dev = info->upper_dev; | |
26f0e7fb | 4452 | if (!netif_is_bridge_master(upper_dev)) |
80bedf1a | 4453 | return -EINVAL; |
ddbe993d IS |
4454 | if (!info->linking) |
4455 | break; | |
26f0e7fb IS |
4456 | /* We can't have multiple VLAN interfaces configured on |
4457 | * the same port and being members in the same bridge. | |
4458 | */ | |
4459 | if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port, | |
4460 | upper_dev)) | |
80bedf1a | 4461 | return -EINVAL; |
26f0e7fb IS |
4462 | break; |
4463 | case NETDEV_CHANGEUPPER: | |
4464 | upper_dev = info->upper_dev; | |
26f0e7fb | 4465 | if (info->linking) { |
423b937e | 4466 | if (WARN_ON(!mlxsw_sp_vport)) |
80bedf1a | 4467 | return -EINVAL; |
26f0e7fb IS |
4468 | err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport, |
4469 | upper_dev); | |
26f0e7fb | 4470 | } else { |
26f0e7fb | 4471 | if (!mlxsw_sp_vport) |
80bedf1a | 4472 | return 0; |
fe3f6d14 | 4473 | mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport); |
26f0e7fb IS |
4474 | } |
4475 | } | |
4476 | ||
80bedf1a | 4477 | return err; |
26f0e7fb IS |
4478 | } |
4479 | ||
272c4470 IS |
4480 | static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev, |
4481 | unsigned long event, void *ptr, | |
4482 | u16 vid) | |
4483 | { | |
4484 | struct net_device *dev; | |
4485 | struct list_head *iter; | |
4486 | int ret; | |
4487 | ||
4488 | netdev_for_each_lower_dev(lag_dev, dev, iter) { | |
4489 | if (mlxsw_sp_port_dev_check(dev)) { | |
4490 | ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr, | |
4491 | vid); | |
80bedf1a | 4492 | if (ret) |
272c4470 IS |
4493 | return ret; |
4494 | } | |
4495 | } | |
4496 | ||
80bedf1a | 4497 | return 0; |
272c4470 IS |
4498 | } |
4499 | ||
26f0e7fb IS |
4500 | static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev, |
4501 | unsigned long event, void *ptr) | |
4502 | { | |
4503 | struct net_device *real_dev = vlan_dev_real_dev(vlan_dev); | |
4504 | u16 vid = vlan_dev_vlan_id(vlan_dev); | |
4505 | ||
272c4470 IS |
4506 | if (mlxsw_sp_port_dev_check(real_dev)) |
4507 | return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr, | |
4508 | vid); | |
4509 | else if (netif_is_lag_master(real_dev)) | |
4510 | return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr, | |
4511 | vid); | |
26f0e7fb | 4512 | |
80bedf1a | 4513 | return 0; |
26f0e7fb IS |
4514 | } |
4515 | ||
0d65fc13 JP |
4516 | static int mlxsw_sp_netdevice_event(struct notifier_block *unused, |
4517 | unsigned long event, void *ptr) | |
4518 | { | |
4519 | struct net_device *dev = netdev_notifier_info_to_dev(ptr); | |
80bedf1a | 4520 | int err = 0; |
0d65fc13 | 4521 | |
6e095fd4 IS |
4522 | if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU) |
4523 | err = mlxsw_sp_netdevice_router_port_event(dev); | |
4524 | else if (mlxsw_sp_port_dev_check(dev)) | |
80bedf1a IS |
4525 | err = mlxsw_sp_netdevice_port_event(dev, event, ptr); |
4526 | else if (netif_is_lag_master(dev)) | |
4527 | err = mlxsw_sp_netdevice_lag_event(dev, event, ptr); | |
701b186e IS |
4528 | else if (netif_is_bridge_master(dev)) |
4529 | err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr); | |
80bedf1a IS |
4530 | else if (is_vlan_dev(dev)) |
4531 | err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr); | |
26f0e7fb | 4532 | |
80bedf1a | 4533 | return notifier_from_errno(err); |
0d65fc13 JP |
4534 | } |
4535 | ||
56ade8fe JP |
4536 | static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = { |
4537 | .notifier_call = mlxsw_sp_netdevice_event, | |
4538 | }; | |
4539 | ||
99724c18 IS |
4540 | static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = { |
4541 | .notifier_call = mlxsw_sp_inetaddr_event, | |
4542 | .priority = 10, /* Must be called before FIB notifier block */ | |
4543 | }; | |
4544 | ||
e7322638 JP |
4545 | static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = { |
4546 | .notifier_call = mlxsw_sp_router_netevent_event, | |
4547 | }; | |
4548 | ||
56ade8fe JP |
4549 | static int __init mlxsw_sp_module_init(void) |
4550 | { | |
4551 | int err; | |
4552 | ||
4553 | register_netdevice_notifier(&mlxsw_sp_netdevice_nb); | |
99724c18 | 4554 | register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); |
e7322638 JP |
4555 | register_netevent_notifier(&mlxsw_sp_router_netevent_nb); |
4556 | ||
56ade8fe JP |
4557 | err = mlxsw_core_driver_register(&mlxsw_sp_driver); |
4558 | if (err) | |
4559 | goto err_core_driver_register; | |
4560 | return 0; | |
4561 | ||
4562 | err_core_driver_register: | |
e7322638 | 4563 | unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb); |
de7d6295 | 4564 | unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); |
56ade8fe JP |
4565 | unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb); |
4566 | return err; | |
4567 | } | |
4568 | ||
4569 | static void __exit mlxsw_sp_module_exit(void) | |
4570 | { | |
4571 | mlxsw_core_driver_unregister(&mlxsw_sp_driver); | |
e7322638 | 4572 | unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb); |
99724c18 | 4573 | unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); |
56ade8fe JP |
4574 | unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb); |
4575 | } | |
4576 | ||
4577 | module_init(mlxsw_sp_module_init); | |
4578 | module_exit(mlxsw_sp_module_exit); | |
4579 | ||
4580 | MODULE_LICENSE("Dual BSD/GPL"); | |
4581 | MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); | |
4582 | MODULE_DESCRIPTION("Mellanox Spectrum driver"); | |
4583 | MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM); |