Commit | Line | Data |
---|---|---|
56ade8fe JP |
1 | /* |
2 | * drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c | |
3 | * Copyright (c) 2015 Mellanox Technologies. All rights reserved. | |
4 | * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> | |
5 | * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> | |
6 | * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> | |
7 | * | |
8 | * Redistribution and use in source and binary forms, with or without | |
9 | * modification, are permitted provided that the following conditions are met: | |
10 | * | |
11 | * 1. Redistributions of source code must retain the above copyright | |
12 | * notice, this list of conditions and the following disclaimer. | |
13 | * 2. Redistributions in binary form must reproduce the above copyright | |
14 | * notice, this list of conditions and the following disclaimer in the | |
15 | * documentation and/or other materials provided with the distribution. | |
16 | * 3. Neither the names of the copyright holders nor the names of its | |
17 | * contributors may be used to endorse or promote products derived from | |
18 | * this software without specific prior written permission. | |
19 | * | |
20 | * Alternatively, this software may be distributed under the terms of the | |
21 | * GNU General Public License ("GPL") version 2 as published by the Free | |
22 | * Software Foundation. | |
23 | * | |
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | |
28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
34 | * POSSIBILITY OF SUCH DAMAGE. | |
35 | */ | |
36 | ||
37 | #include <linux/kernel.h> | |
38 | #include <linux/types.h> | |
39 | #include <linux/netdevice.h> | |
40 | #include <linux/etherdevice.h> | |
41 | #include <linux/slab.h> | |
42 | #include <linux/device.h> | |
43 | #include <linux/skbuff.h> | |
44 | #include <linux/if_vlan.h> | |
45 | #include <linux/if_bridge.h> | |
46 | #include <linux/workqueue.h> | |
47 | #include <linux/jiffies.h> | |
48 | #include <net/switchdev.h> | |
49 | ||
50 | #include "spectrum.h" | |
51 | #include "core.h" | |
52 | #include "reg.h" | |
53 | ||
54a73201 IS |
54 | static struct mlxsw_sp_port * |
55 | mlxsw_sp_port_orig_get(struct net_device *dev, | |
56 | struct mlxsw_sp_port *mlxsw_sp_port) | |
57 | { | |
58 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
59 | u16 vid; | |
60 | ||
61 | if (!is_vlan_dev(dev)) | |
62 | return mlxsw_sp_port; | |
63 | ||
64 | vid = vlan_dev_vlan_id(dev); | |
65 | mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); | |
66 | WARN_ON(!mlxsw_sp_vport); | |
67 | ||
68 | return mlxsw_sp_vport; | |
69 | } | |
70 | ||
56ade8fe JP |
71 | static int mlxsw_sp_port_attr_get(struct net_device *dev, |
72 | struct switchdev_attr *attr) | |
73 | { | |
74 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
75 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
76 | ||
54a73201 IS |
77 | mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port); |
78 | if (!mlxsw_sp_port) | |
79 | return -EINVAL; | |
80 | ||
56ade8fe JP |
81 | switch (attr->id) { |
82 | case SWITCHDEV_ATTR_ID_PORT_PARENT_ID: | |
83 | attr->u.ppid.id_len = sizeof(mlxsw_sp->base_mac); | |
84 | memcpy(&attr->u.ppid.id, &mlxsw_sp->base_mac, | |
85 | attr->u.ppid.id_len); | |
86 | break; | |
87 | case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS: | |
88 | attr->u.brport_flags = | |
89 | (mlxsw_sp_port->learning ? BR_LEARNING : 0) | | |
0293038e IS |
90 | (mlxsw_sp_port->learning_sync ? BR_LEARNING_SYNC : 0) | |
91 | (mlxsw_sp_port->uc_flood ? BR_FLOOD : 0); | |
56ade8fe JP |
92 | break; |
93 | default: | |
94 | return -EOPNOTSUPP; | |
95 | } | |
96 | ||
97 | return 0; | |
98 | } | |
99 | ||
100 | static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
101 | u8 state) | |
102 | { | |
103 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
104 | enum mlxsw_reg_spms_state spms_state; | |
105 | char *spms_pl; | |
106 | u16 vid; | |
107 | int err; | |
108 | ||
109 | switch (state) { | |
110 | case BR_STATE_DISABLED: /* fall-through */ | |
111 | case BR_STATE_FORWARDING: | |
112 | spms_state = MLXSW_REG_SPMS_STATE_FORWARDING; | |
113 | break; | |
114 | case BR_STATE_LISTENING: /* fall-through */ | |
115 | case BR_STATE_LEARNING: | |
116 | spms_state = MLXSW_REG_SPMS_STATE_LEARNING; | |
117 | break; | |
118 | case BR_STATE_BLOCKING: | |
119 | spms_state = MLXSW_REG_SPMS_STATE_DISCARDING; | |
120 | break; | |
121 | default: | |
122 | BUG(); | |
123 | } | |
124 | ||
125 | spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL); | |
126 | if (!spms_pl) | |
127 | return -ENOMEM; | |
128 | mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port); | |
54a73201 IS |
129 | |
130 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) { | |
131 | vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port); | |
56ade8fe | 132 | mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state); |
54a73201 IS |
133 | } else { |
134 | for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) | |
135 | mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state); | |
136 | } | |
56ade8fe JP |
137 | |
138 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); | |
139 | kfree(spms_pl); | |
140 | return err; | |
141 | } | |
142 | ||
143 | static int mlxsw_sp_port_attr_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
144 | struct switchdev_trans *trans, | |
145 | u8 state) | |
146 | { | |
147 | if (switchdev_trans_ph_prepare(trans)) | |
148 | return 0; | |
149 | ||
150 | mlxsw_sp_port->stp_state = state; | |
151 | return mlxsw_sp_port_stp_state_set(mlxsw_sp_port, state); | |
152 | } | |
153 | ||
26f0e7fb IS |
154 | static bool mlxsw_sp_vfid_is_vport_br(u16 vfid) |
155 | { | |
156 | return vfid >= MLXSW_SP_VFID_PORT_MAX; | |
157 | } | |
158 | ||
0293038e | 159 | static int __mlxsw_sp_port_flood_set(struct mlxsw_sp_port *mlxsw_sp_port, |
c06a94ef | 160 | u16 idx_begin, u16 idx_end, bool set, |
0293038e IS |
161 | bool only_uc) |
162 | { | |
163 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
7f71eb46 IS |
164 | u16 local_port = mlxsw_sp_port->local_port; |
165 | enum mlxsw_flood_table_type table_type; | |
c06a94ef | 166 | u16 range = idx_end - idx_begin + 1; |
0293038e IS |
167 | char *sftr_pl; |
168 | int err; | |
169 | ||
7f71eb46 IS |
170 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) { |
171 | table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID; | |
26f0e7fb IS |
172 | if (mlxsw_sp_vfid_is_vport_br(idx_begin)) |
173 | local_port = mlxsw_sp_port->local_port; | |
174 | else | |
175 | local_port = MLXSW_PORT_CPU_PORT; | |
7f71eb46 IS |
176 | } else { |
177 | table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST; | |
178 | } | |
179 | ||
0293038e IS |
180 | sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL); |
181 | if (!sftr_pl) | |
182 | return -ENOMEM; | |
183 | ||
c06a94ef | 184 | mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin, |
7f71eb46 | 185 | table_type, range, local_port, set); |
0293038e IS |
186 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl); |
187 | if (err) | |
188 | goto buffer_out; | |
189 | ||
190 | /* Flooding control allows one to decide whether a given port will | |
191 | * flood unicast traffic for which there is no FDB entry. | |
192 | */ | |
193 | if (only_uc) | |
194 | goto buffer_out; | |
195 | ||
c06a94ef | 196 | mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, idx_begin, |
7f71eb46 | 197 | table_type, range, local_port, set); |
0293038e IS |
198 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl); |
199 | ||
200 | buffer_out: | |
201 | kfree(sftr_pl); | |
202 | return err; | |
203 | } | |
204 | ||
205 | static int mlxsw_sp_port_uc_flood_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
206 | bool set) | |
207 | { | |
208 | struct net_device *dev = mlxsw_sp_port->dev; | |
209 | u16 vid, last_visited_vid; | |
210 | int err; | |
211 | ||
54a73201 IS |
212 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) { |
213 | u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_port); | |
214 | ||
215 | return __mlxsw_sp_port_flood_set(mlxsw_sp_port, vfid, vfid, | |
216 | set, true); | |
217 | } | |
218 | ||
0293038e IS |
219 | for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) { |
220 | err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, set, | |
221 | true); | |
222 | if (err) { | |
223 | last_visited_vid = vid; | |
224 | goto err_port_flood_set; | |
225 | } | |
226 | } | |
227 | ||
228 | return 0; | |
229 | ||
230 | err_port_flood_set: | |
231 | for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid) | |
232 | __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, !set, true); | |
233 | netdev_err(dev, "Failed to configure unicast flooding\n"); | |
234 | return err; | |
235 | } | |
236 | ||
7f71eb46 | 237 | int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 vfid, |
19ae6124 | 238 | bool set, bool only_uc) |
7f71eb46 IS |
239 | { |
240 | /* In case of vFIDs, index into the flooding table is relative to | |
241 | * the start of the vFIDs range. | |
242 | */ | |
19ae6124 IS |
243 | return __mlxsw_sp_port_flood_set(mlxsw_sp_vport, vfid, vfid, set, |
244 | only_uc); | |
7f71eb46 IS |
245 | } |
246 | ||
56ade8fe JP |
247 | static int mlxsw_sp_port_attr_br_flags_set(struct mlxsw_sp_port *mlxsw_sp_port, |
248 | struct switchdev_trans *trans, | |
249 | unsigned long brport_flags) | |
250 | { | |
0293038e IS |
251 | unsigned long uc_flood = mlxsw_sp_port->uc_flood ? BR_FLOOD : 0; |
252 | bool set; | |
253 | int err; | |
254 | ||
6c72a3d0 IS |
255 | if (!mlxsw_sp_port->bridged) |
256 | return -EINVAL; | |
257 | ||
56ade8fe JP |
258 | if (switchdev_trans_ph_prepare(trans)) |
259 | return 0; | |
260 | ||
0293038e IS |
261 | if ((uc_flood ^ brport_flags) & BR_FLOOD) { |
262 | set = mlxsw_sp_port->uc_flood ? false : true; | |
263 | err = mlxsw_sp_port_uc_flood_set(mlxsw_sp_port, set); | |
264 | if (err) | |
265 | return err; | |
266 | } | |
267 | ||
268 | mlxsw_sp_port->uc_flood = brport_flags & BR_FLOOD ? 1 : 0; | |
56ade8fe JP |
269 | mlxsw_sp_port->learning = brport_flags & BR_LEARNING ? 1 : 0; |
270 | mlxsw_sp_port->learning_sync = brport_flags & BR_LEARNING_SYNC ? 1 : 0; | |
0293038e | 271 | |
56ade8fe JP |
272 | return 0; |
273 | } | |
274 | ||
275 | static int mlxsw_sp_ageing_set(struct mlxsw_sp *mlxsw_sp, u32 ageing_time) | |
276 | { | |
277 | char sfdat_pl[MLXSW_REG_SFDAT_LEN]; | |
278 | int err; | |
279 | ||
280 | mlxsw_reg_sfdat_pack(sfdat_pl, ageing_time); | |
281 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl); | |
282 | if (err) | |
283 | return err; | |
284 | mlxsw_sp->ageing_time = ageing_time; | |
285 | return 0; | |
286 | } | |
287 | ||
288 | static int mlxsw_sp_port_attr_br_ageing_set(struct mlxsw_sp_port *mlxsw_sp_port, | |
289 | struct switchdev_trans *trans, | |
135f9ece | 290 | unsigned long ageing_clock_t) |
56ade8fe JP |
291 | { |
292 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
135f9ece | 293 | unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t); |
56ade8fe JP |
294 | u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000; |
295 | ||
296 | if (switchdev_trans_ph_prepare(trans)) | |
297 | return 0; | |
298 | ||
299 | return mlxsw_sp_ageing_set(mlxsw_sp, ageing_time); | |
300 | } | |
301 | ||
26a4ea0f ER |
302 | static int mlxsw_sp_port_attr_br_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, |
303 | struct switchdev_trans *trans, | |
304 | struct net_device *orig_dev, | |
305 | bool vlan_enabled) | |
306 | { | |
307 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
308 | ||
309 | /* SWITCHDEV_TRANS_PREPARE phase */ | |
310 | if ((!vlan_enabled) && (mlxsw_sp->master_bridge.dev == orig_dev)) { | |
311 | netdev_err(mlxsw_sp_port->dev, "Bridge must be vlan-aware\n"); | |
312 | return -EINVAL; | |
313 | } | |
314 | ||
315 | return 0; | |
316 | } | |
317 | ||
56ade8fe JP |
318 | static int mlxsw_sp_port_attr_set(struct net_device *dev, |
319 | const struct switchdev_attr *attr, | |
320 | struct switchdev_trans *trans) | |
321 | { | |
322 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
323 | int err = 0; | |
324 | ||
54a73201 IS |
325 | mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port); |
326 | if (!mlxsw_sp_port) | |
327 | return -EINVAL; | |
328 | ||
56ade8fe JP |
329 | switch (attr->id) { |
330 | case SWITCHDEV_ATTR_ID_PORT_STP_STATE: | |
331 | err = mlxsw_sp_port_attr_stp_state_set(mlxsw_sp_port, trans, | |
332 | attr->u.stp_state); | |
333 | break; | |
334 | case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS: | |
335 | err = mlxsw_sp_port_attr_br_flags_set(mlxsw_sp_port, trans, | |
336 | attr->u.brport_flags); | |
337 | break; | |
338 | case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME: | |
339 | err = mlxsw_sp_port_attr_br_ageing_set(mlxsw_sp_port, trans, | |
340 | attr->u.ageing_time); | |
341 | break; | |
26a4ea0f ER |
342 | case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING: |
343 | err = mlxsw_sp_port_attr_br_vlan_set(mlxsw_sp_port, trans, | |
344 | attr->orig_dev, | |
345 | attr->u.vlan_filtering); | |
346 | break; | |
56ade8fe JP |
347 | default: |
348 | err = -EOPNOTSUPP; | |
349 | break; | |
350 | } | |
351 | ||
352 | return err; | |
353 | } | |
354 | ||
355 | static int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid) | |
356 | { | |
357 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
358 | char spvid_pl[MLXSW_REG_SPVID_LEN]; | |
359 | ||
360 | mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid); | |
361 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl); | |
362 | } | |
363 | ||
364 | static int mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid) | |
365 | { | |
366 | char sfmr_pl[MLXSW_REG_SFMR_LEN]; | |
367 | int err; | |
368 | ||
369 | mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, fid); | |
370 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); | |
371 | ||
372 | if (err) | |
373 | return err; | |
374 | ||
375 | set_bit(fid, mlxsw_sp->active_fids); | |
376 | return 0; | |
377 | } | |
378 | ||
379 | static void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, u16 fid) | |
380 | { | |
381 | char sfmr_pl[MLXSW_REG_SFMR_LEN]; | |
382 | ||
383 | clear_bit(fid, mlxsw_sp->active_fids); | |
384 | ||
385 | mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID, | |
386 | fid, fid); | |
387 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); | |
388 | } | |
389 | ||
390 | static int mlxsw_sp_port_fid_map(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid) | |
391 | { | |
392 | enum mlxsw_reg_svfa_mt mt; | |
393 | ||
7f71eb46 | 394 | if (!list_empty(&mlxsw_sp_port->vports_list)) |
56ade8fe JP |
395 | mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; |
396 | else | |
397 | mt = MLXSW_REG_SVFA_MT_VID_TO_FID; | |
398 | ||
399 | return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, fid, fid); | |
400 | } | |
401 | ||
402 | static int mlxsw_sp_port_fid_unmap(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid) | |
403 | { | |
404 | enum mlxsw_reg_svfa_mt mt; | |
405 | ||
7f71eb46 | 406 | if (list_empty(&mlxsw_sp_port->vports_list)) |
56ade8fe JP |
407 | return 0; |
408 | ||
409 | mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; | |
410 | return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, fid, fid); | |
411 | } | |
412 | ||
56ade8fe JP |
413 | static int mlxsw_sp_port_add_vids(struct net_device *dev, u16 vid_begin, |
414 | u16 vid_end) | |
415 | { | |
416 | u16 vid; | |
417 | int err; | |
418 | ||
419 | for (vid = vid_begin; vid <= vid_end; vid++) { | |
420 | err = mlxsw_sp_port_add_vid(dev, 0, vid); | |
421 | if (err) | |
422 | goto err_port_add_vid; | |
423 | } | |
424 | return 0; | |
425 | ||
426 | err_port_add_vid: | |
427 | for (vid--; vid >= vid_begin; vid--) | |
428 | mlxsw_sp_port_kill_vid(dev, 0, vid); | |
429 | return err; | |
430 | } | |
431 | ||
3b7ad5ec IS |
432 | static int __mlxsw_sp_port_vlans_set(struct mlxsw_sp_port *mlxsw_sp_port, |
433 | u16 vid_begin, u16 vid_end, bool is_member, | |
434 | bool untagged) | |
435 | { | |
436 | u16 vid, vid_e; | |
437 | int err; | |
438 | ||
439 | for (vid = vid_begin; vid <= vid_end; | |
440 | vid += MLXSW_REG_SPVM_REC_MAX_COUNT) { | |
441 | vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1), | |
442 | vid_end); | |
443 | ||
444 | err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e, | |
445 | is_member, untagged); | |
446 | if (err) | |
447 | return err; | |
448 | } | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
56ade8fe JP |
453 | static int __mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port, |
454 | u16 vid_begin, u16 vid_end, | |
455 | bool flag_untagged, bool flag_pvid) | |
456 | { | |
457 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; | |
458 | struct net_device *dev = mlxsw_sp_port->dev; | |
b07a966c | 459 | u16 vid, last_visited_vid, old_pvid; |
56ade8fe | 460 | enum mlxsw_reg_svfa_mt mt; |
56ade8fe JP |
461 | int err; |
462 | ||
463 | /* In case this is invoked with BRIDGE_FLAGS_SELF and port is | |
464 | * not bridged, then packets ingressing through the port with | |
465 | * the specified VIDs will be directed to CPU. | |
466 | */ | |
467 | if (!mlxsw_sp_port->bridged) | |
468 | return mlxsw_sp_port_add_vids(dev, vid_begin, vid_end); | |
469 | ||
470 | for (vid = vid_begin; vid <= vid_end; vid++) { | |
471 | if (!test_bit(vid, mlxsw_sp->active_fids)) { | |
472 | err = mlxsw_sp_fid_create(mlxsw_sp, vid); | |
473 | if (err) { | |
474 | netdev_err(dev, "Failed to create FID=%d\n", | |
475 | vid); | |
476 | return err; | |
477 | } | |
478 | ||
479 | /* When creating a FID, we set a VID to FID mapping | |
480 | * regardless of the port's mode. | |
481 | */ | |
482 | mt = MLXSW_REG_SVFA_MT_VID_TO_FID; | |
483 | err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, | |
484 | true, vid, vid); | |
485 | if (err) { | |
486 | netdev_err(dev, "Failed to create FID=VID=%d mapping\n", | |
487 | vid); | |
b07a966c | 488 | goto err_port_vid_to_fid_set; |
56ade8fe JP |
489 | } |
490 | } | |
b07a966c | 491 | } |
56ade8fe | 492 | |
b07a966c IS |
493 | /* Set FID mapping according to port's mode */ |
494 | for (vid = vid_begin; vid <= vid_end; vid++) { | |
56ade8fe JP |
495 | err = mlxsw_sp_port_fid_map(mlxsw_sp_port, vid); |
496 | if (err) { | |
497 | netdev_err(dev, "Failed to map FID=%d", vid); | |
b07a966c IS |
498 | last_visited_vid = --vid; |
499 | goto err_port_fid_map; | |
56ade8fe | 500 | } |
1b3433a9 | 501 | } |
56ade8fe | 502 | |
1b3433a9 IS |
503 | err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end, |
504 | true, false); | |
505 | if (err) { | |
506 | netdev_err(dev, "Failed to configure flooding\n"); | |
b07a966c | 507 | goto err_port_flood_set; |
56ade8fe JP |
508 | } |
509 | ||
3b7ad5ec IS |
510 | err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, |
511 | true, flag_untagged); | |
512 | if (err) { | |
513 | netdev_err(dev, "Unable to add VIDs %d-%d\n", vid_begin, | |
514 | vid_end); | |
b07a966c | 515 | goto err_port_vlans_set; |
56ade8fe JP |
516 | } |
517 | ||
b07a966c IS |
518 | old_pvid = mlxsw_sp_port->pvid; |
519 | if (flag_pvid && old_pvid != vid_begin) { | |
520 | err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid_begin); | |
56ade8fe | 521 | if (err) { |
b07a966c IS |
522 | netdev_err(dev, "Unable to add PVID %d\n", vid_begin); |
523 | goto err_port_pvid_set; | |
56ade8fe | 524 | } |
b07a966c | 525 | mlxsw_sp_port->pvid = vid_begin; |
56ade8fe JP |
526 | } |
527 | ||
528 | /* Changing activity bits only if HW operation succeded */ | |
fc1273af | 529 | for (vid = vid_begin; vid <= vid_end; vid++) { |
56ade8fe | 530 | set_bit(vid, mlxsw_sp_port->active_vlans); |
fc1273af ER |
531 | if (flag_untagged) |
532 | set_bit(vid, mlxsw_sp_port->untagged_vlans); | |
533 | else | |
534 | clear_bit(vid, mlxsw_sp_port->untagged_vlans); | |
535 | } | |
56ade8fe | 536 | |
b07a966c IS |
537 | /* STP state change must be done after we set active VLANs */ |
538 | err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port, | |
539 | mlxsw_sp_port->stp_state); | |
540 | if (err) { | |
541 | netdev_err(dev, "Failed to set STP state\n"); | |
542 | goto err_port_stp_state_set; | |
543 | } | |
544 | ||
545 | return 0; | |
546 | ||
547 | err_port_vid_to_fid_set: | |
548 | mlxsw_sp_fid_destroy(mlxsw_sp, vid); | |
549 | return err; | |
550 | ||
551 | err_port_stp_state_set: | |
552 | for (vid = vid_begin; vid <= vid_end; vid++) | |
553 | clear_bit(vid, mlxsw_sp_port->active_vlans); | |
554 | if (old_pvid != mlxsw_sp_port->pvid) | |
555 | mlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid); | |
556 | err_port_pvid_set: | |
557 | __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false, | |
558 | false); | |
559 | err_port_vlans_set: | |
560 | __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end, false, | |
561 | false); | |
562 | err_port_flood_set: | |
563 | last_visited_vid = vid_end; | |
564 | err_port_fid_map: | |
565 | for (vid = last_visited_vid; vid >= vid_begin; vid--) | |
566 | mlxsw_sp_port_fid_unmap(mlxsw_sp_port, vid); | |
567 | return err; | |
56ade8fe JP |
568 | } |
569 | ||
570 | static int mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port, | |
571 | const struct switchdev_obj_port_vlan *vlan, | |
572 | struct switchdev_trans *trans) | |
573 | { | |
e4a13055 ER |
574 | bool flag_untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; |
575 | bool flag_pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; | |
56ade8fe JP |
576 | |
577 | if (switchdev_trans_ph_prepare(trans)) | |
578 | return 0; | |
579 | ||
580 | return __mlxsw_sp_port_vlans_add(mlxsw_sp_port, | |
581 | vlan->vid_begin, vlan->vid_end, | |
e4a13055 | 582 | flag_untagged, flag_pvid); |
56ade8fe JP |
583 | } |
584 | ||
8a1ab5d7 | 585 | static enum mlxsw_reg_sfd_rec_policy mlxsw_sp_sfd_rec_policy(bool dynamic) |
56ade8fe | 586 | { |
8a1ab5d7 JP |
587 | return dynamic ? MLXSW_REG_SFD_REC_POLICY_DYNAMIC_ENTRY_INGRESS : |
588 | MLXSW_REG_SFD_REC_POLICY_STATIC_ENTRY; | |
589 | } | |
590 | ||
591 | static enum mlxsw_reg_sfd_op mlxsw_sp_sfd_op(bool adding) | |
592 | { | |
593 | return adding ? MLXSW_REG_SFD_OP_WRITE_EDIT : | |
594 | MLXSW_REG_SFD_OP_WRITE_REMOVE; | |
595 | } | |
596 | ||
2fa9d45e | 597 | static int mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
9de6a80e | 598 | const char *mac, u16 fid, bool adding, |
8a1ab5d7 JP |
599 | bool dynamic) |
600 | { | |
56ade8fe JP |
601 | char *sfd_pl; |
602 | int err; | |
603 | ||
56ade8fe JP |
604 | sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL); |
605 | if (!sfd_pl) | |
606 | return -ENOMEM; | |
607 | ||
8a1ab5d7 JP |
608 | mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0); |
609 | mlxsw_reg_sfd_uc_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic), | |
9de6a80e | 610 | mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP, |
2fa9d45e | 611 | local_port); |
8a1ab5d7 JP |
612 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl); |
613 | kfree(sfd_pl); | |
614 | ||
615 | return err; | |
616 | } | |
617 | ||
618 | static int mlxsw_sp_port_fdb_uc_lag_op(struct mlxsw_sp *mlxsw_sp, u16 lag_id, | |
64771e31 IS |
619 | const char *mac, u16 fid, u16 lag_vid, |
620 | bool adding, bool dynamic) | |
8a1ab5d7 JP |
621 | { |
622 | char *sfd_pl; | |
623 | int err; | |
624 | ||
625 | sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL); | |
626 | if (!sfd_pl) | |
627 | return -ENOMEM; | |
628 | ||
629 | mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0); | |
630 | mlxsw_reg_sfd_uc_lag_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic), | |
64771e31 IS |
631 | mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP, |
632 | lag_vid, lag_id); | |
8a1ab5d7 | 633 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl); |
56ade8fe JP |
634 | kfree(sfd_pl); |
635 | ||
636 | return err; | |
637 | } | |
638 | ||
639 | static int | |
640 | mlxsw_sp_port_fdb_static_add(struct mlxsw_sp_port *mlxsw_sp_port, | |
641 | const struct switchdev_obj_port_fdb *fdb, | |
642 | struct switchdev_trans *trans) | |
643 | { | |
9de6a80e | 644 | u16 fid = fdb->vid; |
64771e31 | 645 | u16 lag_vid = 0; |
8a1ab5d7 | 646 | |
56ade8fe JP |
647 | if (switchdev_trans_ph_prepare(trans)) |
648 | return 0; | |
649 | ||
54a73201 IS |
650 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) { |
651 | u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_port); | |
652 | ||
653 | fid = mlxsw_sp_vfid_to_fid(vfid); | |
64771e31 | 654 | lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port); |
54a73201 IS |
655 | } |
656 | ||
9de6a80e IS |
657 | if (!fid) |
658 | fid = mlxsw_sp_port->pvid; | |
8a1ab5d7 JP |
659 | |
660 | if (!mlxsw_sp_port->lagged) | |
2fa9d45e JP |
661 | return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp, |
662 | mlxsw_sp_port->local_port, | |
9de6a80e | 663 | fdb->addr, fid, true, false); |
8a1ab5d7 JP |
664 | else |
665 | return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp, | |
666 | mlxsw_sp_port->lag_id, | |
64771e31 IS |
667 | fdb->addr, fid, lag_vid, |
668 | true, false); | |
56ade8fe JP |
669 | } |
670 | ||
671 | static int mlxsw_sp_port_obj_add(struct net_device *dev, | |
672 | const struct switchdev_obj *obj, | |
673 | struct switchdev_trans *trans) | |
674 | { | |
675 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
676 | int err = 0; | |
677 | ||
54a73201 IS |
678 | mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port); |
679 | if (!mlxsw_sp_port) | |
680 | return -EINVAL; | |
681 | ||
56ade8fe JP |
682 | switch (obj->id) { |
683 | case SWITCHDEV_OBJ_ID_PORT_VLAN: | |
54a73201 IS |
684 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) |
685 | return 0; | |
686 | ||
56ade8fe JP |
687 | err = mlxsw_sp_port_vlans_add(mlxsw_sp_port, |
688 | SWITCHDEV_OBJ_PORT_VLAN(obj), | |
689 | trans); | |
690 | break; | |
691 | case SWITCHDEV_OBJ_ID_PORT_FDB: | |
692 | err = mlxsw_sp_port_fdb_static_add(mlxsw_sp_port, | |
693 | SWITCHDEV_OBJ_PORT_FDB(obj), | |
694 | trans); | |
695 | break; | |
696 | default: | |
697 | err = -EOPNOTSUPP; | |
698 | break; | |
699 | } | |
700 | ||
701 | return err; | |
702 | } | |
703 | ||
704 | static int mlxsw_sp_port_kill_vids(struct net_device *dev, u16 vid_begin, | |
705 | u16 vid_end) | |
706 | { | |
707 | u16 vid; | |
708 | int err; | |
709 | ||
710 | for (vid = vid_begin; vid <= vid_end; vid++) { | |
711 | err = mlxsw_sp_port_kill_vid(dev, 0, vid); | |
712 | if (err) | |
713 | return err; | |
714 | } | |
715 | ||
716 | return 0; | |
717 | } | |
718 | ||
719 | static int __mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port, | |
720 | u16 vid_begin, u16 vid_end, bool init) | |
721 | { | |
722 | struct net_device *dev = mlxsw_sp_port->dev; | |
3b7ad5ec | 723 | u16 vid, pvid; |
56ade8fe JP |
724 | int err; |
725 | ||
726 | /* In case this is invoked with BRIDGE_FLAGS_SELF and port is | |
727 | * not bridged, then prevent packets ingressing through the | |
728 | * port with the specified VIDs from being trapped to CPU. | |
729 | */ | |
730 | if (!init && !mlxsw_sp_port->bridged) | |
731 | return mlxsw_sp_port_kill_vids(dev, vid_begin, vid_end); | |
732 | ||
3b7ad5ec IS |
733 | err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, |
734 | false, false); | |
735 | if (err) { | |
736 | netdev_err(dev, "Unable to del VIDs %d-%d\n", vid_begin, | |
737 | vid_end); | |
738 | return err; | |
56ade8fe JP |
739 | } |
740 | ||
06c071f6 IS |
741 | pvid = mlxsw_sp_port->pvid; |
742 | if (pvid >= vid_begin && pvid <= vid_end && pvid != 1) { | |
56ade8fe | 743 | /* Default VLAN is always 1 */ |
06c071f6 | 744 | err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1); |
56ade8fe | 745 | if (err) { |
06c071f6 | 746 | netdev_err(dev, "Unable to del PVID %d\n", pvid); |
56ade8fe JP |
747 | return err; |
748 | } | |
06c071f6 | 749 | mlxsw_sp_port->pvid = 1; |
56ade8fe JP |
750 | } |
751 | ||
752 | if (init) | |
753 | goto out; | |
754 | ||
1b3433a9 IS |
755 | err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end, |
756 | false, false); | |
757 | if (err) { | |
758 | netdev_err(dev, "Failed to clear flooding\n"); | |
759 | return err; | |
760 | } | |
56ade8fe | 761 | |
1b3433a9 | 762 | for (vid = vid_begin; vid <= vid_end; vid++) { |
56ade8fe JP |
763 | /* Remove FID mapping in case of Virtual mode */ |
764 | err = mlxsw_sp_port_fid_unmap(mlxsw_sp_port, vid); | |
765 | if (err) { | |
766 | netdev_err(dev, "Failed to unmap FID=%d", vid); | |
767 | return err; | |
768 | } | |
769 | } | |
770 | ||
771 | out: | |
772 | /* Changing activity bits only if HW operation succeded */ | |
773 | for (vid = vid_begin; vid <= vid_end; vid++) | |
774 | clear_bit(vid, mlxsw_sp_port->active_vlans); | |
775 | ||
776 | return 0; | |
777 | } | |
778 | ||
779 | static int mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port, | |
780 | const struct switchdev_obj_port_vlan *vlan) | |
781 | { | |
782 | return __mlxsw_sp_port_vlans_del(mlxsw_sp_port, | |
783 | vlan->vid_begin, vlan->vid_end, false); | |
784 | } | |
785 | ||
786 | static int | |
787 | mlxsw_sp_port_fdb_static_del(struct mlxsw_sp_port *mlxsw_sp_port, | |
788 | const struct switchdev_obj_port_fdb *fdb) | |
789 | { | |
9de6a80e | 790 | u16 fid = fdb->vid; |
64771e31 | 791 | u16 lag_vid = 0; |
9de6a80e | 792 | |
54a73201 IS |
793 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) { |
794 | u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_port); | |
795 | ||
796 | fid = mlxsw_sp_vfid_to_fid(vfid); | |
64771e31 | 797 | lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port); |
54a73201 IS |
798 | } |
799 | ||
8a1ab5d7 | 800 | if (!mlxsw_sp_port->lagged) |
2fa9d45e JP |
801 | return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp, |
802 | mlxsw_sp_port->local_port, | |
9de6a80e | 803 | fdb->addr, fid, |
8a1ab5d7 JP |
804 | false, false); |
805 | else | |
806 | return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp, | |
807 | mlxsw_sp_port->lag_id, | |
64771e31 | 808 | fdb->addr, fid, lag_vid, |
8a1ab5d7 | 809 | false, false); |
56ade8fe JP |
810 | } |
811 | ||
812 | static int mlxsw_sp_port_obj_del(struct net_device *dev, | |
813 | const struct switchdev_obj *obj) | |
814 | { | |
815 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
816 | int err = 0; | |
817 | ||
54a73201 IS |
818 | mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port); |
819 | if (!mlxsw_sp_port) | |
820 | return -EINVAL; | |
821 | ||
56ade8fe JP |
822 | switch (obj->id) { |
823 | case SWITCHDEV_OBJ_ID_PORT_VLAN: | |
54a73201 IS |
824 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) |
825 | return 0; | |
826 | ||
56ade8fe JP |
827 | err = mlxsw_sp_port_vlans_del(mlxsw_sp_port, |
828 | SWITCHDEV_OBJ_PORT_VLAN(obj)); | |
829 | break; | |
830 | case SWITCHDEV_OBJ_ID_PORT_FDB: | |
831 | err = mlxsw_sp_port_fdb_static_del(mlxsw_sp_port, | |
832 | SWITCHDEV_OBJ_PORT_FDB(obj)); | |
833 | break; | |
834 | default: | |
835 | err = -EOPNOTSUPP; | |
836 | break; | |
837 | } | |
838 | ||
839 | return err; | |
840 | } | |
841 | ||
8a1ab5d7 JP |
842 | static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp, |
843 | u16 lag_id) | |
844 | { | |
845 | struct mlxsw_sp_port *mlxsw_sp_port; | |
846 | int i; | |
847 | ||
848 | for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) { | |
849 | mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i); | |
850 | if (mlxsw_sp_port) | |
851 | return mlxsw_sp_port; | |
852 | } | |
853 | return NULL; | |
854 | } | |
855 | ||
56ade8fe JP |
856 | static int mlxsw_sp_port_fdb_dump(struct mlxsw_sp_port *mlxsw_sp_port, |
857 | struct switchdev_obj_port_fdb *fdb, | |
858 | switchdev_obj_dump_cb_t *cb) | |
859 | { | |
8a1ab5d7 | 860 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
54a73201 | 861 | u16 vport_vid = 0, vport_fid = 0; |
56ade8fe JP |
862 | char *sfd_pl; |
863 | char mac[ETH_ALEN]; | |
9de6a80e | 864 | u16 fid; |
56ade8fe | 865 | u8 local_port; |
8a1ab5d7 | 866 | u16 lag_id; |
56ade8fe JP |
867 | u8 num_rec; |
868 | int stored_err = 0; | |
869 | int i; | |
870 | int err; | |
871 | ||
872 | sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL); | |
873 | if (!sfd_pl) | |
874 | return -ENOMEM; | |
875 | ||
54a73201 IS |
876 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) { |
877 | u16 tmp; | |
878 | ||
879 | tmp = mlxsw_sp_vport_vfid_get(mlxsw_sp_port); | |
880 | vport_fid = mlxsw_sp_vfid_to_fid(tmp); | |
881 | vport_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port); | |
882 | } | |
883 | ||
56ade8fe JP |
884 | mlxsw_reg_sfd_pack(sfd_pl, MLXSW_REG_SFD_OP_QUERY_DUMP, 0); |
885 | do { | |
886 | mlxsw_reg_sfd_num_rec_set(sfd_pl, MLXSW_REG_SFD_REC_MAX_COUNT); | |
8a1ab5d7 | 887 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl); |
56ade8fe JP |
888 | if (err) |
889 | goto out; | |
890 | ||
891 | num_rec = mlxsw_reg_sfd_num_rec_get(sfd_pl); | |
892 | ||
893 | /* Even in case of error, we have to run the dump to the end | |
894 | * so the session in firmware is finished. | |
895 | */ | |
896 | if (stored_err) | |
897 | continue; | |
898 | ||
899 | for (i = 0; i < num_rec; i++) { | |
900 | switch (mlxsw_reg_sfd_rec_type_get(sfd_pl, i)) { | |
901 | case MLXSW_REG_SFD_REC_TYPE_UNICAST: | |
9de6a80e | 902 | mlxsw_reg_sfd_uc_unpack(sfd_pl, i, mac, &fid, |
56ade8fe JP |
903 | &local_port); |
904 | if (local_port == mlxsw_sp_port->local_port) { | |
54a73201 IS |
905 | if (vport_fid && vport_fid != fid) |
906 | continue; | |
907 | else if (vport_fid) | |
908 | fdb->vid = vport_vid; | |
909 | else | |
910 | fdb->vid = fid; | |
56ade8fe JP |
911 | ether_addr_copy(fdb->addr, mac); |
912 | fdb->ndm_state = NUD_REACHABLE; | |
56ade8fe JP |
913 | err = cb(&fdb->obj); |
914 | if (err) | |
915 | stored_err = err; | |
916 | } | |
8a1ab5d7 JP |
917 | break; |
918 | case MLXSW_REG_SFD_REC_TYPE_UNICAST_LAG: | |
919 | mlxsw_reg_sfd_uc_lag_unpack(sfd_pl, i, | |
9de6a80e | 920 | mac, &fid, &lag_id); |
8a1ab5d7 JP |
921 | if (mlxsw_sp_port == |
922 | mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id)) { | |
54a73201 IS |
923 | if (vport_fid && vport_fid != fid) |
924 | continue; | |
925 | else if (vport_fid) | |
926 | fdb->vid = vport_vid; | |
927 | else | |
928 | fdb->vid = fid; | |
8a1ab5d7 JP |
929 | ether_addr_copy(fdb->addr, mac); |
930 | fdb->ndm_state = NUD_REACHABLE; | |
8a1ab5d7 JP |
931 | err = cb(&fdb->obj); |
932 | if (err) | |
933 | stored_err = err; | |
934 | } | |
935 | break; | |
56ade8fe JP |
936 | } |
937 | } | |
938 | } while (num_rec == MLXSW_REG_SFD_REC_MAX_COUNT); | |
939 | ||
940 | out: | |
941 | kfree(sfd_pl); | |
942 | return stored_err ? stored_err : err; | |
943 | } | |
944 | ||
945 | static int mlxsw_sp_port_vlan_dump(struct mlxsw_sp_port *mlxsw_sp_port, | |
946 | struct switchdev_obj_port_vlan *vlan, | |
947 | switchdev_obj_dump_cb_t *cb) | |
948 | { | |
949 | u16 vid; | |
950 | int err = 0; | |
951 | ||
54a73201 IS |
952 | if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) { |
953 | vlan->flags = 0; | |
954 | vlan->vid_begin = mlxsw_sp_vport_vid_get(mlxsw_sp_port); | |
955 | vlan->vid_end = mlxsw_sp_vport_vid_get(mlxsw_sp_port); | |
956 | return cb(&vlan->obj); | |
957 | } | |
958 | ||
56ade8fe JP |
959 | for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) { |
960 | vlan->flags = 0; | |
961 | if (vid == mlxsw_sp_port->pvid) | |
962 | vlan->flags |= BRIDGE_VLAN_INFO_PVID; | |
fc1273af ER |
963 | if (test_bit(vid, mlxsw_sp_port->untagged_vlans)) |
964 | vlan->flags |= BRIDGE_VLAN_INFO_UNTAGGED; | |
56ade8fe JP |
965 | vlan->vid_begin = vid; |
966 | vlan->vid_end = vid; | |
967 | err = cb(&vlan->obj); | |
968 | if (err) | |
969 | break; | |
970 | } | |
971 | return err; | |
972 | } | |
973 | ||
974 | static int mlxsw_sp_port_obj_dump(struct net_device *dev, | |
975 | struct switchdev_obj *obj, | |
976 | switchdev_obj_dump_cb_t *cb) | |
977 | { | |
978 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); | |
979 | int err = 0; | |
980 | ||
54a73201 IS |
981 | mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port); |
982 | if (!mlxsw_sp_port) | |
983 | return -EINVAL; | |
984 | ||
56ade8fe JP |
985 | switch (obj->id) { |
986 | case SWITCHDEV_OBJ_ID_PORT_VLAN: | |
987 | err = mlxsw_sp_port_vlan_dump(mlxsw_sp_port, | |
988 | SWITCHDEV_OBJ_PORT_VLAN(obj), cb); | |
989 | break; | |
990 | case SWITCHDEV_OBJ_ID_PORT_FDB: | |
991 | err = mlxsw_sp_port_fdb_dump(mlxsw_sp_port, | |
992 | SWITCHDEV_OBJ_PORT_FDB(obj), cb); | |
993 | break; | |
994 | default: | |
995 | err = -EOPNOTSUPP; | |
996 | break; | |
997 | } | |
998 | ||
999 | return err; | |
1000 | } | |
1001 | ||
c7070fc4 | 1002 | static const struct switchdev_ops mlxsw_sp_port_switchdev_ops = { |
56ade8fe JP |
1003 | .switchdev_port_attr_get = mlxsw_sp_port_attr_get, |
1004 | .switchdev_port_attr_set = mlxsw_sp_port_attr_set, | |
1005 | .switchdev_port_obj_add = mlxsw_sp_port_obj_add, | |
1006 | .switchdev_port_obj_del = mlxsw_sp_port_obj_del, | |
1007 | .switchdev_port_obj_dump = mlxsw_sp_port_obj_dump, | |
1008 | }; | |
1009 | ||
8a1ab5d7 JP |
1010 | static void mlxsw_sp_fdb_call_notifiers(bool learning, bool learning_sync, |
1011 | bool adding, char *mac, u16 vid, | |
1012 | struct net_device *dev) | |
1013 | { | |
1014 | struct switchdev_notifier_fdb_info info; | |
1015 | unsigned long notifier_type; | |
1016 | ||
1017 | if (learning && learning_sync) { | |
1018 | info.addr = mac; | |
1019 | info.vid = vid; | |
1020 | notifier_type = adding ? SWITCHDEV_FDB_ADD : SWITCHDEV_FDB_DEL; | |
1021 | call_switchdev_notifiers(notifier_type, dev, &info.info); | |
1022 | } | |
1023 | } | |
1024 | ||
56ade8fe JP |
1025 | static void mlxsw_sp_fdb_notify_mac_process(struct mlxsw_sp *mlxsw_sp, |
1026 | char *sfn_pl, int rec_index, | |
1027 | bool adding) | |
1028 | { | |
1029 | struct mlxsw_sp_port *mlxsw_sp_port; | |
1030 | char mac[ETH_ALEN]; | |
1031 | u8 local_port; | |
9de6a80e | 1032 | u16 vid, fid; |
12f1501e | 1033 | bool do_notification = true; |
56ade8fe JP |
1034 | int err; |
1035 | ||
9de6a80e | 1036 | mlxsw_reg_sfn_mac_unpack(sfn_pl, rec_index, mac, &fid, &local_port); |
56ade8fe JP |
1037 | mlxsw_sp_port = mlxsw_sp->ports[local_port]; |
1038 | if (!mlxsw_sp_port) { | |
1039 | dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Incorrect local port in FDB notification\n"); | |
12f1501e | 1040 | goto just_remove; |
56ade8fe JP |
1041 | } |
1042 | ||
aac78a44 IS |
1043 | if (mlxsw_sp_fid_is_vfid(fid)) { |
1044 | u16 vfid = mlxsw_sp_fid_to_vfid(fid); | |
1045 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
1046 | ||
1047 | mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_vfid(mlxsw_sp_port, | |
1048 | vfid); | |
1049 | if (!mlxsw_sp_vport) { | |
1050 | netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n"); | |
12f1501e | 1051 | goto just_remove; |
aac78a44 | 1052 | } |
aac78a44 IS |
1053 | vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); |
1054 | /* Override the physical port with the vPort. */ | |
1055 | mlxsw_sp_port = mlxsw_sp_vport; | |
1056 | } else { | |
1057 | vid = fid; | |
1058 | } | |
1059 | ||
12f1501e JP |
1060 | adding = adding && mlxsw_sp_port->learning; |
1061 | ||
1062 | do_fdb_op: | |
2fa9d45e | 1063 | err = mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid, |
12f1501e | 1064 | adding, true); |
56ade8fe JP |
1065 | if (err) { |
1066 | if (net_ratelimit()) | |
1067 | netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n"); | |
1068 | return; | |
1069 | } | |
1070 | ||
12f1501e JP |
1071 | if (!do_notification) |
1072 | return; | |
8a1ab5d7 JP |
1073 | mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning, |
1074 | mlxsw_sp_port->learning_sync, | |
1075 | adding, mac, vid, mlxsw_sp_port->dev); | |
12f1501e JP |
1076 | return; |
1077 | ||
1078 | just_remove: | |
1079 | adding = false; | |
1080 | do_notification = false; | |
1081 | goto do_fdb_op; | |
8a1ab5d7 | 1082 | } |
56ade8fe | 1083 | |
8a1ab5d7 JP |
1084 | static void mlxsw_sp_fdb_notify_mac_lag_process(struct mlxsw_sp *mlxsw_sp, |
1085 | char *sfn_pl, int rec_index, | |
1086 | bool adding) | |
1087 | { | |
1088 | struct mlxsw_sp_port *mlxsw_sp_port; | |
1089 | char mac[ETH_ALEN]; | |
64771e31 | 1090 | u16 lag_vid = 0; |
8a1ab5d7 | 1091 | u16 lag_id; |
9de6a80e | 1092 | u16 vid, fid; |
12f1501e | 1093 | bool do_notification = true; |
8a1ab5d7 JP |
1094 | int err; |
1095 | ||
9de6a80e | 1096 | mlxsw_reg_sfn_mac_lag_unpack(sfn_pl, rec_index, mac, &fid, &lag_id); |
8a1ab5d7 JP |
1097 | mlxsw_sp_port = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id); |
1098 | if (!mlxsw_sp_port) { | |
1099 | dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Cannot find port representor for LAG\n"); | |
12f1501e | 1100 | goto just_remove; |
56ade8fe | 1101 | } |
8a1ab5d7 | 1102 | |
aac78a44 IS |
1103 | if (mlxsw_sp_fid_is_vfid(fid)) { |
1104 | u16 vfid = mlxsw_sp_fid_to_vfid(fid); | |
1105 | struct mlxsw_sp_port *mlxsw_sp_vport; | |
1106 | ||
1107 | mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_vfid(mlxsw_sp_port, | |
1108 | vfid); | |
1109 | if (!mlxsw_sp_vport) { | |
1110 | netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n"); | |
12f1501e | 1111 | goto just_remove; |
aac78a44 IS |
1112 | } |
1113 | ||
1114 | vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); | |
64771e31 | 1115 | lag_vid = vid; |
aac78a44 IS |
1116 | /* Override the physical port with the vPort. */ |
1117 | mlxsw_sp_port = mlxsw_sp_vport; | |
1118 | } else { | |
1119 | vid = fid; | |
1120 | } | |
1121 | ||
12f1501e JP |
1122 | adding = adding && mlxsw_sp_port->learning; |
1123 | ||
1124 | do_fdb_op: | |
64771e31 | 1125 | err = mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp, lag_id, mac, fid, lag_vid, |
12f1501e | 1126 | adding, true); |
8a1ab5d7 JP |
1127 | if (err) { |
1128 | if (net_ratelimit()) | |
1129 | netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n"); | |
1130 | return; | |
1131 | } | |
1132 | ||
12f1501e JP |
1133 | if (!do_notification) |
1134 | return; | |
8a1ab5d7 JP |
1135 | mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning, |
1136 | mlxsw_sp_port->learning_sync, | |
1137 | adding, mac, vid, | |
1138 | mlxsw_sp_lag_get(mlxsw_sp, lag_id)->dev); | |
12f1501e JP |
1139 | return; |
1140 | ||
1141 | just_remove: | |
1142 | adding = false; | |
1143 | do_notification = false; | |
1144 | goto do_fdb_op; | |
56ade8fe JP |
1145 | } |
1146 | ||
1147 | static void mlxsw_sp_fdb_notify_rec_process(struct mlxsw_sp *mlxsw_sp, | |
1148 | char *sfn_pl, int rec_index) | |
1149 | { | |
1150 | switch (mlxsw_reg_sfn_rec_type_get(sfn_pl, rec_index)) { | |
1151 | case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC: | |
1152 | mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl, | |
1153 | rec_index, true); | |
1154 | break; | |
1155 | case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC: | |
1156 | mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl, | |
1157 | rec_index, false); | |
1158 | break; | |
8a1ab5d7 JP |
1159 | case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC_LAG: |
1160 | mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl, | |
1161 | rec_index, true); | |
1162 | break; | |
1163 | case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC_LAG: | |
1164 | mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl, | |
1165 | rec_index, false); | |
1166 | break; | |
56ade8fe JP |
1167 | } |
1168 | } | |
1169 | ||
1170 | static void mlxsw_sp_fdb_notify_work_schedule(struct mlxsw_sp *mlxsw_sp) | |
1171 | { | |
1172 | schedule_delayed_work(&mlxsw_sp->fdb_notify.dw, | |
1173 | msecs_to_jiffies(mlxsw_sp->fdb_notify.interval)); | |
1174 | } | |
1175 | ||
1176 | static void mlxsw_sp_fdb_notify_work(struct work_struct *work) | |
1177 | { | |
1178 | struct mlxsw_sp *mlxsw_sp; | |
1179 | char *sfn_pl; | |
1180 | u8 num_rec; | |
1181 | int i; | |
1182 | int err; | |
1183 | ||
1184 | sfn_pl = kmalloc(MLXSW_REG_SFN_LEN, GFP_KERNEL); | |
1185 | if (!sfn_pl) | |
1186 | return; | |
1187 | ||
1188 | mlxsw_sp = container_of(work, struct mlxsw_sp, fdb_notify.dw.work); | |
1189 | ||
1190 | do { | |
1191 | mlxsw_reg_sfn_pack(sfn_pl); | |
1192 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfn), sfn_pl); | |
1193 | if (err) { | |
1194 | dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Failed to get FDB notifications\n"); | |
1195 | break; | |
1196 | } | |
1197 | num_rec = mlxsw_reg_sfn_num_rec_get(sfn_pl); | |
1198 | for (i = 0; i < num_rec; i++) | |
1199 | mlxsw_sp_fdb_notify_rec_process(mlxsw_sp, sfn_pl, i); | |
1200 | ||
1201 | } while (num_rec); | |
1202 | ||
1203 | kfree(sfn_pl); | |
1204 | mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp); | |
1205 | } | |
1206 | ||
1207 | static int mlxsw_sp_fdb_init(struct mlxsw_sp *mlxsw_sp) | |
1208 | { | |
1209 | int err; | |
1210 | ||
1211 | err = mlxsw_sp_ageing_set(mlxsw_sp, MLXSW_SP_DEFAULT_AGEING_TIME); | |
1212 | if (err) { | |
1213 | dev_err(mlxsw_sp->bus_info->dev, "Failed to set default ageing time\n"); | |
1214 | return err; | |
1215 | } | |
1216 | INIT_DELAYED_WORK(&mlxsw_sp->fdb_notify.dw, mlxsw_sp_fdb_notify_work); | |
1217 | mlxsw_sp->fdb_notify.interval = MLXSW_SP_DEFAULT_LEARNING_INTERVAL; | |
1218 | mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp); | |
1219 | return 0; | |
1220 | } | |
1221 | ||
1222 | static void mlxsw_sp_fdb_fini(struct mlxsw_sp *mlxsw_sp) | |
1223 | { | |
1224 | cancel_delayed_work_sync(&mlxsw_sp->fdb_notify.dw); | |
1225 | } | |
1226 | ||
1227 | static void mlxsw_sp_fids_fini(struct mlxsw_sp *mlxsw_sp) | |
1228 | { | |
1229 | u16 fid; | |
1230 | ||
1231 | for_each_set_bit(fid, mlxsw_sp->active_fids, VLAN_N_VID) | |
1232 | mlxsw_sp_fid_destroy(mlxsw_sp, fid); | |
1233 | } | |
1234 | ||
1235 | int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp) | |
1236 | { | |
1237 | return mlxsw_sp_fdb_init(mlxsw_sp); | |
1238 | } | |
1239 | ||
1240 | void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp) | |
1241 | { | |
1242 | mlxsw_sp_fdb_fini(mlxsw_sp); | |
1243 | mlxsw_sp_fids_fini(mlxsw_sp); | |
1244 | } | |
1245 | ||
1246 | int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port) | |
1247 | { | |
1248 | struct net_device *dev = mlxsw_sp_port->dev; | |
1249 | int err; | |
1250 | ||
1251 | /* Allow only untagged packets to ingress and tag them internally | |
1252 | * with VID 1. | |
1253 | */ | |
1254 | mlxsw_sp_port->pvid = 1; | |
29edf44f ER |
1255 | err = __mlxsw_sp_port_vlans_del(mlxsw_sp_port, 0, VLAN_N_VID - 1, |
1256 | true); | |
56ade8fe JP |
1257 | if (err) { |
1258 | netdev_err(dev, "Unable to init VLANs\n"); | |
1259 | return err; | |
1260 | } | |
1261 | ||
1262 | /* Add implicit VLAN interface in the device, so that untagged | |
1263 | * packets will be classified to the default vFID. | |
1264 | */ | |
1265 | err = mlxsw_sp_port_add_vid(dev, 0, 1); | |
1266 | if (err) | |
1267 | netdev_err(dev, "Failed to configure default vFID\n"); | |
1268 | ||
1269 | return err; | |
1270 | } | |
1271 | ||
1272 | void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port) | |
1273 | { | |
1274 | mlxsw_sp_port->dev->switchdev_ops = &mlxsw_sp_port_switchdev_ops; | |
1275 | } | |
1276 | ||
1277 | void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port) | |
1278 | { | |
1279 | } |