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mlxsw: spectrum: Offload learning to the switch ASIC
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlxsw / spectrum_switchdev.c
CommitLineData
56ade8fe
JP		 1/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/types.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/slab.h>
42#include <linux/device.h>
43#include <linux/skbuff.h>
44#include <linux/if_vlan.h>
45#include <linux/if_bridge.h>
46#include <linux/workqueue.h>
47#include <linux/jiffies.h>
4f2c6ae5 48#include <linux/rtnetlink.h>
56ade8fe
JP		 49#include <net/switchdev.h>
50
51#include "spectrum.h"
52#include "core.h"
53#include "reg.h"
54
e4b6f693
ER		 55static u16 mlxsw_sp_port_vid_to_fid_get(struct mlxsw_sp_port *mlxsw_sp_port,
56 u16 vid)
57{
56918b6b 58 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
e4b6f693
ER		 59 u16 fid = vid;
60
56918b6b 61 fid = f ? f->fid : fid;
e4b6f693
ER		 62
63 if (!fid)
64 fid = mlxsw_sp_port->pvid;
65
66 return fid;
67}
68
54a73201
IS		 69static struct mlxsw_sp_port *
70mlxsw_sp_port_orig_get(struct net_device *dev,
71 struct mlxsw_sp_port *mlxsw_sp_port)
72{
73 struct mlxsw_sp_port *mlxsw_sp_vport;
74 u16 vid;
75
76 if (!is_vlan_dev(dev))
77 return mlxsw_sp_port;
78
79 vid = vlan_dev_vlan_id(dev);
80 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
81 WARN_ON(!mlxsw_sp_vport);
82
83 return mlxsw_sp_vport;
84}
85
56ade8fe
JP		 86static int mlxsw_sp_port_attr_get(struct net_device *dev,
87 struct switchdev_attr *attr)
88{
89 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
90 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
91
54a73201
IS		 92 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
93 if (!mlxsw_sp_port)
94 return -EINVAL;
95
56ade8fe
JP		 96 switch (attr->id) {
97 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
98 attr->u.ppid.id_len = sizeof(mlxsw_sp->base_mac);
99 memcpy(&attr->u.ppid.id, &mlxsw_sp->base_mac,
100 attr->u.ppid.id_len);
101 break;
102 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
103 attr->u.brport_flags =
104 (mlxsw_sp_port->learning ? BR_LEARNING : 0) |
0293038e
IS		 105 (mlxsw_sp_port->learning_sync ? BR_LEARNING_SYNC : 0) |
106 (mlxsw_sp_port->uc_flood ? BR_FLOOD : 0);
56ade8fe
JP		 107 break;
108 default:
109 return -EOPNOTSUPP;
110 }
111
112 return 0;
113}
114
115static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
116 u8 state)
117{
118 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
119 enum mlxsw_reg_spms_state spms_state;
120 char *spms_pl;
121 u16 vid;
122 int err;
123
124 switch (state) {
56ade8fe
JP		 125 case BR_STATE_FORWARDING:
126 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
127 break;
56ade8fe
JP		 128 case BR_STATE_LEARNING:
129 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
130 break;
45491133 131 case BR_STATE_LISTENING: /* fall-through */
9cb026eb 132 case BR_STATE_DISABLED: /* fall-through */
56ade8fe
JP		 133 case BR_STATE_BLOCKING:
134 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
135 break;
136 default:
137 BUG();
138 }
139
140 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
141 if (!spms_pl)
142 return -ENOMEM;
143 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
54a73201
IS		 144
145 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
146 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
56ade8fe 147 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
54a73201
IS		 148 } else {
149 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
150 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
151 }
56ade8fe
JP		 152
153 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
154 kfree(spms_pl);
155 return err;
156}
157
158static int mlxsw_sp_port_attr_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
159 struct switchdev_trans *trans,
160 u8 state)
161{
162 if (switchdev_trans_ph_prepare(trans))
163 return 0;
164
165 mlxsw_sp_port->stp_state = state;
166 return mlxsw_sp_port_stp_state_set(mlxsw_sp_port, state);
167}
168
0293038e 169static int __mlxsw_sp_port_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
c06a94ef 170 u16 idx_begin, u16 idx_end, bool set,
0293038e
IS		 171 bool only_uc)
172{
173 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
7f71eb46
IS		 174 u16 local_port = mlxsw_sp_port->local_port;
175 enum mlxsw_flood_table_type table_type;
c06a94ef 176 u16 range = idx_end - idx_begin + 1;
0293038e
IS		 177 char *sftr_pl;
178 int err;
179
99724c18 180 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
7f71eb46 181 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
99724c18 182 else
7f71eb46 183 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
7f71eb46 184
0293038e
IS		 185 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
186 if (!sftr_pl)
187 return -ENOMEM;
188
c06a94ef 189 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
7f71eb46 190 table_type, range, local_port, set);
0293038e
IS		 191 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
192 if (err)
193 goto buffer_out;
194
195 /* Flooding control allows one to decide whether a given port will
196 * flood unicast traffic for which there is no FDB entry.
197 */
198 if (only_uc)
199 goto buffer_out;
200
c06a94ef 201 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, idx_begin,
7f71eb46 202 table_type, range, local_port, set);
0293038e 203 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
28892865
IS		 204 if (err)
205 goto err_flood_bm_set;
206 else
207 goto buffer_out;
0293038e 208
28892865
IS		 209err_flood_bm_set:
210 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
211 table_type, range, local_port, !set);
212 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
0293038e
IS		 213buffer_out:
214 kfree(sftr_pl);
215 return err;
216}
217
218static int mlxsw_sp_port_uc_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
219 bool set)
220{
221 struct net_device *dev = mlxsw_sp_port->dev;
222 u16 vid, last_visited_vid;
223 int err;
224
54a73201 225 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
41b996cc
IS		 226 u16 fid = mlxsw_sp_vport_fid_get(mlxsw_sp_port)->fid;
227 u16 vfid = mlxsw_sp_fid_to_vfid(fid);
54a73201
IS		 228
229 return __mlxsw_sp_port_flood_set(mlxsw_sp_port, vfid, vfid,
230 set, true);
231 }
232
0293038e
IS		 233 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
234 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, set,
235 true);
236 if (err) {
237 last_visited_vid = vid;
238 goto err_port_flood_set;
239 }
240 }
241
242 return 0;
243
244err_port_flood_set:
245 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
246 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, !set, true);
247 netdev_err(dev, "Failed to configure unicast flooding\n");
248 return err;
249}
250
e6060027 251int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
47a0a9e6 252 bool set)
7f71eb46 253{
e6060027
IS		 254 u16 vfid;
255
7f71eb46
IS		 256 /* In case of vFIDs, index into the flooding table is relative to
257 * the start of the vFIDs range.
258 */
e6060027 259 vfid = mlxsw_sp_fid_to_vfid(fid);
19ae6124 260 return __mlxsw_sp_port_flood_set(mlxsw_sp_vport, vfid, vfid, set,
47a0a9e6 261 false);
7f71eb46
IS		 262}
263
89b548f0
IS		 264static int mlxsw_sp_port_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
265 bool set)
266{
267 u16 vid;
268 int err;
269
270 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
271 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
272
273 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
274 set);
275 }
276
277 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
278 err = __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
279 set);
280 if (err)
281 goto err_port_vid_learning_set;
282 }
283
284 return 0;
285
286err_port_vid_learning_set:
287 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
288 __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid, !set);
289 return err;
290}
291
56ade8fe
JP		 292static int mlxsw_sp_port_attr_br_flags_set(struct mlxsw_sp_port *mlxsw_sp_port,
293 struct switchdev_trans *trans,
294 unsigned long brport_flags)
295{
89b548f0 296 unsigned long learning = mlxsw_sp_port->learning ? BR_LEARNING : 0;
0293038e 297 unsigned long uc_flood = mlxsw_sp_port->uc_flood ? BR_FLOOD : 0;
0293038e
IS		 298 int err;
299
6c72a3d0
IS		 300 if (!mlxsw_sp_port->bridged)
301 return -EINVAL;
302
56ade8fe
JP		 303 if (switchdev_trans_ph_prepare(trans))
304 return 0;
305
0293038e 306 if ((uc_flood ^ brport_flags) & BR_FLOOD) {
89b548f0
IS		 307 err = mlxsw_sp_port_uc_flood_set(mlxsw_sp_port,
308 !mlxsw_sp_port->uc_flood);
0293038e
IS		 309 if (err)
310 return err;
311 }
312
89b548f0
IS		 313 if ((learning ^ brport_flags) & BR_LEARNING) {
314 err = mlxsw_sp_port_learning_set(mlxsw_sp_port,
315 !mlxsw_sp_port->learning);
316 if (err)
317 goto err_port_learning_set;
318 }
319
0293038e 320 mlxsw_sp_port->uc_flood = brport_flags & BR_FLOOD ? 1 : 0;
56ade8fe
JP		 321 mlxsw_sp_port->learning = brport_flags & BR_LEARNING ? 1 : 0;
322 mlxsw_sp_port->learning_sync = brport_flags & BR_LEARNING_SYNC ? 1 : 0;
0293038e 323
56ade8fe 324 return 0;
89b548f0
IS		 325
326err_port_learning_set:
327 if ((uc_flood ^ brport_flags) & BR_FLOOD)
328 mlxsw_sp_port_uc_flood_set(mlxsw_sp_port,
329 mlxsw_sp_port->uc_flood);
330 return err;
56ade8fe
JP		 331}
332
333static int mlxsw_sp_ageing_set(struct mlxsw_sp *mlxsw_sp, u32 ageing_time)
334{
335 char sfdat_pl[MLXSW_REG_SFDAT_LEN];
336 int err;
337
338 mlxsw_reg_sfdat_pack(sfdat_pl, ageing_time);
339 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl);
340 if (err)
341 return err;
342 mlxsw_sp->ageing_time = ageing_time;
343 return 0;
344}
345
346static int mlxsw_sp_port_attr_br_ageing_set(struct mlxsw_sp_port *mlxsw_sp_port,
347 struct switchdev_trans *trans,
135f9ece 348 unsigned long ageing_clock_t)
56ade8fe
JP		 349{
350 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
135f9ece 351 unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t);
56ade8fe
JP		 352 u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000;
353
869f63a4
IS		 354 if (switchdev_trans_ph_prepare(trans)) {
355 if (ageing_time < MLXSW_SP_MIN_AGEING_TIME ||
356 ageing_time > MLXSW_SP_MAX_AGEING_TIME)
357 return -ERANGE;
358 else
359 return 0;
360 }
56ade8fe
JP		 361
362 return mlxsw_sp_ageing_set(mlxsw_sp, ageing_time);
363}
364
26a4ea0f
ER		 365static int mlxsw_sp_port_attr_br_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
366 struct switchdev_trans *trans,
367 struct net_device *orig_dev,
368 bool vlan_enabled)
369{
370 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
371
372 /* SWITCHDEV_TRANS_PREPARE phase */
373 if ((!vlan_enabled) && (mlxsw_sp->master_bridge.dev == orig_dev)) {
374 netdev_err(mlxsw_sp_port->dev, "Bridge must be vlan-aware\n");
375 return -EINVAL;
376 }
377
378 return 0;
379}
380
56ade8fe
JP		 381static int mlxsw_sp_port_attr_set(struct net_device *dev,
382 const struct switchdev_attr *attr,
383 struct switchdev_trans *trans)
384{
385 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
386 int err = 0;
387
54a73201
IS		 388 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
389 if (!mlxsw_sp_port)
390 return -EINVAL;
391
56ade8fe
JP		 392 switch (attr->id) {
393 case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
394 err = mlxsw_sp_port_attr_stp_state_set(mlxsw_sp_port, trans,
395 attr->u.stp_state);
396 break;
397 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
398 err = mlxsw_sp_port_attr_br_flags_set(mlxsw_sp_port, trans,
399 attr->u.brport_flags);
400 break;
401 case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
402 err = mlxsw_sp_port_attr_br_ageing_set(mlxsw_sp_port, trans,
403 attr->u.ageing_time);
404 break;
26a4ea0f
ER		 405 case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
406 err = mlxsw_sp_port_attr_br_vlan_set(mlxsw_sp_port, trans,
407 attr->orig_dev,
408 attr->u.vlan_filtering);
409 break;
56ade8fe
JP		 410 default:
411 err = -EOPNOTSUPP;
412 break;
413 }
414
415 return err;
416}
417
14d39461
IS		 418static int mlxsw_sp_fid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
419{
420 char sfmr_pl[MLXSW_REG_SFMR_LEN];
421
422 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, fid);
423 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
424}
425
426static int mlxsw_sp_fid_map(struct mlxsw_sp *mlxsw_sp, u16 fid, bool valid)
427{
428 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
429 char svfa_pl[MLXSW_REG_SVFA_LEN];
430
431 mlxsw_reg_svfa_pack(svfa_pl, 0, mt, valid, fid, fid);
432 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
433}
434
435static struct mlxsw_sp_fid *mlxsw_sp_fid_alloc(u16 fid)
436{
437 struct mlxsw_sp_fid *f;
438
439 f = kzalloc(sizeof(*f), GFP_KERNEL);
440 if (!f)
441 return NULL;
442
443 f->fid = fid;
444
445 return f;
446}
447
701b186e 448struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid)
14d39461
IS		 449{
450 struct mlxsw_sp_fid *f;
451 int err;
452
453 err = mlxsw_sp_fid_op(mlxsw_sp, fid, true);
454 if (err)
455 return ERR_PTR(err);
456
457 /* Although all the ports member in the FID might be using a
458 * {Port, VID} to FID mapping, we create a global VID-to-FID
459 * mapping. This allows a port to transition to VLAN mode,
460 * knowing the global mapping exists.
461 */
462 err = mlxsw_sp_fid_map(mlxsw_sp, fid, true);
463 if (err)
464 goto err_fid_map;
465
466 f = mlxsw_sp_fid_alloc(fid);
467 if (!f) {
468 err = -ENOMEM;
469 goto err_allocate_fid;
470 }
471
472 list_add(&f->list, &mlxsw_sp->fids);
473
474 return f;
475
476err_allocate_fid:
477 mlxsw_sp_fid_map(mlxsw_sp, fid, false);
478err_fid_map:
479 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
480 return ERR_PTR(err);
481}
482
701b186e 483void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f)
14d39461
IS		 484{
485 u16 fid = f->fid;
486
487 list_del(&f->list);
488
99f44bb3
IS		 489 if (f->r)
490 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
491
14d39461
IS		 492 kfree(f);
493
8168287b
IS		 494 mlxsw_sp_fid_map(mlxsw_sp, fid, false);
495
14d39461
IS		 496 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
497}
498
499static int __mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
500 u16 fid)
501{
502 struct mlxsw_sp_fid *f;
503
504 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
505 if (!f) {
506 f = mlxsw_sp_fid_create(mlxsw_sp_port->mlxsw_sp, fid);
507 if (IS_ERR(f))
508 return PTR_ERR(f);
509 }
510
511 f->ref_count++;
512
22305378
IS		 513 netdev_dbg(mlxsw_sp_port->dev, "Joined FID=%d\n", fid);
514
14d39461
IS		 515 return 0;
516}
517
518static void __mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
519 u16 fid)
520{
521 struct mlxsw_sp_fid *f;
522
523 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
524 if (WARN_ON(!f))
525 return;
526
22305378
IS		 527 netdev_dbg(mlxsw_sp_port->dev, "Left FID=%d\n", fid);
528
fe3f6d14
IS		 529 mlxsw_sp_port_fdb_flush(mlxsw_sp_port, fid);
530
14d39461
IS		 531 if (--f->ref_count == 0)
532 mlxsw_sp_fid_destroy(mlxsw_sp_port->mlxsw_sp, f);
533}
534
535static int mlxsw_sp_port_fid_map(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid,
536 bool valid)
537{
538 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
539
540 /* If port doesn't have vPorts, then it can use the global
541 * VID-to-FID mapping.
542 */
543 if (list_empty(&mlxsw_sp_port->vports_list))
544 return 0;
545
546 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, valid, fid, fid);
547}
548
549static int mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
550 u16 fid_begin, u16 fid_end)
551{
552 int fid, err;
553
554 for (fid = fid_begin; fid <= fid_end; fid++) {
555 err = __mlxsw_sp_port_fid_join(mlxsw_sp_port, fid);
556 if (err)
557 goto err_port_fid_join;
558 }
559
560 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end,
561 true, false);
562 if (err)
563 goto err_port_flood_set;
564
565 for (fid = fid_begin; fid <= fid_end; fid++) {
566 err = mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, true);
567 if (err)
568 goto err_port_fid_map;
569 }
570
571 return 0;
572
573err_port_fid_map:
574 for (fid--; fid >= fid_begin; fid--)
575 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
576 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
577 false);
578err_port_flood_set:
579 fid = fid_end;
580err_port_fid_join:
581 for (fid--; fid >= fid_begin; fid--)
582 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
583 return err;
584}
585
586static void mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
587 u16 fid_begin, u16 fid_end)
588{
589 int fid;
590
591 for (fid = fid_begin; fid <= fid_end; fid++)
592 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
593
594 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
595 false);
596
597 for (fid = fid_begin; fid <= fid_end; fid++)
598 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
599}
600
28a01d2d
IS		 601static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,
602 u16 vid)
56ade8fe
JP		 603{
604 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
605 char spvid_pl[MLXSW_REG_SPVID_LEN];
606
607 mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
608 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
609}
610
28a01d2d
IS		 611static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,
612 bool allow)
613{
614 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
615 char spaft_pl[MLXSW_REG_SPAFT_LEN];
616
617 mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow);
618 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);
619}
620
621int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
622{
623 struct net_device *dev = mlxsw_sp_port->dev;
624 int err;
625
626 if (!vid) {
627 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false);
628 if (err) {
629 netdev_err(dev, "Failed to disallow untagged traffic\n");
630 return err;
631 }
632 } else {
633 err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid);
634 if (err) {
635 netdev_err(dev, "Failed to set PVID\n");
636 return err;
637 }
638
639 /* Only allow if not already allowed. */
640 if (!mlxsw_sp_port->pvid) {
641 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port,
642 true);
643 if (err) {
644 netdev_err(dev, "Failed to allow untagged traffic\n");
645 goto err_port_allow_untagged_set;
646 }
647 }
648 }
649
650 mlxsw_sp_port->pvid = vid;
651 return 0;
652
653err_port_allow_untagged_set:
654 __mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid);
655 return err;
656}
657
3b7ad5ec
IS		 658static int __mlxsw_sp_port_vlans_set(struct mlxsw_sp_port *mlxsw_sp_port,
659 u16 vid_begin, u16 vid_end, bool is_member,
660 bool untagged)
661{
662 u16 vid, vid_e;
663 int err;
664
665 for (vid = vid_begin; vid <= vid_end;
666 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
667 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
668 vid_end);
669
670 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
671 is_member, untagged);
672 if (err)
673 return err;
674 }
675
676 return 0;
677}
678
584d73df
IS		 679static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
680 u16 vid_begin, u16 vid_end,
681 bool learn_enable)
682{
683 u16 vid, vid_e;
684 int err;
685
686 for (vid = vid_begin; vid <= vid_end;
687 vid += MLXSW_REG_SPVMLR_REC_MAX_COUNT) {
688 vid_e = min((u16) (vid + MLXSW_REG_SPVMLR_REC_MAX_COUNT - 1),
689 vid_end);
690
691 err = __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid,
692 vid_e, learn_enable);
693 if (err)
694 return err;
695 }
696
697 return 0;
698}
699
56ade8fe
JP		 700static int __mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
701 u16 vid_begin, u16 vid_end,
702 bool flag_untagged, bool flag_pvid)
703{
56ade8fe 704 struct net_device *dev = mlxsw_sp_port->dev;
14d39461 705 u16 vid, old_pvid;
56ade8fe
JP		 706 int err;
707
56ade8fe 708 if (!mlxsw_sp_port->bridged)
32d863fb 709 return -EINVAL;
56ade8fe 710
14d39461 711 err = mlxsw_sp_port_fid_join(mlxsw_sp_port, vid_begin, vid_end);
1b3433a9 712 if (err) {
14d39461
IS		 713 netdev_err(dev, "Failed to join FIDs\n");
714 return err;
56ade8fe
JP		 715 }
716
3b7ad5ec
IS		 717 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
718 true, flag_untagged);
719 if (err) {
720 netdev_err(dev, "Unable to add VIDs %d-%d\n", vid_begin,
721 vid_end);
b07a966c 722 goto err_port_vlans_set;
56ade8fe
JP		 723 }
724
b07a966c
IS		 725 old_pvid = mlxsw_sp_port->pvid;
726 if (flag_pvid && old_pvid != vid_begin) {
727 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid_begin);
56ade8fe 728 if (err) {
b07a966c
IS		 729 netdev_err(dev, "Unable to add PVID %d\n", vid_begin);
730 goto err_port_pvid_set;
56ade8fe 731 }
28a01d2d
IS		 732 } else if (!flag_pvid && old_pvid >= vid_begin && old_pvid <= vid_end) {
733 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
734 if (err) {
735 netdev_err(dev, "Unable to del PVID\n");
736 goto err_port_pvid_set;
737 }
56ade8fe
JP		 738 }
739
584d73df
IS		 740 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid_begin, vid_end,
741 mlxsw_sp_port->learning);
742 if (err) {
743 netdev_err(dev, "Failed to set learning for VIDs %d-%d\n",
744 vid_begin, vid_end);
745 goto err_port_vid_learning_set;
746 }
747
56ade8fe 748 /* Changing activity bits only if HW operation succeded */
fc1273af 749 for (vid = vid_begin; vid <= vid_end; vid++) {
56ade8fe 750 set_bit(vid, mlxsw_sp_port->active_vlans);
fc1273af
ER		 751 if (flag_untagged)
752 set_bit(vid, mlxsw_sp_port->untagged_vlans);
753 else
754 clear_bit(vid, mlxsw_sp_port->untagged_vlans);
755 }
56ade8fe 756
b07a966c
IS		 757 /* STP state change must be done after we set active VLANs */
758 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port,
759 mlxsw_sp_port->stp_state);
760 if (err) {
761 netdev_err(dev, "Failed to set STP state\n");
762 goto err_port_stp_state_set;
763 }
764
765 return 0;
766
b07a966c
IS		 767err_port_stp_state_set:
768 for (vid = vid_begin; vid <= vid_end; vid++)
769 clear_bit(vid, mlxsw_sp_port->active_vlans);
584d73df
IS		 770 mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid_begin, vid_end,
771 false);
772err_port_vid_learning_set:
b07a966c
IS		 773 if (old_pvid != mlxsw_sp_port->pvid)
774 mlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid);
775err_port_pvid_set:
776 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
777 false);
778err_port_vlans_set:
14d39461 779 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
b07a966c 780 return err;
56ade8fe
JP		 781}
782
783static int mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
784 const struct switchdev_obj_port_vlan *vlan,
785 struct switchdev_trans *trans)
786{
e4a13055
ER		 787 bool flag_untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
788 bool flag_pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
56ade8fe
JP		 789
790 if (switchdev_trans_ph_prepare(trans))
791 return 0;
792
793 return __mlxsw_sp_port_vlans_add(mlxsw_sp_port,
794 vlan->vid_begin, vlan->vid_end,
e4a13055 795 flag_untagged, flag_pvid);
56ade8fe
JP		 796}
797
8a1ab5d7 798static enum mlxsw_reg_sfd_rec_policy mlxsw_sp_sfd_rec_policy(bool dynamic)
56ade8fe 799{
8a1ab5d7
JP		 800 return dynamic ? MLXSW_REG_SFD_REC_POLICY_DYNAMIC_ENTRY_INGRESS :
801 MLXSW_REG_SFD_REC_POLICY_STATIC_ENTRY;
802}
803
804static enum mlxsw_reg_sfd_op mlxsw_sp_sfd_op(bool adding)
805{
806 return adding ? MLXSW_REG_SFD_OP_WRITE_EDIT :
807 MLXSW_REG_SFD_OP_WRITE_REMOVE;
808}
809
6e095fd4
IS		 810static int __mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
811 const char *mac, u16 fid, bool adding,
812 enum mlxsw_reg_sfd_rec_action action,
813 bool dynamic)
8a1ab5d7 814{
56ade8fe
JP		 815 char *sfd_pl;
816 int err;
817
56ade8fe
JP		 818 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
819 if (!sfd_pl)
820 return -ENOMEM;
821
8a1ab5d7
JP		 822 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
823 mlxsw_reg_sfd_uc_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
6e095fd4 824 mac, fid, action, local_port);
8a1ab5d7
JP		 825 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
826 kfree(sfd_pl);
827
828 return err;
829}
830
6e095fd4
IS		 831static int mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
832 const char *mac, u16 fid, bool adding,
833 bool dynamic)
834{
835 return __mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid, adding,
836 MLXSW_REG_SFD_REC_ACTION_NOP, dynamic);
837}
838
839int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
840 bool adding)
841{
842 return __mlxsw_sp_port_fdb_uc_op(mlxsw_sp, 0, mac, fid, adding,
843 MLXSW_REG_SFD_REC_ACTION_FORWARD_IP_ROUTER,
844 false);
845}
846
8a1ab5d7 847static int mlxsw_sp_port_fdb_uc_lag_op(struct mlxsw_sp *mlxsw_sp, u16 lag_id,
64771e31
IS		 848 const char *mac, u16 fid, u16 lag_vid,
849 bool adding, bool dynamic)
8a1ab5d7
JP		 850{
851 char *sfd_pl;
852 int err;
853
854 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
855 if (!sfd_pl)
856 return -ENOMEM;
857
858 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
859 mlxsw_reg_sfd_uc_lag_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
64771e31
IS		 860 mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP,
861 lag_vid, lag_id);
8a1ab5d7 862 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
56ade8fe
JP		 863 kfree(sfd_pl);
864
865 return err;
866}
867
868static int
869mlxsw_sp_port_fdb_static_add(struct mlxsw_sp_port *mlxsw_sp_port,
870 const struct switchdev_obj_port_fdb *fdb,
871 struct switchdev_trans *trans)
872{
e4b6f693 873 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
64771e31 874 u16 lag_vid = 0;
8a1ab5d7 875
56ade8fe
JP		 876 if (switchdev_trans_ph_prepare(trans))
877 return 0;
878
54a73201 879 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
64771e31 880 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
54a73201
IS		 881 }
882
8a1ab5d7 883 if (!mlxsw_sp_port->lagged)
2fa9d45e
JP		 884 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
885 mlxsw_sp_port->local_port,
9de6a80e 886 fdb->addr, fid, true, false);
8a1ab5d7
JP		 887 else
888 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
889 mlxsw_sp_port->lag_id,
64771e31
IS		 890 fdb->addr, fid, lag_vid,
891 true, false);
56ade8fe
JP		 892}
893
3a49b4fd
ER		 894static int mlxsw_sp_port_mdb_op(struct mlxsw_sp *mlxsw_sp, const char *addr,
895 u16 fid, u16 mid, bool adding)
896{
897 char *sfd_pl;
898 int err;
899
900 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
901 if (!sfd_pl)
902 return -ENOMEM;
903
904 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
905 mlxsw_reg_sfd_mc_pack(sfd_pl, 0, addr, fid,
906 MLXSW_REG_SFD_REC_ACTION_NOP, mid);
907 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
908 kfree(sfd_pl);
909 return err;
910}
911
912static int mlxsw_sp_port_smid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mid,
913 bool add, bool clear_all_ports)
914{
915 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
916 char *smid_pl;
917 int err, i;
918
919 smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
920 if (!smid_pl)
921 return -ENOMEM;
922
923 mlxsw_reg_smid_pack(smid_pl, mid, mlxsw_sp_port->local_port, add);
924 if (clear_all_ports) {
925 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
926 if (mlxsw_sp->ports[i])
927 mlxsw_reg_smid_port_mask_set(smid_pl, i, 1);
928 }
929 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
930 kfree(smid_pl);
931 return err;
932}
933
934static struct mlxsw_sp_mid *__mlxsw_sp_mc_get(struct mlxsw_sp *mlxsw_sp,
935 const unsigned char *addr,
936 u16 vid)
937{
938 struct mlxsw_sp_mid *mid;
939
940 list_for_each_entry(mid, &mlxsw_sp->br_mids.list, list) {
941 if (ether_addr_equal(mid->addr, addr) && mid->vid == vid)
942 return mid;
943 }
944 return NULL;
945}
946
947static struct mlxsw_sp_mid *__mlxsw_sp_mc_alloc(struct mlxsw_sp *mlxsw_sp,
948 const unsigned char *addr,
949 u16 vid)
950{
951 struct mlxsw_sp_mid *mid;
952 u16 mid_idx;
953
954 mid_idx = find_first_zero_bit(mlxsw_sp->br_mids.mapped,
955 MLXSW_SP_MID_MAX);
956 if (mid_idx == MLXSW_SP_MID_MAX)
957 return NULL;
958
959 mid = kzalloc(sizeof(*mid), GFP_KERNEL);
960 if (!mid)
961 return NULL;
962
963 set_bit(mid_idx, mlxsw_sp->br_mids.mapped);
964 ether_addr_copy(mid->addr, addr);
965 mid->vid = vid;
966 mid->mid = mid_idx;
967 mid->ref_count = 0;
968 list_add_tail(&mid->list, &mlxsw_sp->br_mids.list);
969
970 return mid;
971}
972
973static int __mlxsw_sp_mc_dec_ref(struct mlxsw_sp *mlxsw_sp,
974 struct mlxsw_sp_mid *mid)
975{
976 if (--mid->ref_count == 0) {
977 list_del(&mid->list);
978 clear_bit(mid->mid, mlxsw_sp->br_mids.mapped);
979 kfree(mid);
980 return 1;
981 }
982 return 0;
983}
984
985static int mlxsw_sp_port_mdb_add(struct mlxsw_sp_port *mlxsw_sp_port,
986 const struct switchdev_obj_port_mdb *mdb,
987 struct switchdev_trans *trans)
988{
989 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
990 struct net_device *dev = mlxsw_sp_port->dev;
991 struct mlxsw_sp_mid *mid;
992 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
993 int err = 0;
994
995 if (switchdev_trans_ph_prepare(trans))
996 return 0;
997
998 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
999 if (!mid) {
1000 mid = __mlxsw_sp_mc_alloc(mlxsw_sp, mdb->addr, mdb->vid);
1001 if (!mid) {
1002 netdev_err(dev, "Unable to allocate MC group\n");
1003 return -ENOMEM;
1004 }
1005 }
1006 mid->ref_count++;
1007
1008 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, true,
1009 mid->ref_count == 1);
1010 if (err) {
1011 netdev_err(dev, "Unable to set SMID\n");
1012 goto err_out;
1013 }
1014
1015 if (mid->ref_count == 1) {
1016 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid->mid,
1017 true);
1018 if (err) {
1019 netdev_err(dev, "Unable to set MC SFD\n");
1020 goto err_out;
1021 }
1022 }
1023
1024 return 0;
1025
1026err_out:
1027 __mlxsw_sp_mc_dec_ref(mlxsw_sp, mid);
1028 return err;
1029}
1030
56ade8fe
JP		 1031static int mlxsw_sp_port_obj_add(struct net_device *dev,
1032 const struct switchdev_obj *obj,
1033 struct switchdev_trans *trans)
1034{
1035 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1036 int err = 0;
1037
54a73201
IS		 1038 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1039 if (!mlxsw_sp_port)
1040 return -EINVAL;
1041
56ade8fe
JP		 1042 switch (obj->id) {
1043 case SWITCHDEV_OBJ_ID_PORT_VLAN:
54a73201
IS		 1044 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
1045 return 0;
1046
56ade8fe
JP		 1047 err = mlxsw_sp_port_vlans_add(mlxsw_sp_port,
1048 SWITCHDEV_OBJ_PORT_VLAN(obj),
1049 trans);
1050 break;
61c503f9
JP		 1051 case SWITCHDEV_OBJ_ID_IPV4_FIB:
1052 err = mlxsw_sp_router_fib4_add(mlxsw_sp_port,
1053 SWITCHDEV_OBJ_IPV4_FIB(obj),
1054 trans);
1055 break;
56ade8fe
JP		 1056 case SWITCHDEV_OBJ_ID_PORT_FDB:
1057 err = mlxsw_sp_port_fdb_static_add(mlxsw_sp_port,
1058 SWITCHDEV_OBJ_PORT_FDB(obj),
1059 trans);
1060 break;
3a49b4fd
ER		 1061 case SWITCHDEV_OBJ_ID_PORT_MDB:
1062 err = mlxsw_sp_port_mdb_add(mlxsw_sp_port,
1063 SWITCHDEV_OBJ_PORT_MDB(obj),
1064 trans);
1065 break;
56ade8fe
JP		 1066 default:
1067 err = -EOPNOTSUPP;
1068 break;
1069 }
1070
1071 return err;
1072}
1073
56ade8fe 1074static int __mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
05978481 1075 u16 vid_begin, u16 vid_end)
56ade8fe 1076{
3b7ad5ec 1077 u16 vid, pvid;
56ade8fe 1078
05978481 1079 if (!mlxsw_sp_port->bridged)
32d863fb 1080 return -EINVAL;
56ade8fe 1081
584d73df
IS		 1082 mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid_begin, vid_end,
1083 false);
1084
06c071f6 1085 pvid = mlxsw_sp_port->pvid;
640be7b7
IS		 1086 if (pvid >= vid_begin && pvid <= vid_end)
1087 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
56ade8fe 1088
640be7b7
IS		 1089 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
1090 false);
f7a8f6ce 1091
14d39461 1092 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
56ade8fe 1093
56ade8fe
JP		 1094 /* Changing activity bits only if HW operation succeded */
1095 for (vid = vid_begin; vid <= vid_end; vid++)
1096 clear_bit(vid, mlxsw_sp_port->active_vlans);
1097
1098 return 0;
1099}
1100
1101static int mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
1102 const struct switchdev_obj_port_vlan *vlan)
1103{
05978481
IS		 1104 return __mlxsw_sp_port_vlans_del(mlxsw_sp_port, vlan->vid_begin,
1105 vlan->vid_end);
56ade8fe
JP		 1106}
1107
4dc236c3
IS		 1108void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port)
1109{
1110 u16 vid;
1111
1112 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
05978481 1113 __mlxsw_sp_port_vlans_del(mlxsw_sp_port, vid, vid);
4dc236c3
IS		 1114}
1115
56ade8fe
JP		 1116static int
1117mlxsw_sp_port_fdb_static_del(struct mlxsw_sp_port *mlxsw_sp_port,
1118 const struct switchdev_obj_port_fdb *fdb)
1119{
e4b6f693 1120 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
64771e31 1121 u16 lag_vid = 0;
9de6a80e 1122
54a73201 1123 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
64771e31 1124 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
54a73201
IS		 1125 }
1126
8a1ab5d7 1127 if (!mlxsw_sp_port->lagged)
2fa9d45e
JP		 1128 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
1129 mlxsw_sp_port->local_port,
9de6a80e 1130 fdb->addr, fid,
8a1ab5d7
JP		 1131 false, false);
1132 else
1133 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
1134 mlxsw_sp_port->lag_id,
64771e31 1135 fdb->addr, fid, lag_vid,
8a1ab5d7 1136 false, false);
56ade8fe
JP		 1137}
1138
3a49b4fd
ER		 1139static int mlxsw_sp_port_mdb_del(struct mlxsw_sp_port *mlxsw_sp_port,
1140 const struct switchdev_obj_port_mdb *mdb)
1141{
1142 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1143 struct net_device *dev = mlxsw_sp_port->dev;
1144 struct mlxsw_sp_mid *mid;
1145 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
1146 u16 mid_idx;
1147 int err = 0;
1148
1149 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
1150 if (!mid) {
1151 netdev_err(dev, "Unable to remove port from MC DB\n");
1152 return -EINVAL;
1153 }
1154
1155 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, false, false);
1156 if (err)
1157 netdev_err(dev, "Unable to remove port from SMID\n");
1158
1159 mid_idx = mid->mid;
1160 if (__mlxsw_sp_mc_dec_ref(mlxsw_sp, mid)) {
1161 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid_idx,
1162 false);
1163 if (err)
1164 netdev_err(dev, "Unable to remove MC SFD\n");
1165 }
1166
1167 return err;
1168}
1169
56ade8fe
JP		 1170static int mlxsw_sp_port_obj_del(struct net_device *dev,
1171 const struct switchdev_obj *obj)
1172{
1173 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1174 int err = 0;
1175
54a73201
IS		 1176 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1177 if (!mlxsw_sp_port)
1178 return -EINVAL;
1179
56ade8fe
JP		 1180 switch (obj->id) {
1181 case SWITCHDEV_OBJ_ID_PORT_VLAN:
54a73201
IS		 1182 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
1183 return 0;
1184
56ade8fe
JP		 1185 err = mlxsw_sp_port_vlans_del(mlxsw_sp_port,
1186 SWITCHDEV_OBJ_PORT_VLAN(obj));
1187 break;
61c503f9
JP		 1188 case SWITCHDEV_OBJ_ID_IPV4_FIB:
1189 err = mlxsw_sp_router_fib4_del(mlxsw_sp_port,
1190 SWITCHDEV_OBJ_IPV4_FIB(obj));
1191 break;
56ade8fe
JP		 1192 case SWITCHDEV_OBJ_ID_PORT_FDB:
1193 err = mlxsw_sp_port_fdb_static_del(mlxsw_sp_port,
1194 SWITCHDEV_OBJ_PORT_FDB(obj));
1195 break;
3a49b4fd
ER		 1196 case SWITCHDEV_OBJ_ID_PORT_MDB:
1197 err = mlxsw_sp_port_mdb_del(mlxsw_sp_port,
1198 SWITCHDEV_OBJ_PORT_MDB(obj));
00ae40e7 1199 break;
56ade8fe
JP		 1200 default:
1201 err = -EOPNOTSUPP;
1202 break;
1203 }
1204
1205 return err;
1206}
1207
8a1ab5d7
JP		 1208static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp,
1209 u16 lag_id)
1210{
1211 struct mlxsw_sp_port *mlxsw_sp_port;
1212 int i;
1213
1214 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
1215 mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
1216 if (mlxsw_sp_port)
1217 return mlxsw_sp_port;
1218 }
1219 return NULL;
1220}
1221
56ade8fe
JP		 1222static int mlxsw_sp_port_fdb_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1223 struct switchdev_obj_port_fdb *fdb,
304f5158
IS		 1224 switchdev_obj_dump_cb_t *cb,
1225 struct net_device *orig_dev)
56ade8fe 1226{
8a1ab5d7 1227 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3f47f867 1228 struct mlxsw_sp_port *tmp;
56918b6b
IS		 1229 struct mlxsw_sp_fid *f;
1230 u16 vport_fid;
56ade8fe
JP		 1231 char *sfd_pl;
1232 char mac[ETH_ALEN];
9de6a80e 1233 u16 fid;
56ade8fe 1234 u8 local_port;
8a1ab5d7 1235 u16 lag_id;
56ade8fe
JP		 1236 u8 num_rec;
1237 int stored_err = 0;
1238 int i;
1239 int err;
1240
1241 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
1242 if (!sfd_pl)
1243 return -ENOMEM;
1244
56918b6b
IS		 1245 f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
1246 vport_fid = f ? f->fid : 0;
54a73201 1247
56ade8fe
JP		 1248 mlxsw_reg_sfd_pack(sfd_pl, MLXSW_REG_SFD_OP_QUERY_DUMP, 0);
1249 do {
1250 mlxsw_reg_sfd_num_rec_set(sfd_pl, MLXSW_REG_SFD_REC_MAX_COUNT);
8a1ab5d7 1251 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
56ade8fe
JP		 1252 if (err)
1253 goto out;
1254
1255 num_rec = mlxsw_reg_sfd_num_rec_get(sfd_pl);
1256
1257 /* Even in case of error, we have to run the dump to the end
1258 * so the session in firmware is finished.
1259 */
1260 if (stored_err)
1261 continue;
1262
1263 for (i = 0; i < num_rec; i++) {
1264 switch (mlxsw_reg_sfd_rec_type_get(sfd_pl, i)) {
1265 case MLXSW_REG_SFD_REC_TYPE_UNICAST:
9de6a80e 1266 mlxsw_reg_sfd_uc_unpack(sfd_pl, i, mac, &fid,
56ade8fe
JP		 1267 &local_port);
1268 if (local_port == mlxsw_sp_port->local_port) {
004f85ea
IS		 1269 if (vport_fid && vport_fid == fid)
1270 fdb->vid = 0;
1271 else if (!vport_fid &&
1272 !mlxsw_sp_fid_is_vfid(fid))
54a73201 1273 fdb->vid = fid;
004f85ea
IS		 1274 else
1275 continue;
56ade8fe
JP		 1276 ether_addr_copy(fdb->addr, mac);
1277 fdb->ndm_state = NUD_REACHABLE;
56ade8fe
JP		 1278 err = cb(&fdb->obj);
1279 if (err)
1280 stored_err = err;
1281 }
8a1ab5d7
JP		 1282 break;
1283 case MLXSW_REG_SFD_REC_TYPE_UNICAST_LAG:
1284 mlxsw_reg_sfd_uc_lag_unpack(sfd_pl, i,
9de6a80e 1285 mac, &fid, &lag_id);
3f47f867
IS		 1286 tmp = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1287 if (tmp && tmp->local_port ==
1288 mlxsw_sp_port->local_port) {
304f5158
IS		 1289 /* LAG records can only point to LAG
1290 * devices or VLAN devices on top.
1291 */
1292 if (!netif_is_lag_master(orig_dev) &&
1293 !is_vlan_dev(orig_dev))
1294 continue;
004f85ea
IS		 1295 if (vport_fid && vport_fid == fid)
1296 fdb->vid = 0;
1297 else if (!vport_fid &&
1298 !mlxsw_sp_fid_is_vfid(fid))
54a73201 1299 fdb->vid = fid;
004f85ea
IS		 1300 else
1301 continue;
8a1ab5d7
JP		 1302 ether_addr_copy(fdb->addr, mac);
1303 fdb->ndm_state = NUD_REACHABLE;
8a1ab5d7
JP		 1304 err = cb(&fdb->obj);
1305 if (err)
1306 stored_err = err;
1307 }
1308 break;
56ade8fe
JP		 1309 }
1310 }
1311 } while (num_rec == MLXSW_REG_SFD_REC_MAX_COUNT);
1312
1313out:
1314 kfree(sfd_pl);
1315 return stored_err ? stored_err : err;
1316}
1317
1318static int mlxsw_sp_port_vlan_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1319 struct switchdev_obj_port_vlan *vlan,
1320 switchdev_obj_dump_cb_t *cb)
1321{
1322 u16 vid;
1323 int err = 0;
1324
54a73201
IS		 1325 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
1326 vlan->flags = 0;
1327 vlan->vid_begin = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1328 vlan->vid_end = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1329 return cb(&vlan->obj);
1330 }
1331
56ade8fe
JP		 1332 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1333 vlan->flags = 0;
1334 if (vid == mlxsw_sp_port->pvid)
1335 vlan->flags |= BRIDGE_VLAN_INFO_PVID;
fc1273af
ER		 1336 if (test_bit(vid, mlxsw_sp_port->untagged_vlans))
1337 vlan->flags |= BRIDGE_VLAN_INFO_UNTAGGED;
56ade8fe
JP		 1338 vlan->vid_begin = vid;
1339 vlan->vid_end = vid;
1340 err = cb(&vlan->obj);
1341 if (err)
1342 break;
1343 }
1344 return err;
1345}
1346
1347static int mlxsw_sp_port_obj_dump(struct net_device *dev,
1348 struct switchdev_obj *obj,
1349 switchdev_obj_dump_cb_t *cb)
1350{
1351 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1352 int err = 0;
1353
54a73201
IS		 1354 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1355 if (!mlxsw_sp_port)
1356 return -EINVAL;
1357
56ade8fe
JP		 1358 switch (obj->id) {
1359 case SWITCHDEV_OBJ_ID_PORT_VLAN:
1360 err = mlxsw_sp_port_vlan_dump(mlxsw_sp_port,
1361 SWITCHDEV_OBJ_PORT_VLAN(obj), cb);
1362 break;
1363 case SWITCHDEV_OBJ_ID_PORT_FDB:
1364 err = mlxsw_sp_port_fdb_dump(mlxsw_sp_port,
304f5158
IS		 1365 SWITCHDEV_OBJ_PORT_FDB(obj), cb,
1366 obj->orig_dev);
56ade8fe
JP		 1367 break;
1368 default:
1369 err = -EOPNOTSUPP;
1370 break;
1371 }
1372
1373 return err;
1374}
1375
c7070fc4 1376static const struct switchdev_ops mlxsw_sp_port_switchdev_ops = {
56ade8fe
JP		 1377 .switchdev_port_attr_get = mlxsw_sp_port_attr_get,
1378 .switchdev_port_attr_set = mlxsw_sp_port_attr_set,
1379 .switchdev_port_obj_add = mlxsw_sp_port_obj_add,
1380 .switchdev_port_obj_del = mlxsw_sp_port_obj_del,
1381 .switchdev_port_obj_dump = mlxsw_sp_port_obj_dump,
1382};
1383
45827d78
IS		 1384static void mlxsw_sp_fdb_call_notifiers(bool learning_sync, bool adding,
1385 char *mac, u16 vid,
8a1ab5d7
JP		 1386 struct net_device *dev)
1387{
1388 struct switchdev_notifier_fdb_info info;
1389 unsigned long notifier_type;
1390
45827d78 1391 if (learning_sync) {
8a1ab5d7
JP		 1392 info.addr = mac;
1393 info.vid = vid;
1394 notifier_type = adding ? SWITCHDEV_FDB_ADD : SWITCHDEV_FDB_DEL;
1395 call_switchdev_notifiers(notifier_type, dev, &info.info);
1396 }
1397}
1398
56ade8fe
JP		 1399static void mlxsw_sp_fdb_notify_mac_process(struct mlxsw_sp *mlxsw_sp,
1400 char *sfn_pl, int rec_index,
1401 bool adding)
1402{
1403 struct mlxsw_sp_port *mlxsw_sp_port;
1404 char mac[ETH_ALEN];
1405 u8 local_port;
9de6a80e 1406 u16 vid, fid;
12f1501e 1407 bool do_notification = true;
56ade8fe
JP		 1408 int err;
1409
9de6a80e 1410 mlxsw_reg_sfn_mac_unpack(sfn_pl, rec_index, mac, &fid, &local_port);
56ade8fe
JP		 1411 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1412 if (!mlxsw_sp_port) {
1413 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Incorrect local port in FDB notification\n");
12f1501e 1414 goto just_remove;
56ade8fe
JP		 1415 }
1416
aac78a44 1417 if (mlxsw_sp_fid_is_vfid(fid)) {
aac78a44
IS		 1418 struct mlxsw_sp_port *mlxsw_sp_vport;
1419
d0ec875a
IS		 1420 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1421 fid);
aac78a44
IS		 1422 if (!mlxsw_sp_vport) {
1423 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
12f1501e 1424 goto just_remove;
aac78a44 1425 }
004f85ea 1426 vid = 0;
aac78a44
IS		 1427 /* Override the physical port with the vPort. */
1428 mlxsw_sp_port = mlxsw_sp_vport;
1429 } else {
1430 vid = fid;
1431 }
1432
12f1501e
JP		 1433 adding = adding && mlxsw_sp_port->learning;
1434
1435do_fdb_op:
2fa9d45e 1436 err = mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid,
12f1501e 1437 adding, true);
56ade8fe
JP		 1438 if (err) {
1439 if (net_ratelimit())
1440 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1441 return;
1442 }
1443
12f1501e
JP		 1444 if (!do_notification)
1445 return;
45827d78 1446 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync,
8a1ab5d7 1447 adding, mac, vid, mlxsw_sp_port->dev);
12f1501e
JP		 1448 return;
1449
1450just_remove:
1451 adding = false;
1452 do_notification = false;
1453 goto do_fdb_op;
8a1ab5d7 1454}
56ade8fe 1455
8a1ab5d7
JP		 1456static void mlxsw_sp_fdb_notify_mac_lag_process(struct mlxsw_sp *mlxsw_sp,
1457 char *sfn_pl, int rec_index,
1458 bool adding)
1459{
1460 struct mlxsw_sp_port *mlxsw_sp_port;
e43aca22 1461 struct net_device *dev;
8a1ab5d7 1462 char mac[ETH_ALEN];
64771e31 1463 u16 lag_vid = 0;
8a1ab5d7 1464 u16 lag_id;
9de6a80e 1465 u16 vid, fid;
12f1501e 1466 bool do_notification = true;
8a1ab5d7
JP		 1467 int err;
1468
9de6a80e 1469 mlxsw_reg_sfn_mac_lag_unpack(sfn_pl, rec_index, mac, &fid, &lag_id);
8a1ab5d7
JP		 1470 mlxsw_sp_port = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1471 if (!mlxsw_sp_port) {
1472 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Cannot find port representor for LAG\n");
12f1501e 1473 goto just_remove;
56ade8fe 1474 }
8a1ab5d7 1475
aac78a44 1476 if (mlxsw_sp_fid_is_vfid(fid)) {
aac78a44
IS		 1477 struct mlxsw_sp_port *mlxsw_sp_vport;
1478
d0ec875a
IS		 1479 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1480 fid);
aac78a44
IS		 1481 if (!mlxsw_sp_vport) {
1482 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
12f1501e 1483 goto just_remove;
aac78a44
IS		 1484 }
1485
004f85ea 1486 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
e43aca22 1487 dev = mlxsw_sp_vport->dev;
004f85ea 1488 vid = 0;
aac78a44
IS		 1489 /* Override the physical port with the vPort. */
1490 mlxsw_sp_port = mlxsw_sp_vport;
1491 } else {
e43aca22 1492 dev = mlxsw_sp_lag_get(mlxsw_sp, lag_id)->dev;
aac78a44
IS		 1493 vid = fid;
1494 }
1495
12f1501e
JP		 1496 adding = adding && mlxsw_sp_port->learning;
1497
1498do_fdb_op:
64771e31 1499 err = mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp, lag_id, mac, fid, lag_vid,
12f1501e 1500 adding, true);
8a1ab5d7
JP		 1501 if (err) {
1502 if (net_ratelimit())
1503 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1504 return;
1505 }
1506
12f1501e
JP		 1507 if (!do_notification)
1508 return;
45827d78 1509 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync, adding, mac,
e43aca22 1510 vid, dev);
12f1501e
JP		 1511 return;
1512
1513just_remove:
1514 adding = false;
1515 do_notification = false;
1516 goto do_fdb_op;
56ade8fe
JP		 1517}
1518
1519static void mlxsw_sp_fdb_notify_rec_process(struct mlxsw_sp *mlxsw_sp,
1520 char *sfn_pl, int rec_index)
1521{
1522 switch (mlxsw_reg_sfn_rec_type_get(sfn_pl, rec_index)) {
1523 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC:
1524 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1525 rec_index, true);
1526 break;
1527 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC:
1528 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1529 rec_index, false);
1530 break;
8a1ab5d7
JP		 1531 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC_LAG:
1532 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1533 rec_index, true);
1534 break;
1535 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC_LAG:
1536 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1537 rec_index, false);
1538 break;
56ade8fe
JP		 1539 }
1540}
1541
1542static void mlxsw_sp_fdb_notify_work_schedule(struct mlxsw_sp *mlxsw_sp)
1543{
dd9bdb04
JP		 1544 mlxsw_core_schedule_dw(&mlxsw_sp->fdb_notify.dw,
1545 msecs_to_jiffies(mlxsw_sp->fdb_notify.interval));
56ade8fe
JP		 1546}
1547
1548static void mlxsw_sp_fdb_notify_work(struct work_struct *work)
1549{
1550 struct mlxsw_sp *mlxsw_sp;
1551 char *sfn_pl;
1552 u8 num_rec;
1553 int i;
1554 int err;
1555
1556 sfn_pl = kmalloc(MLXSW_REG_SFN_LEN, GFP_KERNEL);
1557 if (!sfn_pl)
1558 return;
1559
1560 mlxsw_sp = container_of(work, struct mlxsw_sp, fdb_notify.dw.work);
1561
4f2c6ae5 1562 rtnl_lock();
1803e0fb
IS		 1563 mlxsw_reg_sfn_pack(sfn_pl);
1564 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfn), sfn_pl);
1565 if (err) {
1566 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Failed to get FDB notifications\n");
1567 goto out;
1568 }
1569 num_rec = mlxsw_reg_sfn_num_rec_get(sfn_pl);
1570 for (i = 0; i < num_rec; i++)
1571 mlxsw_sp_fdb_notify_rec_process(mlxsw_sp, sfn_pl, i);
56ade8fe 1572
1803e0fb 1573out:
4f2c6ae5 1574 rtnl_unlock();
56ade8fe
JP		 1575 kfree(sfn_pl);
1576 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1577}
1578
1579static int mlxsw_sp_fdb_init(struct mlxsw_sp *mlxsw_sp)
1580{
1581 int err;
1582
1583 err = mlxsw_sp_ageing_set(mlxsw_sp, MLXSW_SP_DEFAULT_AGEING_TIME);
1584 if (err) {
1585 dev_err(mlxsw_sp->bus_info->dev, "Failed to set default ageing time\n");
1586 return err;
1587 }
1588 INIT_DELAYED_WORK(&mlxsw_sp->fdb_notify.dw, mlxsw_sp_fdb_notify_work);
1589 mlxsw_sp->fdb_notify.interval = MLXSW_SP_DEFAULT_LEARNING_INTERVAL;
1590 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1591 return 0;
1592}
1593
1594static void mlxsw_sp_fdb_fini(struct mlxsw_sp *mlxsw_sp)
1595{
1596 cancel_delayed_work_sync(&mlxsw_sp->fdb_notify.dw);
1597}
1598
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JP		 1599int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp)
1600{
1601 return mlxsw_sp_fdb_init(mlxsw_sp);
1602}
1603
1604void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp)
1605{
1606 mlxsw_sp_fdb_fini(mlxsw_sp);
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JP		 1607}
1608
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JP		 1609void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port)
1610{
1611 mlxsw_sp_port->dev->switchdev_ops = &mlxsw_sp_port_switchdev_ops;
1612}
1613
1614void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port)
1615{
1616}
Linux kernel - Deliverables
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