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net: Explicitly initialize u64_stats_sync structures for lockdep
[deliverable/linux.git] / drivers / net / ethernet / neterion / vxge / vxge-main.c
CommitLineData
703da5a1
RV		 1/******************************************************************************
2* This software may be used and distributed according to the terms of
3* the GNU General Public License (GPL), incorporated herein by reference.
4* Drivers based on or derived from this code fall under the GPL and must
5* retain the authorship, copyright and license notice. This file is not
6* a complete program and may only be used when the entire operating
7* system is licensed under the GPL.
8* See the file COPYING in this distribution for more information.
9*
926bd900 10* vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
703da5a1 11* Virtualized Server Adapter.
926bd900 12* Copyright(c) 2002-2010 Exar Corp.
703da5a1
RV		 13*
14* The module loadable parameters that are supported by the driver and a brief
15* explanation of all the variables:
16* vlan_tag_strip:
17* Strip VLAN Tag enable/disable. Instructs the device to remove
18* the VLAN tag from all received tagged frames that are not
19* replicated at the internal L2 switch.
20* 0 - Do not strip the VLAN tag.
21* 1 - Strip the VLAN tag.
22*
23* addr_learn_en:
24* Enable learning the mac address of the guest OS interface in
25* a virtualization environment.
26* 0 - DISABLE
27* 1 - ENABLE
28*
29* max_config_port:
30* Maximum number of port to be supported.
31* MIN -1 and MAX - 2
32*
33* max_config_vpath:
34* This configures the maximum no of VPATH configures for each
35* device function.
36* MIN - 1 and MAX - 17
37*
38* max_config_dev:
39* This configures maximum no of Device function to be enabled.
40* MIN - 1 and MAX - 17
41*
42******************************************************************************/
43
75f5e1c6
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
53515734 46#include <linux/bitops.h>
703da5a1 47#include <linux/if_vlan.h>
a6b7a407 48#include <linux/interrupt.h>
703da5a1 49#include <linux/pci.h>
5a0e3ad6 50#include <linux/slab.h>
2b05e002 51#include <linux/tcp.h>
703da5a1
RV		 52#include <net/ip.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
e8ac1756 55#include <linux/firmware.h>
b81b3733 56#include <linux/net_tstamp.h>
70c71606 57#include <linux/prefetch.h>
9d9779e7 58#include <linux/module.h>
703da5a1
RV		 59#include "vxge-main.h"
60#include "vxge-reg.h"
61
62MODULE_LICENSE("Dual BSD/GPL");
63MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
64 "Virtualized Server Adapter");
65
a3aa1884 66static DEFINE_PCI_DEVICE_TABLE(vxge_id_table) = {
703da5a1
RV		 67 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
68 PCI_ANY_ID},
69 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
70 PCI_ANY_ID},
71 {0}
72};
73
74MODULE_DEVICE_TABLE(pci, vxge_id_table);
75
76VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
77VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
78VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
79VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
80VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
81VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
82
83static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
84 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
85static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
86 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
87module_param_array(bw_percentage, uint, NULL, 0);
88
89static struct vxge_drv_config *driver_config;
90
91static inline int is_vxge_card_up(struct vxgedev *vdev)
92{
93 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
94}
95
96static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
97{
ff67df55
BL		 98 struct sk_buff **skb_ptr = NULL;
99 struct sk_buff **temp;
100#define NR_SKB_COMPLETED 128
101 struct sk_buff *completed[NR_SKB_COMPLETED];
102 int more;
703da5a1 103
ff67df55
BL		 104 do {
105 more = 0;
106 skb_ptr = completed;
107
98f45da2 108 if (__netif_tx_trylock(fifo->txq)) {
ff67df55
BL		 109 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
110 NR_SKB_COMPLETED, &more);
98f45da2 111 __netif_tx_unlock(fifo->txq);
ff67df55 112 }
98f45da2 113
ff67df55
BL		 114 /* free SKBs */
115 for (temp = completed; temp != skb_ptr; temp++)
116 dev_kfree_skb_irq(*temp);
98f45da2 117 } while (more);
703da5a1
RV		 118}
119
120static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
121{
122 int i;
123
124 /* Complete all transmits */
125 for (i = 0; i < vdev->no_of_vpath; i++)
126 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
127}
128
129static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
130{
131 int i;
132 struct vxge_ring *ring;
133
134 /* Complete all receives*/
135 for (i = 0; i < vdev->no_of_vpath; i++) {
136 ring = &vdev->vpaths[i].ring;
137 vxge_hw_vpath_poll_rx(ring->handle);
138 }
139}
140
703da5a1
RV		 141/*
142 * vxge_callback_link_up
143 *
144 * This function is called during interrupt context to notify link up state
145 * change.
146 */
528f7272 147static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
703da5a1
RV		 148{
149 struct net_device *dev = hldev->ndev;
5f54cebb 150 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 151
152 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
153 vdev->ndev->name, __func__, __LINE__);
75f5e1c6 154 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 155 vdev->stats.link_up++;
156
157 netif_carrier_on(vdev->ndev);
d03848e0 158 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 159
160 vxge_debug_entryexit(VXGE_TRACE,
161 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
162}
163
164/*
165 * vxge_callback_link_down
166 *
167 * This function is called during interrupt context to notify link down state
168 * change.
169 */
528f7272 170static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
703da5a1
RV		 171{
172 struct net_device *dev = hldev->ndev;
5f54cebb 173 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 174
175 vxge_debug_entryexit(VXGE_TRACE,
176 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
75f5e1c6 177 netdev_notice(vdev->ndev, "Link Down\n");
703da5a1
RV		 178
179 vdev->stats.link_down++;
180 netif_carrier_off(vdev->ndev);
d03848e0 181 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 182
183 vxge_debug_entryexit(VXGE_TRACE,
184 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
185}
186
187/*
188 * vxge_rx_alloc
189 *
190 * Allocate SKB.
191 */
528f7272 192static struct sk_buff *
703da5a1
RV		 193vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
194{
195 struct net_device *dev;
196 struct sk_buff *skb;
197 struct vxge_rx_priv *rx_priv;
198
199 dev = ring->ndev;
200 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
201 ring->ndev->name, __func__, __LINE__);
202
203 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
204
205 /* try to allocate skb first. this one may fail */
206 skb = netdev_alloc_skb(dev, skb_size +
207 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
208 if (skb == NULL) {
209 vxge_debug_mem(VXGE_ERR,
210 "%s: out of memory to allocate SKB", dev->name);
211 ring->stats.skb_alloc_fail++;
212 return NULL;
213 }
214
215 vxge_debug_mem(VXGE_TRACE,
216 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
217 __func__, __LINE__, skb);
218
219 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
220
221 rx_priv->skb = skb;
ea11bbe0 222 rx_priv->skb_data = NULL;
703da5a1
RV		 223 rx_priv->data_size = skb_size;
224 vxge_debug_entryexit(VXGE_TRACE,
225 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
226
227 return skb;
228}
229
230/*
231 * vxge_rx_map
232 */
233static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
234{
235 struct vxge_rx_priv *rx_priv;
236 dma_addr_t dma_addr;
237
238 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
239 ring->ndev->name, __func__, __LINE__);
240 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
241
ea11bbe0
BL		 242 rx_priv->skb_data = rx_priv->skb->data;
243 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
703da5a1
RV		 244 rx_priv->data_size, PCI_DMA_FROMDEVICE);
245
fa15e99b 246 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
703da5a1
RV		 247 ring->stats.pci_map_fail++;
248 return -EIO;
249 }
250 vxge_debug_mem(VXGE_TRACE,
251 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
252 ring->ndev->name, __func__, __LINE__,
253 (unsigned long long)dma_addr);
254 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
255
256 rx_priv->data_dma = dma_addr;
257 vxge_debug_entryexit(VXGE_TRACE,
258 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
259
260 return 0;
261}
262
263/*
264 * vxge_rx_initial_replenish
265 * Allocation of RxD as an initial replenish procedure.
266 */
267static enum vxge_hw_status
268vxge_rx_initial_replenish(void *dtrh, void *userdata)
269{
270 struct vxge_ring *ring = (struct vxge_ring *)userdata;
271 struct vxge_rx_priv *rx_priv;
272
273 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
274 ring->ndev->name, __func__, __LINE__);
275 if (vxge_rx_alloc(dtrh, ring,
276 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
277 return VXGE_HW_FAIL;
278
279 if (vxge_rx_map(dtrh, ring)) {
280 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
281 dev_kfree_skb(rx_priv->skb);
282
283 return VXGE_HW_FAIL;
284 }
285 vxge_debug_entryexit(VXGE_TRACE,
286 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
287
288 return VXGE_HW_OK;
289}
290
291static inline void
292vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
293 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
294{
295
296 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
297 ring->ndev->name, __func__, __LINE__);
298 skb_record_rx_queue(skb, ring->driver_id);
299 skb->protocol = eth_type_trans(skb, ring->ndev);
300
62ea0557 301 u64_stats_update_begin(&ring->stats.syncp);
703da5a1
RV		 302 ring->stats.rx_frms++;
303 ring->stats.rx_bytes += pkt_length;
304
305 if (skb->pkt_type == PACKET_MULTICAST)
306 ring->stats.rx_mcast++;
62ea0557 307 u64_stats_update_end(&ring->stats.syncp);
703da5a1
RV		 308
309 vxge_debug_rx(VXGE_TRACE,
310 "%s: %s:%d skb protocol = %d",
311 ring->ndev->name, __func__, __LINE__, skb->protocol);
312
53515734
JP		 313 if (ext_info->vlan &&
314 ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
86a9bad3 315 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ext_info->vlan);
53515734 316 napi_gro_receive(ring->napi_p, skb);
feb990d4 317
703da5a1
RV		 318 vxge_debug_entryexit(VXGE_TRACE,
319 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
320}
321
322static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
323 struct vxge_rx_priv *rx_priv)
324{
325 pci_dma_sync_single_for_device(ring->pdev,
326 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
327
328 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
329 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
330}
331
332static inline void vxge_post(int *dtr_cnt, void **first_dtr,
333 void *post_dtr, struct __vxge_hw_ring *ringh)
334{
335 int dtr_count = *dtr_cnt;
336 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
337 if (*first_dtr)
338 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
339 *first_dtr = post_dtr;
340 } else
341 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
342 dtr_count++;
343 *dtr_cnt = dtr_count;
344}
345
346/*
347 * vxge_rx_1b_compl
348 *
349 * If the interrupt is because of a received frame or if the receive ring
350 * contains fresh as yet un-processed frames, this function is called.
351 */
42821a5b 352static enum vxge_hw_status
703da5a1
RV		 353vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
354 u8 t_code, void *userdata)
355{
356 struct vxge_ring *ring = (struct vxge_ring *)userdata;
b81b3733 357 struct net_device *dev = ring->ndev;
703da5a1
RV		 358 unsigned int dma_sizes;
359 void *first_dtr = NULL;
360 int dtr_cnt = 0;
361 int data_size;
362 dma_addr_t data_dma;
363 int pkt_length;
364 struct sk_buff *skb;
365 struct vxge_rx_priv *rx_priv;
366 struct vxge_hw_ring_rxd_info ext_info;
367 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
368 ring->ndev->name, __func__, __LINE__);
703da5a1
RV		 369
370 do {
3f23e436 371 prefetch((char *)dtr + L1_CACHE_BYTES);
703da5a1
RV		 372 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
373 skb = rx_priv->skb;
374 data_size = rx_priv->data_size;
375 data_dma = rx_priv->data_dma;
ea11bbe0 376 prefetch(rx_priv->skb_data);
703da5a1
RV		 377
378 vxge_debug_rx(VXGE_TRACE,
379 "%s: %s:%d skb = 0x%p",
380 ring->ndev->name, __func__, __LINE__, skb);
381
382 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
383 pkt_length = dma_sizes;
384
22fa125e
SH		 385 pkt_length -= ETH_FCS_LEN;
386
703da5a1
RV		 387 vxge_debug_rx(VXGE_TRACE,
388 "%s: %s:%d Packet Length = %d",
389 ring->ndev->name, __func__, __LINE__, pkt_length);
390
391 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
392
393 /* check skb validity */
394 vxge_assert(skb);
395
396 prefetch((char *)skb + L1_CACHE_BYTES);
397 if (unlikely(t_code)) {
703da5a1
RV		 398 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
399 VXGE_HW_OK) {
400
401 ring->stats.rx_errors++;
402 vxge_debug_rx(VXGE_TRACE,
403 "%s: %s :%d Rx T_code is %d",
404 ring->ndev->name, __func__,
405 __LINE__, t_code);
406
407 /* If the t_code is not supported and if the
408 * t_code is other than 0x5 (unparseable packet
409 * such as unknown UPV6 header), Drop it !!!
410 */
411 vxge_re_pre_post(dtr, ring, rx_priv);
412
413 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
414 ring->stats.rx_dropped++;
415 continue;
416 }
417 }
418
419 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
703da5a1 420 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
703da5a1
RV		 421 if (!vxge_rx_map(dtr, ring)) {
422 skb_put(skb, pkt_length);
423
424 pci_unmap_single(ring->pdev, data_dma,
425 data_size, PCI_DMA_FROMDEVICE);
426
427 vxge_hw_ring_rxd_pre_post(ringh, dtr);
428 vxge_post(&dtr_cnt, &first_dtr, dtr,
429 ringh);
430 } else {
431 dev_kfree_skb(rx_priv->skb);
432 rx_priv->skb = skb;
433 rx_priv->data_size = data_size;
434 vxge_re_pre_post(dtr, ring, rx_priv);
435
436 vxge_post(&dtr_cnt, &first_dtr, dtr,
437 ringh);
438 ring->stats.rx_dropped++;
439 break;
440 }
441 } else {
442 vxge_re_pre_post(dtr, ring, rx_priv);
443
444 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
445 ring->stats.rx_dropped++;
446 break;
447 }
448 } else {
449 struct sk_buff *skb_up;
450
451 skb_up = netdev_alloc_skb(dev, pkt_length +
452 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
453 if (skb_up != NULL) {
454 skb_reserve(skb_up,
455 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
456
457 pci_dma_sync_single_for_cpu(ring->pdev,
458 data_dma, data_size,
459 PCI_DMA_FROMDEVICE);
460
461 vxge_debug_mem(VXGE_TRACE,
462 "%s: %s:%d skb_up = %p",
463 ring->ndev->name, __func__,
464 __LINE__, skb);
465 memcpy(skb_up->data, skb->data, pkt_length);
466
467 vxge_re_pre_post(dtr, ring, rx_priv);
468
469 vxge_post(&dtr_cnt, &first_dtr, dtr,
470 ringh);
471 /* will netif_rx small SKB instead */
472 skb = skb_up;
473 skb_put(skb, pkt_length);
474 } else {
475 vxge_re_pre_post(dtr, ring, rx_priv);
476
477 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
478 vxge_debug_rx(VXGE_ERR,
479 "%s: vxge_rx_1b_compl: out of "
480 "memory", dev->name);
481 ring->stats.skb_alloc_fail++;
482 break;
483 }
484 }
485
486 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
487 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
feb990d4 488 (dev->features & NETIF_F_RXCSUM) && /* Offload Rx side CSUM */
703da5a1
RV		 489 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
490 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
491 skb->ip_summed = CHECKSUM_UNNECESSARY;
492 else
bc8acf2c 493 skb_checksum_none_assert(skb);
703da5a1 494
b81b3733
JM		 495
496 if (ring->rx_hwts) {
497 struct skb_shared_hwtstamps *skb_hwts;
498 u32 ns = *(u32 *)(skb->head + pkt_length);
499
500 skb_hwts = skb_hwtstamps(skb);
501 skb_hwts->hwtstamp = ns_to_ktime(ns);
502 skb_hwts->syststamp.tv64 = 0;
503 }
504
47f01db4
JM		 505 /* rth_hash_type and rth_it_hit are non-zero regardless of
506 * whether rss is enabled. Only the rth_value is zero/non-zero
507 * if rss is disabled/enabled, so key off of that.
508 */
509 if (ext_info.rth_value)
510 skb->rxhash = ext_info.rth_value;
511
703da5a1
RV		 512 vxge_rx_complete(ring, skb, ext_info.vlan,
513 pkt_length, &ext_info);
514
515 ring->budget--;
516 ring->pkts_processed++;
517 if (!ring->budget)
518 break;
519
520 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
521 &t_code) == VXGE_HW_OK);
522
523 if (first_dtr)
524 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
525
703da5a1
RV		 526 vxge_debug_entryexit(VXGE_TRACE,
527 "%s:%d Exiting...",
528 __func__, __LINE__);
529 return VXGE_HW_OK;
530}
531
532/*
533 * vxge_xmit_compl
534 *
535 * If an interrupt was raised to indicate DMA complete of the Tx packet,
536 * this function is called. It identifies the last TxD whose buffer was
537 * freed and frees all skbs whose data have already DMA'ed into the NICs
538 * internal memory.
539 */
42821a5b 540static enum vxge_hw_status
703da5a1
RV		 541vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
542 enum vxge_hw_fifo_tcode t_code, void *userdata,
ff67df55 543 struct sk_buff ***skb_ptr, int nr_skb, int *more)
703da5a1
RV		 544{
545 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
ff67df55 546 struct sk_buff *skb, **done_skb = *skb_ptr;
703da5a1
RV		 547 int pkt_cnt = 0;
548
549 vxge_debug_entryexit(VXGE_TRACE,
550 "%s:%d Entered....", __func__, __LINE__);
551
552 do {
553 int frg_cnt;
554 skb_frag_t *frag;
555 int i = 0, j;
556 struct vxge_tx_priv *txd_priv =
557 vxge_hw_fifo_txdl_private_get(dtr);
558
559 skb = txd_priv->skb;
560 frg_cnt = skb_shinfo(skb)->nr_frags;
561 frag = &skb_shinfo(skb)->frags[0];
562
563 vxge_debug_tx(VXGE_TRACE,
564 "%s: %s:%d fifo_hw = %p dtr = %p "
565 "tcode = 0x%x", fifo->ndev->name, __func__,
566 __LINE__, fifo_hw, dtr, t_code);
567 /* check skb validity */
568 vxge_assert(skb);
569 vxge_debug_tx(VXGE_TRACE,
570 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
571 fifo->ndev->name, __func__, __LINE__,
572 skb, txd_priv, frg_cnt);
573 if (unlikely(t_code)) {
574 fifo->stats.tx_errors++;
575 vxge_debug_tx(VXGE_ERR,
576 "%s: tx: dtr %p completed due to "
577 "error t_code %01x", fifo->ndev->name,
578 dtr, t_code);
579 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
580 }
581
582 /* for unfragmented skb */
583 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
584 skb_headlen(skb), PCI_DMA_TODEVICE);
585
586 for (j = 0; j < frg_cnt; j++) {
587 pci_unmap_page(fifo->pdev,
588 txd_priv->dma_buffers[i++],
9e903e08 589 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 590 frag += 1;
591 }
592
593 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
594
595 /* Updating the statistics block */
62ea0557 596 u64_stats_update_begin(&fifo->stats.syncp);
703da5a1
RV		 597 fifo->stats.tx_frms++;
598 fifo->stats.tx_bytes += skb->len;
62ea0557 599 u64_stats_update_end(&fifo->stats.syncp);
703da5a1 600
ff67df55
BL		 601 *done_skb++ = skb;
602
603 if (--nr_skb <= 0) {
604 *more = 1;
605 break;
606 }
703da5a1
RV		 607
608 pkt_cnt++;
609 if (pkt_cnt > fifo->indicate_max_pkts)
610 break;
611
612 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
613 &dtr, &t_code) == VXGE_HW_OK);
614
ff67df55 615 *skb_ptr = done_skb;
98f45da2
JM		 616 if (netif_tx_queue_stopped(fifo->txq))
617 netif_tx_wake_queue(fifo->txq);
703da5a1 618
703da5a1
RV		 619 vxge_debug_entryexit(VXGE_TRACE,
620 "%s: %s:%d Exiting...",
621 fifo->ndev->name, __func__, __LINE__);
622 return VXGE_HW_OK;
623}
624
28679751 625/* select a vpath to transmit the packet */
98f45da2 626static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
703da5a1
RV		 627{
628 u16 queue_len, counter = 0;
629 if (skb->protocol == htons(ETH_P_IP)) {
630 struct iphdr *ip;
631 struct tcphdr *th;
632
633 ip = ip_hdr(skb);
634
56f8a75c 635 if (!ip_is_fragment(ip)) {
703da5a1
RV		 636 th = (struct tcphdr *)(((unsigned char *)ip) +
637 ip->ihl*4);
638
639 queue_len = vdev->no_of_vpath;
640 counter = (ntohs(th->source) +
641 ntohs(th->dest)) &
642 vdev->vpath_selector[queue_len - 1];
643 if (counter >= queue_len)
644 counter = queue_len - 1;
703da5a1
RV		 645 }
646 }
647 return counter;
648}
649
650static enum vxge_hw_status vxge_search_mac_addr_in_list(
651 struct vxge_vpath *vpath, u64 del_mac)
652{
653 struct list_head *entry, *next;
654 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
655 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
656 return TRUE;
657 }
658 return FALSE;
659}
660
528f7272
JM		 661static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
662{
663 struct vxge_mac_addrs *new_mac_entry;
664 u8 *mac_address = NULL;
665
666 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
667 return TRUE;
668
669 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
670 if (!new_mac_entry) {
671 vxge_debug_mem(VXGE_ERR,
672 "%s: memory allocation failed",
673 VXGE_DRIVER_NAME);
674 return FALSE;
675 }
676
677 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
678
679 /* Copy the new mac address to the list */
680 mac_address = (u8 *)&new_mac_entry->macaddr;
681 memcpy(mac_address, mac->macaddr, ETH_ALEN);
682
683 new_mac_entry->state = mac->state;
684 vpath->mac_addr_cnt++;
685
f8d4aa29 686 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 687 vpath->mcast_addr_cnt++;
688
689 return TRUE;
690}
691
692/* Add a mac address to DA table */
693static enum vxge_hw_status
694vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
695{
696 enum vxge_hw_status status = VXGE_HW_OK;
697 struct vxge_vpath *vpath;
698 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
699
f8d4aa29 700 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 701 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
702 else
703 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
704
705 vpath = &vdev->vpaths[mac->vpath_no];
706 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
707 mac->macmask, duplicate_mode);
708 if (status != VXGE_HW_OK) {
709 vxge_debug_init(VXGE_ERR,
710 "DA config add entry failed for vpath:%d",
711 vpath->device_id);
712 } else
713 if (FALSE == vxge_mac_list_add(vpath, mac))
714 status = -EPERM;
715
716 return status;
717}
718
703da5a1
RV		 719static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
720{
721 struct macInfo mac_info;
722 u8 *mac_address = NULL;
723 u64 mac_addr = 0, vpath_vector = 0;
724 int vpath_idx = 0;
725 enum vxge_hw_status status = VXGE_HW_OK;
726 struct vxge_vpath *vpath = NULL;
727 struct __vxge_hw_device *hldev;
728
d8ee7071 729 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 730
731 mac_address = (u8 *)&mac_addr;
732 memcpy(mac_address, mac_header, ETH_ALEN);
733
734 /* Is this mac address already in the list? */
735 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
736 vpath = &vdev->vpaths[vpath_idx];
737 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
738 return vpath_idx;
739 }
740
741 memset(&mac_info, 0, sizeof(struct macInfo));
742 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
743
744 /* Any vpath has room to add mac address to its da table? */
745 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
746 vpath = &vdev->vpaths[vpath_idx];
747 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
748 /* Add this mac address to this vpath */
749 mac_info.vpath_no = vpath_idx;
750 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
751 status = vxge_add_mac_addr(vdev, &mac_info);
752 if (status != VXGE_HW_OK)
753 return -EPERM;
754 return vpath_idx;
755 }
756 }
757
758 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
759 vpath_idx = 0;
760 mac_info.vpath_no = vpath_idx;
761 /* Is the first vpath already selected as catch-basin ? */
762 vpath = &vdev->vpaths[vpath_idx];
763 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
764 /* Add this mac address to this vpath */
765 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
766 return -EPERM;
767 return vpath_idx;
768 }
769
770 /* Select first vpath as catch-basin */
771 vpath_vector = vxge_mBIT(vpath->device_id);
772 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
773 vxge_hw_mgmt_reg_type_mrpcim,
774 0,
775 (ulong)offsetof(
776 struct vxge_hw_mrpcim_reg,
777 rts_mgr_cbasin_cfg),
778 vpath_vector);
779 if (status != VXGE_HW_OK) {
780 vxge_debug_tx(VXGE_ERR,
781 "%s: Unable to set the vpath-%d in catch-basin mode",
782 VXGE_DRIVER_NAME, vpath->device_id);
783 return -EPERM;
784 }
785
786 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
787 return -EPERM;
788
789 return vpath_idx;
790}
791
792/**
793 * vxge_xmit
794 * @skb : the socket buffer containing the Tx data.
795 * @dev : device pointer.
796 *
797 * This function is the Tx entry point of the driver. Neterion NIC supports
798 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
703da5a1 799*/
61357325 800static netdev_tx_t
703da5a1
RV		 801vxge_xmit(struct sk_buff *skb, struct net_device *dev)
802{
803 struct vxge_fifo *fifo = NULL;
804 void *dtr_priv;
805 void *dtr = NULL;
806 struct vxgedev *vdev = NULL;
807 enum vxge_hw_status status;
808 int frg_cnt, first_frg_len;
809 skb_frag_t *frag;
810 int i = 0, j = 0, avail;
811 u64 dma_pointer;
812 struct vxge_tx_priv *txdl_priv = NULL;
813 struct __vxge_hw_fifo *fifo_hw;
703da5a1 814 int offload_type;
703da5a1 815 int vpath_no = 0;
703da5a1
RV		 816
817 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
818 dev->name, __func__, __LINE__);
819
820 /* A buffer with no data will be dropped */
821 if (unlikely(skb->len <= 0)) {
822 vxge_debug_tx(VXGE_ERR,
823 "%s: Buffer has no data..", dev->name);
824 dev_kfree_skb(skb);
825 return NETDEV_TX_OK;
826 }
827
5f54cebb 828 vdev = netdev_priv(dev);
703da5a1
RV		 829
830 if (unlikely(!is_vxge_card_up(vdev))) {
831 vxge_debug_tx(VXGE_ERR,
832 "%s: vdev not initialized", dev->name);
833 dev_kfree_skb(skb);
834 return NETDEV_TX_OK;
835 }
836
837 if (vdev->config.addr_learn_en) {
838 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
839 if (vpath_no == -EPERM) {
840 vxge_debug_tx(VXGE_ERR,
841 "%s: Failed to store the mac address",
842 dev->name);
843 dev_kfree_skb(skb);
844 return NETDEV_TX_OK;
845 }
846 }
847
848 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
849 vpath_no = skb_get_queue_mapping(skb);
850 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
98f45da2 851 vpath_no = vxge_get_vpath_no(vdev, skb);
703da5a1
RV		 852
853 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
854
855 if (vpath_no >= vdev->no_of_vpath)
856 vpath_no = 0;
857
858 fifo = &vdev->vpaths[vpath_no].fifo;
859 fifo_hw = fifo->handle;
860
98f45da2 861 if (netif_tx_queue_stopped(fifo->txq))
d03848e0 862 return NETDEV_TX_BUSY;
d03848e0 863
703da5a1
RV		 864 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
865 if (avail == 0) {
866 vxge_debug_tx(VXGE_ERR,
867 "%s: No free TXDs available", dev->name);
868 fifo->stats.txd_not_free++;
98f45da2 869 goto _exit0;
703da5a1
RV		 870 }
871
4403b371
BL		 872 /* Last TXD? Stop tx queue to avoid dropping packets. TX
873 * completion will resume the queue.
874 */
875 if (avail == 1)
98f45da2 876 netif_tx_stop_queue(fifo->txq);
4403b371 877
703da5a1
RV		 878 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
879 if (unlikely(status != VXGE_HW_OK)) {
880 vxge_debug_tx(VXGE_ERR,
881 "%s: Out of descriptors .", dev->name);
882 fifo->stats.txd_out_of_desc++;
98f45da2 883 goto _exit0;
703da5a1
RV		 884 }
885
886 vxge_debug_tx(VXGE_TRACE,
887 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
888 dev->name, __func__, __LINE__,
889 fifo_hw, dtr, dtr_priv);
890
eab6d18d 891 if (vlan_tx_tag_present(skb)) {
703da5a1
RV		 892 u16 vlan_tag = vlan_tx_tag_get(skb);
893 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
894 }
895
896 first_frg_len = skb_headlen(skb);
897
898 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
899 PCI_DMA_TODEVICE);
900
901 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
902 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
703da5a1 903 fifo->stats.pci_map_fail++;
98f45da2 904 goto _exit0;
703da5a1
RV		 905 }
906
907 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
908 txdl_priv->skb = skb;
909 txdl_priv->dma_buffers[j] = dma_pointer;
910
911 frg_cnt = skb_shinfo(skb)->nr_frags;
912 vxge_debug_tx(VXGE_TRACE,
913 "%s: %s:%d skb = %p txdl_priv = %p "
914 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
915 __func__, __LINE__, skb, txdl_priv,
916 frg_cnt, (unsigned long long)dma_pointer);
917
918 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
919 first_frg_len);
920
921 frag = &skb_shinfo(skb)->frags[0];
922 for (i = 0; i < frg_cnt; i++) {
923 /* ignore 0 length fragment */
9e903e08 924 if (!skb_frag_size(frag))
703da5a1
RV		 925 continue;
926
94d60a7b 927 dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
9e903e08 928 0, skb_frag_size(frag),
94d60a7b 929 DMA_TO_DEVICE);
703da5a1 930
94d60a7b 931 if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
98f45da2 932 goto _exit2;
703da5a1
RV		 933 vxge_debug_tx(VXGE_TRACE,
934 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
935 dev->name, __func__, __LINE__, i,
936 (unsigned long long)dma_pointer);
937
938 txdl_priv->dma_buffers[j] = dma_pointer;
939 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
9e903e08 940 skb_frag_size(frag));
703da5a1
RV		 941 frag += 1;
942 }
943
944 offload_type = vxge_offload_type(skb);
945
946 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
703da5a1
RV		 947 int mss = vxge_tcp_mss(skb);
948 if (mss) {
98f45da2 949 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
703da5a1
RV		 950 dev->name, __func__, __LINE__, mss);
951 vxge_hw_fifo_txdl_mss_set(dtr, mss);
952 } else {
953 vxge_assert(skb->len <=
954 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
955 vxge_assert(0);
956 goto _exit1;
957 }
958 }
959
960 if (skb->ip_summed == CHECKSUM_PARTIAL)
961 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
962 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
963 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
964 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
965
966 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
703da5a1 967
703da5a1
RV		 968 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
969 dev->name, __func__, __LINE__);
6ed10654 970 return NETDEV_TX_OK;
703da5a1 971
98f45da2 972_exit2:
703da5a1 973 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
703da5a1
RV		 974_exit1:
975 j = 0;
976 frag = &skb_shinfo(skb)->frags[0];
977
978 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
979 skb_headlen(skb), PCI_DMA_TODEVICE);
980
981 for (; j < i; j++) {
982 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
9e903e08 983 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 984 frag += 1;
985 }
986
987 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
98f45da2
JM		 988_exit0:
989 netif_tx_stop_queue(fifo->txq);
703da5a1 990 dev_kfree_skb(skb);
703da5a1 991
6ed10654 992 return NETDEV_TX_OK;
703da5a1
RV		 993}
994
995/*
996 * vxge_rx_term
997 *
998 * Function will be called by hw function to abort all outstanding receive
999 * descriptors.
1000 */
1001static void
1002vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
1003{
1004 struct vxge_ring *ring = (struct vxge_ring *)userdata;
1005 struct vxge_rx_priv *rx_priv =
1006 vxge_hw_ring_rxd_private_get(dtrh);
1007
1008 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1009 ring->ndev->name, __func__, __LINE__);
1010 if (state != VXGE_HW_RXD_STATE_POSTED)
1011 return;
1012
1013 pci_unmap_single(ring->pdev, rx_priv->data_dma,
1014 rx_priv->data_size, PCI_DMA_FROMDEVICE);
1015
1016 dev_kfree_skb(rx_priv->skb);
ea11bbe0 1017 rx_priv->skb_data = NULL;
703da5a1
RV		 1018
1019 vxge_debug_entryexit(VXGE_TRACE,
1020 "%s: %s:%d Exiting...",
1021 ring->ndev->name, __func__, __LINE__);
1022}
1023
1024/*
1025 * vxge_tx_term
1026 *
1027 * Function will be called to abort all outstanding tx descriptors
1028 */
1029static void
1030vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1031{
1032 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1033 skb_frag_t *frag;
1034 int i = 0, j, frg_cnt;
1035 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1036 struct sk_buff *skb = txd_priv->skb;
1037
1038 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1039
1040 if (state != VXGE_HW_TXDL_STATE_POSTED)
1041 return;
1042
1043 /* check skb validity */
1044 vxge_assert(skb);
1045 frg_cnt = skb_shinfo(skb)->nr_frags;
1046 frag = &skb_shinfo(skb)->frags[0];
1047
1048 /* for unfragmented skb */
1049 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1050 skb_headlen(skb), PCI_DMA_TODEVICE);
1051
1052 for (j = 0; j < frg_cnt; j++) {
1053 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
9e903e08 1054 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 1055 frag += 1;
1056 }
1057
1058 dev_kfree_skb(skb);
1059
1060 vxge_debug_entryexit(VXGE_TRACE,
1061 "%s:%d Exiting...", __func__, __LINE__);
1062}
1063
528f7272
JM		 1064static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1065{
1066 struct list_head *entry, *next;
1067 u64 del_mac = 0;
1068 u8 *mac_address = (u8 *) (&del_mac);
1069
1070 /* Copy the mac address to delete from the list */
1071 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1072
1073 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1074 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1075 list_del(entry);
1076 kfree((struct vxge_mac_addrs *)entry);
1077 vpath->mac_addr_cnt--;
1078
f8d4aa29 1079 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 1080 vpath->mcast_addr_cnt--;
1081 return TRUE;
1082 }
1083 }
1084
1085 return FALSE;
1086}
1087
1088/* delete a mac address from DA table */
1089static enum vxge_hw_status
1090vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1091{
1092 enum vxge_hw_status status = VXGE_HW_OK;
1093 struct vxge_vpath *vpath;
1094
1095 vpath = &vdev->vpaths[mac->vpath_no];
1096 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1097 mac->macmask);
1098 if (status != VXGE_HW_OK) {
1099 vxge_debug_init(VXGE_ERR,
1100 "DA config delete entry failed for vpath:%d",
1101 vpath->device_id);
1102 } else
1103 vxge_mac_list_del(vpath, mac);
1104 return status;
1105}
1106
703da5a1
RV		 1107/**
1108 * vxge_set_multicast
1109 * @dev: pointer to the device structure
1110 *
1111 * Entry point for multicast address enable/disable
1112 * This function is a driver entry point which gets called by the kernel
1113 * whenever multicast addresses must be enabled/disabled. This also gets
1114 * called to set/reset promiscuous mode. Depending on the deivce flag, we
1115 * determine, if multicast address must be enabled or if promiscuous mode
1116 * is to be disabled etc.
1117 */
1118static void vxge_set_multicast(struct net_device *dev)
1119{
22bedad3 1120 struct netdev_hw_addr *ha;
703da5a1
RV		 1121 struct vxgedev *vdev;
1122 int i, mcast_cnt = 0;
7adf7d1b
JM		 1123 struct __vxge_hw_device *hldev;
1124 struct vxge_vpath *vpath;
703da5a1
RV		 1125 enum vxge_hw_status status = VXGE_HW_OK;
1126 struct macInfo mac_info;
1127 int vpath_idx = 0;
1128 struct vxge_mac_addrs *mac_entry;
1129 struct list_head *list_head;
1130 struct list_head *entry, *next;
1131 u8 *mac_address = NULL;
1132
1133 vxge_debug_entryexit(VXGE_TRACE,
1134 "%s:%d", __func__, __LINE__);
1135
5f54cebb 1136 vdev = netdev_priv(dev);
64699336 1137 hldev = vdev->devh;
703da5a1
RV		 1138
1139 if (unlikely(!is_vxge_card_up(vdev)))
1140 return;
1141
1142 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1143 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1144 vpath = &vdev->vpaths[i];
1145 vxge_assert(vpath->is_open);
1146 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1147 if (status != VXGE_HW_OK)
1148 vxge_debug_init(VXGE_ERR, "failed to enable "
1149 "multicast, status %d", status);
703da5a1
RV		 1150 vdev->all_multi_flg = 1;
1151 }
7adf7d1b 1152 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
703da5a1 1153 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1154 vpath = &vdev->vpaths[i];
1155 vxge_assert(vpath->is_open);
1156 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1157 if (status != VXGE_HW_OK)
1158 vxge_debug_init(VXGE_ERR, "failed to disable "
1159 "multicast, status %d", status);
1160 vdev->all_multi_flg = 0;
703da5a1
RV		 1161 }
1162 }
1163
703da5a1
RV		 1164
1165 if (!vdev->config.addr_learn_en) {
7adf7d1b
JM		 1166 for (i = 0; i < vdev->no_of_vpath; i++) {
1167 vpath = &vdev->vpaths[i];
1168 vxge_assert(vpath->is_open);
1169
1170 if (dev->flags & IFF_PROMISC)
703da5a1 1171 status = vxge_hw_vpath_promisc_enable(
7adf7d1b
JM		 1172 vpath->handle);
1173 else
703da5a1 1174 status = vxge_hw_vpath_promisc_disable(
7adf7d1b
JM		 1175 vpath->handle);
1176 if (status != VXGE_HW_OK)
1177 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1178 ", status %d", dev->flags&IFF_PROMISC ?
1179 "enable" : "disable", status);
703da5a1
RV		 1180 }
1181 }
1182
1183 memset(&mac_info, 0, sizeof(struct macInfo));
1184 /* Update individual M_CAST address list */
4cd24eaf 1185 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
703da5a1
RV		 1186 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1187 list_head = &vdev->vpaths[0].mac_addr_list;
4cd24eaf 1188 if ((netdev_mc_count(dev) +
703da5a1
RV		 1189 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1190 vdev->vpaths[0].max_mac_addr_cnt)
1191 goto _set_all_mcast;
1192
1193 /* Delete previous MC's */
1194 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1195 list_for_each_safe(entry, next, list_head) {
2c91308f 1196 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1197 /* Copy the mac address to delete */
1198 mac_address = (u8 *)&mac_entry->macaddr;
1199 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1200
f8d4aa29 1201 if (is_multicast_ether_addr(mac_info.macaddr)) {
703da5a1
RV		 1202 for (vpath_idx = 0; vpath_idx <
1203 vdev->no_of_vpath;
1204 vpath_idx++) {
1205 mac_info.vpath_no = vpath_idx;
1206 status = vxge_del_mac_addr(
1207 vdev,
1208 &mac_info);
1209 }
1210 }
1211 }
1212 }
1213
1214 /* Add new ones */
22bedad3
JP		 1215 netdev_for_each_mc_addr(ha, dev) {
1216 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
703da5a1
RV		 1217 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1218 vpath_idx++) {
1219 mac_info.vpath_no = vpath_idx;
1220 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1221 status = vxge_add_mac_addr(vdev, &mac_info);
1222 if (status != VXGE_HW_OK) {
1223 vxge_debug_init(VXGE_ERR,
1224 "%s:%d Setting individual"
1225 "multicast address failed",
1226 __func__, __LINE__);
1227 goto _set_all_mcast;
1228 }
1229 }
1230 }
1231
1232 return;
1233_set_all_mcast:
1234 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1235 /* Delete previous MC's */
1236 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1237 list_for_each_safe(entry, next, list_head) {
2c91308f 1238 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1239 /* Copy the mac address to delete */
1240 mac_address = (u8 *)&mac_entry->macaddr;
1241 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1242
f8d4aa29 1243 if (is_multicast_ether_addr(mac_info.macaddr))
703da5a1
RV		 1244 break;
1245 }
1246
1247 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1248 vpath_idx++) {
1249 mac_info.vpath_no = vpath_idx;
1250 status = vxge_del_mac_addr(vdev, &mac_info);
1251 }
1252 }
1253
1254 /* Enable all multicast */
1255 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1256 vpath = &vdev->vpaths[i];
1257 vxge_assert(vpath->is_open);
1258
1259 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 1260 if (status != VXGE_HW_OK) {
1261 vxge_debug_init(VXGE_ERR,
1262 "%s:%d Enabling all multicasts failed",
1263 __func__, __LINE__);
1264 }
1265 vdev->all_multi_flg = 1;
1266 }
1267 dev->flags |= IFF_ALLMULTI;
1268 }
1269
1270 vxge_debug_entryexit(VXGE_TRACE,
1271 "%s:%d Exiting...", __func__, __LINE__);
1272}
1273
1274/**
1275 * vxge_set_mac_addr
1276 * @dev: pointer to the device structure
1277 *
1278 * Update entry "0" (default MAC addr)
1279 */
1280static int vxge_set_mac_addr(struct net_device *dev, void *p)
1281{
1282 struct sockaddr *addr = p;
1283 struct vxgedev *vdev;
2c91308f 1284 struct __vxge_hw_device *hldev;
703da5a1
RV		 1285 enum vxge_hw_status status = VXGE_HW_OK;
1286 struct macInfo mac_info_new, mac_info_old;
1287 int vpath_idx = 0;
1288
1289 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1290
5f54cebb 1291 vdev = netdev_priv(dev);
703da5a1
RV		 1292 hldev = vdev->devh;
1293
1294 if (!is_valid_ether_addr(addr->sa_data))
1295 return -EINVAL;
1296
1297 memset(&mac_info_new, 0, sizeof(struct macInfo));
1298 memset(&mac_info_old, 0, sizeof(struct macInfo));
1299
1300 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1301 __func__, __LINE__);
1302
1303 /* Get the old address */
1304 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1305
1306 /* Copy the new address */
1307 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1308
1309 /* First delete the old mac address from all the vpaths
1310 as we can't specify the index while adding new mac address */
1311 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1312 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1313 if (!vpath->is_open) {
1314 /* This can happen when this interface is added/removed
1315 to the bonding interface. Delete this station address
1316 from the linked list */
1317 vxge_mac_list_del(vpath, &mac_info_old);
1318
1319 /* Add this new address to the linked list
1320 for later restoring */
1321 vxge_mac_list_add(vpath, &mac_info_new);
1322
1323 continue;
1324 }
1325 /* Delete the station address */
1326 mac_info_old.vpath_no = vpath_idx;
1327 status = vxge_del_mac_addr(vdev, &mac_info_old);
1328 }
1329
1330 if (unlikely(!is_vxge_card_up(vdev))) {
1331 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1332 return VXGE_HW_OK;
1333 }
1334
1335 /* Set this mac address to all the vpaths */
1336 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1337 mac_info_new.vpath_no = vpath_idx;
1338 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1339 status = vxge_add_mac_addr(vdev, &mac_info_new);
1340 if (status != VXGE_HW_OK)
1341 return -EINVAL;
1342 }
1343
1344 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1345
1346 return status;
1347}
1348
1349/*
1350 * vxge_vpath_intr_enable
1351 * @vdev: pointer to vdev
1352 * @vp_id: vpath for which to enable the interrupts
1353 *
1354 * Enables the interrupts for the vpath
1355*/
42821a5b 1356static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1357{
1358 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
b59c9457
SH		 1359 int msix_id = 0;
1360 int tim_msix_id[4] = {0, 1, 0, 0};
1361 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1362
1363 vxge_hw_vpath_intr_enable(vpath->handle);
1364
1365 if (vdev->config.intr_type == INTA)
1366 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1367 else {
703da5a1
RV		 1368 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1369 alarm_msix_id);
1370
b59c9457 1371 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1372 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1373 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1374
1375 /* enable the alarm vector */
b59c9457
SH		 1376 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1377 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1378 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
703da5a1
RV		 1379 }
1380}
1381
1382/*
1383 * vxge_vpath_intr_disable
1384 * @vdev: pointer to vdev
1385 * @vp_id: vpath for which to disable the interrupts
1386 *
1387 * Disables the interrupts for the vpath
1388*/
42821a5b 1389static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1390{
1391 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
4d2a5b40 1392 struct __vxge_hw_device *hldev;
703da5a1
RV		 1393 int msix_id;
1394
d8ee7071 1395 hldev = pci_get_drvdata(vdev->pdev);
4d2a5b40
JM		 1396
1397 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1398
703da5a1
RV		 1399 vxge_hw_vpath_intr_disable(vpath->handle);
1400
1401 if (vdev->config.intr_type == INTA)
1402 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1403 else {
b59c9457 1404 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1405 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1406 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1407
1408 /* disable the alarm vector */
b59c9457
SH		 1409 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1410 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1411 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1412 }
1413}
1414
528f7272
JM		 1415/* list all mac addresses from DA table */
1416static enum vxge_hw_status
1417vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1418{
1419 enum vxge_hw_status status = VXGE_HW_OK;
1420 unsigned char macmask[ETH_ALEN];
1421 unsigned char macaddr[ETH_ALEN];
1422
1423 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1424 macaddr, macmask);
1425 if (status != VXGE_HW_OK) {
1426 vxge_debug_init(VXGE_ERR,
1427 "DA config list entry failed for vpath:%d",
1428 vpath->device_id);
1429 return status;
1430 }
1431
1432 while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
1433 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1434 macaddr, macmask);
1435 if (status != VXGE_HW_OK)
1436 break;
1437 }
1438
1439 return status;
1440}
1441
1442/* Store all mac addresses from the list to the DA table */
1443static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1444{
1445 enum vxge_hw_status status = VXGE_HW_OK;
1446 struct macInfo mac_info;
1447 u8 *mac_address = NULL;
1448 struct list_head *entry, *next;
1449
1450 memset(&mac_info, 0, sizeof(struct macInfo));
1451
1452 if (vpath->is_open) {
1453 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1454 mac_address =
1455 (u8 *)&
1456 ((struct vxge_mac_addrs *)entry)->macaddr;
1457 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1458 ((struct vxge_mac_addrs *)entry)->state =
1459 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1460 /* does this mac address already exist in da table? */
1461 status = vxge_search_mac_addr_in_da_table(vpath,
1462 &mac_info);
1463 if (status != VXGE_HW_OK) {
1464 /* Add this mac address to the DA table */
1465 status = vxge_hw_vpath_mac_addr_add(
1466 vpath->handle, mac_info.macaddr,
1467 mac_info.macmask,
1468 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1469 if (status != VXGE_HW_OK) {
1470 vxge_debug_init(VXGE_ERR,
1471 "DA add entry failed for vpath:%d",
1472 vpath->device_id);
1473 ((struct vxge_mac_addrs *)entry)->state
1474 = VXGE_LL_MAC_ADDR_IN_LIST;
1475 }
1476 }
1477 }
1478 }
1479
1480 return status;
1481}
1482
1483/* Store all vlan ids from the list to the vid table */
1484static enum vxge_hw_status
1485vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1486{
1487 enum vxge_hw_status status = VXGE_HW_OK;
1488 struct vxgedev *vdev = vpath->vdev;
1489 u16 vid;
1490
53515734
JP		 1491 if (!vpath->is_open)
1492 return status;
528f7272 1493
53515734
JP		 1494 for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
1495 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
528f7272
JM		 1496
1497 return status;
1498}
1499
703da5a1
RV		 1500/*
1501 * vxge_reset_vpath
1502 * @vdev: pointer to vdev
1503 * @vp_id: vpath to reset
1504 *
1505 * Resets the vpath
1506*/
1507static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1508{
1509 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b 1510 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
703da5a1
RV		 1511 int ret = 0;
1512
1513 /* check if device is down already */
1514 if (unlikely(!is_vxge_card_up(vdev)))
1515 return 0;
1516
1517 /* is device reset already scheduled */
1518 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1519 return 0;
1520
7adf7d1b
JM		 1521 if (vpath->handle) {
1522 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1 1523 if (is_vxge_card_up(vdev) &&
7adf7d1b 1524 vxge_hw_vpath_recover_from_reset(vpath->handle)
703da5a1
RV		 1525 != VXGE_HW_OK) {
1526 vxge_debug_init(VXGE_ERR,
1527 "vxge_hw_vpath_recover_from_reset"
1528 "failed for vpath:%d", vp_id);
1529 return status;
1530 }
1531 } else {
1532 vxge_debug_init(VXGE_ERR,
1533 "vxge_hw_vpath_reset failed for"
1534 "vpath:%d", vp_id);
1535 return status;
1536 }
1537 } else
1538 return VXGE_HW_FAIL;
1539
7adf7d1b
JM		 1540 vxge_restore_vpath_mac_addr(vpath);
1541 vxge_restore_vpath_vid_table(vpath);
703da5a1
RV		 1542
1543 /* Enable all broadcast */
7adf7d1b
JM		 1544 vxge_hw_vpath_bcast_enable(vpath->handle);
1545
1546 /* Enable all multicast */
1547 if (vdev->all_multi_flg) {
1548 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1549 if (status != VXGE_HW_OK)
1550 vxge_debug_init(VXGE_ERR,
1551 "%s:%d Enabling multicast failed",
1552 __func__, __LINE__);
1553 }
703da5a1
RV		 1554
1555 /* Enable the interrupts */
1556 vxge_vpath_intr_enable(vdev, vp_id);
1557
1558 smp_wmb();
1559
1560 /* Enable the flow of traffic through the vpath */
7adf7d1b 1561 vxge_hw_vpath_enable(vpath->handle);
703da5a1
RV		 1562
1563 smp_wmb();
7adf7d1b
JM		 1564 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1565 vpath->ring.last_status = VXGE_HW_OK;
703da5a1
RV		 1566
1567 /* Vpath reset done */
1568 clear_bit(vp_id, &vdev->vp_reset);
1569
1570 /* Start the vpath queue */
98f45da2
JM		 1571 if (netif_tx_queue_stopped(vpath->fifo.txq))
1572 netif_tx_wake_queue(vpath->fifo.txq);
703da5a1
RV		 1573
1574 return ret;
1575}
1576
16fded7d
JM		 1577/* Configure CI */
1578static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1579{
1580 int i = 0;
1581
1582 /* Enable CI for RTI */
1583 if (vdev->config.intr_type == MSI_X) {
1584 for (i = 0; i < vdev->no_of_vpath; i++) {
1585 struct __vxge_hw_ring *hw_ring;
1586
1587 hw_ring = vdev->vpaths[i].ring.handle;
1588 vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1589 }
1590 }
1591
1592 /* Enable CI for TTI */
1593 for (i = 0; i < vdev->no_of_vpath; i++) {
1594 struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1595 vxge_hw_vpath_tti_ci_set(hw_fifo);
1596 /*
1597 * For Inta (with or without napi), Set CI ON for only one
1598 * vpath. (Have only one free running timer).
1599 */
1600 if ((vdev->config.intr_type == INTA) && (i == 0))
1601 break;
1602 }
1603
1604 return;
1605}
1606
703da5a1
RV		 1607static int do_vxge_reset(struct vxgedev *vdev, int event)
1608{
1609 enum vxge_hw_status status;
1610 int ret = 0, vp_id, i;
1611
1612 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1613
1614 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1615 /* check if device is down already */
1616 if (unlikely(!is_vxge_card_up(vdev)))
1617 return 0;
1618
1619 /* is reset already scheduled */
1620 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1621 return 0;
1622 }
1623
1624 if (event == VXGE_LL_FULL_RESET) {
2e41f644
JM		 1625 netif_carrier_off(vdev->ndev);
1626
703da5a1
RV		 1627 /* wait for all the vpath reset to complete */
1628 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1629 while (test_bit(vp_id, &vdev->vp_reset))
1630 msleep(50);
1631 }
1632
2e41f644
JM		 1633 netif_carrier_on(vdev->ndev);
1634
703da5a1
RV		 1635 /* if execution mode is set to debug, don't reset the adapter */
1636 if (unlikely(vdev->exec_mode)) {
1637 vxge_debug_init(VXGE_ERR,
1638 "%s: execution mode is debug, returning..",
1639 vdev->ndev->name);
7adf7d1b
JM		 1640 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1641 netif_tx_stop_all_queues(vdev->ndev);
1642 return 0;
703da5a1
RV		 1643 }
1644 }
1645
1646 if (event == VXGE_LL_FULL_RESET) {
4d2a5b40 1647 vxge_hw_device_wait_receive_idle(vdev->devh);
703da5a1
RV		 1648 vxge_hw_device_intr_disable(vdev->devh);
1649
1650 switch (vdev->cric_err_event) {
1651 case VXGE_HW_EVENT_UNKNOWN:
d03848e0 1652 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1653 vxge_debug_init(VXGE_ERR,
1654 "fatal: %s: Disabling device due to"
1655 "unknown error",
1656 vdev->ndev->name);
1657 ret = -EPERM;
1658 goto out;
1659 case VXGE_HW_EVENT_RESET_START:
1660 break;
1661 case VXGE_HW_EVENT_RESET_COMPLETE:
1662 case VXGE_HW_EVENT_LINK_DOWN:
1663 case VXGE_HW_EVENT_LINK_UP:
1664 case VXGE_HW_EVENT_ALARM_CLEARED:
1665 case VXGE_HW_EVENT_ECCERR:
1666 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1667 ret = -EPERM;
1668 goto out;
1669 case VXGE_HW_EVENT_FIFO_ERR:
1670 case VXGE_HW_EVENT_VPATH_ERR:
1671 break;
1672 case VXGE_HW_EVENT_CRITICAL_ERR:
d03848e0 1673 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1674 vxge_debug_init(VXGE_ERR,
1675 "fatal: %s: Disabling device due to"
1676 "serious error",
1677 vdev->ndev->name);
1678 /* SOP or device reset required */
1679 /* This event is not currently used */
1680 ret = -EPERM;
1681 goto out;
1682 case VXGE_HW_EVENT_SERR:
d03848e0 1683 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1684 vxge_debug_init(VXGE_ERR,
1685 "fatal: %s: Disabling device due to"
1686 "serious error",
1687 vdev->ndev->name);
1688 ret = -EPERM;
1689 goto out;
1690 case VXGE_HW_EVENT_SRPCIM_SERR:
1691 case VXGE_HW_EVENT_MRPCIM_SERR:
1692 ret = -EPERM;
1693 goto out;
1694 case VXGE_HW_EVENT_SLOT_FREEZE:
d03848e0 1695 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1696 vxge_debug_init(VXGE_ERR,
1697 "fatal: %s: Disabling device due to"
1698 "slot freeze",
1699 vdev->ndev->name);
1700 ret = -EPERM;
1701 goto out;
1702 default:
1703 break;
1704
1705 }
1706 }
1707
1708 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
d03848e0 1709 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1710
1711 if (event == VXGE_LL_FULL_RESET) {
1712 status = vxge_reset_all_vpaths(vdev);
1713 if (status != VXGE_HW_OK) {
1714 vxge_debug_init(VXGE_ERR,
1715 "fatal: %s: can not reset vpaths",
1716 vdev->ndev->name);
1717 ret = -EPERM;
1718 goto out;
1719 }
1720 }
1721
1722 if (event == VXGE_LL_COMPL_RESET) {
1723 for (i = 0; i < vdev->no_of_vpath; i++)
1724 if (vdev->vpaths[i].handle) {
1725 if (vxge_hw_vpath_recover_from_reset(
1726 vdev->vpaths[i].handle)
1727 != VXGE_HW_OK) {
1728 vxge_debug_init(VXGE_ERR,
1729 "vxge_hw_vpath_recover_"
1730 "from_reset failed for vpath: "
1731 "%d", i);
1732 ret = -EPERM;
1733 goto out;
1734 }
1735 } else {
1736 vxge_debug_init(VXGE_ERR,
1737 "vxge_hw_vpath_reset failed for "
1738 "vpath:%d", i);
1739 ret = -EPERM;
1740 goto out;
1741 }
1742 }
1743
1744 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1745 /* Reprogram the DA table with populated mac addresses */
1746 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1747 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1748 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1749 }
1750
1751 /* enable vpath interrupts */
1752 for (i = 0; i < vdev->no_of_vpath; i++)
1753 vxge_vpath_intr_enable(vdev, i);
1754
1755 vxge_hw_device_intr_enable(vdev->devh);
1756
1757 smp_wmb();
1758
1759 /* Indicate card up */
1760 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1761
1762 /* Get the traffic to flow through the vpaths */
1763 for (i = 0; i < vdev->no_of_vpath; i++) {
1764 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1765 smp_wmb();
1766 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1767 }
1768
d03848e0 1769 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 1770 }
1771
16fded7d
JM		 1772 /* configure CI */
1773 vxge_config_ci_for_tti_rti(vdev);
1774
703da5a1
RV		 1775out:
1776 vxge_debug_entryexit(VXGE_TRACE,
1777 "%s:%d Exiting...", __func__, __LINE__);
1778
1779 /* Indicate reset done */
1780 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1781 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1782 return ret;
1783}
1784
1785/*
1786 * vxge_reset
1787 * @vdev: pointer to ll device
1788 *
1789 * driver may reset the chip on events of serr, eccerr, etc
1790 */
2e41f644 1791static void vxge_reset(struct work_struct *work)
703da5a1 1792{
2e41f644
JM		 1793 struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1794
1795 if (!netif_running(vdev->ndev))
1796 return;
1797
1798 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 1799}
1800
1801/**
1802 * vxge_poll - Receive handler when Receive Polling is used.
1803 * @dev: pointer to the device structure.
1804 * @budget: Number of packets budgeted to be processed in this iteration.
1805 *
1806 * This function comes into picture only if Receive side is being handled
1807 * through polling (called NAPI in linux). It mostly does what the normal
1808 * Rx interrupt handler does in terms of descriptor and packet processing
1809 * but not in an interrupt context. Also it will process a specified number
1810 * of packets at most in one iteration. This value is passed down by the
1811 * kernel as the function argument 'budget'.
1812 */
1813static int vxge_poll_msix(struct napi_struct *napi, int budget)
1814{
16fded7d
JM		 1815 struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1816 int pkts_processed;
703da5a1 1817 int budget_org = budget;
703da5a1 1818
16fded7d
JM		 1819 ring->budget = budget;
1820 ring->pkts_processed = 0;
703da5a1 1821 vxge_hw_vpath_poll_rx(ring->handle);
16fded7d 1822 pkts_processed = ring->pkts_processed;
703da5a1
RV		 1823
1824 if (ring->pkts_processed < budget_org) {
1825 napi_complete(napi);
16fded7d 1826
703da5a1
RV		 1827 /* Re enable the Rx interrupts for the vpath */
1828 vxge_hw_channel_msix_unmask(
1829 (struct __vxge_hw_channel *)ring->handle,
1830 ring->rx_vector_no);
16fded7d 1831 mmiowb();
703da5a1
RV		 1832 }
1833
16fded7d
JM		 1834 /* We are copying and returning the local variable, in case if after
1835 * clearing the msix interrupt above, if the interrupt fires right
1836 * away which can preempt this NAPI thread */
1837 return pkts_processed;
703da5a1
RV		 1838}
1839
1840static int vxge_poll_inta(struct napi_struct *napi, int budget)
1841{
1842 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1843 int pkts_processed = 0;
1844 int i;
1845 int budget_org = budget;
1846 struct vxge_ring *ring;
1847
d8ee7071 1848 struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1849
1850 for (i = 0; i < vdev->no_of_vpath; i++) {
1851 ring = &vdev->vpaths[i].ring;
1852 ring->budget = budget;
16fded7d 1853 ring->pkts_processed = 0;
703da5a1
RV		 1854 vxge_hw_vpath_poll_rx(ring->handle);
1855 pkts_processed += ring->pkts_processed;
1856 budget -= ring->pkts_processed;
1857 if (budget <= 0)
1858 break;
1859 }
1860
1861 VXGE_COMPLETE_ALL_TX(vdev);
1862
1863 if (pkts_processed < budget_org) {
1864 napi_complete(napi);
1865 /* Re enable the Rx interrupts for the ring */
1866 vxge_hw_device_unmask_all(hldev);
1867 vxge_hw_device_flush_io(hldev);
1868 }
1869
1870 return pkts_processed;
1871}
1872
1873#ifdef CONFIG_NET_POLL_CONTROLLER
1874/**
1875 * vxge_netpoll - netpoll event handler entry point
1876 * @dev : pointer to the device structure.
1877 * Description:
1878 * This function will be called by upper layer to check for events on the
1879 * interface in situations where interrupts are disabled. It is used for
1880 * specific in-kernel networking tasks, such as remote consoles and kernel
1881 * debugging over the network (example netdump in RedHat).
1882 */
1883static void vxge_netpoll(struct net_device *dev)
1884{
32e819e4
FR		 1885 struct vxgedev *vdev = netdev_priv(dev);
1886 struct pci_dev *pdev = vdev->pdev;
1887 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
1888 const int irq = pdev->irq;
703da5a1
RV		 1889
1890 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1891
32e819e4 1892 if (pci_channel_offline(pdev))
703da5a1
RV		 1893 return;
1894
32e819e4 1895 disable_irq(irq);
703da5a1
RV		 1896 vxge_hw_device_clear_tx_rx(hldev);
1897
1898 vxge_hw_device_clear_tx_rx(hldev);
1899 VXGE_COMPLETE_ALL_RX(vdev);
1900 VXGE_COMPLETE_ALL_TX(vdev);
1901
32e819e4 1902 enable_irq(irq);
703da5a1
RV		 1903
1904 vxge_debug_entryexit(VXGE_TRACE,
1905 "%s:%d Exiting...", __func__, __LINE__);
703da5a1
RV		 1906}
1907#endif
1908
1909/* RTH configuration */
1910static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1911{
1912 enum vxge_hw_status status = VXGE_HW_OK;
1913 struct vxge_hw_rth_hash_types hash_types;
1914 u8 itable[256] = {0}; /* indirection table */
1915 u8 mtable[256] = {0}; /* CPU to vpath mapping */
1916 int index;
1917
1918 /*
1919 * Filling
1920 * - itable with bucket numbers
1921 * - mtable with bucket-to-vpath mapping
1922 */
1923 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1924 itable[index] = index;
1925 mtable[index] = index % vdev->no_of_vpath;
1926 }
1927
703da5a1
RV		 1928 /* set indirection table, bucket-to-vpath mapping */
1929 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1930 vdev->no_of_vpath,
1931 mtable, itable,
1932 vdev->config.rth_bkt_sz);
1933 if (status != VXGE_HW_OK) {
1934 vxge_debug_init(VXGE_ERR,
1935 "RTH indirection table configuration failed "
1936 "for vpath:%d", vdev->vpaths[0].device_id);
1937 return status;
1938 }
1939
47f01db4
JM		 1940 /* Fill RTH hash types */
1941 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1942 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1943 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1944 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1945 hash_types.hash_type_tcpipv6ex_en =
1946 vdev->config.rth_hash_type_tcpipv6ex;
1947 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1948
703da5a1 1949 /*
47f01db4
JM		 1950 * Because the itable_set() method uses the active_table field
1951 * for the target virtual path the RTH config should be updated
1952 * for all VPATHs. The h/w only uses the lowest numbered VPATH
1953 * when steering frames.
1954 */
703da5a1
RV		 1955 for (index = 0; index < vdev->no_of_vpath; index++) {
1956 status = vxge_hw_vpath_rts_rth_set(
1957 vdev->vpaths[index].handle,
1958 vdev->config.rth_algorithm,
1959 &hash_types,
1960 vdev->config.rth_bkt_sz);
703da5a1
RV		 1961 if (status != VXGE_HW_OK) {
1962 vxge_debug_init(VXGE_ERR,
1963 "RTH configuration failed for vpath:%d",
1964 vdev->vpaths[index].device_id);
1965 return status;
1966 }
1967 }
1968
1969 return status;
1970}
1971
703da5a1 1972/* reset vpaths */
4d2a5b40 1973enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
703da5a1 1974{
703da5a1 1975 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 1976 struct vxge_vpath *vpath;
1977 int i;
703da5a1 1978
7adf7d1b
JM		 1979 for (i = 0; i < vdev->no_of_vpath; i++) {
1980 vpath = &vdev->vpaths[i];
1981 if (vpath->handle) {
1982 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1
RV		 1983 if (is_vxge_card_up(vdev) &&
1984 vxge_hw_vpath_recover_from_reset(
7adf7d1b 1985 vpath->handle) != VXGE_HW_OK) {
703da5a1
RV		 1986 vxge_debug_init(VXGE_ERR,
1987 "vxge_hw_vpath_recover_"
1988 "from_reset failed for vpath: "
1989 "%d", i);
1990 return status;
1991 }
1992 } else {
1993 vxge_debug_init(VXGE_ERR,
1994 "vxge_hw_vpath_reset failed for "
1995 "vpath:%d", i);
1996 return status;
1997 }
1998 }
7adf7d1b
JM		 1999 }
2000
703da5a1
RV		 2001 return status;
2002}
2003
2004/* close vpaths */
42821a5b 2005static void vxge_close_vpaths(struct vxgedev *vdev, int index)
703da5a1 2006{
7adf7d1b 2007 struct vxge_vpath *vpath;
703da5a1 2008 int i;
7adf7d1b 2009
703da5a1 2010 for (i = index; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2011 vpath = &vdev->vpaths[i];
2012
2013 if (vpath->handle && vpath->is_open) {
2014 vxge_hw_vpath_close(vpath->handle);
703da5a1
RV		 2015 vdev->stats.vpaths_open--;
2016 }
7adf7d1b
JM		 2017 vpath->is_open = 0;
2018 vpath->handle = NULL;
703da5a1
RV		 2019 }
2020}
2021
2022/* open vpaths */
42821a5b 2023static int vxge_open_vpaths(struct vxgedev *vdev)
703da5a1 2024{
7adf7d1b 2025 struct vxge_hw_vpath_attr attr;
703da5a1 2026 enum vxge_hw_status status;
7adf7d1b 2027 struct vxge_vpath *vpath;
703da5a1 2028 u32 vp_id = 0;
7adf7d1b 2029 int i;
703da5a1
RV		 2030
2031 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2032 vpath = &vdev->vpaths[i];
7adf7d1b 2033 vxge_assert(vpath->is_configured);
e7935c96
JM		 2034
2035 if (!vdev->titan1) {
2036 struct vxge_hw_vp_config *vcfg;
2037 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2038
2039 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2040 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2041 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2042 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2043 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2044 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2045 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2046 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2047 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2048 }
2049
7adf7d1b 2050 attr.vp_id = vpath->device_id;
703da5a1
RV		 2051 attr.fifo_attr.callback = vxge_xmit_compl;
2052 attr.fifo_attr.txdl_term = vxge_tx_term;
2053 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
7adf7d1b 2054 attr.fifo_attr.userdata = &vpath->fifo;
703da5a1
RV		 2055
2056 attr.ring_attr.callback = vxge_rx_1b_compl;
2057 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2058 attr.ring_attr.rxd_term = vxge_rx_term;
2059 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
7adf7d1b 2060 attr.ring_attr.userdata = &vpath->ring;
703da5a1 2061
7adf7d1b
JM		 2062 vpath->ring.ndev = vdev->ndev;
2063 vpath->ring.pdev = vdev->pdev;
528f7272 2064
7adf7d1b 2065 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
703da5a1 2066 if (status == VXGE_HW_OK) {
7adf7d1b 2067 vpath->fifo.handle =
703da5a1 2068 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
7adf7d1b 2069 vpath->ring.handle =
703da5a1 2070 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
7adf7d1b 2071 vpath->fifo.tx_steering_type =
703da5a1 2072 vdev->config.tx_steering_type;
7adf7d1b
JM		 2073 vpath->fifo.ndev = vdev->ndev;
2074 vpath->fifo.pdev = vdev->pdev;
827da44c
JS		 2075
2076 u64_stats_init(&vpath->fifo.stats.syncp);
2077 u64_stats_init(&vpath->ring.stats.syncp);
2078
98f45da2
JM		 2079 if (vdev->config.tx_steering_type)
2080 vpath->fifo.txq =
2081 netdev_get_tx_queue(vdev->ndev, i);
2082 else
2083 vpath->fifo.txq =
2084 netdev_get_tx_queue(vdev->ndev, 0);
7adf7d1b 2085 vpath->fifo.indicate_max_pkts =
703da5a1 2086 vdev->config.fifo_indicate_max_pkts;
16fded7d 2087 vpath->fifo.tx_vector_no = 0;
7adf7d1b 2088 vpath->ring.rx_vector_no = 0;
b81b3733 2089 vpath->ring.rx_hwts = vdev->rx_hwts;
7adf7d1b
JM		 2090 vpath->is_open = 1;
2091 vdev->vp_handles[i] = vpath->handle;
7adf7d1b 2092 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
703da5a1
RV		 2093 vdev->stats.vpaths_open++;
2094 } else {
2095 vdev->stats.vpath_open_fail++;
528f7272
JM		 2096 vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2097 "open with status: %d",
2098 vdev->ndev->name, vpath->device_id,
2099 status);
703da5a1
RV		 2100 vxge_close_vpaths(vdev, 0);
2101 return -EPERM;
2102 }
2103
7adf7d1b 2104 vp_id = vpath->handle->vpath->vp_id;
703da5a1
RV		 2105 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2106 }
528f7272 2107
703da5a1
RV		 2108 return VXGE_HW_OK;
2109}
2110
16fded7d
JM		 2111/**
2112 * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
2113 * if the interrupts are not within a range
2114 * @fifo: pointer to transmit fifo structure
2115 * Description: The function changes boundary timer and restriction timer
2116 * value depends on the traffic
2117 * Return Value: None
2118 */
2119static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2120{
2121 fifo->interrupt_count++;
2122 if (jiffies > fifo->jiffies + HZ / 100) {
2123 struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2124
2125 fifo->jiffies = jiffies;
2126 if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2127 hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2128 hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2129 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2130 } else if (hw_fifo->rtimer != 0) {
2131 hw_fifo->rtimer = 0;
2132 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2133 }
2134 fifo->interrupt_count = 0;
2135 }
2136}
2137
2138/**
2139 * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
2140 * if the interrupts are not within a range
2141 * @ring: pointer to receive ring structure
2142 * Description: The function increases of decreases the packet counts within
2143 * the ranges of traffic utilization, if the interrupts due to this ring are
2144 * not within a fixed range.
2145 * Return Value: Nothing
2146 */
2147static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2148{
2149 ring->interrupt_count++;
2150 if (jiffies > ring->jiffies + HZ / 100) {
2151 struct __vxge_hw_ring *hw_ring = ring->handle;
2152
2153 ring->jiffies = jiffies;
2154 if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2155 hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2156 hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2157 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2158 } else if (hw_ring->rtimer != 0) {
2159 hw_ring->rtimer = 0;
2160 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2161 }
2162 ring->interrupt_count = 0;
2163 }
2164}
2165
703da5a1
RV		 2166/*
2167 * vxge_isr_napi
2168 * @irq: the irq of the device.
2169 * @dev_id: a void pointer to the hldev structure of the Titan device
2170 * @ptregs: pointer to the registers pushed on the stack.
2171 *
2172 * This function is the ISR handler of the device when napi is enabled. It
2173 * identifies the reason for the interrupt and calls the relevant service
2174 * routines.
2175 */
2176static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2177{
703da5a1 2178 struct net_device *dev;
a5d165b5 2179 struct __vxge_hw_device *hldev;
703da5a1
RV		 2180 u64 reason;
2181 enum vxge_hw_status status;
2c91308f 2182 struct vxgedev *vdev = (struct vxgedev *)dev_id;
703da5a1
RV		 2183
2184 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2185
a5d165b5 2186 dev = vdev->ndev;
d8ee7071 2187 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2188
2189 if (pci_channel_offline(vdev->pdev))
2190 return IRQ_NONE;
2191
2192 if (unlikely(!is_vxge_card_up(vdev)))
4d2a5b40 2193 return IRQ_HANDLED;
703da5a1 2194
528f7272 2195 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
703da5a1
RV		 2196 if (status == VXGE_HW_OK) {
2197 vxge_hw_device_mask_all(hldev);
2198
2199 if (reason &
2200 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2201 vdev->vpaths_deployed >>
2202 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2203
2204 vxge_hw_device_clear_tx_rx(hldev);
2205 napi_schedule(&vdev->napi);
2206 vxge_debug_intr(VXGE_TRACE,
2207 "%s:%d Exiting...", __func__, __LINE__);
2208 return IRQ_HANDLED;
2209 } else
2210 vxge_hw_device_unmask_all(hldev);
2211 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2212 (status == VXGE_HW_ERR_CRITICAL) ||
2213 (status == VXGE_HW_ERR_FIFO))) {
2214 vxge_hw_device_mask_all(hldev);
2215 vxge_hw_device_flush_io(hldev);
2216 return IRQ_HANDLED;
2217 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2218 return IRQ_HANDLED;
2219
2220 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2221 return IRQ_NONE;
2222}
2223
2224#ifdef CONFIG_PCI_MSI
2225
16fded7d 2226static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
703da5a1
RV		 2227{
2228 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2229
16fded7d
JM		 2230 adaptive_coalesce_tx_interrupts(fifo);
2231
2232 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2233 fifo->tx_vector_no);
2234
2235 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2236 fifo->tx_vector_no);
2237
703da5a1
RV		 2238 VXGE_COMPLETE_VPATH_TX(fifo);
2239
16fded7d
JM		 2240 vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2241 fifo->tx_vector_no);
2242
2243 mmiowb();
2244
703da5a1
RV		 2245 return IRQ_HANDLED;
2246}
2247
16fded7d 2248static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
703da5a1
RV		 2249{
2250 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2251
16fded7d
JM		 2252 adaptive_coalesce_rx_interrupts(ring);
2253
703da5a1 2254 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
16fded7d
JM		 2255 ring->rx_vector_no);
2256
2257 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2258 ring->rx_vector_no);
703da5a1
RV		 2259
2260 napi_schedule(&ring->napi);
2261 return IRQ_HANDLED;
2262}
2263
2264static irqreturn_t
2265vxge_alarm_msix_handle(int irq, void *dev_id)
2266{
2267 int i;
2268 enum vxge_hw_status status;
2269 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2270 struct vxgedev *vdev = vpath->vdev;
b59c9457
SH		 2271 int msix_id = (vpath->handle->vpath->vp_id *
2272 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2273
2274 for (i = 0; i < vdev->no_of_vpath; i++) {
25985edc 2275 /* Reduce the chance of losing alarm interrupts by masking
16fded7d
JM		 2276 * the vector. A pending bit will be set if an alarm is
2277 * generated and on unmask the interrupt will be fired.
2278 */
b59c9457 2279 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
16fded7d
JM		 2280 vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2281 mmiowb();
703da5a1
RV		 2282
2283 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2284 vdev->exec_mode);
2285 if (status == VXGE_HW_OK) {
703da5a1 2286 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
16fded7d
JM		 2287 msix_id);
2288 mmiowb();
703da5a1
RV		 2289 continue;
2290 }
2291 vxge_debug_intr(VXGE_ERR,
2292 "%s: vxge_hw_vpath_alarm_process failed %x ",
2293 VXGE_DRIVER_NAME, status);
2294 }
2295 return IRQ_HANDLED;
2296}
2297
2298static int vxge_alloc_msix(struct vxgedev *vdev)
2299{
2300 int j, i, ret = 0;
b59c9457 2301 int msix_intr_vect = 0, temp;
703da5a1
RV		 2302 vdev->intr_cnt = 0;
2303
b59c9457 2304start:
703da5a1
RV		 2305 /* Tx/Rx MSIX Vectors count */
2306 vdev->intr_cnt = vdev->no_of_vpath * 2;
2307
2308 /* Alarm MSIX Vectors count */
2309 vdev->intr_cnt++;
2310
baeb2ffa
JP		 2311 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2312 GFP_KERNEL);
703da5a1
RV		 2313 if (!vdev->entries) {
2314 vxge_debug_init(VXGE_ERR,
2315 "%s: memory allocation failed",
2316 VXGE_DRIVER_NAME);
cc413d90
MS		 2317 ret = -ENOMEM;
2318 goto alloc_entries_failed;
703da5a1
RV		 2319 }
2320
baeb2ffa
JP		 2321 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2322 sizeof(struct vxge_msix_entry),
2323 GFP_KERNEL);
703da5a1
RV		 2324 if (!vdev->vxge_entries) {
2325 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2326 VXGE_DRIVER_NAME);
cc413d90
MS		 2327 ret = -ENOMEM;
2328 goto alloc_vxge_entries_failed;
703da5a1
RV		 2329 }
2330
b59c9457 2331 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
703da5a1
RV		 2332
2333 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2334
2335 /* Initialize the fifo vector */
2336 vdev->entries[j].entry = msix_intr_vect;
2337 vdev->vxge_entries[j].entry = msix_intr_vect;
2338 vdev->vxge_entries[j].in_use = 0;
2339 j++;
2340
2341 /* Initialize the ring vector */
2342 vdev->entries[j].entry = msix_intr_vect + 1;
2343 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2344 vdev->vxge_entries[j].in_use = 0;
2345 j++;
2346 }
2347
2348 /* Initialize the alarm vector */
b59c9457
SH		 2349 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2350 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2351 vdev->vxge_entries[j].in_use = 0;
2352
b59c9457 2353 ret = pci_enable_msix(vdev->pdev, vdev->entries, vdev->intr_cnt);
b59c9457 2354 if (ret > 0) {
703da5a1
RV		 2355 vxge_debug_init(VXGE_ERR,
2356 "%s: MSI-X enable failed for %d vectors, ret: %d",
b59c9457 2357 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
cc413d90
MS		 2358 if ((max_config_vpath != VXGE_USE_DEFAULT) || (ret < 3)) {
2359 ret = -ENODEV;
2360 goto enable_msix_failed;
2361 }
2362
703da5a1
RV		 2363 kfree(vdev->entries);
2364 kfree(vdev->vxge_entries);
2365 vdev->entries = NULL;
2366 vdev->vxge_entries = NULL;
b59c9457
SH		 2367 /* Try with less no of vector by reducing no of vpaths count */
2368 temp = (ret - 1)/2;
2369 vxge_close_vpaths(vdev, temp);
2370 vdev->no_of_vpath = temp;
2371 goto start;
cc413d90
MS		 2372 } else if (ret < 0) {
2373 ret = -ENODEV;
2374 goto enable_msix_failed;
2375 }
703da5a1 2376 return 0;
cc413d90
MS		 2377
2378enable_msix_failed:
2379 kfree(vdev->vxge_entries);
2380alloc_vxge_entries_failed:
2381 kfree(vdev->entries);
2382alloc_entries_failed:
2383 return ret;
703da5a1
RV		 2384}
2385
2386static int vxge_enable_msix(struct vxgedev *vdev)
2387{
2388
2389 int i, ret = 0;
703da5a1 2390 /* 0 - Tx, 1 - Rx */
b59c9457
SH		 2391 int tim_msix_id[4] = {0, 1, 0, 0};
2392
703da5a1
RV		 2393 vdev->intr_cnt = 0;
2394
2395 /* allocate msix vectors */
2396 ret = vxge_alloc_msix(vdev);
2397 if (!ret) {
703da5a1 2398 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2399 struct vxge_vpath *vpath = &vdev->vpaths[i];
703da5a1 2400
7adf7d1b
JM		 2401 /* If fifo or ring are not enabled, the MSIX vector for
2402 * it should be set to 0.
2403 */
2404 vpath->ring.rx_vector_no = (vpath->device_id *
2405 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
703da5a1 2406
16fded7d
JM		 2407 vpath->fifo.tx_vector_no = (vpath->device_id *
2408 VXGE_HW_VPATH_MSIX_ACTIVE);
2409
7adf7d1b
JM		 2410 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2411 VXGE_ALARM_MSIX_ID);
703da5a1
RV		 2412 }
2413 }
2414
2415 return ret;
2416}
2417
2418static void vxge_rem_msix_isr(struct vxgedev *vdev)
2419{
2420 int intr_cnt;
2421
b59c9457 2422 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
703da5a1
RV		 2423 intr_cnt++) {
2424 if (vdev->vxge_entries[intr_cnt].in_use) {
2425 synchronize_irq(vdev->entries[intr_cnt].vector);
2426 free_irq(vdev->entries[intr_cnt].vector,
2427 vdev->vxge_entries[intr_cnt].arg);
2428 vdev->vxge_entries[intr_cnt].in_use = 0;
2429 }
2430 }
2431
2432 kfree(vdev->entries);
2433 kfree(vdev->vxge_entries);
2434 vdev->entries = NULL;
2435 vdev->vxge_entries = NULL;
2436
2437 if (vdev->config.intr_type == MSI_X)
2438 pci_disable_msix(vdev->pdev);
2439}
2440#endif
2441
2442static void vxge_rem_isr(struct vxgedev *vdev)
2443{
2c91308f 2444 struct __vxge_hw_device *hldev;
d8ee7071 2445 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2446
2447#ifdef CONFIG_PCI_MSI
2448 if (vdev->config.intr_type == MSI_X) {
2449 vxge_rem_msix_isr(vdev);
2450 } else
2451#endif
2452 if (vdev->config.intr_type == INTA) {
2453 synchronize_irq(vdev->pdev->irq);
a5d165b5 2454 free_irq(vdev->pdev->irq, vdev);
703da5a1
RV		 2455 }
2456}
2457
2458static int vxge_add_isr(struct vxgedev *vdev)
2459{
2460 int ret = 0;
703da5a1
RV		 2461#ifdef CONFIG_PCI_MSI
2462 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
703da5a1
RV		 2463 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2464
2465 if (vdev->config.intr_type == MSI_X)
2466 ret = vxge_enable_msix(vdev);
2467
2468 if (ret) {
2469 vxge_debug_init(VXGE_ERR,
2470 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
eb5f10c2
SH		 2471 vxge_debug_init(VXGE_ERR,
2472 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2473 vdev->config.intr_type = INTA;
703da5a1
RV		 2474 }
2475
2476 if (vdev->config.intr_type == MSI_X) {
2477 for (intr_idx = 0;
2478 intr_idx < (vdev->no_of_vpath *
2479 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2480
2481 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2482 irq_req = 0;
2483
2484 switch (msix_idx) {
2485 case 0:
2486 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2487 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2488 vdev->ndev->name,
2489 vdev->entries[intr_cnt].entry,
2490 pci_fun, vp_idx);
703da5a1
RV		 2491 ret = request_irq(
2492 vdev->entries[intr_cnt].vector,
2493 vxge_tx_msix_handle, 0,
2494 vdev->desc[intr_cnt],
2495 &vdev->vpaths[vp_idx].fifo);
2496 vdev->vxge_entries[intr_cnt].arg =
2497 &vdev->vpaths[vp_idx].fifo;
2498 irq_req = 1;
2499 break;
2500 case 1:
2501 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2502 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2503 vdev->ndev->name,
2504 vdev->entries[intr_cnt].entry,
2505 pci_fun, vp_idx);
703da5a1
RV		 2506 ret = request_irq(
2507 vdev->entries[intr_cnt].vector,
2508 vxge_rx_msix_napi_handle,
2509 0,
2510 vdev->desc[intr_cnt],
2511 &vdev->vpaths[vp_idx].ring);
2512 vdev->vxge_entries[intr_cnt].arg =
2513 &vdev->vpaths[vp_idx].ring;
2514 irq_req = 1;
2515 break;
2516 }
2517
2518 if (ret) {
2519 vxge_debug_init(VXGE_ERR,
2520 "%s: MSIX - %d Registration failed",
2521 vdev->ndev->name, intr_cnt);
2522 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2523 vdev->config.intr_type = INTA;
2524 vxge_debug_init(VXGE_ERR,
2525 "%s: Defaulting to INTA"
2526 , vdev->ndev->name);
703da5a1 2527 goto INTA_MODE;
703da5a1
RV		 2528 }
2529
2530 if (irq_req) {
2531 /* We requested for this msix interrupt */
2532 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457
SH		 2533 msix_idx += vdev->vpaths[vp_idx].device_id *
2534 VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 2535 vxge_hw_vpath_msix_unmask(
2536 vdev->vpaths[vp_idx].handle,
b59c9457 2537 msix_idx);
703da5a1
RV		 2538 intr_cnt++;
2539 }
2540
2541 /* Point to next vpath handler */
8e95a202
JP		 2542 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2543 (vp_idx < (vdev->no_of_vpath - 1)))
2544 vp_idx++;
703da5a1
RV		 2545 }
2546
b59c9457 2547 intr_cnt = vdev->no_of_vpath * 2;
703da5a1 2548 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2549 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2550 vdev->ndev->name,
2551 vdev->entries[intr_cnt].entry,
2552 pci_fun);
703da5a1
RV		 2553 /* For Alarm interrupts */
2554 ret = request_irq(vdev->entries[intr_cnt].vector,
2555 vxge_alarm_msix_handle, 0,
2556 vdev->desc[intr_cnt],
b59c9457 2557 &vdev->vpaths[0]);
703da5a1
RV		 2558 if (ret) {
2559 vxge_debug_init(VXGE_ERR,
2560 "%s: MSIX - %d Registration failed",
2561 vdev->ndev->name, intr_cnt);
2562 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2563 vdev->config.intr_type = INTA;
2564 vxge_debug_init(VXGE_ERR,
2565 "%s: Defaulting to INTA",
2566 vdev->ndev->name);
703da5a1 2567 goto INTA_MODE;
703da5a1
RV		 2568 }
2569
b59c9457
SH		 2570 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2571 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1 2572 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
b59c9457 2573 msix_idx);
703da5a1 2574 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457 2575 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
703da5a1
RV		 2576 }
2577INTA_MODE:
2578#endif
703da5a1
RV		 2579
2580 if (vdev->config.intr_type == INTA) {
b59c9457
SH		 2581 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2582 "%s:vxge:INTA", vdev->ndev->name);
eb5f10c2
SH		 2583 vxge_hw_device_set_intr_type(vdev->devh,
2584 VXGE_HW_INTR_MODE_IRQLINE);
16fded7d
JM		 2585
2586 vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2587
703da5a1
RV		 2588 ret = request_irq((int) vdev->pdev->irq,
2589 vxge_isr_napi,
a5d165b5 2590 IRQF_SHARED, vdev->desc[0], vdev);
703da5a1
RV		 2591 if (ret) {
2592 vxge_debug_init(VXGE_ERR,
2593 "%s %s-%d: ISR registration failed",
2594 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2595 return -ENODEV;
2596 }
2597 vxge_debug_init(VXGE_TRACE,
2598 "new %s-%d line allocated",
2599 "IRQ", vdev->pdev->irq);
2600 }
2601
2602 return VXGE_HW_OK;
2603}
2604
2605static void vxge_poll_vp_reset(unsigned long data)
2606{
2607 struct vxgedev *vdev = (struct vxgedev *)data;
2608 int i, j = 0;
2609
2610 for (i = 0; i < vdev->no_of_vpath; i++) {
2611 if (test_bit(i, &vdev->vp_reset)) {
2612 vxge_reset_vpath(vdev, i);
2613 j++;
2614 }
2615 }
2616 if (j && (vdev->config.intr_type != MSI_X)) {
2617 vxge_hw_device_unmask_all(vdev->devh);
2618 vxge_hw_device_flush_io(vdev->devh);
2619 }
2620
2621 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2622}
2623
2624static void vxge_poll_vp_lockup(unsigned long data)
2625{
2626 struct vxgedev *vdev = (struct vxgedev *)data;
703da5a1 2627 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 2628 struct vxge_vpath *vpath;
2629 struct vxge_ring *ring;
2630 int i;
62ea0557 2631 unsigned long rx_frms;
703da5a1
RV		 2632
2633 for (i = 0; i < vdev->no_of_vpath; i++) {
2634 ring = &vdev->vpaths[i].ring;
62ea0557 2635
2636 /* Truncated to machine word size number of frames */
2637 rx_frms = ACCESS_ONCE(ring->stats.rx_frms);
2638
703da5a1 2639 /* Did this vpath received any packets */
62ea0557 2640 if (ring->stats.prev_rx_frms == rx_frms) {
703da5a1
RV		 2641 status = vxge_hw_vpath_check_leak(ring->handle);
2642
2643 /* Did it received any packets last time */
2644 if ((VXGE_HW_FAIL == status) &&
2645 (VXGE_HW_FAIL == ring->last_status)) {
2646
2647 /* schedule vpath reset */
2648 if (!test_and_set_bit(i, &vdev->vp_reset)) {
7adf7d1b 2649 vpath = &vdev->vpaths[i];
703da5a1
RV		 2650
2651 /* disable interrupts for this vpath */
2652 vxge_vpath_intr_disable(vdev, i);
2653
2654 /* stop the queue for this vpath */
98f45da2 2655 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 2656 continue;
2657 }
2658 }
2659 }
62ea0557 2660 ring->stats.prev_rx_frms = rx_frms;
703da5a1
RV		 2661 ring->last_status = status;
2662 }
2663
2664 /* Check every 1 milli second */
2665 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2666}
2667
c8f44aff
MM		 2668static netdev_features_t vxge_fix_features(struct net_device *dev,
2669 netdev_features_t features)
feb990d4 2670{
c8f44aff 2671 netdev_features_t changed = dev->features ^ features;
feb990d4
MM		 2672
2673 /* Enabling RTH requires some of the logic in vxge_device_register and a
2674 * vpath reset. Due to these restrictions, only allow modification
2675 * while the interface is down.
2676 */
2677 if ((changed & NETIF_F_RXHASH) && netif_running(dev))
2678 features ^= NETIF_F_RXHASH;
2679
2680 return features;
2681}
2682
c8f44aff 2683static int vxge_set_features(struct net_device *dev, netdev_features_t features)
feb990d4
MM		 2684{
2685 struct vxgedev *vdev = netdev_priv(dev);
c8f44aff 2686 netdev_features_t changed = dev->features ^ features;
feb990d4
MM		 2687
2688 if (!(changed & NETIF_F_RXHASH))
2689 return 0;
2690
2691 /* !netif_running() ensured by vxge_fix_features() */
2692
2693 vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
2694 if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
2695 dev->features = features ^ NETIF_F_RXHASH;
2696 vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
2697 return -EIO;
2698 }
2699
2700 return 0;
2701}
2702
703da5a1
RV		 2703/**
2704 * vxge_open
2705 * @dev: pointer to the device structure.
2706 *
2707 * This function is the open entry point of the driver. It mainly calls a
2708 * function to allocate Rx buffers and inserts them into the buffer
2709 * descriptors and then enables the Rx part of the NIC.
2710 * Return value: '0' on success and an appropriate (-)ve integer as
2711 * defined in errno.h file on failure.
2712 */
528f7272 2713static int vxge_open(struct net_device *dev)
703da5a1
RV		 2714{
2715 enum vxge_hw_status status;
2716 struct vxgedev *vdev;
2717 struct __vxge_hw_device *hldev;
7adf7d1b 2718 struct vxge_vpath *vpath;
703da5a1
RV		 2719 int ret = 0;
2720 int i;
2721 u64 val64, function_mode;
528f7272 2722
703da5a1
RV		 2723 vxge_debug_entryexit(VXGE_TRACE,
2724 "%s: %s:%d", dev->name, __func__, __LINE__);
2725
5f54cebb 2726 vdev = netdev_priv(dev);
d8ee7071 2727 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2728 function_mode = vdev->config.device_hw_info.function_mode;
2729
2730 /* make sure you have link off by default every time Nic is
2731 * initialized */
2732 netif_carrier_off(dev);
2733
703da5a1
RV		 2734 /* Open VPATHs */
2735 status = vxge_open_vpaths(vdev);
2736 if (status != VXGE_HW_OK) {
2737 vxge_debug_init(VXGE_ERR,
2738 "%s: fatal: Vpath open failed", vdev->ndev->name);
2739 ret = -EPERM;
2740 goto out0;
2741 }
2742
2743 vdev->mtu = dev->mtu;
2744
2745 status = vxge_add_isr(vdev);
2746 if (status != VXGE_HW_OK) {
2747 vxge_debug_init(VXGE_ERR,
2748 "%s: fatal: ISR add failed", dev->name);
2749 ret = -EPERM;
2750 goto out1;
2751 }
2752
703da5a1
RV		 2753 if (vdev->config.intr_type != MSI_X) {
2754 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2755 vdev->config.napi_weight);
2756 napi_enable(&vdev->napi);
7adf7d1b
JM		 2757 for (i = 0; i < vdev->no_of_vpath; i++) {
2758 vpath = &vdev->vpaths[i];
2759 vpath->ring.napi_p = &vdev->napi;
2760 }
703da5a1
RV		 2761 } else {
2762 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2763 vpath = &vdev->vpaths[i];
2764 netif_napi_add(dev, &vpath->ring.napi,
703da5a1 2765 vxge_poll_msix, vdev->config.napi_weight);
7adf7d1b
JM		 2766 napi_enable(&vpath->ring.napi);
2767 vpath->ring.napi_p = &vpath->ring.napi;
703da5a1
RV		 2768 }
2769 }
2770
2771 /* configure RTH */
2772 if (vdev->config.rth_steering) {
2773 status = vxge_rth_configure(vdev);
2774 if (status != VXGE_HW_OK) {
2775 vxge_debug_init(VXGE_ERR,
2776 "%s: fatal: RTH configuration failed",
2777 dev->name);
2778 ret = -EPERM;
2779 goto out2;
2780 }
2781 }
47f01db4
JM		 2782 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2783 hldev->config.rth_en ? "enabled" : "disabled");
703da5a1
RV		 2784
2785 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2786 vpath = &vdev->vpaths[i];
2787
703da5a1 2788 /* set initial mtu before enabling the device */
7adf7d1b 2789 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
703da5a1
RV		 2790 if (status != VXGE_HW_OK) {
2791 vxge_debug_init(VXGE_ERR,
2792 "%s: fatal: can not set new MTU", dev->name);
2793 ret = -EPERM;
2794 goto out2;
2795 }
2796 }
2797
2798 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2799 vxge_debug_init(vdev->level_trace,
2800 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2801 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2802
7adf7d1b
JM		 2803 /* Restore the DA, VID table and also multicast and promiscuous mode
2804 * states
2805 */
2806 if (vdev->all_multi_flg) {
2807 for (i = 0; i < vdev->no_of_vpath; i++) {
2808 vpath = &vdev->vpaths[i];
2809 vxge_restore_vpath_mac_addr(vpath);
2810 vxge_restore_vpath_vid_table(vpath);
2811
2812 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2813 if (status != VXGE_HW_OK)
2814 vxge_debug_init(VXGE_ERR,
2815 "%s:%d Enabling multicast failed",
2816 __func__, __LINE__);
2817 }
703da5a1
RV		 2818 }
2819
2820 /* Enable vpath to sniff all unicast/multicast traffic that not
25985edc 2821 * addressed to them. We allow promiscuous mode for PF only
703da5a1
RV		 2822 */
2823
2824 val64 = 0;
2825 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2826 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2827
2828 vxge_hw_mgmt_reg_write(vdev->devh,
2829 vxge_hw_mgmt_reg_type_mrpcim,
2830 0,
2831 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2832 rxmac_authorize_all_addr),
2833 val64);
2834
2835 vxge_hw_mgmt_reg_write(vdev->devh,
2836 vxge_hw_mgmt_reg_type_mrpcim,
2837 0,
2838 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2839 rxmac_authorize_all_vid),
2840 val64);
2841
2842 vxge_set_multicast(dev);
2843
2844 /* Enabling Bcast and mcast for all vpath */
2845 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2846 vpath = &vdev->vpaths[i];
2847 status = vxge_hw_vpath_bcast_enable(vpath->handle);
703da5a1
RV		 2848 if (status != VXGE_HW_OK)
2849 vxge_debug_init(VXGE_ERR,
2850 "%s : Can not enable bcast for vpath "
2851 "id %d", dev->name, i);
2852 if (vdev->config.addr_learn_en) {
7adf7d1b 2853 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 2854 if (status != VXGE_HW_OK)
2855 vxge_debug_init(VXGE_ERR,
2856 "%s : Can not enable mcast for vpath "
2857 "id %d", dev->name, i);
2858 }
2859 }
2860
2861 vxge_hw_device_setpause_data(vdev->devh, 0,
2862 vdev->config.tx_pause_enable,
2863 vdev->config.rx_pause_enable);
2864
2865 if (vdev->vp_reset_timer.function == NULL)
044a3813
JP		 2866 vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset, vdev,
2867 HZ / 2);
703da5a1 2868
e7935c96
JM		 2869 /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2870 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
044a3813 2871 vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
e7935c96 2872 HZ / 2);
703da5a1
RV		 2873
2874 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2875
2876 smp_wmb();
2877
2878 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2879 netif_carrier_on(vdev->ndev);
75f5e1c6 2880 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 2881 vdev->stats.link_up++;
2882 }
2883
2884 vxge_hw_device_intr_enable(vdev->devh);
2885
2886 smp_wmb();
2887
2888 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2889 vpath = &vdev->vpaths[i];
2890
2891 vxge_hw_vpath_enable(vpath->handle);
703da5a1 2892 smp_wmb();
7adf7d1b 2893 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
703da5a1
RV		 2894 }
2895
d03848e0 2896 netif_tx_start_all_queues(vdev->ndev);
16fded7d
JM		 2897
2898 /* configure CI */
2899 vxge_config_ci_for_tti_rti(vdev);
2900
703da5a1
RV		 2901 goto out0;
2902
2903out2:
2904 vxge_rem_isr(vdev);
2905
2906 /* Disable napi */
2907 if (vdev->config.intr_type != MSI_X)
2908 napi_disable(&vdev->napi);
2909 else {
2910 for (i = 0; i < vdev->no_of_vpath; i++)
2911 napi_disable(&vdev->vpaths[i].ring.napi);
2912 }
2913
2914out1:
2915 vxge_close_vpaths(vdev, 0);
2916out0:
2917 vxge_debug_entryexit(VXGE_TRACE,
2918 "%s: %s:%d Exiting...",
2919 dev->name, __func__, __LINE__);
2920 return ret;
2921}
2922
25985edc 2923/* Loop through the mac address list and delete all the entries */
42821a5b 2924static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
703da5a1
RV		 2925{
2926
2927 struct list_head *entry, *next;
2928 if (list_empty(&vpath->mac_addr_list))
2929 return;
2930
2931 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2932 list_del(entry);
2933 kfree((struct vxge_mac_addrs *)entry);
2934 }
2935}
2936
2937static void vxge_napi_del_all(struct vxgedev *vdev)
2938{
2939 int i;
2940 if (vdev->config.intr_type != MSI_X)
2941 netif_napi_del(&vdev->napi);
2942 else {
2943 for (i = 0; i < vdev->no_of_vpath; i++)
2944 netif_napi_del(&vdev->vpaths[i].ring.napi);
2945 }
703da5a1
RV		 2946}
2947
42821a5b 2948static int do_vxge_close(struct net_device *dev, int do_io)
703da5a1
RV		 2949{
2950 enum vxge_hw_status status;
2951 struct vxgedev *vdev;
2952 struct __vxge_hw_device *hldev;
2953 int i;
2954 u64 val64, vpath_vector;
2955 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2956 dev->name, __func__, __LINE__);
2957
5f54cebb 2958 vdev = netdev_priv(dev);
d8ee7071 2959 hldev = pci_get_drvdata(vdev->pdev);
703da5a1 2960
bd9ee680
SH		 2961 if (unlikely(!is_vxge_card_up(vdev)))
2962 return 0;
2963
703da5a1
RV		 2964 /* If vxge_handle_crit_err task is executing,
2965 * wait till it completes. */
2966 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2967 msleep(50);
2968
703da5a1
RV		 2969 if (do_io) {
2970 /* Put the vpath back in normal mode */
2971 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2972 status = vxge_hw_mgmt_reg_read(vdev->devh,
2973 vxge_hw_mgmt_reg_type_mrpcim,
2974 0,
2975 (ulong)offsetof(
2976 struct vxge_hw_mrpcim_reg,
2977 rts_mgr_cbasin_cfg),
2978 &val64);
703da5a1
RV		 2979 if (status == VXGE_HW_OK) {
2980 val64 &= ~vpath_vector;
2981 status = vxge_hw_mgmt_reg_write(vdev->devh,
2982 vxge_hw_mgmt_reg_type_mrpcim,
2983 0,
2984 (ulong)offsetof(
2985 struct vxge_hw_mrpcim_reg,
2986 rts_mgr_cbasin_cfg),
2987 val64);
2988 }
2989
25985edc 2990 /* Remove the function 0 from promiscuous mode */
703da5a1
RV		 2991 vxge_hw_mgmt_reg_write(vdev->devh,
2992 vxge_hw_mgmt_reg_type_mrpcim,
2993 0,
2994 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2995 rxmac_authorize_all_addr),
2996 0);
2997
2998 vxge_hw_mgmt_reg_write(vdev->devh,
2999 vxge_hw_mgmt_reg_type_mrpcim,
3000 0,
3001 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
3002 rxmac_authorize_all_vid),
3003 0);
3004
3005 smp_wmb();
3006 }
e7935c96
JM		 3007
3008 if (vdev->titan1)
3009 del_timer_sync(&vdev->vp_lockup_timer);
703da5a1
RV		 3010
3011 del_timer_sync(&vdev->vp_reset_timer);
3012
4d2a5b40
JM		 3013 if (do_io)
3014 vxge_hw_device_wait_receive_idle(hldev);
3015
3016 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3017
703da5a1
RV		 3018 /* Disable napi */
3019 if (vdev->config.intr_type != MSI_X)
3020 napi_disable(&vdev->napi);
3021 else {
3022 for (i = 0; i < vdev->no_of_vpath; i++)
3023 napi_disable(&vdev->vpaths[i].ring.napi);
3024 }
3025
3026 netif_carrier_off(vdev->ndev);
75f5e1c6 3027 netdev_notice(vdev->ndev, "Link Down\n");
d03848e0 3028 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 3029
3030 /* Note that at this point xmit() is stopped by upper layer */
3031 if (do_io)
3032 vxge_hw_device_intr_disable(vdev->devh);
3033
703da5a1
RV		 3034 vxge_rem_isr(vdev);
3035
3036 vxge_napi_del_all(vdev);
3037
3038 if (do_io)
3039 vxge_reset_all_vpaths(vdev);
3040
3041 vxge_close_vpaths(vdev, 0);
3042
3043 vxge_debug_entryexit(VXGE_TRACE,
3044 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
3045
703da5a1
RV		 3046 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
3047
3048 return 0;
3049}
3050
3051/**
3052 * vxge_close
3053 * @dev: device pointer.
3054 *
3055 * This is the stop entry point of the driver. It needs to undo exactly
3056 * whatever was done by the open entry point, thus it's usually referred to
3057 * as the close function.Among other things this function mainly stops the
3058 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3059 * Return value: '0' on success and an appropriate (-)ve integer as
3060 * defined in errno.h file on failure.
3061 */
528f7272 3062static int vxge_close(struct net_device *dev)
703da5a1
RV		 3063{
3064 do_vxge_close(dev, 1);
3065 return 0;
3066}
3067
3068/**
3069 * vxge_change_mtu
3070 * @dev: net device pointer.
3071 * @new_mtu :the new MTU size for the device.
3072 *
3073 * A driver entry point to change MTU size for the device. Before changing
3074 * the MTU the device must be stopped.
3075 */
3076static int vxge_change_mtu(struct net_device *dev, int new_mtu)
3077{
3078 struct vxgedev *vdev = netdev_priv(dev);
3079
3080 vxge_debug_entryexit(vdev->level_trace,
3081 "%s:%d", __func__, __LINE__);
3082 if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
3083 vxge_debug_init(vdev->level_err,
3084 "%s: mtu size is invalid", dev->name);
3085 return -EPERM;
3086 }
3087
3088 /* check if device is down already */
3089 if (unlikely(!is_vxge_card_up(vdev))) {
3090 /* just store new value, will use later on open() */
3091 dev->mtu = new_mtu;
3092 vxge_debug_init(vdev->level_err,
3093 "%s", "device is down on MTU change");
3094 return 0;
3095 }
3096
3097 vxge_debug_init(vdev->level_trace,
3098 "trying to apply new MTU %d", new_mtu);
3099
3100 if (vxge_close(dev))
3101 return -EIO;
3102
3103 dev->mtu = new_mtu;
3104 vdev->mtu = new_mtu;
3105
3106 if (vxge_open(dev))
3107 return -EIO;
3108
3109 vxge_debug_init(vdev->level_trace,
3110 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
3111
3112 vxge_debug_entryexit(vdev->level_trace,
3113 "%s:%d Exiting...", __func__, __LINE__);
3114
3115 return 0;
3116}
3117
3118/**
dd57f970 3119 * vxge_get_stats64
703da5a1 3120 * @dev: pointer to the device structure
dd57f970 3121 * @stats: pointer to struct rtnl_link_stats64
703da5a1 3122 *
703da5a1 3123 */
dd57f970
ED		 3124static struct rtnl_link_stats64 *
3125vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
703da5a1 3126{
dd57f970 3127 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3128 int k;
3129
dd57f970 3130 /* net_stats already zeroed by caller */
703da5a1 3131 for (k = 0; k < vdev->no_of_vpath; k++) {
62ea0557 3132 struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
3133 struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
3134 unsigned int start;
3135 u64 packets, bytes, multicast;
3136
3137 do {
e3906486 3138 start = u64_stats_fetch_begin_bh(&rxstats->syncp);
62ea0557 3139
3140 packets = rxstats->rx_frms;
3141 multicast = rxstats->rx_mcast;
3142 bytes = rxstats->rx_bytes;
e3906486 3143 } while (u64_stats_fetch_retry_bh(&rxstats->syncp, start));
62ea0557 3144
3145 net_stats->rx_packets += packets;
3146 net_stats->rx_bytes += bytes;
3147 net_stats->multicast += multicast;
3148
3149 net_stats->rx_errors += rxstats->rx_errors;
3150 net_stats->rx_dropped += rxstats->rx_dropped;
3151
3152 do {
e3906486 3153 start = u64_stats_fetch_begin_bh(&txstats->syncp);
62ea0557 3154
3155 packets = txstats->tx_frms;
3156 bytes = txstats->tx_bytes;
e3906486 3157 } while (u64_stats_fetch_retry_bh(&txstats->syncp, start));
62ea0557 3158
3159 net_stats->tx_packets += packets;
3160 net_stats->tx_bytes += bytes;
3161 net_stats->tx_errors += txstats->tx_errors;
703da5a1
RV		 3162 }
3163
3164 return net_stats;
3165}
3166
cd883a79 3167static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
b81b3733
JM		 3168{
3169 enum vxge_hw_status status;
3170 u64 val64;
3171
3172 /* Timestamp is passed to the driver via the FCS, therefore we
3173 * must disable the FCS stripping by the adapter. Since this is
3174 * required for the driver to load (due to a hardware bug),
3175 * there is no need to do anything special here.
3176 */
cd883a79
JM		 3177 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3178 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3179 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
b81b3733 3180
cd883a79 3181 status = vxge_hw_mgmt_reg_write(devh,
b81b3733
JM		 3182 vxge_hw_mgmt_reg_type_mrpcim,
3183 0,
3184 offsetof(struct vxge_hw_mrpcim_reg,
3185 xmac_timestamp),
3186 val64);
cd883a79
JM		 3187 vxge_hw_device_flush_io(devh);
3188 devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
b81b3733
JM		 3189 return status;
3190}
3191
3192static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
3193{
3194 struct hwtstamp_config config;
b81b3733
JM		 3195 int i;
3196
3197 if (copy_from_user(&config, data, sizeof(config)))
3198 return -EFAULT;
3199
3200 /* reserved for future extensions */
3201 if (config.flags)
3202 return -EINVAL;
3203
3204 /* Transmit HW Timestamp not supported */
3205 switch (config.tx_type) {
3206 case HWTSTAMP_TX_OFF:
3207 break;
3208 case HWTSTAMP_TX_ON:
3209 default:
3210 return -ERANGE;
3211 }
3212
3213 switch (config.rx_filter) {
3214 case HWTSTAMP_FILTER_NONE:
b81b3733
JM		 3215 vdev->rx_hwts = 0;
3216 config.rx_filter = HWTSTAMP_FILTER_NONE;
3217 break;
3218
3219 case HWTSTAMP_FILTER_ALL:
3220 case HWTSTAMP_FILTER_SOME:
3221 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3222 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3223 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3224 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3225 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3226 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3227 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3228 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3229 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3230 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3231 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3232 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
cd883a79 3233 if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
b81b3733
JM		 3234 return -EFAULT;
3235
3236 vdev->rx_hwts = 1;
3237 config.rx_filter = HWTSTAMP_FILTER_ALL;
3238 break;
3239
3240 default:
3241 return -ERANGE;
3242 }
3243
3244 for (i = 0; i < vdev->no_of_vpath; i++)
3245 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3246
3247 if (copy_to_user(data, &config, sizeof(config)))
3248 return -EFAULT;
3249
3250 return 0;
3251}
3252
703da5a1
RV		 3253/**
3254 * vxge_ioctl
3255 * @dev: Device pointer.
3256 * @ifr: An IOCTL specific structure, that can contain a pointer to
3257 * a proprietary structure used to pass information to the driver.
3258 * @cmd: This is used to distinguish between the different commands that
3259 * can be passed to the IOCTL functions.
3260 *
3261 * Entry point for the Ioctl.
3262 */
3263static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3264{
b81b3733
JM		 3265 struct vxgedev *vdev = netdev_priv(dev);
3266 int ret;
3267
3268 switch (cmd) {
3269 case SIOCSHWTSTAMP:
3270 ret = vxge_hwtstamp_ioctl(vdev, rq->ifr_data);
3271 if (ret)
3272 return ret;
3273 break;
3274 default:
3275 return -EOPNOTSUPP;
3276 }
3277
3278 return 0;
703da5a1
RV		 3279}
3280
3281/**
3282 * vxge_tx_watchdog
3283 * @dev: pointer to net device structure
3284 *
3285 * Watchdog for transmit side.
3286 * This function is triggered if the Tx Queue is stopped
3287 * for a pre-defined amount of time when the Interface is still up.
3288 */
2e41f644 3289static void vxge_tx_watchdog(struct net_device *dev)
703da5a1
RV		 3290{
3291 struct vxgedev *vdev;
3292
3293 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3294
5f54cebb 3295 vdev = netdev_priv(dev);
703da5a1
RV		 3296
3297 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3298
2e41f644 3299 schedule_work(&vdev->reset_task);
703da5a1
RV		 3300 vxge_debug_entryexit(VXGE_TRACE,
3301 "%s:%d Exiting...", __func__, __LINE__);
3302}
3303
703da5a1
RV		 3304/**
3305 * vxge_vlan_rx_add_vid
3306 * @dev: net device pointer.
80d5c368 3307 * @proto: vlan protocol
703da5a1
RV		 3308 * @vid: vid
3309 *
3310 * Add the vlan id to the devices vlan id table
3311 */
8e586137 3312static int
80d5c368 3313vxge_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
703da5a1 3314{
53515734 3315 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3316 struct vxge_vpath *vpath;
3317 int vp_id;
3318
703da5a1
RV		 3319 /* Add these vlan to the vid table */
3320 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3321 vpath = &vdev->vpaths[vp_id];
3322 if (!vpath->is_open)
3323 continue;
3324 vxge_hw_vpath_vid_add(vpath->handle, vid);
3325 }
53515734 3326 set_bit(vid, vdev->active_vlans);
8e586137 3327 return 0;
703da5a1
RV		 3328}
3329
3330/**
80d5c368 3331 * vxge_vlan_rx_kill_vid
703da5a1 3332 * @dev: net device pointer.
80d5c368 3333 * @proto: vlan protocol
703da5a1
RV		 3334 * @vid: vid
3335 *
3336 * Remove the vlan id from the device's vlan id table
3337 */
8e586137 3338static int
80d5c368 3339vxge_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
703da5a1 3340{
53515734 3341 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3342 struct vxge_vpath *vpath;
3343 int vp_id;
3344
3345 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3346
703da5a1
RV		 3347 /* Delete this vlan from the vid table */
3348 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3349 vpath = &vdev->vpaths[vp_id];
3350 if (!vpath->is_open)
3351 continue;
3352 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3353 }
3354 vxge_debug_entryexit(VXGE_TRACE,
3355 "%s:%d Exiting...", __func__, __LINE__);
53515734 3356 clear_bit(vid, vdev->active_vlans);
8e586137 3357 return 0;
703da5a1
RV		 3358}
3359
3360static const struct net_device_ops vxge_netdev_ops = {
3361 .ndo_open = vxge_open,
3362 .ndo_stop = vxge_close,
dd57f970 3363 .ndo_get_stats64 = vxge_get_stats64,
703da5a1
RV		 3364 .ndo_start_xmit = vxge_xmit,
3365 .ndo_validate_addr = eth_validate_addr,
afc4b13d 3366 .ndo_set_rx_mode = vxge_set_multicast,
703da5a1 3367 .ndo_do_ioctl = vxge_ioctl,
703da5a1
RV		 3368 .ndo_set_mac_address = vxge_set_mac_addr,
3369 .ndo_change_mtu = vxge_change_mtu,
feb990d4
MM		 3370 .ndo_fix_features = vxge_fix_features,
3371 .ndo_set_features = vxge_set_features,
703da5a1
RV		 3372 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3373 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
703da5a1
RV		 3374 .ndo_tx_timeout = vxge_tx_watchdog,
3375#ifdef CONFIG_NET_POLL_CONTROLLER
3376 .ndo_poll_controller = vxge_netpoll,
3377#endif
3378};
3379
3a036ce5 3380static int vxge_device_register(struct __vxge_hw_device *hldev,
1dd06ae8
GKH		 3381 struct vxge_config *config, int high_dma,
3382 int no_of_vpath, struct vxgedev **vdev_out)
703da5a1
RV		 3383{
3384 struct net_device *ndev;
3385 enum vxge_hw_status status = VXGE_HW_OK;
3386 struct vxgedev *vdev;
98f45da2 3387 int ret = 0, no_of_queue = 1;
703da5a1
RV		 3388 u64 stat;
3389
3390 *vdev_out = NULL;
d03848e0 3391 if (config->tx_steering_type)
703da5a1
RV		 3392 no_of_queue = no_of_vpath;
3393
3394 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3395 no_of_queue);
3396 if (ndev == NULL) {
3397 vxge_debug_init(
3398 vxge_hw_device_trace_level_get(hldev),
3399 "%s : device allocation failed", __func__);
3400 ret = -ENODEV;
3401 goto _out0;
3402 }
3403
3404 vxge_debug_entryexit(
3405 vxge_hw_device_trace_level_get(hldev),
3406 "%s: %s:%d Entering...",
3407 ndev->name, __func__, __LINE__);
3408
3409 vdev = netdev_priv(ndev);
3410 memset(vdev, 0, sizeof(struct vxgedev));
3411
3412 vdev->ndev = ndev;
3413 vdev->devh = hldev;
3414 vdev->pdev = hldev->pdev;
3415 memcpy(&vdev->config, config, sizeof(struct vxge_config));
b81b3733 3416 vdev->rx_hwts = 0;
ff938e43 3417 vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
e7935c96 3418
703da5a1
RV		 3419 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3420
feb990d4
MM		 3421 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
3422 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3423 NETIF_F_TSO | NETIF_F_TSO6 |
f646968f 3424 NETIF_F_HW_VLAN_CTAG_TX;
feb990d4
MM		 3425 if (vdev->config.rth_steering != NO_STEERING)
3426 ndev->hw_features |= NETIF_F_RXHASH;
3427
3428 ndev->features |= ndev->hw_features |
f646968f 3429 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
feb990d4 3430
703da5a1
RV		 3431
3432 ndev->netdev_ops = &vxge_netdev_ops;
3433
3434 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
2e41f644 3435 INIT_WORK(&vdev->reset_task, vxge_reset);
703da5a1 3436
42821a5b 3437 vxge_initialize_ethtool_ops(ndev);
703da5a1
RV		 3438
3439 /* Allocate memory for vpath */
3440 vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
3441 no_of_vpath, GFP_KERNEL);
3442 if (!vdev->vpaths) {
3443 vxge_debug_init(VXGE_ERR,
3444 "%s: vpath memory allocation failed",
3445 vdev->ndev->name);
6cca2003 3446 ret = -ENOMEM;
703da5a1
RV		 3447 goto _out1;
3448 }
3449
703da5a1 3450 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
278cee05 3451 "%s : checksumming enabled", __func__);
703da5a1
RV		 3452
3453 if (high_dma) {
3454 ndev->features |= NETIF_F_HIGHDMA;
3455 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3456 "%s : using High DMA", __func__);
3457 }
3458
6cca2003
JM		 3459 ret = register_netdev(ndev);
3460 if (ret) {
703da5a1
RV		 3461 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3462 "%s: %s : device registration failed!",
3463 ndev->name, __func__);
703da5a1
RV		 3464 goto _out2;
3465 }
3466
3467 /* Set the factory defined MAC address initially */
3468 ndev->addr_len = ETH_ALEN;
3469
3470 /* Make Link state as off at this point, when the Link change
3471 * interrupt comes the state will be automatically changed to
3472 * the right state.
3473 */
3474 netif_carrier_off(ndev);
3475
3476 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3477 "%s: Ethernet device registered",
3478 ndev->name);
3479
e8ac1756 3480 hldev->ndev = ndev;
703da5a1
RV		 3481 *vdev_out = vdev;
3482
3483 /* Resetting the Device stats */
3484 status = vxge_hw_mrpcim_stats_access(
3485 hldev,
3486 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3487 0,
3488 0,
3489 &stat);
3490
3491 if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
3492 vxge_debug_init(
3493 vxge_hw_device_trace_level_get(hldev),
3494 "%s: device stats clear returns"
3495 "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
3496
3497 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3498 "%s: %s:%d Exiting...",
3499 ndev->name, __func__, __LINE__);
3500
3501 return ret;
3502_out2:
3503 kfree(vdev->vpaths);
3504_out1:
3505 free_netdev(ndev);
3506_out0:
3507 return ret;
3508}
3509
3510/*
3511 * vxge_device_unregister
3512 *
3513 * This function will unregister and free network device
3514 */
2c91308f 3515static void vxge_device_unregister(struct __vxge_hw_device *hldev)
703da5a1
RV		 3516{
3517 struct vxgedev *vdev;
3518 struct net_device *dev;
3519 char buf[IFNAMSIZ];
703da5a1
RV		 3520
3521 dev = hldev->ndev;
3522 vdev = netdev_priv(dev);
703da5a1 3523
2c91308f
JM		 3524 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3525 __func__, __LINE__);
3526
ead5d238 3527 strncpy(buf, dev->name, IFNAMSIZ);
703da5a1 3528
43829731 3529 flush_work(&vdev->reset_task);
ba27d85c 3530
703da5a1
RV		 3531 /* in 2.6 will call stop() if device is up */
3532 unregister_netdev(dev);
3533
6cca2003
JM		 3534 kfree(vdev->vpaths);
3535
3536 /* we are safe to free it now */
3537 free_netdev(dev);
3538
2c91308f
JM		 3539 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3540 buf);
3541 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3542 __func__, __LINE__);
703da5a1
RV		 3543}
3544
3545/*
3546 * vxge_callback_crit_err
3547 *
3548 * This function is called by the alarm handler in interrupt context.
3549 * Driver must analyze it based on the event type.
3550 */
3551static void
3552vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3553 enum vxge_hw_event type, u64 vp_id)
3554{
3555 struct net_device *dev = hldev->ndev;
5f54cebb 3556 struct vxgedev *vdev = netdev_priv(dev);
98f45da2 3557 struct vxge_vpath *vpath = NULL;
703da5a1
RV		 3558 int vpath_idx;
3559
3560 vxge_debug_entryexit(vdev->level_trace,
3561 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3562
3563 /* Note: This event type should be used for device wide
3564 * indications only - Serious errors, Slot freeze and critical errors
3565 */
3566 vdev->cric_err_event = type;
3567
98f45da2
JM		 3568 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3569 vpath = &vdev->vpaths[vpath_idx];
3570 if (vpath->device_id == vp_id)
703da5a1 3571 break;
98f45da2 3572 }
703da5a1
RV		 3573
3574 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3575 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3576 vxge_debug_init(VXGE_ERR,
3577 "%s: Slot is frozen", vdev->ndev->name);
3578 } else if (type == VXGE_HW_EVENT_SERR) {
3579 vxge_debug_init(VXGE_ERR,
3580 "%s: Encountered Serious Error",
3581 vdev->ndev->name);
3582 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3583 vxge_debug_init(VXGE_ERR,
3584 "%s: Encountered Critical Error",
3585 vdev->ndev->name);
3586 }
3587
3588 if ((type == VXGE_HW_EVENT_SERR) ||
3589 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3590 if (unlikely(vdev->exec_mode))
3591 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3592 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3593 vxge_hw_device_mask_all(hldev);
3594 if (unlikely(vdev->exec_mode))
3595 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3596 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3597 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3598
3599 if (unlikely(vdev->exec_mode))
3600 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3601 else {
3602 /* check if this vpath is already set for reset */
3603 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3604
3605 /* disable interrupts for this vpath */
3606 vxge_vpath_intr_disable(vdev, vpath_idx);
3607
3608 /* stop the queue for this vpath */
98f45da2 3609 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 3610 }
3611 }
3612 }
3613
3614 vxge_debug_entryexit(vdev->level_trace,
3615 "%s: %s:%d Exiting...",
3616 vdev->ndev->name, __func__, __LINE__);
3617}
3618
3619static void verify_bandwidth(void)
3620{
3621 int i, band_width, total = 0, equal_priority = 0;
3622
3623 /* 1. If user enters 0 for some fifo, give equal priority to all */
3624 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3625 if (bw_percentage[i] == 0) {
3626 equal_priority = 1;
3627 break;
3628 }
3629 }
3630
3631 if (!equal_priority) {
3632 /* 2. If sum exceeds 100, give equal priority to all */
3633 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3634 if (bw_percentage[i] == 0xFF)
3635 break;
3636
3637 total += bw_percentage[i];
3638 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3639 equal_priority = 1;
3640 break;
3641 }
3642 }
3643 }
3644
3645 if (!equal_priority) {
3646 /* Is all the bandwidth consumed? */
3647 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3648 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3649 /* Split rest of bw equally among next VPs*/
3650 band_width =
3651 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3652 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3653 if (band_width < 2) /* min of 2% */
3654 equal_priority = 1;
3655 else {
3656 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3657 i++)
3658 bw_percentage[i] =
3659 band_width;
3660 }
3661 }
3662 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3663 equal_priority = 1;
3664 }
3665
3666 if (equal_priority) {
3667 vxge_debug_init(VXGE_ERR,
3668 "%s: Assigning equal bandwidth to all the vpaths",
3669 VXGE_DRIVER_NAME);
3670 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3671 VXGE_HW_MAX_VIRTUAL_PATHS;
3672 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3673 bw_percentage[i] = bw_percentage[0];
3674 }
703da5a1
RV		 3675}
3676
3677/*
3678 * Vpath configuration
3679 */
1dd06ae8
GKH		 3680static int vxge_config_vpaths(struct vxge_hw_device_config *device_config,
3681 u64 vpath_mask, struct vxge_config *config_param)
703da5a1
RV		 3682{
3683 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3684 u32 txdl_size, txdl_per_memblock;
3685
3686 temp = driver_config->vpath_per_dev;
3687 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3688 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3689 /* No more CPU. Return vpath number as zero.*/
3690 if (driver_config->g_no_cpus == -1)
3691 return 0;
3692
3693 if (!driver_config->g_no_cpus)
9cbb5760
YM		 3694 driver_config->g_no_cpus =
3695 netif_get_num_default_rss_queues();
703da5a1
RV		 3696
3697 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3698 if (!driver_config->vpath_per_dev)
3699 driver_config->vpath_per_dev = 1;
3700
3701 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3702 if (!vxge_bVALn(vpath_mask, i, 1))
3703 continue;
3704 else
3705 default_no_vpath++;
3706 if (default_no_vpath < driver_config->vpath_per_dev)
3707 driver_config->vpath_per_dev = default_no_vpath;
3708
3709 driver_config->g_no_cpus = driver_config->g_no_cpus -
3710 (driver_config->vpath_per_dev * 2);
3711 if (driver_config->g_no_cpus <= 0)
3712 driver_config->g_no_cpus = -1;
3713 }
3714
3715 if (driver_config->vpath_per_dev == 1) {
3716 vxge_debug_ll_config(VXGE_TRACE,
3717 "%s: Disable tx and rx steering, "
3718 "as single vpath is configured", VXGE_DRIVER_NAME);
3719 config_param->rth_steering = NO_STEERING;
3720 config_param->tx_steering_type = NO_STEERING;
3721 device_config->rth_en = 0;
3722 }
3723
3724 /* configure bandwidth */
3725 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3726 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3727
3728 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3729 device_config->vp_config[i].vp_id = i;
3730 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3731 if (no_of_vpaths < driver_config->vpath_per_dev) {
3732 if (!vxge_bVALn(vpath_mask, i, 1)) {
3733 vxge_debug_ll_config(VXGE_TRACE,
3734 "%s: vpath: %d is not available",
3735 VXGE_DRIVER_NAME, i);
3736 continue;
3737 } else {
3738 vxge_debug_ll_config(VXGE_TRACE,
3739 "%s: vpath: %d available",
3740 VXGE_DRIVER_NAME, i);
3741 no_of_vpaths++;
3742 }
3743 } else {
3744 vxge_debug_ll_config(VXGE_TRACE,
3745 "%s: vpath: %d is not configured, "
3746 "max_config_vpath exceeded",
3747 VXGE_DRIVER_NAME, i);
3748 break;
3749 }
3750
3751 /* Configure Tx fifo's */
3752 device_config->vp_config[i].fifo.enable =
3753 VXGE_HW_FIFO_ENABLE;
3754 device_config->vp_config[i].fifo.max_frags =
5beefb4f 3755 MAX_SKB_FRAGS + 1;
703da5a1
RV		 3756 device_config->vp_config[i].fifo.memblock_size =
3757 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3758
5beefb4f
SH		 3759 txdl_size = device_config->vp_config[i].fifo.max_frags *
3760 sizeof(struct vxge_hw_fifo_txd);
703da5a1
RV		 3761 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3762
3763 device_config->vp_config[i].fifo.fifo_blocks =
3764 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3765
3766 device_config->vp_config[i].fifo.intr =
3767 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3768
3769 /* Configure tti properties */
3770 device_config->vp_config[i].tti.intr_enable =
3771 VXGE_HW_TIM_INTR_ENABLE;
3772
3773 device_config->vp_config[i].tti.btimer_val =
3774 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3775
3776 device_config->vp_config[i].tti.timer_ac_en =
3777 VXGE_HW_TIM_TIMER_AC_ENABLE;
3778
528f7272
JM		 3779 /* For msi-x with napi (each vector has a handler of its own) -
3780 * Set CI to OFF for all vpaths
3781 */
703da5a1
RV		 3782 device_config->vp_config[i].tti.timer_ci_en =
3783 VXGE_HW_TIM_TIMER_CI_DISABLE;
3784
3785 device_config->vp_config[i].tti.timer_ri_en =
3786 VXGE_HW_TIM_TIMER_RI_DISABLE;
3787
3788 device_config->vp_config[i].tti.util_sel =
3789 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3790
3791 device_config->vp_config[i].tti.ltimer_val =
3792 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3793
3794 device_config->vp_config[i].tti.rtimer_val =
3795 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3796
3797 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3798 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3799 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3800 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3801 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3802 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3803 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3804
3805 /* Configure Rx rings */
3806 device_config->vp_config[i].ring.enable =
3807 VXGE_HW_RING_ENABLE;
3808
3809 device_config->vp_config[i].ring.ring_blocks =
3810 VXGE_HW_DEF_RING_BLOCKS;
528f7272 3811
703da5a1
RV		 3812 device_config->vp_config[i].ring.buffer_mode =
3813 VXGE_HW_RING_RXD_BUFFER_MODE_1;
528f7272 3814
703da5a1
RV		 3815 device_config->vp_config[i].ring.rxds_limit =
3816 VXGE_HW_DEF_RING_RXDS_LIMIT;
528f7272 3817
703da5a1
RV		 3818 device_config->vp_config[i].ring.scatter_mode =
3819 VXGE_HW_RING_SCATTER_MODE_A;
3820
3821 /* Configure rti properties */
3822 device_config->vp_config[i].rti.intr_enable =
3823 VXGE_HW_TIM_INTR_ENABLE;
3824
3825 device_config->vp_config[i].rti.btimer_val =
3826 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3827
3828 device_config->vp_config[i].rti.timer_ac_en =
3829 VXGE_HW_TIM_TIMER_AC_ENABLE;
3830
3831 device_config->vp_config[i].rti.timer_ci_en =
3832 VXGE_HW_TIM_TIMER_CI_DISABLE;
3833
3834 device_config->vp_config[i].rti.timer_ri_en =
3835 VXGE_HW_TIM_TIMER_RI_DISABLE;
3836
3837 device_config->vp_config[i].rti.util_sel =
3838 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3839
3840 device_config->vp_config[i].rti.urange_a =
3841 RTI_RX_URANGE_A;
3842 device_config->vp_config[i].rti.urange_b =
3843 RTI_RX_URANGE_B;
3844 device_config->vp_config[i].rti.urange_c =
3845 RTI_RX_URANGE_C;
3846 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3847 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3848 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3849 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3850
3851 device_config->vp_config[i].rti.rtimer_val =
3852 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3853
3854 device_config->vp_config[i].rti.ltimer_val =
3855 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3856
3857 device_config->vp_config[i].rpa_strip_vlan_tag =
3858 vlan_tag_strip;
3859 }
3860
3861 driver_config->vpath_per_dev = temp;
3862 return no_of_vpaths;
3863}
3864
3865/* initialize device configuratrions */
1dd06ae8
GKH		 3866static void vxge_device_config_init(struct vxge_hw_device_config *device_config,
3867 int *intr_type)
703da5a1
RV		 3868{
3869 /* Used for CQRQ/SRQ. */
3870 device_config->dma_blockpool_initial =
3871 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3872
3873 device_config->dma_blockpool_max =
3874 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3875
3876 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3877 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3878
3879#ifndef CONFIG_PCI_MSI
3880 vxge_debug_init(VXGE_ERR,
3881 "%s: This Kernel does not support "
3882 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3883 *intr_type = INTA;
3884#endif
3885
3886 /* Configure whether MSI-X or IRQL. */
3887 switch (*intr_type) {
3888 case INTA:
3889 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3890 break;
3891
3892 case MSI_X:
16fded7d 3893 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
703da5a1
RV		 3894 break;
3895 }
528f7272 3896
703da5a1
RV		 3897 /* Timer period between device poll */
3898 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3899
3900 /* Configure mac based steering. */
3901 device_config->rts_mac_en = addr_learn_en;
3902
3903 /* Configure Vpaths */
3904 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3905
3906 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3907 __func__);
703da5a1
RV		 3908 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3909 device_config->intr_mode);
3910 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3911 device_config->device_poll_millis);
703da5a1
RV		 3912 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3913 device_config->rth_en);
3914 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3915 device_config->rth_it_type);
3916}
3917
3a036ce5 3918static void vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
703da5a1
RV		 3919{
3920 int i;
3921
3922 vxge_debug_init(VXGE_TRACE,
3923 "%s: %d Vpath(s) opened",
3924 vdev->ndev->name, vdev->no_of_vpath);
3925
3926 switch (vdev->config.intr_type) {
3927 case INTA:
3928 vxge_debug_init(VXGE_TRACE,
3929 "%s: Interrupt type INTA", vdev->ndev->name);
3930 break;
3931
3932 case MSI_X:
3933 vxge_debug_init(VXGE_TRACE,
3934 "%s: Interrupt type MSI-X", vdev->ndev->name);
3935 break;
3936 }
3937
3938 if (vdev->config.rth_steering) {
3939 vxge_debug_init(VXGE_TRACE,
3940 "%s: RTH steering enabled for TCP_IPV4",
3941 vdev->ndev->name);
3942 } else {
3943 vxge_debug_init(VXGE_TRACE,
3944 "%s: RTH steering disabled", vdev->ndev->name);
3945 }
3946
3947 switch (vdev->config.tx_steering_type) {
3948 case NO_STEERING:
3949 vxge_debug_init(VXGE_TRACE,
3950 "%s: Tx steering disabled", vdev->ndev->name);
3951 break;
3952 case TX_PRIORITY_STEERING:
3953 vxge_debug_init(VXGE_TRACE,
3954 "%s: Unsupported tx steering option",
3955 vdev->ndev->name);
3956 vxge_debug_init(VXGE_TRACE,
3957 "%s: Tx steering disabled", vdev->ndev->name);
3958 vdev->config.tx_steering_type = 0;
3959 break;
3960 case TX_VLAN_STEERING:
3961 vxge_debug_init(VXGE_TRACE,
3962 "%s: Unsupported tx steering option",
3963 vdev->ndev->name);
3964 vxge_debug_init(VXGE_TRACE,
3965 "%s: Tx steering disabled", vdev->ndev->name);
3966 vdev->config.tx_steering_type = 0;
3967 break;
3968 case TX_MULTIQ_STEERING:
3969 vxge_debug_init(VXGE_TRACE,
3970 "%s: Tx multiqueue steering enabled",
3971 vdev->ndev->name);
3972 break;
3973 case TX_PORT_STEERING:
3974 vxge_debug_init(VXGE_TRACE,
3975 "%s: Tx port steering enabled",
3976 vdev->ndev->name);
3977 break;
3978 default:
3979 vxge_debug_init(VXGE_ERR,
3980 "%s: Unsupported tx steering type",
3981 vdev->ndev->name);
3982 vxge_debug_init(VXGE_TRACE,
3983 "%s: Tx steering disabled", vdev->ndev->name);
3984 vdev->config.tx_steering_type = 0;
3985 }
3986
703da5a1
RV		 3987 if (vdev->config.addr_learn_en)
3988 vxge_debug_init(VXGE_TRACE,
3989 "%s: MAC Address learning enabled", vdev->ndev->name);
3990
703da5a1
RV		 3991 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3992 if (!vxge_bVALn(vpath_mask, i, 1))
3993 continue;
3994 vxge_debug_ll_config(VXGE_TRACE,
3995 "%s: MTU size - %d", vdev->ndev->name,
64699336 3996 ((vdev->devh))->
703da5a1
RV		 3997 config.vp_config[i].mtu);
3998 vxge_debug_init(VXGE_TRACE,
3999 "%s: VLAN tag stripping %s", vdev->ndev->name,
64699336 4000 ((vdev->devh))->
703da5a1
RV		 4001 config.vp_config[i].rpa_strip_vlan_tag
4002 ? "Enabled" : "Disabled");
703da5a1
RV		 4003 vxge_debug_ll_config(VXGE_TRACE,
4004 "%s: Max frags : %d", vdev->ndev->name,
64699336 4005 ((vdev->devh))->
703da5a1
RV		 4006 config.vp_config[i].fifo.max_frags);
4007 break;
4008 }
4009}
4010
4011#ifdef CONFIG_PM
4012/**
4013 * vxge_pm_suspend - vxge power management suspend entry point
4014 *
4015 */
4016static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
4017{
4018 return -ENOSYS;
4019}
4020/**
4021 * vxge_pm_resume - vxge power management resume entry point
4022 *
4023 */
4024static int vxge_pm_resume(struct pci_dev *pdev)
4025{
4026 return -ENOSYS;
4027}
4028
4029#endif
4030
4031/**
4032 * vxge_io_error_detected - called when PCI error is detected
4033 * @pdev: Pointer to PCI device
4034 * @state: The current pci connection state
4035 *
4036 * This function is called after a PCI bus error affecting
4037 * this device has been detected.
4038 */
4039static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
4040 pci_channel_state_t state)
4041{
d8ee7071 4042 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4043 struct net_device *netdev = hldev->ndev;
4044
4045 netif_device_detach(netdev);
4046
e33b992d
DN		 4047 if (state == pci_channel_io_perm_failure)
4048 return PCI_ERS_RESULT_DISCONNECT;
4049
703da5a1
RV		 4050 if (netif_running(netdev)) {
4051 /* Bring down the card, while avoiding PCI I/O */
4052 do_vxge_close(netdev, 0);
4053 }
4054
4055 pci_disable_device(pdev);
4056
4057 return PCI_ERS_RESULT_NEED_RESET;
4058}
4059
4060/**
4061 * vxge_io_slot_reset - called after the pci bus has been reset.
4062 * @pdev: Pointer to PCI device
4063 *
4064 * Restart the card from scratch, as if from a cold-boot.
4065 * At this point, the card has exprienced a hard reset,
4066 * followed by fixups by BIOS, and has its config space
4067 * set up identically to what it was at cold boot.
4068 */
4069static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4070{
d8ee7071 4071 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4072 struct net_device *netdev = hldev->ndev;
4073
4074 struct vxgedev *vdev = netdev_priv(netdev);
4075
4076 if (pci_enable_device(pdev)) {
75f5e1c6 4077 netdev_err(netdev, "Cannot re-enable device after reset\n");
703da5a1
RV		 4078 return PCI_ERS_RESULT_DISCONNECT;
4079 }
4080
4081 pci_set_master(pdev);
528f7272 4082 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 4083
4084 return PCI_ERS_RESULT_RECOVERED;
4085}
4086
4087/**
4088 * vxge_io_resume - called when traffic can start flowing again.
4089 * @pdev: Pointer to PCI device
4090 *
4091 * This callback is called when the error recovery driver tells
4092 * us that its OK to resume normal operation.
4093 */
4094static void vxge_io_resume(struct pci_dev *pdev)
4095{
d8ee7071 4096 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4097 struct net_device *netdev = hldev->ndev;
4098
4099 if (netif_running(netdev)) {
4100 if (vxge_open(netdev)) {
75f5e1c6
JP		 4101 netdev_err(netdev,
4102 "Can't bring device back up after reset\n");
703da5a1
RV		 4103 return;
4104 }
4105 }
4106
4107 netif_device_attach(netdev);
4108}
4109
cb27ec60
SH		 4110static inline u32 vxge_get_num_vfs(u64 function_mode)
4111{
4112 u32 num_functions = 0;
4113
4114 switch (function_mode) {
4115 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4116 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4117 num_functions = 8;
4118 break;
4119 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4120 num_functions = 1;
4121 break;
4122 case VXGE_HW_FUNCTION_MODE_SRIOV:
4123 case VXGE_HW_FUNCTION_MODE_MRIOV:
4124 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4125 num_functions = 17;
4126 break;
4127 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4128 num_functions = 4;
4129 break;
4130 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4131 num_functions = 2;
4132 break;
4133 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4134 num_functions = 8; /* TODO */
4135 break;
4136 }
4137 return num_functions;
4138}
4139
e8ac1756
JM		 4140int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4141{
4142 struct __vxge_hw_device *hldev = vdev->devh;
4143 u32 maj, min, bld, cmaj, cmin, cbld;
4144 enum vxge_hw_status status;
4145 const struct firmware *fw;
4146 int ret;
4147
4148 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4149 if (ret) {
4150 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4151 VXGE_DRIVER_NAME, fw_name);
4152 goto out;
4153 }
4154
4155 /* Load the new firmware onto the adapter */
4156 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4157 if (status != VXGE_HW_OK) {
4158 vxge_debug_init(VXGE_ERR,
4159 "%s: FW image download to adapter failed '%s'.",
4160 VXGE_DRIVER_NAME, fw_name);
4161 ret = -EIO;
4162 goto out;
4163 }
4164
4165 /* Read the version of the new firmware */
4166 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4167 if (status != VXGE_HW_OK) {
4168 vxge_debug_init(VXGE_ERR,
4169 "%s: Upgrade read version failed '%s'.",
4170 VXGE_DRIVER_NAME, fw_name);
4171 ret = -EIO;
4172 goto out;
4173 }
4174
4175 cmaj = vdev->config.device_hw_info.fw_version.major;
4176 cmin = vdev->config.device_hw_info.fw_version.minor;
4177 cbld = vdev->config.device_hw_info.fw_version.build;
4178 /* It's possible the version in /lib/firmware is not the latest version.
4179 * If so, we could get into a loop of trying to upgrade to the latest
4180 * and flashing the older version.
4181 */
4182 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4183 !override) {
4184 ret = -EINVAL;
4185 goto out;
4186 }
4187
4188 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4189 maj, min, bld);
4190
4191 /* Flash the adapter with the new firmware */
4192 status = vxge_hw_flash_fw(hldev);
4193 if (status != VXGE_HW_OK) {
4194 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4195 VXGE_DRIVER_NAME, fw_name);
4196 ret = -EIO;
4197 goto out;
4198 }
4199
4200 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4201 "hard reset before using, thus requiring a system reboot or a "
4202 "hotplug event.\n");
4203
4204out:
e84f885e 4205 release_firmware(fw);
e8ac1756
JM		 4206 return ret;
4207}
4208
4209static int vxge_probe_fw_update(struct vxgedev *vdev)
4210{
4211 u32 maj, min, bld;
4212 int ret, gpxe = 0;
4213 char *fw_name;
4214
4215 maj = vdev->config.device_hw_info.fw_version.major;
4216 min = vdev->config.device_hw_info.fw_version.minor;
4217 bld = vdev->config.device_hw_info.fw_version.build;
4218
4219 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4220 return 0;
4221
4222 /* Ignore the build number when determining if the current firmware is
4223 * "too new" to load the driver
4224 */
4225 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4226 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4227 "version, unable to load driver\n",
4228 VXGE_DRIVER_NAME);
4229 return -EINVAL;
4230 }
4231
4232 /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
4233 * work with this driver.
4234 */
4235 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4236 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4237 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4238 return -EINVAL;
4239 }
4240
4241 /* If file not specified, determine gPXE or not */
4242 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4243 int i;
4244 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4245 if (vdev->devh->eprom_versions[i]) {
4246 gpxe = 1;
4247 break;
4248 }
4249 }
4250 if (gpxe)
4251 fw_name = "vxge/X3fw-pxe.ncf";
4252 else
4253 fw_name = "vxge/X3fw.ncf";
4254
4255 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4256 /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
4257 * probe, so ignore them
4258 */
4259 if (ret != -EINVAL && ret != -ENOENT)
4260 return -EIO;
4261 else
4262 ret = 0;
4263
4264 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4265 VXGE_FW_VER(maj, min, 0)) {
4266 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
c0589fa7 4267 " be used with this driver.",
e8ac1756
JM		 4268 VXGE_DRIVER_NAME, maj, min, bld);
4269 return -EINVAL;
4270 }
4271
4272 return ret;
4273}
4274
3a036ce5 4275static int is_sriov_initialized(struct pci_dev *pdev)
c92bf70d
JM		 4276{
4277 int pos;
4278 u16 ctrl;
4279
4280 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4281 if (pos) {
4282 pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4283 if (ctrl & PCI_SRIOV_CTRL_VFE)
4284 return 1;
4285 }
4286 return 0;
4287}
4288
956a2066 4289static const struct vxge_hw_uld_cbs vxge_callbacks = {
4290 .link_up = vxge_callback_link_up,
4291 .link_down = vxge_callback_link_down,
4292 .crit_err = vxge_callback_crit_err,
4293};
4294
703da5a1
RV		 4295/**
4296 * vxge_probe
4297 * @pdev : structure containing the PCI related information of the device.
4298 * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
4299 * Description:
4300 * This function is called when a new PCI device gets detected and initializes
4301 * it.
4302 * Return value:
4303 * returns 0 on success and negative on failure.
4304 *
4305 */
3a036ce5 4306static int
703da5a1
RV		 4307vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4308{
2c91308f 4309 struct __vxge_hw_device *hldev;
703da5a1
RV		 4310 enum vxge_hw_status status;
4311 int ret;
4312 int high_dma = 0;
4313 u64 vpath_mask = 0;
4314 struct vxgedev *vdev;
7dad171c 4315 struct vxge_config *ll_config = NULL;
703da5a1
RV		 4316 struct vxge_hw_device_config *device_config = NULL;
4317 struct vxge_hw_device_attr attr;
4318 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4319 u8 *macaddr;
4320 struct vxge_mac_addrs *entry;
4321 static int bus = -1, device = -1;
cb27ec60 4322 u32 host_type;
703da5a1 4323 u8 new_device = 0;
cb27ec60
SH		 4324 enum vxge_hw_status is_privileged;
4325 u32 function_mode;
4326 u32 num_vfs = 0;
703da5a1
RV		 4327
4328 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4329 attr.pdev = pdev;
4330
cb27ec60 4331 /* In SRIOV-17 mode, functions of the same adapter
528f7272
JM		 4332 * can be deployed on different buses
4333 */
4334 if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4335 !pdev->is_virtfn)
703da5a1
RV		 4336 new_device = 1;
4337
4338 bus = pdev->bus->number;
4339 device = PCI_SLOT(pdev->devfn);
4340
4341 if (new_device) {
4342 if (driver_config->config_dev_cnt &&
4343 (driver_config->config_dev_cnt !=
4344 driver_config->total_dev_cnt))
4345 vxge_debug_init(VXGE_ERR,
4346 "%s: Configured %d of %d devices",
4347 VXGE_DRIVER_NAME,
4348 driver_config->config_dev_cnt,
4349 driver_config->total_dev_cnt);
4350 driver_config->config_dev_cnt = 0;
4351 driver_config->total_dev_cnt = 0;
703da5a1 4352 }
528f7272 4353
9002397e
SH		 4354 /* Now making the CPU based no of vpath calculation
4355 * applicable for individual functions as well.
4356 */
4357 driver_config->g_no_cpus = 0;
657205bd
SH		 4358 driver_config->vpath_per_dev = max_config_vpath;
4359
703da5a1
RV		 4360 driver_config->total_dev_cnt++;
4361 if (++driver_config->config_dev_cnt > max_config_dev) {
4362 ret = 0;
4363 goto _exit0;
4364 }
4365
4366 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4367 GFP_KERNEL);
4368 if (!device_config) {
4369 ret = -ENOMEM;
4370 vxge_debug_init(VXGE_ERR,
4371 "device_config : malloc failed %s %d",
4372 __FILE__, __LINE__);
4373 goto _exit0;
4374 }
4375
528f7272 4376 ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
7dad171c
PB		 4377 if (!ll_config) {
4378 ret = -ENOMEM;
4379 vxge_debug_init(VXGE_ERR,
528f7272 4380 "device_config : malloc failed %s %d",
7dad171c
PB		 4381 __FILE__, __LINE__);
4382 goto _exit0;
4383 }
4384 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4385 ll_config->intr_type = MSI_X;
4386 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4387 ll_config->rth_steering = RTH_STEERING;
703da5a1
RV		 4388
4389 /* get the default configuration parameters */
4390 vxge_hw_device_config_default_get(device_config);
4391
4392 /* initialize configuration parameters */
7dad171c 4393 vxge_device_config_init(device_config, &ll_config->intr_type);
703da5a1
RV		 4394
4395 ret = pci_enable_device(pdev);
4396 if (ret) {
4397 vxge_debug_init(VXGE_ERR,
4398 "%s : can not enable PCI device", __func__);
4399 goto _exit0;
4400 }
4401
b3837cec 4402 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
703da5a1
RV		 4403 vxge_debug_ll_config(VXGE_TRACE,
4404 "%s : using 64bit DMA", __func__);
4405
4406 high_dma = 1;
4407
4408 if (pci_set_consistent_dma_mask(pdev,
b3837cec 4409 DMA_BIT_MASK(64))) {
703da5a1
RV		 4410 vxge_debug_init(VXGE_ERR,
4411 "%s : unable to obtain 64bit DMA for "
4412 "consistent allocations", __func__);
4413 ret = -ENOMEM;
4414 goto _exit1;
4415 }
b3837cec 4416 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
703da5a1
RV		 4417 vxge_debug_ll_config(VXGE_TRACE,
4418 "%s : using 32bit DMA", __func__);
4419 } else {
4420 ret = -ENOMEM;
4421 goto _exit1;
4422 }
4423
6cca2003
JM		 4424 ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4425 if (ret) {
703da5a1
RV		 4426 vxge_debug_init(VXGE_ERR,
4427 "%s : request regions failed", __func__);
703da5a1
RV		 4428 goto _exit1;
4429 }
4430
4431 pci_set_master(pdev);
4432
4433 attr.bar0 = pci_ioremap_bar(pdev, 0);
4434 if (!attr.bar0) {
4435 vxge_debug_init(VXGE_ERR,
4436 "%s : cannot remap io memory bar0", __func__);
4437 ret = -ENODEV;
4438 goto _exit2;
4439 }
4440 vxge_debug_ll_config(VXGE_TRACE,
4441 "pci ioremap bar0: %p:0x%llx",
4442 attr.bar0,
4443 (unsigned long long)pci_resource_start(pdev, 0));
4444
703da5a1 4445 status = vxge_hw_device_hw_info_get(attr.bar0,
7dad171c 4446 &ll_config->device_hw_info);
703da5a1
RV		 4447 if (status != VXGE_HW_OK) {
4448 vxge_debug_init(VXGE_ERR,
4449 "%s: Reading of hardware info failed."
4450 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4451 ret = -EINVAL;
7975d1ee 4452 goto _exit3;
703da5a1
RV		 4453 }
4454
7dad171c 4455 vpath_mask = ll_config->device_hw_info.vpath_mask;
703da5a1
RV		 4456 if (vpath_mask == 0) {
4457 vxge_debug_ll_config(VXGE_TRACE,
4458 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4459 ret = -EINVAL;
7975d1ee 4460 goto _exit3;
703da5a1
RV		 4461 }
4462
4463 vxge_debug_ll_config(VXGE_TRACE,
4464 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4465 (unsigned long long)vpath_mask);
4466
7dad171c
PB		 4467 function_mode = ll_config->device_hw_info.function_mode;
4468 host_type = ll_config->device_hw_info.host_type;
cb27ec60 4469 is_privileged = __vxge_hw_device_is_privilaged(host_type,
7dad171c 4470 ll_config->device_hw_info.func_id);
cb27ec60 4471
703da5a1
RV		 4472 /* Check how many vpaths are available */
4473 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4474 if (!((vpath_mask) & vxge_mBIT(i)))
4475 continue;
4476 max_vpath_supported++;
4477 }
4478
cb27ec60
SH		 4479 if (new_device)
4480 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4481
5dbc9011 4482 /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
c92bf70d
JM		 4483 if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4484 (ll_config->intr_type != INTA)) {
4485 ret = pci_enable_sriov(pdev, num_vfs);
cb27ec60
SH		 4486 if (ret)
4487 vxge_debug_ll_config(VXGE_ERR,
4488 "Failed in enabling SRIOV mode: %d\n", ret);
c92bf70d 4489 /* No need to fail out, as an error here is non-fatal */
5dbc9011
SS		 4490 }
4491
703da5a1
RV		 4492 /*
4493 * Configure vpaths and get driver configured number of vpaths
4494 * which is less than or equal to the maximum vpaths per function.
4495 */
7dad171c 4496 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
703da5a1
RV		 4497 if (!no_of_vpath) {
4498 vxge_debug_ll_config(VXGE_ERR,
4499 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4500 ret = 0;
7975d1ee 4501 goto _exit3;
703da5a1
RV		 4502 }
4503
4504 /* Setting driver callbacks */
956a2066 4505 attr.uld_callbacks = &vxge_callbacks;
703da5a1
RV		 4506
4507 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4508 if (status != VXGE_HW_OK) {
4509 vxge_debug_init(VXGE_ERR,
4510 "Failed to initialize device (%d)", status);
4511 ret = -EINVAL;
7975d1ee 4512 goto _exit3;
703da5a1
RV		 4513 }
4514
e8ac1756
JM		 4515 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4516 ll_config->device_hw_info.fw_version.minor,
4517 ll_config->device_hw_info.fw_version.build) >=
4518 VXGE_EPROM_FW_VER) {
4519 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4520
4521 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4522 if (status != VXGE_HW_OK) {
4523 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4524 VXGE_DRIVER_NAME);
4525 /* This is a non-fatal error, continue */
4526 }
4527
4528 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4529 hldev->eprom_versions[i] = img[i].version;
4530 if (!img[i].is_valid)
4531 break;
4532 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
1d15f81c 4533 "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
e8ac1756
JM		 4534 VXGE_EPROM_IMG_MAJOR(img[i].version),
4535 VXGE_EPROM_IMG_MINOR(img[i].version),
4536 VXGE_EPROM_IMG_FIX(img[i].version),
4537 VXGE_EPROM_IMG_BUILD(img[i].version));
4538 }
4539 }
4540
fa41fd10 4541 /* if FCS stripping is not disabled in MAC fail driver load */
b81b3733
JM		 4542 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4543 if (status != VXGE_HW_OK) {
4544 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4545 " failing driver load", VXGE_DRIVER_NAME);
fa41fd10
SH		 4546 ret = -EINVAL;
4547 goto _exit4;
4548 }
4549
cd883a79
JM		 4550 /* Always enable HWTS. This will always cause the FCS to be invalid,
4551 * due to the fact that HWTS is using the FCS as the location of the
4552 * timestamp. The HW FCS checking will still correctly determine if
4553 * there is a valid checksum, and the FCS is being removed by the driver
4554 * anyway. So no fucntionality is being lost. Since it is always
4555 * enabled, we now simply use the ioctl call to set whether or not the
4556 * driver should be paying attention to the HWTS.
4557 */
4558 if (is_privileged == VXGE_HW_OK) {
4559 status = vxge_timestamp_config(hldev);
4560 if (status != VXGE_HW_OK) {
4561 vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
4562 VXGE_DRIVER_NAME);
4563 ret = -EFAULT;
4564 goto _exit4;
4565 }
4566 }
4567
703da5a1
RV		 4568 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4569
4570 /* set private device info */
4571 pci_set_drvdata(pdev, hldev);
4572
7dad171c
PB		 4573 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4574 ll_config->addr_learn_en = addr_learn_en;
4575 ll_config->rth_algorithm = RTH_ALG_JENKINS;
47f01db4
JM		 4576 ll_config->rth_hash_type_tcpipv4 = 1;
4577 ll_config->rth_hash_type_ipv4 = 0;
4578 ll_config->rth_hash_type_tcpipv6 = 0;
4579 ll_config->rth_hash_type_ipv6 = 0;
4580 ll_config->rth_hash_type_tcpipv6ex = 0;
4581 ll_config->rth_hash_type_ipv6ex = 0;
7dad171c
PB		 4582 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4583 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4584 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4585
e8ac1756
JM		 4586 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4587 &vdev);
4588 if (ret) {
703da5a1 4589 ret = -EINVAL;
7975d1ee 4590 goto _exit4;
703da5a1
RV		 4591 }
4592
e8ac1756
JM		 4593 ret = vxge_probe_fw_update(vdev);
4594 if (ret)
4595 goto _exit5;
4596
703da5a1
RV		 4597 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4598 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4599 vxge_hw_device_trace_level_get(hldev));
4600
4601 /* set private HW device info */
703da5a1
RV		 4602 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4603 vdev->bar0 = attr.bar0;
703da5a1
RV		 4604 vdev->max_vpath_supported = max_vpath_supported;
4605 vdev->no_of_vpath = no_of_vpath;
4606
4607 /* Virtual Path count */
4608 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4609 if (!vxge_bVALn(vpath_mask, i, 1))
4610 continue;
4611 if (j >= vdev->no_of_vpath)
4612 break;
4613
4614 vdev->vpaths[j].is_configured = 1;
4615 vdev->vpaths[j].device_id = i;
703da5a1
RV		 4616 vdev->vpaths[j].ring.driver_id = j;
4617 vdev->vpaths[j].vdev = vdev;
4618 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4619 memcpy((u8 *)vdev->vpaths[j].macaddr,
7dad171c 4620 ll_config->device_hw_info.mac_addrs[i],
703da5a1
RV		 4621 ETH_ALEN);
4622
4623 /* Initialize the mac address list header */
4624 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4625
4626 vdev->vpaths[j].mac_addr_cnt = 0;
4627 vdev->vpaths[j].mcast_addr_cnt = 0;
4628 j++;
4629 }
4630 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4631 vdev->max_config_port = max_config_port;
4632
4633 vdev->vlan_tag_strip = vlan_tag_strip;
4634
4635 /* map the hashing selector table to the configured vpaths */
4636 for (i = 0; i < vdev->no_of_vpath; i++)
4637 vdev->vpath_selector[i] = vpath_selector[i];
4638
4639 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4640
7dad171c
PB		 4641 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4642 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4643 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
703da5a1
RV		 4644
4645 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
7dad171c 4646 vdev->ndev->name, ll_config->device_hw_info.serial_number);
703da5a1
RV		 4647
4648 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
7dad171c 4649 vdev->ndev->name, ll_config->device_hw_info.part_number);
703da5a1
RV		 4650
4651 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
7dad171c 4652 vdev->ndev->name, ll_config->device_hw_info.product_desc);
703da5a1 4653
bf54e736 4654 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4655 vdev->ndev->name, macaddr);
703da5a1
RV		 4656
4657 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4658 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4659
4660 vxge_debug_init(VXGE_TRACE,
4661 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
7dad171c
PB		 4662 ll_config->device_hw_info.fw_version.version,
4663 ll_config->device_hw_info.fw_date.date);
703da5a1 4664
0a25bdc6 4665 if (new_device) {
7dad171c 4666 switch (ll_config->device_hw_info.function_mode) {
0a25bdc6
SH		 4667 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4668 vxge_debug_init(VXGE_TRACE,
4669 "%s: Single Function Mode Enabled", vdev->ndev->name);
4670 break;
4671 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4672 vxge_debug_init(VXGE_TRACE,
4673 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4674 break;
4675 case VXGE_HW_FUNCTION_MODE_SRIOV:
4676 vxge_debug_init(VXGE_TRACE,
4677 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4678 break;
4679 case VXGE_HW_FUNCTION_MODE_MRIOV:
4680 vxge_debug_init(VXGE_TRACE,
4681 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4682 break;
4683 }
4684 }
4685
703da5a1
RV		 4686 vxge_print_parm(vdev, vpath_mask);
4687
4688 /* Store the fw version for ethttool option */
7dad171c 4689 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
703da5a1 4690 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
703da5a1
RV		 4691
4692 /* Copy the station mac address to the list */
4693 for (i = 0; i < vdev->no_of_vpath; i++) {
e80be0b0 4694 entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
703da5a1
RV		 4695 if (NULL == entry) {
4696 vxge_debug_init(VXGE_ERR,
4697 "%s: mac_addr_list : memory allocation failed",
4698 vdev->ndev->name);
4699 ret = -EPERM;
e8ac1756 4700 goto _exit6;
703da5a1
RV		 4701 }
4702 macaddr = (u8 *)&entry->macaddr;
4703 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4704 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4705 vdev->vpaths[i].mac_addr_cnt = 1;
4706 }
4707
914d0d71 4708 kfree(device_config);
eb5f10c2
SH		 4709
4710 /*
4711 * INTA is shared in multi-function mode. This is unlike the INTA
4712 * implementation in MR mode, where each VH has its own INTA message.
4713 * - INTA is masked (disabled) as long as at least one function sets
4714 * its TITAN_MASK_ALL_INT.ALARM bit.
4715 * - INTA is unmasked (enabled) when all enabled functions have cleared
4716 * their own TITAN_MASK_ALL_INT.ALARM bit.
4717 * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
4718 * Though this driver leaves the top level interrupts unmasked while
4719 * leaving the required module interrupt bits masked on exit, there
4720 * could be a rougue driver around that does not follow this procedure
4721 * resulting in a failure to generate interrupts. The following code is
4722 * present to prevent such a failure.
4723 */
4724
7dad171c 4725 if (ll_config->device_hw_info.function_mode ==
eb5f10c2
SH		 4726 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4727 if (vdev->config.intr_type == INTA)
4728 vxge_hw_device_unmask_all(hldev);
4729
703da5a1
RV		 4730 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4731 vdev->ndev->name, __func__, __LINE__);
4732
4733 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4734 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4735 vxge_hw_device_trace_level_get(hldev));
4736
7dad171c 4737 kfree(ll_config);
703da5a1
RV		 4738 return 0;
4739
e8ac1756 4740_exit6:
703da5a1
RV		 4741 for (i = 0; i < vdev->no_of_vpath; i++)
4742 vxge_free_mac_add_list(&vdev->vpaths[i]);
e8ac1756 4743_exit5:
703da5a1 4744 vxge_device_unregister(hldev);
7975d1ee 4745_exit4:
6cca2003 4746 pci_set_drvdata(pdev, NULL);
703da5a1 4747 vxge_hw_device_terminate(hldev);
6cca2003 4748 pci_disable_sriov(pdev);
703da5a1
RV		 4749_exit3:
4750 iounmap(attr.bar0);
4751_exit2:
dc66daa9 4752 pci_release_region(pdev, 0);
703da5a1
RV		 4753_exit1:
4754 pci_disable_device(pdev);
4755_exit0:
7dad171c 4756 kfree(ll_config);
703da5a1
RV		 4757 kfree(device_config);
4758 driver_config->config_dev_cnt--;
6cca2003 4759 driver_config->total_dev_cnt--;
703da5a1
RV		 4760 return ret;
4761}
4762
4763/**
4764 * vxge_rem_nic - Free the PCI device
4765 * @pdev: structure containing the PCI related information of the device.
4766 * Description: This function is called by the Pci subsystem to release a
4767 * PCI device and free up all resource held up by the device.
4768 */
3a036ce5 4769static void vxge_remove(struct pci_dev *pdev)
703da5a1 4770{
2c91308f 4771 struct __vxge_hw_device *hldev;
6cca2003
JM		 4772 struct vxgedev *vdev;
4773 int i;
703da5a1 4774
d8ee7071 4775 hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4776 if (hldev == NULL)
4777 return;
2c91308f 4778
6cca2003 4779 vdev = netdev_priv(hldev->ndev);
703da5a1 4780
2c91308f 4781 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
2c91308f
JM		 4782 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4783 __func__);
703da5a1 4784
6cca2003 4785 for (i = 0; i < vdev->no_of_vpath; i++)
703da5a1 4786 vxge_free_mac_add_list(&vdev->vpaths[i]);
703da5a1 4787
6cca2003
JM		 4788 vxge_device_unregister(hldev);
4789 pci_set_drvdata(pdev, NULL);
4790 /* Do not call pci_disable_sriov here, as it will break child devices */
4791 vxge_hw_device_terminate(hldev);
703da5a1 4792 iounmap(vdev->bar0);
6cca2003
JM		 4793 pci_release_region(pdev, 0);
4794 pci_disable_device(pdev);
4795 driver_config->config_dev_cnt--;
4796 driver_config->total_dev_cnt--;
703da5a1 4797
2c91308f
JM		 4798 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4799 __func__, __LINE__);
2c91308f
JM		 4800 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4801 __LINE__);
703da5a1
RV		 4802}
4803
3646f0e5 4804static const struct pci_error_handlers vxge_err_handler = {
703da5a1
RV		 4805 .error_detected = vxge_io_error_detected,
4806 .slot_reset = vxge_io_slot_reset,
4807 .resume = vxge_io_resume,
4808};
4809
4810static struct pci_driver vxge_driver = {
4811 .name = VXGE_DRIVER_NAME,
4812 .id_table = vxge_id_table,
4813 .probe = vxge_probe,
3a036ce5 4814 .remove = vxge_remove,
703da5a1
RV		 4815#ifdef CONFIG_PM
4816 .suspend = vxge_pm_suspend,
4817 .resume = vxge_pm_resume,
4818#endif
4819 .err_handler = &vxge_err_handler,
4820};
4821
4822static int __init
4823vxge_starter(void)
4824{
4825 int ret = 0;
703da5a1 4826
75f5e1c6
JP		 4827 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4828 pr_info("Driver version: %s\n", DRV_VERSION);
703da5a1
RV		 4829
4830 verify_bandwidth();
4831
4832 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4833 if (!driver_config)
4834 return -ENOMEM;
4835
4836 ret = pci_register_driver(&vxge_driver);
528f7272
JM		 4837 if (ret) {
4838 kfree(driver_config);
4839 goto err;
4840 }
703da5a1
RV		 4841
4842 if (driver_config->config_dev_cnt &&
4843 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4844 vxge_debug_init(VXGE_ERR,
4845 "%s: Configured %d of %d devices",
4846 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4847 driver_config->total_dev_cnt);
528f7272 4848err:
703da5a1
RV		 4849 return ret;
4850}
4851
4852static void __exit
4853vxge_closer(void)
4854{
4855 pci_unregister_driver(&vxge_driver);
4856 kfree(driver_config);
4857}
4858module_init(vxge_starter);
4859module_exit(vxge_closer);
Linux kernel - Deliverables
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