Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / net / ethernet / sfc / mcdi.c
CommitLineData
afd4aea0 1/****************************************************************************
f7a6d2c4
BH
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2008-2013 Solarflare Communications Inc.
afd4aea0
BH
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/delay.h>
42ca087f 11#include <linux/moduleparam.h>
84567995 12#include <linux/atomic.h>
afd4aea0
BH
13#include "net_driver.h"
14#include "nic.h"
15#include "io.h"
8b8a95a1 16#include "farch_regs.h"
afd4aea0
BH
17#include "mcdi_pcol.h"
18#include "phy.h"
19
20/**************************************************************************
21 *
22 * Management-Controller-to-Driver Interface
23 *
24 **************************************************************************
25 */
26
ebf98e79 27#define MCDI_RPC_TIMEOUT (10 * HZ)
afd4aea0 28
3f713bf4
BH
29/* A reboot/assertion causes the MCDI status word to be set after the
30 * command word is set or a REBOOT event is sent. If we notice a reboot
b2d32f03 31 * via these mechanisms then wait 250ms for the status word to be set.
d36a08b4 32 */
3f713bf4 33#define MCDI_STATUS_DELAY_US 100
b2d32f03 34#define MCDI_STATUS_DELAY_COUNT 2500
3f713bf4
BH
35#define MCDI_STATUS_SLEEP_MS \
36 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
afd4aea0
BH
37
38#define SEQ_MASK \
39 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
40
cade715f
BH
41struct efx_mcdi_async_param {
42 struct list_head list;
43 unsigned int cmd;
44 size_t inlen;
45 size_t outlen;
1e0b8120 46 bool quiet;
cade715f
BH
47 efx_mcdi_async_completer *complete;
48 unsigned long cookie;
49 /* followed by request/response buffer */
50};
51
52static void efx_mcdi_timeout_async(unsigned long context);
4c75b43a
BH
53static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
54 bool *was_attached_out);
5731d7b3 55static bool efx_mcdi_poll_once(struct efx_nic *efx);
e283546c 56static void efx_mcdi_abandon(struct efx_nic *efx);
afd4aea0 57
42ca087f
EC
58#ifdef CONFIG_SFC_MCDI_LOGGING
59static bool mcdi_logging_default;
60module_param(mcdi_logging_default, bool, 0644);
61MODULE_PARM_DESC(mcdi_logging_default,
62 "Enable MCDI logging on newly-probed functions");
63#endif
64
f073dde0 65int efx_mcdi_init(struct efx_nic *efx)
afd4aea0
BH
66{
67 struct efx_mcdi_iface *mcdi;
4c75b43a 68 bool already_attached;
75aba2a5 69 int rc = -ENOMEM;
afd4aea0 70
f3ad5003
BH
71 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
72 if (!efx->mcdi)
75aba2a5 73 goto fail;
f3ad5003 74
afd4aea0 75 mcdi = efx_mcdi(efx);
cade715f 76 mcdi->efx = efx;
75aba2a5
EC
77#ifdef CONFIG_SFC_MCDI_LOGGING
78 /* consuming code assumes buffer is page-sized */
79 mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
80 if (!mcdi->logging_buffer)
81 goto fail1;
42ca087f 82 mcdi->logging_enabled = mcdi_logging_default;
75aba2a5 83#endif
afd4aea0 84 init_waitqueue_head(&mcdi->wq);
acd43a90 85 init_waitqueue_head(&mcdi->proxy_rx_wq);
afd4aea0 86 spin_lock_init(&mcdi->iface_lock);
251111d9 87 mcdi->state = MCDI_STATE_QUIESCENT;
afd4aea0 88 mcdi->mode = MCDI_MODE_POLL;
cade715f
BH
89 spin_lock_init(&mcdi->async_lock);
90 INIT_LIST_HEAD(&mcdi->async_list);
91 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
92 (unsigned long)mcdi);
afd4aea0
BH
93
94 (void) efx_mcdi_poll_reboot(efx);
d36a08b4 95 mcdi->new_epoch = true;
f073dde0
BH
96
97 /* Recover from a failed assertion before probing */
4c75b43a
BH
98 rc = efx_mcdi_handle_assertion(efx);
99 if (rc)
75aba2a5 100 goto fail2;
4c75b43a
BH
101
102 /* Let the MC (and BMC, if this is a LOM) know that the driver
103 * is loaded. We should do this before we reset the NIC.
104 */
105 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
106 if (rc) {
107 netif_err(efx, probe, efx->net_dev,
108 "Unable to register driver with MCPU\n");
75aba2a5 109 goto fail2;
4c75b43a
BH
110 }
111 if (already_attached)
112 /* Not a fatal error */
113 netif_err(efx, probe, efx->net_dev,
114 "Host already registered with MCPU\n");
115
0bcf4a64
BH
116 if (efx->mcdi->fn_flags &
117 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
118 efx->primary = efx;
119
4c75b43a 120 return 0;
75aba2a5
EC
121fail2:
122#ifdef CONFIG_SFC_MCDI_LOGGING
123 free_page((unsigned long)mcdi->logging_buffer);
124fail1:
125#endif
126 kfree(efx->mcdi);
127 efx->mcdi = NULL;
128fail:
129 return rc;
afd4aea0
BH
130}
131
f3ad5003
BH
132void efx_mcdi_fini(struct efx_nic *efx)
133{
4c75b43a
BH
134 if (!efx->mcdi)
135 return;
136
137 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
138
139 /* Relinquish the device (back to the BMC, if this is a LOM) */
140 efx_mcdi_drv_attach(efx, false, NULL);
141
75aba2a5
EC
142#ifdef CONFIG_SFC_MCDI_LOGGING
143 free_page((unsigned long)efx->mcdi->iface.logging_buffer);
144#endif
145
f3ad5003
BH
146 kfree(efx->mcdi);
147}
148
2f4bcdcc
BH
149static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
150 const efx_dword_t *inbuf, size_t inlen)
afd4aea0
BH
151{
152 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
75aba2a5
EC
153#ifdef CONFIG_SFC_MCDI_LOGGING
154 char *buf = mcdi->logging_buffer; /* page-sized */
155#endif
df2cd8af
BH
156 efx_dword_t hdr[2];
157 size_t hdr_len;
afd4aea0
BH
158 u32 xflags, seqno;
159
251111d9 160 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
afd4aea0 161
2f4bcdcc
BH
162 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
163 spin_lock_bh(&mcdi->iface_lock);
164 ++mcdi->seqno;
165 spin_unlock_bh(&mcdi->iface_lock);
166
afd4aea0
BH
167 seqno = mcdi->seqno & SEQ_MASK;
168 xflags = 0;
169 if (mcdi->mode == MCDI_MODE_EVENTS)
170 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
171
df2cd8af
BH
172 if (efx->type->mcdi_max_ver == 1) {
173 /* MCDI v1 */
d36a08b4 174 EFX_POPULATE_DWORD_7(hdr[0],
df2cd8af
BH
175 MCDI_HEADER_RESPONSE, 0,
176 MCDI_HEADER_RESYNC, 1,
177 MCDI_HEADER_CODE, cmd,
178 MCDI_HEADER_DATALEN, inlen,
179 MCDI_HEADER_SEQ, seqno,
d36a08b4
DP
180 MCDI_HEADER_XFLAGS, xflags,
181 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
df2cd8af
BH
182 hdr_len = 4;
183 } else {
184 /* MCDI v2 */
185 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
d36a08b4 186 EFX_POPULATE_DWORD_7(hdr[0],
df2cd8af
BH
187 MCDI_HEADER_RESPONSE, 0,
188 MCDI_HEADER_RESYNC, 1,
189 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
190 MCDI_HEADER_DATALEN, 0,
191 MCDI_HEADER_SEQ, seqno,
d36a08b4
DP
192 MCDI_HEADER_XFLAGS, xflags,
193 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
df2cd8af
BH
194 EFX_POPULATE_DWORD_2(hdr[1],
195 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
196 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
197 hdr_len = 8;
198 }
afd4aea0 199
75aba2a5 200#ifdef CONFIG_SFC_MCDI_LOGGING
e7fef9b4 201 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
75aba2a5
EC
202 int bytes = 0;
203 int i;
204 /* Lengths should always be a whole number of dwords, so scream
205 * if they're not.
206 */
207 WARN_ON_ONCE(hdr_len % 4);
208 WARN_ON_ONCE(inlen % 4);
209
210 /* We own the logging buffer, as only one MCDI can be in
211 * progress on a NIC at any one time. So no need for locking.
212 */
213 for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
214 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
215 " %08x", le32_to_cpu(hdr[i].u32[0]));
216
217 for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
218 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
219 " %08x", le32_to_cpu(inbuf[i].u32[0]));
220
221 netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
222 }
223#endif
224
df2cd8af 225 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
2f4bcdcc
BH
226
227 mcdi->new_epoch = false;
afd4aea0
BH
228}
229
5bc283e5
BH
230static int efx_mcdi_errno(unsigned int mcdi_err)
231{
232 switch (mcdi_err) {
233 case 0:
234 return 0;
235#define TRANSLATE_ERROR(name) \
236 case MC_CMD_ERR_ ## name: \
237 return -name;
df2cd8af 238 TRANSLATE_ERROR(EPERM);
5bc283e5
BH
239 TRANSLATE_ERROR(ENOENT);
240 TRANSLATE_ERROR(EINTR);
df2cd8af 241 TRANSLATE_ERROR(EAGAIN);
5bc283e5
BH
242 TRANSLATE_ERROR(EACCES);
243 TRANSLATE_ERROR(EBUSY);
244 TRANSLATE_ERROR(EINVAL);
245 TRANSLATE_ERROR(EDEADLK);
246 TRANSLATE_ERROR(ENOSYS);
247 TRANSLATE_ERROR(ETIME);
df2cd8af
BH
248 TRANSLATE_ERROR(EALREADY);
249 TRANSLATE_ERROR(ENOSPC);
5bc283e5 250#undef TRANSLATE_ERROR
ea136ae7
BH
251 case MC_CMD_ERR_ENOTSUP:
252 return -EOPNOTSUPP;
df2cd8af
BH
253 case MC_CMD_ERR_ALLOC_FAIL:
254 return -ENOBUFS;
255 case MC_CMD_ERR_MAC_EXIST:
256 return -EADDRINUSE;
5bc283e5 257 default:
df2cd8af
BH
258 return -EPROTO;
259 }
260}
261
262static void efx_mcdi_read_response_header(struct efx_nic *efx)
263{
264 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
265 unsigned int respseq, respcmd, error;
75aba2a5
EC
266#ifdef CONFIG_SFC_MCDI_LOGGING
267 char *buf = mcdi->logging_buffer; /* page-sized */
268#endif
df2cd8af
BH
269 efx_dword_t hdr;
270
271 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
272 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
273 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
274 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
275
276 if (respcmd != MC_CMD_V2_EXTN) {
277 mcdi->resp_hdr_len = 4;
278 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
279 } else {
280 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
281 mcdi->resp_hdr_len = 8;
282 mcdi->resp_data_len =
283 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
284 }
285
75aba2a5 286#ifdef CONFIG_SFC_MCDI_LOGGING
e7fef9b4 287 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
75aba2a5
EC
288 size_t hdr_len, data_len;
289 int bytes = 0;
290 int i;
291
292 WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
293 hdr_len = mcdi->resp_hdr_len / 4;
294 /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
295 * to dword size, and the MCDI buffer is always dword size
296 */
297 data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
298
299 /* We own the logging buffer, as only one MCDI can be in
300 * progress on a NIC at any one time. So no need for locking.
301 */
302 for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
303 efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
304 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
305 " %08x", le32_to_cpu(hdr.u32[0]));
306 }
307
308 for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
309 efx->type->mcdi_read_response(efx, &hdr,
310 mcdi->resp_hdr_len + (i * 4), 4);
311 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
312 " %08x", le32_to_cpu(hdr.u32[0]));
313 }
314
315 netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
316 }
317#endif
318
ac28d179 319 mcdi->resprc_raw = 0;
df2cd8af
BH
320 if (error && mcdi->resp_data_len == 0) {
321 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
322 mcdi->resprc = -EIO;
323 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
324 netif_err(efx, hw, efx->net_dev,
325 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
326 respseq, mcdi->seqno);
327 mcdi->resprc = -EIO;
328 } else if (error) {
329 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
ac28d179
BK
330 mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0);
331 mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw);
df2cd8af
BH
332 } else {
333 mcdi->resprc = 0;
5bc283e5
BH
334 }
335}
336
5731d7b3
RS
337static bool efx_mcdi_poll_once(struct efx_nic *efx)
338{
339 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
340
341 rmb();
342 if (!efx->type->mcdi_poll_response(efx))
343 return false;
344
345 spin_lock_bh(&mcdi->iface_lock);
346 efx_mcdi_read_response_header(efx);
347 spin_unlock_bh(&mcdi->iface_lock);
348
349 return true;
350}
351
afd4aea0
BH
352static int efx_mcdi_poll(struct efx_nic *efx)
353{
354 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
ebf98e79 355 unsigned long time, finish;
5bc283e5 356 unsigned int spins;
5bc283e5 357 int rc;
afd4aea0
BH
358
359 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
5bc283e5 360 rc = efx_mcdi_poll_reboot(efx);
df2cd8af 361 if (rc) {
369327fa 362 spin_lock_bh(&mcdi->iface_lock);
df2cd8af
BH
363 mcdi->resprc = rc;
364 mcdi->resp_hdr_len = 0;
365 mcdi->resp_data_len = 0;
369327fa 366 spin_unlock_bh(&mcdi->iface_lock);
df2cd8af
BH
367 return 0;
368 }
afd4aea0
BH
369
370 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
371 * because generally mcdi responses are fast. After that, back off
372 * and poll once a jiffy (approximately)
373 */
374 spins = TICK_USEC;
ebf98e79 375 finish = jiffies + MCDI_RPC_TIMEOUT;
afd4aea0
BH
376
377 while (1) {
378 if (spins != 0) {
379 --spins;
380 udelay(1);
55029c1d
BH
381 } else {
382 schedule_timeout_uninterruptible(1);
383 }
afd4aea0 384
ebf98e79 385 time = jiffies;
afd4aea0 386
5731d7b3 387 if (efx_mcdi_poll_once(efx))
afd4aea0
BH
388 break;
389
ebf98e79 390 if (time_after(time, finish))
afd4aea0
BH
391 return -ETIMEDOUT;
392 }
393
afd4aea0
BH
394 /* Return rc=0 like wait_event_timeout() */
395 return 0;
396}
397
876be083
BH
398/* Test and clear MC-rebooted flag for this port/function; reset
399 * software state as necessary.
400 */
afd4aea0
BH
401int efx_mcdi_poll_reboot(struct efx_nic *efx)
402{
f3ad5003
BH
403 if (!efx->mcdi)
404 return 0;
afd4aea0 405
cd0ecc9a 406 return efx->type->mcdi_poll_reboot(efx);
afd4aea0
BH
407}
408
cade715f
BH
409static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
410{
411 return cmpxchg(&mcdi->state,
412 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
413 MCDI_STATE_QUIESCENT;
414}
415
416static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
afd4aea0
BH
417{
418 /* Wait until the interface becomes QUIESCENT and we win the race
cade715f
BH
419 * to mark it RUNNING_SYNC.
420 */
afd4aea0 421 wait_event(mcdi->wq,
251111d9 422 cmpxchg(&mcdi->state,
cade715f 423 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
251111d9 424 MCDI_STATE_QUIESCENT);
afd4aea0
BH
425}
426
427static int efx_mcdi_await_completion(struct efx_nic *efx)
428{
429 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
430
251111d9
BH
431 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
432 MCDI_RPC_TIMEOUT) == 0)
afd4aea0
BH
433 return -ETIMEDOUT;
434
435 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
436 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
437 * completed the request first, then we'll just end up completing the
438 * request again, which is safe.
439 *
440 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
441 * wait_event_timeout() implicitly provides.
442 */
443 if (mcdi->mode == MCDI_MODE_POLL)
444 return efx_mcdi_poll(efx);
445
446 return 0;
447}
448
cade715f
BH
449/* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
450 * requester. Return whether this was done. Does not take any locks.
451 */
452static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
afd4aea0 453{
cade715f
BH
454 if (cmpxchg(&mcdi->state,
455 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
456 MCDI_STATE_RUNNING_SYNC) {
afd4aea0
BH
457 wake_up(&mcdi->wq);
458 return true;
459 }
460
461 return false;
462}
463
464static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
465{
cade715f
BH
466 if (mcdi->mode == MCDI_MODE_EVENTS) {
467 struct efx_mcdi_async_param *async;
468 struct efx_nic *efx = mcdi->efx;
469
470 /* Process the asynchronous request queue */
471 spin_lock_bh(&mcdi->async_lock);
472 async = list_first_entry_or_null(
473 &mcdi->async_list, struct efx_mcdi_async_param, list);
474 if (async) {
475 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
476 efx_mcdi_send_request(efx, async->cmd,
477 (const efx_dword_t *)(async + 1),
478 async->inlen);
479 mod_timer(&mcdi->async_timer,
480 jiffies + MCDI_RPC_TIMEOUT);
481 }
482 spin_unlock_bh(&mcdi->async_lock);
483
484 if (async)
485 return;
486 }
487
251111d9 488 mcdi->state = MCDI_STATE_QUIESCENT;
afd4aea0
BH
489 wake_up(&mcdi->wq);
490}
491
cade715f
BH
492/* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
493 * asynchronous completion function, and release the interface.
494 * Return whether this was done. Must be called in bh-disabled
495 * context. Will take iface_lock and async_lock.
496 */
497static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
498{
499 struct efx_nic *efx = mcdi->efx;
500 struct efx_mcdi_async_param *async;
1e0b8120 501 size_t hdr_len, data_len, err_len;
cade715f 502 efx_dword_t *outbuf;
aa09a3da 503 MCDI_DECLARE_BUF_ERR(errbuf);
cade715f
BH
504 int rc;
505
506 if (cmpxchg(&mcdi->state,
507 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
508 MCDI_STATE_RUNNING_ASYNC)
509 return false;
510
511 spin_lock(&mcdi->iface_lock);
512 if (timeout) {
513 /* Ensure that if the completion event arrives later,
514 * the seqno check in efx_mcdi_ev_cpl() will fail
515 */
516 ++mcdi->seqno;
517 ++mcdi->credits;
518 rc = -ETIMEDOUT;
519 hdr_len = 0;
520 data_len = 0;
521 } else {
522 rc = mcdi->resprc;
523 hdr_len = mcdi->resp_hdr_len;
524 data_len = mcdi->resp_data_len;
525 }
526 spin_unlock(&mcdi->iface_lock);
527
528 /* Stop the timer. In case the timer function is running, we
529 * must wait for it to return so that there is no possibility
530 * of it aborting the next request.
531 */
532 if (!timeout)
533 del_timer_sync(&mcdi->async_timer);
534
535 spin_lock(&mcdi->async_lock);
536 async = list_first_entry(&mcdi->async_list,
537 struct efx_mcdi_async_param, list);
538 list_del(&async->list);
539 spin_unlock(&mcdi->async_lock);
540
541 outbuf = (efx_dword_t *)(async + 1);
542 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
543 min(async->outlen, data_len));
1e0b8120
EC
544 if (!timeout && rc && !async->quiet) {
545 err_len = min(sizeof(errbuf), data_len);
546 efx->type->mcdi_read_response(efx, errbuf, hdr_len,
547 sizeof(errbuf));
548 efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
549 err_len, rc);
550 }
cade715f
BH
551 async->complete(efx, async->cookie, rc, outbuf, data_len);
552 kfree(async);
553
554 efx_mcdi_release(mcdi);
555
556 return true;
557}
558
afd4aea0 559static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
5bc283e5 560 unsigned int datalen, unsigned int mcdi_err)
afd4aea0
BH
561{
562 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
563 bool wake = false;
564
565 spin_lock(&mcdi->iface_lock);
566
567 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
568 if (mcdi->credits)
569 /* The request has been cancelled */
570 --mcdi->credits;
571 else
62776d03
BH
572 netif_err(efx, hw, efx->net_dev,
573 "MC response mismatch tx seq 0x%x rx "
574 "seq 0x%x\n", seqno, mcdi->seqno);
afd4aea0 575 } else {
df2cd8af
BH
576 if (efx->type->mcdi_max_ver >= 2) {
577 /* MCDI v2 responses don't fit in an event */
578 efx_mcdi_read_response_header(efx);
579 } else {
580 mcdi->resprc = efx_mcdi_errno(mcdi_err);
581 mcdi->resp_hdr_len = 4;
582 mcdi->resp_data_len = datalen;
583 }
afd4aea0
BH
584
585 wake = true;
586 }
587
588 spin_unlock(&mcdi->iface_lock);
589
cade715f
BH
590 if (wake) {
591 if (!efx_mcdi_complete_async(mcdi, false))
592 (void) efx_mcdi_complete_sync(mcdi);
593
594 /* If the interface isn't RUNNING_ASYNC or
595 * RUNNING_SYNC then we've received a duplicate
596 * completion after we've already transitioned back to
597 * QUIESCENT. [A subsequent invocation would increment
598 * seqno, so would have failed the seqno check].
599 */
600 }
601}
602
603static void efx_mcdi_timeout_async(unsigned long context)
604{
605 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
606
607 efx_mcdi_complete_async(mcdi, true);
afd4aea0
BH
608}
609
2f4bcdcc
BH
610static int
611efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
612{
613 if (efx->type->mcdi_max_ver < 0 ||
614 (efx->type->mcdi_max_ver < 2 &&
615 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
616 return -EINVAL;
617
618 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
619 (efx->type->mcdi_max_ver < 2 &&
620 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
621 return -EMSGSIZE;
622
623 return 0;
624}
625
acd43a90
BK
626static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx,
627 size_t hdr_len, size_t data_len,
628 u32 *proxy_handle)
629{
630 MCDI_DECLARE_BUF_ERR(testbuf);
631 const size_t buflen = sizeof(testbuf);
632
633 if (!proxy_handle || data_len < buflen)
634 return false;
635
636 efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen);
637 if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) {
638 *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE);
639 return true;
640 }
641
642 return false;
643}
644
645static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
646 size_t inlen,
1e0b8120 647 efx_dword_t *outbuf, size_t outlen,
ac28d179 648 size_t *outlen_actual, bool quiet,
acd43a90 649 u32 *proxy_handle, int *raw_rc)
1e0b8120
EC
650{
651 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
aa09a3da 652 MCDI_DECLARE_BUF_ERR(errbuf);
1e0b8120
EC
653 int rc;
654
655 if (mcdi->mode == MCDI_MODE_POLL)
656 rc = efx_mcdi_poll(efx);
657 else
658 rc = efx_mcdi_await_completion(efx);
659
660 if (rc != 0) {
661 netif_err(efx, hw, efx->net_dev,
662 "MC command 0x%x inlen %d mode %d timed out\n",
663 cmd, (int)inlen, mcdi->mode);
664
665 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
666 netif_err(efx, hw, efx->net_dev,
667 "MCDI request was completed without an event\n");
668 rc = 0;
669 }
670
e283546c
EC
671 efx_mcdi_abandon(efx);
672
1e0b8120
EC
673 /* Close the race with efx_mcdi_ev_cpl() executing just too late
674 * and completing a request we've just cancelled, by ensuring
675 * that the seqno check therein fails.
676 */
677 spin_lock_bh(&mcdi->iface_lock);
678 ++mcdi->seqno;
679 ++mcdi->credits;
680 spin_unlock_bh(&mcdi->iface_lock);
681 }
682
acd43a90
BK
683 if (proxy_handle)
684 *proxy_handle = 0;
685
1e0b8120
EC
686 if (rc != 0) {
687 if (outlen_actual)
688 *outlen_actual = 0;
689 } else {
690 size_t hdr_len, data_len, err_len;
691
692 /* At the very least we need a memory barrier here to ensure
693 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
694 * a spurious efx_mcdi_ev_cpl() running concurrently by
695 * acquiring the iface_lock. */
696 spin_lock_bh(&mcdi->iface_lock);
697 rc = mcdi->resprc;
ac28d179
BK
698 if (raw_rc)
699 *raw_rc = mcdi->resprc_raw;
1e0b8120
EC
700 hdr_len = mcdi->resp_hdr_len;
701 data_len = mcdi->resp_data_len;
702 err_len = min(sizeof(errbuf), data_len);
703 spin_unlock_bh(&mcdi->iface_lock);
704
705 BUG_ON(rc > 0);
706
707 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
708 min(outlen, data_len));
709 if (outlen_actual)
710 *outlen_actual = data_len;
711
712 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
713
714 if (cmd == MC_CMD_REBOOT && rc == -EIO) {
715 /* Don't reset if MC_CMD_REBOOT returns EIO */
716 } else if (rc == -EIO || rc == -EINTR) {
717 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
718 -rc);
719 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
acd43a90
BK
720 } else if (proxy_handle && (rc == -EPROTO) &&
721 efx_mcdi_get_proxy_handle(efx, hdr_len, data_len,
722 proxy_handle)) {
723 mcdi->proxy_rx_status = 0;
724 mcdi->proxy_rx_handle = 0;
725 mcdi->state = MCDI_STATE_PROXY_WAIT;
1e0b8120
EC
726 } else if (rc && !quiet) {
727 efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
728 rc);
729 }
730
731 if (rc == -EIO || rc == -EINTR) {
732 msleep(MCDI_STATUS_SLEEP_MS);
733 efx_mcdi_poll_reboot(efx);
734 mcdi->new_epoch = true;
735 }
736 }
737
acd43a90
BK
738 if (!proxy_handle || !*proxy_handle)
739 efx_mcdi_release(mcdi);
1e0b8120
EC
740 return rc;
741}
742
acd43a90
BK
743static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi)
744{
745 if (mcdi->state == MCDI_STATE_PROXY_WAIT) {
746 /* Interrupt the proxy wait. */
747 mcdi->proxy_rx_status = -EINTR;
748 wake_up(&mcdi->proxy_rx_wq);
749 }
750}
751
752static void efx_mcdi_ev_proxy_response(struct efx_nic *efx,
753 u32 handle, int status)
754{
755 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
756
757 WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT);
758
759 mcdi->proxy_rx_status = efx_mcdi_errno(status);
760 /* Ensure the status is written before we update the handle, since the
761 * latter is used to check if we've finished.
762 */
763 wmb();
764 mcdi->proxy_rx_handle = handle;
765 wake_up(&mcdi->proxy_rx_wq);
766}
767
768static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet)
769{
770 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
771 int rc;
772
773 /* Wait for a proxy event, or timeout. */
774 rc = wait_event_timeout(mcdi->proxy_rx_wq,
775 mcdi->proxy_rx_handle != 0 ||
776 mcdi->proxy_rx_status == -EINTR,
777 MCDI_RPC_TIMEOUT);
778
779 if (rc <= 0) {
780 netif_dbg(efx, hw, efx->net_dev,
781 "MCDI proxy timeout %d\n", handle);
782 return -ETIMEDOUT;
783 } else if (mcdi->proxy_rx_handle != handle) {
784 netif_warn(efx, hw, efx->net_dev,
785 "MCDI proxy unexpected handle %d (expected %d)\n",
786 mcdi->proxy_rx_handle, handle);
787 return -EINVAL;
788 }
789
790 return mcdi->proxy_rx_status;
791}
792
793static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
1e0b8120
EC
794 const efx_dword_t *inbuf, size_t inlen,
795 efx_dword_t *outbuf, size_t outlen,
ac28d179 796 size_t *outlen_actual, bool quiet, int *raw_rc)
1e0b8120 797{
acd43a90 798 u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */
1e0b8120
EC
799 int rc;
800
acd43a90
BK
801 if (inbuf && inlen && (inbuf == outbuf)) {
802 /* The input buffer can't be aliased with the output. */
803 WARN_ON(1);
804 return -EINVAL;
805 }
806
1e0b8120 807 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
ac28d179 808 if (rc)
1e0b8120 809 return rc;
ac28d179 810
acd43a90
BK
811 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
812 outlen_actual, quiet, &proxy_handle, raw_rc);
813
814 if (proxy_handle) {
815 /* Handle proxy authorisation. This allows approval of MCDI
816 * operations to be delegated to the admin function, allowing
817 * fine control over (eg) multicast subscriptions.
818 */
819 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
820
821 netif_dbg(efx, hw, efx->net_dev,
822 "MCDI waiting for proxy auth %d\n",
823 proxy_handle);
824 rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet);
825
826 if (rc == 0) {
827 netif_dbg(efx, hw, efx->net_dev,
828 "MCDI proxy retry %d\n", proxy_handle);
829
830 /* We now retry the original request. */
831 mcdi->state = MCDI_STATE_RUNNING_SYNC;
832 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
833
834 rc = _efx_mcdi_rpc_finish(efx, cmd, inlen,
835 outbuf, outlen, outlen_actual,
836 quiet, NULL, raw_rc);
837 } else {
838 netif_printk(efx, hw,
839 rc == -EPERM ? KERN_DEBUG : KERN_ERR,
840 efx->net_dev,
841 "MC command 0x%x failed after proxy auth rc=%d\n",
842 cmd, rc);
843
844 if (rc == -EINTR || rc == -EIO)
845 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
846 efx_mcdi_release(mcdi);
847 }
848 }
849
850 return rc;
ac28d179
BK
851}
852
853static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd,
854 const efx_dword_t *inbuf, size_t inlen,
855 efx_dword_t *outbuf, size_t outlen,
856 size_t *outlen_actual, bool quiet)
857{
858 int raw_rc = 0;
859 int rc;
860
861 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
862 outbuf, outlen, outlen_actual, true, &raw_rc);
863
864 if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
865 efx->type->is_vf) {
866 /* If the EVB port isn't available within a VF this may
867 * mean the PF is still bringing the switch up. We should
868 * retry our request shortly.
869 */
870 unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT;
871 unsigned int delay_us = 10000;
872
873 netif_dbg(efx, hw, efx->net_dev,
874 "%s: NO_EVB_PORT; will retry request\n",
875 __func__);
876
877 do {
878 usleep_range(delay_us, delay_us + 10000);
879 rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
880 outbuf, outlen, outlen_actual,
881 true, &raw_rc);
882 if (delay_us < 100000)
883 delay_us <<= 1;
884 } while ((rc == -EPROTO) &&
885 (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
886 time_before(jiffies, abort_time));
887 }
888
889 if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO))
890 efx_mcdi_display_error(efx, cmd, inlen,
891 outbuf, outlen, rc);
892
893 return rc;
1e0b8120
EC
894}
895
ac28d179
BK
896/**
897 * efx_mcdi_rpc - Issue an MCDI command and wait for completion
898 * @efx: NIC through which to issue the command
899 * @cmd: Command type number
900 * @inbuf: Command parameters
901 * @inlen: Length of command parameters, in bytes. Must be a multiple
902 * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1.
903 * @outbuf: Response buffer. May be %NULL if @outlen is 0.
904 * @outlen: Length of response buffer, in bytes. If the actual
905 * response is longer than @outlen & ~3, it will be truncated
906 * to that length.
907 * @outlen_actual: Pointer through which to return the actual response
908 * length. May be %NULL if this is not needed.
909 *
910 * This function may sleep and therefore must be called in an appropriate
911 * context.
912 *
913 * Return: A negative error code, or zero if successful. The error
914 * code may come from the MCDI response or may indicate a failure
915 * to communicate with the MC. In the former case, the response
916 * will still be copied to @outbuf and *@outlen_actual will be
917 * set accordingly. In the latter case, *@outlen_actual will be
918 * set to zero.
919 */
afd4aea0 920int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
9528b921
BH
921 const efx_dword_t *inbuf, size_t inlen,
922 efx_dword_t *outbuf, size_t outlen,
afd4aea0 923 size_t *outlen_actual)
c3cba721 924{
ac28d179
BK
925 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
926 outlen_actual, false);
1e0b8120 927}
df2cd8af 928
1e0b8120
EC
929/* Normally, on receiving an error code in the MCDI response,
930 * efx_mcdi_rpc will log an error message containing (among other
931 * things) the raw error code, by means of efx_mcdi_display_error.
932 * This _quiet version suppresses that; if the caller wishes to log
933 * the error conditionally on the return code, it should call this
934 * function and is then responsible for calling efx_mcdi_display_error
935 * as needed.
936 */
937int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
938 const efx_dword_t *inbuf, size_t inlen,
939 efx_dword_t *outbuf, size_t outlen,
940 size_t *outlen_actual)
941{
ac28d179
BK
942 return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
943 outlen_actual, true);
c3cba721
SH
944}
945
df2cd8af
BH
946int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
947 const efx_dword_t *inbuf, size_t inlen)
afd4aea0
BH
948{
949 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2f4bcdcc 950 int rc;
c3cba721 951
2f4bcdcc
BH
952 rc = efx_mcdi_check_supported(efx, cmd, inlen);
953 if (rc)
954 return rc;
df2cd8af 955
74cd60a4
JC
956 if (efx->mc_bist_for_other_fn)
957 return -ENETDOWN;
958
e283546c
EC
959 if (mcdi->mode == MCDI_MODE_FAIL)
960 return -ENETDOWN;
961
cade715f 962 efx_mcdi_acquire_sync(mcdi);
2f4bcdcc 963 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
df2cd8af 964 return 0;
c3cba721
SH
965}
966
1e0b8120
EC
967static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
968 const efx_dword_t *inbuf, size_t inlen,
969 size_t outlen,
970 efx_mcdi_async_completer *complete,
971 unsigned long cookie, bool quiet)
cade715f
BH
972{
973 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
974 struct efx_mcdi_async_param *async;
975 int rc;
976
977 rc = efx_mcdi_check_supported(efx, cmd, inlen);
978 if (rc)
979 return rc;
980
74cd60a4
JC
981 if (efx->mc_bist_for_other_fn)
982 return -ENETDOWN;
983
cade715f
BH
984 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
985 GFP_ATOMIC);
986 if (!async)
987 return -ENOMEM;
988
989 async->cmd = cmd;
990 async->inlen = inlen;
991 async->outlen = outlen;
1e0b8120 992 async->quiet = quiet;
cade715f
BH
993 async->complete = complete;
994 async->cookie = cookie;
995 memcpy(async + 1, inbuf, inlen);
996
997 spin_lock_bh(&mcdi->async_lock);
998
999 if (mcdi->mode == MCDI_MODE_EVENTS) {
1000 list_add_tail(&async->list, &mcdi->async_list);
1001
1002 /* If this is at the front of the queue, try to start it
1003 * immediately
1004 */
1005 if (mcdi->async_list.next == &async->list &&
1006 efx_mcdi_acquire_async(mcdi)) {
1007 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
1008 mod_timer(&mcdi->async_timer,
1009 jiffies + MCDI_RPC_TIMEOUT);
1010 }
1011 } else {
1012 kfree(async);
1013 rc = -ENETDOWN;
1014 }
1015
1016 spin_unlock_bh(&mcdi->async_lock);
1017
1018 return rc;
1019}
1020
1e0b8120
EC
1021/**
1022 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
1023 * @efx: NIC through which to issue the command
1024 * @cmd: Command type number
1025 * @inbuf: Command parameters
1026 * @inlen: Length of command parameters, in bytes
1027 * @outlen: Length to allocate for response buffer, in bytes
1028 * @complete: Function to be called on completion or cancellation.
1029 * @cookie: Arbitrary value to be passed to @complete.
1030 *
1031 * This function does not sleep and therefore may be called in atomic
1032 * context. It will fail if event queues are disabled or if MCDI
1033 * event completions have been disabled due to an error.
1034 *
1035 * If it succeeds, the @complete function will be called exactly once
1036 * in atomic context, when one of the following occurs:
1037 * (a) the completion event is received (in NAPI context)
1038 * (b) event queues are disabled (in the process that disables them)
1039 * (c) the request times-out (in timer context)
1040 */
1041int
1042efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
1043 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
1044 efx_mcdi_async_completer *complete, unsigned long cookie)
1045{
1046 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1047 cookie, false);
1048}
1049
1050int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
1051 const efx_dword_t *inbuf, size_t inlen,
1052 size_t outlen, efx_mcdi_async_completer *complete,
1053 unsigned long cookie)
1054{
1055 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
1056 cookie, true);
1057}
1058
c3cba721 1059int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
9528b921
BH
1060 efx_dword_t *outbuf, size_t outlen,
1061 size_t *outlen_actual)
c3cba721 1062{
1e0b8120 1063 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
acd43a90 1064 outlen_actual, false, NULL, NULL);
1e0b8120 1065}
5bc283e5 1066
1e0b8120
EC
1067int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
1068 efx_dword_t *outbuf, size_t outlen,
1069 size_t *outlen_actual)
1070{
1071 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
acd43a90 1072 outlen_actual, true, NULL, NULL);
1e0b8120 1073}
3f713bf4 1074
1e0b8120
EC
1075void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
1076 size_t inlen, efx_dword_t *outbuf,
1077 size_t outlen, int rc)
1078{
1079 int code = 0, err_arg = 0;
afd4aea0 1080
1e0b8120
EC
1081 if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
1082 code = MCDI_DWORD(outbuf, ERR_CODE);
1083 if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
1084 err_arg = MCDI_DWORD(outbuf, ERR_ARG);
8c578368
TP
1085 netif_printk(efx, hw, rc == -EPERM ? KERN_DEBUG : KERN_ERR,
1086 efx->net_dev,
1087 "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n",
1088 cmd, inlen, rc, code, err_arg);
afd4aea0
BH
1089}
1090
cade715f
BH
1091/* Switch to polled MCDI completions. This can be called in various
1092 * error conditions with various locks held, so it must be lockless.
1093 * Caller is responsible for flushing asynchronous requests later.
1094 */
afd4aea0
BH
1095void efx_mcdi_mode_poll(struct efx_nic *efx)
1096{
1097 struct efx_mcdi_iface *mcdi;
1098
f3ad5003 1099 if (!efx->mcdi)
afd4aea0
BH
1100 return;
1101
1102 mcdi = efx_mcdi(efx);
e283546c
EC
1103 /* If already in polling mode, nothing to do.
1104 * If in fail-fast state, don't switch to polled completion.
1105 * FLR recovery will do that later.
1106 */
1107 if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
afd4aea0
BH
1108 return;
1109
1110 /* We can switch from event completion to polled completion, because
1111 * mcdi requests are always completed in shared memory. We do this by
1112 * switching the mode to POLL'd then completing the request.
1113 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
1114 *
1115 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
cade715f 1116 * which efx_mcdi_complete_sync() provides for us.
afd4aea0
BH
1117 */
1118 mcdi->mode = MCDI_MODE_POLL;
1119
cade715f
BH
1120 efx_mcdi_complete_sync(mcdi);
1121}
1122
1123/* Flush any running or queued asynchronous requests, after event processing
1124 * is stopped
1125 */
1126void efx_mcdi_flush_async(struct efx_nic *efx)
1127{
1128 struct efx_mcdi_async_param *async, *next;
1129 struct efx_mcdi_iface *mcdi;
1130
1131 if (!efx->mcdi)
1132 return;
1133
1134 mcdi = efx_mcdi(efx);
1135
e283546c
EC
1136 /* We must be in poll or fail mode so no more requests can be queued */
1137 BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
cade715f
BH
1138
1139 del_timer_sync(&mcdi->async_timer);
1140
1141 /* If a request is still running, make sure we give the MC
1142 * time to complete it so that the response won't overwrite our
1143 * next request.
1144 */
1145 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
1146 efx_mcdi_poll(efx);
1147 mcdi->state = MCDI_STATE_QUIESCENT;
1148 }
1149
1150 /* Nothing else will access the async list now, so it is safe
1151 * to walk it without holding async_lock. If we hold it while
1152 * calling a completer then lockdep may warn that we have
1153 * acquired locks in the wrong order.
1154 */
1155 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
1156 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
1157 list_del(&async->list);
1158 kfree(async);
1159 }
afd4aea0
BH
1160}
1161
1162void efx_mcdi_mode_event(struct efx_nic *efx)
1163{
1164 struct efx_mcdi_iface *mcdi;
1165
f3ad5003 1166 if (!efx->mcdi)
afd4aea0
BH
1167 return;
1168
1169 mcdi = efx_mcdi(efx);
e283546c
EC
1170 /* If already in event completion mode, nothing to do.
1171 * If in fail-fast state, don't switch to event completion. FLR
1172 * recovery will do that later.
1173 */
1174 if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
afd4aea0
BH
1175 return;
1176
1177 /* We can't switch from polled to event completion in the middle of a
1178 * request, because the completion method is specified in the request.
1179 * So acquire the interface to serialise the requestors. We don't need
1180 * to acquire the iface_lock to change the mode here, but we do need a
1181 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
1182 * efx_mcdi_acquire() provides.
1183 */
cade715f 1184 efx_mcdi_acquire_sync(mcdi);
afd4aea0
BH
1185 mcdi->mode = MCDI_MODE_EVENTS;
1186 efx_mcdi_release(mcdi);
1187}
1188
1189static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
1190{
1191 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1192
1193 /* If there is an outstanding MCDI request, it has been terminated
1194 * either by a BADASSERT or REBOOT event. If the mcdi interface is
1195 * in polled mode, then do nothing because the MC reboot handler will
1196 * set the header correctly. However, if the mcdi interface is waiting
1197 * for a CMDDONE event it won't receive it [and since all MCDI events
1198 * are sent to the same queue, we can't be racing with
1199 * efx_mcdi_ev_cpl()]
1200 *
cade715f
BH
1201 * If there is an outstanding asynchronous request, we can't
1202 * complete it now (efx_mcdi_complete() would deadlock). The
1203 * reset process will take care of this.
1204 *
1205 * There's a race here with efx_mcdi_send_request(), because
1206 * we might receive a REBOOT event *before* the request has
1207 * been copied out. In polled mode (during startup) this is
1208 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
1209 * event mode, this condition is just an edge-case of
1210 * receiving a REBOOT event after posting the MCDI
1211 * request. Did the mc reboot before or after the copyout? The
1212 * best we can do always is just return failure.
acd43a90
BK
1213 *
1214 * If there is an outstanding proxy response expected it is not going
1215 * to arrive. We should thus abort it.
afd4aea0
BH
1216 */
1217 spin_lock(&mcdi->iface_lock);
acd43a90
BK
1218 efx_mcdi_proxy_abort(mcdi);
1219
cade715f 1220 if (efx_mcdi_complete_sync(mcdi)) {
afd4aea0
BH
1221 if (mcdi->mode == MCDI_MODE_EVENTS) {
1222 mcdi->resprc = rc;
df2cd8af
BH
1223 mcdi->resp_hdr_len = 0;
1224 mcdi->resp_data_len = 0;
18e3ee2c 1225 ++mcdi->credits;
afd4aea0 1226 }
3f713bf4
BH
1227 } else {
1228 int count;
1229
3f713bf4
BH
1230 /* Consume the status word since efx_mcdi_rpc_finish() won't */
1231 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
c577e59e
DP
1232 rc = efx_mcdi_poll_reboot(efx);
1233 if (rc)
3f713bf4
BH
1234 break;
1235 udelay(MCDI_STATUS_DELAY_US);
1236 }
c577e59e
DP
1237
1238 /* On EF10, a CODE_MC_REBOOT event can be received without the
1239 * reboot detection in efx_mcdi_poll_reboot() being triggered.
1240 * If zero was returned from the final call to
1241 * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the
1242 * MC has definitely rebooted so prepare for the reset.
1243 */
1244 if (!rc && efx->type->mcdi_reboot_detected)
1245 efx->type->mcdi_reboot_detected(efx);
1246
d36a08b4 1247 mcdi->new_epoch = true;
dfdaa95c
DP
1248
1249 /* Nobody was waiting for an MCDI request, so trigger a reset */
1250 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
3f713bf4
BH
1251 }
1252
afd4aea0
BH
1253 spin_unlock(&mcdi->iface_lock);
1254}
1255
74cd60a4
JC
1256/* The MC is going down in to BIST mode. set the BIST flag to block
1257 * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
1258 * (which doesn't actually execute a reset, it waits for the controlling
1259 * function to reset it).
1260 */
1261static void efx_mcdi_ev_bist(struct efx_nic *efx)
1262{
1263 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1264
1265 spin_lock(&mcdi->iface_lock);
1266 efx->mc_bist_for_other_fn = true;
acd43a90
BK
1267 efx_mcdi_proxy_abort(mcdi);
1268
74cd60a4
JC
1269 if (efx_mcdi_complete_sync(mcdi)) {
1270 if (mcdi->mode == MCDI_MODE_EVENTS) {
1271 mcdi->resprc = -EIO;
1272 mcdi->resp_hdr_len = 0;
1273 mcdi->resp_data_len = 0;
1274 ++mcdi->credits;
1275 }
1276 }
1277 mcdi->new_epoch = true;
1278 efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
1279 spin_unlock(&mcdi->iface_lock);
1280}
1281
e283546c
EC
1282/* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
1283 * to recover.
1284 */
1285static void efx_mcdi_abandon(struct efx_nic *efx)
1286{
1287 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1288
1289 if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
1290 return; /* it had already been done */
1291 netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
1292 efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
1293}
1294
afd4aea0
BH
1295/* Called from falcon_process_eventq for MCDI events */
1296void efx_mcdi_process_event(struct efx_channel *channel,
1297 efx_qword_t *event)
1298{
1299 struct efx_nic *efx = channel->efx;
1300 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
1301 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
1302
1303 switch (code) {
1304 case MCDI_EVENT_CODE_BADSSERT:
62776d03
BH
1305 netif_err(efx, hw, efx->net_dev,
1306 "MC watchdog or assertion failure at 0x%x\n", data);
5bc283e5 1307 efx_mcdi_ev_death(efx, -EINTR);
afd4aea0
BH
1308 break;
1309
1310 case MCDI_EVENT_CODE_PMNOTICE:
62776d03 1311 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
afd4aea0
BH
1312 break;
1313
1314 case MCDI_EVENT_CODE_CMDDONE:
1315 efx_mcdi_ev_cpl(efx,
1316 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
1317 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
1318 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
1319 break;
1320
1321 case MCDI_EVENT_CODE_LINKCHANGE:
1322 efx_mcdi_process_link_change(efx, event);
1323 break;
1324 case MCDI_EVENT_CODE_SENSOREVT:
1325 efx_mcdi_sensor_event(efx, event);
1326 break;
1327 case MCDI_EVENT_CODE_SCHEDERR:
2d9955be
RS
1328 netif_dbg(efx, hw, efx->net_dev,
1329 "MC Scheduler alert (0x%x)\n", data);
afd4aea0
BH
1330 break;
1331 case MCDI_EVENT_CODE_REBOOT:
8127d661 1332 case MCDI_EVENT_CODE_MC_REBOOT:
62776d03 1333 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
5bc283e5 1334 efx_mcdi_ev_death(efx, -EIO);
afd4aea0 1335 break;
74cd60a4
JC
1336 case MCDI_EVENT_CODE_MC_BIST:
1337 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1338 efx_mcdi_ev_bist(efx);
1339 break;
afd4aea0
BH
1340 case MCDI_EVENT_CODE_MAC_STATS_DMA:
1341 /* MAC stats are gather lazily. We can ignore this. */
1342 break;
cd2d5b52 1343 case MCDI_EVENT_CODE_FLR:
7fa8d547
SS
1344 if (efx->type->sriov_flr)
1345 efx->type->sriov_flr(efx,
1346 MCDI_EVENT_FIELD(*event, FLR_VF));
cd2d5b52 1347 break;
7c236c43
SH
1348 case MCDI_EVENT_CODE_PTP_RX:
1349 case MCDI_EVENT_CODE_PTP_FAULT:
1350 case MCDI_EVENT_CODE_PTP_PPS:
1351 efx_ptp_event(efx, event);
1352 break;
bd9a265d
JC
1353 case MCDI_EVENT_CODE_PTP_TIME:
1354 efx_time_sync_event(channel, event);
1355 break;
8127d661
BH
1356 case MCDI_EVENT_CODE_TX_FLUSH:
1357 case MCDI_EVENT_CODE_RX_FLUSH:
1358 /* Two flush events will be sent: one to the same event
1359 * queue as completions, and one to event queue 0.
1360 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1361 * flag will be set, and we should ignore the event
1362 * because we want to wait for all completions.
1363 */
1364 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1365 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1366 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1367 efx_ef10_handle_drain_event(efx);
1368 break;
3de82b91
AR
1369 case MCDI_EVENT_CODE_TX_ERR:
1370 case MCDI_EVENT_CODE_RX_ERR:
1371 netif_err(efx, hw, efx->net_dev,
1372 "%s DMA error (event: "EFX_QWORD_FMT")\n",
1373 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1374 EFX_QWORD_VAL(*event));
1375 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1376 break;
acd43a90
BK
1377 case MCDI_EVENT_CODE_PROXY_RESPONSE:
1378 efx_mcdi_ev_proxy_response(efx,
1379 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE),
1380 MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC));
1381 break;
afd4aea0 1382 default:
62776d03
BH
1383 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
1384 code);
afd4aea0
BH
1385 }
1386}
1387
1388/**************************************************************************
1389 *
1390 * Specific request functions
1391 *
1392 **************************************************************************
1393 */
1394
e5f0fd27 1395void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
afd4aea0 1396{
8d9f9dd4 1397 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
afd4aea0
BH
1398 size_t outlength;
1399 const __le16 *ver_words;
8127d661 1400 size_t offset;
afd4aea0
BH
1401 int rc;
1402
1403 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
afd4aea0
BH
1404 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1405 outbuf, sizeof(outbuf), &outlength);
1406 if (rc)
1407 goto fail;
05a9320f 1408 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
00bbb4a5 1409 rc = -EIO;
afd4aea0
BH
1410 goto fail;
1411 }
1412
1413 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
8127d661
BH
1414 offset = snprintf(buf, len, "%u.%u.%u.%u",
1415 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
1416 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
1417
1418 /* EF10 may have multiple datapath firmware variants within a
1419 * single version. Report which variants are running.
1420 */
1421 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
8d9f9dd4
DP
1422 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1423
1424 offset += snprintf(buf + offset, len - offset, " rx%x tx%x",
1425 nic_data->rx_dpcpu_fw_id,
1426 nic_data->tx_dpcpu_fw_id);
8127d661
BH
1427
1428 /* It's theoretically possible for the string to exceed 31
1429 * characters, though in practice the first three version
1430 * components are short enough that this doesn't happen.
1431 */
1432 if (WARN_ON(offset >= len))
1433 buf[0] = 0;
1434 }
1435
e5f0fd27 1436 return;
afd4aea0
BH
1437
1438fail:
62776d03 1439 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
e5f0fd27 1440 buf[0] = 0;
afd4aea0
BH
1441}
1442
4c75b43a
BH
1443static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1444 bool *was_attached)
afd4aea0 1445{
59cfc479 1446 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
ecb1c9cc 1447 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
afd4aea0
BH
1448 size_t outlen;
1449 int rc;
1450
1451 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1452 driver_operating ? 1 : 0);
1453 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
f2b0befd 1454 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
afd4aea0 1455
267d9d73
EC
1456 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1457 outbuf, sizeof(outbuf), &outlen);
1458 /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
1459 * specified will fail with EPERM, and we have to tell the MC we don't
1460 * care what firmware we get.
1461 */
1462 if (rc == -EPERM) {
1463 netif_dbg(efx, probe, efx->net_dev,
1464 "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
1465 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
1466 MC_CMD_FW_DONT_CARE);
1467 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
1468 sizeof(inbuf), outbuf, sizeof(outbuf),
1469 &outlen);
1470 }
1471 if (rc) {
1472 efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
1473 outbuf, outlen, rc);
afd4aea0 1474 goto fail;
267d9d73 1475 }
00bbb4a5
BH
1476 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1477 rc = -EIO;
afd4aea0 1478 goto fail;
00bbb4a5 1479 }
afd4aea0 1480
8349f7f6
BH
1481 if (driver_operating) {
1482 if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1483 efx->mcdi->fn_flags =
1484 MCDI_DWORD(outbuf,
1485 DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1486 } else {
1487 /* Synthesise flags for Siena */
1488 efx->mcdi->fn_flags =
1489 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1490 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1491 (efx_port_num(efx) == 0) <<
1492 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1493 }
1494 }
1495
ecb1c9cc
BH
1496 /* We currently assume we have control of the external link
1497 * and are completely trusted by firmware. Abort probing
1498 * if that's not true for this function.
1499 */
ecb1c9cc 1500
afd4aea0
BH
1501 if (was_attached != NULL)
1502 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1503 return 0;
1504
1505fail:
62776d03 1506 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH
1507 return rc;
1508}
1509
1510int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
6aa9c7f6 1511 u16 *fw_subtype_list, u32 *capabilities)
afd4aea0 1512{
59cfc479 1513 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
c5bb0e98 1514 size_t outlen, i;
afd4aea0 1515 int port_num = efx_port_num(efx);
afd4aea0
BH
1516 int rc;
1517
1518 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
cd84ff4d
EC
1519 /* we need __aligned(2) for ether_addr_copy */
1520 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
1521 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
afd4aea0
BH
1522
1523 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1524 outbuf, sizeof(outbuf), &outlen);
1525 if (rc)
1526 goto fail;
1527
05a9320f 1528 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
00bbb4a5 1529 rc = -EIO;
afd4aea0
BH
1530 goto fail;
1531 }
1532
afd4aea0 1533 if (mac_address)
cd84ff4d
EC
1534 ether_addr_copy(mac_address,
1535 port_num ?
1536 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1537 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
bfeed902 1538 if (fw_subtype_list) {
bfeed902 1539 for (i = 0;
c5bb0e98
BH
1540 i < MCDI_VAR_ARRAY_LEN(outlen,
1541 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1542 i++)
1543 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1544 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1545 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1546 fw_subtype_list[i] = 0;
bfeed902 1547 }
6aa9c7f6
MS
1548 if (capabilities) {
1549 if (port_num)
1550 *capabilities = MCDI_DWORD(outbuf,
1551 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1552 else
1553 *capabilities = MCDI_DWORD(outbuf,
1554 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1555 }
afd4aea0
BH
1556
1557 return 0;
1558
1559fail:
62776d03
BH
1560 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1561 __func__, rc, (int)outlen);
afd4aea0
BH
1562
1563 return rc;
1564}
1565
1566int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1567{
59cfc479 1568 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
afd4aea0
BH
1569 u32 dest = 0;
1570 int rc;
1571
1572 if (uart)
1573 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1574 if (evq)
1575 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1576
1577 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1578 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1579
1580 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1581
1582 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1583 NULL, 0, NULL);
afd4aea0
BH
1584 return rc;
1585}
1586
1587int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1588{
59cfc479 1589 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
afd4aea0
BH
1590 size_t outlen;
1591 int rc;
1592
1593 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1594
1595 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1596 outbuf, sizeof(outbuf), &outlen);
1597 if (rc)
1598 goto fail;
00bbb4a5
BH
1599 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1600 rc = -EIO;
afd4aea0 1601 goto fail;
00bbb4a5 1602 }
afd4aea0
BH
1603
1604 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1605 return 0;
1606
1607fail:
62776d03
BH
1608 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1609 __func__, rc);
afd4aea0
BH
1610 return rc;
1611}
1612
1613int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1614 size_t *size_out, size_t *erase_size_out,
1615 bool *protected_out)
1616{
59cfc479
BH
1617 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1618 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
afd4aea0
BH
1619 size_t outlen;
1620 int rc;
1621
1622 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1623
1624 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1625 outbuf, sizeof(outbuf), &outlen);
1626 if (rc)
1627 goto fail;
00bbb4a5
BH
1628 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1629 rc = -EIO;
afd4aea0 1630 goto fail;
00bbb4a5 1631 }
afd4aea0
BH
1632
1633 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1634 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1635 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
05a9320f 1636 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
afd4aea0
BH
1637 return 0;
1638
1639fail:
62776d03 1640 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH
1641 return rc;
1642}
1643
2e803407
BH
1644static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1645{
59cfc479
BH
1646 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1647 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
2e803407
BH
1648 int rc;
1649
1650 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1651
1652 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1653 outbuf, sizeof(outbuf), NULL);
1654 if (rc)
1655 return rc;
1656
1657 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1658 case MC_CMD_NVRAM_TEST_PASS:
1659 case MC_CMD_NVRAM_TEST_NOTSUPP:
1660 return 0;
1661 default:
1662 return -EIO;
1663 }
1664}
1665
1666int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1667{
1668 u32 nvram_types;
1669 unsigned int type;
1670 int rc;
1671
1672 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1673 if (rc)
b548a988 1674 goto fail1;
2e803407
BH
1675
1676 type = 0;
1677 while (nvram_types != 0) {
1678 if (nvram_types & 1) {
1679 rc = efx_mcdi_nvram_test(efx, type);
1680 if (rc)
b548a988 1681 goto fail2;
2e803407
BH
1682 }
1683 type++;
1684 nvram_types >>= 1;
1685 }
1686
1687 return 0;
b548a988
BH
1688
1689fail2:
62776d03
BH
1690 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1691 __func__, type);
b548a988 1692fail1:
62776d03 1693 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
b548a988 1694 return rc;
2e803407
BH
1695}
1696
267d9d73
EC
1697/* Returns 1 if an assertion was read, 0 if no assertion had fired,
1698 * negative on error.
1699 */
8b2103ad 1700static int efx_mcdi_read_assertion(struct efx_nic *efx)
afd4aea0 1701{
59cfc479 1702 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
aa09a3da 1703 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
c5bb0e98 1704 unsigned int flags, index;
afd4aea0
BH
1705 const char *reason;
1706 size_t outlen;
1707 int retry;
1708 int rc;
1709
8b2103ad
SH
1710 /* Attempt to read any stored assertion state before we reboot
1711 * the mcfw out of the assertion handler. Retry twice, once
afd4aea0
BH
1712 * because a boot-time assertion might cause this command to fail
1713 * with EINTR. And once again because GET_ASSERTS can race with
1714 * MC_CMD_REBOOT running on the other port. */
1715 retry = 2;
1716 do {
8b2103ad 1717 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1e0b8120
EC
1718 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1719 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1720 outbuf, sizeof(outbuf), &outlen);
267d9d73
EC
1721 if (rc == -EPERM)
1722 return 0;
afd4aea0
BH
1723 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1724
1e0b8120
EC
1725 if (rc) {
1726 efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1727 MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1728 outlen, rc);
afd4aea0 1729 return rc;
1e0b8120 1730 }
afd4aea0 1731 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
00bbb4a5 1732 return -EIO;
afd4aea0 1733
8b2103ad
SH
1734 /* Print out any recorded assertion state */
1735 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
afd4aea0
BH
1736 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1737 return 0;
1738
afd4aea0
BH
1739 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1740 ? "system-level assertion"
1741 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1742 ? "thread-level assertion"
1743 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1744 ? "watchdog reset"
1745 : "unknown assertion";
62776d03
BH
1746 netif_err(efx, hw, efx->net_dev,
1747 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1748 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1749 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
afd4aea0
BH
1750
1751 /* Print out the registers */
c5bb0e98
BH
1752 for (index = 0;
1753 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1754 index++)
1755 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1756 1 + index,
1757 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1758 index));
afd4aea0 1759
267d9d73 1760 return 1;
afd4aea0
BH
1761}
1762
267d9d73 1763static int efx_mcdi_exit_assertion(struct efx_nic *efx)
8b2103ad 1764{
59cfc479 1765 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
267d9d73 1766 int rc;
8b2103ad 1767
0f1e54ae
BH
1768 /* If the MC is running debug firmware, it might now be
1769 * waiting for a debugger to attach, but we just want it to
1770 * reboot. We set a flag that makes the command a no-op if it
267d9d73
EC
1771 * has already done so.
1772 * The MCDI will thus return either 0 or -EIO.
0f1e54ae 1773 */
8b2103ad
SH
1774 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1775 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1776 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
267d9d73
EC
1777 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1778 NULL, 0, NULL);
1779 if (rc == -EIO)
1780 rc = 0;
1781 if (rc)
1782 efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
1783 NULL, 0, rc);
1784 return rc;
8b2103ad
SH
1785}
1786
1787int efx_mcdi_handle_assertion(struct efx_nic *efx)
1788{
1789 int rc;
1790
1791 rc = efx_mcdi_read_assertion(efx);
267d9d73 1792 if (rc <= 0)
8b2103ad
SH
1793 return rc;
1794
267d9d73 1795 return efx_mcdi_exit_assertion(efx);
8b2103ad
SH
1796}
1797
afd4aea0
BH
1798void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1799{
59cfc479 1800 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
afd4aea0
BH
1801 int rc;
1802
1803 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1804 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1805 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1806
1807 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1808
1809 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1810
1811 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1812 NULL, 0, NULL);
afd4aea0
BH
1813}
1814
3e336261 1815static int efx_mcdi_reset_func(struct efx_nic *efx)
afd4aea0 1816{
3e336261
JC
1817 MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
1818 int rc;
1819
1820 BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
1821 MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
1822 ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
1823 rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
1824 NULL, 0, NULL);
1825 return rc;
afd4aea0
BH
1826}
1827
6bff861d 1828static int efx_mcdi_reset_mc(struct efx_nic *efx)
afd4aea0 1829{
59cfc479 1830 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
afd4aea0
BH
1831 int rc;
1832
1833 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1834 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1835 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1836 NULL, 0, NULL);
1837 /* White is black, and up is down */
1838 if (rc == -EIO)
1839 return 0;
1840 if (rc == 0)
1841 rc = -EIO;
afd4aea0
BH
1842 return rc;
1843}
1844
6bff861d
BH
1845enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1846{
1847 return RESET_TYPE_RECOVER_OR_ALL;
1848}
1849
1850int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1851{
1852 int rc;
1853
e283546c
EC
1854 /* If MCDI is down, we can't handle_assertion */
1855 if (method == RESET_TYPE_MCDI_TIMEOUT) {
1856 rc = pci_reset_function(efx->pci_dev);
1857 if (rc)
1858 return rc;
1859 /* Re-enable polled MCDI completion */
1860 if (efx->mcdi) {
1861 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1862 mcdi->mode = MCDI_MODE_POLL;
1863 }
1864 return 0;
1865 }
1866
6bff861d
BH
1867 /* Recover from a failed assertion pre-reset */
1868 rc = efx_mcdi_handle_assertion(efx);
1869 if (rc)
1870 return rc;
1871
087e9025
JC
1872 if (method == RESET_TYPE_DATAPATH)
1873 return 0;
1874 else if (method == RESET_TYPE_WORLD)
6bff861d
BH
1875 return efx_mcdi_reset_mc(efx);
1876 else
3e336261 1877 return efx_mcdi_reset_func(efx);
6bff861d
BH
1878}
1879
d215697f 1880static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1881 const u8 *mac, int *id_out)
afd4aea0 1882{
59cfc479
BH
1883 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1884 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
afd4aea0
BH
1885 size_t outlen;
1886 int rc;
1887
1888 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1889 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1890 MC_CMD_FILTER_MODE_SIMPLE);
cd84ff4d 1891 ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
afd4aea0
BH
1892
1893 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1894 outbuf, sizeof(outbuf), &outlen);
1895 if (rc)
1896 goto fail;
1897
1898 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
00bbb4a5 1899 rc = -EIO;
afd4aea0
BH
1900 goto fail;
1901 }
1902
1903 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1904
1905 return 0;
1906
1907fail:
1908 *id_out = -1;
62776d03 1909 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH
1910 return rc;
1911
1912}
1913
1914
1915int
1916efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1917{
1918 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1919}
1920
1921
1922int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1923{
59cfc479 1924 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
afd4aea0
BH
1925 size_t outlen;
1926 int rc;
1927
1928 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1929 outbuf, sizeof(outbuf), &outlen);
1930 if (rc)
1931 goto fail;
1932
1933 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
00bbb4a5 1934 rc = -EIO;
afd4aea0
BH
1935 goto fail;
1936 }
1937
1938 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1939
1940 return 0;
1941
1942fail:
1943 *id_out = -1;
62776d03 1944 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH
1945 return rc;
1946}
1947
1948
1949int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1950{
59cfc479 1951 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
afd4aea0
BH
1952 int rc;
1953
1954 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1955
1956 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1957 NULL, 0, NULL);
afd4aea0
BH
1958 return rc;
1959}
1960
cd2d5b52
BH
1961int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1962{
1963 struct efx_channel *channel;
1964 struct efx_rx_queue *rx_queue;
c5bb0e98
BH
1965 MCDI_DECLARE_BUF(inbuf,
1966 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
cd2d5b52
BH
1967 int rc, count;
1968
45078374
BH
1969 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1970 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1971
cd2d5b52
BH
1972 count = 0;
1973 efx_for_each_channel(channel, efx) {
1974 efx_for_each_channel_rx_queue(rx_queue, channel) {
1975 if (rx_queue->flush_pending) {
1976 rx_queue->flush_pending = false;
1977 atomic_dec(&efx->rxq_flush_pending);
c5bb0e98
BH
1978 MCDI_SET_ARRAY_DWORD(
1979 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1980 count, efx_rx_queue_index(rx_queue));
1981 count++;
cd2d5b52
BH
1982 }
1983 }
1984 }
1985
c5bb0e98
BH
1986 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1987 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
bbec969b 1988 WARN_ON(rc < 0);
cd2d5b52 1989
cd2d5b52
BH
1990 return rc;
1991}
afd4aea0
BH
1992
1993int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1994{
1995 int rc;
1996
1997 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
afd4aea0
BH
1998 return rc;
1999}
2000
34ccfe6f
DP
2001int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled,
2002 unsigned int *flags)
8127d661
BH
2003{
2004 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
34ccfe6f
DP
2005 MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN);
2006 size_t outlen;
2007 int rc;
8127d661
BH
2008
2009 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
2010 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
2011 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
34ccfe6f
DP
2012 rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
2013 outbuf, sizeof(outbuf), &outlen);
2014 if (rc)
2015 return rc;
2016
2017 if (!flags)
2018 return 0;
2019
2020 if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2021 *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS);
2022 else
2023 *flags = 0;
2024
2025 return 0;
8127d661
BH
2026}
2027
267d9d73
EC
2028int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
2029 unsigned int *enabled_out)
2030{
aa09a3da 2031 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
267d9d73
EC
2032 size_t outlen;
2033 int rc;
2034
2035 rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
2036 outbuf, sizeof(outbuf), &outlen);
2037 if (rc)
2038 goto fail;
2039
2040 if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
2041 rc = -EIO;
2042 goto fail;
2043 }
2044
2045 if (impl_out)
2046 *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2047
2048 if (enabled_out)
2049 *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
2050
2051 return 0;
2052
2053fail:
832dc9ed
EC
2054 /* Older firmware lacks GET_WORKAROUNDS and this isn't especially
2055 * terrifying. The call site will have to deal with it though.
2056 */
2057 netif_printk(efx, hw, rc == -ENOSYS ? KERN_DEBUG : KERN_ERR,
2058 efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
267d9d73
EC
2059 return rc;
2060}
2061
45a3fd55
BH
2062#ifdef CONFIG_SFC_MTD
2063
2064#define EFX_MCDI_NVRAM_LEN_MAX 128
2065
2066static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
2067{
2068 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
2069 int rc;
2070
2071 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
2072
2073 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
2074
2075 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
2076 NULL, 0, NULL);
45a3fd55
BH
2077 return rc;
2078}
2079
2080static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
2081 loff_t offset, u8 *buffer, size_t length)
2082{
2083 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
2084 MCDI_DECLARE_BUF(outbuf,
2085 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2086 size_t outlen;
2087 int rc;
2088
2089 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
2090 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
2091 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
2092
2093 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
2094 outbuf, sizeof(outbuf), &outlen);
2095 if (rc)
1e0b8120 2096 return rc;
45a3fd55
BH
2097
2098 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
2099 return 0;
45a3fd55
BH
2100}
2101
2102static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
2103 loff_t offset, const u8 *buffer, size_t length)
2104{
2105 MCDI_DECLARE_BUF(inbuf,
2106 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
2107 int rc;
2108
2109 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
2110 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
2111 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
2112 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
2113
2114 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
2115
2116 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
2117 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
2118 NULL, 0, NULL);
45a3fd55
BH
2119 return rc;
2120}
2121
2122static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
2123 loff_t offset, size_t length)
2124{
2125 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
2126 int rc;
2127
2128 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
2129 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
2130 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
2131
2132 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
2133
2134 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
2135 NULL, 0, NULL);
45a3fd55
BH
2136 return rc;
2137}
2138
2139static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
2140{
2141 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
2142 int rc;
2143
2144 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
2145
2146 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
2147
2148 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
2149 NULL, 0, NULL);
45a3fd55
BH
2150 return rc;
2151}
2152
2153int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
2154 size_t len, size_t *retlen, u8 *buffer)
2155{
2156 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2157 struct efx_nic *efx = mtd->priv;
2158 loff_t offset = start;
2159 loff_t end = min_t(loff_t, start + len, mtd->size);
2160 size_t chunk;
2161 int rc = 0;
2162
2163 while (offset < end) {
2164 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2165 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
2166 buffer, chunk);
2167 if (rc)
2168 goto out;
2169 offset += chunk;
2170 buffer += chunk;
2171 }
2172out:
2173 *retlen = offset - start;
2174 return rc;
2175}
2176
2177int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
2178{
2179 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2180 struct efx_nic *efx = mtd->priv;
2181 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
2182 loff_t end = min_t(loff_t, start + len, mtd->size);
2183 size_t chunk = part->common.mtd.erasesize;
2184 int rc = 0;
2185
2186 if (!part->updating) {
2187 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2188 if (rc)
2189 goto out;
2190 part->updating = true;
2191 }
2192
2193 /* The MCDI interface can in fact do multiple erase blocks at once;
2194 * but erasing may be slow, so we make multiple calls here to avoid
2195 * tripping the MCDI RPC timeout. */
2196 while (offset < end) {
2197 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
2198 chunk);
2199 if (rc)
2200 goto out;
2201 offset += chunk;
2202 }
2203out:
2204 return rc;
2205}
2206
2207int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
2208 size_t len, size_t *retlen, const u8 *buffer)
2209{
2210 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2211 struct efx_nic *efx = mtd->priv;
2212 loff_t offset = start;
2213 loff_t end = min_t(loff_t, start + len, mtd->size);
2214 size_t chunk;
2215 int rc = 0;
2216
2217 if (!part->updating) {
2218 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
2219 if (rc)
2220 goto out;
2221 part->updating = true;
2222 }
2223
2224 while (offset < end) {
2225 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
2226 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
2227 buffer, chunk);
2228 if (rc)
2229 goto out;
2230 offset += chunk;
2231 buffer += chunk;
2232 }
2233out:
2234 *retlen = offset - start;
2235 return rc;
2236}
2237
2238int efx_mcdi_mtd_sync(struct mtd_info *mtd)
2239{
2240 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2241 struct efx_nic *efx = mtd->priv;
2242 int rc = 0;
2243
2244 if (part->updating) {
2245 part->updating = false;
2246 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
2247 }
2248
2249 return rc;
2250}
2251
2252void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
2253{
2254 struct efx_mcdi_mtd_partition *mcdi_part =
2255 container_of(part, struct efx_mcdi_mtd_partition, common);
2256 struct efx_nic *efx = part->mtd.priv;
2257
2258 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
2259 efx->name, part->type_name, mcdi_part->fw_subtype);
2260}
2261
2262#endif /* CONFIG_SFC_MTD */
This page took 0.90845 seconds and 5 git commands to generate.