Merge tag 'asm-generic-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd...
[deliverable/linux.git] / drivers / net / ethernet / sfc / mcdi_port.c
CommitLineData
afd4aea0 1/****************************************************************************
f7a6d2c4
BH
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2009-2013 Solarflare Communications Inc.
afd4aea0
BH
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10/*
11 * Driver for PHY related operations via MCDI.
12 */
13
5a0e3ad6 14#include <linux/slab.h>
afd4aea0
BH
15#include "efx.h"
16#include "phy.h"
17#include "mcdi.h"
18#include "mcdi_pcol.h"
affaf485
SH
19#include "nic.h"
20#include "selftest.h"
afd4aea0 21
3bd93035 22struct efx_mcdi_phy_data {
afd4aea0
BH
23 u32 flags;
24 u32 type;
25 u32 supported_cap;
26 u32 channel;
27 u32 port;
28 u32 stats_mask;
29 u8 name[20];
30 u32 media;
31 u32 mmd_mask;
32 u8 revision[20];
33 u32 forced_cap;
34};
35
36static int
3bd93035 37efx_mcdi_get_phy_cfg(struct efx_nic *efx, struct efx_mcdi_phy_data *cfg)
afd4aea0 38{
59cfc479 39 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_CFG_OUT_LEN);
afd4aea0
BH
40 size_t outlen;
41 int rc;
42
43 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_IN_LEN != 0);
44 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name));
45
46 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_CFG, NULL, 0,
47 outbuf, sizeof(outbuf), &outlen);
48 if (rc)
49 goto fail;
50
51 if (outlen < MC_CMD_GET_PHY_CFG_OUT_LEN) {
00bbb4a5 52 rc = -EIO;
afd4aea0
BH
53 goto fail;
54 }
55
56 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS);
57 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE);
58 cfg->supported_cap =
59 MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_SUPPORTED_CAP);
60 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL);
61 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT);
62 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK);
63 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME),
64 sizeof(cfg->name));
65 cfg->media = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MEDIA_TYPE);
66 cfg->mmd_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MMD_MASK);
67 memcpy(cfg->revision, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_REVISION),
68 sizeof(cfg->revision));
69
70 return 0;
71
72fail:
62776d03 73 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH
74 return rc;
75}
76
77static int efx_mcdi_set_link(struct efx_nic *efx, u32 capabilities,
78 u32 flags, u32 loopback_mode,
79 u32 loopback_speed)
80{
59cfc479 81 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_LINK_IN_LEN);
afd4aea0
BH
82 int rc;
83
84 BUILD_BUG_ON(MC_CMD_SET_LINK_OUT_LEN != 0);
85
86 MCDI_SET_DWORD(inbuf, SET_LINK_IN_CAP, capabilities);
87 MCDI_SET_DWORD(inbuf, SET_LINK_IN_FLAGS, flags);
88 MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_MODE, loopback_mode);
89 MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_SPEED, loopback_speed);
90
91 rc = efx_mcdi_rpc(efx, MC_CMD_SET_LINK, inbuf, sizeof(inbuf),
92 NULL, 0, NULL);
afd4aea0
BH
93 return rc;
94}
95
96static int efx_mcdi_loopback_modes(struct efx_nic *efx, u64 *loopback_modes)
97{
59cfc479 98 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LOOPBACK_MODES_OUT_LEN);
afd4aea0
BH
99 size_t outlen;
100 int rc;
101
102 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LOOPBACK_MODES, NULL, 0,
103 outbuf, sizeof(outbuf), &outlen);
104 if (rc)
105 goto fail;
106
f2b0befd
BH
107 if (outlen < (MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST +
108 MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN)) {
00bbb4a5 109 rc = -EIO;
afd4aea0
BH
110 goto fail;
111 }
112
05a9320f 113 *loopback_modes = MCDI_QWORD(outbuf, GET_LOOPBACK_MODES_OUT_SUGGESTED);
afd4aea0
BH
114
115 return 0;
116
117fail:
62776d03 118 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH
119 return rc;
120}
121
43f775b2
BH
122static int efx_mcdi_mdio_read(struct net_device *net_dev,
123 int prtad, int devad, u16 addr)
afd4aea0 124{
43f775b2 125 struct efx_nic *efx = netdev_priv(net_dev);
59cfc479
BH
126 MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_READ_IN_LEN);
127 MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_READ_OUT_LEN);
afd4aea0
BH
128 size_t outlen;
129 int rc;
130
43f775b2 131 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_BUS, efx->mdio_bus);
afd4aea0
BH
132 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_PRTAD, prtad);
133 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_DEVAD, devad);
134 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_ADDR, addr);
135
136 rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_READ, inbuf, sizeof(inbuf),
137 outbuf, sizeof(outbuf), &outlen);
138 if (rc)
1e0b8120 139 return rc;
afd4aea0 140
43f775b2
BH
141 if (MCDI_DWORD(outbuf, MDIO_READ_OUT_STATUS) !=
142 MC_CMD_MDIO_STATUS_GOOD)
143 return -EIO;
144
145 return (u16)MCDI_DWORD(outbuf, MDIO_READ_OUT_VALUE);
afd4aea0
BH
146}
147
43f775b2
BH
148static int efx_mcdi_mdio_write(struct net_device *net_dev,
149 int prtad, int devad, u16 addr, u16 value)
afd4aea0 150{
43f775b2 151 struct efx_nic *efx = netdev_priv(net_dev);
59cfc479
BH
152 MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_WRITE_IN_LEN);
153 MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_WRITE_OUT_LEN);
afd4aea0
BH
154 size_t outlen;
155 int rc;
156
43f775b2 157 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_BUS, efx->mdio_bus);
afd4aea0
BH
158 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_PRTAD, prtad);
159 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_DEVAD, devad);
160 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_ADDR, addr);
161 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_VALUE, value);
162
163 rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_WRITE, inbuf, sizeof(inbuf),
164 outbuf, sizeof(outbuf), &outlen);
165 if (rc)
1e0b8120 166 return rc;
afd4aea0 167
43f775b2
BH
168 if (MCDI_DWORD(outbuf, MDIO_WRITE_OUT_STATUS) !=
169 MC_CMD_MDIO_STATUS_GOOD)
170 return -EIO;
171
afd4aea0 172 return 0;
afd4aea0
BH
173}
174
175static u32 mcdi_to_ethtool_cap(u32 media, u32 cap)
176{
177 u32 result = 0;
178
179 switch (media) {
180 case MC_CMD_MEDIA_KX4:
181 result |= SUPPORTED_Backplane;
182 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
183 result |= SUPPORTED_1000baseKX_Full;
184 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
185 result |= SUPPORTED_10000baseKX4_Full;
ac331e94
EC
186 if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
187 result |= SUPPORTED_40000baseKR4_Full;
afd4aea0
BH
188 break;
189
190 case MC_CMD_MEDIA_XFP:
191 case MC_CMD_MEDIA_SFP_PLUS:
192 result |= SUPPORTED_FIBRE;
193 break;
194
ac331e94
EC
195 case MC_CMD_MEDIA_QSFP_PLUS:
196 result |= SUPPORTED_FIBRE;
197 if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
198 result |= SUPPORTED_40000baseCR4_Full;
199 break;
200
afd4aea0
BH
201 case MC_CMD_MEDIA_BASE_T:
202 result |= SUPPORTED_TP;
203 if (cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
204 result |= SUPPORTED_10baseT_Half;
205 if (cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
206 result |= SUPPORTED_10baseT_Full;
207 if (cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
208 result |= SUPPORTED_100baseT_Half;
209 if (cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
210 result |= SUPPORTED_100baseT_Full;
211 if (cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
212 result |= SUPPORTED_1000baseT_Half;
213 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
214 result |= SUPPORTED_1000baseT_Full;
215 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
216 result |= SUPPORTED_10000baseT_Full;
217 break;
218 }
219
220 if (cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
221 result |= SUPPORTED_Pause;
222 if (cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
223 result |= SUPPORTED_Asym_Pause;
224 if (cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
225 result |= SUPPORTED_Autoneg;
226
227 return result;
228}
229
230static u32 ethtool_to_mcdi_cap(u32 cap)
231{
232 u32 result = 0;
233
234 if (cap & SUPPORTED_10baseT_Half)
235 result |= (1 << MC_CMD_PHY_CAP_10HDX_LBN);
236 if (cap & SUPPORTED_10baseT_Full)
237 result |= (1 << MC_CMD_PHY_CAP_10FDX_LBN);
238 if (cap & SUPPORTED_100baseT_Half)
239 result |= (1 << MC_CMD_PHY_CAP_100HDX_LBN);
240 if (cap & SUPPORTED_100baseT_Full)
241 result |= (1 << MC_CMD_PHY_CAP_100FDX_LBN);
242 if (cap & SUPPORTED_1000baseT_Half)
243 result |= (1 << MC_CMD_PHY_CAP_1000HDX_LBN);
244 if (cap & (SUPPORTED_1000baseT_Full | SUPPORTED_1000baseKX_Full))
245 result |= (1 << MC_CMD_PHY_CAP_1000FDX_LBN);
246 if (cap & (SUPPORTED_10000baseT_Full | SUPPORTED_10000baseKX4_Full))
247 result |= (1 << MC_CMD_PHY_CAP_10000FDX_LBN);
ac331e94
EC
248 if (cap & (SUPPORTED_40000baseCR4_Full | SUPPORTED_40000baseKR4_Full))
249 result |= (1 << MC_CMD_PHY_CAP_40000FDX_LBN);
afd4aea0
BH
250 if (cap & SUPPORTED_Pause)
251 result |= (1 << MC_CMD_PHY_CAP_PAUSE_LBN);
252 if (cap & SUPPORTED_Asym_Pause)
253 result |= (1 << MC_CMD_PHY_CAP_ASYM_LBN);
254 if (cap & SUPPORTED_Autoneg)
255 result |= (1 << MC_CMD_PHY_CAP_AN_LBN);
256
257 return result;
258}
259
260static u32 efx_get_mcdi_phy_flags(struct efx_nic *efx)
261{
3bd93035 262 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH
263 enum efx_phy_mode mode, supported;
264 u32 flags;
265
266 /* TODO: Advertise the capabilities supported by this PHY */
267 supported = 0;
05a9320f 268 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_TXDIS_LBN))
afd4aea0 269 supported |= PHY_MODE_TX_DISABLED;
05a9320f 270 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_LBN))
afd4aea0 271 supported |= PHY_MODE_LOW_POWER;
05a9320f 272 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN))
afd4aea0
BH
273 supported |= PHY_MODE_OFF;
274
275 mode = efx->phy_mode & supported;
276
277 flags = 0;
278 if (mode & PHY_MODE_TX_DISABLED)
05a9320f 279 flags |= (1 << MC_CMD_SET_LINK_IN_TXDIS_LBN);
afd4aea0 280 if (mode & PHY_MODE_LOW_POWER)
05a9320f 281 flags |= (1 << MC_CMD_SET_LINK_IN_LOWPOWER_LBN);
afd4aea0 282 if (mode & PHY_MODE_OFF)
05a9320f 283 flags |= (1 << MC_CMD_SET_LINK_IN_POWEROFF_LBN);
afd4aea0
BH
284
285 return flags;
286}
287
288static u32 mcdi_to_ethtool_media(u32 media)
289{
290 switch (media) {
291 case MC_CMD_MEDIA_XAUI:
292 case MC_CMD_MEDIA_CX4:
293 case MC_CMD_MEDIA_KX4:
294 return PORT_OTHER;
295
296 case MC_CMD_MEDIA_XFP:
297 case MC_CMD_MEDIA_SFP_PLUS:
ac331e94 298 case MC_CMD_MEDIA_QSFP_PLUS:
afd4aea0
BH
299 return PORT_FIBRE;
300
301 case MC_CMD_MEDIA_BASE_T:
302 return PORT_TP;
303
304 default:
305 return PORT_OTHER;
306 }
307}
308
43f775b2
BH
309static void efx_mcdi_phy_decode_link(struct efx_nic *efx,
310 struct efx_link_state *link_state,
311 u32 speed, u32 flags, u32 fcntl)
312{
313 switch (fcntl) {
314 case MC_CMD_FCNTL_AUTO:
315 WARN_ON(1); /* This is not a link mode */
316 link_state->fc = EFX_FC_AUTO | EFX_FC_TX | EFX_FC_RX;
317 break;
318 case MC_CMD_FCNTL_BIDIR:
319 link_state->fc = EFX_FC_TX | EFX_FC_RX;
320 break;
321 case MC_CMD_FCNTL_RESPOND:
322 link_state->fc = EFX_FC_RX;
323 break;
324 default:
325 WARN_ON(1);
326 case MC_CMD_FCNTL_OFF:
327 link_state->fc = 0;
328 break;
329 }
330
331 link_state->up = !!(flags & (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
332 link_state->fd = !!(flags & (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
333 link_state->speed = speed;
334}
335
afd4aea0
BH
336static int efx_mcdi_phy_probe(struct efx_nic *efx)
337{
3bd93035 338 struct efx_mcdi_phy_data *phy_data;
59cfc479 339 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
ff3b00a0 340 u32 caps;
afd4aea0
BH
341 int rc;
342
ff3b00a0
SH
343 /* Initialise and populate phy_data */
344 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
345 if (phy_data == NULL)
346 return -ENOMEM;
347
348 rc = efx_mcdi_get_phy_cfg(efx, phy_data);
afd4aea0
BH
349 if (rc != 0)
350 goto fail;
351
ff3b00a0
SH
352 /* Read initial link advertisement */
353 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
354 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
355 outbuf, sizeof(outbuf), NULL);
356 if (rc)
357 goto fail;
358
359 /* Fill out nic state */
360 efx->phy_data = phy_data;
361 efx->phy_type = phy_data->type;
afd4aea0 362
ff3b00a0
SH
363 efx->mdio_bus = phy_data->channel;
364 efx->mdio.prtad = phy_data->port;
365 efx->mdio.mmds = phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22);
afd4aea0 366 efx->mdio.mode_support = 0;
ff3b00a0 367 if (phy_data->mmd_mask & (1 << MC_CMD_MMD_CLAUSE22))
afd4aea0 368 efx->mdio.mode_support |= MDIO_SUPPORTS_C22;
ff3b00a0 369 if (phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22))
afd4aea0
BH
370 efx->mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
371
ff3b00a0
SH
372 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP);
373 if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN))
374 efx->link_advertising =
375 mcdi_to_ethtool_cap(phy_data->media, caps);
376 else
377 phy_data->forced_cap = caps;
378
afd4aea0
BH
379 /* Assert that we can map efx -> mcdi loopback modes */
380 BUILD_BUG_ON(LOOPBACK_NONE != MC_CMD_LOOPBACK_NONE);
381 BUILD_BUG_ON(LOOPBACK_DATA != MC_CMD_LOOPBACK_DATA);
382 BUILD_BUG_ON(LOOPBACK_GMAC != MC_CMD_LOOPBACK_GMAC);
383 BUILD_BUG_ON(LOOPBACK_XGMII != MC_CMD_LOOPBACK_XGMII);
384 BUILD_BUG_ON(LOOPBACK_XGXS != MC_CMD_LOOPBACK_XGXS);
385 BUILD_BUG_ON(LOOPBACK_XAUI != MC_CMD_LOOPBACK_XAUI);
386 BUILD_BUG_ON(LOOPBACK_GMII != MC_CMD_LOOPBACK_GMII);
387 BUILD_BUG_ON(LOOPBACK_SGMII != MC_CMD_LOOPBACK_SGMII);
388 BUILD_BUG_ON(LOOPBACK_XGBR != MC_CMD_LOOPBACK_XGBR);
389 BUILD_BUG_ON(LOOPBACK_XFI != MC_CMD_LOOPBACK_XFI);
390 BUILD_BUG_ON(LOOPBACK_XAUI_FAR != MC_CMD_LOOPBACK_XAUI_FAR);
391 BUILD_BUG_ON(LOOPBACK_GMII_FAR != MC_CMD_LOOPBACK_GMII_FAR);
392 BUILD_BUG_ON(LOOPBACK_SGMII_FAR != MC_CMD_LOOPBACK_SGMII_FAR);
393 BUILD_BUG_ON(LOOPBACK_XFI_FAR != MC_CMD_LOOPBACK_XFI_FAR);
394 BUILD_BUG_ON(LOOPBACK_GPHY != MC_CMD_LOOPBACK_GPHY);
395 BUILD_BUG_ON(LOOPBACK_PHYXS != MC_CMD_LOOPBACK_PHYXS);
396 BUILD_BUG_ON(LOOPBACK_PCS != MC_CMD_LOOPBACK_PCS);
397 BUILD_BUG_ON(LOOPBACK_PMAPMD != MC_CMD_LOOPBACK_PMAPMD);
398 BUILD_BUG_ON(LOOPBACK_XPORT != MC_CMD_LOOPBACK_XPORT);
399 BUILD_BUG_ON(LOOPBACK_XGMII_WS != MC_CMD_LOOPBACK_XGMII_WS);
400 BUILD_BUG_ON(LOOPBACK_XAUI_WS != MC_CMD_LOOPBACK_XAUI_WS);
401 BUILD_BUG_ON(LOOPBACK_XAUI_WS_FAR != MC_CMD_LOOPBACK_XAUI_WS_FAR);
402 BUILD_BUG_ON(LOOPBACK_XAUI_WS_NEAR != MC_CMD_LOOPBACK_XAUI_WS_NEAR);
403 BUILD_BUG_ON(LOOPBACK_GMII_WS != MC_CMD_LOOPBACK_GMII_WS);
404 BUILD_BUG_ON(LOOPBACK_XFI_WS != MC_CMD_LOOPBACK_XFI_WS);
405 BUILD_BUG_ON(LOOPBACK_XFI_WS_FAR != MC_CMD_LOOPBACK_XFI_WS_FAR);
406 BUILD_BUG_ON(LOOPBACK_PHYXS_WS != MC_CMD_LOOPBACK_PHYXS_WS);
407
408 rc = efx_mcdi_loopback_modes(efx, &efx->loopback_modes);
409 if (rc != 0)
410 goto fail;
411 /* The MC indicates that LOOPBACK_NONE is a valid loopback mode,
412 * but by convention we don't */
413 efx->loopback_modes &= ~(1 << LOOPBACK_NONE);
414
7a6b8f6f
SH
415 /* Set the initial link mode */
416 efx_mcdi_phy_decode_link(
417 efx, &efx->link_state,
418 MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED),
419 MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS),
420 MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL));
421
422 /* Default to Autonegotiated flow control if the PHY supports it */
423 efx->wanted_fc = EFX_FC_RX | EFX_FC_TX;
424 if (phy_data->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
425 efx->wanted_fc |= EFX_FC_AUTO;
cffe9d4c 426 efx_link_set_wanted_fc(efx, efx->wanted_fc);
7a6b8f6f 427
afd4aea0
BH
428 return 0;
429
430fail:
431 kfree(phy_data);
432 return rc;
433}
434
43f775b2 435int efx_mcdi_port_reconfigure(struct efx_nic *efx)
afd4aea0 436{
3bd93035 437 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH
438 u32 caps = (efx->link_advertising ?
439 ethtool_to_mcdi_cap(efx->link_advertising) :
440 phy_cfg->forced_cap);
441
442 return efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
443 efx->loopback_mode, 0);
444}
445
afd4aea0
BH
446/* Verify that the forced flow control settings (!EFX_FC_AUTO) are
447 * supported by the link partner. Warn the user if this isn't the case
448 */
43f775b2 449static void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa)
afd4aea0 450{
3bd93035 451 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH
452 u32 rmtadv;
453
25985edc 454 /* The link partner capabilities are only relevant if the
afd4aea0 455 * link supports flow control autonegotiation */
7a6b8f6f 456 if (~phy_cfg->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
afd4aea0
BH
457 return;
458
459 /* If flow control autoneg is supported and enabled, then fine */
460 if (efx->wanted_fc & EFX_FC_AUTO)
461 return;
462
463 rmtadv = 0;
464 if (lpa & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
465 rmtadv |= ADVERTISED_Pause;
466 if (lpa & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
467 rmtadv |= ADVERTISED_Asym_Pause;
468
469 if ((efx->wanted_fc & EFX_FC_TX) && rmtadv == ADVERTISED_Asym_Pause)
62776d03
BH
470 netif_err(efx, link, efx->net_dev,
471 "warning: link partner doesn't support pause frames");
afd4aea0
BH
472}
473
474static bool efx_mcdi_phy_poll(struct efx_nic *efx)
475{
476 struct efx_link_state old_state = efx->link_state;
59cfc479 477 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
afd4aea0
BH
478 int rc;
479
480 WARN_ON(!mutex_is_locked(&efx->mac_lock));
481
482 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
483
484 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
485 outbuf, sizeof(outbuf), NULL);
1e0b8120 486 if (rc)
afd4aea0 487 efx->link_state.up = false;
1e0b8120 488 else
afd4aea0
BH
489 efx_mcdi_phy_decode_link(
490 efx, &efx->link_state,
491 MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED),
492 MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS),
493 MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL));
afd4aea0
BH
494
495 return !efx_link_state_equal(&efx->link_state, &old_state);
496}
497
ff3b00a0 498static void efx_mcdi_phy_remove(struct efx_nic *efx)
afd4aea0
BH
499{
500 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
501
502 efx->phy_data = NULL;
503 kfree(phy_data);
504}
505
506static void efx_mcdi_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
507{
3bd93035 508 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
59cfc479 509 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
afd4aea0
BH
510 int rc;
511
512 ecmd->supported =
513 mcdi_to_ethtool_cap(phy_cfg->media, phy_cfg->supported_cap);
514 ecmd->advertising = efx->link_advertising;
70739497 515 ethtool_cmd_speed_set(ecmd, efx->link_state.speed);
afd4aea0
BH
516 ecmd->duplex = efx->link_state.fd;
517 ecmd->port = mcdi_to_ethtool_media(phy_cfg->media);
518 ecmd->phy_address = phy_cfg->port;
519 ecmd->transceiver = XCVR_INTERNAL;
520 ecmd->autoneg = !!(efx->link_advertising & ADVERTISED_Autoneg);
521 ecmd->mdio_support = (efx->mdio.mode_support &
522 (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22));
523
524 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
525 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
526 outbuf, sizeof(outbuf), NULL);
1e0b8120 527 if (rc)
afd4aea0 528 return;
afd4aea0
BH
529 ecmd->lp_advertising =
530 mcdi_to_ethtool_cap(phy_cfg->media,
531 MCDI_DWORD(outbuf, GET_LINK_OUT_LP_CAP));
532}
533
534static int efx_mcdi_phy_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
535{
3bd93035 536 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH
537 u32 caps;
538 int rc;
539
540 if (ecmd->autoneg) {
541 caps = (ethtool_to_mcdi_cap(ecmd->advertising) |
542 1 << MC_CMD_PHY_CAP_AN_LBN);
543 } else if (ecmd->duplex) {
25db0338 544 switch (ethtool_cmd_speed(ecmd)) {
afd4aea0
BH
545 case 10: caps = 1 << MC_CMD_PHY_CAP_10FDX_LBN; break;
546 case 100: caps = 1 << MC_CMD_PHY_CAP_100FDX_LBN; break;
547 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000FDX_LBN; break;
548 case 10000: caps = 1 << MC_CMD_PHY_CAP_10000FDX_LBN; break;
9a12a306 549 case 40000: caps = 1 << MC_CMD_PHY_CAP_40000FDX_LBN; break;
afd4aea0
BH
550 default: return -EINVAL;
551 }
552 } else {
25db0338 553 switch (ethtool_cmd_speed(ecmd)) {
afd4aea0
BH
554 case 10: caps = 1 << MC_CMD_PHY_CAP_10HDX_LBN; break;
555 case 100: caps = 1 << MC_CMD_PHY_CAP_100HDX_LBN; break;
556 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000HDX_LBN; break;
557 default: return -EINVAL;
558 }
559 }
560
561 rc = efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
562 efx->loopback_mode, 0);
563 if (rc)
564 return rc;
565
566 if (ecmd->autoneg) {
567 efx_link_set_advertising(
568 efx, ecmd->advertising | ADVERTISED_Autoneg);
569 phy_cfg->forced_cap = 0;
570 } else {
571 efx_link_set_advertising(efx, 0);
572 phy_cfg->forced_cap = caps;
573 }
574 return 0;
575}
576
4f16c073
BH
577static int efx_mcdi_phy_test_alive(struct efx_nic *efx)
578{
59cfc479 579 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_STATE_OUT_LEN);
4f16c073
BH
580 size_t outlen;
581 int rc;
582
583 BUILD_BUG_ON(MC_CMD_GET_PHY_STATE_IN_LEN != 0);
584
585 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_STATE, NULL, 0,
586 outbuf, sizeof(outbuf), &outlen);
587 if (rc)
588 return rc;
589
590 if (outlen < MC_CMD_GET_PHY_STATE_OUT_LEN)
00bbb4a5 591 return -EIO;
05a9320f 592 if (MCDI_DWORD(outbuf, GET_PHY_STATE_OUT_STATE) != MC_CMD_PHY_STATE_OK)
4f16c073
BH
593 return -EINVAL;
594
595 return 0;
596}
597
affaf485
SH
598static const char *const mcdi_sft9001_cable_diag_names[] = {
599 "cable.pairA.length",
600 "cable.pairB.length",
601 "cable.pairC.length",
602 "cable.pairD.length",
603 "cable.pairA.status",
604 "cable.pairB.status",
605 "cable.pairC.status",
606 "cable.pairD.status",
607};
608
609static int efx_mcdi_bist(struct efx_nic *efx, unsigned int bist_mode,
610 int *results)
611{
612 unsigned int retry, i, count = 0;
613 size_t outlen;
614 u32 status;
c5bb0e98
BH
615 MCDI_DECLARE_BUF(inbuf, MC_CMD_START_BIST_IN_LEN);
616 MCDI_DECLARE_BUF(outbuf, MC_CMD_POLL_BIST_OUT_SFT9001_LEN);
617 u8 *ptr;
affaf485
SH
618 int rc;
619
affaf485 620 BUILD_BUG_ON(MC_CMD_START_BIST_OUT_LEN != 0);
c5bb0e98
BH
621 MCDI_SET_DWORD(inbuf, START_BIST_IN_TYPE, bist_mode);
622 rc = efx_mcdi_rpc(efx, MC_CMD_START_BIST,
623 inbuf, MC_CMD_START_BIST_IN_LEN, NULL, 0, NULL);
affaf485
SH
624 if (rc)
625 goto out;
626
627 /* Wait up to 10s for BIST to finish */
628 for (retry = 0; retry < 100; ++retry) {
629 BUILD_BUG_ON(MC_CMD_POLL_BIST_IN_LEN != 0);
630 rc = efx_mcdi_rpc(efx, MC_CMD_POLL_BIST, NULL, 0,
c5bb0e98 631 outbuf, sizeof(outbuf), &outlen);
affaf485
SH
632 if (rc)
633 goto out;
634
c5bb0e98 635 status = MCDI_DWORD(outbuf, POLL_BIST_OUT_RESULT);
affaf485
SH
636 if (status != MC_CMD_POLL_BIST_RUNNING)
637 goto finished;
638
639 msleep(100);
640 }
641
642 rc = -ETIMEDOUT;
643 goto out;
644
645finished:
646 results[count++] = (status == MC_CMD_POLL_BIST_PASSED) ? 1 : -1;
647
648 /* SFT9001 specific cable diagnostics output */
649 if (efx->phy_type == PHY_TYPE_SFT9001B &&
650 (bist_mode == MC_CMD_PHY_BIST_CABLE_SHORT ||
651 bist_mode == MC_CMD_PHY_BIST_CABLE_LONG)) {
c5bb0e98 652 ptr = MCDI_PTR(outbuf, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A);
affaf485
SH
653 if (status == MC_CMD_POLL_BIST_PASSED &&
654 outlen >= MC_CMD_POLL_BIST_OUT_SFT9001_LEN) {
655 for (i = 0; i < 8; i++) {
656 results[count + i] =
657 EFX_DWORD_FIELD(((efx_dword_t *)ptr)[i],
658 EFX_DWORD_0);
659 }
660 }
661 count += 8;
662 }
663 rc = count;
664
665out:
affaf485
SH
666 return rc;
667}
668
669static int efx_mcdi_phy_run_tests(struct efx_nic *efx, int *results,
670 unsigned flags)
671{
3bd93035 672 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
affaf485
SH
673 u32 mode;
674 int rc;
675
05a9320f 676 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) {
affaf485
SH
677 rc = efx_mcdi_bist(efx, MC_CMD_PHY_BIST, results);
678 if (rc < 0)
679 return rc;
680
681 results += rc;
682 }
683
684 /* If we support both LONG and SHORT, then run each in response to
685 * break or not. Otherwise, run the one we support */
686 mode = 0;
05a9320f 687 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN)) {
affaf485
SH
688 if ((flags & ETH_TEST_FL_OFFLINE) &&
689 (phy_cfg->flags &
05a9320f 690 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN)))
affaf485
SH
691 mode = MC_CMD_PHY_BIST_CABLE_LONG;
692 else
693 mode = MC_CMD_PHY_BIST_CABLE_SHORT;
694 } else if (phy_cfg->flags &
05a9320f 695 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))
affaf485
SH
696 mode = MC_CMD_PHY_BIST_CABLE_LONG;
697
698 if (mode != 0) {
699 rc = efx_mcdi_bist(efx, mode, results);
700 if (rc < 0)
701 return rc;
702 results += rc;
703 }
704
705 return 0;
706}
707
d215697f 708static const char *efx_mcdi_phy_test_name(struct efx_nic *efx,
709 unsigned int index)
affaf485 710{
3bd93035 711 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
affaf485 712
05a9320f 713 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) {
affaf485
SH
714 if (index == 0)
715 return "bist";
716 --index;
717 }
718
05a9320f
BH
719 if (phy_cfg->flags & ((1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN) |
720 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))) {
affaf485
SH
721 if (index == 0)
722 return "cable";
723 --index;
724
725 if (efx->phy_type == PHY_TYPE_SFT9001B) {
726 if (index < ARRAY_SIZE(mcdi_sft9001_cable_diag_names))
727 return mcdi_sft9001_cable_diag_names[index];
728 index -= ARRAY_SIZE(mcdi_sft9001_cable_diag_names);
729 }
730 }
731
732 return NULL;
733}
734
c087bd2c
SH
735#define SFP_PAGE_SIZE 128
736#define SFP_NUM_PAGES 2
737static int efx_mcdi_phy_get_module_eeprom(struct efx_nic *efx,
738 struct ethtool_eeprom *ee, u8 *data)
739{
59cfc479
BH
740 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX);
741 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN);
c087bd2c
SH
742 size_t outlen;
743 int rc;
744 unsigned int payload_len;
745 unsigned int space_remaining = ee->len;
746 unsigned int page;
747 unsigned int page_off;
748 unsigned int to_copy;
749 u8 *user_data = data;
750
751 BUILD_BUG_ON(SFP_PAGE_SIZE * SFP_NUM_PAGES != ETH_MODULE_SFF_8079_LEN);
752
753 page_off = ee->offset % SFP_PAGE_SIZE;
754 page = ee->offset / SFP_PAGE_SIZE;
755
756 while (space_remaining && (page < SFP_NUM_PAGES)) {
757 MCDI_SET_DWORD(inbuf, GET_PHY_MEDIA_INFO_IN_PAGE, page);
758
759 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_MEDIA_INFO,
760 inbuf, sizeof(inbuf),
761 outbuf, sizeof(outbuf),
762 &outlen);
763 if (rc)
764 return rc;
765
766 if (outlen < (MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST +
767 SFP_PAGE_SIZE))
768 return -EIO;
769
770 payload_len = MCDI_DWORD(outbuf,
771 GET_PHY_MEDIA_INFO_OUT_DATALEN);
772 if (payload_len != SFP_PAGE_SIZE)
773 return -EIO;
774
775 /* Copy as much as we can into data */
776 payload_len -= page_off;
777 to_copy = (space_remaining < payload_len) ?
778 space_remaining : payload_len;
779
780 memcpy(user_data,
c5bb0e98 781 MCDI_PTR(outbuf, GET_PHY_MEDIA_INFO_OUT_DATA) + page_off,
c087bd2c
SH
782 to_copy);
783
784 space_remaining -= to_copy;
785 user_data += to_copy;
786 page_off = 0;
787 page++;
788 }
789
790 return 0;
791}
792
793static int efx_mcdi_phy_get_module_info(struct efx_nic *efx,
794 struct ethtool_modinfo *modinfo)
795{
796 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
797
798 switch (phy_cfg->media) {
799 case MC_CMD_MEDIA_SFP_PLUS:
800 modinfo->type = ETH_MODULE_SFF_8079;
801 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
802 return 0;
803 default:
804 return -EOPNOTSUPP;
805 }
806}
807
43f775b2 808static const struct efx_phy_operations efx_mcdi_phy_ops = {
afd4aea0 809 .probe = efx_mcdi_phy_probe,
9c636baf 810 .init = efx_port_dummy_op_int,
43f775b2 811 .reconfigure = efx_mcdi_port_reconfigure,
afd4aea0 812 .poll = efx_mcdi_phy_poll,
ff3b00a0
SH
813 .fini = efx_port_dummy_op_void,
814 .remove = efx_mcdi_phy_remove,
afd4aea0
BH
815 .get_settings = efx_mcdi_phy_get_settings,
816 .set_settings = efx_mcdi_phy_set_settings,
4f16c073 817 .test_alive = efx_mcdi_phy_test_alive,
affaf485
SH
818 .run_tests = efx_mcdi_phy_run_tests,
819 .test_name = efx_mcdi_phy_test_name,
c087bd2c
SH
820 .get_module_eeprom = efx_mcdi_phy_get_module_eeprom,
821 .get_module_info = efx_mcdi_phy_get_module_info,
afd4aea0 822};
43f775b2 823
8127d661
BH
824u32 efx_mcdi_phy_get_caps(struct efx_nic *efx)
825{
826 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
827
828 return phy_data->supported_cap;
829}
830
43f775b2
BH
831static unsigned int efx_mcdi_event_link_speed[] = {
832 [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
833 [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
834 [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
9a12a306 835 [MCDI_EVENT_LINKCHANGE_SPEED_40G] = 40000,
43f775b2
BH
836};
837
838void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
839{
840 u32 flags, fcntl, speed, lpa;
841
842 speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
843 EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
844 speed = efx_mcdi_event_link_speed[speed];
845
846 flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
847 fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
848 lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
849
850 /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
851 * which is only run after flushing the event queues. Therefore, it
852 * is safe to modify the link state outside of the mac_lock here.
853 */
854 efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
855
856 efx_mcdi_phy_check_fcntl(efx, lpa);
857
858 efx_link_status_changed(efx);
859}
860
861int efx_mcdi_set_mac(struct efx_nic *efx)
862{
964e6135 863 u32 fcntl;
43f775b2
BH
864 MCDI_DECLARE_BUF(cmdbytes, MC_CMD_SET_MAC_IN_LEN);
865
866 BUILD_BUG_ON(MC_CMD_SET_MAC_OUT_LEN != 0);
867
910c8789 868 /* This has no effect on EF10 */
cd84ff4d
EC
869 ether_addr_copy(MCDI_PTR(cmdbytes, SET_MAC_IN_ADDR),
870 efx->net_dev->dev_addr);
43f775b2
BH
871
872 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_MTU,
873 EFX_MAX_FRAME_LEN(efx->net_dev->mtu));
874 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_DRAIN, 0);
875
964e6135
BH
876 /* Set simple MAC filter for Siena */
877 MCDI_POPULATE_DWORD_1(cmdbytes, SET_MAC_IN_REJECT,
878 SET_MAC_IN_REJECT_UNCST, efx->unicast_filter);
43f775b2
BH
879
880 switch (efx->wanted_fc) {
881 case EFX_FC_RX | EFX_FC_TX:
882 fcntl = MC_CMD_FCNTL_BIDIR;
883 break;
884 case EFX_FC_RX:
885 fcntl = MC_CMD_FCNTL_RESPOND;
886 break;
887 default:
888 fcntl = MC_CMD_FCNTL_OFF;
889 break;
890 }
891 if (efx->wanted_fc & EFX_FC_AUTO)
892 fcntl = MC_CMD_FCNTL_AUTO;
893 if (efx->fc_disable)
894 fcntl = MC_CMD_FCNTL_OFF;
895
896 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_FCNTL, fcntl);
897
898 return efx_mcdi_rpc(efx, MC_CMD_SET_MAC, cmdbytes, sizeof(cmdbytes),
899 NULL, 0, NULL);
900}
901
902bool efx_mcdi_mac_check_fault(struct efx_nic *efx)
903{
904 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
905 size_t outlength;
906 int rc;
907
908 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
909
910 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
911 outbuf, sizeof(outbuf), &outlength);
1e0b8120 912 if (rc)
43f775b2 913 return true;
43f775b2
BH
914
915 return MCDI_DWORD(outbuf, GET_LINK_OUT_MAC_FAULT) != 0;
916}
917
f8f3b5ae
JC
918enum efx_stats_action {
919 EFX_STATS_ENABLE,
920 EFX_STATS_DISABLE,
921 EFX_STATS_PULL,
922};
923
924static int efx_mcdi_mac_stats(struct efx_nic *efx,
925 enum efx_stats_action action, int clear)
43f775b2 926{
0a2ab4d9 927 struct efx_ef10_nic_data *nic_data = efx->nic_data;
43f775b2
BH
928 MCDI_DECLARE_BUF(inbuf, MC_CMD_MAC_STATS_IN_LEN);
929 int rc;
f8f3b5ae
JC
930 int change = action == EFX_STATS_PULL ? 0 : 1;
931 int enable = action == EFX_STATS_ENABLE ? 1 : 0;
932 int period = action == EFX_STATS_ENABLE ? 1000 : 0;
933 dma_addr_t dma_addr = efx->stats_buffer.dma_addr;
934 u32 dma_len = action != EFX_STATS_DISABLE ?
935 MC_CMD_MAC_NSTATS * sizeof(u64) : 0;
43f775b2
BH
936
937 BUILD_BUG_ON(MC_CMD_MAC_STATS_OUT_DMA_LEN != 0);
938
939 MCDI_SET_QWORD(inbuf, MAC_STATS_IN_DMA_ADDR, dma_addr);
f5253d92
BH
940 MCDI_POPULATE_DWORD_7(inbuf, MAC_STATS_IN_CMD,
941 MAC_STATS_IN_DMA, !!enable,
942 MAC_STATS_IN_CLEAR, clear,
f8f3b5ae
JC
943 MAC_STATS_IN_PERIODIC_CHANGE, change,
944 MAC_STATS_IN_PERIODIC_ENABLE, enable,
f5253d92
BH
945 MAC_STATS_IN_PERIODIC_CLEAR, 0,
946 MAC_STATS_IN_PERIODIC_NOEVENT, 1,
947 MAC_STATS_IN_PERIOD_MS, period);
43f775b2 948 MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_LEN, dma_len);
0a2ab4d9 949 MCDI_SET_DWORD(inbuf, MAC_STATS_IN_PORT_ID, nic_data->vport_id);
43f775b2 950
6dd4859b
DP
951 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf),
952 NULL, 0, NULL);
953 /* Expect ENOENT if DMA queues have not been set up */
954 if (rc && (rc != -ENOENT || atomic_read(&efx->active_queues)))
955 efx_mcdi_display_error(efx, MC_CMD_MAC_STATS, sizeof(inbuf),
956 NULL, 0, rc);
43f775b2
BH
957 return rc;
958}
959
960void efx_mcdi_mac_start_stats(struct efx_nic *efx)
961{
962 __le64 *dma_stats = efx->stats_buffer.addr;
963
964 dma_stats[MC_CMD_MAC_GENERATION_END] = EFX_MC_STATS_GENERATION_INVALID;
965
f8f3b5ae 966 efx_mcdi_mac_stats(efx, EFX_STATS_ENABLE, 0);
43f775b2
BH
967}
968
969void efx_mcdi_mac_stop_stats(struct efx_nic *efx)
970{
f8f3b5ae
JC
971 efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 0);
972}
973
974#define EFX_MAC_STATS_WAIT_US 100
975#define EFX_MAC_STATS_WAIT_ATTEMPTS 10
976
977void efx_mcdi_mac_pull_stats(struct efx_nic *efx)
978{
979 __le64 *dma_stats = efx->stats_buffer.addr;
980 int attempts = EFX_MAC_STATS_WAIT_ATTEMPTS;
981
982 dma_stats[MC_CMD_MAC_GENERATION_END] = EFX_MC_STATS_GENERATION_INVALID;
983 efx_mcdi_mac_stats(efx, EFX_STATS_PULL, 0);
984
985 while (dma_stats[MC_CMD_MAC_GENERATION_END] ==
986 EFX_MC_STATS_GENERATION_INVALID &&
987 attempts-- != 0)
988 udelay(EFX_MAC_STATS_WAIT_US);
43f775b2
BH
989}
990
991int efx_mcdi_port_probe(struct efx_nic *efx)
992{
993 int rc;
994
995 /* Hook in PHY operations table */
996 efx->phy_op = &efx_mcdi_phy_ops;
997
998 /* Set up MDIO structure for PHY */
999 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
1000 efx->mdio.mdio_read = efx_mcdi_mdio_read;
1001 efx->mdio.mdio_write = efx_mcdi_mdio_write;
1002
1003 /* Fill out MDIO structure, loopback modes, and initial link state */
1004 rc = efx->phy_op->probe(efx);
1005 if (rc != 0)
1006 return rc;
1007
1008 /* Allocate buffer for stats */
1009 rc = efx_nic_alloc_buffer(efx, &efx->stats_buffer,
0d19a540 1010 MC_CMD_MAC_NSTATS * sizeof(u64), GFP_KERNEL);
43f775b2
BH
1011 if (rc)
1012 return rc;
1013 netif_dbg(efx, probe, efx->net_dev,
1014 "stats buffer at %llx (virt %p phys %llx)\n",
1015 (u64)efx->stats_buffer.dma_addr,
1016 efx->stats_buffer.addr,
1017 (u64)virt_to_phys(efx->stats_buffer.addr));
1018
f8f3b5ae 1019 efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 1);
43f775b2
BH
1020
1021 return 0;
1022}
1023
1024void efx_mcdi_port_remove(struct efx_nic *efx)
1025{
1026 efx->phy_op->remove(efx);
1027 efx_nic_free_buffer(efx, &efx->stats_buffer);
1028}
8127d661
BH
1029
1030/* Get physical port number (EF10 only; on Siena it is same as PF number) */
1031int efx_mcdi_port_get_number(struct efx_nic *efx)
1032{
1033 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN);
1034 int rc;
1035
1036 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PORT_ASSIGNMENT, NULL, 0,
1037 outbuf, sizeof(outbuf), NULL);
1038 if (rc)
1039 return rc;
1040
1041 return MCDI_DWORD(outbuf, GET_PORT_ASSIGNMENT_OUT_PORT);
1042}
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