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1 | /**************************************************************************** |
2 | * Driver for Solarflare network controllers and boards | |
3 | * Copyright 2015 Solarflare Communications Inc. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #ifndef SIENA_SRIOV_H | |
11 | #define SIENA_SRIOV_H | |
12 | ||
13 | #include "net_driver.h" | |
14 | ||
15 | /* On the SFC9000 family each port is associated with 1 PCI physical | |
16 | * function (PF) handled by sfc and a configurable number of virtual | |
17 | * functions (VFs) that may be handled by some other driver, often in | |
18 | * a VM guest. The queue pointer registers are mapped in both PF and | |
19 | * VF BARs such that an 8K region provides access to a single RX, TX | |
20 | * and event queue (collectively a Virtual Interface, VI or VNIC). | |
21 | * | |
22 | * The PF has access to all 1024 VIs while VFs are mapped to VIs | |
23 | * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered | |
24 | * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE). | |
25 | * The number of VIs and the VI_SCALE value are configurable but must | |
26 | * be established at boot time by firmware. | |
27 | */ | |
28 | ||
29 | /* Maximum VI_SCALE parameter supported by Siena */ | |
30 | #define EFX_VI_SCALE_MAX 6 | |
31 | /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX), | |
32 | * so this is the smallest allowed value. | |
33 | */ | |
34 | #define EFX_VI_BASE 128U | |
35 | /* Maximum number of VFs allowed */ | |
36 | #define EFX_VF_COUNT_MAX 127 | |
37 | /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */ | |
38 | #define EFX_MAX_VF_EVQ_SIZE 8192UL | |
39 | /* The number of buffer table entries reserved for each VI on a VF */ | |
40 | #define EFX_VF_BUFTBL_PER_VI \ | |
41 | ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \ | |
42 | sizeof(efx_qword_t) / EFX_BUF_SIZE) | |
43 | ||
834e23dd | 44 | int efx_siena_sriov_configure(struct efx_nic *efx, int num_vfs); |
7fa8d547 SS |
45 | int efx_siena_sriov_init(struct efx_nic *efx); |
46 | void efx_siena_sriov_fini(struct efx_nic *efx); | |
cfc77c2f | 47 | int efx_siena_sriov_mac_address_changed(struct efx_nic *efx); |
7fa8d547 SS |
48 | bool efx_siena_sriov_wanted(struct efx_nic *efx); |
49 | void efx_siena_sriov_reset(struct efx_nic *efx); | |
50 | void efx_siena_sriov_flr(struct efx_nic *efx, unsigned flr); | |
51 | ||
52 | int efx_siena_sriov_set_vf_mac(struct efx_nic *efx, int vf, u8 *mac); | |
53 | int efx_siena_sriov_set_vf_vlan(struct efx_nic *efx, int vf, | |
54 | u16 vlan, u8 qos); | |
55 | int efx_siena_sriov_set_vf_spoofchk(struct efx_nic *efx, int vf, | |
56 | bool spoofchk); | |
57 | int efx_siena_sriov_get_vf_config(struct efx_nic *efx, int vf, | |
58 | struct ifla_vf_info *ivf); | |
59 | ||
60 | #ifdef CONFIG_SFC_SRIOV | |
61 | ||
62 | static inline bool efx_siena_sriov_enabled(struct efx_nic *efx) | |
63 | { | |
64 | return efx->vf_init_count != 0; | |
65 | } | |
66 | #else /* !CONFIG_SFC_SRIOV */ | |
67 | static inline bool efx_siena_sriov_enabled(struct efx_nic *efx) | |
68 | { | |
69 | return false; | |
70 | } | |
71 | #endif /* CONFIG_SFC_SRIOV */ | |
72 | ||
73 | void efx_siena_sriov_probe(struct efx_nic *efx); | |
74 | void efx_siena_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event); | |
75 | void efx_siena_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event); | |
76 | void efx_siena_sriov_event(struct efx_channel *channel, efx_qword_t *event); | |
77 | void efx_siena_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq); | |
78 | ||
79 | #endif /* SIENA_SRIOV_H */ |