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[NET]: Introduce and use print_mac() and DECLARE_MAC_BUF()
[deliverable/linux.git] / drivers / net / ewrk3.c
CommitLineData
1da177e4
LT		 1/* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2
3 Written 1994 by David C. Davies.
4
5 Copyright 1994 Digital Equipment Corporation.
6
7 This software may be used and distributed according to the terms of
8 the GNU General Public License, incorporated herein by reference.
9
10 This driver is written for the Digital Equipment Corporation series
11 of EtherWORKS ethernet cards:
12
13 DE203 Turbo (BNC)
14 DE204 Turbo (TP)
15 DE205 Turbo (TP BNC)
16
17 The driver has been tested on a relatively busy network using the DE205
18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19 (7.8Mb/s) to a DECstation 5000/200.
20
21 The author may be reached at davies@maniac.ultranet.com.
22
23 =========================================================================
24 This driver has been written substantially from scratch, although its
25 inheritance of style and stack interface from 'depca.c' and in turn from
26 Donald Becker's 'lance.c' should be obvious.
27
28 The DE203/4/5 boards all use a new proprietary chip in place of the
29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
30 Use the depca.c driver in the standard distribution for the LANCE based
31 cards from DIGITAL; this driver will not work with them.
32
33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
34 only makes all the card accesses through I/O transactions and no high
35 (shared) memory is used. This mode provides a >48% performance penalty
36 and is deprecated in this driver, although allowed to provide initial
37 setup when hardstrapped.
38
39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
40 no point in using any mode other than the 2kB mode - their performances
41 are virtually identical, although the driver has been tested in the 2kB
42 and 32kB modes. I would suggest you uncomment the line:
43
44 FORCE_2K_MODE;
45
46 to allow the driver to configure the card as a 2kB card at your current
47 base address, thus leaving more room to clutter your system box with
48 other memory hungry boards.
49
50 As many ISA and EISA cards can be supported under this driver as you
51 wish, limited primarily by the available IRQ lines, rather than by the
52 available I/O addresses (24 ISA, 16 EISA). I have checked different
53 configurations of multiple depca cards and ewrk3 cards and have not
54 found a problem yet (provided you have at least depca.c v0.38) ...
55
56 The board IRQ setting must be at an unused IRQ which is auto-probed
57 using Donald Becker's autoprobe routines. All these cards are at
58 {5,10,11,15}.
59
60 No 16MB memory limitation should exist with this driver as DMA is not
61 used and the common memory area is in low memory on the network card (my
62 current system has 20MB and I've not had problems yet).
63
64 The ability to load this driver as a loadable module has been included
65 and used extensively during the driver development (to save those long
66 reboot sequences). To utilise this ability, you have to do 8 things:
67
68 0) have a copy of the loadable modules code installed on your system.
69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
70 temporary directory.
71 2) edit the source code near line 1898 to reflect the I/O address and
72 IRQ you're using.
73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
74 that the correct bits are compiled (see end of source code).
75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
76 kernel with the ewrk3 configuration turned off and reboot.
77 5) insmod ewrk3.o
78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards]
80 6) run the net startup bits for your new eth?? interface manually
81 (usually /etc/rc.inet[12] at boot time).
82 7) enjoy!
83
84 Note that autoprobing is not allowed in loadable modules - the system is
85 already up and running and you're messing with interrupts.
86
87 To unload a module, turn off the associated interface
88 'ifconfig eth?? down' then 'rmmod ewrk3'.
89
90 Promiscuous mode has been turned off in this driver, but all the
91 multicast address bits have been turned on. This improved the send
92 performance on a busy network by about 13%.
93
94 Ioctl's have now been provided (primarily because I wanted to grab some
95 packet size statistics). They are patterned after 'plipconfig.c' from a
96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
97 mode, add/delete multicast addresses, change the hardware address, get
98 packet size distribution statistics and muck around with the control and
99 status register. I'll add others if and when the need arises.
100
101 TO DO:
102 ------
103
104
105 Revision History
106 ----------------
107
108 Version Date Description
109
110 0.1 26-aug-94 Initial writing. ALPHA code release.
111 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
112 LeMAC version calc.,
113 IRQ vector assignments during autoprobe.
114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
115 Fixed up MCA hash table algorithm.
116 0.20 4-sep-94 Added IOCTL functionality.
117 0.21 14-sep-94 Added I/O mode.
118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
119 0.22 16-sep-94 Added more IOCTLs & tidied up.
120 0.23 21-sep-94 Added transmit cut through.
121 0.24 31-oct-94 Added uid checks in some ioctls.
122 0.30 1-nov-94 BETA code release.
123 0.31 5-dec-94 Added check/allocate region code.
124 0.32 16-jan-95 Broadcast packet fix.
125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
127 Rewrite for portability & updated.
128 ALPHA support from <jestabro@amt.tay1.dec.com>
129 Added verify_area() calls in ewrk3_ioctl() from
130 suggestion by <heiko@colossus.escape.de>.
131 Add new multicasting code.
132 0.41 20-Jan-96 Fix IRQ set up problem reported by
133 <kenneth@bbs.sas.ntu.ac.sg>.
134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com>
137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net>
138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com>
139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com>
140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua>
141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com>
142
143 =========================================================================
144 */
145
146#include <linux/module.h>
147#include <linux/kernel.h>
148#include <linux/string.h>
149#include <linux/errno.h>
150#include <linux/ioport.h>
151#include <linux/slab.h>
152#include <linux/interrupt.h>
153#include <linux/delay.h>
154#include <linux/init.h>
155#include <linux/crc32.h>
156#include <linux/netdevice.h>
157#include <linux/etherdevice.h>
158#include <linux/skbuff.h>
159#include <linux/ethtool.h>
160#include <linux/time.h>
161#include <linux/types.h>
162#include <linux/unistd.h>
163#include <linux/ctype.h>
164#include <linux/bitops.h>
165
166#include <asm/io.h>
167#include <asm/dma.h>
168#include <asm/uaccess.h>
169
170#include "ewrk3.h"
171
172#define DRV_NAME "ewrk3"
173#define DRV_VERSION "0.48"
174
175static char version[] __initdata =
176DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n";
177
178#ifdef EWRK3_DEBUG
179static int ewrk3_debug = EWRK3_DEBUG;
180#else
181static int ewrk3_debug = 1;
182#endif
183
184#define EWRK3_NDA 0xffe0 /* No Device Address */
185
186#define PROBE_LENGTH 32
187#define ETH_PROM_SIG 0xAA5500FFUL
188
189#ifndef EWRK3_SIGNATURE
190#define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
191#define EWRK3_STRLEN 8
192#endif
193
194#ifndef EWRK3_RAM_BASE_ADDRESSES
195#define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
196#endif
197
198/*
199 ** Sets up the I/O area for the autoprobe.
200 */
201#define EWRK3_IO_BASE 0x100 /* Start address for probe search */
202#define EWRK3_IOP_INC 0x20 /* I/O address increment */
203#define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
204
205#ifndef MAX_NUM_EWRK3S
206#define MAX_NUM_EWRK3S 21
207#endif
208
209#ifndef EWRK3_EISA_IO_PORTS
210#define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
211#endif
212
213#ifndef MAX_EISA_SLOTS
214#define MAX_EISA_SLOTS 16
215#define EISA_SLOT_INC 0x1000
216#endif
217
218#define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
219
220/*
221 ** EtherWORKS 3 shared memory window sizes
222 */
223#define IO_ONLY 0x00
224#define SHMEM_2K 0x800
225#define SHMEM_32K 0x8000
226#define SHMEM_64K 0x10000
227
228/*
229 ** EtherWORKS 3 IRQ ENABLE/DISABLE
230 */
231#define ENABLE_IRQs { \
232 icr |= lp->irq_mask;\
233 outb(icr, EWRK3_ICR); /* Enable the IRQs */\
234}
235
236#define DISABLE_IRQs { \
237 icr = inb(EWRK3_ICR);\
238 icr &= ~lp->irq_mask;\
239 outb(icr, EWRK3_ICR); /* Disable the IRQs */\
240}
241
242/*
243 ** EtherWORKS 3 START/STOP
244 */
245#define START_EWRK3 { \
246 csr = inb(EWRK3_CSR);\
247 csr &= ~(CSR_TXD|CSR_RXD);\
248 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
249}
250
251#define STOP_EWRK3 { \
252 csr = (CSR_TXD|CSR_RXD);\
253 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
254}
255
256/*
257 ** The EtherWORKS 3 private structure
258 */
259#define EWRK3_PKT_STAT_SZ 16
260#define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
261 increase EWRK3_PKT_STAT_SZ */
262
263struct ewrk3_stats {
264 u32 bins[EWRK3_PKT_STAT_SZ];
265 u32 unicast;
266 u32 multicast;
267 u32 broadcast;
268 u32 excessive_collisions;
269 u32 tx_underruns;
270 u32 excessive_underruns;
271};
272
273struct ewrk3_private {
274 char adapter_name[80]; /* Name exported to /proc/ioports */
275 u_long shmem_base; /* Shared memory start address */
276 void __iomem *shmem;
277 u_long shmem_length; /* Shared memory window length */
1da177e4
LT		 278 struct ewrk3_stats pktStats; /* Private stats counters */
279 u_char irq_mask; /* Adapter IRQ mask bits */
280 u_char mPage; /* Maximum 2kB Page number */
281 u_char lemac; /* Chip rev. level */
282 u_char hard_strapped; /* Don't allow a full open */
283 u_char txc; /* Transmit cut through */
284 void __iomem *mctbl; /* Pointer to the multicast table */
285 u_char led_mask; /* Used to reserve LED access for ethtool */
286 spinlock_t hw_lock;
287};
288
289/*
290 ** Force the EtherWORKS 3 card to be in 2kB MODE
291 */
292#define FORCE_2K_MODE { \
293 shmem_length = SHMEM_2K;\
294 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
295}
296
297/*
298 ** Public Functions
299 */
300static int ewrk3_open(struct net_device *dev);
301static int ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev);
7d12e780 302static irqreturn_t ewrk3_interrupt(int irq, void *dev_id);
1da177e4 303static int ewrk3_close(struct net_device *dev);
1da177e4
LT		 304static void set_multicast_list(struct net_device *dev);
305static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
7282d491
JG		 306static const struct ethtool_ops ethtool_ops_203;
307static const struct ethtool_ops ethtool_ops;
1da177e4
LT		 308
309/*
310 ** Private functions
311 */
312static int ewrk3_hw_init(struct net_device *dev, u_long iobase);
313static void ewrk3_init(struct net_device *dev);
314static int ewrk3_rx(struct net_device *dev);
315static int ewrk3_tx(struct net_device *dev);
316static void ewrk3_timeout(struct net_device *dev);
317
318static void EthwrkSignature(char *name, char *eeprom_image);
319static int DevicePresent(u_long iobase);
320static void SetMulticastFilter(struct net_device *dev);
321static int EISA_signature(char *name, s32 eisa_id);
322
323static int Read_EEPROM(u_long iobase, u_char eaddr);
324static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
325static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType);
326
327static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq);
328static int isa_probe(struct net_device *dev, u_long iobase);
329static int eisa_probe(struct net_device *dev, u_long iobase);
330
331static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12};
332
333static char name[EWRK3_STRLEN + 1];
334static int num_ewrks3s;
335
336/*
337 ** Miscellaneous defines...
338 */
339#define INIT_EWRK3 {\
340 outb(EEPROM_INIT, EWRK3_IOPR);\
341 mdelay(1);\
342}
343
344#ifndef MODULE
345struct net_device * __init ewrk3_probe(int unit)
346{
347 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private));
348 int err;
349
350 if (!dev)
351 return ERR_PTR(-ENOMEM);
352
353 if (unit >= 0) {
354 sprintf(dev->name, "eth%d", unit);
355 netdev_boot_setup_check(dev);
356 }
1da177e4
LT		 357
358 err = ewrk3_probe1(dev, dev->base_addr, dev->irq);
6aa20a22 359 if (err)
1da177e4
LT		 360 goto out;
361 return dev;
362out:
363 free_netdev(dev);
364 return ERR_PTR(err);
6aa20a22 365
1da177e4
LT		 366}
367#endif
368
369static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq)
370{
371 int err;
372
373 dev->base_addr = iobase;
374 dev->irq = irq;
375
376 /* Address PROM pattern */
377 err = isa_probe(dev, iobase);
6aa20a22 378 if (err != 0)
1da177e4
LT		 379 err = eisa_probe(dev, iobase);
380
381 if (err)
382 return err;
383
384 err = register_netdev(dev);
385 if (err)
386 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
387
388 return err;
389}
390
6aa20a22 391static int __init
1da177e4
LT		 392ewrk3_hw_init(struct net_device *dev, u_long iobase)
393{
394 struct ewrk3_private *lp;
395 int i, status = 0;
396 u_long mem_start, shmem_length;
397 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
398 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
0795af57 399 DECLARE_MAC_BUF(mac);
1da177e4
LT		 400
401 /*
402 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
403 ** This also disables the EISA_ENABLE bit in the EISA Control Register.
404 */
405 if (iobase > 0x400)
406 eisa_cr = inb(EISA_CR);
407 INIT_EWRK3;
408
409 nicsr = inb(EWRK3_CSR);
410
411 icr = inb(EWRK3_ICR);
412 icr &= 0x70;
413 outb(icr, EWRK3_ICR); /* Disable all the IRQs */
414
991b5557 415 if (nicsr != (CSR_TXD | CSR_RXD))
1da177e4
LT		 416 return -ENXIO;
417
1da177e4
LT		 418 /* Check that the EEPROM is alive and well and not living on Pluto... */
419 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) {
420 union {
421 short val;
422 char c[2];
423 } tmp;
424
425 tmp.val = (short) Read_EEPROM(iobase, (i >> 1));
426 eeprom_image[i] = tmp.c[0];
427 eeprom_image[i + 1] = tmp.c[1];
428 chksum += eeprom_image[i] + eeprom_image[i + 1];
429 }
430
431 if (chksum != 0) { /* Bad EEPROM Data! */
432 printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
433 return -ENXIO;
434 }
6aa20a22 435
1da177e4 436 EthwrkSignature(name, eeprom_image);
6aa20a22 437 if (*name == '\0')
1da177e4
LT		 438 return -ENXIO;
439
440 dev->base_addr = iobase;
6aa20a22 441
1da177e4
LT		 442 if (iobase > 0x400) {
443 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
444 }
445 lemac = eeprom_image[EEPROM_CHIPVER];
446 cmr = inb(EWRK3_CMR);
6aa20a22 447
1da177e4
LT		 448 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
449 ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
450 printk("%s: %s at %#4lx", dev->name, name, iobase);
451 hard_strapped = 1;
452 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) {
453 /* EISA slot address */
454 printk("%s: %s at %#4lx (EISA slot %ld)",
455 dev->name, name, iobase, ((iobase >> 12) & 0x0f));
456 } else { /* ISA port address */
457 printk("%s: %s at %#4lx", dev->name, name, iobase);
458 }
459
460 printk(", h/w address ");
461 if (lemac != LeMAC2)
462 DevicePresent(iobase); /* need after EWRK3_INIT */
463 status = get_hw_addr(dev, eeprom_image, lemac);
0795af57 464 printk("%s\n", print_mac(mac, dev->dev_addr));
6aa20a22 465
1da177e4
LT		 466 if (status) {
467 printk(" which has an EEPROM CRC error.\n");
468 return -ENXIO;
469 }
470
471 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
472 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
473 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)
474 cmr |= CMR_RA;
475 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)
476 cmr |= CMR_WB;
477 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)
478 cmr |= CMR_POLARITY;
479 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK)
480 cmr |= CMR_LINK;
481 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)
482 cmr |= CMR_0WS;
483 }
484 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)
485 cmr |= CMR_DRAM;
486 outb(cmr, EWRK3_CMR);
6aa20a22 487
1da177e4
LT		 488 cr = inb(EWRK3_CR); /* Set up the Control Register */
489 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
490 if (cr & SETUP_APD)
491 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
492 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
493 cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
494 outb(cr, EWRK3_CR);
495
496 /*
497 ** Determine the base address and window length for the EWRK3
498 ** RAM from the memory base register.
499 */
500 mem_start = inb(EWRK3_MBR);
501 shmem_length = 0;
502 if (mem_start != 0) {
503 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
504 mem_start *= SHMEM_64K;
505 shmem_length = SHMEM_64K;
506 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
507 mem_start *= SHMEM_32K;
508 shmem_length = SHMEM_32K;
509 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
510 mem_start = mem_start * SHMEM_2K + 0x80000;
511 shmem_length = SHMEM_2K;
512 } else {
513 return -ENXIO;
514 }
515 }
516 /*
517 ** See the top of this source code for comments about
518 ** uncommenting this line.
519 */
520/* FORCE_2K_MODE; */
6aa20a22 521
1da177e4
LT		 522 if (hard_strapped) {
523 printk(" is hard strapped.\n");
524 } else if (mem_start) {
525 printk(" has a %dk RAM window", (int) (shmem_length >> 10));
526 printk(" at 0x%.5lx", mem_start);
527 } else {
528 printk(" is in I/O only mode");
529 }
530
531 lp = netdev_priv(dev);
532 lp->shmem_base = mem_start;
533 lp->shmem = ioremap(mem_start, shmem_length);
534 if (!lp->shmem)
535 return -ENOMEM;
536 lp->shmem_length = shmem_length;
537 lp->lemac = lemac;
538 lp->hard_strapped = hard_strapped;
539 lp->led_mask = CR_LED;
540 spin_lock_init(&lp->hw_lock);
6aa20a22 541
1da177e4
LT		 542 lp->mPage = 64;
543 if (cmr & CMR_DRAM)
544 lp->mPage <<= 1; /* 2 DRAMS on module */
6aa20a22 545
1da177e4 546 sprintf(lp->adapter_name, "%s (%s)", name, dev->name);
6aa20a22 547
1da177e4 548 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM;
6aa20a22 549
1da177e4
LT		 550 if (!hard_strapped) {
551 /*
552 ** Enable EWRK3 board interrupts for autoprobing
553 */
554 icr |= ICR_IE; /* Enable interrupts */
555 outb(icr, EWRK3_ICR);
6aa20a22 556
1da177e4
LT		 557 /* The DMA channel may be passed in on this parameter. */
558 dev->dma = 0;
6aa20a22 559
1da177e4
LT		 560 /* To auto-IRQ we enable the initialization-done and DMA err,
561 interrupts. For now we will always get a DMA error. */
562 if (dev->irq < 2) {
563#ifndef MODULE
564 u_char irqnum;
565 unsigned long irq_mask;
6aa20a22 566
1da177e4
LT		 567
568 irq_mask = probe_irq_on();
6aa20a22 569
1da177e4
LT		 570 /*
571 ** Trigger a TNE interrupt.
572 */
573 icr |= ICR_TNEM;
574 outb(1, EWRK3_TDQ); /* Write to the TX done queue */
575 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
6aa20a22 576
1da177e4 577 irqnum = irq[((icr & IRQ_SEL) >> 4)];
6aa20a22 578
1da177e4
LT		 579 mdelay(20);
580 dev->irq = probe_irq_off(irq_mask);
581 if ((dev->irq) && (irqnum == dev->irq)) {
582 printk(" and uses IRQ%d.\n", dev->irq);
583 } else {
584 if (!dev->irq) {
585 printk(" and failed to detect IRQ line.\n");
586 } else if ((irqnum == 1) && (lemac == LeMAC2)) {
587 printk(" and an illegal IRQ line detected.\n");
588 } else {
589 printk(", but incorrect IRQ line detected.\n");
590 }
591 iounmap(lp->shmem);
592 return -ENXIO;
593 }
594
595 DISABLE_IRQs; /* Mask all interrupts */
596
597#endif /* MODULE */
598 } else {
599 printk(" and requires IRQ%d.\n", dev->irq);
600 }
601 }
602
603 if (ewrk3_debug > 1) {
604 printk(version);
605 }
606 /* The EWRK3-specific entries in the device structure. */
607 dev->open = ewrk3_open;
608 dev->hard_start_xmit = ewrk3_queue_pkt;
609 dev->stop = ewrk3_close;
1da177e4
LT		 610 dev->set_multicast_list = set_multicast_list;
611 dev->do_ioctl = ewrk3_ioctl;
612 if (lp->adapter_name[4] == '3')
613 SET_ETHTOOL_OPS(dev, &ethtool_ops_203);
614 else
615 SET_ETHTOOL_OPS(dev, &ethtool_ops);
616 dev->tx_timeout = ewrk3_timeout;
617 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT;
6aa20a22 618
1da177e4
LT		 619 dev->mem_start = 0;
620
621 return 0;
622}
6aa20a22 623
1da177e4
LT		 624
625static int ewrk3_open(struct net_device *dev)
626{
627 struct ewrk3_private *lp = netdev_priv(dev);
628 u_long iobase = dev->base_addr;
0795af57 629 int status = 0;
1da177e4
LT		 630 u_char icr, csr;
631
632 /*
633 ** Stop the TX and RX...
634 */
635 STOP_EWRK3;
636
637 if (!lp->hard_strapped) {
638 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) {
639 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq);
640 status = -EAGAIN;
641 } else {
642
643 /*
644 ** Re-initialize the EWRK3...
645 */
646 ewrk3_init(dev);
647
648 if (ewrk3_debug > 1) {
0795af57 649 DECLARE_MAC_BUF(mac);
1da177e4 650 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq);
0795af57
JP		 651 printk(" physical address: %s\n",
652 print_mac(mac, dev->dev_addr));
1da177e4
LT		 653 if (lp->shmem_length == 0) {
654 printk(" no shared memory, I/O only mode\n");
655 } else {
656 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base);
657 printk(" window length: 0x%04lx\n", lp->shmem_length);
658 }
659 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
660 printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
661 printk(" cr: 0x%02x\n", inb(EWRK3_CR));
662 printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
663 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
664 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
665 }
666 netif_start_queue(dev);
667 /*
668 ** Unmask EWRK3 board interrupts
669 */
670 icr = inb(EWRK3_ICR);
671 ENABLE_IRQs;
672
673 }
674 } else {
675 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name);
676 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n");
677 return -EINVAL;
678 }
679
680 return status;
681}
682
683/*
684 ** Initialize the EtherWORKS 3 operating conditions
685 */
686static void ewrk3_init(struct net_device *dev)
687{
688 struct ewrk3_private *lp = netdev_priv(dev);
689 u_char csr, page;
690 u_long iobase = dev->base_addr;
691 int i;
692
693 /*
694 ** Enable any multicasts
695 */
696 set_multicast_list(dev);
697
698 /*
699 ** Set hardware MAC address. Address is initialized from the EEPROM
700 ** during startup but may have since been changed by the user.
701 */
702 for (i=0; i<ETH_ALEN; i++)
703 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
704
705 /*
706 ** Clean out any remaining entries in all the queues here
707 */
708 while (inb(EWRK3_TQ));
709 while (inb(EWRK3_TDQ));
710 while (inb(EWRK3_RQ));
711 while (inb(EWRK3_FMQ));
712
713 /*
714 ** Write a clean free memory queue
715 */
716 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */
717 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
718 }
719
720 START_EWRK3; /* Enable the TX and/or RX */
721}
722
723/*
724 * Transmit timeout
725 */
6aa20a22 726
1da177e4
LT		 727static void ewrk3_timeout(struct net_device *dev)
728{
729 struct ewrk3_private *lp = netdev_priv(dev);
730 u_char icr, csr;
731 u_long iobase = dev->base_addr;
6aa20a22
JG		 732
733 if (!lp->hard_strapped)
1da177e4
LT		 734 {
735 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n",
736 dev->name, inb(EWRK3_CSR));
737
738 /*
739 ** Mask all board interrupts
740 */
741 DISABLE_IRQs;
742
743 /*
744 ** Stop the TX and RX...
745 */
746 STOP_EWRK3;
747
748 ewrk3_init(dev);
749
750 /*
751 ** Unmask EWRK3 board interrupts
752 */
753 ENABLE_IRQs;
754
755 dev->trans_start = jiffies;
756 netif_wake_queue(dev);
757 }
758}
759
760/*
761 ** Writes a socket buffer to the free page queue
762 */
763static int ewrk3_queue_pkt (struct sk_buff *skb, struct net_device *dev)
764{
765 struct ewrk3_private *lp = netdev_priv(dev);
766 u_long iobase = dev->base_addr;
767 void __iomem *buf = NULL;
768 u_char icr;
769 u_char page;
770
771 spin_lock_irq (&lp->hw_lock);
772 DISABLE_IRQs;
773
774 /* if no resources available, exit, request packet be queued */
775 if (inb (EWRK3_FMQC) == 0) {
776 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n",
777 dev->name);
778 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",
779 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR),
780 inb (EWRK3_FMQC));
781 goto err_out;
782 }
783
784 /*
785 ** Get a free page from the FMQ
786 */
787 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) {
788 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
789 (u_char) page);
790 goto err_out;
791 }
792
793
794 /*
795 ** Set up shared memory window and pointer into the window
796 */
797 if (lp->shmem_length == IO_ONLY) {
798 outb (page, EWRK3_IOPR);
799 } else if (lp->shmem_length == SHMEM_2K) {
800 buf = lp->shmem;
801 outb (page, EWRK3_MPR);
802 } else if (lp->shmem_length == SHMEM_32K) {
803 buf = (((short) page << 11) & 0x7800) + lp->shmem;
804 outb ((page >> 4), EWRK3_MPR);
805 } else if (lp->shmem_length == SHMEM_64K) {
806 buf = (((short) page << 11) & 0xf800) + lp->shmem;
807 outb ((page >> 5), EWRK3_MPR);
808 } else {
809 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n",
810 dev->name);
811 BUG ();
812 }
813
814 /*
815 ** Set up the buffer control structures and copy the data from
816 ** the socket buffer to the shared memory .
817 */
818 if (lp->shmem_length == IO_ONLY) {
819 int i;
820 u_char *p = skb->data;
821 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
822 outb ((char) (skb->len & 0xff), EWRK3_DATA);
823 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA);
824 outb ((char) 0x04, EWRK3_DATA);
825 for (i = 0; i < skb->len; i++) {
826 outb (*p++, EWRK3_DATA);
827 }
828 outb (page, EWRK3_TQ); /* Start sending pkt */
829 } else {
830 writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */
831 buf += 1;
832 writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */
833 buf += 1;
834 if (lp->txc) {
835 writeb(((skb->len >> 8) & 0xff) | XCT, buf);
836 buf += 1;
837 writeb (0x04, buf); /* index byte */
838 buf += 1;
839 writeb (0x00, (buf + skb->len)); /* Write the XCT flag */
840 memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */
841 outb (page, EWRK3_TQ); /* Start sending pkt */
842 memcpy_toio (buf + PRELOAD,
843 skb->data + PRELOAD,
844 skb->len - PRELOAD);
845 writeb (0xff, (buf + skb->len)); /* Write the XCT flag */
846 } else {
847 writeb ((skb->len >> 8) & 0xff, buf);
848 buf += 1;
849 writeb (0x04, buf); /* index byte */
850 buf += 1;
851 memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */
852 outb (page, EWRK3_TQ); /* Start sending pkt */
853 }
854 }
855
856 ENABLE_IRQs;
857 spin_unlock_irq (&lp->hw_lock);
858
09f75cd7 859 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 860 dev->trans_start = jiffies;
861 dev_kfree_skb (skb);
862
863 /* Check for free resources: stop Tx queue if there are none */
864 if (inb (EWRK3_FMQC) == 0)
865 netif_stop_queue (dev);
866
867 return 0;
868
869err_out:
870 ENABLE_IRQs;
871 spin_unlock_irq (&lp->hw_lock);
872 return 1;
873}
874
875/*
876 ** The EWRK3 interrupt handler.
877 */
7d12e780 878static irqreturn_t ewrk3_interrupt(int irq, void *dev_id)
1da177e4
LT		 879{
880 struct net_device *dev = dev_id;
881 struct ewrk3_private *lp;
882 u_long iobase;
883 u_char icr, cr, csr;
884
885 lp = netdev_priv(dev);
886 iobase = dev->base_addr;
887
888 /* get the interrupt information */
889 csr = inb(EWRK3_CSR);
890
891 /*
892 ** Mask the EWRK3 board interrupts and turn on the LED
893 */
894 spin_lock(&lp->hw_lock);
895 DISABLE_IRQs;
896
897 cr = inb(EWRK3_CR);
898 cr |= lp->led_mask;
899 outb(cr, EWRK3_CR);
900
901 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
902 ewrk3_rx(dev);
903
904 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
905 ewrk3_tx(dev);
906
907 /*
908 ** Now deal with the TX/RX disable flags. These are set when there
909 ** are no more resources. If resources free up then enable these
910 ** interrupts, otherwise mask them - failure to do this will result
911 ** in the system hanging in an interrupt loop.
912 */
913 if (inb(EWRK3_FMQC)) { /* any resources available? */
914 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */
915 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */
916 outb(csr, EWRK3_CSR);
917 netif_wake_queue(dev);
918 } else {
919 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */
920 }
921
922 /* Unmask the EWRK3 board interrupts and turn off the LED */
923 cr &= ~(lp->led_mask);
924 outb(cr, EWRK3_CR);
925 ENABLE_IRQs;
926 spin_unlock(&lp->hw_lock);
927 return IRQ_HANDLED;
928}
929
930/* Called with lp->hw_lock held */
931static int ewrk3_rx(struct net_device *dev)
932{
933 struct ewrk3_private *lp = netdev_priv(dev);
934 u_long iobase = dev->base_addr;
935 int i, status = 0;
936 u_char page;
937 void __iomem *buf = NULL;
938
939 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
940 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */
941 /*
942 ** Set up shared memory window and pointer into the window
943 */
944 if (lp->shmem_length == IO_ONLY) {
945 outb(page, EWRK3_IOPR);
946 } else if (lp->shmem_length == SHMEM_2K) {
947 buf = lp->shmem;
948 outb(page, EWRK3_MPR);
949 } else if (lp->shmem_length == SHMEM_32K) {
950 buf = (((short) page << 11) & 0x7800) + lp->shmem;
951 outb((page >> 4), EWRK3_MPR);
952 } else if (lp->shmem_length == SHMEM_64K) {
953 buf = (((short) page << 11) & 0xf800) + lp->shmem;
954 outb((page >> 5), EWRK3_MPR);
955 } else {
956 status = -1;
957 printk("%s: Oops - your private data area is hosed!\n", dev->name);
958 }
959
960 if (!status) {
961 char rx_status;
962 int pkt_len;
963
964 if (lp->shmem_length == IO_ONLY) {
965 rx_status = inb(EWRK3_DATA);
966 pkt_len = inb(EWRK3_DATA);
967 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8);
968 } else {
969 rx_status = readb(buf);
970 buf += 1;
971 pkt_len = readw(buf);
972 buf += 3;
973 }
974
975 if (!(rx_status & R_ROK)) { /* There was an error. */
09f75cd7 976 dev->stats.rx_errors++; /* Update the error stats. */
1da177e4 977 if (rx_status & R_DBE)
09f75cd7 978 dev->stats.rx_frame_errors++;
1da177e4 979 if (rx_status & R_CRC)
09f75cd7 980 dev->stats.rx_crc_errors++;
1da177e4 981 if (rx_status & R_PLL)
09f75cd7 982 dev->stats.rx_fifo_errors++;
1da177e4
LT		 983 } else {
984 struct sk_buff *skb;
985
986 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
987 unsigned char *p;
1da177e4
LT		 988 skb_reserve(skb, 2); /* Align to 16 bytes */
989 p = skb_put(skb, pkt_len);
990
991 if (lp->shmem_length == IO_ONLY) {
992 *p = inb(EWRK3_DATA); /* dummy read */
993 for (i = 0; i < pkt_len; i++) {
994 *p++ = inb(EWRK3_DATA);
995 }
996 } else {
997 memcpy_fromio(p, buf, pkt_len);
998 }
999
1000 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) {
1001 if (pkt_len < i * EWRK3_PKT_BIN_SZ) {
1002 lp->pktStats.bins[i]++;
1003 i = EWRK3_PKT_STAT_SZ;
1004 }
1005 }
1006 p = skb->data; /* Look at the dest addr */
1007 if (p[0] & 0x01) { /* Multicast/Broadcast */
1008 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) {
1009 lp->pktStats.broadcast++;
1010 } else {
1011 lp->pktStats.multicast++;
1012 }
1013 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) &&
1014 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) &&
1015 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) {
1016 lp->pktStats.unicast++;
1017 }
1018 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1019 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1020 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1021 }
1022 /*
1023 ** Notify the upper protocol layers that there is another
1024 ** packet to handle
1025 */
1026 skb->protocol = eth_type_trans(skb, dev);
1027 netif_rx(skb);
1028
1029 /*
1030 ** Update stats
1031 */
1032 dev->last_rx = jiffies;
09f75cd7
JG		 1033 dev->stats.rx_packets++;
1034 dev->stats.rx_bytes += pkt_len;
1da177e4
LT		 1035 } else {
1036 printk("%s: Insufficient memory; nuking packet.\n", dev->name);
09f75cd7 1037 dev->stats.rx_dropped++; /* Really, deferred. */
1da177e4
LT		 1038 break;
1039 }
1040 }
1041 }
1042 /*
1043 ** Return the received buffer to the free memory queue
1044 */
1045 outb(page, EWRK3_FMQ);
1046 } else {
1047 printk("ewrk3_rx(): Illegal page number, page %d\n", page);
1048 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC));
1049 }
1050 }
1051 return status;
1052}
1053
1054/*
1055** Buffer sent - check for TX buffer errors.
1056** Called with lp->hw_lock held
1057*/
1058static int ewrk3_tx(struct net_device *dev)
1059{
1060 struct ewrk3_private *lp = netdev_priv(dev);
1061 u_long iobase = dev->base_addr;
1062 u_char tx_status;
1063
1064 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1065 if (tx_status & T_VSTS) { /* The status is valid */
1066 if (tx_status & T_TXE) {
09f75cd7 1067 dev->stats.tx_errors++;
1da177e4 1068 if (tx_status & T_NCL)
09f75cd7 1069 dev->stats.tx_carrier_errors++;
1da177e4 1070 if (tx_status & T_LCL)
09f75cd7 1071 dev->stats.tx_window_errors++;
1da177e4
LT		 1072 if (tx_status & T_CTU) {
1073 if ((tx_status & T_COLL) ^ T_XUR) {
1074 lp->pktStats.tx_underruns++;
1075 } else {
1076 lp->pktStats.excessive_underruns++;
1077 }
1078 } else if (tx_status & T_COLL) {
1079 if ((tx_status & T_COLL) ^ T_XCOLL) {
09f75cd7 1080 dev->stats.collisions++;
1da177e4
LT		 1081 } else {
1082 lp->pktStats.excessive_collisions++;
1083 }
1084 }
1085 } else {
09f75cd7 1086 dev->stats.tx_packets++;
1da177e4
LT		 1087 }
1088 }
1089 }
1090
1091 return 0;
1092}
1093
1094static int ewrk3_close(struct net_device *dev)
1095{
1096 struct ewrk3_private *lp = netdev_priv(dev);
1097 u_long iobase = dev->base_addr;
1098 u_char icr, csr;
1099
1100 netif_stop_queue(dev);
6aa20a22 1101
1da177e4
LT		 1102 if (ewrk3_debug > 1) {
1103 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1104 dev->name, inb(EWRK3_CSR));
1105 }
1106 /*
1107 ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1108 */
1109 DISABLE_IRQs;
1110
1111 STOP_EWRK3;
1112
1113 /*
1114 ** Clean out the TX and RX queues here (note that one entry
1115 ** may get added to either the TXD or RX queues if the TX or RX
1116 ** just starts processing a packet before the STOP_EWRK3 command
1117 ** is received. This will be flushed in the ewrk3_open() call).
1118 */
1119 while (inb(EWRK3_TQ));
1120 while (inb(EWRK3_TDQ));
1121 while (inb(EWRK3_RQ));
1122
1123 if (!lp->hard_strapped) {
1124 free_irq(dev->irq, dev);
1125 }
1126 return 0;
1127}
1128
1da177e4
LT		 1129/*
1130 ** Set or clear the multicast filter for this adapter.
1131 */
1132static void set_multicast_list(struct net_device *dev)
1133{
1134 struct ewrk3_private *lp = netdev_priv(dev);
1135 u_long iobase = dev->base_addr;
1136 u_char csr;
1137
1138 csr = inb(EWRK3_CSR);
1139
1140 if (lp->shmem_length == IO_ONLY) {
1141 lp->mctbl = NULL;
1142 } else {
1143 lp->mctbl = lp->shmem + PAGE0_HTE;
1144 }
1145
1146 csr &= ~(CSR_PME | CSR_MCE);
1147 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1148 csr |= CSR_PME;
1149 outb(csr, EWRK3_CSR);
1150 } else {
1151 SetMulticastFilter(dev);
1152 csr |= CSR_MCE;
1153 outb(csr, EWRK3_CSR);
1154 }
1155}
1156
1157/*
1158 ** Calculate the hash code and update the logical address filter
1159 ** from a list of ethernet multicast addresses.
1160 ** Little endian crc one liner from Matt Thomas, DEC.
1161 **
1162 ** Note that when clearing the table, the broadcast bit must remain asserted
1163 ** to receive broadcast messages.
1164 */
1165static void SetMulticastFilter(struct net_device *dev)
1166{
1167 struct ewrk3_private *lp = netdev_priv(dev);
1168 struct dev_mc_list *dmi = dev->mc_list;
1169 u_long iobase = dev->base_addr;
1170 int i;
1171 char *addrs, bit, byte;
1172 short __iomem *p = lp->mctbl;
1173 u16 hashcode;
1174 u32 crc;
1175
1176 spin_lock_irq(&lp->hw_lock);
1177
1178 if (lp->shmem_length == IO_ONLY) {
1179 outb(0, EWRK3_IOPR);
1180 outw(PAGE0_HTE, EWRK3_PIR1);
1181 } else {
1182 outb(0, EWRK3_MPR);
1183 }
1184
1185 if (dev->flags & IFF_ALLMULTI) {
1186 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1187 if (lp->shmem_length == IO_ONLY) {
1188 outb(0xff, EWRK3_DATA);
1189 } else { /* memset didn't work here */
1190 writew(0xffff, p);
1191 p++;
1192 i++;
1193 }
1194 }
1195 } else {
1196 /* Clear table except for broadcast bit */
1197 if (lp->shmem_length == IO_ONLY) {
1198 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) {
1199 outb(0x00, EWRK3_DATA);
1200 }
1201 outb(0x80, EWRK3_DATA);
1202 i++; /* insert the broadcast bit */
1203 for (; i < (HASH_TABLE_LEN >> 3); i++) {
1204 outb(0x00, EWRK3_DATA);
1205 }
1206 } else {
1207 memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3);
1208 writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1);
1209 }
1210
1211 /* Update table */
1212 for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */
1213 addrs = dmi->dmi_addr;
1214 dmi = dmi->next;
1215 if ((*addrs & 0x01) == 1) { /* multicast address? */
1216 crc = ether_crc_le(ETH_ALEN, addrs);
1217 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1218
1219 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1220 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1221
1222 if (lp->shmem_length == IO_ONLY) {
1223 u_char tmp;
1224
1225 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1226 tmp = inb(EWRK3_DATA);
1227 tmp |= bit;
1228 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1229 outb(tmp, EWRK3_DATA);
1230 } else {
1231 writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1232 }
1233 }
1234 }
1235 }
1236
1237 spin_unlock_irq(&lp->hw_lock);
1238}
1239
1240/*
1241 ** ISA bus I/O device probe
1242 */
1243static int __init isa_probe(struct net_device *dev, u_long ioaddr)
1244{
1245 int i = num_ewrks3s, maxSlots;
1246 int ret = -ENODEV;
1247
1248 u_long iobase;
1249
1250 if (ioaddr >= 0x400)
1251 goto out;
1252
1253 if (ioaddr == 0) { /* Autoprobing */
1254 iobase = EWRK3_IO_BASE; /* Get the first slot address */
1255 maxSlots = 24;
1256 } else { /* Probe a specific location */
1257 iobase = ioaddr;
1258 maxSlots = i + 1;
1259 }
1260
1261 for (; (i < maxSlots) && (dev != NULL);
1262 iobase += EWRK3_IOP_INC, i++)
1263 {
1264 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) {
1265 if (DevicePresent(iobase) == 0) {
1266 int irq = dev->irq;
1267 ret = ewrk3_hw_init(dev, iobase);
1268 if (!ret)
1269 break;
1270 dev->irq = irq;
1271 }
1272 release_region(iobase, EWRK3_TOTAL_SIZE);
1273 }
1274 }
1275 out:
1276
1277 return ret;
1278}
1279
1280/*
1281 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1282 ** the motherboard.
1283 */
1284static int __init eisa_probe(struct net_device *dev, u_long ioaddr)
1285{
1286 int i, maxSlots;
1287 u_long iobase;
1288 int ret = -ENODEV;
1289
1290 if (ioaddr < 0x1000)
1291 goto out;
1292
6835d09a
AB		 1293 iobase = ioaddr;
1294 i = (ioaddr >> 12);
1295 maxSlots = i + 1;
1da177e4
LT		 1296
1297 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) {
1298 if (EISA_signature(name, EISA_ID) == 0) {
1299 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) &&
1300 DevicePresent(iobase) == 0) {
1301 int irq = dev->irq;
1302 ret = ewrk3_hw_init(dev, iobase);
1303 if (!ret)
1304 break;
1305 dev->irq = irq;
1306 }
1307 release_region(iobase, EWRK3_TOTAL_SIZE);
1308 }
1309 }
1310
1311 out:
1312 return ret;
1313}
1314
1315
1316/*
1317 ** Read the EWRK3 EEPROM using this routine
1318 */
1319static int Read_EEPROM(u_long iobase, u_char eaddr)
1320{
1321 int i;
1322
1323 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1324 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1325 for (i = 0; i < 5000; i++)
1326 inb(EWRK3_CSR); /* wait 1msec */
1327
1328 return inw(EWRK3_EPROM1); /* 16 bits data return */
1329}
1330
1331/*
1332 ** Write the EWRK3 EEPROM using this routine
1333 */
1334static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1335{
1336 int i;
1337
1338 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1339 for (i = 0; i < 5000; i++)
1340 inb(EWRK3_CSR); /* wait 1msec */
1341 outw(data, EWRK3_EPROM1); /* write data to register */
1342 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1343 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1344 for (i = 0; i < 75000; i++)
1345 inb(EWRK3_CSR); /* wait 15msec */
1346 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1347 for (i = 0; i < 5000; i++)
1348 inb(EWRK3_CSR); /* wait 1msec */
1349
1350 return 0;
1351}
1352
1353/*
1354 ** Look for a particular board name in the on-board EEPROM.
1355 */
1356static void __init EthwrkSignature(char *name, char *eeprom_image)
1357{
1358 int i;
1359 char *signatures[] = EWRK3_SIGNATURE;
1360
1361 for (i=0; *signatures[i] != '\0'; i++)
1362 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) )
1363 break;
1364
1365 if (*signatures[i] != '\0') {
1366 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN);
1367 name[EWRK3_STRLEN] = '\0';
1368 } else
1369 name[0] = '\0';
1370
1371 return;
1372}
1373
1374/*
1375 ** Look for a special sequence in the Ethernet station address PROM that
1376 ** is common across all EWRK3 products.
1377 **
1378 ** Search the Ethernet address ROM for the signature. Since the ROM address
1379 ** counter can start at an arbitrary point, the search must include the entire
1380 ** probe sequence length plus the (length_of_the_signature - 1).
1381 ** Stop the search IMMEDIATELY after the signature is found so that the
1382 ** PROM address counter is correctly positioned at the start of the
1383 ** ethernet address for later read out.
1384 */
1385
1386static int __init DevicePresent(u_long iobase)
1387{
1388 union {
1389 struct {
1390 u32 a;
1391 u32 b;
1392 } llsig;
1393 char Sig[sizeof(u32) << 1];
1394 }
1395 dev;
1396 short sigLength;
1397 char data;
1398 int i, j, status = 0;
1399
1400 dev.llsig.a = ETH_PROM_SIG;
1401 dev.llsig.b = ETH_PROM_SIG;
1402 sigLength = sizeof(u32) << 1;
1403
1404 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1405 data = inb(EWRK3_APROM);
1406 if (dev.Sig[j] == data) { /* track signature */
1407 j++;
1408 } else { /* lost signature; begin search again */
1409 if (data == dev.Sig[0]) {
1410 j = 1;
1411 } else {
1412 j = 0;
1413 }
1414 }
1415 }
1416
1417 if (j != sigLength) {
1418 status = -ENODEV; /* search failed */
1419 }
1420 return status;
1421}
1422
1423static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType)
1424{
1425 int i, j, k;
1426 u_short chksum;
1427 u_char crc, lfsr, sd, status = 0;
1428 u_long iobase = dev->base_addr;
1429 u16 tmp;
1430
1431 if (chipType == LeMAC2) {
1432 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) {
1433 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1434 outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1435 for (k = 0; k < 8; k++, sd >>= 1) {
1436 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1437 crc = (crc >> 1) + lfsr;
1438 }
1439 }
1440 if (crc != eeprom_image[EEPROM_PA_CRC])
1441 status = -1;
1442 } else {
1443 for (i = 0, k = 0; i < ETH_ALEN;) {
1444 k <<= 1;
1445 if (k > 0xffff)
1446 k -= 0xffff;
1447
1448 k += (u_char) (tmp = inb(EWRK3_APROM));
1449 dev->dev_addr[i] = (u_char) tmp;
1450 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1451 i++;
1452 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1453 dev->dev_addr[i] = (u_char) tmp;
1454 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1455 i++;
1456
1457 if (k > 0xffff)
1458 k -= 0xffff;
1459 }
1460 if (k == 0xffff)
1461 k = 0;
1462 chksum = inb(EWRK3_APROM);
1463 chksum |= (inb(EWRK3_APROM) << 8);
1464 if (k != chksum)
1465 status = -1;
1466 }
1467
1468 return status;
1469}
1470
1471/*
1472 ** Look for a particular board name in the EISA configuration space
1473 */
1474static int __init EISA_signature(char *name, s32 eisa_id)
1475{
1476 u_long i;
1477 char *signatures[] = EWRK3_SIGNATURE;
1478 char ManCode[EWRK3_STRLEN];
1479 union {
1480 s32 ID;
1481 char Id[4];
1482 } Eisa;
1483 int status = 0;
1484
1485 *name = '\0';
1486 for (i = 0; i < 4; i++) {
1487 Eisa.Id[i] = inb(eisa_id + i);
1488 }
1489
1490 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40);
1491 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40);
1492 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30);
1493 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30);
1494 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30);
1495 ManCode[5] = '\0';
1496
1497 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) {
1498 if (strstr(ManCode, signatures[i]) != NULL) {
1499 strcpy(name, ManCode);
1500 status = 1;
1501 }
1502 }
1503
1504 return status; /* return the device name string */
1505}
1506
1507static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1508{
1509 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL);
1510
1511 strcpy(info->driver, DRV_NAME);
1512 strcpy(info->version, DRV_VERSION);
1513 sprintf(info->fw_version, "%d", fwrev);
1514 strcpy(info->bus_info, "N/A");
1515 info->eedump_len = EEPROM_MAX;
1516}
1517
1518static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1519{
1520 struct ewrk3_private *lp = netdev_priv(dev);
1521 unsigned long iobase = dev->base_addr;
1522 u8 cr = inb(EWRK3_CR);
1523
1524 switch (lp->adapter_name[4]) {
1525 case '3': /* DE203 */
1526 ecmd->supported = SUPPORTED_BNC;
1527 ecmd->port = PORT_BNC;
1528 break;
1529
1530 case '4': /* DE204 */
1531 ecmd->supported = SUPPORTED_TP;
1532 ecmd->port = PORT_TP;
1533 break;
1534
1535 case '5': /* DE205 */
1536 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI;
1537 ecmd->autoneg = !(cr & CR_APD);
1538 /*
1539 ** Port is only valid if autoneg is disabled
1540 ** and even then we don't know if AUI is jumpered.
1541 */
1542 if (!ecmd->autoneg)
1543 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP;
1544 break;
1545 }
1546
1547 ecmd->supported |= SUPPORTED_10baseT_Half;
1548 ecmd->speed = SPEED_10;
1549 ecmd->duplex = DUPLEX_HALF;
1550 return 0;
1551}
1552
1553static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1554{
1555 struct ewrk3_private *lp = netdev_priv(dev);
1556 unsigned long iobase = dev->base_addr;
1557 unsigned long flags;
1558 u8 cr;
1559
1560 /* DE205 is the only card with anything to set */
1561 if (lp->adapter_name[4] != '5')
1562 return -EOPNOTSUPP;
1563
1564 /* Sanity-check parameters */
1565 if (ecmd->speed != SPEED_10)
1566 return -EINVAL;
1567 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC)
1568 return -EINVAL; /* AUI is not software-selectable */
1569 if (ecmd->transceiver != XCVR_INTERNAL)
1570 return -EINVAL;
1571 if (ecmd->duplex != DUPLEX_HALF)
1572 return -EINVAL;
1573 if (ecmd->phy_address != 0)
1574 return -EINVAL;
1575
1576 spin_lock_irqsave(&lp->hw_lock, flags);
1577 cr = inb(EWRK3_CR);
1578
1579 /* If Autoneg is set, change to Auto Port mode */
1580 /* Otherwise, disable Auto Port and set port explicitly */
1581 if (ecmd->autoneg) {
1582 cr &= ~CR_APD;
1583 } else {
1584 cr |= CR_APD;
1585 if (ecmd->port == PORT_TP)
1586 cr &= ~CR_PSEL; /* Force TP */
1587 else
1588 cr |= CR_PSEL; /* Force BNC */
1589 }
1590
1591 /* Commit the changes */
1592 outb(cr, EWRK3_CR);
1593 spin_unlock_irqrestore(&lp->hw_lock, flags);
1594 return 0;
1595}
1596
1597static u32 ewrk3_get_link(struct net_device *dev)
1598{
1599 unsigned long iobase = dev->base_addr;
1600 u8 cmr = inb(EWRK3_CMR);
1601 /* DE203 has BNC only and link status does not apply */
1602 /* On DE204 this is always valid since TP is the only port. */
1603 /* On DE205 this reflects TP status even if BNC or AUI is selected. */
1604 return !(cmr & CMR_LINK);
1605}
1606
1607static int ewrk3_phys_id(struct net_device *dev, u32 data)
1608{
1609 struct ewrk3_private *lp = netdev_priv(dev);
1610 unsigned long iobase = dev->base_addr;
1611 unsigned long flags;
1612 u8 cr;
1613 int count;
1614
1615 /* Toggle LED 4x per second */
1616 count = data << 2;
1617
1618 spin_lock_irqsave(&lp->hw_lock, flags);
1619
1620 /* Bail if a PHYS_ID is already in progress */
1621 if (lp->led_mask == 0) {
1622 spin_unlock_irqrestore(&lp->hw_lock, flags);
1623 return -EBUSY;
1624 }
1625
1626 /* Prevent ISR from twiddling the LED */
1627 lp->led_mask = 0;
1628
1629 while (count--) {
1630 /* Toggle the LED */
1631 cr = inb(EWRK3_CR);
1632 outb(cr ^ CR_LED, EWRK3_CR);
1633
1634 /* Wait a little while */
1635 spin_unlock_irqrestore(&lp->hw_lock, flags);
1636 msleep(250);
1637 spin_lock_irqsave(&lp->hw_lock, flags);
1638
1639 /* Exit if we got a signal */
1640 if (signal_pending(current))
1641 break;
1642 }
1643
1644 lp->led_mask = CR_LED;
1645 cr = inb(EWRK3_CR);
1646 outb(cr & ~CR_LED, EWRK3_CR);
1647 spin_unlock_irqrestore(&lp->hw_lock, flags);
1648 return signal_pending(current) ? -ERESTARTSYS : 0;
1649}
1650
7282d491 1651static const struct ethtool_ops ethtool_ops_203 = {
1da177e4
LT		 1652 .get_drvinfo = ewrk3_get_drvinfo,
1653 .get_settings = ewrk3_get_settings,
1654 .set_settings = ewrk3_set_settings,
1655 .phys_id = ewrk3_phys_id,
1656};
1657
7282d491 1658static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 1659 .get_drvinfo = ewrk3_get_drvinfo,
1660 .get_settings = ewrk3_get_settings,
1661 .set_settings = ewrk3_set_settings,
1662 .get_link = ewrk3_get_link,
1663 .phys_id = ewrk3_phys_id,
1664};
1665
1666/*
1667 ** Perform IOCTL call functions here. Some are privileged operations and the
1668 ** effective uid is checked in those cases.
1669 */
1670static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1671{
1672 struct ewrk3_private *lp = netdev_priv(dev);
1673 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru;
1674 u_long iobase = dev->base_addr;
1675 int i, j, status = 0;
1676 u_char csr;
1677 unsigned long flags;
1678 union ewrk3_addr {
1679 u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1680 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1681 };
6aa20a22 1682
1da177e4
LT		 1683 union ewrk3_addr *tmp;
1684
1685 /* All we handle are private IOCTLs */
1686 if (cmd != EWRK3IOCTL)
1687 return -EOPNOTSUPP;
1688
1689 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL);
1690 if(tmp==NULL)
1691 return -ENOMEM;
1692
1693 switch (ioc->cmd) {
1694 case EWRK3_GET_HWADDR: /* Get the hardware address */
1695 for (i = 0; i < ETH_ALEN; i++) {
1696 tmp->addr[i] = dev->dev_addr[i];
1697 }
1698 ioc->len = ETH_ALEN;
1699 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1700 status = -EFAULT;
1701 break;
6aa20a22 1702
1da177e4
LT		 1703 case EWRK3_SET_HWADDR: /* Set the hardware address */
1704 if (capable(CAP_NET_ADMIN)) {
1705 spin_lock_irqsave(&lp->hw_lock, flags);
1706 csr = inb(EWRK3_CSR);
1707 csr |= (CSR_TXD | CSR_RXD);
1708 outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1709 spin_unlock_irqrestore(&lp->hw_lock, flags);
1710
1711 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) {
1712 status = -EFAULT;
1713 break;
1714 }
1715 spin_lock_irqsave(&lp->hw_lock, flags);
1716 for (i = 0; i < ETH_ALEN; i++) {
1717 dev->dev_addr[i] = tmp->addr[i];
1718 outb(tmp->addr[i], EWRK3_PAR0 + i);
1719 }
1720
1721 csr = inb(EWRK3_CSR);
1722 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */
1723 outb(csr, EWRK3_CSR);
1724 spin_unlock_irqrestore(&lp->hw_lock, flags);
1725 } else {
1726 status = -EPERM;
1727 }
1728
1729 break;
1730 case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1731 if (capable(CAP_NET_ADMIN)) {
1732 spin_lock_irqsave(&lp->hw_lock, flags);
1733 csr = inb(EWRK3_CSR);
1734 csr |= CSR_PME;
1735 csr &= ~CSR_MCE;
1736 outb(csr, EWRK3_CSR);
1737 spin_unlock_irqrestore(&lp->hw_lock, flags);
1738 } else {
1739 status = -EPERM;
1740 }
1741
1742 break;
1743 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1744 if (capable(CAP_NET_ADMIN)) {
1745 spin_lock_irqsave(&lp->hw_lock, flags);
1746 csr = inb(EWRK3_CSR);
1747 csr &= ~CSR_PME;
1748 outb(csr, EWRK3_CSR);
1749 spin_unlock_irqrestore(&lp->hw_lock, flags);
1750 } else {
1751 status = -EPERM;
1752 }
1753
1754 break;
1755 case EWRK3_GET_MCA: /* Get the multicast address table */
1756 spin_lock_irqsave(&lp->hw_lock, flags);
1757 if (lp->shmem_length == IO_ONLY) {
1758 outb(0, EWRK3_IOPR);
1759 outw(PAGE0_HTE, EWRK3_PIR1);
1760 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1761 tmp->addr[i] = inb(EWRK3_DATA);
1762 }
1763 } else {
1764 outb(0, EWRK3_MPR);
1765 memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3));
1766 }
1767 spin_unlock_irqrestore(&lp->hw_lock, flags);
1768
1769 ioc->len = (HASH_TABLE_LEN >> 3);
1770 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1771 status = -EFAULT;
1772
1773 break;
1774 case EWRK3_SET_MCA: /* Set a multicast address */
1775 if (capable(CAP_NET_ADMIN)) {
1776 if (ioc->len > 1024)
1777 {
1778 status = -EINVAL;
1779 break;
1780 }
1781 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) {
1782 status = -EFAULT;
1783 break;
1784 }
1785 set_multicast_list(dev);
1786 } else {
1787 status = -EPERM;
1788 }
1789
1790 break;
1791 case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1792 if (capable(CAP_NET_ADMIN)) {
1793 set_multicast_list(dev);
1794 } else {
1795 status = -EPERM;
1796 }
1797
1798 break;
1799 case EWRK3_MCA_EN: /* Enable multicast addressing */
1800 if (capable(CAP_NET_ADMIN)) {
1801 spin_lock_irqsave(&lp->hw_lock, flags);
1802 csr = inb(EWRK3_CSR);
1803 csr |= CSR_MCE;
1804 csr &= ~CSR_PME;
1805 outb(csr, EWRK3_CSR);
1806 spin_unlock_irqrestore(&lp->hw_lock, flags);
1807 } else {
1808 status = -EPERM;
1809 }
1810
1811 break;
1812 case EWRK3_GET_STATS: { /* Get the driver statistics */
1813 struct ewrk3_stats *tmp_stats =
1814 kmalloc(sizeof(lp->pktStats), GFP_KERNEL);
1815 if (!tmp_stats) {
1816 status = -ENOMEM;
1817 break;
1818 }
1819
1820 spin_lock_irqsave(&lp->hw_lock, flags);
1821 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats));
1822 spin_unlock_irqrestore(&lp->hw_lock, flags);
1823
1824 ioc->len = sizeof(lp->pktStats);
1825 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats)))
1826 status = -EFAULT;
1827 kfree(tmp_stats);
1828 break;
1829 }
1830 case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1831 if (capable(CAP_NET_ADMIN)) {
1832 spin_lock_irqsave(&lp->hw_lock, flags);
1833 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1834 spin_unlock_irqrestore(&lp->hw_lock,flags);
1835 } else {
1836 status = -EPERM;
1837 }
1838
1839 break;
1840 case EWRK3_GET_CSR: /* Get the CSR Register contents */
1841 tmp->addr[0] = inb(EWRK3_CSR);
1842 ioc->len = 1;
1843 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1844 status = -EFAULT;
1845 break;
1846 case EWRK3_SET_CSR: /* Set the CSR Register contents */
1847 if (capable(CAP_NET_ADMIN)) {
1848 if (copy_from_user(tmp->addr, ioc->data, 1)) {
1849 status = -EFAULT;
1850 break;
1851 }
1852 outb(tmp->addr[0], EWRK3_CSR);
1853 } else {
1854 status = -EPERM;
1855 }
1856
1857 break;
1858 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1859 if (capable(CAP_NET_ADMIN)) {
1860 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1861 tmp->val[i] = (short) Read_EEPROM(iobase, i);
1862 }
1863 i = EEPROM_MAX;
1864 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1865 for (j = 0; j < ETH_ALEN; j++) {
1866 tmp->addr[i++] = inb(EWRK3_PAR0 + j);
1867 }
1868 ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1869 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1870 status = -EFAULT;
1871 } else {
1872 status = -EPERM;
1873 }
1874
1875 break;
1876 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1877 if (capable(CAP_NET_ADMIN)) {
1878 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) {
1879 status = -EFAULT;
1880 break;
1881 }
1882 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1883 Write_EEPROM(tmp->val[i], iobase, i);
1884 }
1885 } else {
1886 status = -EPERM;
1887 }
1888
1889 break;
1890 case EWRK3_GET_CMR: /* Get the CMR Register contents */
1891 tmp->addr[0] = inb(EWRK3_CMR);
1892 ioc->len = 1;
1893 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1894 status = -EFAULT;
1895 break;
1896 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1897 if (capable(CAP_NET_ADMIN)) {
1898 lp->txc = 1;
1899 } else {
1900 status = -EPERM;
1901 }
1902
1903 break;
1904 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1905 if (capable(CAP_NET_ADMIN)) {
1906 lp->txc = 0;
1907 } else {
1908 status = -EPERM;
1909 }
1910
1911 break;
1912 default:
1913 status = -EOPNOTSUPP;
1914 }
1915 kfree(tmp);
1916 return status;
1917}
1918
1919#ifdef MODULE
1920static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S];
1921static int ndevs;
1922static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, };
1923
1924/* '21' below should really be 'MAX_NUM_EWRK3S' */
1925module_param_array(io, int, NULL, 0);
1926module_param_array(irq, int, NULL, 0);
1927MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)");
1928MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)");
1929
1930static __exit void ewrk3_exit_module(void)
1931{
1932 int i;
1933
1934 for( i=0; i<ndevs; i++ ) {
1935 struct net_device *dev = ewrk3_devs[i];
1936 struct ewrk3_private *lp = netdev_priv(dev);
1937 ewrk3_devs[i] = NULL;
1938 unregister_netdev(dev);
1939 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
1940 iounmap(lp->shmem);
1941 free_netdev(dev);
1942 }
1943}
1944
1945static __init int ewrk3_init_module(void)
1946{
1947 int i=0;
1948
1949 while( io[i] && irq[i] ) {
1950 struct net_device *dev
1951 = alloc_etherdev(sizeof(struct ewrk3_private));
1952
1953 if (!dev)
1954 break;
1955
1956 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) {
1957 free_netdev(dev);
1958 break;
1959 }
1960
1961 ewrk3_devs[ndevs++] = dev;
1962 i++;
1963 }
1964
1965 return ndevs ? 0 : -EIO;
1966}
1967
1968
1969/* Hack for breakage in new module stuff */
1970module_exit(ewrk3_exit_module);
1971module_init(ewrk3_init_module);
1972#endif /* MODULE */
1973MODULE_LICENSE("GPL");
1974
6aa20a22 1975
1da177e4
LT		 1976
1977/*
1978 * Local variables:
1979 * compile-command: "gcc -D__KERNEL__ -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1980 *
1981 * compile-command: "gcc -D__KERNEL__ -DMODULE -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1982 * End:
1983 */
Linux kernel - Deliverables
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