[deliverable/linux.git] / drivers / net / fs_enet / fs_enet.h

#ifndef FS_ENET_H
#define FS_ENET_H

#include <linux/mii.h>
#include <linux/netdevice.h>
#include <linux/types.h>
#include <linux/list.h>
#include <linux/phy.h>
#include <linux/dma-mapping.h>

#include <linux/fs_enet_pd.h>
#include <asm/fs_pd.h>

#ifdef CONFIG_CPM1
#include <asm/cpm1.h>

struct fec_info {
	fec_t __iomem *fecp;
	u32 mii_speed;
};
#endif

#ifdef CONFIG_CPM2
#include <asm/cpm2.h>
#endif

/* hw driver ops */
struct fs_ops {
	int (*setup_data)(struct net_device *dev);
	int (*allocate_bd)(struct net_device *dev);
	void (*free_bd)(struct net_device *dev);
	void (*cleanup_data)(struct net_device *dev);
	void (*set_multicast_list)(struct net_device *dev);
	void (*adjust_link)(struct net_device *dev);
	void (*restart)(struct net_device *dev);
	void (*stop)(struct net_device *dev);
	void (*napi_clear_rx_event)(struct net_device *dev);
	void (*napi_enable_rx)(struct net_device *dev);
	void (*napi_disable_rx)(struct net_device *dev);
	void (*rx_bd_done)(struct net_device *dev);
	void (*tx_kickstart)(struct net_device *dev);
	u32 (*get_int_events)(struct net_device *dev);
	void (*clear_int_events)(struct net_device *dev, u32 int_events);
	void (*ev_error)(struct net_device *dev, u32 int_events);
	int (*get_regs)(struct net_device *dev, void *p, int *sizep);
	int (*get_regs_len)(struct net_device *dev);
	void (*tx_restart)(struct net_device *dev);
};

struct phy_info {
	unsigned int id;
	const char *name;
	void (*startup) (struct net_device * dev);
	void (*shutdown) (struct net_device * dev);
	void (*ack_int) (struct net_device * dev);
};

/* The FEC stores dest/src/type, data, and checksum for receive packets.
 */
#define MAX_MTU 1508		/* Allow fullsized pppoe packets over VLAN */
#define MIN_MTU 46		/* this is data size */
#define CRC_LEN 4

#define PKT_MAXBUF_SIZE		(MAX_MTU+ETH_HLEN+CRC_LEN)
#define PKT_MINBUF_SIZE		(MIN_MTU+ETH_HLEN+CRC_LEN)

/* Must be a multiple of 32 (to cover both FEC & FCC) */
#define PKT_MAXBLR_SIZE		((PKT_MAXBUF_SIZE + 31) & ~31)
/* This is needed so that invalidate_xxx wont invalidate too much */
#define ENET_RX_ALIGN  16
#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1)

struct fs_enet_private {
	struct napi_struct napi;
	struct device *dev;	/* pointer back to the device (must be initialized first) */
	struct net_device *ndev;
	spinlock_t lock;	/* during all ops except TX pckt processing */
	spinlock_t tx_lock;	/* during fs_start_xmit and fs_tx         */
	struct fs_platform_info *fpi;
	const struct fs_ops *ops;
	int rx_ring, tx_ring;
	dma_addr_t ring_mem_addr;
	void __iomem *ring_base;
	struct sk_buff **rx_skbuff;
	struct sk_buff **tx_skbuff;
	cbd_t __iomem *rx_bd_base;	/* Address of Rx and Tx buffers.    */
	cbd_t __iomem *tx_bd_base;
	cbd_t __iomem *dirty_tx;	/* ring entries to be free()ed.     */
	cbd_t __iomem *cur_rx;
	cbd_t __iomem *cur_tx;
	int tx_free;
	struct net_device_stats stats;
	struct timer_list phy_timer_list;
	const struct phy_info *phy;
	u32 msg_enable;
	struct mii_if_info mii_if;
	unsigned int last_mii_status;
	int interrupt;

	struct phy_device *phydev;
	int oldduplex, oldspeed, oldlink;	/* current settings */

	/* event masks */
	u32 ev_napi_rx;		/* mask of NAPI rx events */
	u32 ev_rx;		/* rx event mask          */
	u32 ev_tx;		/* tx event mask          */
	u32 ev_err;		/* error event mask       */

	u16 bd_rx_empty;	/* mask of BD rx empty	  */
	u16 bd_rx_err;		/* mask of BD rx errors   */

	union {
		struct {
			int idx;		/* FEC1 = 0, FEC2 = 1  */
			void __iomem *fecp;	/* hw registers        */
			u32 hthi, htlo;		/* state for multicast */
		} fec;

		struct {
			int idx;		/* FCC1-3 = 0-2	       */
			void __iomem *fccp;	/* hw registers	       */
			void __iomem *ep;	/* parameter ram       */
			void __iomem *fcccp;	/* hw registers cont.  */
			void __iomem *mem;	/* FCC DPRAM */
			u32 gaddrh, gaddrl;	/* group address       */
		} fcc;

		struct {
			int idx;		/* FEC1 = 0, FEC2 = 1  */
			void __iomem *sccp;	/* hw registers        */
			void __iomem *ep;	/* parameter ram       */
			u32 hthi, htlo;		/* state for multicast */
		} scc;

	};
};

/***************************************************************************/

void fs_init_bds(struct net_device *dev);
void fs_cleanup_bds(struct net_device *dev);

/***************************************************************************/

#define DRV_MODULE_NAME		"fs_enet"
#define PFX DRV_MODULE_NAME	": "
#define DRV_MODULE_VERSION	"1.0"
#define DRV_MODULE_RELDATE	"Aug 8, 2005"

/***************************************************************************/

int fs_enet_platform_init(void);
void fs_enet_platform_cleanup(void);

/***************************************************************************/
/* buffer descriptor access macros */

/* access macros */
#if defined(CONFIG_CPM1)
/* for a a CPM1 __raw_xxx's are sufficient */
#define __cbd_out32(addr, x)	__raw_writel(x, addr)
#define __cbd_out16(addr, x)	__raw_writew(x, addr)
#define __cbd_in32(addr)	__raw_readl(addr)
#define __cbd_in16(addr)	__raw_readw(addr)
#else
/* for others play it safe */
#define __cbd_out32(addr, x)	out_be32(addr, x)
#define __cbd_out16(addr, x)	out_be16(addr, x)
#define __cbd_in32(addr)	in_be32(addr)
#define __cbd_in16(addr)	in_be16(addr)
#endif

/* write */
#define CBDW_SC(_cbd, _sc) 		__cbd_out16(&(_cbd)->cbd_sc, (_sc))
#define CBDW_DATLEN(_cbd, _datlen)	__cbd_out16(&(_cbd)->cbd_datlen, (_datlen))
#define CBDW_BUFADDR(_cbd, _bufaddr)	__cbd_out32(&(_cbd)->cbd_bufaddr, (_bufaddr))

/* read */
#define CBDR_SC(_cbd) 			__cbd_in16(&(_cbd)->cbd_sc)
#define CBDR_DATLEN(_cbd)		__cbd_in16(&(_cbd)->cbd_datlen)
#define CBDR_BUFADDR(_cbd)		__cbd_in32(&(_cbd)->cbd_bufaddr)

/* set bits */
#define CBDS_SC(_cbd, _sc) 		CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc))

/* clear bits */
#define CBDC_SC(_cbd, _sc) 		CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc))

/*******************************************************************/

extern const struct fs_ops fs_fec_ops;
extern const struct fs_ops fs_fcc_ops;
extern const struct fs_ops fs_scc_ops;

/*******************************************************************/

#endif
Commit	Line	Data
48257c4f PA	1	#ifndef FS_ENET_H
	2	#define FS_ENET_H
	3
	4	#include <linux/mii.h>
	5	#include <linux/netdevice.h>
	6	#include <linux/types.h>
48257c4f	7	#include <linux/list.h>
5b4b8454	8	#include <linux/phy.h>
d6bd3a39	9	#include <linux/dma-mapping.h>
48257c4f PA	10
48257c4f PA	11	#include <linux/fs_enet_pd.h>
5427828e	12	#include <asm/fs_pd.h>
48257c4f	13
48257c4f	14	#ifdef CONFIG_CPM1
b5677d84	15	#include <asm/cpm1.h>
5b4b8454 VB	16
5b4b8454 VB	17	struct fec_info {
31a5bb04	18	fec_t __iomem *fecp;
0fb300fa	19	u32 mii_speed;
5b4b8454	20	};
48257c4f PA	21	#endif
	22
	23	#ifdef CONFIG_CPM2
	24	#include <asm/cpm2.h>
	25	#endif
	26
	27	/* hw driver ops */
	28	struct fs_ops {
	29	int (setup_data)(struct net_device dev);
	30	int (allocate_bd)(struct net_device dev);
	31	void (free_bd)(struct net_device dev);
	32	void (cleanup_data)(struct net_device dev);
	33	void (set_multicast_list)(struct net_device dev);
5b4b8454	34	void (adjust_link)(struct net_device dev);
48257c4f PA	35	void (restart)(struct net_device dev);
48257c4f PA	36	void (stop)(struct net_device dev);
48257c4f PA	37	void (napi_clear_rx_event)(struct net_device dev);
	38	void (napi_enable_rx)(struct net_device dev);
	39	void (napi_disable_rx)(struct net_device dev);
	40	void (rx_bd_done)(struct net_device dev);
	41	void (tx_kickstart)(struct net_device dev);
	42	u32 (get_int_events)(struct net_device dev);
	43	void (clear_int_events)(struct net_device dev, u32 int_events);
	44	void (ev_error)(struct net_device dev, u32 int_events);
	45	int (get_regs)(struct net_device dev, void p, int sizep);
	46	int (get_regs_len)(struct net_device dev);
	47	void (tx_restart)(struct net_device dev);
	48	};
	49
	50	struct phy_info {
	51	unsigned int id;
	52	const char *name;
	53	void (startup) (struct net_device dev);
	54	void (shutdown) (struct net_device dev);
	55	void (ack_int) (struct net_device dev);
	56	};
	57
	58	/* The FEC stores dest/src/type, data, and checksum for receive packets.
	59	*/
	60	#define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */
	61	#define MIN_MTU 46 /* this is data size */
	62	#define CRC_LEN 4
	63
	64	#define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN)
	65	#define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN)
	66
	67	/* Must be a multiple of 32 (to cover both FEC & FCC) */
	68	#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE + 31) & ~31)
	69	/* This is needed so that invalidate_xxx wont invalidate too much */
0d0d9c15 SW	70	#define ENET_RX_ALIGN 16
0d0d9c15 SW	71	#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE + ENET_RX_ALIGN - 1)
48257c4f	72
48257c4f	73	struct fs_enet_private {
bea3348e	74	struct napi_struct napi;
48257c4f	75	struct device dev; / pointer back to the device (must be initialized first) */
f860f49e	76	struct net_device *ndev;
48257c4f PA	77	spinlock_t lock; /* during all ops except TX pckt processing */
48257c4f PA	78	spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */
976de6a8	79	struct fs_platform_info *fpi;
48257c4f PA	80	const struct fs_ops *ops;
	81	int rx_ring, tx_ring;
	82	dma_addr_t ring_mem_addr;
31a5bb04	83	void __iomem *ring_base;
48257c4f PA	84	struct sk_buff **rx_skbuff;
48257c4f PA	85	struct sk_buff **tx_skbuff;
31a5bb04 SW	86	cbd_t __iomem rx_bd_base; / Address of Rx and Tx buffers. */
	87	cbd_t __iomem *tx_bd_base;
	88	cbd_t __iomem dirty_tx; / ring entries to be free()ed. */
	89	cbd_t __iomem *cur_rx;
	90	cbd_t __iomem *cur_tx;
48257c4f PA	91	int tx_free;
	92	struct net_device_stats stats;
	93	struct timer_list phy_timer_list;
	94	const struct phy_info *phy;
	95	u32 msg_enable;
	96	struct mii_if_info mii_if;
	97	unsigned int last_mii_status;
48257c4f PA	98	int interrupt;
48257c4f PA	99
5b4b8454 VB	100	struct phy_device *phydev;
5b4b8454 VB	101	int oldduplex, oldspeed, oldlink; /* current settings */
48257c4f PA	102
	103	/* event masks */
	104	u32 ev_napi_rx; /* mask of NAPI rx events */
	105	u32 ev_rx; /* rx event mask */
	106	u32 ev_tx; /* tx event mask */
	107	u32 ev_err; /* error event mask */
	108
	109	u16 bd_rx_empty; /* mask of BD rx empty */
	110	u16 bd_rx_err; /* mask of BD rx errors */
	111
	112	union {
	113	struct {
	114	int idx; /* FEC1 = 0, FEC2 = 1 */
31a5bb04	115	void __iomem fecp; / hw registers */
48257c4f PA	116	u32 hthi, htlo; /* state for multicast */
	117	} fec;
	118
	119	struct {
	120	int idx; /* FCC1-3 = 0-2 */
31a5bb04 SW	121	void __iomem fccp; / hw registers */
	122	void __iomem ep; / parameter ram */
	123	void __iomem fcccp; / hw registers cont. */
	124	void __iomem mem; / FCC DPRAM */
48257c4f PA	125	u32 gaddrh, gaddrl; /* group address */
	126	} fcc;
	127
	128	struct {
	129	int idx; /* FEC1 = 0, FEC2 = 1 */
31a5bb04 SW	130	void __iomem sccp; / hw registers */
31a5bb04 SW	131	void __iomem ep; / parameter ram */
48257c4f PA	132	u32 hthi, htlo; /* state for multicast */
	133	} scc;
	134
	135	};
	136	};
	137
	138	/***************************************************************************/
48257c4f PA	139
	140	void fs_init_bds(struct net_device *dev);
	141	void fs_cleanup_bds(struct net_device *dev);
	142
	143	/***************************************************************************/
	144
	145	#define DRV_MODULE_NAME "fs_enet"
	146	#define PFX DRV_MODULE_NAME ": "
	147	#define DRV_MODULE_VERSION "1.0"
	148	#define DRV_MODULE_RELDATE "Aug 8, 2005"
	149
	150	/***************************************************************************/
	151
	152	int fs_enet_platform_init(void);
	153	void fs_enet_platform_cleanup(void);
	154
	155	/***************************************************************************/
48257c4f PA	156	/* buffer descriptor access macros */
	157
	158	/* access macros */
	159	#if defined(CONFIG_CPM1)
	160	/* for a a CPM1 __raw_xxx's are sufficient */
	161	#define __cbd_out32(addr, x) __raw_writel(x, addr)
	162	#define __cbd_out16(addr, x) __raw_writew(x, addr)
	163	#define __cbd_in32(addr) __raw_readl(addr)
	164	#define __cbd_in16(addr) __raw_readw(addr)
	165	#else
	166	/* for others play it safe */
	167	#define __cbd_out32(addr, x) out_be32(addr, x)
	168	#define __cbd_out16(addr, x) out_be16(addr, x)
	169	#define __cbd_in32(addr) in_be32(addr)
	170	#define __cbd_in16(addr) in_be16(addr)
	171	#endif
	172
	173	/* write */
	174	#define CBDW_SC(_cbd, _sc) __cbd_out16(&(_cbd)->cbd_sc, (_sc))
	175	#define CBDW_DATLEN(_cbd, _datlen) __cbd_out16(&(_cbd)->cbd_datlen, (_datlen))
	176	#define CBDW_BUFADDR(_cbd, _bufaddr) __cbd_out32(&(_cbd)->cbd_bufaddr, (_bufaddr))
	177
	178	/* read */
	179	#define CBDR_SC(_cbd) __cbd_in16(&(_cbd)->cbd_sc)
	180	#define CBDR_DATLEN(_cbd) __cbd_in16(&(_cbd)->cbd_datlen)
	181	#define CBDR_BUFADDR(_cbd) __cbd_in32(&(_cbd)->cbd_bufaddr)
	182
	183	/* set bits */
	184	#define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) \| (_sc))
	185
	186	/* clear bits */
	187	#define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc))
	188
	189	/*******************************************************************/
	190
	191	extern const struct fs_ops fs_fec_ops;
	192	extern const struct fs_ops fs_fcc_ops;
	193	extern const struct fs_ops fs_scc_ops;
	194
	195	/*******************************************************************/
	196
48257c4f	197	#endif