projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * Defines for the IBM RGMII bridge | |
| 3 | * | |
| 4 | * Based on ocp_zmii.h/ibm_emac_zmii.h | |
| 5 | * Armin Kuster akuster@mvista.com | |
| 6 | * | |
| 7 | * Copyright 2004 MontaVista Software, Inc. | |
| 8 | * Matt Porter <mporter@kernel.crashing.org> | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify it | |
| 11 | * under the terms of the GNU General Public License as published by the | |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 13 | * option) any later version. | |
| 14 | */ | |
| 15 | ||
| 16 | #ifndef _IBM_EMAC_RGMII_H_ | |
| 17 | #define _IBM_EMAC_RGMII_H_ | |
| 18 | ||
| 19 | #include <linux/config.h> | |
| 20 | ||
| 21 | /* RGMII bridge */ | |
| 22 | typedef struct rgmii_regs { | |
| 23 | u32 fer; /* Function enable register */ | |
| 24 | u32 ssr; /* Speed select register */ | |
| 25 | } rgmii_t; | |
| 26 | ||
| 27 | #define RGMII_INPUTS 4 | |
| 28 | ||
| 29 | /* RGMII device */ | |
| 30 | struct ibm_ocp_rgmii { | |
| 31 | struct rgmii_regs *base; | |
| 32 | int mode[RGMII_INPUTS]; | |
| 33 | int users; /* number of EMACs using this RGMII bridge */ | |
| 34 | }; | |
| 35 | ||
| 36 | /* Fuctional Enable Reg */ | |
| 37 | #define RGMII_FER_MASK(x) (0x00000007 << (4*x)) | |
| 38 | #define RGMII_RTBI 0x00000004 | |
| 39 | #define RGMII_RGMII 0x00000005 | |
| 40 | #define RGMII_TBI 0x00000006 | |
| 41 | #define RGMII_GMII 0x00000007 | |
| 42 | ||
| 43 | /* Speed Selection reg */ | |
| 44 | ||
| 45 | #define RGMII_SP2_100 0x00000002 | |
| 46 | #define RGMII_SP2_1000 0x00000004 | |
| 47 | #define RGMII_SP3_100 0x00000200 | |
| 48 | #define RGMII_SP3_1000 0x00000400 | |
| 49 | ||
| 50 | #define RGMII_MII2_SPDMASK 0x00000007 | |
| 51 | #define RGMII_MII3_SPDMASK 0x00000700 | |
| 52 | ||
| 53 | #define RGMII_MII2_100MB RGMII_SP2_100 & ~RGMII_SP2_1000 | |
| 54 | #define RGMII_MII2_1000MB RGMII_SP2_1000 & ~RGMII_SP2_100 | |
| 55 | #define RGMII_MII2_10MB ~(RGMII_SP2_100 | RGMII_SP2_1000) | |
| 56 | #define RGMII_MII3_100MB RGMII_SP3_100 & ~RGMII_SP3_1000 | |
| 57 | #define RGMII_MII3_1000MB RGMII_SP3_1000 & ~RGMII_SP3_100 | |
| 58 | #define RGMII_MII3_10MB ~(RGMII_SP3_100 | RGMII_SP3_1000) | |
| 59 | ||
| 60 | #define RTBI 0 | |
| 61 | #define RGMII 1 | |
| 62 | #define TBI 2 | |
| 63 | #define GMII 3 | |
| 64 | ||
| 65 | #endif /* _IBM_EMAC_RGMII_H_ */ |