[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_common.h

/*******************************************************************************

  Intel 10 Gigabit PCI Express Linux driver
  Copyright(c) 1999 - 2011 Intel Corporation.

  This program is free software; you can redistribute it and/or modify it
  under the terms and conditions of the GNU General Public License,
  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  more details.

  You should have received a copy of the GNU General Public License along with
  this program; if not, write to the Free Software Foundation, Inc.,
  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in
  the file called "COPYING".

  Contact Information:
  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

*******************************************************************************/

#ifndef _IXGBE_COMMON_H_
#define _IXGBE_COMMON_H_

#include "ixgbe_type.h"
#include "ixgbe.h"

u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
                                  u32 pba_num_size);
s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);

s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);

s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
                                       u16 *data);
u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
                                           u16 *checksum_val);
s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);

s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
                          u32 enable_addr);
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
				      struct net_device *netdev);
s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packtetbuf_num);
s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw);

s32 ixgbe_validate_mac_addr(u8 *mac_addr);
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask);
s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
                           u32 vind, bool vlan_on);
s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
                                 ixgbe_link_speed *speed,
                                 bool *link_up, bool link_up_wait_to_complete);
s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
                                 u16 *wwpn_prefix);
s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf);
void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);

#define IXGBE_WRITE_REG(a, reg, value) writel((value), ((a)->hw_addr + (reg)))

#ifndef writeq
#define writeq(val, addr) writel((u32) (val), addr); \
    writel((u32) (val >> 32), (addr + 4));
#endif

#define IXGBE_WRITE_REG64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))

#define IXGBE_READ_REG(a, reg) readl((a)->hw_addr + (reg))

#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
    writel((value), ((a)->hw_addr + (reg) + ((offset) << 2))))

#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
    readl((a)->hw_addr + (reg) + ((offset) << 2)))

#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)

#define hw_dbg(hw, format, arg...) \
	netdev_dbg(((struct ixgbe_adapter *)(hw->back))->netdev, format, ##arg)
#define e_dev_info(format, arg...) \
	dev_info(&adapter->pdev->dev, format, ## arg)
#define e_dev_warn(format, arg...) \
	dev_warn(&adapter->pdev->dev, format, ## arg)
#define e_dev_err(format, arg...) \
	dev_err(&adapter->pdev->dev, format, ## arg)
#define e_dev_notice(format, arg...) \
	dev_notice(&adapter->pdev->dev, format, ## arg)
#define e_info(msglvl, format, arg...) \
	netif_info(adapter, msglvl, adapter->netdev, format, ## arg)
#define e_err(msglvl, format, arg...) \
	netif_err(adapter, msglvl, adapter->netdev, format, ## arg)
#define e_warn(msglvl, format, arg...) \
	netif_warn(adapter, msglvl, adapter->netdev, format, ## arg)
#define e_crit(msglvl, format, arg...) \
	netif_crit(adapter, msglvl, adapter->netdev, format, ## arg)
#endif /* IXGBE_COMMON */
Commit	Line	Data
9a799d71 AK	1	/*******************************************************************************
	2
	3	Intel 10 Gigabit PCI Express Linux driver
a52055e0	4	Copyright(c) 1999 - 2011 Intel Corporation.
9a799d71 AK	5
	6	This program is free software; you can redistribute it and/or modify it
	7	under the terms and conditions of the GNU General Public License,
	8	version 2, as published by the Free Software Foundation.
	9
	10	This program is distributed in the hope it will be useful, but WITHOUT
	11	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	more details.
	14
	15	You should have received a copy of the GNU General Public License along with
	16	this program; if not, write to the Free Software Foundation, Inc.,
	17	51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	18
	19	The full GNU General Public License is included in this distribution in
	20	the file called "COPYING".
	21
	22	Contact Information:
9a799d71 AK	23	e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
	24	Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	25
	26	*******************************************************************************/
	27
	28	#ifndef _IXGBE_COMMON_H_
	29	#define _IXGBE_COMMON_H_
	30
	31	#include "ixgbe_type.h"
32f75466	32	#include "ixgbe.h"
9a799d71	33
21ce849b	34	u32 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
c44ade9e JB	35	s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
	36	s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
	37	s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
7184b7cf	38	s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
c44ade9e	39	s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
289700db DS	40	s32 ixgbe_read_pba_string_generic(struct ixgbe_hw hw, u8 pba_num,
289700db DS	41	u32 pba_num_size);
c44ade9e JB	42	s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw hw, u8 mac_addr);
c44ade9e JB	43	s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
11afc1b1	44	void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
c44ade9e JB	45	s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
	46
	47	s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
	48	s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
	49
	50	s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
11afc1b1	51	s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
21ce849b	52	s32 ixgbe_read_eerd_generic(struct ixgbe_hw hw, u16 offset, u16 data);
eb9c3e3e	53	s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
c44ade9e JB	54	s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
c44ade9e JB	55	u16 *data);
a391f1d5	56	u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
c44ade9e JB	57	s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
	58	u16 *checksum_val);
	59	s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
	60
	61	s32 ixgbe_set_rar_generic(struct ixgbe_hw hw, u32 index, u8 addr, u32 vmdq,
	62	u32 enable_addr);
	63	s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
	64	s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
2853eb89 JP	65	s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
2853eb89 JP	66	struct net_device *netdev);
c44ade9e JB	67	s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
c44ade9e JB	68	s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
11afc1b1	69	s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
620fa036	70	s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw, s32 packtetbuf_num);
0ecc061d	71	s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw);
9a799d71	72
c44ade9e	73	s32 ixgbe_validate_mac_addr(u8 *mac_addr);
9a799d71 AK	74	s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);
	75	void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask);
	76	s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
21ce849b MC	77	s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw hw, u8 san_mac_addr);
	78	s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
	79	s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
	80	s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
	81	s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
	82	u32 vind, bool vlan_on);
	83	s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
	84	s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
	85	ixgbe_link_speed *speed,
	86	bool *link_up, bool link_up_wait_to_complete);
a391f1d5 DS	87	s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw hw, u16 wwnn_prefix,
a391f1d5 DS	88	u16 *wwpn_prefix);
87c12017 PW	89	s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
87c12017 PW	90	s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
a985b6c3 GR	91	void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf);
a985b6c3 GR	92	void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
87c12017	93
9a799d71 AK	94	#define IXGBE_WRITE_REG(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
9a799d71 AK	95
11afc1b1 PW	96	#ifndef writeq
	97	#define writeq(val, addr) writel((u32) (val), addr); \
	98	writel((u32) (val >> 32), (addr + 4));
	99	#endif
	100
	101	#define IXGBE_WRITE_REG64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
	102
9a799d71 AK	103	#define IXGBE_READ_REG(a, reg) readl((a)->hw_addr + (reg))
	104
	105	#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
	106	writel((value), ((a)->hw_addr + (reg) + ((offset) << 2))))
	107
	108	#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
	109	readl((a)->hw_addr + (reg) + ((offset) << 2)))
	110
	111	#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
	112
9a799d71	113	#define hw_dbg(hw, format, arg...) \
32f75466	114	netdev_dbg(((struct ixgbe_adapter *)(hw->back))->netdev, format, ##arg)
849c4542 ET	115	#define e_dev_info(format, arg...) \
	116	dev_info(&adapter->pdev->dev, format, ## arg)
	117	#define e_dev_warn(format, arg...) \
	118	dev_warn(&adapter->pdev->dev, format, ## arg)
	119	#define e_dev_err(format, arg...) \
	120	dev_err(&adapter->pdev->dev, format, ## arg)
	121	#define e_dev_notice(format, arg...) \
	122	dev_notice(&adapter->pdev->dev, format, ## arg)
396e799c ET	123	#define e_info(msglvl, format, arg...) \
	124	netif_info(adapter, msglvl, adapter->netdev, format, ## arg)
	125	#define e_err(msglvl, format, arg...) \
	126	netif_err(adapter, msglvl, adapter->netdev, format, ## arg)
	127	#define e_warn(msglvl, format, arg...) \
	128	netif_warn(adapter, msglvl, adapter->netdev, format, ## arg)
	129	#define e_crit(msglvl, format, arg...) \
	130	netif_crit(adapter, msglvl, adapter->netdev, format, ## arg)
9a799d71	131	#endif /* IXGBE_COMMON */