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Merge branch 'batman-adv/merge' of git://git.open-mesh.org/ecsv/linux-merge
[deliverable/linux.git] / drivers / net / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
66c87bd5 4 Copyright(c) 1999 - 2010 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
92915f71
GR		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47
48#include "ixgbevf.h"
49
50char ixgbevf_driver_name[] = "ixgbevf";
51static const char ixgbevf_driver_string[] =
52 "Intel(R) 82599 Virtual Function";
53
2316aa2a 54#define DRV_VERSION "1.0.19-k0"
92915f71 55const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5
GR		 56static char ixgbevf_copyright[] =
57 "Copyright (c) 2009 - 2010 Intel Corporation.";
92915f71
GR		 58
59static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 60 [board_82599_vf] = &ixgbevf_82599_vf_info,
61 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 62};
63
64/* ixgbevf_pci_tbl - PCI Device ID Table
65 *
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
72static struct pci_device_id ixgbevf_pci_tbl[] = {
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
74 board_82599_vf},
2316aa2a
GR		 75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
76 board_X540_vf},
92915f71
GR		 77
78 /* required last entry */
79 {0, }
80};
81MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
82
83MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
88#define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
90/* forward decls */
91static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
92static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
93 u32 itr_reg);
94
95static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
96 struct ixgbevf_ring *rx_ring,
97 u32 val)
98{
99 /*
100 * Force memory writes to complete before letting h/w
101 * know there are new descriptors to fetch. (Only
102 * applicable for weak-ordered memory model archs,
103 * such as IA-64).
104 */
105 wmb();
106 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
107}
108
109/*
110 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
111 * @adapter: pointer to adapter struct
112 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
113 * @queue: queue to map the corresponding interrupt to
114 * @msix_vector: the vector to map to the corresponding queue
115 *
116 */
117static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
118 u8 queue, u8 msix_vector)
119{
120 u32 ivar, index;
121 struct ixgbe_hw *hw = &adapter->hw;
122 if (direction == -1) {
123 /* other causes */
124 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
125 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
126 ivar &= ~0xFF;
127 ivar |= msix_vector;
128 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
129 } else {
130 /* tx or rx causes */
131 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
132 index = ((16 * (queue & 1)) + (8 * direction));
133 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
134 ivar &= ~(0xFF << index);
135 ivar |= (msix_vector << index);
136 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
137 }
138}
139
140static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
141 struct ixgbevf_tx_buffer
142 *tx_buffer_info)
143{
144 if (tx_buffer_info->dma) {
145 if (tx_buffer_info->mapped_as_page)
2a1f8794 146 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 147 tx_buffer_info->dma,
148 tx_buffer_info->length,
2a1f8794 149 DMA_TO_DEVICE);
92915f71 150 else
2a1f8794 151 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 152 tx_buffer_info->dma,
153 tx_buffer_info->length,
2a1f8794 154 DMA_TO_DEVICE);
92915f71
GR		 155 tx_buffer_info->dma = 0;
156 }
157 if (tx_buffer_info->skb) {
158 dev_kfree_skb_any(tx_buffer_info->skb);
159 tx_buffer_info->skb = NULL;
160 }
161 tx_buffer_info->time_stamp = 0;
162 /* tx_buffer_info must be completely set up in the transmit path */
163}
164
165static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
166 struct ixgbevf_ring *tx_ring,
167 unsigned int eop)
168{
169 struct ixgbe_hw *hw = &adapter->hw;
170 u32 head, tail;
171
172 /* Detect a transmit hang in hardware, this serializes the
173 * check with the clearing of time_stamp and movement of eop */
174 head = readl(hw->hw_addr + tx_ring->head);
175 tail = readl(hw->hw_addr + tx_ring->tail);
176 adapter->detect_tx_hung = false;
177 if ((head != tail) &&
178 tx_ring->tx_buffer_info[eop].time_stamp &&
179 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
180 /* detected Tx unit hang */
181 union ixgbe_adv_tx_desc *tx_desc;
182 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
183 printk(KERN_ERR "Detected Tx Unit Hang\n"
184 " Tx Queue <%d>\n"
185 " TDH, TDT <%x>, <%x>\n"
186 " next_to_use <%x>\n"
187 " next_to_clean <%x>\n"
188 "tx_buffer_info[next_to_clean]\n"
189 " time_stamp <%lx>\n"
190 " jiffies <%lx>\n",
191 tx_ring->queue_index,
192 head, tail,
193 tx_ring->next_to_use, eop,
194 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
195 return true;
196 }
197
198 return false;
199}
200
201#define IXGBE_MAX_TXD_PWR 14
202#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
203
204/* Tx Descriptors needed, worst case */
205#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
206 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
207#ifdef MAX_SKB_FRAGS
208#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
209 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
210#else
211#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
212#endif
213
214static void ixgbevf_tx_timeout(struct net_device *netdev);
215
216/**
217 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
218 * @adapter: board private structure
219 * @tx_ring: tx ring to clean
220 **/
221static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
222 struct ixgbevf_ring *tx_ring)
223{
224 struct net_device *netdev = adapter->netdev;
225 struct ixgbe_hw *hw = &adapter->hw;
226 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
227 struct ixgbevf_tx_buffer *tx_buffer_info;
228 unsigned int i, eop, count = 0;
229 unsigned int total_bytes = 0, total_packets = 0;
230
231 i = tx_ring->next_to_clean;
232 eop = tx_ring->tx_buffer_info[i].next_to_watch;
233 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
234
235 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
236 (count < tx_ring->work_limit)) {
237 bool cleaned = false;
2d0bb1c1 238 rmb(); /* read buffer_info after eop_desc */
92915f71
GR		 239 for ( ; !cleaned; count++) {
240 struct sk_buff *skb;
241 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
242 tx_buffer_info = &tx_ring->tx_buffer_info[i];
243 cleaned = (i == eop);
244 skb = tx_buffer_info->skb;
245
246 if (cleaned && skb) {
247 unsigned int segs, bytecount;
248
249 /* gso_segs is currently only valid for tcp */
250 segs = skb_shinfo(skb)->gso_segs ?: 1;
251 /* multiply data chunks by size of headers */
252 bytecount = ((segs - 1) * skb_headlen(skb)) +
253 skb->len;
254 total_packets += segs;
255 total_bytes += bytecount;
256 }
257
258 ixgbevf_unmap_and_free_tx_resource(adapter,
259 tx_buffer_info);
260
261 tx_desc->wb.status = 0;
262
263 i++;
264 if (i == tx_ring->count)
265 i = 0;
266 }
267
268 eop = tx_ring->tx_buffer_info[i].next_to_watch;
269 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
270 }
271
272 tx_ring->next_to_clean = i;
273
274#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
275 if (unlikely(count && netif_carrier_ok(netdev) &&
276 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
277 /* Make sure that anybody stopping the queue after this
278 * sees the new next_to_clean.
279 */
280 smp_mb();
281#ifdef HAVE_TX_MQ
282 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
283 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
284 netif_wake_subqueue(netdev, tx_ring->queue_index);
285 ++adapter->restart_queue;
286 }
287#else
288 if (netif_queue_stopped(netdev) &&
289 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
290 netif_wake_queue(netdev);
291 ++adapter->restart_queue;
292 }
293#endif
294 }
295
296 if (adapter->detect_tx_hung) {
297 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
298 /* schedule immediate reset if we believe we hung */
299 printk(KERN_INFO
300 "tx hang %d detected, resetting adapter\n",
301 adapter->tx_timeout_count + 1);
302 ixgbevf_tx_timeout(adapter->netdev);
303 }
304 }
305
306 /* re-arm the interrupt */
307 if ((count >= tx_ring->work_limit) &&
308 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
309 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
310 }
311
312 tx_ring->total_bytes += total_bytes;
313 tx_ring->total_packets += total_packets;
314
fb621bac
ED		 315 netdev->stats.tx_bytes += total_bytes;
316 netdev->stats.tx_packets += total_packets;
92915f71 317
807540ba 318 return count < tx_ring->work_limit;
92915f71
GR		 319}
320
321/**
322 * ixgbevf_receive_skb - Send a completed packet up the stack
323 * @q_vector: structure containing interrupt and ring information
324 * @skb: packet to send up
325 * @status: hardware indication of status of receive
326 * @rx_ring: rx descriptor ring (for a specific queue) to setup
327 * @rx_desc: rx descriptor
328 **/
329static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
330 struct sk_buff *skb, u8 status,
331 struct ixgbevf_ring *ring,
332 union ixgbe_adv_rx_desc *rx_desc)
333{
334 struct ixgbevf_adapter *adapter = q_vector->adapter;
335 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
336 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
337 int ret;
338
339 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
340 if (adapter->vlgrp && is_vlan)
341 vlan_gro_receive(&q_vector->napi,
342 adapter->vlgrp,
343 tag, skb);
344 else
345 napi_gro_receive(&q_vector->napi, skb);
346 } else {
347 if (adapter->vlgrp && is_vlan)
348 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
349 else
350 ret = netif_rx(skb);
351 }
352}
353
354/**
355 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
356 * @adapter: address of board private structure
357 * @status_err: hardware indication of status of receive
358 * @skb: skb currently being received and modified
359 **/
360static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
361 u32 status_err, struct sk_buff *skb)
362{
bc8acf2c 363 skb_checksum_none_assert(skb);
92915f71
GR		 364
365 /* Rx csum disabled */
366 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
367 return;
368
369 /* if IP and error */
370 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
371 (status_err & IXGBE_RXDADV_ERR_IPE)) {
372 adapter->hw_csum_rx_error++;
373 return;
374 }
375
376 if (!(status_err & IXGBE_RXD_STAT_L4CS))
377 return;
378
379 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
380 adapter->hw_csum_rx_error++;
381 return;
382 }
383
384 /* It must be a TCP or UDP packet with a valid checksum */
385 skb->ip_summed = CHECKSUM_UNNECESSARY;
386 adapter->hw_csum_rx_good++;
387}
388
389/**
390 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
391 * @adapter: address of board private structure
392 **/
393static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
394 struct ixgbevf_ring *rx_ring,
395 int cleaned_count)
396{
397 struct pci_dev *pdev = adapter->pdev;
398 union ixgbe_adv_rx_desc *rx_desc;
399 struct ixgbevf_rx_buffer *bi;
400 struct sk_buff *skb;
401 unsigned int i;
402 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
403
404 i = rx_ring->next_to_use;
405 bi = &rx_ring->rx_buffer_info[i];
406
407 while (cleaned_count--) {
408 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
409
410 if (!bi->page_dma &&
411 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
412 if (!bi->page) {
413 bi->page = netdev_alloc_page(adapter->netdev);
414 if (!bi->page) {
415 adapter->alloc_rx_page_failed++;
416 goto no_buffers;
417 }
418 bi->page_offset = 0;
419 } else {
420 /* use a half page if we're re-using */
421 bi->page_offset ^= (PAGE_SIZE / 2);
422 }
423
2a1f8794 424 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
92915f71
GR		 425 bi->page_offset,
426 (PAGE_SIZE / 2),
2a1f8794 427 DMA_FROM_DEVICE);
92915f71
GR		 428 }
429
430 skb = bi->skb;
431 if (!skb) {
432 skb = netdev_alloc_skb(adapter->netdev,
433 bufsz);
434
435 if (!skb) {
436 adapter->alloc_rx_buff_failed++;
437 goto no_buffers;
438 }
439
440 /*
441 * Make buffer alignment 2 beyond a 16 byte boundary
442 * this will result in a 16 byte aligned IP header after
443 * the 14 byte MAC header is removed
444 */
445 skb_reserve(skb, NET_IP_ALIGN);
446
447 bi->skb = skb;
448 }
449 if (!bi->dma) {
2a1f8794 450 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 451 rx_ring->rx_buf_len,
2a1f8794 452 DMA_FROM_DEVICE);
92915f71
GR		 453 }
454 /* Refresh the desc even if buffer_addrs didn't change because
455 * each write-back erases this info. */
456 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
457 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
458 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
459 } else {
460 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
461 }
462
463 i++;
464 if (i == rx_ring->count)
465 i = 0;
466 bi = &rx_ring->rx_buffer_info[i];
467 }
468
469no_buffers:
470 if (rx_ring->next_to_use != i) {
471 rx_ring->next_to_use = i;
472 if (i-- == 0)
473 i = (rx_ring->count - 1);
474
475 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
476 }
477}
478
479static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
480 u64 qmask)
481{
482 u32 mask;
483 struct ixgbe_hw *hw = &adapter->hw;
484
485 mask = (qmask & 0xFFFFFFFF);
486 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
487}
488
489static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
490{
491 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
492}
493
494static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
495{
496 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
497}
498
499static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
500 struct ixgbevf_ring *rx_ring,
501 int *work_done, int work_to_do)
502{
503 struct ixgbevf_adapter *adapter = q_vector->adapter;
504 struct pci_dev *pdev = adapter->pdev;
505 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
506 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
507 struct sk_buff *skb;
508 unsigned int i;
509 u32 len, staterr;
510 u16 hdr_info;
511 bool cleaned = false;
512 int cleaned_count = 0;
513 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
514
515 i = rx_ring->next_to_clean;
516 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
517 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
518 rx_buffer_info = &rx_ring->rx_buffer_info[i];
519
520 while (staterr & IXGBE_RXD_STAT_DD) {
521 u32 upper_len = 0;
522 if (*work_done >= work_to_do)
523 break;
524 (*work_done)++;
525
2d0bb1c1 526 rmb(); /* read descriptor and rx_buffer_info after status DD */
92915f71
GR		 527 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
528 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
529 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
530 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
531 if (hdr_info & IXGBE_RXDADV_SPH)
532 adapter->rx_hdr_split++;
533 if (len > IXGBEVF_RX_HDR_SIZE)
534 len = IXGBEVF_RX_HDR_SIZE;
535 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
536 } else {
537 len = le16_to_cpu(rx_desc->wb.upper.length);
538 }
539 cleaned = true;
540 skb = rx_buffer_info->skb;
541 prefetch(skb->data - NET_IP_ALIGN);
542 rx_buffer_info->skb = NULL;
543
544 if (rx_buffer_info->dma) {
2a1f8794 545 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 546 rx_ring->rx_buf_len,
2a1f8794 547 DMA_FROM_DEVICE);
92915f71
GR		 548 rx_buffer_info->dma = 0;
549 skb_put(skb, len);
550 }
551
552 if (upper_len) {
2a1f8794
NN		 553 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
554 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 555 rx_buffer_info->page_dma = 0;
556 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
557 rx_buffer_info->page,
558 rx_buffer_info->page_offset,
559 upper_len);
560
561 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
562 (page_count(rx_buffer_info->page) != 1))
563 rx_buffer_info->page = NULL;
564 else
565 get_page(rx_buffer_info->page);
566
567 skb->len += upper_len;
568 skb->data_len += upper_len;
569 skb->truesize += upper_len;
570 }
571
572 i++;
573 if (i == rx_ring->count)
574 i = 0;
575
576 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
577 prefetch(next_rxd);
578 cleaned_count++;
579
580 next_buffer = &rx_ring->rx_buffer_info[i];
581
582 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
583 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
584 rx_buffer_info->skb = next_buffer->skb;
585 rx_buffer_info->dma = next_buffer->dma;
586 next_buffer->skb = skb;
587 next_buffer->dma = 0;
588 } else {
589 skb->next = next_buffer->skb;
590 skb->next->prev = skb;
591 }
592 adapter->non_eop_descs++;
593 goto next_desc;
594 }
595
596 /* ERR_MASK will only have valid bits if EOP set */
597 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
598 dev_kfree_skb_irq(skb);
599 goto next_desc;
600 }
601
602 ixgbevf_rx_checksum(adapter, staterr, skb);
603
604 /* probably a little skewed due to removing CRC */
605 total_rx_bytes += skb->len;
606 total_rx_packets++;
607
608 /*
609 * Work around issue of some types of VM to VM loop back
610 * packets not getting split correctly
611 */
612 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 613 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 614 if (header_fixup_len < 14)
615 skb_push(skb, header_fixup_len);
616 }
617 skb->protocol = eth_type_trans(skb, adapter->netdev);
618
619 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 620
621next_desc:
622 rx_desc->wb.upper.status_error = 0;
623
624 /* return some buffers to hardware, one at a time is too slow */
625 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
626 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
627 cleaned_count);
628 cleaned_count = 0;
629 }
630
631 /* use prefetched values */
632 rx_desc = next_rxd;
633 rx_buffer_info = &rx_ring->rx_buffer_info[i];
634
635 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
636 }
637
638 rx_ring->next_to_clean = i;
639 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
640
641 if (cleaned_count)
642 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
643
644 rx_ring->total_packets += total_rx_packets;
645 rx_ring->total_bytes += total_rx_bytes;
fb621bac
ED		 646 adapter->netdev->stats.rx_bytes += total_rx_bytes;
647 adapter->netdev->stats.rx_packets += total_rx_packets;
92915f71
GR		 648
649 return cleaned;
650}
651
652/**
653 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
654 * @napi: napi struct with our devices info in it
655 * @budget: amount of work driver is allowed to do this pass, in packets
656 *
657 * This function is optimized for cleaning one queue only on a single
658 * q_vector!!!
659 **/
660static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
661{
662 struct ixgbevf_q_vector *q_vector =
663 container_of(napi, struct ixgbevf_q_vector, napi);
664 struct ixgbevf_adapter *adapter = q_vector->adapter;
665 struct ixgbevf_ring *rx_ring = NULL;
666 int work_done = 0;
667 long r_idx;
668
669 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
670 rx_ring = &(adapter->rx_ring[r_idx]);
671
672 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
673
674 /* If all Rx work done, exit the polling mode */
675 if (work_done < budget) {
676 napi_complete(napi);
677 if (adapter->itr_setting & 1)
678 ixgbevf_set_itr_msix(q_vector);
679 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
680 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
681 }
682
683 return work_done;
684}
685
686/**
687 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
688 * @napi: napi struct with our devices info in it
689 * @budget: amount of work driver is allowed to do this pass, in packets
690 *
691 * This function will clean more than one rx queue associated with a
692 * q_vector.
693 **/
694static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
695{
696 struct ixgbevf_q_vector *q_vector =
697 container_of(napi, struct ixgbevf_q_vector, napi);
698 struct ixgbevf_adapter *adapter = q_vector->adapter;
699 struct ixgbevf_ring *rx_ring = NULL;
700 int work_done = 0, i;
701 long r_idx;
702 u64 enable_mask = 0;
703
704 /* attempt to distribute budget to each queue fairly, but don't allow
705 * the budget to go below 1 because we'll exit polling */
706 budget /= (q_vector->rxr_count ?: 1);
707 budget = max(budget, 1);
708 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
709 for (i = 0; i < q_vector->rxr_count; i++) {
710 rx_ring = &(adapter->rx_ring[r_idx]);
711 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
712 enable_mask |= rx_ring->v_idx;
713 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
714 r_idx + 1);
715 }
716
717#ifndef HAVE_NETDEV_NAPI_LIST
718 if (!netif_running(adapter->netdev))
719 work_done = 0;
720
721#endif
722 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
723 rx_ring = &(adapter->rx_ring[r_idx]);
724
725 /* If all Rx work done, exit the polling mode */
726 if (work_done < budget) {
727 napi_complete(napi);
728 if (adapter->itr_setting & 1)
729 ixgbevf_set_itr_msix(q_vector);
730 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
731 ixgbevf_irq_enable_queues(adapter, enable_mask);
732 }
733
734 return work_done;
735}
736
737
738/**
739 * ixgbevf_configure_msix - Configure MSI-X hardware
740 * @adapter: board private structure
741 *
742 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
743 * interrupts.
744 **/
745static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
746{
747 struct ixgbevf_q_vector *q_vector;
748 struct ixgbe_hw *hw = &adapter->hw;
749 int i, j, q_vectors, v_idx, r_idx;
750 u32 mask;
751
752 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
753
754 /*
755 * Populate the IVAR table and set the ITR values to the
756 * corresponding register.
757 */
758 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
759 q_vector = adapter->q_vector[v_idx];
984b3f57 760 /* XXX for_each_set_bit(...) */
92915f71
GR		 761 r_idx = find_first_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues);
763
764 for (i = 0; i < q_vector->rxr_count; i++) {
765 j = adapter->rx_ring[r_idx].reg_idx;
766 ixgbevf_set_ivar(adapter, 0, j, v_idx);
767 r_idx = find_next_bit(q_vector->rxr_idx,
768 adapter->num_rx_queues,
769 r_idx + 1);
770 }
771 r_idx = find_first_bit(q_vector->txr_idx,
772 adapter->num_tx_queues);
773
774 for (i = 0; i < q_vector->txr_count; i++) {
775 j = adapter->tx_ring[r_idx].reg_idx;
776 ixgbevf_set_ivar(adapter, 1, j, v_idx);
777 r_idx = find_next_bit(q_vector->txr_idx,
778 adapter->num_tx_queues,
779 r_idx + 1);
780 }
781
782 /* if this is a tx only vector halve the interrupt rate */
783 if (q_vector->txr_count && !q_vector->rxr_count)
784 q_vector->eitr = (adapter->eitr_param >> 1);
785 else if (q_vector->rxr_count)
786 /* rx only */
787 q_vector->eitr = adapter->eitr_param;
788
789 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
790 }
791
792 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
793
794 /* set up to autoclear timer, and the vectors */
795 mask = IXGBE_EIMS_ENABLE_MASK;
796 mask &= ~IXGBE_EIMS_OTHER;
797 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
798}
799
800enum latency_range {
801 lowest_latency = 0,
802 low_latency = 1,
803 bulk_latency = 2,
804 latency_invalid = 255
805};
806
807/**
808 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
809 * @adapter: pointer to adapter
810 * @eitr: eitr setting (ints per sec) to give last timeslice
811 * @itr_setting: current throttle rate in ints/second
812 * @packets: the number of packets during this measurement interval
813 * @bytes: the number of bytes during this measurement interval
814 *
815 * Stores a new ITR value based on packets and byte
816 * counts during the last interrupt. The advantage of per interrupt
817 * computation is faster updates and more accurate ITR for the current
818 * traffic pattern. Constants in this function were computed
819 * based on theoretical maximum wire speed and thresholds were set based
820 * on testing data as well as attempting to minimize response time
821 * while increasing bulk throughput.
822 **/
823static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
824 u32 eitr, u8 itr_setting,
825 int packets, int bytes)
826{
827 unsigned int retval = itr_setting;
828 u32 timepassed_us;
829 u64 bytes_perint;
830
831 if (packets == 0)
832 goto update_itr_done;
833
834
835 /* simple throttlerate management
836 * 0-20MB/s lowest (100000 ints/s)
837 * 20-100MB/s low (20000 ints/s)
838 * 100-1249MB/s bulk (8000 ints/s)
839 */
840 /* what was last interrupt timeslice? */
841 timepassed_us = 1000000/eitr;
842 bytes_perint = bytes / timepassed_us; /* bytes/usec */
843
844 switch (itr_setting) {
845 case lowest_latency:
846 if (bytes_perint > adapter->eitr_low)
847 retval = low_latency;
848 break;
849 case low_latency:
850 if (bytes_perint > adapter->eitr_high)
851 retval = bulk_latency;
852 else if (bytes_perint <= adapter->eitr_low)
853 retval = lowest_latency;
854 break;
855 case bulk_latency:
856 if (bytes_perint <= adapter->eitr_high)
857 retval = low_latency;
858 break;
859 }
860
861update_itr_done:
862 return retval;
863}
864
865/**
866 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
867 * @adapter: pointer to adapter struct
868 * @v_idx: vector index into q_vector array
869 * @itr_reg: new value to be written in *register* format, not ints/s
870 *
871 * This function is made to be called by ethtool and by the driver
872 * when it needs to update VTEITR registers at runtime. Hardware
873 * specific quirks/differences are taken care of here.
874 */
875static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
876 u32 itr_reg)
877{
878 struct ixgbe_hw *hw = &adapter->hw;
879
880 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
881
882 /*
883 * set the WDIS bit to not clear the timer bits and cause an
884 * immediate assertion of the interrupt
885 */
886 itr_reg |= IXGBE_EITR_CNT_WDIS;
887
888 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
889}
890
891static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
892{
893 struct ixgbevf_adapter *adapter = q_vector->adapter;
894 u32 new_itr;
895 u8 current_itr, ret_itr;
896 int i, r_idx, v_idx = q_vector->v_idx;
897 struct ixgbevf_ring *rx_ring, *tx_ring;
898
899 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
900 for (i = 0; i < q_vector->txr_count; i++) {
901 tx_ring = &(adapter->tx_ring[r_idx]);
902 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
903 q_vector->tx_itr,
904 tx_ring->total_packets,
905 tx_ring->total_bytes);
906 /* if the result for this queue would decrease interrupt
907 * rate for this vector then use that result */
908 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
909 q_vector->tx_itr - 1 : ret_itr);
910 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
911 r_idx + 1);
912 }
913
914 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
915 for (i = 0; i < q_vector->rxr_count; i++) {
916 rx_ring = &(adapter->rx_ring[r_idx]);
917 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
918 q_vector->rx_itr,
919 rx_ring->total_packets,
920 rx_ring->total_bytes);
921 /* if the result for this queue would decrease interrupt
922 * rate for this vector then use that result */
923 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
924 q_vector->rx_itr - 1 : ret_itr);
925 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
926 r_idx + 1);
927 }
928
929 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
930
931 switch (current_itr) {
932 /* counts and packets in update_itr are dependent on these numbers */
933 case lowest_latency:
934 new_itr = 100000;
935 break;
936 case low_latency:
937 new_itr = 20000; /* aka hwitr = ~200 */
938 break;
939 case bulk_latency:
940 default:
941 new_itr = 8000;
942 break;
943 }
944
945 if (new_itr != q_vector->eitr) {
946 u32 itr_reg;
947
948 /* save the algorithm value here, not the smoothed one */
949 q_vector->eitr = new_itr;
950 /* do an exponential smoothing */
951 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
952 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
953 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
954 }
92915f71
GR		 955}
956
957static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
958{
959 struct net_device *netdev = data;
960 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
961 struct ixgbe_hw *hw = &adapter->hw;
962 u32 eicr;
a9ee25a2 963 u32 msg;
92915f71
GR		 964
965 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
966 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
967
08259594
GR		 968 if (!hw->mbx.ops.check_for_ack(hw)) {
969 /*
970 * checking for the ack clears the PFACK bit. Place
971 * it back in the v2p_mailbox cache so that anyone
972 * polling for an ack will not miss it. Also
973 * avoid the read below because the code to read
974 * the mailbox will also clear the ack bit. This was
975 * causing lost acks. Just cache the bit and exit
976 * the IRQ handler.
977 */
978 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
979 goto out;
980 }
981
982 /* Not an ack interrupt, go ahead and read the message */
a9ee25a2
GR		 983 hw->mbx.ops.read(hw, &msg, 1);
984
985 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
986 mod_timer(&adapter->watchdog_timer,
4c3a8223 987 round_jiffies(jiffies + 1));
a9ee25a2 988
08259594 989out:
92915f71
GR		 990 return IRQ_HANDLED;
991}
992
993static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
994{
995 struct ixgbevf_q_vector *q_vector = data;
996 struct ixgbevf_adapter *adapter = q_vector->adapter;
997 struct ixgbevf_ring *tx_ring;
998 int i, r_idx;
999
1000 if (!q_vector->txr_count)
1001 return IRQ_HANDLED;
1002
1003 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1004 for (i = 0; i < q_vector->txr_count; i++) {
1005 tx_ring = &(adapter->tx_ring[r_idx]);
1006 tx_ring->total_bytes = 0;
1007 tx_ring->total_packets = 0;
1008 ixgbevf_clean_tx_irq(adapter, tx_ring);
1009 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1010 r_idx + 1);
1011 }
1012
1013 if (adapter->itr_setting & 1)
1014 ixgbevf_set_itr_msix(q_vector);
1015
1016 return IRQ_HANDLED;
1017}
1018
1019/**
1020 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1021 * @irq: unused
1022 * @data: pointer to our q_vector struct for this interrupt vector
1023 **/
1024static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1025{
1026 struct ixgbevf_q_vector *q_vector = data;
1027 struct ixgbevf_adapter *adapter = q_vector->adapter;
1028 struct ixgbe_hw *hw = &adapter->hw;
1029 struct ixgbevf_ring *rx_ring;
1030 int r_idx;
1031 int i;
1032
1033 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1034 for (i = 0; i < q_vector->rxr_count; i++) {
1035 rx_ring = &(adapter->rx_ring[r_idx]);
1036 rx_ring->total_bytes = 0;
1037 rx_ring->total_packets = 0;
1038 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1039 r_idx + 1);
1040 }
1041
1042 if (!q_vector->rxr_count)
1043 return IRQ_HANDLED;
1044
1045 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1046 rx_ring = &(adapter->rx_ring[r_idx]);
1047 /* disable interrupts on this vector only */
1048 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1049 napi_schedule(&q_vector->napi);
1050
1051
1052 return IRQ_HANDLED;
1053}
1054
1055static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1056{
1057 ixgbevf_msix_clean_rx(irq, data);
1058 ixgbevf_msix_clean_tx(irq, data);
1059
1060 return IRQ_HANDLED;
1061}
1062
1063static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1064 int r_idx)
1065{
1066 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1067
1068 set_bit(r_idx, q_vector->rxr_idx);
1069 q_vector->rxr_count++;
1070 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1071}
1072
1073static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1074 int t_idx)
1075{
1076 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1077
1078 set_bit(t_idx, q_vector->txr_idx);
1079 q_vector->txr_count++;
1080 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1081}
1082
1083/**
1084 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1085 * @adapter: board private structure to initialize
1086 *
1087 * This function maps descriptor rings to the queue-specific vectors
1088 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1089 * one vector per ring/queue, but on a constrained vector budget, we
1090 * group the rings as "efficiently" as possible. You would add new
1091 * mapping configurations in here.
1092 **/
1093static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1094{
1095 int q_vectors;
1096 int v_start = 0;
1097 int rxr_idx = 0, txr_idx = 0;
1098 int rxr_remaining = adapter->num_rx_queues;
1099 int txr_remaining = adapter->num_tx_queues;
1100 int i, j;
1101 int rqpv, tqpv;
1102 int err = 0;
1103
1104 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1105
1106 /*
1107 * The ideal configuration...
1108 * We have enough vectors to map one per queue.
1109 */
1110 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1111 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1112 map_vector_to_rxq(adapter, v_start, rxr_idx);
1113
1114 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1115 map_vector_to_txq(adapter, v_start, txr_idx);
1116 goto out;
1117 }
1118
1119 /*
1120 * If we don't have enough vectors for a 1-to-1
1121 * mapping, we'll have to group them so there are
1122 * multiple queues per vector.
1123 */
1124 /* Re-adjusting *qpv takes care of the remainder. */
1125 for (i = v_start; i < q_vectors; i++) {
1126 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1127 for (j = 0; j < rqpv; j++) {
1128 map_vector_to_rxq(adapter, i, rxr_idx);
1129 rxr_idx++;
1130 rxr_remaining--;
1131 }
1132 }
1133 for (i = v_start; i < q_vectors; i++) {
1134 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1135 for (j = 0; j < tqpv; j++) {
1136 map_vector_to_txq(adapter, i, txr_idx);
1137 txr_idx++;
1138 txr_remaining--;
1139 }
1140 }
1141
1142out:
1143 return err;
1144}
1145
1146/**
1147 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1148 * @adapter: board private structure
1149 *
1150 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1151 * interrupts from the kernel.
1152 **/
1153static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1154{
1155 struct net_device *netdev = adapter->netdev;
1156 irqreturn_t (*handler)(int, void *);
1157 int i, vector, q_vectors, err;
1158 int ri = 0, ti = 0;
1159
1160 /* Decrement for Other and TCP Timer vectors */
1161 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1162
1163#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1164 ? &ixgbevf_msix_clean_many : \
1165 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1166 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1167 NULL)
1168 for (vector = 0; vector < q_vectors; vector++) {
1169 handler = SET_HANDLER(adapter->q_vector[vector]);
1170
1171 if (handler == &ixgbevf_msix_clean_rx) {
1172 sprintf(adapter->name[vector], "%s-%s-%d",
1173 netdev->name, "rx", ri++);
1174 } else if (handler == &ixgbevf_msix_clean_tx) {
1175 sprintf(adapter->name[vector], "%s-%s-%d",
1176 netdev->name, "tx", ti++);
1177 } else if (handler == &ixgbevf_msix_clean_many) {
1178 sprintf(adapter->name[vector], "%s-%s-%d",
1179 netdev->name, "TxRx", vector);
1180 } else {
1181 /* skip this unused q_vector */
1182 continue;
1183 }
1184 err = request_irq(adapter->msix_entries[vector].vector,
1185 handler, 0, adapter->name[vector],
1186 adapter->q_vector[vector]);
1187 if (err) {
1188 hw_dbg(&adapter->hw,
1189 "request_irq failed for MSIX interrupt "
1190 "Error: %d\n", err);
1191 goto free_queue_irqs;
1192 }
1193 }
1194
1195 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1196 err = request_irq(adapter->msix_entries[vector].vector,
1197 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1198 if (err) {
1199 hw_dbg(&adapter->hw,
1200 "request_irq for msix_mbx failed: %d\n", err);
1201 goto free_queue_irqs;
1202 }
1203
1204 return 0;
1205
1206free_queue_irqs:
1207 for (i = vector - 1; i >= 0; i--)
1208 free_irq(adapter->msix_entries[--vector].vector,
1209 &(adapter->q_vector[i]));
1210 pci_disable_msix(adapter->pdev);
1211 kfree(adapter->msix_entries);
1212 adapter->msix_entries = NULL;
1213 return err;
1214}
1215
1216static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1217{
1218 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1219
1220 for (i = 0; i < q_vectors; i++) {
1221 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1222 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1223 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1224 q_vector->rxr_count = 0;
1225 q_vector->txr_count = 0;
1226 q_vector->eitr = adapter->eitr_param;
1227 }
1228}
1229
1230/**
1231 * ixgbevf_request_irq - initialize interrupts
1232 * @adapter: board private structure
1233 *
1234 * Attempts to configure interrupts using the best available
1235 * capabilities of the hardware and kernel.
1236 **/
1237static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1238{
1239 int err = 0;
1240
1241 err = ixgbevf_request_msix_irqs(adapter);
1242
1243 if (err)
1244 hw_dbg(&adapter->hw,
1245 "request_irq failed, Error %d\n", err);
1246
1247 return err;
1248}
1249
1250static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1251{
1252 struct net_device *netdev = adapter->netdev;
1253 int i, q_vectors;
1254
1255 q_vectors = adapter->num_msix_vectors;
1256
1257 i = q_vectors - 1;
1258
1259 free_irq(adapter->msix_entries[i].vector, netdev);
1260 i--;
1261
1262 for (; i >= 0; i--) {
1263 free_irq(adapter->msix_entries[i].vector,
1264 adapter->q_vector[i]);
1265 }
1266
1267 ixgbevf_reset_q_vectors(adapter);
1268}
1269
1270/**
1271 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1272 * @adapter: board private structure
1273 **/
1274static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1275{
1276 int i;
1277 struct ixgbe_hw *hw = &adapter->hw;
1278
1279 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1280
1281 IXGBE_WRITE_FLUSH(hw);
1282
1283 for (i = 0; i < adapter->num_msix_vectors; i++)
1284 synchronize_irq(adapter->msix_entries[i].vector);
1285}
1286
1287/**
1288 * ixgbevf_irq_enable - Enable default interrupt generation settings
1289 * @adapter: board private structure
1290 **/
1291static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1292 bool queues, bool flush)
1293{
1294 struct ixgbe_hw *hw = &adapter->hw;
1295 u32 mask;
1296 u64 qmask;
1297
1298 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1299 qmask = ~0;
1300
1301 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1302
1303 if (queues)
1304 ixgbevf_irq_enable_queues(adapter, qmask);
1305
1306 if (flush)
1307 IXGBE_WRITE_FLUSH(hw);
1308}
1309
1310/**
1311 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1312 * @adapter: board private structure
1313 *
1314 * Configure the Tx unit of the MAC after a reset.
1315 **/
1316static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1317{
1318 u64 tdba;
1319 struct ixgbe_hw *hw = &adapter->hw;
1320 u32 i, j, tdlen, txctrl;
1321
1322 /* Setup the HW Tx Head and Tail descriptor pointers */
1323 for (i = 0; i < adapter->num_tx_queues; i++) {
1324 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1325 j = ring->reg_idx;
1326 tdba = ring->dma;
1327 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1328 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1329 (tdba & DMA_BIT_MASK(32)));
1330 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1331 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1332 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1333 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1334 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1335 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1336 /* Disable Tx Head Writeback RO bit, since this hoses
1337 * bookkeeping if things aren't delivered in order.
1338 */
1339 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1340 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1341 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1342 }
1343}
1344
1345#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1346
1347static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1348{
1349 struct ixgbevf_ring *rx_ring;
1350 struct ixgbe_hw *hw = &adapter->hw;
1351 u32 srrctl;
1352
1353 rx_ring = &adapter->rx_ring[index];
1354
1355 srrctl = IXGBE_SRRCTL_DROP_EN;
1356
1357 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1358 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1359 /* grow the amount we can receive on large page machines */
1360 if (bufsz < (PAGE_SIZE / 2))
1361 bufsz = (PAGE_SIZE / 2);
1362 /* cap the bufsz at our largest descriptor size */
1363 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1364
1365 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1366 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1367 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1368 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1369 IXGBE_SRRCTL_BSIZEHDR_MASK);
1370 } else {
1371 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1372
1373 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1374 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1375 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1376 else
1377 srrctl |= rx_ring->rx_buf_len >>
1378 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1379 }
1380 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1381}
1382
1383/**
1384 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1385 * @adapter: board private structure
1386 *
1387 * Configure the Rx unit of the MAC after a reset.
1388 **/
1389static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1390{
1391 u64 rdba;
1392 struct ixgbe_hw *hw = &adapter->hw;
1393 struct net_device *netdev = adapter->netdev;
1394 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1395 int i, j;
1396 u32 rdlen;
1397 int rx_buf_len;
1398
1399 /* Decide whether to use packet split mode or not */
1400 if (netdev->mtu > ETH_DATA_LEN) {
1401 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1402 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1403 else
1404 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1405 } else {
1406 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1407 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1408 else
1409 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1410 }
1411
1412 /* Set the RX buffer length according to the mode */
1413 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1414 /* PSRTYPE must be initialized in 82599 */
1415 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1416 IXGBE_PSRTYPE_UDPHDR |
1417 IXGBE_PSRTYPE_IPV4HDR |
1418 IXGBE_PSRTYPE_IPV6HDR |
1419 IXGBE_PSRTYPE_L2HDR;
1420 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1421 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1422 } else {
1423 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1424 if (netdev->mtu <= ETH_DATA_LEN)
1425 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1426 else
1427 rx_buf_len = ALIGN(max_frame, 1024);
1428 }
1429
1430 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1431 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1432 * the Base and Length of the Rx Descriptor Ring */
1433 for (i = 0; i < adapter->num_rx_queues; i++) {
1434 rdba = adapter->rx_ring[i].dma;
1435 j = adapter->rx_ring[i].reg_idx;
1436 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1437 (rdba & DMA_BIT_MASK(32)));
1438 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1439 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1440 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1441 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1442 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1443 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1444 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1445
1446 ixgbevf_configure_srrctl(adapter, j);
1447 }
1448}
1449
1450static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1451 struct vlan_group *grp)
1452{
1453 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1454 struct ixgbe_hw *hw = &adapter->hw;
1455 int i, j;
1456 u32 ctrl;
1457
1458 adapter->vlgrp = grp;
1459
1460 for (i = 0; i < adapter->num_rx_queues; i++) {
1461 j = adapter->rx_ring[i].reg_idx;
1462 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1463 ctrl |= IXGBE_RXDCTL_VME;
1464 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1465 }
1466}
1467
1468static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1469{
1470 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1471 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1472
1473 /* add VID to filter table */
1474 if (hw->mac.ops.set_vfta)
1475 hw->mac.ops.set_vfta(hw, vid, 0, true);
92915f71
GR		 1476}
1477
1478static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1479{
1480 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1481 struct ixgbe_hw *hw = &adapter->hw;
1482
1483 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1484 ixgbevf_irq_disable(adapter);
1485
1486 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1487
1488 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1489 ixgbevf_irq_enable(adapter, true, true);
1490
1491 /* remove VID from filter table */
1492 if (hw->mac.ops.set_vfta)
1493 hw->mac.ops.set_vfta(hw, vid, 0, false);
1494}
1495
1496static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1497{
1498 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1499
1500 if (adapter->vlgrp) {
1501 u16 vid;
b738127d 1502 for (vid = 0; vid < VLAN_N_VID; vid++) {
92915f71
GR		 1503 if (!vlan_group_get_device(adapter->vlgrp, vid))
1504 continue;
1505 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1506 }
1507 }
1508}
1509
92915f71
GR		 1510/**
1511 * ixgbevf_set_rx_mode - Multicast set
1512 * @netdev: network interface device structure
1513 *
1514 * The set_rx_method entry point is called whenever the multicast address
1515 * list or the network interface flags are updated. This routine is
1516 * responsible for configuring the hardware for proper multicast mode.
1517 **/
1518static void ixgbevf_set_rx_mode(struct net_device *netdev)
1519{
1520 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1521 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1522
1523 /* reprogram multicast list */
92915f71 1524 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1525 hw->mac.ops.update_mc_addr_list(hw, netdev);
92915f71
GR		 1526}
1527
1528static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1529{
1530 int q_idx;
1531 struct ixgbevf_q_vector *q_vector;
1532 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1533
1534 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1535 struct napi_struct *napi;
1536 q_vector = adapter->q_vector[q_idx];
1537 if (!q_vector->rxr_count)
1538 continue;
1539 napi = &q_vector->napi;
1540 if (q_vector->rxr_count > 1)
1541 napi->poll = &ixgbevf_clean_rxonly_many;
1542
1543 napi_enable(napi);
1544 }
1545}
1546
1547static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1548{
1549 int q_idx;
1550 struct ixgbevf_q_vector *q_vector;
1551 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1552
1553 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1554 q_vector = adapter->q_vector[q_idx];
1555 if (!q_vector->rxr_count)
1556 continue;
1557 napi_disable(&q_vector->napi);
1558 }
1559}
1560
1561static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1562{
1563 struct net_device *netdev = adapter->netdev;
1564 int i;
1565
1566 ixgbevf_set_rx_mode(netdev);
1567
1568 ixgbevf_restore_vlan(adapter);
1569
1570 ixgbevf_configure_tx(adapter);
1571 ixgbevf_configure_rx(adapter);
1572 for (i = 0; i < adapter->num_rx_queues; i++) {
1573 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1574 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1575 ring->next_to_use = ring->count - 1;
1576 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1577 }
1578}
1579
1580#define IXGBE_MAX_RX_DESC_POLL 10
1581static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1582 int rxr)
1583{
1584 struct ixgbe_hw *hw = &adapter->hw;
1585 int j = adapter->rx_ring[rxr].reg_idx;
1586 int k;
1587
1588 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1589 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1590 break;
1591 else
1592 msleep(1);
1593 }
1594 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1595 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1596 "not set within the polling period\n", rxr);
1597 }
1598
1599 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1600 (adapter->rx_ring[rxr].count - 1));
1601}
1602
33bd9f60
GR		 1603static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1604{
1605 /* Only save pre-reset stats if there are some */
1606 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1607 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1608 adapter->stats.base_vfgprc;
1609 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1610 adapter->stats.base_vfgptc;
1611 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1612 adapter->stats.base_vfgorc;
1613 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1614 adapter->stats.base_vfgotc;
1615 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1616 adapter->stats.base_vfmprc;
1617 }
1618}
1619
1620static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1621{
1622 struct ixgbe_hw *hw = &adapter->hw;
1623
1624 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1625 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1626 adapter->stats.last_vfgorc |=
1627 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1628 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1629 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1630 adapter->stats.last_vfgotc |=
1631 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1632 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1633
1634 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1635 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1636 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1637 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1638 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1639}
1640
92915f71
GR		 1641static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1642{
1643 struct net_device *netdev = adapter->netdev;
1644 struct ixgbe_hw *hw = &adapter->hw;
1645 int i, j = 0;
1646 int num_rx_rings = adapter->num_rx_queues;
1647 u32 txdctl, rxdctl;
1648
1649 for (i = 0; i < adapter->num_tx_queues; i++) {
1650 j = adapter->tx_ring[i].reg_idx;
1651 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1652 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1653 txdctl |= (8 << 16);
1654 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1655 }
1656
1657 for (i = 0; i < adapter->num_tx_queues; i++) {
1658 j = adapter->tx_ring[i].reg_idx;
1659 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1660 txdctl |= IXGBE_TXDCTL_ENABLE;
1661 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1662 }
1663
1664 for (i = 0; i < num_rx_rings; i++) {
1665 j = adapter->rx_ring[i].reg_idx;
1666 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1667 rxdctl |= IXGBE_RXDCTL_ENABLE;
1668 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1669 ixgbevf_rx_desc_queue_enable(adapter, i);
1670 }
1671
1672 ixgbevf_configure_msix(adapter);
1673
1674 if (hw->mac.ops.set_rar) {
1675 if (is_valid_ether_addr(hw->mac.addr))
1676 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1677 else
1678 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1679 }
1680
1681 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1682 ixgbevf_napi_enable_all(adapter);
1683
1684 /* enable transmits */
1685 netif_tx_start_all_queues(netdev);
1686
33bd9f60
GR		 1687 ixgbevf_save_reset_stats(adapter);
1688 ixgbevf_init_last_counter_stats(adapter);
1689
92915f71
GR		 1690 /* bring the link up in the watchdog, this could race with our first
1691 * link up interrupt but shouldn't be a problem */
1692 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1693 adapter->link_check_timeout = jiffies;
1694 mod_timer(&adapter->watchdog_timer, jiffies);
1695 return 0;
1696}
1697
1698int ixgbevf_up(struct ixgbevf_adapter *adapter)
1699{
1700 int err;
1701 struct ixgbe_hw *hw = &adapter->hw;
1702
1703 ixgbevf_configure(adapter);
1704
1705 err = ixgbevf_up_complete(adapter);
1706
1707 /* clear any pending interrupts, may auto mask */
1708 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1709
1710 ixgbevf_irq_enable(adapter, true, true);
1711
1712 return err;
1713}
1714
1715/**
1716 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1717 * @adapter: board private structure
1718 * @rx_ring: ring to free buffers from
1719 **/
1720static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1721 struct ixgbevf_ring *rx_ring)
1722{
1723 struct pci_dev *pdev = adapter->pdev;
1724 unsigned long size;
1725 unsigned int i;
1726
c0456c23
GR		 1727 if (!rx_ring->rx_buffer_info)
1728 return;
92915f71 1729
c0456c23 1730 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1731 for (i = 0; i < rx_ring->count; i++) {
1732 struct ixgbevf_rx_buffer *rx_buffer_info;
1733
1734 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1735 if (rx_buffer_info->dma) {
2a1f8794 1736 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1737 rx_ring->rx_buf_len,
2a1f8794 1738 DMA_FROM_DEVICE);
92915f71
GR		 1739 rx_buffer_info->dma = 0;
1740 }
1741 if (rx_buffer_info->skb) {
1742 struct sk_buff *skb = rx_buffer_info->skb;
1743 rx_buffer_info->skb = NULL;
1744 do {
1745 struct sk_buff *this = skb;
1746 skb = skb->prev;
1747 dev_kfree_skb(this);
1748 } while (skb);
1749 }
1750 if (!rx_buffer_info->page)
1751 continue;
2a1f8794
NN		 1752 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1753 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 1754 rx_buffer_info->page_dma = 0;
1755 put_page(rx_buffer_info->page);
1756 rx_buffer_info->page = NULL;
1757 rx_buffer_info->page_offset = 0;
1758 }
1759
1760 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1761 memset(rx_ring->rx_buffer_info, 0, size);
1762
1763 /* Zero out the descriptor ring */
1764 memset(rx_ring->desc, 0, rx_ring->size);
1765
1766 rx_ring->next_to_clean = 0;
1767 rx_ring->next_to_use = 0;
1768
1769 if (rx_ring->head)
1770 writel(0, adapter->hw.hw_addr + rx_ring->head);
1771 if (rx_ring->tail)
1772 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1773}
1774
1775/**
1776 * ixgbevf_clean_tx_ring - Free Tx Buffers
1777 * @adapter: board private structure
1778 * @tx_ring: ring to be cleaned
1779 **/
1780static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1781 struct ixgbevf_ring *tx_ring)
1782{
1783 struct ixgbevf_tx_buffer *tx_buffer_info;
1784 unsigned long size;
1785 unsigned int i;
1786
c0456c23
GR		 1787 if (!tx_ring->tx_buffer_info)
1788 return;
1789
92915f71
GR		 1790 /* Free all the Tx ring sk_buffs */
1791
1792 for (i = 0; i < tx_ring->count; i++) {
1793 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1794 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1795 }
1796
1797 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1798 memset(tx_ring->tx_buffer_info, 0, size);
1799
1800 memset(tx_ring->desc, 0, tx_ring->size);
1801
1802 tx_ring->next_to_use = 0;
1803 tx_ring->next_to_clean = 0;
1804
1805 if (tx_ring->head)
1806 writel(0, adapter->hw.hw_addr + tx_ring->head);
1807 if (tx_ring->tail)
1808 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1809}
1810
1811/**
1812 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1813 * @adapter: board private structure
1814 **/
1815static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1816{
1817 int i;
1818
1819 for (i = 0; i < adapter->num_rx_queues; i++)
1820 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1821}
1822
1823/**
1824 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1825 * @adapter: board private structure
1826 **/
1827static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1828{
1829 int i;
1830
1831 for (i = 0; i < adapter->num_tx_queues; i++)
1832 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1833}
1834
1835void ixgbevf_down(struct ixgbevf_adapter *adapter)
1836{
1837 struct net_device *netdev = adapter->netdev;
1838 struct ixgbe_hw *hw = &adapter->hw;
1839 u32 txdctl;
1840 int i, j;
1841
1842 /* signal that we are down to the interrupt handler */
1843 set_bit(__IXGBEVF_DOWN, &adapter->state);
1844 /* disable receives */
1845
1846 netif_tx_disable(netdev);
1847
1848 msleep(10);
1849
1850 netif_tx_stop_all_queues(netdev);
1851
1852 ixgbevf_irq_disable(adapter);
1853
1854 ixgbevf_napi_disable_all(adapter);
1855
1856 del_timer_sync(&adapter->watchdog_timer);
1857 /* can't call flush scheduled work here because it can deadlock
1858 * if linkwatch_event tries to acquire the rtnl_lock which we are
1859 * holding */
1860 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1861 msleep(1);
1862
1863 /* disable transmits in the hardware now that interrupts are off */
1864 for (i = 0; i < adapter->num_tx_queues; i++) {
1865 j = adapter->tx_ring[i].reg_idx;
1866 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1867 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1868 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1869 }
1870
1871 netif_carrier_off(netdev);
1872
1873 if (!pci_channel_offline(adapter->pdev))
1874 ixgbevf_reset(adapter);
1875
1876 ixgbevf_clean_all_tx_rings(adapter);
1877 ixgbevf_clean_all_rx_rings(adapter);
1878}
1879
1880void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1881{
c0456c23
GR		 1882 struct ixgbe_hw *hw = &adapter->hw;
1883
92915f71 1884 WARN_ON(in_interrupt());
c0456c23 1885
92915f71
GR		 1886 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1887 msleep(1);
1888
c0456c23
GR		 1889 /*
1890 * Check if PF is up before re-init. If not then skip until
1891 * later when the PF is up and ready to service requests from
1892 * the VF via mailbox. If the VF is up and running then the
1893 * watchdog task will continue to schedule reset tasks until
1894 * the PF is up and running.
1895 */
1896 if (!hw->mac.ops.reset_hw(hw)) {
1897 ixgbevf_down(adapter);
1898 ixgbevf_up(adapter);
1899 }
92915f71
GR		 1900
1901 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1902}
1903
1904void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1905{
1906 struct ixgbe_hw *hw = &adapter->hw;
1907 struct net_device *netdev = adapter->netdev;
1908
1909 if (hw->mac.ops.reset_hw(hw))
1910 hw_dbg(hw, "PF still resetting\n");
1911 else
1912 hw->mac.ops.init_hw(hw);
1913
1914 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1915 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1916 netdev->addr_len);
1917 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1918 netdev->addr_len);
1919 }
1920}
1921
1922static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1923 int vectors)
1924{
1925 int err, vector_threshold;
1926
1927 /* We'll want at least 3 (vector_threshold):
1928 * 1) TxQ[0] Cleanup
1929 * 2) RxQ[0] Cleanup
1930 * 3) Other (Link Status Change, etc.)
1931 */
1932 vector_threshold = MIN_MSIX_COUNT;
1933
1934 /* The more we get, the more we will assign to Tx/Rx Cleanup
1935 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1936 * Right now, we simply care about how many we'll get; we'll
1937 * set them up later while requesting irq's.
1938 */
1939 while (vectors >= vector_threshold) {
1940 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1941 vectors);
1942 if (!err) /* Success in acquiring all requested vectors. */
1943 break;
1944 else if (err < 0)
1945 vectors = 0; /* Nasty failure, quit now */
1946 else /* err == number of vectors we should try again with */
1947 vectors = err;
1948 }
1949
1950 if (vectors < vector_threshold) {
1951 /* Can't allocate enough MSI-X interrupts? Oh well.
1952 * This just means we'll go with either a single MSI
1953 * vector or fall back to legacy interrupts.
1954 */
1955 hw_dbg(&adapter->hw,
1956 "Unable to allocate MSI-X interrupts\n");
1957 kfree(adapter->msix_entries);
1958 adapter->msix_entries = NULL;
1959 } else {
1960 /*
1961 * Adjust for only the vectors we'll use, which is minimum
1962 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1963 * vectors we were allocated.
1964 */
1965 adapter->num_msix_vectors = vectors;
1966 }
1967}
1968
1969/*
1970 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1971 * @adapter: board private structure to initialize
1972 *
1973 * This is the top level queue allocation routine. The order here is very
1974 * important, starting with the "most" number of features turned on at once,
1975 * and ending with the smallest set of features. This way large combinations
1976 * can be allocated if they're turned on, and smaller combinations are the
1977 * fallthrough conditions.
1978 *
1979 **/
1980static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1981{
1982 /* Start with base case */
1983 adapter->num_rx_queues = 1;
1984 adapter->num_tx_queues = 1;
1985 adapter->num_rx_pools = adapter->num_rx_queues;
1986 adapter->num_rx_queues_per_pool = 1;
1987}
1988
1989/**
1990 * ixgbevf_alloc_queues - Allocate memory for all rings
1991 * @adapter: board private structure to initialize
1992 *
1993 * We allocate one ring per queue at run-time since we don't know the
1994 * number of queues at compile-time. The polling_netdev array is
1995 * intended for Multiqueue, but should work fine with a single queue.
1996 **/
1997static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1998{
1999 int i;
2000
2001 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2002 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2003 if (!adapter->tx_ring)
2004 goto err_tx_ring_allocation;
2005
2006 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2007 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2008 if (!adapter->rx_ring)
2009 goto err_rx_ring_allocation;
2010
2011 for (i = 0; i < adapter->num_tx_queues; i++) {
2012 adapter->tx_ring[i].count = adapter->tx_ring_count;
2013 adapter->tx_ring[i].queue_index = i;
2014 adapter->tx_ring[i].reg_idx = i;
2015 }
2016
2017 for (i = 0; i < adapter->num_rx_queues; i++) {
2018 adapter->rx_ring[i].count = adapter->rx_ring_count;
2019 adapter->rx_ring[i].queue_index = i;
2020 adapter->rx_ring[i].reg_idx = i;
2021 }
2022
2023 return 0;
2024
2025err_rx_ring_allocation:
2026 kfree(adapter->tx_ring);
2027err_tx_ring_allocation:
2028 return -ENOMEM;
2029}
2030
2031/**
2032 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2033 * @adapter: board private structure to initialize
2034 *
2035 * Attempt to configure the interrupts using the best available
2036 * capabilities of the hardware and the kernel.
2037 **/
2038static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2039{
2040 int err = 0;
2041 int vector, v_budget;
2042
2043 /*
2044 * It's easy to be greedy for MSI-X vectors, but it really
2045 * doesn't do us much good if we have a lot more vectors
2046 * than CPU's. So let's be conservative and only ask for
2047 * (roughly) twice the number of vectors as there are CPU's.
2048 */
2049 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2050 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2051
2052 /* A failure in MSI-X entry allocation isn't fatal, but it does
2053 * mean we disable MSI-X capabilities of the adapter. */
2054 adapter->msix_entries = kcalloc(v_budget,
2055 sizeof(struct msix_entry), GFP_KERNEL);
2056 if (!adapter->msix_entries) {
2057 err = -ENOMEM;
2058 goto out;
2059 }
2060
2061 for (vector = 0; vector < v_budget; vector++)
2062 adapter->msix_entries[vector].entry = vector;
2063
2064 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2065
2066out:
2067 return err;
2068}
2069
2070/**
2071 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2072 * @adapter: board private structure to initialize
2073 *
2074 * We allocate one q_vector per queue interrupt. If allocation fails we
2075 * return -ENOMEM.
2076 **/
2077static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2078{
2079 int q_idx, num_q_vectors;
2080 struct ixgbevf_q_vector *q_vector;
2081 int napi_vectors;
2082 int (*poll)(struct napi_struct *, int);
2083
2084 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2085 napi_vectors = adapter->num_rx_queues;
2086 poll = &ixgbevf_clean_rxonly;
2087
2088 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2089 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2090 if (!q_vector)
2091 goto err_out;
2092 q_vector->adapter = adapter;
2093 q_vector->v_idx = q_idx;
2094 q_vector->eitr = adapter->eitr_param;
2095 if (q_idx < napi_vectors)
2096 netif_napi_add(adapter->netdev, &q_vector->napi,
2097 (*poll), 64);
2098 adapter->q_vector[q_idx] = q_vector;
2099 }
2100
2101 return 0;
2102
2103err_out:
2104 while (q_idx) {
2105 q_idx--;
2106 q_vector = adapter->q_vector[q_idx];
2107 netif_napi_del(&q_vector->napi);
2108 kfree(q_vector);
2109 adapter->q_vector[q_idx] = NULL;
2110 }
2111 return -ENOMEM;
2112}
2113
2114/**
2115 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2116 * @adapter: board private structure to initialize
2117 *
2118 * This function frees the memory allocated to the q_vectors. In addition if
2119 * NAPI is enabled it will delete any references to the NAPI struct prior
2120 * to freeing the q_vector.
2121 **/
2122static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2123{
2124 int q_idx, num_q_vectors;
2125 int napi_vectors;
2126
2127 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2128 napi_vectors = adapter->num_rx_queues;
2129
2130 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2131 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2132
2133 adapter->q_vector[q_idx] = NULL;
2134 if (q_idx < napi_vectors)
2135 netif_napi_del(&q_vector->napi);
2136 kfree(q_vector);
2137 }
2138}
2139
2140/**
2141 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2142 * @adapter: board private structure
2143 *
2144 **/
2145static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2146{
2147 pci_disable_msix(adapter->pdev);
2148 kfree(adapter->msix_entries);
2149 adapter->msix_entries = NULL;
92915f71
GR		 2150}
2151
2152/**
2153 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2154 * @adapter: board private structure to initialize
2155 *
2156 **/
2157static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2158{
2159 int err;
2160
2161 /* Number of supported queues */
2162 ixgbevf_set_num_queues(adapter);
2163
2164 err = ixgbevf_set_interrupt_capability(adapter);
2165 if (err) {
2166 hw_dbg(&adapter->hw,
2167 "Unable to setup interrupt capabilities\n");
2168 goto err_set_interrupt;
2169 }
2170
2171 err = ixgbevf_alloc_q_vectors(adapter);
2172 if (err) {
2173 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2174 "vectors\n");
2175 goto err_alloc_q_vectors;
2176 }
2177
2178 err = ixgbevf_alloc_queues(adapter);
2179 if (err) {
2180 printk(KERN_ERR "Unable to allocate memory for queues\n");
2181 goto err_alloc_queues;
2182 }
2183
2184 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2185 "Tx Queue count = %u\n",
2186 (adapter->num_rx_queues > 1) ? "Enabled" :
2187 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2188
2189 set_bit(__IXGBEVF_DOWN, &adapter->state);
2190
2191 return 0;
2192err_alloc_queues:
2193 ixgbevf_free_q_vectors(adapter);
2194err_alloc_q_vectors:
2195 ixgbevf_reset_interrupt_capability(adapter);
2196err_set_interrupt:
2197 return err;
2198}
2199
2200/**
2201 * ixgbevf_sw_init - Initialize general software structures
2202 * (struct ixgbevf_adapter)
2203 * @adapter: board private structure to initialize
2204 *
2205 * ixgbevf_sw_init initializes the Adapter private data structure.
2206 * Fields are initialized based on PCI device information and
2207 * OS network device settings (MTU size).
2208 **/
2209static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2210{
2211 struct ixgbe_hw *hw = &adapter->hw;
2212 struct pci_dev *pdev = adapter->pdev;
2213 int err;
2214
2215 /* PCI config space info */
2216
2217 hw->vendor_id = pdev->vendor;
2218 hw->device_id = pdev->device;
2219 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2220 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2221 hw->subsystem_device_id = pdev->subsystem_device;
2222
2223 hw->mbx.ops.init_params(hw);
2224 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2225 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2226 err = hw->mac.ops.reset_hw(hw);
2227 if (err) {
2228 dev_info(&pdev->dev,
2229 "PF still in reset state, assigning new address\n");
2c6952df 2230 dev_hw_addr_random(adapter->netdev, hw->mac.addr);
92915f71
GR		 2231 } else {
2232 err = hw->mac.ops.init_hw(hw);
2233 if (err) {
2234 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2235 goto out;
2236 }
2237 }
2238
2239 /* Enable dynamic interrupt throttling rates */
2240 adapter->eitr_param = 20000;
2241 adapter->itr_setting = 1;
2242
2243 /* set defaults for eitr in MegaBytes */
2244 adapter->eitr_low = 10;
2245 adapter->eitr_high = 20;
2246
2247 /* set default ring sizes */
2248 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2249 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2250
2251 /* enable rx csum by default */
2252 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2253
2254 set_bit(__IXGBEVF_DOWN, &adapter->state);
2255
2256out:
2257 return err;
2258}
2259
92915f71
GR		 2260#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2261 { \
2262 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2263 if (current_counter < last_counter) \
2264 counter += 0x100000000LL; \
2265 last_counter = current_counter; \
2266 counter &= 0xFFFFFFFF00000000LL; \
2267 counter |= current_counter; \
2268 }
2269
2270#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2271 { \
2272 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2273 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2274 u64 current_counter = (current_counter_msb << 32) | \
2275 current_counter_lsb; \
2276 if (current_counter < last_counter) \
2277 counter += 0x1000000000LL; \
2278 last_counter = current_counter; \
2279 counter &= 0xFFFFFFF000000000LL; \
2280 counter |= current_counter; \
2281 }
2282/**
2283 * ixgbevf_update_stats - Update the board statistics counters.
2284 * @adapter: board private structure
2285 **/
2286void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2287{
2288 struct ixgbe_hw *hw = &adapter->hw;
2289
2290 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2291 adapter->stats.vfgprc);
2292 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2293 adapter->stats.vfgptc);
2294 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2295 adapter->stats.last_vfgorc,
2296 adapter->stats.vfgorc);
2297 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2298 adapter->stats.last_vfgotc,
2299 adapter->stats.vfgotc);
2300 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2301 adapter->stats.vfmprc);
2302
2303 /* Fill out the OS statistics structure */
fb621bac 2304 adapter->netdev->stats.multicast = adapter->stats.vfmprc -
92915f71
GR		 2305 adapter->stats.base_vfmprc;
2306}
2307
2308/**
2309 * ixgbevf_watchdog - Timer Call-back
2310 * @data: pointer to adapter cast into an unsigned long
2311 **/
2312static void ixgbevf_watchdog(unsigned long data)
2313{
2314 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2315 struct ixgbe_hw *hw = &adapter->hw;
2316 u64 eics = 0;
2317 int i;
2318
2319 /*
2320 * Do the watchdog outside of interrupt context due to the lovely
2321 * delays that some of the newer hardware requires
2322 */
2323
2324 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2325 goto watchdog_short_circuit;
2326
2327 /* get one bit for every active tx/rx interrupt vector */
2328 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2329 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2330 if (qv->rxr_count || qv->txr_count)
2331 eics |= (1 << i);
2332 }
2333
2334 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2335
2336watchdog_short_circuit:
2337 schedule_work(&adapter->watchdog_task);
2338}
2339
2340/**
2341 * ixgbevf_tx_timeout - Respond to a Tx Hang
2342 * @netdev: network interface device structure
2343 **/
2344static void ixgbevf_tx_timeout(struct net_device *netdev)
2345{
2346 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2347
2348 /* Do the reset outside of interrupt context */
2349 schedule_work(&adapter->reset_task);
2350}
2351
2352static void ixgbevf_reset_task(struct work_struct *work)
2353{
2354 struct ixgbevf_adapter *adapter;
2355 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2356
2357 /* If we're already down or resetting, just bail */
2358 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2359 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2360 return;
2361
2362 adapter->tx_timeout_count++;
2363
2364 ixgbevf_reinit_locked(adapter);
2365}
2366
2367/**
2368 * ixgbevf_watchdog_task - worker thread to bring link up
2369 * @work: pointer to work_struct containing our data
2370 **/
2371static void ixgbevf_watchdog_task(struct work_struct *work)
2372{
2373 struct ixgbevf_adapter *adapter = container_of(work,
2374 struct ixgbevf_adapter,
2375 watchdog_task);
2376 struct net_device *netdev = adapter->netdev;
2377 struct ixgbe_hw *hw = &adapter->hw;
2378 u32 link_speed = adapter->link_speed;
2379 bool link_up = adapter->link_up;
2380
2381 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2382
2383 /*
2384 * Always check the link on the watchdog because we have
2385 * no LSC interrupt
2386 */
2387 if (hw->mac.ops.check_link) {
2388 if ((hw->mac.ops.check_link(hw, &link_speed,
2389 &link_up, false)) != 0) {
2390 adapter->link_up = link_up;
2391 adapter->link_speed = link_speed;
da6b3330
GR		 2392 netif_carrier_off(netdev);
2393 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2394 schedule_work(&adapter->reset_task);
2395 goto pf_has_reset;
2396 }
2397 } else {
2398 /* always assume link is up, if no check link
2399 * function */
2400 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2401 link_up = true;
2402 }
2403 adapter->link_up = link_up;
2404 adapter->link_speed = link_speed;
2405
2406 if (link_up) {
2407 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2408 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2409 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2410 10 : 1);
92915f71
GR		 2411 netif_carrier_on(netdev);
2412 netif_tx_wake_all_queues(netdev);
2413 } else {
2414 /* Force detection of hung controller */
2415 adapter->detect_tx_hung = true;
2416 }
2417 } else {
2418 adapter->link_up = false;
2419 adapter->link_speed = 0;
2420 if (netif_carrier_ok(netdev)) {
2421 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2422 netif_carrier_off(netdev);
2423 netif_tx_stop_all_queues(netdev);
2424 }
2425 }
2426
92915f71
GR		 2427 ixgbevf_update_stats(adapter);
2428
33bd9f60 2429pf_has_reset:
92915f71
GR		 2430 /* Force detection of hung controller every watchdog period */
2431 adapter->detect_tx_hung = true;
2432
2433 /* Reset the timer */
2434 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2435 mod_timer(&adapter->watchdog_timer,
2436 round_jiffies(jiffies + (2 * HZ)));
2437
2438 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2439}
2440
2441/**
2442 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2443 * @adapter: board private structure
2444 * @tx_ring: Tx descriptor ring for a specific queue
2445 *
2446 * Free all transmit software resources
2447 **/
2448void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2449 struct ixgbevf_ring *tx_ring)
2450{
2451 struct pci_dev *pdev = adapter->pdev;
2452
92915f71
GR		 2453 ixgbevf_clean_tx_ring(adapter, tx_ring);
2454
2455 vfree(tx_ring->tx_buffer_info);
2456 tx_ring->tx_buffer_info = NULL;
2457
2a1f8794
NN		 2458 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2459 tx_ring->dma);
92915f71
GR		 2460
2461 tx_ring->desc = NULL;
2462}
2463
2464/**
2465 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2466 * @adapter: board private structure
2467 *
2468 * Free all transmit software resources
2469 **/
2470static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2471{
2472 int i;
2473
2474 for (i = 0; i < adapter->num_tx_queues; i++)
2475 if (adapter->tx_ring[i].desc)
2476 ixgbevf_free_tx_resources(adapter,
2477 &adapter->tx_ring[i]);
2478
2479}
2480
2481/**
2482 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2483 * @adapter: board private structure
2484 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2485 *
2486 * Return 0 on success, negative on failure
2487 **/
2488int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2489 struct ixgbevf_ring *tx_ring)
2490{
2491 struct pci_dev *pdev = adapter->pdev;
2492 int size;
2493
2494 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2495 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2496 if (!tx_ring->tx_buffer_info)
2497 goto err;
92915f71
GR		 2498
2499 /* round up to nearest 4K */
2500 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2501 tx_ring->size = ALIGN(tx_ring->size, 4096);
2502
2a1f8794
NN		 2503 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2504 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2505 if (!tx_ring->desc)
2506 goto err;
2507
2508 tx_ring->next_to_use = 0;
2509 tx_ring->next_to_clean = 0;
2510 tx_ring->work_limit = tx_ring->count;
2511 return 0;
2512
2513err:
2514 vfree(tx_ring->tx_buffer_info);
2515 tx_ring->tx_buffer_info = NULL;
2516 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2517 "descriptor ring\n");
2518 return -ENOMEM;
2519}
2520
2521/**
2522 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2523 * @adapter: board private structure
2524 *
2525 * If this function returns with an error, then it's possible one or
2526 * more of the rings is populated (while the rest are not). It is the
2527 * callers duty to clean those orphaned rings.
2528 *
2529 * Return 0 on success, negative on failure
2530 **/
2531static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2532{
2533 int i, err = 0;
2534
2535 for (i = 0; i < adapter->num_tx_queues; i++) {
2536 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2537 if (!err)
2538 continue;
2539 hw_dbg(&adapter->hw,
2540 "Allocation for Tx Queue %u failed\n", i);
2541 break;
2542 }
2543
2544 return err;
2545}
2546
2547/**
2548 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2549 * @adapter: board private structure
2550 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2551 *
2552 * Returns 0 on success, negative on failure
2553 **/
2554int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2555 struct ixgbevf_ring *rx_ring)
2556{
2557 struct pci_dev *pdev = adapter->pdev;
2558 int size;
2559
2560 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2561 rx_ring->rx_buffer_info = vzalloc(size);
92915f71
GR		 2562 if (!rx_ring->rx_buffer_info) {
2563 hw_dbg(&adapter->hw,
2564 "Unable to vmalloc buffer memory for "
2565 "the receive descriptor ring\n");
2566 goto alloc_failed;
2567 }
92915f71
GR		 2568
2569 /* Round up to nearest 4K */
2570 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2571 rx_ring->size = ALIGN(rx_ring->size, 4096);
2572
2a1f8794
NN		 2573 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2574 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2575
2576 if (!rx_ring->desc) {
2577 hw_dbg(&adapter->hw,
2578 "Unable to allocate memory for "
2579 "the receive descriptor ring\n");
2580 vfree(rx_ring->rx_buffer_info);
2581 rx_ring->rx_buffer_info = NULL;
2582 goto alloc_failed;
2583 }
2584
2585 rx_ring->next_to_clean = 0;
2586 rx_ring->next_to_use = 0;
2587
2588 return 0;
2589alloc_failed:
2590 return -ENOMEM;
2591}
2592
2593/**
2594 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2595 * @adapter: board private structure
2596 *
2597 * If this function returns with an error, then it's possible one or
2598 * more of the rings is populated (while the rest are not). It is the
2599 * callers duty to clean those orphaned rings.
2600 *
2601 * Return 0 on success, negative on failure
2602 **/
2603static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2604{
2605 int i, err = 0;
2606
2607 for (i = 0; i < adapter->num_rx_queues; i++) {
2608 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2609 if (!err)
2610 continue;
2611 hw_dbg(&adapter->hw,
2612 "Allocation for Rx Queue %u failed\n", i);
2613 break;
2614 }
2615 return err;
2616}
2617
2618/**
2619 * ixgbevf_free_rx_resources - Free Rx Resources
2620 * @adapter: board private structure
2621 * @rx_ring: ring to clean the resources from
2622 *
2623 * Free all receive software resources
2624 **/
2625void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2626 struct ixgbevf_ring *rx_ring)
2627{
2628 struct pci_dev *pdev = adapter->pdev;
2629
2630 ixgbevf_clean_rx_ring(adapter, rx_ring);
2631
2632 vfree(rx_ring->rx_buffer_info);
2633 rx_ring->rx_buffer_info = NULL;
2634
2a1f8794
NN		 2635 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2636 rx_ring->dma);
92915f71
GR		 2637
2638 rx_ring->desc = NULL;
2639}
2640
2641/**
2642 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2643 * @adapter: board private structure
2644 *
2645 * Free all receive software resources
2646 **/
2647static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2648{
2649 int i;
2650
2651 for (i = 0; i < adapter->num_rx_queues; i++)
2652 if (adapter->rx_ring[i].desc)
2653 ixgbevf_free_rx_resources(adapter,
2654 &adapter->rx_ring[i]);
2655}
2656
2657/**
2658 * ixgbevf_open - Called when a network interface is made active
2659 * @netdev: network interface device structure
2660 *
2661 * Returns 0 on success, negative value on failure
2662 *
2663 * The open entry point is called when a network interface is made
2664 * active by the system (IFF_UP). At this point all resources needed
2665 * for transmit and receive operations are allocated, the interrupt
2666 * handler is registered with the OS, the watchdog timer is started,
2667 * and the stack is notified that the interface is ready.
2668 **/
2669static int ixgbevf_open(struct net_device *netdev)
2670{
2671 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2672 struct ixgbe_hw *hw = &adapter->hw;
2673 int err;
2674
2675 /* disallow open during test */
2676 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2677 return -EBUSY;
2678
2679 if (hw->adapter_stopped) {
2680 ixgbevf_reset(adapter);
2681 /* if adapter is still stopped then PF isn't up and
2682 * the vf can't start. */
2683 if (hw->adapter_stopped) {
2684 err = IXGBE_ERR_MBX;
2685 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2686 " Driver isn't up yet\n");
92915f71
GR		 2687 goto err_setup_reset;
2688 }
2689 }
2690
2691 /* allocate transmit descriptors */
2692 err = ixgbevf_setup_all_tx_resources(adapter);
2693 if (err)
2694 goto err_setup_tx;
2695
2696 /* allocate receive descriptors */
2697 err = ixgbevf_setup_all_rx_resources(adapter);
2698 if (err)
2699 goto err_setup_rx;
2700
2701 ixgbevf_configure(adapter);
2702
2703 /*
2704 * Map the Tx/Rx rings to the vectors we were allotted.
2705 * if request_irq will be called in this function map_rings
2706 * must be called *before* up_complete
2707 */
2708 ixgbevf_map_rings_to_vectors(adapter);
2709
2710 err = ixgbevf_up_complete(adapter);
2711 if (err)
2712 goto err_up;
2713
2714 /* clear any pending interrupts, may auto mask */
2715 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2716 err = ixgbevf_request_irq(adapter);
2717 if (err)
2718 goto err_req_irq;
2719
2720 ixgbevf_irq_enable(adapter, true, true);
2721
2722 return 0;
2723
2724err_req_irq:
2725 ixgbevf_down(adapter);
2726err_up:
2727 ixgbevf_free_irq(adapter);
2728err_setup_rx:
2729 ixgbevf_free_all_rx_resources(adapter);
2730err_setup_tx:
2731 ixgbevf_free_all_tx_resources(adapter);
2732 ixgbevf_reset(adapter);
2733
2734err_setup_reset:
2735
2736 return err;
2737}
2738
2739/**
2740 * ixgbevf_close - Disables a network interface
2741 * @netdev: network interface device structure
2742 *
2743 * Returns 0, this is not allowed to fail
2744 *
2745 * The close entry point is called when an interface is de-activated
2746 * by the OS. The hardware is still under the drivers control, but
2747 * needs to be disabled. A global MAC reset is issued to stop the
2748 * hardware, and all transmit and receive resources are freed.
2749 **/
2750static int ixgbevf_close(struct net_device *netdev)
2751{
2752 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2753
2754 ixgbevf_down(adapter);
2755 ixgbevf_free_irq(adapter);
2756
2757 ixgbevf_free_all_tx_resources(adapter);
2758 ixgbevf_free_all_rx_resources(adapter);
2759
2760 return 0;
2761}
2762
2763static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2764 struct ixgbevf_ring *tx_ring,
2765 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2766{
2767 struct ixgbe_adv_tx_context_desc *context_desc;
2768 unsigned int i;
2769 int err;
2770 struct ixgbevf_tx_buffer *tx_buffer_info;
2771 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2772 u32 mss_l4len_idx, l4len;
2773
2774 if (skb_is_gso(skb)) {
2775 if (skb_header_cloned(skb)) {
2776 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2777 if (err)
2778 return err;
2779 }
2780 l4len = tcp_hdrlen(skb);
2781 *hdr_len += l4len;
2782
2783 if (skb->protocol == htons(ETH_P_IP)) {
2784 struct iphdr *iph = ip_hdr(skb);
2785 iph->tot_len = 0;
2786 iph->check = 0;
2787 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2788 iph->daddr, 0,
2789 IPPROTO_TCP,
2790 0);
2791 adapter->hw_tso_ctxt++;
9010bc33 2792 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2793 ipv6_hdr(skb)->payload_len = 0;
2794 tcp_hdr(skb)->check =
2795 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2796 &ipv6_hdr(skb)->daddr,
2797 0, IPPROTO_TCP, 0);
2798 adapter->hw_tso6_ctxt++;
2799 }
2800
2801 i = tx_ring->next_to_use;
2802
2803 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2804 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2805
2806 /* VLAN MACLEN IPLEN */
2807 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2808 vlan_macip_lens |=
2809 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2810 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2811 IXGBE_ADVTXD_MACLEN_SHIFT);
2812 *hdr_len += skb_network_offset(skb);
2813 vlan_macip_lens |=
2814 (skb_transport_header(skb) - skb_network_header(skb));
2815 *hdr_len +=
2816 (skb_transport_header(skb) - skb_network_header(skb));
2817 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2818 context_desc->seqnum_seed = 0;
2819
2820 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2821 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2822 IXGBE_ADVTXD_DTYP_CTXT);
2823
2824 if (skb->protocol == htons(ETH_P_IP))
2825 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2826 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2827 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2828
2829 /* MSS L4LEN IDX */
2830 mss_l4len_idx =
2831 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2832 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2833 /* use index 1 for TSO */
2834 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2835 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2836
2837 tx_buffer_info->time_stamp = jiffies;
2838 tx_buffer_info->next_to_watch = i;
2839
2840 i++;
2841 if (i == tx_ring->count)
2842 i = 0;
2843 tx_ring->next_to_use = i;
2844
2845 return true;
2846 }
2847
2848 return false;
2849}
2850
2851static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2852 struct ixgbevf_ring *tx_ring,
2853 struct sk_buff *skb, u32 tx_flags)
2854{
2855 struct ixgbe_adv_tx_context_desc *context_desc;
2856 unsigned int i;
2857 struct ixgbevf_tx_buffer *tx_buffer_info;
2858 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2859
2860 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2861 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2862 i = tx_ring->next_to_use;
2863 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2864 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2865
2866 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2867 vlan_macip_lens |= (tx_flags &
2868 IXGBE_TX_FLAGS_VLAN_MASK);
2869 vlan_macip_lens |= (skb_network_offset(skb) <<
2870 IXGBE_ADVTXD_MACLEN_SHIFT);
2871 if (skb->ip_summed == CHECKSUM_PARTIAL)
2872 vlan_macip_lens |= (skb_transport_header(skb) -
2873 skb_network_header(skb));
2874
2875 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2876 context_desc->seqnum_seed = 0;
2877
2878 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2879 IXGBE_ADVTXD_DTYP_CTXT);
2880
2881 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2882 switch (skb->protocol) {
2883 case __constant_htons(ETH_P_IP):
2884 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2885 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2886 type_tucmd_mlhl |=
2887 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2888 break;
2889 case __constant_htons(ETH_P_IPV6):
2890 /* XXX what about other V6 headers?? */
2891 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2892 type_tucmd_mlhl |=
2893 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2894 break;
2895 default:
2896 if (unlikely(net_ratelimit())) {
2897 printk(KERN_WARNING
2898 "partial checksum but "
2899 "proto=%x!\n",
2900 skb->protocol);
2901 }
2902 break;
2903 }
2904 }
2905
2906 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2907 /* use index zero for tx checksum offload */
2908 context_desc->mss_l4len_idx = 0;
2909
2910 tx_buffer_info->time_stamp = jiffies;
2911 tx_buffer_info->next_to_watch = i;
2912
2913 adapter->hw_csum_tx_good++;
2914 i++;
2915 if (i == tx_ring->count)
2916 i = 0;
2917 tx_ring->next_to_use = i;
2918
2919 return true;
2920 }
2921
2922 return false;
2923}
2924
2925static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2926 struct ixgbevf_ring *tx_ring,
2927 struct sk_buff *skb, u32 tx_flags,
2928 unsigned int first)
2929{
2930 struct pci_dev *pdev = adapter->pdev;
2931 struct ixgbevf_tx_buffer *tx_buffer_info;
2932 unsigned int len;
2933 unsigned int total = skb->len;
2540ddb5
KV		 2934 unsigned int offset = 0, size;
2935 int count = 0;
92915f71
GR		 2936 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2937 unsigned int f;
65deeed7 2938 int i;
92915f71
GR		 2939
2940 i = tx_ring->next_to_use;
2941
2942 len = min(skb_headlen(skb), total);
2943 while (len) {
2944 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2945 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2946
2947 tx_buffer_info->length = size;
2948 tx_buffer_info->mapped_as_page = false;
2a1f8794 2949 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2950 skb->data + offset,
2a1f8794
NN		 2951 size, DMA_TO_DEVICE);
2952 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2953 goto dma_error;
2954 tx_buffer_info->time_stamp = jiffies;
2955 tx_buffer_info->next_to_watch = i;
2956
2957 len -= size;
2958 total -= size;
2959 offset += size;
2960 count++;
2961 i++;
2962 if (i == tx_ring->count)
2963 i = 0;
2964 }
2965
2966 for (f = 0; f < nr_frags; f++) {
2967 struct skb_frag_struct *frag;
2968
2969 frag = &skb_shinfo(skb)->frags[f];
2970 len = min((unsigned int)frag->size, total);
2971 offset = frag->page_offset;
2972
2973 while (len) {
2974 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2975 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2976
2977 tx_buffer_info->length = size;
2a1f8794 2978 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
92915f71
GR		 2979 frag->page,
2980 offset,
2981 size,
2a1f8794 2982 DMA_TO_DEVICE);
92915f71 2983 tx_buffer_info->mapped_as_page = true;
2a1f8794 2984 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2985 goto dma_error;
2986 tx_buffer_info->time_stamp = jiffies;
2987 tx_buffer_info->next_to_watch = i;
2988
2989 len -= size;
2990 total -= size;
2991 offset += size;
2992 count++;
2993 i++;
2994 if (i == tx_ring->count)
2995 i = 0;
2996 }
2997 if (total == 0)
2998 break;
2999 }
3000
3001 if (i == 0)
3002 i = tx_ring->count - 1;
3003 else
3004 i = i - 1;
3005 tx_ring->tx_buffer_info[i].skb = skb;
3006 tx_ring->tx_buffer_info[first].next_to_watch = i;
3007
3008 return count;
3009
3010dma_error:
3011 dev_err(&pdev->dev, "TX DMA map failed\n");
3012
3013 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3014 tx_buffer_info->dma = 0;
3015 tx_buffer_info->time_stamp = 0;
3016 tx_buffer_info->next_to_watch = 0;
3017 count--;
3018
3019 /* clear timestamp and dma mappings for remaining portion of packet */
3020 while (count >= 0) {
3021 count--;
3022 i--;
3023 if (i < 0)
3024 i += tx_ring->count;
3025 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3026 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3027 }
3028
3029 return count;
3030}
3031
3032static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3033 struct ixgbevf_ring *tx_ring, int tx_flags,
3034 int count, u32 paylen, u8 hdr_len)
3035{
3036 union ixgbe_adv_tx_desc *tx_desc = NULL;
3037 struct ixgbevf_tx_buffer *tx_buffer_info;
3038 u32 olinfo_status = 0, cmd_type_len = 0;
3039 unsigned int i;
3040
3041 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3042
3043 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3044
3045 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3046
3047 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3048 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3049
3050 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3051 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3052
3053 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3054 IXGBE_ADVTXD_POPTS_SHIFT;
3055
3056 /* use index 1 context for tso */
3057 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3058 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3059 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3060 IXGBE_ADVTXD_POPTS_SHIFT;
3061
3062 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3063 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3064 IXGBE_ADVTXD_POPTS_SHIFT;
3065
3066 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3067
3068 i = tx_ring->next_to_use;
3069 while (count--) {
3070 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3071 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3072 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3073 tx_desc->read.cmd_type_len =
3074 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3075 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3076 i++;
3077 if (i == tx_ring->count)
3078 i = 0;
3079 }
3080
3081 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3082
3083 /*
3084 * Force memory writes to complete before letting h/w
3085 * know there are new descriptors to fetch. (Only
3086 * applicable for weak-ordered memory model archs,
3087 * such as IA-64).
3088 */
3089 wmb();
3090
3091 tx_ring->next_to_use = i;
3092 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3093}
3094
3095static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3096 struct ixgbevf_ring *tx_ring, int size)
3097{
3098 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3099
3100 netif_stop_subqueue(netdev, tx_ring->queue_index);
3101 /* Herbert's original patch had:
3102 * smp_mb__after_netif_stop_queue();
3103 * but since that doesn't exist yet, just open code it. */
3104 smp_mb();
3105
3106 /* We need to check again in a case another CPU has just
3107 * made room available. */
3108 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3109 return -EBUSY;
3110
3111 /* A reprieve! - use start_queue because it doesn't call schedule */
3112 netif_start_subqueue(netdev, tx_ring->queue_index);
3113 ++adapter->restart_queue;
3114 return 0;
3115}
3116
3117static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3118 struct ixgbevf_ring *tx_ring, int size)
3119{
3120 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3121 return 0;
3122 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3123}
3124
3125static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3126{
3127 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3128 struct ixgbevf_ring *tx_ring;
3129 unsigned int first;
3130 unsigned int tx_flags = 0;
3131 u8 hdr_len = 0;
3132 int r_idx = 0, tso;
3133 int count = 0;
3134
3135 unsigned int f;
3136
3137 tx_ring = &adapter->tx_ring[r_idx];
3138
eab6d18d 3139 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 3140 tx_flags |= vlan_tx_tag_get(skb);
3141 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3142 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3143 }
3144
3145 /* four things can cause us to need a context descriptor */
3146 if (skb_is_gso(skb) ||
3147 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3148 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3149 count++;
3150
3151 count += TXD_USE_COUNT(skb_headlen(skb));
3152 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3153 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3154
3155 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3156 adapter->tx_busy++;
3157 return NETDEV_TX_BUSY;
3158 }
3159
3160 first = tx_ring->next_to_use;
3161
3162 if (skb->protocol == htons(ETH_P_IP))
3163 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3164 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3165 if (tso < 0) {
3166 dev_kfree_skb_any(skb);
3167 return NETDEV_TX_OK;
3168 }
3169
3170 if (tso)
3171 tx_flags |= IXGBE_TX_FLAGS_TSO;
3172 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3173 (skb->ip_summed == CHECKSUM_PARTIAL))
3174 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3175
3176 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3177 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3178 skb->len, hdr_len);
3179
92915f71
GR		 3180 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3181
3182 return NETDEV_TX_OK;
3183}
3184
92915f71
GR		 3185/**
3186 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3187 * @netdev: network interface device structure
3188 * @p: pointer to an address structure
3189 *
3190 * Returns 0 on success, negative on failure
3191 **/
3192static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3193{
3194 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3195 struct ixgbe_hw *hw = &adapter->hw;
3196 struct sockaddr *addr = p;
3197
3198 if (!is_valid_ether_addr(addr->sa_data))
3199 return -EADDRNOTAVAIL;
3200
3201 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3202 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3203
3204 if (hw->mac.ops.set_rar)
3205 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3206
3207 return 0;
3208}
3209
3210/**
3211 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3212 * @netdev: network interface device structure
3213 * @new_mtu: new value for maximum frame size
3214 *
3215 * Returns 0 on success, negative on failure
3216 **/
3217static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3218{
3219 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3220 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3221
3222 /* MTU < 68 is an error and causes problems on some kernels */
3223 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3224 return -EINVAL;
3225
3226 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3227 netdev->mtu, new_mtu);
3228 /* must set new MTU before calling down or up */
3229 netdev->mtu = new_mtu;
3230
3231 if (netif_running(netdev))
3232 ixgbevf_reinit_locked(adapter);
3233
3234 return 0;
3235}
3236
3237static void ixgbevf_shutdown(struct pci_dev *pdev)
3238{
3239 struct net_device *netdev = pci_get_drvdata(pdev);
3240 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3241
3242 netif_device_detach(netdev);
3243
3244 if (netif_running(netdev)) {
3245 ixgbevf_down(adapter);
3246 ixgbevf_free_irq(adapter);
3247 ixgbevf_free_all_tx_resources(adapter);
3248 ixgbevf_free_all_rx_resources(adapter);
3249 }
3250
3251#ifdef CONFIG_PM
3252 pci_save_state(pdev);
3253#endif
3254
3255 pci_disable_device(pdev);
3256}
3257
92915f71
GR		 3258static const struct net_device_ops ixgbe_netdev_ops = {
3259 .ndo_open = &ixgbevf_open,
3260 .ndo_stop = &ixgbevf_close,
3261 .ndo_start_xmit = &ixgbevf_xmit_frame,
92915f71
GR		 3262 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3263 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3264 .ndo_validate_addr = eth_validate_addr,
3265 .ndo_set_mac_address = &ixgbevf_set_mac,
3266 .ndo_change_mtu = &ixgbevf_change_mtu,
3267 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3268 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3269 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3270 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3271};
92915f71
GR		 3272
3273static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3274{
3275 struct ixgbevf_adapter *adapter;
3276 adapter = netdev_priv(dev);
92915f71 3277 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3278 ixgbevf_set_ethtool_ops(dev);
3279 dev->watchdog_timeo = 5 * HZ;
3280}
3281
3282/**
3283 * ixgbevf_probe - Device Initialization Routine
3284 * @pdev: PCI device information struct
3285 * @ent: entry in ixgbevf_pci_tbl
3286 *
3287 * Returns 0 on success, negative on failure
3288 *
3289 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3290 * The OS initialization, configuring of the adapter private structure,
3291 * and a hardware reset occur.
3292 **/
3293static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3294 const struct pci_device_id *ent)
3295{
3296 struct net_device *netdev;
3297 struct ixgbevf_adapter *adapter = NULL;
3298 struct ixgbe_hw *hw = NULL;
3299 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3300 static int cards_found;
3301 int err, pci_using_dac;
3302
3303 err = pci_enable_device(pdev);
3304 if (err)
3305 return err;
3306
2a1f8794
NN		 3307 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3308 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3309 pci_using_dac = 1;
3310 } else {
2a1f8794 3311 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3312 if (err) {
2a1f8794
NN		 3313 err = dma_set_coherent_mask(&pdev->dev,
3314 DMA_BIT_MASK(32));
92915f71
GR		 3315 if (err) {
3316 dev_err(&pdev->dev, "No usable DMA "
3317 "configuration, aborting\n");
3318 goto err_dma;
3319 }
3320 }
3321 pci_using_dac = 0;
3322 }
3323
3324 err = pci_request_regions(pdev, ixgbevf_driver_name);
3325 if (err) {
3326 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3327 goto err_pci_reg;
3328 }
3329
3330 pci_set_master(pdev);
3331
3332#ifdef HAVE_TX_MQ
3333 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3334 MAX_TX_QUEUES);
3335#else
3336 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3337#endif
3338 if (!netdev) {
3339 err = -ENOMEM;
3340 goto err_alloc_etherdev;
3341 }
3342
3343 SET_NETDEV_DEV(netdev, &pdev->dev);
3344
3345 pci_set_drvdata(pdev, netdev);
3346 adapter = netdev_priv(netdev);
3347
3348 adapter->netdev = netdev;
3349 adapter->pdev = pdev;
3350 hw = &adapter->hw;
3351 hw->back = adapter;
3352 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3353
3354 /*
3355 * call save state here in standalone driver because it relies on
3356 * adapter struct to exist, and needs to call netdev_priv
3357 */
3358 pci_save_state(pdev);
3359
3360 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3361 pci_resource_len(pdev, 0));
3362 if (!hw->hw_addr) {
3363 err = -EIO;
3364 goto err_ioremap;
3365 }
3366
3367 ixgbevf_assign_netdev_ops(netdev);
3368
3369 adapter->bd_number = cards_found;
3370
3371 /* Setup hw api */
3372 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3373 hw->mac.type = ii->mac;
3374
3375 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3376 sizeof(struct ixgbe_mac_operations));
3377
3378 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3379 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3380 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3381
3382 /* setup the private structure */
3383 err = ixgbevf_sw_init(adapter);
3384
92915f71
GR		 3385 netdev->features = NETIF_F_SG |
3386 NETIF_F_IP_CSUM |
3387 NETIF_F_HW_VLAN_TX |
3388 NETIF_F_HW_VLAN_RX |
3389 NETIF_F_HW_VLAN_FILTER;
3390
3391 netdev->features |= NETIF_F_IPV6_CSUM;
3392 netdev->features |= NETIF_F_TSO;
3393 netdev->features |= NETIF_F_TSO6;
e59d44df 3394 netdev->features |= NETIF_F_GRO;
92915f71
GR		 3395 netdev->vlan_features |= NETIF_F_TSO;
3396 netdev->vlan_features |= NETIF_F_TSO6;
3397 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3398 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3399 netdev->vlan_features |= NETIF_F_SG;
3400
3401 if (pci_using_dac)
3402 netdev->features |= NETIF_F_HIGHDMA;
3403
92915f71
GR		 3404 /* The HW MAC address was set and/or determined in sw_init */
3405 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3406 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3407
3408 if (!is_valid_ether_addr(netdev->dev_addr)) {
3409 printk(KERN_ERR "invalid MAC address\n");
3410 err = -EIO;
3411 goto err_sw_init;
3412 }
3413
3414 init_timer(&adapter->watchdog_timer);
c061b18d 3415 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3416 adapter->watchdog_timer.data = (unsigned long)adapter;
3417
3418 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3419 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3420
3421 err = ixgbevf_init_interrupt_scheme(adapter);
3422 if (err)
3423 goto err_sw_init;
3424
3425 /* pick up the PCI bus settings for reporting later */
3426 if (hw->mac.ops.get_bus_info)
3427 hw->mac.ops.get_bus_info(hw);
3428
92915f71
GR		 3429 strcpy(netdev->name, "eth%d");
3430
3431 err = register_netdev(netdev);
3432 if (err)
3433 goto err_register;
3434
3435 adapter->netdev_registered = true;
3436
5d426ad1
GR		 3437 netif_carrier_off(netdev);
3438
33bd9f60
GR		 3439 ixgbevf_init_last_counter_stats(adapter);
3440
92915f71
GR		 3441 /* print the MAC address */
3442 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3443 netdev->dev_addr[0],
3444 netdev->dev_addr[1],
3445 netdev->dev_addr[2],
3446 netdev->dev_addr[3],
3447 netdev->dev_addr[4],
3448 netdev->dev_addr[5]);
3449
3450 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3451
d6dbee86 3452 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3453
3454 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3455 cards_found++;
3456 return 0;
3457
3458err_register:
3459err_sw_init:
3460 ixgbevf_reset_interrupt_capability(adapter);
3461 iounmap(hw->hw_addr);
3462err_ioremap:
3463 free_netdev(netdev);
3464err_alloc_etherdev:
3465 pci_release_regions(pdev);
3466err_pci_reg:
3467err_dma:
3468 pci_disable_device(pdev);
3469 return err;
3470}
3471
3472/**
3473 * ixgbevf_remove - Device Removal Routine
3474 * @pdev: PCI device information struct
3475 *
3476 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3477 * that it should release a PCI device. The could be caused by a
3478 * Hot-Plug event, or because the driver is going to be removed from
3479 * memory.
3480 **/
3481static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3482{
3483 struct net_device *netdev = pci_get_drvdata(pdev);
3484 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3485
3486 set_bit(__IXGBEVF_DOWN, &adapter->state);
3487
3488 del_timer_sync(&adapter->watchdog_timer);
3489
23f333a2 3490 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3491 cancel_work_sync(&adapter->watchdog_task);
3492
92915f71
GR		 3493 if (adapter->netdev_registered) {
3494 unregister_netdev(netdev);
3495 adapter->netdev_registered = false;
3496 }
3497
3498 ixgbevf_reset_interrupt_capability(adapter);
3499
3500 iounmap(adapter->hw.hw_addr);
3501 pci_release_regions(pdev);
3502
3503 hw_dbg(&adapter->hw, "Remove complete\n");
3504
3505 kfree(adapter->tx_ring);
3506 kfree(adapter->rx_ring);
3507
3508 free_netdev(netdev);
3509
3510 pci_disable_device(pdev);
3511}
3512
3513static struct pci_driver ixgbevf_driver = {
3514 .name = ixgbevf_driver_name,
3515 .id_table = ixgbevf_pci_tbl,
3516 .probe = ixgbevf_probe,
3517 .remove = __devexit_p(ixgbevf_remove),
3518 .shutdown = ixgbevf_shutdown,
3519};
3520
3521/**
3522 * ixgbe_init_module - Driver Registration Routine
3523 *
3524 * ixgbe_init_module is the first routine called when the driver is
3525 * loaded. All it does is register with the PCI subsystem.
3526 **/
3527static int __init ixgbevf_init_module(void)
3528{
3529 int ret;
3530 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3531 ixgbevf_driver_version);
3532
3533 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3534
3535 ret = pci_register_driver(&ixgbevf_driver);
3536 return ret;
3537}
3538
3539module_init(ixgbevf_init_module);
3540
3541/**
3542 * ixgbe_exit_module - Driver Exit Cleanup Routine
3543 *
3544 * ixgbe_exit_module is called just before the driver is removed
3545 * from memory.
3546 **/
3547static void __exit ixgbevf_exit_module(void)
3548{
3549 pci_unregister_driver(&ixgbevf_driver);
3550}
3551
3552#ifdef DEBUG
3553/**
3554 * ixgbe_get_hw_dev_name - return device name string
3555 * used by hardware layer to print debugging information
3556 **/
3557char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3558{
3559 struct ixgbevf_adapter *adapter = hw->back;
3560 return adapter->netdev->name;
3561}
3562
3563#endif
3564module_exit(ixgbevf_exit_module);
3565
3566/* ixgbevf_main.c */
Linux kernel - Deliverables
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