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igb: convert to ndo_fix_features
[deliverable/linux.git] / drivers / net / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
66c87bd5 4 Copyright(c) 1999 - 2010 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
92915f71
GR		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
70c71606 47#include <linux/prefetch.h>
92915f71
GR		 48
49#include "ixgbevf.h"
50
51char ixgbevf_driver_name[] = "ixgbevf";
52static const char ixgbevf_driver_string[] =
422e05d1 53 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 54
1057c427 55#define DRV_VERSION "2.1.0-k"
92915f71 56const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5
GR		 57static char ixgbevf_copyright[] =
58 "Copyright (c) 2009 - 2010 Intel Corporation.";
92915f71
GR		 59
60static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 61 [board_82599_vf] = &ixgbevf_82599_vf_info,
62 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 63};
64
65/* ixgbevf_pci_tbl - PCI Device ID Table
66 *
67 * Wildcard entries (PCI_ANY_ID) should come last
68 * Last entry must be all 0s
69 *
70 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
71 * Class, Class Mask, private data (not used) }
72 */
73static struct pci_device_id ixgbevf_pci_tbl[] = {
74 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
75 board_82599_vf},
2316aa2a
GR		 76 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
77 board_X540_vf},
92915f71
GR		 78
79 /* required last entry */
80 {0, }
81};
82MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
83
84MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
85MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
86MODULE_LICENSE("GPL");
87MODULE_VERSION(DRV_VERSION);
88
89#define DEFAULT_DEBUG_LEVEL_SHIFT 3
90
91/* forward decls */
92static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
93static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
94 u32 itr_reg);
95
96static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
97 struct ixgbevf_ring *rx_ring,
98 u32 val)
99{
100 /*
101 * Force memory writes to complete before letting h/w
102 * know there are new descriptors to fetch. (Only
103 * applicable for weak-ordered memory model archs,
104 * such as IA-64).
105 */
106 wmb();
107 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
108}
109
110/*
65d676c8 111 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 112 * @adapter: pointer to adapter struct
113 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
114 * @queue: queue to map the corresponding interrupt to
115 * @msix_vector: the vector to map to the corresponding queue
116 *
117 */
118static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
119 u8 queue, u8 msix_vector)
120{
121 u32 ivar, index;
122 struct ixgbe_hw *hw = &adapter->hw;
123 if (direction == -1) {
124 /* other causes */
125 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
126 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
127 ivar &= ~0xFF;
128 ivar |= msix_vector;
129 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
130 } else {
131 /* tx or rx causes */
132 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
133 index = ((16 * (queue & 1)) + (8 * direction));
134 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
135 ivar &= ~(0xFF << index);
136 ivar |= (msix_vector << index);
137 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
138 }
139}
140
141static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
142 struct ixgbevf_tx_buffer
143 *tx_buffer_info)
144{
145 if (tx_buffer_info->dma) {
146 if (tx_buffer_info->mapped_as_page)
2a1f8794 147 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 148 tx_buffer_info->dma,
149 tx_buffer_info->length,
2a1f8794 150 DMA_TO_DEVICE);
92915f71 151 else
2a1f8794 152 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 153 tx_buffer_info->dma,
154 tx_buffer_info->length,
2a1f8794 155 DMA_TO_DEVICE);
92915f71
GR		 156 tx_buffer_info->dma = 0;
157 }
158 if (tx_buffer_info->skb) {
159 dev_kfree_skb_any(tx_buffer_info->skb);
160 tx_buffer_info->skb = NULL;
161 }
162 tx_buffer_info->time_stamp = 0;
163 /* tx_buffer_info must be completely set up in the transmit path */
164}
165
92915f71
GR		 166#define IXGBE_MAX_TXD_PWR 14
167#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
168
169/* Tx Descriptors needed, worst case */
170#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
171 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
172#ifdef MAX_SKB_FRAGS
173#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
174 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
175#else
176#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
177#endif
178
179static void ixgbevf_tx_timeout(struct net_device *netdev);
180
181/**
182 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
183 * @adapter: board private structure
184 * @tx_ring: tx ring to clean
185 **/
186static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
187 struct ixgbevf_ring *tx_ring)
188{
189 struct net_device *netdev = adapter->netdev;
190 struct ixgbe_hw *hw = &adapter->hw;
191 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
192 struct ixgbevf_tx_buffer *tx_buffer_info;
193 unsigned int i, eop, count = 0;
194 unsigned int total_bytes = 0, total_packets = 0;
195
196 i = tx_ring->next_to_clean;
197 eop = tx_ring->tx_buffer_info[i].next_to_watch;
198 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
199
200 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
201 (count < tx_ring->work_limit)) {
202 bool cleaned = false;
2d0bb1c1 203 rmb(); /* read buffer_info after eop_desc */
92915f71
GR		 204 for ( ; !cleaned; count++) {
205 struct sk_buff *skb;
206 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
207 tx_buffer_info = &tx_ring->tx_buffer_info[i];
208 cleaned = (i == eop);
209 skb = tx_buffer_info->skb;
210
211 if (cleaned && skb) {
212 unsigned int segs, bytecount;
213
214 /* gso_segs is currently only valid for tcp */
215 segs = skb_shinfo(skb)->gso_segs ?: 1;
216 /* multiply data chunks by size of headers */
217 bytecount = ((segs - 1) * skb_headlen(skb)) +
218 skb->len;
219 total_packets += segs;
220 total_bytes += bytecount;
221 }
222
223 ixgbevf_unmap_and_free_tx_resource(adapter,
224 tx_buffer_info);
225
226 tx_desc->wb.status = 0;
227
228 i++;
229 if (i == tx_ring->count)
230 i = 0;
231 }
232
233 eop = tx_ring->tx_buffer_info[i].next_to_watch;
234 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
235 }
236
237 tx_ring->next_to_clean = i;
238
239#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
240 if (unlikely(count && netif_carrier_ok(netdev) &&
241 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
242 /* Make sure that anybody stopping the queue after this
243 * sees the new next_to_clean.
244 */
245 smp_mb();
246#ifdef HAVE_TX_MQ
247 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
248 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
249 netif_wake_subqueue(netdev, tx_ring->queue_index);
250 ++adapter->restart_queue;
251 }
252#else
253 if (netif_queue_stopped(netdev) &&
254 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
255 netif_wake_queue(netdev);
256 ++adapter->restart_queue;
257 }
258#endif
259 }
260
92915f71
GR		 261 /* re-arm the interrupt */
262 if ((count >= tx_ring->work_limit) &&
263 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
264 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
265 }
266
267 tx_ring->total_bytes += total_bytes;
268 tx_ring->total_packets += total_packets;
269
fb621bac
ED		 270 netdev->stats.tx_bytes += total_bytes;
271 netdev->stats.tx_packets += total_packets;
92915f71 272
807540ba 273 return count < tx_ring->work_limit;
92915f71
GR		 274}
275
276/**
277 * ixgbevf_receive_skb - Send a completed packet up the stack
278 * @q_vector: structure containing interrupt and ring information
279 * @skb: packet to send up
280 * @status: hardware indication of status of receive
281 * @rx_ring: rx descriptor ring (for a specific queue) to setup
282 * @rx_desc: rx descriptor
283 **/
284static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
285 struct sk_buff *skb, u8 status,
286 struct ixgbevf_ring *ring,
287 union ixgbe_adv_rx_desc *rx_desc)
288{
289 struct ixgbevf_adapter *adapter = q_vector->adapter;
290 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
291 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
92915f71
GR		 292
293 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
294 if (adapter->vlgrp && is_vlan)
295 vlan_gro_receive(&q_vector->napi,
296 adapter->vlgrp,
297 tag, skb);
298 else
299 napi_gro_receive(&q_vector->napi, skb);
300 } else {
301 if (adapter->vlgrp && is_vlan)
c82a538e 302 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
92915f71 303 else
c82a538e 304 netif_rx(skb);
92915f71
GR		 305 }
306}
307
308/**
309 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
310 * @adapter: address of board private structure
311 * @status_err: hardware indication of status of receive
312 * @skb: skb currently being received and modified
313 **/
314static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
315 u32 status_err, struct sk_buff *skb)
316{
bc8acf2c 317 skb_checksum_none_assert(skb);
92915f71
GR		 318
319 /* Rx csum disabled */
320 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
321 return;
322
323 /* if IP and error */
324 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
325 (status_err & IXGBE_RXDADV_ERR_IPE)) {
326 adapter->hw_csum_rx_error++;
327 return;
328 }
329
330 if (!(status_err & IXGBE_RXD_STAT_L4CS))
331 return;
332
333 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
334 adapter->hw_csum_rx_error++;
335 return;
336 }
337
338 /* It must be a TCP or UDP packet with a valid checksum */
339 skb->ip_summed = CHECKSUM_UNNECESSARY;
340 adapter->hw_csum_rx_good++;
341}
342
343/**
344 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
345 * @adapter: address of board private structure
346 **/
347static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
348 struct ixgbevf_ring *rx_ring,
349 int cleaned_count)
350{
351 struct pci_dev *pdev = adapter->pdev;
352 union ixgbe_adv_rx_desc *rx_desc;
353 struct ixgbevf_rx_buffer *bi;
354 struct sk_buff *skb;
355 unsigned int i;
356 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
357
358 i = rx_ring->next_to_use;
359 bi = &rx_ring->rx_buffer_info[i];
360
361 while (cleaned_count--) {
362 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
363
364 if (!bi->page_dma &&
365 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
366 if (!bi->page) {
367 bi->page = netdev_alloc_page(adapter->netdev);
368 if (!bi->page) {
369 adapter->alloc_rx_page_failed++;
370 goto no_buffers;
371 }
372 bi->page_offset = 0;
373 } else {
374 /* use a half page if we're re-using */
375 bi->page_offset ^= (PAGE_SIZE / 2);
376 }
377
2a1f8794 378 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
92915f71
GR		 379 bi->page_offset,
380 (PAGE_SIZE / 2),
2a1f8794 381 DMA_FROM_DEVICE);
92915f71
GR		 382 }
383
384 skb = bi->skb;
385 if (!skb) {
386 skb = netdev_alloc_skb(adapter->netdev,
387 bufsz);
388
389 if (!skb) {
390 adapter->alloc_rx_buff_failed++;
391 goto no_buffers;
392 }
393
394 /*
395 * Make buffer alignment 2 beyond a 16 byte boundary
396 * this will result in a 16 byte aligned IP header after
397 * the 14 byte MAC header is removed
398 */
399 skb_reserve(skb, NET_IP_ALIGN);
400
401 bi->skb = skb;
402 }
403 if (!bi->dma) {
2a1f8794 404 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 405 rx_ring->rx_buf_len,
2a1f8794 406 DMA_FROM_DEVICE);
92915f71
GR		 407 }
408 /* Refresh the desc even if buffer_addrs didn't change because
409 * each write-back erases this info. */
410 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
411 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
412 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
413 } else {
414 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
415 }
416
417 i++;
418 if (i == rx_ring->count)
419 i = 0;
420 bi = &rx_ring->rx_buffer_info[i];
421 }
422
423no_buffers:
424 if (rx_ring->next_to_use != i) {
425 rx_ring->next_to_use = i;
426 if (i-- == 0)
427 i = (rx_ring->count - 1);
428
429 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
430 }
431}
432
433static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
434 u64 qmask)
435{
436 u32 mask;
437 struct ixgbe_hw *hw = &adapter->hw;
438
439 mask = (qmask & 0xFFFFFFFF);
440 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
441}
442
443static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
444{
445 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
446}
447
448static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
449{
450 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
451}
452
453static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
454 struct ixgbevf_ring *rx_ring,
455 int *work_done, int work_to_do)
456{
457 struct ixgbevf_adapter *adapter = q_vector->adapter;
458 struct pci_dev *pdev = adapter->pdev;
459 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
460 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
461 struct sk_buff *skb;
462 unsigned int i;
463 u32 len, staterr;
464 u16 hdr_info;
465 bool cleaned = false;
466 int cleaned_count = 0;
467 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
468
469 i = rx_ring->next_to_clean;
470 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
471 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
472 rx_buffer_info = &rx_ring->rx_buffer_info[i];
473
474 while (staterr & IXGBE_RXD_STAT_DD) {
475 u32 upper_len = 0;
476 if (*work_done >= work_to_do)
477 break;
478 (*work_done)++;
479
2d0bb1c1 480 rmb(); /* read descriptor and rx_buffer_info after status DD */
92915f71
GR		 481 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
482 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
483 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
484 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
485 if (hdr_info & IXGBE_RXDADV_SPH)
486 adapter->rx_hdr_split++;
487 if (len > IXGBEVF_RX_HDR_SIZE)
488 len = IXGBEVF_RX_HDR_SIZE;
489 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
490 } else {
491 len = le16_to_cpu(rx_desc->wb.upper.length);
492 }
493 cleaned = true;
494 skb = rx_buffer_info->skb;
495 prefetch(skb->data - NET_IP_ALIGN);
496 rx_buffer_info->skb = NULL;
497
498 if (rx_buffer_info->dma) {
2a1f8794 499 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 500 rx_ring->rx_buf_len,
2a1f8794 501 DMA_FROM_DEVICE);
92915f71
GR		 502 rx_buffer_info->dma = 0;
503 skb_put(skb, len);
504 }
505
506 if (upper_len) {
2a1f8794
NN		 507 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
508 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 509 rx_buffer_info->page_dma = 0;
510 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
511 rx_buffer_info->page,
512 rx_buffer_info->page_offset,
513 upper_len);
514
515 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
516 (page_count(rx_buffer_info->page) != 1))
517 rx_buffer_info->page = NULL;
518 else
519 get_page(rx_buffer_info->page);
520
521 skb->len += upper_len;
522 skb->data_len += upper_len;
523 skb->truesize += upper_len;
524 }
525
526 i++;
527 if (i == rx_ring->count)
528 i = 0;
529
530 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
531 prefetch(next_rxd);
532 cleaned_count++;
533
534 next_buffer = &rx_ring->rx_buffer_info[i];
535
536 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
537 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
538 rx_buffer_info->skb = next_buffer->skb;
539 rx_buffer_info->dma = next_buffer->dma;
540 next_buffer->skb = skb;
541 next_buffer->dma = 0;
542 } else {
543 skb->next = next_buffer->skb;
544 skb->next->prev = skb;
545 }
546 adapter->non_eop_descs++;
547 goto next_desc;
548 }
549
550 /* ERR_MASK will only have valid bits if EOP set */
551 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
552 dev_kfree_skb_irq(skb);
553 goto next_desc;
554 }
555
556 ixgbevf_rx_checksum(adapter, staterr, skb);
557
558 /* probably a little skewed due to removing CRC */
559 total_rx_bytes += skb->len;
560 total_rx_packets++;
561
562 /*
563 * Work around issue of some types of VM to VM loop back
564 * packets not getting split correctly
565 */
566 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 567 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 568 if (header_fixup_len < 14)
569 skb_push(skb, header_fixup_len);
570 }
571 skb->protocol = eth_type_trans(skb, adapter->netdev);
572
573 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 574
575next_desc:
576 rx_desc->wb.upper.status_error = 0;
577
578 /* return some buffers to hardware, one at a time is too slow */
579 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
580 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
581 cleaned_count);
582 cleaned_count = 0;
583 }
584
585 /* use prefetched values */
586 rx_desc = next_rxd;
587 rx_buffer_info = &rx_ring->rx_buffer_info[i];
588
589 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
590 }
591
592 rx_ring->next_to_clean = i;
593 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
594
595 if (cleaned_count)
596 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
597
598 rx_ring->total_packets += total_rx_packets;
599 rx_ring->total_bytes += total_rx_bytes;
fb621bac
ED		 600 adapter->netdev->stats.rx_bytes += total_rx_bytes;
601 adapter->netdev->stats.rx_packets += total_rx_packets;
92915f71
GR		 602
603 return cleaned;
604}
605
606/**
607 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
608 * @napi: napi struct with our devices info in it
609 * @budget: amount of work driver is allowed to do this pass, in packets
610 *
611 * This function is optimized for cleaning one queue only on a single
612 * q_vector!!!
613 **/
614static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
615{
616 struct ixgbevf_q_vector *q_vector =
617 container_of(napi, struct ixgbevf_q_vector, napi);
618 struct ixgbevf_adapter *adapter = q_vector->adapter;
619 struct ixgbevf_ring *rx_ring = NULL;
620 int work_done = 0;
621 long r_idx;
622
623 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
624 rx_ring = &(adapter->rx_ring[r_idx]);
625
626 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
627
628 /* If all Rx work done, exit the polling mode */
629 if (work_done < budget) {
630 napi_complete(napi);
631 if (adapter->itr_setting & 1)
632 ixgbevf_set_itr_msix(q_vector);
633 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
634 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
635 }
636
637 return work_done;
638}
639
640/**
641 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
642 * @napi: napi struct with our devices info in it
643 * @budget: amount of work driver is allowed to do this pass, in packets
644 *
645 * This function will clean more than one rx queue associated with a
646 * q_vector.
647 **/
648static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
649{
650 struct ixgbevf_q_vector *q_vector =
651 container_of(napi, struct ixgbevf_q_vector, napi);
652 struct ixgbevf_adapter *adapter = q_vector->adapter;
653 struct ixgbevf_ring *rx_ring = NULL;
654 int work_done = 0, i;
655 long r_idx;
656 u64 enable_mask = 0;
657
658 /* attempt to distribute budget to each queue fairly, but don't allow
659 * the budget to go below 1 because we'll exit polling */
660 budget /= (q_vector->rxr_count ?: 1);
661 budget = max(budget, 1);
662 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
663 for (i = 0; i < q_vector->rxr_count; i++) {
664 rx_ring = &(adapter->rx_ring[r_idx]);
665 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
666 enable_mask |= rx_ring->v_idx;
667 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
668 r_idx + 1);
669 }
670
671#ifndef HAVE_NETDEV_NAPI_LIST
672 if (!netif_running(adapter->netdev))
673 work_done = 0;
674
675#endif
676 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
677 rx_ring = &(adapter->rx_ring[r_idx]);
678
679 /* If all Rx work done, exit the polling mode */
680 if (work_done < budget) {
681 napi_complete(napi);
682 if (adapter->itr_setting & 1)
683 ixgbevf_set_itr_msix(q_vector);
684 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
685 ixgbevf_irq_enable_queues(adapter, enable_mask);
686 }
687
688 return work_done;
689}
690
691
692/**
693 * ixgbevf_configure_msix - Configure MSI-X hardware
694 * @adapter: board private structure
695 *
696 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
697 * interrupts.
698 **/
699static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
700{
701 struct ixgbevf_q_vector *q_vector;
702 struct ixgbe_hw *hw = &adapter->hw;
703 int i, j, q_vectors, v_idx, r_idx;
704 u32 mask;
705
706 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
707
708 /*
709 * Populate the IVAR table and set the ITR values to the
710 * corresponding register.
711 */
712 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
713 q_vector = adapter->q_vector[v_idx];
984b3f57 714 /* XXX for_each_set_bit(...) */
92915f71
GR		 715 r_idx = find_first_bit(q_vector->rxr_idx,
716 adapter->num_rx_queues);
717
718 for (i = 0; i < q_vector->rxr_count; i++) {
719 j = adapter->rx_ring[r_idx].reg_idx;
720 ixgbevf_set_ivar(adapter, 0, j, v_idx);
721 r_idx = find_next_bit(q_vector->rxr_idx,
722 adapter->num_rx_queues,
723 r_idx + 1);
724 }
725 r_idx = find_first_bit(q_vector->txr_idx,
726 adapter->num_tx_queues);
727
728 for (i = 0; i < q_vector->txr_count; i++) {
729 j = adapter->tx_ring[r_idx].reg_idx;
730 ixgbevf_set_ivar(adapter, 1, j, v_idx);
731 r_idx = find_next_bit(q_vector->txr_idx,
732 adapter->num_tx_queues,
733 r_idx + 1);
734 }
735
736 /* if this is a tx only vector halve the interrupt rate */
737 if (q_vector->txr_count && !q_vector->rxr_count)
738 q_vector->eitr = (adapter->eitr_param >> 1);
739 else if (q_vector->rxr_count)
740 /* rx only */
741 q_vector->eitr = adapter->eitr_param;
742
743 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
744 }
745
746 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
747
748 /* set up to autoclear timer, and the vectors */
749 mask = IXGBE_EIMS_ENABLE_MASK;
750 mask &= ~IXGBE_EIMS_OTHER;
751 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
752}
753
754enum latency_range {
755 lowest_latency = 0,
756 low_latency = 1,
757 bulk_latency = 2,
758 latency_invalid = 255
759};
760
761/**
762 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
763 * @adapter: pointer to adapter
764 * @eitr: eitr setting (ints per sec) to give last timeslice
765 * @itr_setting: current throttle rate in ints/second
766 * @packets: the number of packets during this measurement interval
767 * @bytes: the number of bytes during this measurement interval
768 *
769 * Stores a new ITR value based on packets and byte
770 * counts during the last interrupt. The advantage of per interrupt
771 * computation is faster updates and more accurate ITR for the current
772 * traffic pattern. Constants in this function were computed
773 * based on theoretical maximum wire speed and thresholds were set based
774 * on testing data as well as attempting to minimize response time
775 * while increasing bulk throughput.
776 **/
777static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
778 u32 eitr, u8 itr_setting,
779 int packets, int bytes)
780{
781 unsigned int retval = itr_setting;
782 u32 timepassed_us;
783 u64 bytes_perint;
784
785 if (packets == 0)
786 goto update_itr_done;
787
788
789 /* simple throttlerate management
790 * 0-20MB/s lowest (100000 ints/s)
791 * 20-100MB/s low (20000 ints/s)
792 * 100-1249MB/s bulk (8000 ints/s)
793 */
794 /* what was last interrupt timeslice? */
795 timepassed_us = 1000000/eitr;
796 bytes_perint = bytes / timepassed_us; /* bytes/usec */
797
798 switch (itr_setting) {
799 case lowest_latency:
800 if (bytes_perint > adapter->eitr_low)
801 retval = low_latency;
802 break;
803 case low_latency:
804 if (bytes_perint > adapter->eitr_high)
805 retval = bulk_latency;
806 else if (bytes_perint <= adapter->eitr_low)
807 retval = lowest_latency;
808 break;
809 case bulk_latency:
810 if (bytes_perint <= adapter->eitr_high)
811 retval = low_latency;
812 break;
813 }
814
815update_itr_done:
816 return retval;
817}
818
819/**
820 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
821 * @adapter: pointer to adapter struct
822 * @v_idx: vector index into q_vector array
823 * @itr_reg: new value to be written in *register* format, not ints/s
824 *
825 * This function is made to be called by ethtool and by the driver
826 * when it needs to update VTEITR registers at runtime. Hardware
827 * specific quirks/differences are taken care of here.
828 */
829static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
830 u32 itr_reg)
831{
832 struct ixgbe_hw *hw = &adapter->hw;
833
834 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
835
836 /*
837 * set the WDIS bit to not clear the timer bits and cause an
838 * immediate assertion of the interrupt
839 */
840 itr_reg |= IXGBE_EITR_CNT_WDIS;
841
842 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
843}
844
845static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
846{
847 struct ixgbevf_adapter *adapter = q_vector->adapter;
848 u32 new_itr;
849 u8 current_itr, ret_itr;
850 int i, r_idx, v_idx = q_vector->v_idx;
851 struct ixgbevf_ring *rx_ring, *tx_ring;
852
853 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
854 for (i = 0; i < q_vector->txr_count; i++) {
855 tx_ring = &(adapter->tx_ring[r_idx]);
856 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
857 q_vector->tx_itr,
858 tx_ring->total_packets,
859 tx_ring->total_bytes);
860 /* if the result for this queue would decrease interrupt
861 * rate for this vector then use that result */
862 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
863 q_vector->tx_itr - 1 : ret_itr);
864 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
865 r_idx + 1);
866 }
867
868 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
869 for (i = 0; i < q_vector->rxr_count; i++) {
870 rx_ring = &(adapter->rx_ring[r_idx]);
871 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
872 q_vector->rx_itr,
873 rx_ring->total_packets,
874 rx_ring->total_bytes);
875 /* if the result for this queue would decrease interrupt
876 * rate for this vector then use that result */
877 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
878 q_vector->rx_itr - 1 : ret_itr);
879 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
880 r_idx + 1);
881 }
882
883 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
884
885 switch (current_itr) {
886 /* counts and packets in update_itr are dependent on these numbers */
887 case lowest_latency:
888 new_itr = 100000;
889 break;
890 case low_latency:
891 new_itr = 20000; /* aka hwitr = ~200 */
892 break;
893 case bulk_latency:
894 default:
895 new_itr = 8000;
896 break;
897 }
898
899 if (new_itr != q_vector->eitr) {
900 u32 itr_reg;
901
902 /* save the algorithm value here, not the smoothed one */
903 q_vector->eitr = new_itr;
904 /* do an exponential smoothing */
905 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
906 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
907 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
908 }
92915f71
GR		 909}
910
911static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
912{
913 struct net_device *netdev = data;
914 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
915 struct ixgbe_hw *hw = &adapter->hw;
916 u32 eicr;
a9ee25a2 917 u32 msg;
92915f71
GR		 918
919 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
920 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
921
08259594
GR		 922 if (!hw->mbx.ops.check_for_ack(hw)) {
923 /*
924 * checking for the ack clears the PFACK bit. Place
925 * it back in the v2p_mailbox cache so that anyone
926 * polling for an ack will not miss it. Also
927 * avoid the read below because the code to read
928 * the mailbox will also clear the ack bit. This was
929 * causing lost acks. Just cache the bit and exit
930 * the IRQ handler.
931 */
932 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
933 goto out;
934 }
935
936 /* Not an ack interrupt, go ahead and read the message */
a9ee25a2
GR		 937 hw->mbx.ops.read(hw, &msg, 1);
938
939 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
940 mod_timer(&adapter->watchdog_timer,
4c3a8223 941 round_jiffies(jiffies + 1));
a9ee25a2 942
08259594 943out:
92915f71
GR		 944 return IRQ_HANDLED;
945}
946
947static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
948{
949 struct ixgbevf_q_vector *q_vector = data;
950 struct ixgbevf_adapter *adapter = q_vector->adapter;
951 struct ixgbevf_ring *tx_ring;
952 int i, r_idx;
953
954 if (!q_vector->txr_count)
955 return IRQ_HANDLED;
956
957 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
958 for (i = 0; i < q_vector->txr_count; i++) {
959 tx_ring = &(adapter->tx_ring[r_idx]);
960 tx_ring->total_bytes = 0;
961 tx_ring->total_packets = 0;
962 ixgbevf_clean_tx_irq(adapter, tx_ring);
963 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
964 r_idx + 1);
965 }
966
967 if (adapter->itr_setting & 1)
968 ixgbevf_set_itr_msix(q_vector);
969
970 return IRQ_HANDLED;
971}
972
973/**
65d676c8 974 * ixgbevf_msix_clean_rx - single unshared vector rx clean (all queues)
92915f71
GR		 975 * @irq: unused
976 * @data: pointer to our q_vector struct for this interrupt vector
977 **/
978static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
979{
980 struct ixgbevf_q_vector *q_vector = data;
981 struct ixgbevf_adapter *adapter = q_vector->adapter;
982 struct ixgbe_hw *hw = &adapter->hw;
983 struct ixgbevf_ring *rx_ring;
984 int r_idx;
985 int i;
986
987 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
988 for (i = 0; i < q_vector->rxr_count; i++) {
989 rx_ring = &(adapter->rx_ring[r_idx]);
990 rx_ring->total_bytes = 0;
991 rx_ring->total_packets = 0;
992 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
993 r_idx + 1);
994 }
995
996 if (!q_vector->rxr_count)
997 return IRQ_HANDLED;
998
999 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1000 rx_ring = &(adapter->rx_ring[r_idx]);
1001 /* disable interrupts on this vector only */
1002 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1003 napi_schedule(&q_vector->napi);
1004
1005
1006 return IRQ_HANDLED;
1007}
1008
1009static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1010{
1011 ixgbevf_msix_clean_rx(irq, data);
1012 ixgbevf_msix_clean_tx(irq, data);
1013
1014 return IRQ_HANDLED;
1015}
1016
1017static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1018 int r_idx)
1019{
1020 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1021
1022 set_bit(r_idx, q_vector->rxr_idx);
1023 q_vector->rxr_count++;
1024 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1025}
1026
1027static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1028 int t_idx)
1029{
1030 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1031
1032 set_bit(t_idx, q_vector->txr_idx);
1033 q_vector->txr_count++;
1034 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1035}
1036
1037/**
1038 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1039 * @adapter: board private structure to initialize
1040 *
1041 * This function maps descriptor rings to the queue-specific vectors
1042 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1043 * one vector per ring/queue, but on a constrained vector budget, we
1044 * group the rings as "efficiently" as possible. You would add new
1045 * mapping configurations in here.
1046 **/
1047static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1048{
1049 int q_vectors;
1050 int v_start = 0;
1051 int rxr_idx = 0, txr_idx = 0;
1052 int rxr_remaining = adapter->num_rx_queues;
1053 int txr_remaining = adapter->num_tx_queues;
1054 int i, j;
1055 int rqpv, tqpv;
1056 int err = 0;
1057
1058 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1059
1060 /*
1061 * The ideal configuration...
1062 * We have enough vectors to map one per queue.
1063 */
1064 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1065 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1066 map_vector_to_rxq(adapter, v_start, rxr_idx);
1067
1068 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1069 map_vector_to_txq(adapter, v_start, txr_idx);
1070 goto out;
1071 }
1072
1073 /*
1074 * If we don't have enough vectors for a 1-to-1
1075 * mapping, we'll have to group them so there are
1076 * multiple queues per vector.
1077 */
1078 /* Re-adjusting *qpv takes care of the remainder. */
1079 for (i = v_start; i < q_vectors; i++) {
1080 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1081 for (j = 0; j < rqpv; j++) {
1082 map_vector_to_rxq(adapter, i, rxr_idx);
1083 rxr_idx++;
1084 rxr_remaining--;
1085 }
1086 }
1087 for (i = v_start; i < q_vectors; i++) {
1088 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1089 for (j = 0; j < tqpv; j++) {
1090 map_vector_to_txq(adapter, i, txr_idx);
1091 txr_idx++;
1092 txr_remaining--;
1093 }
1094 }
1095
1096out:
1097 return err;
1098}
1099
1100/**
1101 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1102 * @adapter: board private structure
1103 *
1104 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1105 * interrupts from the kernel.
1106 **/
1107static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1108{
1109 struct net_device *netdev = adapter->netdev;
1110 irqreturn_t (*handler)(int, void *);
1111 int i, vector, q_vectors, err;
1112 int ri = 0, ti = 0;
1113
1114 /* Decrement for Other and TCP Timer vectors */
1115 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1116
1117#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1118 ? &ixgbevf_msix_clean_many : \
1119 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1120 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1121 NULL)
1122 for (vector = 0; vector < q_vectors; vector++) {
1123 handler = SET_HANDLER(adapter->q_vector[vector]);
1124
1125 if (handler == &ixgbevf_msix_clean_rx) {
1126 sprintf(adapter->name[vector], "%s-%s-%d",
1127 netdev->name, "rx", ri++);
1128 } else if (handler == &ixgbevf_msix_clean_tx) {
1129 sprintf(adapter->name[vector], "%s-%s-%d",
1130 netdev->name, "tx", ti++);
1131 } else if (handler == &ixgbevf_msix_clean_many) {
1132 sprintf(adapter->name[vector], "%s-%s-%d",
1133 netdev->name, "TxRx", vector);
1134 } else {
1135 /* skip this unused q_vector */
1136 continue;
1137 }
1138 err = request_irq(adapter->msix_entries[vector].vector,
1139 handler, 0, adapter->name[vector],
1140 adapter->q_vector[vector]);
1141 if (err) {
1142 hw_dbg(&adapter->hw,
1143 "request_irq failed for MSIX interrupt "
1144 "Error: %d\n", err);
1145 goto free_queue_irqs;
1146 }
1147 }
1148
1149 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1150 err = request_irq(adapter->msix_entries[vector].vector,
1151 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1152 if (err) {
1153 hw_dbg(&adapter->hw,
1154 "request_irq for msix_mbx failed: %d\n", err);
1155 goto free_queue_irqs;
1156 }
1157
1158 return 0;
1159
1160free_queue_irqs:
1161 for (i = vector - 1; i >= 0; i--)
1162 free_irq(adapter->msix_entries[--vector].vector,
1163 &(adapter->q_vector[i]));
1164 pci_disable_msix(adapter->pdev);
1165 kfree(adapter->msix_entries);
1166 adapter->msix_entries = NULL;
1167 return err;
1168}
1169
1170static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1171{
1172 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1173
1174 for (i = 0; i < q_vectors; i++) {
1175 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1176 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1177 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1178 q_vector->rxr_count = 0;
1179 q_vector->txr_count = 0;
1180 q_vector->eitr = adapter->eitr_param;
1181 }
1182}
1183
1184/**
1185 * ixgbevf_request_irq - initialize interrupts
1186 * @adapter: board private structure
1187 *
1188 * Attempts to configure interrupts using the best available
1189 * capabilities of the hardware and kernel.
1190 **/
1191static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1192{
1193 int err = 0;
1194
1195 err = ixgbevf_request_msix_irqs(adapter);
1196
1197 if (err)
1198 hw_dbg(&adapter->hw,
1199 "request_irq failed, Error %d\n", err);
1200
1201 return err;
1202}
1203
1204static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1205{
1206 struct net_device *netdev = adapter->netdev;
1207 int i, q_vectors;
1208
1209 q_vectors = adapter->num_msix_vectors;
1210
1211 i = q_vectors - 1;
1212
1213 free_irq(adapter->msix_entries[i].vector, netdev);
1214 i--;
1215
1216 for (; i >= 0; i--) {
1217 free_irq(adapter->msix_entries[i].vector,
1218 adapter->q_vector[i]);
1219 }
1220
1221 ixgbevf_reset_q_vectors(adapter);
1222}
1223
1224/**
1225 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1226 * @adapter: board private structure
1227 **/
1228static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1229{
1230 int i;
1231 struct ixgbe_hw *hw = &adapter->hw;
1232
1233 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1234
1235 IXGBE_WRITE_FLUSH(hw);
1236
1237 for (i = 0; i < adapter->num_msix_vectors; i++)
1238 synchronize_irq(adapter->msix_entries[i].vector);
1239}
1240
1241/**
1242 * ixgbevf_irq_enable - Enable default interrupt generation settings
1243 * @adapter: board private structure
1244 **/
1245static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1246 bool queues, bool flush)
1247{
1248 struct ixgbe_hw *hw = &adapter->hw;
1249 u32 mask;
1250 u64 qmask;
1251
1252 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1253 qmask = ~0;
1254
1255 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1256
1257 if (queues)
1258 ixgbevf_irq_enable_queues(adapter, qmask);
1259
1260 if (flush)
1261 IXGBE_WRITE_FLUSH(hw);
1262}
1263
1264/**
1265 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1266 * @adapter: board private structure
1267 *
1268 * Configure the Tx unit of the MAC after a reset.
1269 **/
1270static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1271{
1272 u64 tdba;
1273 struct ixgbe_hw *hw = &adapter->hw;
1274 u32 i, j, tdlen, txctrl;
1275
1276 /* Setup the HW Tx Head and Tail descriptor pointers */
1277 for (i = 0; i < adapter->num_tx_queues; i++) {
1278 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1279 j = ring->reg_idx;
1280 tdba = ring->dma;
1281 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1282 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1283 (tdba & DMA_BIT_MASK(32)));
1284 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1285 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1286 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1287 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1288 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1289 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1290 /* Disable Tx Head Writeback RO bit, since this hoses
1291 * bookkeeping if things aren't delivered in order.
1292 */
1293 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1294 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1295 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1296 }
1297}
1298
1299#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1300
1301static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1302{
1303 struct ixgbevf_ring *rx_ring;
1304 struct ixgbe_hw *hw = &adapter->hw;
1305 u32 srrctl;
1306
1307 rx_ring = &adapter->rx_ring[index];
1308
1309 srrctl = IXGBE_SRRCTL_DROP_EN;
1310
1311 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1312 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1313 /* grow the amount we can receive on large page machines */
1314 if (bufsz < (PAGE_SIZE / 2))
1315 bufsz = (PAGE_SIZE / 2);
1316 /* cap the bufsz at our largest descriptor size */
1317 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1318
1319 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1320 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1321 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1322 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1323 IXGBE_SRRCTL_BSIZEHDR_MASK);
1324 } else {
1325 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1326
1327 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1328 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1329 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1330 else
1331 srrctl |= rx_ring->rx_buf_len >>
1332 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1333 }
1334 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1335}
1336
1337/**
1338 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1339 * @adapter: board private structure
1340 *
1341 * Configure the Rx unit of the MAC after a reset.
1342 **/
1343static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1344{
1345 u64 rdba;
1346 struct ixgbe_hw *hw = &adapter->hw;
1347 struct net_device *netdev = adapter->netdev;
1348 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1349 int i, j;
1350 u32 rdlen;
1351 int rx_buf_len;
1352
1353 /* Decide whether to use packet split mode or not */
1354 if (netdev->mtu > ETH_DATA_LEN) {
1355 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1356 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1357 else
1358 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1359 } else {
1360 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1361 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1362 else
1363 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1364 }
1365
1366 /* Set the RX buffer length according to the mode */
1367 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1368 /* PSRTYPE must be initialized in 82599 */
1369 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1370 IXGBE_PSRTYPE_UDPHDR |
1371 IXGBE_PSRTYPE_IPV4HDR |
1372 IXGBE_PSRTYPE_IPV6HDR |
1373 IXGBE_PSRTYPE_L2HDR;
1374 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1375 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1376 } else {
1377 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1378 if (netdev->mtu <= ETH_DATA_LEN)
1379 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1380 else
1381 rx_buf_len = ALIGN(max_frame, 1024);
1382 }
1383
1384 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1385 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1386 * the Base and Length of the Rx Descriptor Ring */
1387 for (i = 0; i < adapter->num_rx_queues; i++) {
1388 rdba = adapter->rx_ring[i].dma;
1389 j = adapter->rx_ring[i].reg_idx;
1390 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1391 (rdba & DMA_BIT_MASK(32)));
1392 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1393 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1394 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1395 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1396 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1397 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1398 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1399
1400 ixgbevf_configure_srrctl(adapter, j);
1401 }
1402}
1403
1404static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1405 struct vlan_group *grp)
1406{
1407 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1408 struct ixgbe_hw *hw = &adapter->hw;
1409 int i, j;
1410 u32 ctrl;
1411
1412 adapter->vlgrp = grp;
1413
1414 for (i = 0; i < adapter->num_rx_queues; i++) {
1415 j = adapter->rx_ring[i].reg_idx;
1416 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1417 ctrl |= IXGBE_RXDCTL_VME;
1418 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1419 }
1420}
1421
1422static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1423{
1424 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1425 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1426
1427 /* add VID to filter table */
1428 if (hw->mac.ops.set_vfta)
1429 hw->mac.ops.set_vfta(hw, vid, 0, true);
92915f71
GR		 1430}
1431
1432static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1433{
1434 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1435 struct ixgbe_hw *hw = &adapter->hw;
1436
1437 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1438 ixgbevf_irq_disable(adapter);
1439
1440 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1441
1442 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1443 ixgbevf_irq_enable(adapter, true, true);
1444
1445 /* remove VID from filter table */
1446 if (hw->mac.ops.set_vfta)
1447 hw->mac.ops.set_vfta(hw, vid, 0, false);
1448}
1449
1450static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1451{
1452 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1453
1454 if (adapter->vlgrp) {
1455 u16 vid;
b738127d 1456 for (vid = 0; vid < VLAN_N_VID; vid++) {
92915f71
GR		 1457 if (!vlan_group_get_device(adapter->vlgrp, vid))
1458 continue;
1459 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1460 }
1461 }
1462}
1463
46ec20ff
GR		 1464static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1465{
1466 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1467 struct ixgbe_hw *hw = &adapter->hw;
1468 int count = 0;
1469
1470 if ((netdev_uc_count(netdev)) > 10) {
1471 printk(KERN_ERR "Too many unicast filters - No Space\n");
1472 return -ENOSPC;
1473 }
1474
1475 if (!netdev_uc_empty(netdev)) {
1476 struct netdev_hw_addr *ha;
1477 netdev_for_each_uc_addr(ha, netdev) {
1478 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1479 udelay(200);
1480 }
1481 } else {
1482 /*
1483 * If the list is empty then send message to PF driver to
1484 * clear all macvlans on this VF.
1485 */
1486 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1487 }
1488
1489 return count;
1490}
1491
92915f71
GR		 1492/**
1493 * ixgbevf_set_rx_mode - Multicast set
1494 * @netdev: network interface device structure
1495 *
1496 * The set_rx_method entry point is called whenever the multicast address
1497 * list or the network interface flags are updated. This routine is
1498 * responsible for configuring the hardware for proper multicast mode.
1499 **/
1500static void ixgbevf_set_rx_mode(struct net_device *netdev)
1501{
1502 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1503 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1504
1505 /* reprogram multicast list */
92915f71 1506 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1507 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1508
1509 ixgbevf_write_uc_addr_list(netdev);
92915f71
GR		 1510}
1511
1512static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1513{
1514 int q_idx;
1515 struct ixgbevf_q_vector *q_vector;
1516 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1517
1518 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1519 struct napi_struct *napi;
1520 q_vector = adapter->q_vector[q_idx];
1521 if (!q_vector->rxr_count)
1522 continue;
1523 napi = &q_vector->napi;
1524 if (q_vector->rxr_count > 1)
1525 napi->poll = &ixgbevf_clean_rxonly_many;
1526
1527 napi_enable(napi);
1528 }
1529}
1530
1531static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1532{
1533 int q_idx;
1534 struct ixgbevf_q_vector *q_vector;
1535 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1536
1537 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1538 q_vector = adapter->q_vector[q_idx];
1539 if (!q_vector->rxr_count)
1540 continue;
1541 napi_disable(&q_vector->napi);
1542 }
1543}
1544
1545static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1546{
1547 struct net_device *netdev = adapter->netdev;
1548 int i;
1549
1550 ixgbevf_set_rx_mode(netdev);
1551
1552 ixgbevf_restore_vlan(adapter);
1553
1554 ixgbevf_configure_tx(adapter);
1555 ixgbevf_configure_rx(adapter);
1556 for (i = 0; i < adapter->num_rx_queues; i++) {
1557 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1558 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1559 ring->next_to_use = ring->count - 1;
1560 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1561 }
1562}
1563
1564#define IXGBE_MAX_RX_DESC_POLL 10
1565static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1566 int rxr)
1567{
1568 struct ixgbe_hw *hw = &adapter->hw;
1569 int j = adapter->rx_ring[rxr].reg_idx;
1570 int k;
1571
1572 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1573 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1574 break;
1575 else
1576 msleep(1);
1577 }
1578 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1579 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1580 "not set within the polling period\n", rxr);
1581 }
1582
1583 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1584 (adapter->rx_ring[rxr].count - 1));
1585}
1586
33bd9f60
GR		 1587static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1588{
1589 /* Only save pre-reset stats if there are some */
1590 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1591 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1592 adapter->stats.base_vfgprc;
1593 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1594 adapter->stats.base_vfgptc;
1595 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1596 adapter->stats.base_vfgorc;
1597 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1598 adapter->stats.base_vfgotc;
1599 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1600 adapter->stats.base_vfmprc;
1601 }
1602}
1603
1604static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1605{
1606 struct ixgbe_hw *hw = &adapter->hw;
1607
1608 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1609 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1610 adapter->stats.last_vfgorc |=
1611 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1612 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1613 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1614 adapter->stats.last_vfgotc |=
1615 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1616 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1617
1618 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1619 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1620 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1621 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1622 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1623}
1624
92915f71
GR		 1625static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1626{
1627 struct net_device *netdev = adapter->netdev;
1628 struct ixgbe_hw *hw = &adapter->hw;
1629 int i, j = 0;
1630 int num_rx_rings = adapter->num_rx_queues;
1631 u32 txdctl, rxdctl;
1632
1633 for (i = 0; i < adapter->num_tx_queues; i++) {
1634 j = adapter->tx_ring[i].reg_idx;
1635 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1636 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1637 txdctl |= (8 << 16);
1638 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1639 }
1640
1641 for (i = 0; i < adapter->num_tx_queues; i++) {
1642 j = adapter->tx_ring[i].reg_idx;
1643 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1644 txdctl |= IXGBE_TXDCTL_ENABLE;
1645 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1646 }
1647
1648 for (i = 0; i < num_rx_rings; i++) {
1649 j = adapter->rx_ring[i].reg_idx;
1650 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1651 rxdctl |= IXGBE_RXDCTL_ENABLE;
69bfbec4
GR		 1652 if (hw->mac.type == ixgbe_mac_X540_vf) {
1653 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1654 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1655 IXGBE_RXDCTL_RLPML_EN);
1656 }
92915f71
GR		 1657 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1658 ixgbevf_rx_desc_queue_enable(adapter, i);
1659 }
1660
1661 ixgbevf_configure_msix(adapter);
1662
1663 if (hw->mac.ops.set_rar) {
1664 if (is_valid_ether_addr(hw->mac.addr))
1665 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1666 else
1667 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1668 }
1669
1670 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1671 ixgbevf_napi_enable_all(adapter);
1672
1673 /* enable transmits */
1674 netif_tx_start_all_queues(netdev);
1675
33bd9f60
GR		 1676 ixgbevf_save_reset_stats(adapter);
1677 ixgbevf_init_last_counter_stats(adapter);
1678
92915f71
GR		 1679 /* bring the link up in the watchdog, this could race with our first
1680 * link up interrupt but shouldn't be a problem */
1681 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1682 adapter->link_check_timeout = jiffies;
1683 mod_timer(&adapter->watchdog_timer, jiffies);
1684 return 0;
1685}
1686
1687int ixgbevf_up(struct ixgbevf_adapter *adapter)
1688{
1689 int err;
1690 struct ixgbe_hw *hw = &adapter->hw;
1691
1692 ixgbevf_configure(adapter);
1693
1694 err = ixgbevf_up_complete(adapter);
1695
1696 /* clear any pending interrupts, may auto mask */
1697 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1698
1699 ixgbevf_irq_enable(adapter, true, true);
1700
1701 return err;
1702}
1703
1704/**
1705 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1706 * @adapter: board private structure
1707 * @rx_ring: ring to free buffers from
1708 **/
1709static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1710 struct ixgbevf_ring *rx_ring)
1711{
1712 struct pci_dev *pdev = adapter->pdev;
1713 unsigned long size;
1714 unsigned int i;
1715
c0456c23
GR		 1716 if (!rx_ring->rx_buffer_info)
1717 return;
92915f71 1718
c0456c23 1719 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1720 for (i = 0; i < rx_ring->count; i++) {
1721 struct ixgbevf_rx_buffer *rx_buffer_info;
1722
1723 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1724 if (rx_buffer_info->dma) {
2a1f8794 1725 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1726 rx_ring->rx_buf_len,
2a1f8794 1727 DMA_FROM_DEVICE);
92915f71
GR		 1728 rx_buffer_info->dma = 0;
1729 }
1730 if (rx_buffer_info->skb) {
1731 struct sk_buff *skb = rx_buffer_info->skb;
1732 rx_buffer_info->skb = NULL;
1733 do {
1734 struct sk_buff *this = skb;
1735 skb = skb->prev;
1736 dev_kfree_skb(this);
1737 } while (skb);
1738 }
1739 if (!rx_buffer_info->page)
1740 continue;
2a1f8794
NN		 1741 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1742 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 1743 rx_buffer_info->page_dma = 0;
1744 put_page(rx_buffer_info->page);
1745 rx_buffer_info->page = NULL;
1746 rx_buffer_info->page_offset = 0;
1747 }
1748
1749 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1750 memset(rx_ring->rx_buffer_info, 0, size);
1751
1752 /* Zero out the descriptor ring */
1753 memset(rx_ring->desc, 0, rx_ring->size);
1754
1755 rx_ring->next_to_clean = 0;
1756 rx_ring->next_to_use = 0;
1757
1758 if (rx_ring->head)
1759 writel(0, adapter->hw.hw_addr + rx_ring->head);
1760 if (rx_ring->tail)
1761 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1762}
1763
1764/**
1765 * ixgbevf_clean_tx_ring - Free Tx Buffers
1766 * @adapter: board private structure
1767 * @tx_ring: ring to be cleaned
1768 **/
1769static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1770 struct ixgbevf_ring *tx_ring)
1771{
1772 struct ixgbevf_tx_buffer *tx_buffer_info;
1773 unsigned long size;
1774 unsigned int i;
1775
c0456c23
GR		 1776 if (!tx_ring->tx_buffer_info)
1777 return;
1778
92915f71
GR		 1779 /* Free all the Tx ring sk_buffs */
1780
1781 for (i = 0; i < tx_ring->count; i++) {
1782 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1783 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1784 }
1785
1786 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1787 memset(tx_ring->tx_buffer_info, 0, size);
1788
1789 memset(tx_ring->desc, 0, tx_ring->size);
1790
1791 tx_ring->next_to_use = 0;
1792 tx_ring->next_to_clean = 0;
1793
1794 if (tx_ring->head)
1795 writel(0, adapter->hw.hw_addr + tx_ring->head);
1796 if (tx_ring->tail)
1797 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1798}
1799
1800/**
1801 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1802 * @adapter: board private structure
1803 **/
1804static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1805{
1806 int i;
1807
1808 for (i = 0; i < adapter->num_rx_queues; i++)
1809 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1810}
1811
1812/**
1813 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1814 * @adapter: board private structure
1815 **/
1816static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1817{
1818 int i;
1819
1820 for (i = 0; i < adapter->num_tx_queues; i++)
1821 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1822}
1823
1824void ixgbevf_down(struct ixgbevf_adapter *adapter)
1825{
1826 struct net_device *netdev = adapter->netdev;
1827 struct ixgbe_hw *hw = &adapter->hw;
1828 u32 txdctl;
1829 int i, j;
1830
1831 /* signal that we are down to the interrupt handler */
1832 set_bit(__IXGBEVF_DOWN, &adapter->state);
1833 /* disable receives */
1834
1835 netif_tx_disable(netdev);
1836
1837 msleep(10);
1838
1839 netif_tx_stop_all_queues(netdev);
1840
1841 ixgbevf_irq_disable(adapter);
1842
1843 ixgbevf_napi_disable_all(adapter);
1844
1845 del_timer_sync(&adapter->watchdog_timer);
1846 /* can't call flush scheduled work here because it can deadlock
1847 * if linkwatch_event tries to acquire the rtnl_lock which we are
1848 * holding */
1849 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1850 msleep(1);
1851
1852 /* disable transmits in the hardware now that interrupts are off */
1853 for (i = 0; i < adapter->num_tx_queues; i++) {
1854 j = adapter->tx_ring[i].reg_idx;
1855 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1856 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1857 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1858 }
1859
1860 netif_carrier_off(netdev);
1861
1862 if (!pci_channel_offline(adapter->pdev))
1863 ixgbevf_reset(adapter);
1864
1865 ixgbevf_clean_all_tx_rings(adapter);
1866 ixgbevf_clean_all_rx_rings(adapter);
1867}
1868
1869void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1870{
c0456c23
GR		 1871 struct ixgbe_hw *hw = &adapter->hw;
1872
92915f71 1873 WARN_ON(in_interrupt());
c0456c23 1874
92915f71
GR		 1875 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1876 msleep(1);
1877
c0456c23
GR		 1878 /*
1879 * Check if PF is up before re-init. If not then skip until
1880 * later when the PF is up and ready to service requests from
1881 * the VF via mailbox. If the VF is up and running then the
1882 * watchdog task will continue to schedule reset tasks until
1883 * the PF is up and running.
1884 */
1885 if (!hw->mac.ops.reset_hw(hw)) {
1886 ixgbevf_down(adapter);
1887 ixgbevf_up(adapter);
1888 }
92915f71
GR		 1889
1890 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1891}
1892
1893void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1894{
1895 struct ixgbe_hw *hw = &adapter->hw;
1896 struct net_device *netdev = adapter->netdev;
1897
1898 if (hw->mac.ops.reset_hw(hw))
1899 hw_dbg(hw, "PF still resetting\n");
1900 else
1901 hw->mac.ops.init_hw(hw);
1902
1903 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1904 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1905 netdev->addr_len);
1906 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1907 netdev->addr_len);
1908 }
1909}
1910
1911static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1912 int vectors)
1913{
1914 int err, vector_threshold;
1915
1916 /* We'll want at least 3 (vector_threshold):
1917 * 1) TxQ[0] Cleanup
1918 * 2) RxQ[0] Cleanup
1919 * 3) Other (Link Status Change, etc.)
1920 */
1921 vector_threshold = MIN_MSIX_COUNT;
1922
1923 /* The more we get, the more we will assign to Tx/Rx Cleanup
1924 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1925 * Right now, we simply care about how many we'll get; we'll
1926 * set them up later while requesting irq's.
1927 */
1928 while (vectors >= vector_threshold) {
1929 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1930 vectors);
1931 if (!err) /* Success in acquiring all requested vectors. */
1932 break;
1933 else if (err < 0)
1934 vectors = 0; /* Nasty failure, quit now */
1935 else /* err == number of vectors we should try again with */
1936 vectors = err;
1937 }
1938
1939 if (vectors < vector_threshold) {
1940 /* Can't allocate enough MSI-X interrupts? Oh well.
1941 * This just means we'll go with either a single MSI
1942 * vector or fall back to legacy interrupts.
1943 */
1944 hw_dbg(&adapter->hw,
1945 "Unable to allocate MSI-X interrupts\n");
1946 kfree(adapter->msix_entries);
1947 adapter->msix_entries = NULL;
1948 } else {
1949 /*
1950 * Adjust for only the vectors we'll use, which is minimum
1951 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1952 * vectors we were allocated.
1953 */
1954 adapter->num_msix_vectors = vectors;
1955 }
1956}
1957
1958/*
25985edc 1959 * ixgbevf_set_num_queues: Allocate queues for device, feature dependent
92915f71
GR		 1960 * @adapter: board private structure to initialize
1961 *
1962 * This is the top level queue allocation routine. The order here is very
1963 * important, starting with the "most" number of features turned on at once,
1964 * and ending with the smallest set of features. This way large combinations
1965 * can be allocated if they're turned on, and smaller combinations are the
1966 * fallthrough conditions.
1967 *
1968 **/
1969static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1970{
1971 /* Start with base case */
1972 adapter->num_rx_queues = 1;
1973 adapter->num_tx_queues = 1;
1974 adapter->num_rx_pools = adapter->num_rx_queues;
1975 adapter->num_rx_queues_per_pool = 1;
1976}
1977
1978/**
1979 * ixgbevf_alloc_queues - Allocate memory for all rings
1980 * @adapter: board private structure to initialize
1981 *
1982 * We allocate one ring per queue at run-time since we don't know the
1983 * number of queues at compile-time. The polling_netdev array is
1984 * intended for Multiqueue, but should work fine with a single queue.
1985 **/
1986static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1987{
1988 int i;
1989
1990 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1991 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1992 if (!adapter->tx_ring)
1993 goto err_tx_ring_allocation;
1994
1995 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1996 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1997 if (!adapter->rx_ring)
1998 goto err_rx_ring_allocation;
1999
2000 for (i = 0; i < adapter->num_tx_queues; i++) {
2001 adapter->tx_ring[i].count = adapter->tx_ring_count;
2002 adapter->tx_ring[i].queue_index = i;
2003 adapter->tx_ring[i].reg_idx = i;
2004 }
2005
2006 for (i = 0; i < adapter->num_rx_queues; i++) {
2007 adapter->rx_ring[i].count = adapter->rx_ring_count;
2008 adapter->rx_ring[i].queue_index = i;
2009 adapter->rx_ring[i].reg_idx = i;
2010 }
2011
2012 return 0;
2013
2014err_rx_ring_allocation:
2015 kfree(adapter->tx_ring);
2016err_tx_ring_allocation:
2017 return -ENOMEM;
2018}
2019
2020/**
2021 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2022 * @adapter: board private structure to initialize
2023 *
2024 * Attempt to configure the interrupts using the best available
2025 * capabilities of the hardware and the kernel.
2026 **/
2027static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2028{
2029 int err = 0;
2030 int vector, v_budget;
2031
2032 /*
2033 * It's easy to be greedy for MSI-X vectors, but it really
2034 * doesn't do us much good if we have a lot more vectors
2035 * than CPU's. So let's be conservative and only ask for
2036 * (roughly) twice the number of vectors as there are CPU's.
2037 */
2038 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2039 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2040
2041 /* A failure in MSI-X entry allocation isn't fatal, but it does
2042 * mean we disable MSI-X capabilities of the adapter. */
2043 adapter->msix_entries = kcalloc(v_budget,
2044 sizeof(struct msix_entry), GFP_KERNEL);
2045 if (!adapter->msix_entries) {
2046 err = -ENOMEM;
2047 goto out;
2048 }
2049
2050 for (vector = 0; vector < v_budget; vector++)
2051 adapter->msix_entries[vector].entry = vector;
2052
2053 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2054
2055out:
2056 return err;
2057}
2058
2059/**
2060 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2061 * @adapter: board private structure to initialize
2062 *
2063 * We allocate one q_vector per queue interrupt. If allocation fails we
2064 * return -ENOMEM.
2065 **/
2066static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2067{
2068 int q_idx, num_q_vectors;
2069 struct ixgbevf_q_vector *q_vector;
2070 int napi_vectors;
2071 int (*poll)(struct napi_struct *, int);
2072
2073 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2074 napi_vectors = adapter->num_rx_queues;
2075 poll = &ixgbevf_clean_rxonly;
2076
2077 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2078 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2079 if (!q_vector)
2080 goto err_out;
2081 q_vector->adapter = adapter;
2082 q_vector->v_idx = q_idx;
2083 q_vector->eitr = adapter->eitr_param;
2084 if (q_idx < napi_vectors)
2085 netif_napi_add(adapter->netdev, &q_vector->napi,
2086 (*poll), 64);
2087 adapter->q_vector[q_idx] = q_vector;
2088 }
2089
2090 return 0;
2091
2092err_out:
2093 while (q_idx) {
2094 q_idx--;
2095 q_vector = adapter->q_vector[q_idx];
2096 netif_napi_del(&q_vector->napi);
2097 kfree(q_vector);
2098 adapter->q_vector[q_idx] = NULL;
2099 }
2100 return -ENOMEM;
2101}
2102
2103/**
2104 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2105 * @adapter: board private structure to initialize
2106 *
2107 * This function frees the memory allocated to the q_vectors. In addition if
2108 * NAPI is enabled it will delete any references to the NAPI struct prior
2109 * to freeing the q_vector.
2110 **/
2111static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2112{
2113 int q_idx, num_q_vectors;
2114 int napi_vectors;
2115
2116 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2117 napi_vectors = adapter->num_rx_queues;
2118
2119 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2120 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2121
2122 adapter->q_vector[q_idx] = NULL;
2123 if (q_idx < napi_vectors)
2124 netif_napi_del(&q_vector->napi);
2125 kfree(q_vector);
2126 }
2127}
2128
2129/**
2130 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2131 * @adapter: board private structure
2132 *
2133 **/
2134static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2135{
2136 pci_disable_msix(adapter->pdev);
2137 kfree(adapter->msix_entries);
2138 adapter->msix_entries = NULL;
92915f71
GR		 2139}
2140
2141/**
2142 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2143 * @adapter: board private structure to initialize
2144 *
2145 **/
2146static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2147{
2148 int err;
2149
2150 /* Number of supported queues */
2151 ixgbevf_set_num_queues(adapter);
2152
2153 err = ixgbevf_set_interrupt_capability(adapter);
2154 if (err) {
2155 hw_dbg(&adapter->hw,
2156 "Unable to setup interrupt capabilities\n");
2157 goto err_set_interrupt;
2158 }
2159
2160 err = ixgbevf_alloc_q_vectors(adapter);
2161 if (err) {
2162 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2163 "vectors\n");
2164 goto err_alloc_q_vectors;
2165 }
2166
2167 err = ixgbevf_alloc_queues(adapter);
2168 if (err) {
2169 printk(KERN_ERR "Unable to allocate memory for queues\n");
2170 goto err_alloc_queues;
2171 }
2172
2173 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2174 "Tx Queue count = %u\n",
2175 (adapter->num_rx_queues > 1) ? "Enabled" :
2176 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2177
2178 set_bit(__IXGBEVF_DOWN, &adapter->state);
2179
2180 return 0;
2181err_alloc_queues:
2182 ixgbevf_free_q_vectors(adapter);
2183err_alloc_q_vectors:
2184 ixgbevf_reset_interrupt_capability(adapter);
2185err_set_interrupt:
2186 return err;
2187}
2188
2189/**
2190 * ixgbevf_sw_init - Initialize general software structures
2191 * (struct ixgbevf_adapter)
2192 * @adapter: board private structure to initialize
2193 *
2194 * ixgbevf_sw_init initializes the Adapter private data structure.
2195 * Fields are initialized based on PCI device information and
2196 * OS network device settings (MTU size).
2197 **/
2198static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2199{
2200 struct ixgbe_hw *hw = &adapter->hw;
2201 struct pci_dev *pdev = adapter->pdev;
2202 int err;
2203
2204 /* PCI config space info */
2205
2206 hw->vendor_id = pdev->vendor;
2207 hw->device_id = pdev->device;
ff938e43 2208 hw->revision_id = pdev->revision;
92915f71
GR		 2209 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2210 hw->subsystem_device_id = pdev->subsystem_device;
2211
2212 hw->mbx.ops.init_params(hw);
2213 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2214 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2215 err = hw->mac.ops.reset_hw(hw);
2216 if (err) {
2217 dev_info(&pdev->dev,
2218 "PF still in reset state, assigning new address\n");
2c6952df 2219 dev_hw_addr_random(adapter->netdev, hw->mac.addr);
92915f71
GR		 2220 } else {
2221 err = hw->mac.ops.init_hw(hw);
2222 if (err) {
2223 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2224 goto out;
2225 }
2226 }
2227
2228 /* Enable dynamic interrupt throttling rates */
2229 adapter->eitr_param = 20000;
2230 adapter->itr_setting = 1;
2231
2232 /* set defaults for eitr in MegaBytes */
2233 adapter->eitr_low = 10;
2234 adapter->eitr_high = 20;
2235
2236 /* set default ring sizes */
2237 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2238 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2239
2240 /* enable rx csum by default */
2241 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2242
2243 set_bit(__IXGBEVF_DOWN, &adapter->state);
2244
2245out:
2246 return err;
2247}
2248
92915f71
GR		 2249#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2250 { \
2251 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2252 if (current_counter < last_counter) \
2253 counter += 0x100000000LL; \
2254 last_counter = current_counter; \
2255 counter &= 0xFFFFFFFF00000000LL; \
2256 counter |= current_counter; \
2257 }
2258
2259#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2260 { \
2261 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2262 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2263 u64 current_counter = (current_counter_msb << 32) | \
2264 current_counter_lsb; \
2265 if (current_counter < last_counter) \
2266 counter += 0x1000000000LL; \
2267 last_counter = current_counter; \
2268 counter &= 0xFFFFFFF000000000LL; \
2269 counter |= current_counter; \
2270 }
2271/**
2272 * ixgbevf_update_stats - Update the board statistics counters.
2273 * @adapter: board private structure
2274 **/
2275void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2276{
2277 struct ixgbe_hw *hw = &adapter->hw;
2278
2279 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2280 adapter->stats.vfgprc);
2281 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2282 adapter->stats.vfgptc);
2283 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2284 adapter->stats.last_vfgorc,
2285 adapter->stats.vfgorc);
2286 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2287 adapter->stats.last_vfgotc,
2288 adapter->stats.vfgotc);
2289 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2290 adapter->stats.vfmprc);
2291
2292 /* Fill out the OS statistics structure */
fb621bac 2293 adapter->netdev->stats.multicast = adapter->stats.vfmprc -
92915f71
GR		 2294 adapter->stats.base_vfmprc;
2295}
2296
2297/**
2298 * ixgbevf_watchdog - Timer Call-back
2299 * @data: pointer to adapter cast into an unsigned long
2300 **/
2301static void ixgbevf_watchdog(unsigned long data)
2302{
2303 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2304 struct ixgbe_hw *hw = &adapter->hw;
2305 u64 eics = 0;
2306 int i;
2307
2308 /*
2309 * Do the watchdog outside of interrupt context due to the lovely
2310 * delays that some of the newer hardware requires
2311 */
2312
2313 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2314 goto watchdog_short_circuit;
2315
2316 /* get one bit for every active tx/rx interrupt vector */
2317 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2318 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2319 if (qv->rxr_count || qv->txr_count)
2320 eics |= (1 << i);
2321 }
2322
2323 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2324
2325watchdog_short_circuit:
2326 schedule_work(&adapter->watchdog_task);
2327}
2328
2329/**
2330 * ixgbevf_tx_timeout - Respond to a Tx Hang
2331 * @netdev: network interface device structure
2332 **/
2333static void ixgbevf_tx_timeout(struct net_device *netdev)
2334{
2335 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2336
2337 /* Do the reset outside of interrupt context */
2338 schedule_work(&adapter->reset_task);
2339}
2340
2341static void ixgbevf_reset_task(struct work_struct *work)
2342{
2343 struct ixgbevf_adapter *adapter;
2344 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2345
2346 /* If we're already down or resetting, just bail */
2347 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2348 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2349 return;
2350
2351 adapter->tx_timeout_count++;
2352
2353 ixgbevf_reinit_locked(adapter);
2354}
2355
2356/**
2357 * ixgbevf_watchdog_task - worker thread to bring link up
2358 * @work: pointer to work_struct containing our data
2359 **/
2360static void ixgbevf_watchdog_task(struct work_struct *work)
2361{
2362 struct ixgbevf_adapter *adapter = container_of(work,
2363 struct ixgbevf_adapter,
2364 watchdog_task);
2365 struct net_device *netdev = adapter->netdev;
2366 struct ixgbe_hw *hw = &adapter->hw;
2367 u32 link_speed = adapter->link_speed;
2368 bool link_up = adapter->link_up;
2369
2370 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2371
2372 /*
2373 * Always check the link on the watchdog because we have
2374 * no LSC interrupt
2375 */
2376 if (hw->mac.ops.check_link) {
2377 if ((hw->mac.ops.check_link(hw, &link_speed,
2378 &link_up, false)) != 0) {
2379 adapter->link_up = link_up;
2380 adapter->link_speed = link_speed;
da6b3330
GR		 2381 netif_carrier_off(netdev);
2382 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2383 schedule_work(&adapter->reset_task);
2384 goto pf_has_reset;
2385 }
2386 } else {
2387 /* always assume link is up, if no check link
2388 * function */
2389 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2390 link_up = true;
2391 }
2392 adapter->link_up = link_up;
2393 adapter->link_speed = link_speed;
2394
2395 if (link_up) {
2396 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2397 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2398 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2399 10 : 1);
92915f71
GR		 2400 netif_carrier_on(netdev);
2401 netif_tx_wake_all_queues(netdev);
92915f71
GR		 2402 }
2403 } else {
2404 adapter->link_up = false;
2405 adapter->link_speed = 0;
2406 if (netif_carrier_ok(netdev)) {
2407 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2408 netif_carrier_off(netdev);
2409 netif_tx_stop_all_queues(netdev);
2410 }
2411 }
2412
92915f71
GR		 2413 ixgbevf_update_stats(adapter);
2414
33bd9f60 2415pf_has_reset:
92915f71
GR		 2416 /* Reset the timer */
2417 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2418 mod_timer(&adapter->watchdog_timer,
2419 round_jiffies(jiffies + (2 * HZ)));
2420
2421 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2422}
2423
2424/**
2425 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2426 * @adapter: board private structure
2427 * @tx_ring: Tx descriptor ring for a specific queue
2428 *
2429 * Free all transmit software resources
2430 **/
2431void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2432 struct ixgbevf_ring *tx_ring)
2433{
2434 struct pci_dev *pdev = adapter->pdev;
2435
92915f71
GR		 2436 ixgbevf_clean_tx_ring(adapter, tx_ring);
2437
2438 vfree(tx_ring->tx_buffer_info);
2439 tx_ring->tx_buffer_info = NULL;
2440
2a1f8794
NN		 2441 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2442 tx_ring->dma);
92915f71
GR		 2443
2444 tx_ring->desc = NULL;
2445}
2446
2447/**
2448 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2449 * @adapter: board private structure
2450 *
2451 * Free all transmit software resources
2452 **/
2453static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2454{
2455 int i;
2456
2457 for (i = 0; i < adapter->num_tx_queues; i++)
2458 if (adapter->tx_ring[i].desc)
2459 ixgbevf_free_tx_resources(adapter,
2460 &adapter->tx_ring[i]);
2461
2462}
2463
2464/**
2465 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2466 * @adapter: board private structure
2467 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2468 *
2469 * Return 0 on success, negative on failure
2470 **/
2471int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2472 struct ixgbevf_ring *tx_ring)
2473{
2474 struct pci_dev *pdev = adapter->pdev;
2475 int size;
2476
2477 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2478 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2479 if (!tx_ring->tx_buffer_info)
2480 goto err;
92915f71
GR		 2481
2482 /* round up to nearest 4K */
2483 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2484 tx_ring->size = ALIGN(tx_ring->size, 4096);
2485
2a1f8794
NN		 2486 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2487 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2488 if (!tx_ring->desc)
2489 goto err;
2490
2491 tx_ring->next_to_use = 0;
2492 tx_ring->next_to_clean = 0;
2493 tx_ring->work_limit = tx_ring->count;
2494 return 0;
2495
2496err:
2497 vfree(tx_ring->tx_buffer_info);
2498 tx_ring->tx_buffer_info = NULL;
2499 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2500 "descriptor ring\n");
2501 return -ENOMEM;
2502}
2503
2504/**
2505 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2506 * @adapter: board private structure
2507 *
2508 * If this function returns with an error, then it's possible one or
2509 * more of the rings is populated (while the rest are not). It is the
2510 * callers duty to clean those orphaned rings.
2511 *
2512 * Return 0 on success, negative on failure
2513 **/
2514static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2515{
2516 int i, err = 0;
2517
2518 for (i = 0; i < adapter->num_tx_queues; i++) {
2519 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2520 if (!err)
2521 continue;
2522 hw_dbg(&adapter->hw,
2523 "Allocation for Tx Queue %u failed\n", i);
2524 break;
2525 }
2526
2527 return err;
2528}
2529
2530/**
2531 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2532 * @adapter: board private structure
2533 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2534 *
2535 * Returns 0 on success, negative on failure
2536 **/
2537int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2538 struct ixgbevf_ring *rx_ring)
2539{
2540 struct pci_dev *pdev = adapter->pdev;
2541 int size;
2542
2543 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2544 rx_ring->rx_buffer_info = vzalloc(size);
92915f71
GR		 2545 if (!rx_ring->rx_buffer_info) {
2546 hw_dbg(&adapter->hw,
2547 "Unable to vmalloc buffer memory for "
2548 "the receive descriptor ring\n");
2549 goto alloc_failed;
2550 }
92915f71
GR		 2551
2552 /* Round up to nearest 4K */
2553 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2554 rx_ring->size = ALIGN(rx_ring->size, 4096);
2555
2a1f8794
NN		 2556 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2557 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2558
2559 if (!rx_ring->desc) {
2560 hw_dbg(&adapter->hw,
2561 "Unable to allocate memory for "
2562 "the receive descriptor ring\n");
2563 vfree(rx_ring->rx_buffer_info);
2564 rx_ring->rx_buffer_info = NULL;
2565 goto alloc_failed;
2566 }
2567
2568 rx_ring->next_to_clean = 0;
2569 rx_ring->next_to_use = 0;
2570
2571 return 0;
2572alloc_failed:
2573 return -ENOMEM;
2574}
2575
2576/**
2577 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2578 * @adapter: board private structure
2579 *
2580 * If this function returns with an error, then it's possible one or
2581 * more of the rings is populated (while the rest are not). It is the
2582 * callers duty to clean those orphaned rings.
2583 *
2584 * Return 0 on success, negative on failure
2585 **/
2586static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2587{
2588 int i, err = 0;
2589
2590 for (i = 0; i < adapter->num_rx_queues; i++) {
2591 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2592 if (!err)
2593 continue;
2594 hw_dbg(&adapter->hw,
2595 "Allocation for Rx Queue %u failed\n", i);
2596 break;
2597 }
2598 return err;
2599}
2600
2601/**
2602 * ixgbevf_free_rx_resources - Free Rx Resources
2603 * @adapter: board private structure
2604 * @rx_ring: ring to clean the resources from
2605 *
2606 * Free all receive software resources
2607 **/
2608void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2609 struct ixgbevf_ring *rx_ring)
2610{
2611 struct pci_dev *pdev = adapter->pdev;
2612
2613 ixgbevf_clean_rx_ring(adapter, rx_ring);
2614
2615 vfree(rx_ring->rx_buffer_info);
2616 rx_ring->rx_buffer_info = NULL;
2617
2a1f8794
NN		 2618 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2619 rx_ring->dma);
92915f71
GR		 2620
2621 rx_ring->desc = NULL;
2622}
2623
2624/**
2625 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2626 * @adapter: board private structure
2627 *
2628 * Free all receive software resources
2629 **/
2630static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2631{
2632 int i;
2633
2634 for (i = 0; i < adapter->num_rx_queues; i++)
2635 if (adapter->rx_ring[i].desc)
2636 ixgbevf_free_rx_resources(adapter,
2637 &adapter->rx_ring[i]);
2638}
2639
2640/**
2641 * ixgbevf_open - Called when a network interface is made active
2642 * @netdev: network interface device structure
2643 *
2644 * Returns 0 on success, negative value on failure
2645 *
2646 * The open entry point is called when a network interface is made
2647 * active by the system (IFF_UP). At this point all resources needed
2648 * for transmit and receive operations are allocated, the interrupt
2649 * handler is registered with the OS, the watchdog timer is started,
2650 * and the stack is notified that the interface is ready.
2651 **/
2652static int ixgbevf_open(struct net_device *netdev)
2653{
2654 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2655 struct ixgbe_hw *hw = &adapter->hw;
2656 int err;
2657
2658 /* disallow open during test */
2659 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2660 return -EBUSY;
2661
2662 if (hw->adapter_stopped) {
2663 ixgbevf_reset(adapter);
2664 /* if adapter is still stopped then PF isn't up and
2665 * the vf can't start. */
2666 if (hw->adapter_stopped) {
2667 err = IXGBE_ERR_MBX;
2668 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2669 " Driver isn't up yet\n");
92915f71
GR		 2670 goto err_setup_reset;
2671 }
2672 }
2673
2674 /* allocate transmit descriptors */
2675 err = ixgbevf_setup_all_tx_resources(adapter);
2676 if (err)
2677 goto err_setup_tx;
2678
2679 /* allocate receive descriptors */
2680 err = ixgbevf_setup_all_rx_resources(adapter);
2681 if (err)
2682 goto err_setup_rx;
2683
2684 ixgbevf_configure(adapter);
2685
2686 /*
2687 * Map the Tx/Rx rings to the vectors we were allotted.
2688 * if request_irq will be called in this function map_rings
2689 * must be called *before* up_complete
2690 */
2691 ixgbevf_map_rings_to_vectors(adapter);
2692
2693 err = ixgbevf_up_complete(adapter);
2694 if (err)
2695 goto err_up;
2696
2697 /* clear any pending interrupts, may auto mask */
2698 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2699 err = ixgbevf_request_irq(adapter);
2700 if (err)
2701 goto err_req_irq;
2702
2703 ixgbevf_irq_enable(adapter, true, true);
2704
2705 return 0;
2706
2707err_req_irq:
2708 ixgbevf_down(adapter);
2709err_up:
2710 ixgbevf_free_irq(adapter);
2711err_setup_rx:
2712 ixgbevf_free_all_rx_resources(adapter);
2713err_setup_tx:
2714 ixgbevf_free_all_tx_resources(adapter);
2715 ixgbevf_reset(adapter);
2716
2717err_setup_reset:
2718
2719 return err;
2720}
2721
2722/**
2723 * ixgbevf_close - Disables a network interface
2724 * @netdev: network interface device structure
2725 *
2726 * Returns 0, this is not allowed to fail
2727 *
2728 * The close entry point is called when an interface is de-activated
2729 * by the OS. The hardware is still under the drivers control, but
2730 * needs to be disabled. A global MAC reset is issued to stop the
2731 * hardware, and all transmit and receive resources are freed.
2732 **/
2733static int ixgbevf_close(struct net_device *netdev)
2734{
2735 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2736
2737 ixgbevf_down(adapter);
2738 ixgbevf_free_irq(adapter);
2739
2740 ixgbevf_free_all_tx_resources(adapter);
2741 ixgbevf_free_all_rx_resources(adapter);
2742
2743 return 0;
2744}
2745
2746static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2747 struct ixgbevf_ring *tx_ring,
2748 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2749{
2750 struct ixgbe_adv_tx_context_desc *context_desc;
2751 unsigned int i;
2752 int err;
2753 struct ixgbevf_tx_buffer *tx_buffer_info;
2754 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2755 u32 mss_l4len_idx, l4len;
2756
2757 if (skb_is_gso(skb)) {
2758 if (skb_header_cloned(skb)) {
2759 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2760 if (err)
2761 return err;
2762 }
2763 l4len = tcp_hdrlen(skb);
2764 *hdr_len += l4len;
2765
2766 if (skb->protocol == htons(ETH_P_IP)) {
2767 struct iphdr *iph = ip_hdr(skb);
2768 iph->tot_len = 0;
2769 iph->check = 0;
2770 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2771 iph->daddr, 0,
2772 IPPROTO_TCP,
2773 0);
2774 adapter->hw_tso_ctxt++;
9010bc33 2775 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2776 ipv6_hdr(skb)->payload_len = 0;
2777 tcp_hdr(skb)->check =
2778 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2779 &ipv6_hdr(skb)->daddr,
2780 0, IPPROTO_TCP, 0);
2781 adapter->hw_tso6_ctxt++;
2782 }
2783
2784 i = tx_ring->next_to_use;
2785
2786 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2787 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2788
2789 /* VLAN MACLEN IPLEN */
2790 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2791 vlan_macip_lens |=
2792 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2793 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2794 IXGBE_ADVTXD_MACLEN_SHIFT);
2795 *hdr_len += skb_network_offset(skb);
2796 vlan_macip_lens |=
2797 (skb_transport_header(skb) - skb_network_header(skb));
2798 *hdr_len +=
2799 (skb_transport_header(skb) - skb_network_header(skb));
2800 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2801 context_desc->seqnum_seed = 0;
2802
2803 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2804 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2805 IXGBE_ADVTXD_DTYP_CTXT);
2806
2807 if (skb->protocol == htons(ETH_P_IP))
2808 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2809 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2810 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2811
2812 /* MSS L4LEN IDX */
2813 mss_l4len_idx =
2814 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2815 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2816 /* use index 1 for TSO */
2817 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2818 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2819
2820 tx_buffer_info->time_stamp = jiffies;
2821 tx_buffer_info->next_to_watch = i;
2822
2823 i++;
2824 if (i == tx_ring->count)
2825 i = 0;
2826 tx_ring->next_to_use = i;
2827
2828 return true;
2829 }
2830
2831 return false;
2832}
2833
2834static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2835 struct ixgbevf_ring *tx_ring,
2836 struct sk_buff *skb, u32 tx_flags)
2837{
2838 struct ixgbe_adv_tx_context_desc *context_desc;
2839 unsigned int i;
2840 struct ixgbevf_tx_buffer *tx_buffer_info;
2841 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2842
2843 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2844 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2845 i = tx_ring->next_to_use;
2846 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2847 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2848
2849 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2850 vlan_macip_lens |= (tx_flags &
2851 IXGBE_TX_FLAGS_VLAN_MASK);
2852 vlan_macip_lens |= (skb_network_offset(skb) <<
2853 IXGBE_ADVTXD_MACLEN_SHIFT);
2854 if (skb->ip_summed == CHECKSUM_PARTIAL)
2855 vlan_macip_lens |= (skb_transport_header(skb) -
2856 skb_network_header(skb));
2857
2858 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2859 context_desc->seqnum_seed = 0;
2860
2861 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2862 IXGBE_ADVTXD_DTYP_CTXT);
2863
2864 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2865 switch (skb->protocol) {
2866 case __constant_htons(ETH_P_IP):
2867 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2868 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2869 type_tucmd_mlhl |=
2870 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2871 break;
2872 case __constant_htons(ETH_P_IPV6):
2873 /* XXX what about other V6 headers?? */
2874 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2875 type_tucmd_mlhl |=
2876 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2877 break;
2878 default:
2879 if (unlikely(net_ratelimit())) {
2880 printk(KERN_WARNING
2881 "partial checksum but "
2882 "proto=%x!\n",
2883 skb->protocol);
2884 }
2885 break;
2886 }
2887 }
2888
2889 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2890 /* use index zero for tx checksum offload */
2891 context_desc->mss_l4len_idx = 0;
2892
2893 tx_buffer_info->time_stamp = jiffies;
2894 tx_buffer_info->next_to_watch = i;
2895
2896 adapter->hw_csum_tx_good++;
2897 i++;
2898 if (i == tx_ring->count)
2899 i = 0;
2900 tx_ring->next_to_use = i;
2901
2902 return true;
2903 }
2904
2905 return false;
2906}
2907
2908static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2909 struct ixgbevf_ring *tx_ring,
2910 struct sk_buff *skb, u32 tx_flags,
2911 unsigned int first)
2912{
2913 struct pci_dev *pdev = adapter->pdev;
2914 struct ixgbevf_tx_buffer *tx_buffer_info;
2915 unsigned int len;
2916 unsigned int total = skb->len;
2540ddb5
KV		 2917 unsigned int offset = 0, size;
2918 int count = 0;
92915f71
GR		 2919 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2920 unsigned int f;
65deeed7 2921 int i;
92915f71
GR		 2922
2923 i = tx_ring->next_to_use;
2924
2925 len = min(skb_headlen(skb), total);
2926 while (len) {
2927 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2928 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2929
2930 tx_buffer_info->length = size;
2931 tx_buffer_info->mapped_as_page = false;
2a1f8794 2932 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2933 skb->data + offset,
2a1f8794
NN		 2934 size, DMA_TO_DEVICE);
2935 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2936 goto dma_error;
2937 tx_buffer_info->time_stamp = jiffies;
2938 tx_buffer_info->next_to_watch = i;
2939
2940 len -= size;
2941 total -= size;
2942 offset += size;
2943 count++;
2944 i++;
2945 if (i == tx_ring->count)
2946 i = 0;
2947 }
2948
2949 for (f = 0; f < nr_frags; f++) {
2950 struct skb_frag_struct *frag;
2951
2952 frag = &skb_shinfo(skb)->frags[f];
2953 len = min((unsigned int)frag->size, total);
2954 offset = frag->page_offset;
2955
2956 while (len) {
2957 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2958 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2959
2960 tx_buffer_info->length = size;
2a1f8794 2961 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
92915f71
GR		 2962 frag->page,
2963 offset,
2964 size,
2a1f8794 2965 DMA_TO_DEVICE);
92915f71 2966 tx_buffer_info->mapped_as_page = true;
2a1f8794 2967 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2968 goto dma_error;
2969 tx_buffer_info->time_stamp = jiffies;
2970 tx_buffer_info->next_to_watch = i;
2971
2972 len -= size;
2973 total -= size;
2974 offset += size;
2975 count++;
2976 i++;
2977 if (i == tx_ring->count)
2978 i = 0;
2979 }
2980 if (total == 0)
2981 break;
2982 }
2983
2984 if (i == 0)
2985 i = tx_ring->count - 1;
2986 else
2987 i = i - 1;
2988 tx_ring->tx_buffer_info[i].skb = skb;
2989 tx_ring->tx_buffer_info[first].next_to_watch = i;
2990
2991 return count;
2992
2993dma_error:
2994 dev_err(&pdev->dev, "TX DMA map failed\n");
2995
2996 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2997 tx_buffer_info->dma = 0;
2998 tx_buffer_info->time_stamp = 0;
2999 tx_buffer_info->next_to_watch = 0;
3000 count--;
3001
3002 /* clear timestamp and dma mappings for remaining portion of packet */
3003 while (count >= 0) {
3004 count--;
3005 i--;
3006 if (i < 0)
3007 i += tx_ring->count;
3008 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3009 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3010 }
3011
3012 return count;
3013}
3014
3015static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3016 struct ixgbevf_ring *tx_ring, int tx_flags,
3017 int count, u32 paylen, u8 hdr_len)
3018{
3019 union ixgbe_adv_tx_desc *tx_desc = NULL;
3020 struct ixgbevf_tx_buffer *tx_buffer_info;
3021 u32 olinfo_status = 0, cmd_type_len = 0;
3022 unsigned int i;
3023
3024 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3025
3026 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3027
3028 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3029
3030 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3031 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3032
3033 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3034 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3035
3036 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3037 IXGBE_ADVTXD_POPTS_SHIFT;
3038
3039 /* use index 1 context for tso */
3040 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3041 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3042 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3043 IXGBE_ADVTXD_POPTS_SHIFT;
3044
3045 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3046 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3047 IXGBE_ADVTXD_POPTS_SHIFT;
3048
3049 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3050
3051 i = tx_ring->next_to_use;
3052 while (count--) {
3053 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3054 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3055 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3056 tx_desc->read.cmd_type_len =
3057 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3058 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3059 i++;
3060 if (i == tx_ring->count)
3061 i = 0;
3062 }
3063
3064 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3065
3066 /*
3067 * Force memory writes to complete before letting h/w
3068 * know there are new descriptors to fetch. (Only
3069 * applicable for weak-ordered memory model archs,
3070 * such as IA-64).
3071 */
3072 wmb();
3073
3074 tx_ring->next_to_use = i;
3075 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3076}
3077
3078static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3079 struct ixgbevf_ring *tx_ring, int size)
3080{
3081 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3082
3083 netif_stop_subqueue(netdev, tx_ring->queue_index);
3084 /* Herbert's original patch had:
3085 * smp_mb__after_netif_stop_queue();
3086 * but since that doesn't exist yet, just open code it. */
3087 smp_mb();
3088
3089 /* We need to check again in a case another CPU has just
3090 * made room available. */
3091 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3092 return -EBUSY;
3093
3094 /* A reprieve! - use start_queue because it doesn't call schedule */
3095 netif_start_subqueue(netdev, tx_ring->queue_index);
3096 ++adapter->restart_queue;
3097 return 0;
3098}
3099
3100static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3101 struct ixgbevf_ring *tx_ring, int size)
3102{
3103 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3104 return 0;
3105 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3106}
3107
3108static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3109{
3110 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3111 struct ixgbevf_ring *tx_ring;
3112 unsigned int first;
3113 unsigned int tx_flags = 0;
3114 u8 hdr_len = 0;
3115 int r_idx = 0, tso;
3116 int count = 0;
3117
3118 unsigned int f;
3119
3120 tx_ring = &adapter->tx_ring[r_idx];
3121
eab6d18d 3122 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 3123 tx_flags |= vlan_tx_tag_get(skb);
3124 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3125 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3126 }
3127
3128 /* four things can cause us to need a context descriptor */
3129 if (skb_is_gso(skb) ||
3130 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3131 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3132 count++;
3133
3134 count += TXD_USE_COUNT(skb_headlen(skb));
3135 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3136 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3137
3138 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3139 adapter->tx_busy++;
3140 return NETDEV_TX_BUSY;
3141 }
3142
3143 first = tx_ring->next_to_use;
3144
3145 if (skb->protocol == htons(ETH_P_IP))
3146 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3147 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3148 if (tso < 0) {
3149 dev_kfree_skb_any(skb);
3150 return NETDEV_TX_OK;
3151 }
3152
3153 if (tso)
3154 tx_flags |= IXGBE_TX_FLAGS_TSO;
3155 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3156 (skb->ip_summed == CHECKSUM_PARTIAL))
3157 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3158
3159 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3160 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3161 skb->len, hdr_len);
3162
92915f71
GR		 3163 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3164
3165 return NETDEV_TX_OK;
3166}
3167
92915f71
GR		 3168/**
3169 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3170 * @netdev: network interface device structure
3171 * @p: pointer to an address structure
3172 *
3173 * Returns 0 on success, negative on failure
3174 **/
3175static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3176{
3177 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3178 struct ixgbe_hw *hw = &adapter->hw;
3179 struct sockaddr *addr = p;
3180
3181 if (!is_valid_ether_addr(addr->sa_data))
3182 return -EADDRNOTAVAIL;
3183
3184 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3185 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3186
3187 if (hw->mac.ops.set_rar)
3188 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3189
3190 return 0;
3191}
3192
3193/**
3194 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3195 * @netdev: network interface device structure
3196 * @new_mtu: new value for maximum frame size
3197 *
3198 * Returns 0 on success, negative on failure
3199 **/
3200static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3201{
3202 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
69bfbec4 3203 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3204 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4
GR		 3205 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
3206 u32 msg[2];
3207
3208 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3209 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
92915f71
GR		 3210
3211 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3212 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3213 return -EINVAL;
3214
3215 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3216 netdev->mtu, new_mtu);
3217 /* must set new MTU before calling down or up */
3218 netdev->mtu = new_mtu;
3219
69bfbec4
GR		 3220 msg[0] = IXGBE_VF_SET_LPE;
3221 msg[1] = max_frame;
3222 hw->mbx.ops.write_posted(hw, msg, 2);
3223
92915f71
GR		 3224 if (netif_running(netdev))
3225 ixgbevf_reinit_locked(adapter);
3226
3227 return 0;
3228}
3229
3230static void ixgbevf_shutdown(struct pci_dev *pdev)
3231{
3232 struct net_device *netdev = pci_get_drvdata(pdev);
3233 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3234
3235 netif_device_detach(netdev);
3236
3237 if (netif_running(netdev)) {
3238 ixgbevf_down(adapter);
3239 ixgbevf_free_irq(adapter);
3240 ixgbevf_free_all_tx_resources(adapter);
3241 ixgbevf_free_all_rx_resources(adapter);
3242 }
3243
3244#ifdef CONFIG_PM
3245 pci_save_state(pdev);
3246#endif
3247
3248 pci_disable_device(pdev);
3249}
3250
92915f71
GR		 3251static const struct net_device_ops ixgbe_netdev_ops = {
3252 .ndo_open = &ixgbevf_open,
3253 .ndo_stop = &ixgbevf_close,
3254 .ndo_start_xmit = &ixgbevf_xmit_frame,
92915f71
GR		 3255 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3256 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3257 .ndo_validate_addr = eth_validate_addr,
3258 .ndo_set_mac_address = &ixgbevf_set_mac,
3259 .ndo_change_mtu = &ixgbevf_change_mtu,
3260 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3261 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3262 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3263 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3264};
92915f71
GR		 3265
3266static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3267{
92915f71 3268 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3269 ixgbevf_set_ethtool_ops(dev);
3270 dev->watchdog_timeo = 5 * HZ;
3271}
3272
3273/**
3274 * ixgbevf_probe - Device Initialization Routine
3275 * @pdev: PCI device information struct
3276 * @ent: entry in ixgbevf_pci_tbl
3277 *
3278 * Returns 0 on success, negative on failure
3279 *
3280 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3281 * The OS initialization, configuring of the adapter private structure,
3282 * and a hardware reset occur.
3283 **/
3284static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3285 const struct pci_device_id *ent)
3286{
3287 struct net_device *netdev;
3288 struct ixgbevf_adapter *adapter = NULL;
3289 struct ixgbe_hw *hw = NULL;
3290 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3291 static int cards_found;
3292 int err, pci_using_dac;
3293
3294 err = pci_enable_device(pdev);
3295 if (err)
3296 return err;
3297
2a1f8794
NN		 3298 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3299 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3300 pci_using_dac = 1;
3301 } else {
2a1f8794 3302 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3303 if (err) {
2a1f8794
NN		 3304 err = dma_set_coherent_mask(&pdev->dev,
3305 DMA_BIT_MASK(32));
92915f71
GR		 3306 if (err) {
3307 dev_err(&pdev->dev, "No usable DMA "
3308 "configuration, aborting\n");
3309 goto err_dma;
3310 }
3311 }
3312 pci_using_dac = 0;
3313 }
3314
3315 err = pci_request_regions(pdev, ixgbevf_driver_name);
3316 if (err) {
3317 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3318 goto err_pci_reg;
3319 }
3320
3321 pci_set_master(pdev);
3322
3323#ifdef HAVE_TX_MQ
3324 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3325 MAX_TX_QUEUES);
3326#else
3327 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3328#endif
3329 if (!netdev) {
3330 err = -ENOMEM;
3331 goto err_alloc_etherdev;
3332 }
3333
3334 SET_NETDEV_DEV(netdev, &pdev->dev);
3335
3336 pci_set_drvdata(pdev, netdev);
3337 adapter = netdev_priv(netdev);
3338
3339 adapter->netdev = netdev;
3340 adapter->pdev = pdev;
3341 hw = &adapter->hw;
3342 hw->back = adapter;
3343 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3344
3345 /*
3346 * call save state here in standalone driver because it relies on
3347 * adapter struct to exist, and needs to call netdev_priv
3348 */
3349 pci_save_state(pdev);
3350
3351 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3352 pci_resource_len(pdev, 0));
3353 if (!hw->hw_addr) {
3354 err = -EIO;
3355 goto err_ioremap;
3356 }
3357
3358 ixgbevf_assign_netdev_ops(netdev);
3359
3360 adapter->bd_number = cards_found;
3361
3362 /* Setup hw api */
3363 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3364 hw->mac.type = ii->mac;
3365
3366 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3367 sizeof(struct ixgbe_mac_operations));
3368
3369 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3370 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3371 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3372
3373 /* setup the private structure */
3374 err = ixgbevf_sw_init(adapter);
3375
92915f71
GR		 3376 netdev->features = NETIF_F_SG |
3377 NETIF_F_IP_CSUM |
3378 NETIF_F_HW_VLAN_TX |
3379 NETIF_F_HW_VLAN_RX |
3380 NETIF_F_HW_VLAN_FILTER;
3381
3382 netdev->features |= NETIF_F_IPV6_CSUM;
3383 netdev->features |= NETIF_F_TSO;
3384 netdev->features |= NETIF_F_TSO6;
e59d44df 3385 netdev->features |= NETIF_F_GRO;
92915f71
GR		 3386 netdev->vlan_features |= NETIF_F_TSO;
3387 netdev->vlan_features |= NETIF_F_TSO6;
3388 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3389 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3390 netdev->vlan_features |= NETIF_F_SG;
3391
3392 if (pci_using_dac)
3393 netdev->features |= NETIF_F_HIGHDMA;
3394
92915f71
GR		 3395 /* The HW MAC address was set and/or determined in sw_init */
3396 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3397 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3398
3399 if (!is_valid_ether_addr(netdev->dev_addr)) {
3400 printk(KERN_ERR "invalid MAC address\n");
3401 err = -EIO;
3402 goto err_sw_init;
3403 }
3404
3405 init_timer(&adapter->watchdog_timer);
c061b18d 3406 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3407 adapter->watchdog_timer.data = (unsigned long)adapter;
3408
3409 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3410 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3411
3412 err = ixgbevf_init_interrupt_scheme(adapter);
3413 if (err)
3414 goto err_sw_init;
3415
3416 /* pick up the PCI bus settings for reporting later */
3417 if (hw->mac.ops.get_bus_info)
3418 hw->mac.ops.get_bus_info(hw);
3419
92915f71
GR		 3420 strcpy(netdev->name, "eth%d");
3421
3422 err = register_netdev(netdev);
3423 if (err)
3424 goto err_register;
3425
3426 adapter->netdev_registered = true;
3427
5d426ad1
GR		 3428 netif_carrier_off(netdev);
3429
33bd9f60
GR		 3430 ixgbevf_init_last_counter_stats(adapter);
3431
92915f71
GR		 3432 /* print the MAC address */
3433 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3434 netdev->dev_addr[0],
3435 netdev->dev_addr[1],
3436 netdev->dev_addr[2],
3437 netdev->dev_addr[3],
3438 netdev->dev_addr[4],
3439 netdev->dev_addr[5]);
3440
3441 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3442
d6dbee86 3443 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3444
3445 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3446 cards_found++;
3447 return 0;
3448
3449err_register:
3450err_sw_init:
3451 ixgbevf_reset_interrupt_capability(adapter);
3452 iounmap(hw->hw_addr);
3453err_ioremap:
3454 free_netdev(netdev);
3455err_alloc_etherdev:
3456 pci_release_regions(pdev);
3457err_pci_reg:
3458err_dma:
3459 pci_disable_device(pdev);
3460 return err;
3461}
3462
3463/**
3464 * ixgbevf_remove - Device Removal Routine
3465 * @pdev: PCI device information struct
3466 *
3467 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3468 * that it should release a PCI device. The could be caused by a
3469 * Hot-Plug event, or because the driver is going to be removed from
3470 * memory.
3471 **/
3472static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3473{
3474 struct net_device *netdev = pci_get_drvdata(pdev);
3475 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3476
3477 set_bit(__IXGBEVF_DOWN, &adapter->state);
3478
3479 del_timer_sync(&adapter->watchdog_timer);
3480
23f333a2 3481 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3482 cancel_work_sync(&adapter->watchdog_task);
3483
92915f71
GR		 3484 if (adapter->netdev_registered) {
3485 unregister_netdev(netdev);
3486 adapter->netdev_registered = false;
3487 }
3488
3489 ixgbevf_reset_interrupt_capability(adapter);
3490
3491 iounmap(adapter->hw.hw_addr);
3492 pci_release_regions(pdev);
3493
3494 hw_dbg(&adapter->hw, "Remove complete\n");
3495
3496 kfree(adapter->tx_ring);
3497 kfree(adapter->rx_ring);
3498
3499 free_netdev(netdev);
3500
3501 pci_disable_device(pdev);
3502}
3503
3504static struct pci_driver ixgbevf_driver = {
3505 .name = ixgbevf_driver_name,
3506 .id_table = ixgbevf_pci_tbl,
3507 .probe = ixgbevf_probe,
3508 .remove = __devexit_p(ixgbevf_remove),
3509 .shutdown = ixgbevf_shutdown,
3510};
3511
3512/**
65d676c8 3513 * ixgbevf_init_module - Driver Registration Routine
92915f71 3514 *
65d676c8 3515 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 3516 * loaded. All it does is register with the PCI subsystem.
3517 **/
3518static int __init ixgbevf_init_module(void)
3519{
3520 int ret;
3521 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3522 ixgbevf_driver_version);
3523
3524 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3525
3526 ret = pci_register_driver(&ixgbevf_driver);
3527 return ret;
3528}
3529
3530module_init(ixgbevf_init_module);
3531
3532/**
65d676c8 3533 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 3534 *
65d676c8 3535 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 3536 * from memory.
3537 **/
3538static void __exit ixgbevf_exit_module(void)
3539{
3540 pci_unregister_driver(&ixgbevf_driver);
3541}
3542
3543#ifdef DEBUG
3544/**
65d676c8 3545 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 3546 * used by hardware layer to print debugging information
3547 **/
3548char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3549{
3550 struct ixgbevf_adapter *adapter = hw->back;
3551 return adapter->netdev->name;
3552}
3553
3554#endif
3555module_exit(ixgbevf_exit_module);
3556
3557/* ixgbevf_main.c */
Linux kernel - Deliverables
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