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netxen: remove unnecessary [kv][mcz]alloc casts
[deliverable/linux.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1 1/*
5d242f1c 2 * Copyright (C) 2003 - 2009 NetXen, Inc.
13af7a6e 3 * Copyright (C) 2009 - QLogic Corporation.
3d396eb1 4 * All rights reserved.
80922fbc 5 *
3d396eb1
AK		 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
80922fbc 10 *
3d396eb1
AK		 11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
80922fbc 15 *
3d396eb1
AK		 16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
19 * MA 02111-1307, USA.
80922fbc 20 *
3d396eb1 21 * The full GNU General Public License is included in this distribution
4d21fef4 22 * in the file called "COPYING".
80922fbc 23 *
3d396eb1
AK		 24 */
25
26#include <linux/netdevice.h>
27#include <linux/delay.h>
5a0e3ad6 28#include <linux/slab.h>
3d396eb1
AK		 29#include "netxen_nic.h"
30#include "netxen_nic_hw.h"
3d396eb1
AK		 31
32struct crb_addr_pair {
e0e20a1a
LCMT		 33 u32 addr;
34 u32 data;
3d396eb1
AK		 35};
36
37#define NETXEN_MAX_CRB_XFORM 60
38static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 39#define NETXEN_ADDR_ERROR (0xffffffff)
3d396eb1
AK		 40
41#define crb_addr_transform(name) \
42 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
43 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
44
cb8011ad
AK		 45#define NETXEN_NIC_XDMA_RESET 0x8000ff
46
becf46a0 47static void
d8b100c5
DP		 48netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
49 struct nx_host_rds_ring *rds_ring);
f50330f9 50static int netxen_p3_has_mn(struct netxen_adapter *adapter);
993fb90c 51
3d396eb1
AK		 52static void crb_addr_transform_setup(void)
53{
54 crb_addr_transform(XDMA);
55 crb_addr_transform(TIMR);
56 crb_addr_transform(SRE);
57 crb_addr_transform(SQN3);
58 crb_addr_transform(SQN2);
59 crb_addr_transform(SQN1);
60 crb_addr_transform(SQN0);
61 crb_addr_transform(SQS3);
62 crb_addr_transform(SQS2);
63 crb_addr_transform(SQS1);
64 crb_addr_transform(SQS0);
65 crb_addr_transform(RPMX7);
66 crb_addr_transform(RPMX6);
67 crb_addr_transform(RPMX5);
68 crb_addr_transform(RPMX4);
69 crb_addr_transform(RPMX3);
70 crb_addr_transform(RPMX2);
71 crb_addr_transform(RPMX1);
72 crb_addr_transform(RPMX0);
73 crb_addr_transform(ROMUSB);
74 crb_addr_transform(SN);
75 crb_addr_transform(QMN);
76 crb_addr_transform(QMS);
77 crb_addr_transform(PGNI);
78 crb_addr_transform(PGND);
79 crb_addr_transform(PGN3);
80 crb_addr_transform(PGN2);
81 crb_addr_transform(PGN1);
82 crb_addr_transform(PGN0);
83 crb_addr_transform(PGSI);
84 crb_addr_transform(PGSD);
85 crb_addr_transform(PGS3);
86 crb_addr_transform(PGS2);
87 crb_addr_transform(PGS1);
88 crb_addr_transform(PGS0);
89 crb_addr_transform(PS);
90 crb_addr_transform(PH);
91 crb_addr_transform(NIU);
92 crb_addr_transform(I2Q);
93 crb_addr_transform(EG);
94 crb_addr_transform(MN);
95 crb_addr_transform(MS);
96 crb_addr_transform(CAS2);
97 crb_addr_transform(CAS1);
98 crb_addr_transform(CAS0);
99 crb_addr_transform(CAM);
100 crb_addr_transform(C2C1);
101 crb_addr_transform(C2C0);
1fcca1a5 102 crb_addr_transform(SMB);
e4c93c81
DP		 103 crb_addr_transform(OCM0);
104 crb_addr_transform(I2C0);
3d396eb1
AK		 105}
106
2956640d 107void netxen_release_rx_buffers(struct netxen_adapter *adapter)
3d396eb1 108{
2956640d 109 struct netxen_recv_context *recv_ctx;
48bfd1e0 110 struct nx_host_rds_ring *rds_ring;
2956640d 111 struct netxen_rx_buffer *rx_buf;
becf46a0
DP		 112 int i, ring;
113
114 recv_ctx = &adapter->recv_ctx;
115 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
116 rds_ring = &recv_ctx->rds_rings[ring];
438627c7 117 for (i = 0; i < rds_ring->num_desc; ++i) {
becf46a0
DP		 118 rx_buf = &(rds_ring->rx_buf_arr[i]);
119 if (rx_buf->state == NETXEN_BUFFER_FREE)
120 continue;
121 pci_unmap_single(adapter->pdev,
122 rx_buf->dma,
123 rds_ring->dma_size,
124 PCI_DMA_FROMDEVICE);
125 if (rx_buf->skb != NULL)
126 dev_kfree_skb_any(rx_buf->skb);
2956640d
DP		 127 }
128 }
129}
130
131void netxen_release_tx_buffers(struct netxen_adapter *adapter)
132{
133 struct netxen_cmd_buffer *cmd_buf;
134 struct netxen_skb_frag *buffrag;
135 int i, j;
4ea528a1 136 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
2956640d 137
d877f1e3
DP		 138 cmd_buf = tx_ring->cmd_buf_arr;
139 for (i = 0; i < tx_ring->num_desc; i++) {
2956640d
DP		 140 buffrag = cmd_buf->frag_array;
141 if (buffrag->dma) {
142 pci_unmap_single(adapter->pdev, buffrag->dma,
143 buffrag->length, PCI_DMA_TODEVICE);
144 buffrag->dma = 0ULL;
145 }
146 for (j = 0; j < cmd_buf->frag_count; j++) {
147 buffrag++;
148 if (buffrag->dma) {
149 pci_unmap_page(adapter->pdev, buffrag->dma,
150 buffrag->length,
151 PCI_DMA_TODEVICE);
152 buffrag->dma = 0ULL;
153 }
154 }
2956640d
DP		 155 if (cmd_buf->skb) {
156 dev_kfree_skb_any(cmd_buf->skb);
157 cmd_buf->skb = NULL;
158 }
159 cmd_buf++;
160 }
161}
162
163void netxen_free_sw_resources(struct netxen_adapter *adapter)
164{
165 struct netxen_recv_context *recv_ctx;
48bfd1e0 166 struct nx_host_rds_ring *rds_ring;
d877f1e3 167 struct nx_host_tx_ring *tx_ring;
becf46a0
DP		 168 int ring;
169
170 recv_ctx = &adapter->recv_ctx;
4ea528a1
DP		 171
172 if (recv_ctx->rds_rings == NULL)
173 goto skip_rds;
174
becf46a0
DP		 175 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
176 rds_ring = &recv_ctx->rds_rings[ring];
f2333a01
F		 177 vfree(rds_ring->rx_buf_arr);
178 rds_ring->rx_buf_arr = NULL;
2956640d 179 }
4ea528a1
DP		 180 kfree(recv_ctx->rds_rings);
181
182skip_rds:
183 if (adapter->tx_ring == NULL)
184 return;
becf46a0 185
4ea528a1 186 tx_ring = adapter->tx_ring;
f2333a01 187 vfree(tx_ring->cmd_buf_arr);
011f4ea0
AKS		 188 kfree(tx_ring);
189 adapter->tx_ring = NULL;
2956640d
DP		 190}
191
192int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
193{
194 struct netxen_recv_context *recv_ctx;
48bfd1e0 195 struct nx_host_rds_ring *rds_ring;
d8b100c5 196 struct nx_host_sds_ring *sds_ring;
4ea528a1 197 struct nx_host_tx_ring *tx_ring;
2956640d 198 struct netxen_rx_buffer *rx_buf;
4ea528a1 199 int ring, i, size;
2956640d
DP		 200
201 struct netxen_cmd_buffer *cmd_buf_arr;
202 struct net_device *netdev = adapter->netdev;
d877f1e3 203 struct pci_dev *pdev = adapter->pdev;
2956640d 204
4ea528a1
DP		 205 size = sizeof(struct nx_host_tx_ring);
206 tx_ring = kzalloc(size, GFP_KERNEL);
207 if (tx_ring == NULL) {
208 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
209 netdev->name);
210 return -ENOMEM;
211 }
212 adapter->tx_ring = tx_ring;
213
d877f1e3 214 tx_ring->num_desc = adapter->num_txd;
b2af9cb0 215 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
4ea528a1 216
89bf67f1 217 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
2956640d 218 if (cmd_buf_arr == NULL) {
d877f1e3 219 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
2956640d 220 netdev->name);
bf445080 221 goto err_out;
2956640d 222 }
d877f1e3 223 tx_ring->cmd_buf_arr = cmd_buf_arr;
2956640d 224
becf46a0 225 recv_ctx = &adapter->recv_ctx;
4ea528a1
DP		 226
227 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
228 rds_ring = kzalloc(size, GFP_KERNEL);
229 if (rds_ring == NULL) {
230 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
231 netdev->name);
bf445080 232 goto err_out;
4ea528a1
DP		 233 }
234 recv_ctx->rds_rings = rds_ring;
235
becf46a0
DP		 236 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
237 rds_ring = &recv_ctx->rds_rings[ring];
438627c7
DP		 238 switch (ring) {
239 case RCV_RING_NORMAL:
240 rds_ring->num_desc = adapter->num_rxd;
becf46a0
DP		 241 if (adapter->ahw.cut_through) {
242 rds_ring->dma_size =
243 NX_CT_DEFAULT_RX_BUF_LEN;
48bfd1e0 244 rds_ring->skb_size =
becf46a0
DP		 245 NX_CT_DEFAULT_RX_BUF_LEN;
246 } else {
9b08beba
DP		 247 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
248 rds_ring->dma_size =
249 NX_P3_RX_BUF_MAX_LEN;
250 else
251 rds_ring->dma_size =
252 NX_P2_RX_BUF_MAX_LEN;
becf46a0 253 rds_ring->skb_size =
9b08beba 254 rds_ring->dma_size + NET_IP_ALIGN;
becf46a0
DP		 255 }
256 break;
2956640d 257
438627c7
DP		 258 case RCV_RING_JUMBO:
259 rds_ring->num_desc = adapter->num_jumbo_rxd;
becf46a0
DP		 260 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
261 rds_ring->dma_size =
262 NX_P3_RX_JUMBO_BUF_MAX_LEN;
263 else
264 rds_ring->dma_size =
265 NX_P2_RX_JUMBO_BUF_MAX_LEN;
bc75e5bf
DP		 266
267 if (adapter->capabilities & NX_CAP0_HW_LRO)
268 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
269
becf46a0
DP		 270 rds_ring->skb_size =
271 rds_ring->dma_size + NET_IP_ALIGN;
272 break;
2956640d 273
becf46a0 274 case RCV_RING_LRO:
438627c7 275 rds_ring->num_desc = adapter->num_lro_rxd;
9b08beba
DP		 276 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
277 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
becf46a0
DP		 278 break;
279
280 }
0acdf68f 281 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
becf46a0
DP		 282 if (rds_ring->rx_buf_arr == NULL) {
283 printk(KERN_ERR "%s: Failed to allocate "
284 "rx buffer ring %d\n",
285 netdev->name, ring);
286 /* free whatever was already allocated */
287 goto err_out;
288 }
becf46a0
DP		 289 INIT_LIST_HEAD(&rds_ring->free_list);
290 /*
291 * Now go through all of them, set reference handles
292 * and put them in the queues.
293 */
becf46a0 294 rx_buf = rds_ring->rx_buf_arr;
4ea528a1 295 for (i = 0; i < rds_ring->num_desc; i++) {
becf46a0
DP		 296 list_add_tail(&rx_buf->list,
297 &rds_ring->free_list);
298 rx_buf->ref_handle = i;
299 rx_buf->state = NETXEN_BUFFER_FREE;
300 rx_buf++;
3d396eb1 301 }
d8b100c5
DP		 302 spin_lock_init(&rds_ring->lock);
303 }
304
305 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
306 sds_ring = &recv_ctx->sds_rings[ring];
307 sds_ring->irq = adapter->msix_entries[ring].vector;
d8b100c5
DP		 308 sds_ring->adapter = adapter;
309 sds_ring->num_desc = adapter->num_rxd;
310
311 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
312 INIT_LIST_HEAD(&sds_ring->free_list[i]);
3d396eb1 313 }
2956640d
DP		 314
315 return 0;
316
317err_out:
318 netxen_free_sw_resources(adapter);
319 return -ENOMEM;
3d396eb1
AK		 320}
321
3d396eb1
AK		 322/*
323 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
324 * address to external PCI CRB address.
325 */
993fb90c 326static u32 netxen_decode_crb_addr(u32 addr)
3d396eb1
AK		 327{
328 int i;
e0e20a1a 329 u32 base_addr, offset, pci_base;
3d396eb1
AK		 330
331 crb_addr_transform_setup();
332
333 pci_base = NETXEN_ADDR_ERROR;
334 base_addr = addr & 0xfff00000;
335 offset = addr & 0x000fffff;
336
337 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
338 if (crb_addr_xform[i] == base_addr) {
339 pci_base = i << 20;
340 break;
341 }
342 }
343 if (pci_base == NETXEN_ADDR_ERROR)
344 return pci_base;
345 else
807540ba 346 return pci_base + offset;
3d396eb1
AK		 347}
348
c9517e58 349#define NETXEN_MAX_ROM_WAIT_USEC 100
3d396eb1 350
993fb90c 351static int netxen_wait_rom_done(struct netxen_adapter *adapter)
3d396eb1
AK		 352{
353 long timeout = 0;
354 long done = 0;
355
27c915a4
DP		 356 cond_resched();
357
3d396eb1 358 while (done == 0) {
f98a9f69 359 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
3d396eb1 360 done &= 2;
c9517e58
DP		 361 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
362 dev_err(&adapter->pdev->dev,
363 "Timeout reached waiting for rom done");
3d396eb1
AK		 364 return -EIO;
365 }
c9517e58 366 udelay(1);
3d396eb1
AK		 367 }
368 return 0;
369}
370
993fb90c
AB		 371static int do_rom_fast_read(struct netxen_adapter *adapter,
372 int addr, int *valp)
3d396eb1 373{
f98a9f69
DP		 374 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
375 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
376 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
377 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
3d396eb1
AK		 378 if (netxen_wait_rom_done(adapter)) {
379 printk("Error waiting for rom done\n");
380 return -EIO;
381 }
382 /* reset abyte_cnt and dummy_byte_cnt */
f98a9f69 383 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
27c915a4 384 udelay(10);
f98a9f69 385 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
3d396eb1 386
f98a9f69 387 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
3d396eb1
AK		 388 return 0;
389}
390
993fb90c
AB		 391static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
392 u8 *bytes, size_t size)
27d2ab54
AK		 393{
394 int addridx;
395 int ret = 0;
396
397 for (addridx = addr; addridx < (addr + size); addridx += 4) {
f305f789
AV		 398 int v;
399 ret = do_rom_fast_read(adapter, addridx, &v);
27d2ab54
AK		 400 if (ret != 0)
401 break;
f305f789 402 *(__le32 *)bytes = cpu_to_le32(v);
27d2ab54
AK		 403 bytes += 4;
404 }
405
406 return ret;
407}
408
409int
4790654c 410netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
27d2ab54
AK		 411 u8 *bytes, size_t size)
412{
413 int ret;
414
c9517e58 415 ret = netxen_rom_lock(adapter);
27d2ab54
AK		 416 if (ret < 0)
417 return ret;
418
419 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
420
421 netxen_rom_unlock(adapter);
422 return ret;
423}
424
3d396eb1
AK		 425int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
426{
427 int ret;
428
c9517e58 429 if (netxen_rom_lock(adapter) != 0)
3d396eb1
AK		 430 return -EIO;
431
432 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 433 netxen_rom_unlock(adapter);
434 return ret;
435}
436
3d396eb1
AK		 437#define NETXEN_BOARDTYPE 0x4008
438#define NETXEN_BOARDNUM 0x400c
439#define NETXEN_CHIPNUM 0x4010
3d396eb1 440
0be367bd 441int netxen_pinit_from_rom(struct netxen_adapter *adapter)
3d396eb1 442{
dcd56fdb 443 int addr, val;
27c915a4 444 int i, n, init_delay = 0;
3d396eb1 445 struct crb_addr_pair *buf;
27c915a4 446 unsigned offset;
e0e20a1a 447 u32 off;
3d396eb1
AK		 448
449 /* resetall */
c9517e58 450 netxen_rom_lock(adapter);
f98a9f69 451 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
27c915a4 452 netxen_rom_unlock(adapter);
3d396eb1 453
2956640d
DP		 454 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
455 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
27c915a4 456 (n != 0xcafecafe) ||
2956640d
DP		 457 netxen_rom_fast_read(adapter, 4, &n) != 0) {
458 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
459 "n: %08x\n", netxen_nic_driver_name, n);
3d396eb1
AK		 460 return -EIO;
461 }
2956640d
DP		 462 offset = n & 0xffffU;
463 n = (n >> 16) & 0xffffU;
464 } else {
465 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
466 !(n & 0x80000000)) {
467 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
468 "n: %08x\n", netxen_nic_driver_name, n);
469 return -EIO;
3d396eb1 470 }
2956640d
DP		 471 offset = 1;
472 n &= ~0x80000000;
473 }
474
0be367bd 475 if (n >= 1024) {
2956640d
DP		 476 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
477 " initialized.\n", __func__, n);
478 return -EIO;
479 }
3d396eb1 480
2956640d
DP		 481 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
482 if (buf == NULL) {
483 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
484 netxen_nic_driver_name);
485 return -ENOMEM;
486 }
0be367bd 487
2956640d
DP		 488 for (i = 0; i < n; i++) {
489 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
584dbe94
DM		 490 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
491 kfree(buf);
2956640d 492 return -EIO;
584dbe94 493 }
2956640d
DP		 494
495 buf[i].addr = addr;
496 buf[i].data = val;
497
2956640d 498 }
0be367bd 499
2956640d
DP		 500 for (i = 0; i < n; i++) {
501
502 off = netxen_decode_crb_addr(buf[i].addr);
503 if (off == NETXEN_ADDR_ERROR) {
504 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5 505 buf[i].addr);
2956640d
DP		 506 continue;
507 }
508 off += NETXEN_PCI_CRBSPACE;
0be367bd
AKS		 509
510 if (off & 1)
511 continue;
512
2956640d
DP		 513 /* skipping cold reboot MAGIC */
514 if (off == NETXEN_CAM_RAM(0x1fc))
515 continue;
516
517 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
8bee0a91
DP		 518 if (off == (NETXEN_CRB_I2C0 + 0x1c))
519 continue;
2956640d
DP		 520 /* do not reset PCI */
521 if (off == (ROMUSB_GLB + 0xbc))
1fcca1a5 522 continue;
27c915a4
DP		 523 if (off == (ROMUSB_GLB + 0xa8))
524 continue;
525 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
526 continue;
527 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
528 continue;
529 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
530 continue;
e7473f12
AKS		 531 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET)
532 continue;
0be367bd
AKS		 533 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) &&
534 !NX_IS_REVISION_P3P(adapter->ahw.revision_id))
2956640d
DP		 535 buf[i].data = 0x1020;
536 /* skip the function enable register */
537 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
3d396eb1 538 continue;
2956640d
DP		 539 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
540 continue;
541 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
542 continue;
543 }
3d396eb1 544
27c915a4 545 init_delay = 1;
2956640d
DP		 546 /* After writing this register, HW needs time for CRB */
547 /* to quiet down (else crb_window returns 0xffffffff) */
548 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
27c915a4 549 init_delay = 1000;
2956640d 550 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
3d396eb1 551 /* hold xdma in reset also */
cb8011ad 552 buf[i].data = NETXEN_NIC_XDMA_RESET;
27c915a4 553 buf[i].data = 0x8000ff;
3d396eb1 554 }
2956640d 555 }
3d396eb1 556
f98a9f69 557 NXWR32(adapter, off, buf[i].data);
3d396eb1 558
27c915a4 559 msleep(init_delay);
2956640d
DP		 560 }
561 kfree(buf);
3d396eb1 562
2956640d 563 /* disable_peg_cache_all */
3d396eb1 564
2956640d
DP		 565 /* unreset_net_cache */
566 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
f98a9f69
DP		 567 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
568 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
3d396eb1 569 }
2956640d
DP		 570
571 /* p2dn replyCount */
f98a9f69 572 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
2956640d 573 /* disable_peg_cache 0 */
f98a9f69 574 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
2956640d 575 /* disable_peg_cache 1 */
f98a9f69 576 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
2956640d
DP		 577
578 /* peg_clr_all */
579
580 /* peg_clr 0 */
f98a9f69
DP		 581 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
582 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
2956640d 583 /* peg_clr 1 */
f98a9f69
DP		 584 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
585 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
2956640d 586 /* peg_clr 2 */
f98a9f69
DP		 587 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
588 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
2956640d 589 /* peg_clr 3 */
f98a9f69
DP		 590 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
591 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
3d396eb1
AK		 592 return 0;
593}
594
f50330f9
AKS		 595static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section)
596{
597 uint32_t i;
598 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
599 __le32 entries = cpu_to_le32(directory->num_entries);
600
601 for (i = 0; i < entries; i++) {
602
603 __le32 offs = cpu_to_le32(directory->findex) +
604 (i * cpu_to_le32(directory->entry_size));
605 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
606
607 if (tab_type == section)
608 return (struct uni_table_desc *) &unirom[offs];
609 }
610
611 return NULL;
612}
613
10c0f2a8
RB		 614#define QLCNIC_FILEHEADER_SIZE (14 * 4)
615
f50330f9 616static int
10c0f2a8
RB		 617netxen_nic_validate_header(struct netxen_adapter *adapter)
618 {
f50330f9 619 const u8 *unirom = adapter->fw->data;
10c0f2a8
RB		 620 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
621 u32 fw_file_size = adapter->fw->size;
622 u32 tab_size;
f50330f9 623 __le32 entries;
10c0f2a8
RB		 624 __le32 entry_size;
625
626 if (fw_file_size < QLCNIC_FILEHEADER_SIZE)
627 return -EINVAL;
628
629 entries = cpu_to_le32(directory->num_entries);
630 entry_size = cpu_to_le32(directory->entry_size);
631 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
632
633 if (fw_file_size < tab_size)
634 return -EINVAL;
635
636 return 0;
637}
638
639static int
640netxen_nic_validate_bootld(struct netxen_adapter *adapter)
641{
642 struct uni_table_desc *tab_desc;
643 struct uni_data_desc *descr;
644 const u8 *unirom = adapter->fw->data;
645 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
646 NX_UNI_BOOTLD_IDX_OFF));
647 u32 offs;
648 u32 tab_size;
649 u32 data_size;
650
651 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD);
652
653 if (!tab_desc)
654 return -EINVAL;
655
656 tab_size = cpu_to_le32(tab_desc->findex) +
657 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
658
659 if (adapter->fw->size < tab_size)
660 return -EINVAL;
661
662 offs = cpu_to_le32(tab_desc->findex) +
663 (cpu_to_le32(tab_desc->entry_size) * (idx));
664 descr = (struct uni_data_desc *)&unirom[offs];
665
666 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
667
668 if (adapter->fw->size < data_size)
669 return -EINVAL;
670
671 return 0;
672}
673
674static int
675netxen_nic_validate_fw(struct netxen_adapter *adapter)
676{
677 struct uni_table_desc *tab_desc;
678 struct uni_data_desc *descr;
679 const u8 *unirom = adapter->fw->data;
680 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
681 NX_UNI_FIRMWARE_IDX_OFF));
682 u32 offs;
683 u32 tab_size;
684 u32 data_size;
685
686 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW);
687
688 if (!tab_desc)
689 return -EINVAL;
f50330f9 690
10c0f2a8
RB		 691 tab_size = cpu_to_le32(tab_desc->findex) +
692 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
693
694 if (adapter->fw->size < tab_size)
695 return -EINVAL;
696
697 offs = cpu_to_le32(tab_desc->findex) +
698 (cpu_to_le32(tab_desc->entry_size) * (idx));
699 descr = (struct uni_data_desc *)&unirom[offs];
700 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
701
702 if (adapter->fw->size < data_size)
703 return -EINVAL;
704
705 return 0;
706}
707
708
709static int
710netxen_nic_validate_product_offs(struct netxen_adapter *adapter)
711{
712 struct uni_table_desc *ptab_descr;
713 const u8 *unirom = adapter->fw->data;
634d7df8
DP		 714 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ?
715 1 : netxen_p3_has_mn(adapter);
10c0f2a8
RB		 716 __le32 entries;
717 __le32 entry_size;
718 u32 tab_size;
719 u32 i;
634d7df8 720
f50330f9
AKS		 721 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL);
722 if (ptab_descr == NULL)
10c0f2a8 723 return -EINVAL;
f50330f9
AKS		 724
725 entries = cpu_to_le32(ptab_descr->num_entries);
10c0f2a8
RB		 726 entry_size = cpu_to_le32(ptab_descr->entry_size);
727 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
728
729 if (adapter->fw->size < tab_size)
730 return -EINVAL;
f50330f9 731
634d7df8 732nomn:
f50330f9
AKS		 733 for (i = 0; i < entries; i++) {
734
735 __le32 flags, file_chiprev, offs;
736 u8 chiprev = adapter->ahw.revision_id;
f50330f9
AKS		 737 uint32_t flagbit;
738
739 offs = cpu_to_le32(ptab_descr->findex) +
740 (i * cpu_to_le32(ptab_descr->entry_size));
741 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF));
742 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
743 NX_UNI_CHIP_REV_OFF));
744
745 flagbit = mn_present ? 1 : 2;
746
747 if ((chiprev == file_chiprev) &&
748 ((1ULL << flagbit) & flags)) {
749 adapter->file_prd_off = offs;
750 return 0;
751 }
752 }
753
634d7df8
DP		 754 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
755 mn_present = 0;
756 goto nomn;
757 }
758
10c0f2a8 759 return -EINVAL;
f50330f9
AKS		 760}
761
10c0f2a8
RB		 762static int
763netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter)
764{
765 if (netxen_nic_validate_header(adapter)) {
766 dev_err(&adapter->pdev->dev,
767 "unified image: header validation failed\n");
768 return -EINVAL;
769 }
770
771 if (netxen_nic_validate_product_offs(adapter)) {
772 dev_err(&adapter->pdev->dev,
773 "unified image: product validation failed\n");
774 return -EINVAL;
775 }
776
777 if (netxen_nic_validate_bootld(adapter)) {
778 dev_err(&adapter->pdev->dev,
779 "unified image: bootld validation failed\n");
780 return -EINVAL;
781 }
782
783 if (netxen_nic_validate_fw(adapter)) {
784 dev_err(&adapter->pdev->dev,
785 "unified image: firmware validation failed\n");
786 return -EINVAL;
787 }
788
789 return 0;
790}
f50330f9
AKS		 791
792static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter,
793 u32 section, u32 idx_offset)
794{
795 const u8 *unirom = adapter->fw->data;
796 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
797 idx_offset));
798 struct uni_table_desc *tab_desc;
799 __le32 offs;
800
801 tab_desc = nx_get_table_desc(unirom, section);
802
803 if (tab_desc == NULL)
804 return NULL;
805
806 offs = cpu_to_le32(tab_desc->findex) +
807 (cpu_to_le32(tab_desc->entry_size) * idx);
808
809 return (struct uni_data_desc *)&unirom[offs];
810}
811
812static u8 *
813nx_get_bootld_offs(struct netxen_adapter *adapter)
814{
815 u32 offs = NETXEN_BOOTLD_START;
816
817 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
818 offs = cpu_to_le32((nx_get_data_desc(adapter,
819 NX_UNI_DIR_SECT_BOOTLD,
820 NX_UNI_BOOTLD_IDX_OFF))->findex);
821
822 return (u8 *)&adapter->fw->data[offs];
823}
824
825static u8 *
826nx_get_fw_offs(struct netxen_adapter *adapter)
827{
828 u32 offs = NETXEN_IMAGE_START;
829
830 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
831 offs = cpu_to_le32((nx_get_data_desc(adapter,
832 NX_UNI_DIR_SECT_FW,
833 NX_UNI_FIRMWARE_IDX_OFF))->findex);
834
835 return (u8 *)&adapter->fw->data[offs];
836}
837
838static __le32
839nx_get_fw_size(struct netxen_adapter *adapter)
840{
841 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
842 return cpu_to_le32((nx_get_data_desc(adapter,
843 NX_UNI_DIR_SECT_FW,
844 NX_UNI_FIRMWARE_IDX_OFF))->size);
845 else
846 return cpu_to_le32(
847 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]);
848}
849
850static __le32
851nx_get_fw_version(struct netxen_adapter *adapter)
852{
853 struct uni_data_desc *fw_data_desc;
854 const struct firmware *fw = adapter->fw;
855 __le32 major, minor, sub;
856 const u8 *ver_str;
857 int i, ret = 0;
858
859 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
860
861 fw_data_desc = nx_get_data_desc(adapter,
862 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF);
863 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
864 cpu_to_le32(fw_data_desc->size) - 17;
865
866 for (i = 0; i < 12; i++) {
867 if (!strncmp(&ver_str[i], "REV=", 4)) {
868 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
869 &major, &minor, &sub);
870 break;
871 }
872 }
873
874 if (ret != 3)
875 return 0;
876
877 return major + (minor << 8) + (sub << 16);
878
879 } else
880 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
881}
882
883static __le32
884nx_get_bios_version(struct netxen_adapter *adapter)
885{
886 const struct firmware *fw = adapter->fw;
887 __le32 bios_ver, prd_off = adapter->file_prd_off;
888
889 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
890 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
891 + NX_UNI_BIOS_VERSION_OFF));
bb2792e0 892 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) +
f50330f9
AKS		 893 (bios_ver >> 24);
894 } else
895 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
896
897}
898
67c38fc6
DP		 899int
900netxen_need_fw_reset(struct netxen_adapter *adapter)
901{
902 u32 count, old_count;
903 u32 val, version, major, minor, build;
904 int i, timeout;
905 u8 fw_type;
906
907 /* NX2031 firmware doesn't support heartbit */
908 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
909 return 1;
910
6a808c6c
AKS		 911 if (adapter->need_fw_reset)
912 return 1;
913
67c38fc6
DP		 914 /* last attempt had failed */
915 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
916 return 1;
917
581e8ae4 918 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
67c38fc6
DP		 919
920 for (i = 0; i < 10; i++) {
921
922 timeout = msleep_interruptible(200);
923 if (timeout) {
924 NXWR32(adapter, CRB_CMDPEG_STATE,
925 PHAN_INITIALIZE_FAILED);
926 return -EINTR;
927 }
928
929 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
930 if (count != old_count)
931 break;
932 }
933
934 /* firmware is dead */
935 if (count == old_count)
936 return 1;
937
938 /* check if we have got newer or different file firmware */
939 if (adapter->fw) {
940
f50330f9 941 val = nx_get_fw_version(adapter);
67c38fc6 942
67c38fc6
DP		 943 version = NETXEN_DECODE_VERSION(val);
944
945 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
946 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
947 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
948
949 if (version > NETXEN_VERSION_CODE(major, minor, build))
950 return 1;
951
f50330f9
AKS		 952 if (version == NETXEN_VERSION_CODE(major, minor, build) &&
953 adapter->fw_type != NX_UNIFIED_ROMIMAGE) {
67c38fc6
DP		 954
955 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
956 fw_type = (val & 0x4) ?
957 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
958
959 if (adapter->fw_type != fw_type)
960 return 1;
961 }
962 }
963
964 return 0;
965}
966
967static char *fw_name[] = {
7e8e5d97
DP		 968 NX_P2_MN_ROMIMAGE_NAME,
969 NX_P3_CT_ROMIMAGE_NAME,
970 NX_P3_MN_ROMIMAGE_NAME,
971 NX_UNIFIED_ROMIMAGE_NAME,
972 NX_FLASH_ROMIMAGE_NAME,
67c38fc6
DP		 973};
974
f7185c71
DP		 975int
976netxen_load_firmware(struct netxen_adapter *adapter)
977{
978 u64 *ptr64;
979 u32 i, flashaddr, size;
980 const struct firmware *fw = adapter->fw;
67c38fc6
DP		 981 struct pci_dev *pdev = adapter->pdev;
982
983 dev_info(&pdev->dev, "loading firmware from %s\n",
984 fw_name[adapter->fw_type]);
f7185c71
DP		 985
986 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
987 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
988
989 if (fw) {
990 __le64 data;
991
992 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
993
f50330f9 994 ptr64 = (u64 *)nx_get_bootld_offs(adapter);
f7185c71
DP		 995 flashaddr = NETXEN_BOOTLD_START;
996
997 for (i = 0; i < size; i++) {
998 data = cpu_to_le64(ptr64[i]);
f50330f9
AKS		 999
1000 if (adapter->pci_mem_write(adapter, flashaddr, data))
1f5e055d
AKS		 1001 return -EIO;
1002
f7185c71
DP		 1003 flashaddr += 8;
1004 }
1005
f50330f9 1006 size = (__force u32)nx_get_fw_size(adapter) / 8;
f7185c71 1007
f50330f9 1008 ptr64 = (u64 *)nx_get_fw_offs(adapter);
f7185c71
DP		 1009 flashaddr = NETXEN_IMAGE_START;
1010
1011 for (i = 0; i < size; i++) {
1012 data = cpu_to_le64(ptr64[i]);
1013
1014 if (adapter->pci_mem_write(adapter,
1f5e055d 1015 flashaddr, data))
f7185c71
DP		 1016 return -EIO;
1017
1018 flashaddr += 8;
1019 }
e270299a
AKS		 1020
1021 size = (__force u32)nx_get_fw_size(adapter) % 8;
1022 if (size) {
1023 data = cpu_to_le64(ptr64[i]);
1024
1025 if (adapter->pci_mem_write(adapter,
1026 flashaddr, data))
1027 return -EIO;
1028 }
1029
f7185c71 1030 } else {
f78c0850
AKS		 1031 u64 data;
1032 u32 hi, lo;
f7185c71 1033
f78c0850 1034 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
f7185c71
DP		 1035 flashaddr = NETXEN_BOOTLD_START;
1036
1037 for (i = 0; i < size; i++) {
1038 if (netxen_rom_fast_read(adapter,
1f5e055d 1039 flashaddr, (int *)&lo) != 0)
f78c0850
AKS		 1040 return -EIO;
1041 if (netxen_rom_fast_read(adapter,
1f5e055d 1042 flashaddr + 4, (int *)&hi) != 0)
f7185c71
DP		 1043 return -EIO;
1044
f78c0850
AKS		 1045 /* hi, lo are already in host endian byteorder */
1046 data = (((u64)hi << 32) | lo);
1047
f7185c71 1048 if (adapter->pci_mem_write(adapter,
1f5e055d 1049 flashaddr, data))
f7185c71
DP		 1050 return -EIO;
1051
f78c0850 1052 flashaddr += 8;
f7185c71
DP		 1053 }
1054 }
1055 msleep(1);
1056
0be367bd
AKS		 1057 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) {
1058 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020);
1059 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e);
1060 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
f7185c71
DP		 1061 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
1062 else {
1063 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
1064 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
1065 }
1066
1067 return 0;
1068}
1069
1070static int
f50330f9 1071netxen_validate_firmware(struct netxen_adapter *adapter)
f7185c71
DP		 1072{
1073 __le32 val;
10c0f2a8 1074 u32 ver, min_ver, bios;
f7185c71
DP		 1075 struct pci_dev *pdev = adapter->pdev;
1076 const struct firmware *fw = adapter->fw;
f50330f9 1077 u8 fw_type = adapter->fw_type;
f7185c71 1078
f50330f9 1079 if (fw_type == NX_UNIFIED_ROMIMAGE) {
10c0f2a8 1080 if (netxen_nic_validate_unified_romimage(adapter))
f50330f9 1081 return -EINVAL;
f50330f9
AKS		 1082 } else {
1083 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
1084 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
1085 return -EINVAL;
f7185c71 1086
10c0f2a8
RB		 1087 if (fw->size < NX_FW_MIN_SIZE)
1088 return -EINVAL;
f50330f9
AKS		 1089 }
1090
f50330f9 1091 val = nx_get_fw_version(adapter);
f7185c71
DP		 1092
1093 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1094 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
1095 else
1096 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
1097
98e31bb0 1098 ver = NETXEN_DECODE_VERSION(val);
f7185c71 1099
98e31bb0 1100 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
f7185c71
DP		 1101 dev_err(&pdev->dev,
1102 "%s: firmware version %d.%d.%d unsupported\n",
f50330f9 1103 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
f7185c71
DP		 1104 return -EINVAL;
1105 }
1106
f50330f9 1107 val = nx_get_bios_version(adapter);
f7185c71
DP		 1108 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
1109 if ((__force u32)val != bios) {
1110 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
f50330f9 1111 fw_name[fw_type]);
f7185c71
DP		 1112 return -EINVAL;
1113 }
1114
1115 /* check if flashed firmware is newer */
1116 if (netxen_rom_fast_read(adapter,
1117 NX_FW_VERSION_OFFSET, (int *)&val))
1118 return -EIO;
98e31bb0
DP		 1119 val = NETXEN_DECODE_VERSION(val);
1120 if (val > ver) {
1121 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
f50330f9 1122 fw_name[fw_type]);
f7185c71 1123 return -EINVAL;
98e31bb0 1124 }
f7185c71
DP		 1125
1126 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
1127 return 0;
1128}
1129
f50330f9
AKS		 1130static void
1131nx_get_next_fwtype(struct netxen_adapter *adapter)
1132{
1133 u8 fw_type;
1134
1135 switch (adapter->fw_type) {
1136 case NX_UNKNOWN_ROMIMAGE:
1137 fw_type = NX_UNIFIED_ROMIMAGE;
1138 break;
1139
1140 case NX_UNIFIED_ROMIMAGE:
1141 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id))
1142 fw_type = NX_FLASH_ROMIMAGE;
1143 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1144 fw_type = NX_P2_MN_ROMIMAGE;
1145 else if (netxen_p3_has_mn(adapter))
1146 fw_type = NX_P3_MN_ROMIMAGE;
1147 else
1148 fw_type = NX_P3_CT_ROMIMAGE;
1149 break;
1150
1151 case NX_P3_MN_ROMIMAGE:
1152 fw_type = NX_P3_CT_ROMIMAGE;
1153 break;
1154
1155 case NX_P2_MN_ROMIMAGE:
1156 case NX_P3_CT_ROMIMAGE:
1157 default:
1158 fw_type = NX_FLASH_ROMIMAGE;
1159 break;
1160 }
1161
1162 adapter->fw_type = fw_type;
1163}
1164
6598b169
DP		 1165static int
1166netxen_p3_has_mn(struct netxen_adapter *adapter)
f7185c71
DP		 1167{
1168 u32 capability, flashed_ver;
f7185c71
DP		 1169 capability = 0;
1170
634d7df8
DP		 1171 /* NX2031 always had MN */
1172 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1173 return 1;
1174
f7185c71
DP		 1175 netxen_rom_fast_read(adapter,
1176 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
98e31bb0
DP		 1177 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
1178
f7185c71 1179 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
6598b169 1180
f7185c71 1181 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
6598b169
DP		 1182 if (capability & NX_PEG_TUNE_MN_PRESENT)
1183 return 1;
1184 }
1185 return 0;
1186}
1187
1188void netxen_request_firmware(struct netxen_adapter *adapter)
1189{
6598b169
DP		 1190 struct pci_dev *pdev = adapter->pdev;
1191 int rc = 0;
1192
f50330f9 1193 adapter->fw_type = NX_UNKNOWN_ROMIMAGE;
f7185c71 1194
f50330f9
AKS		 1195next:
1196 nx_get_next_fwtype(adapter);
f7185c71 1197
f50330f9 1198 if (adapter->fw_type == NX_FLASH_ROMIMAGE) {
f7185c71 1199 adapter->fw = NULL;
f50330f9
AKS		 1200 } else {
1201 rc = request_firmware(&adapter->fw,
1202 fw_name[adapter->fw_type], &pdev->dev);
1203 if (rc != 0)
1204 goto next;
1205
1206 rc = netxen_validate_firmware(adapter);
1207 if (rc != 0) {
1208 release_firmware(adapter->fw);
f7185c71 1209 msleep(1);
f50330f9 1210 goto next;
f7185c71 1211 }
f7185c71 1212 }
f7185c71
DP		 1213}
1214
1215
1216void
1217netxen_release_firmware(struct netxen_adapter *adapter)
1218{
1219 if (adapter->fw)
1220 release_firmware(adapter->fw);
db4cfd8a 1221 adapter->fw = NULL;
f7185c71
DP		 1222}
1223
83ac51fa 1224int netxen_init_dummy_dma(struct netxen_adapter *adapter)
ed25ffa1 1225{
83ac51fa
DP		 1226 u64 addr;
1227 u32 hi, lo;
ed25ffa1 1228
83ac51fa
DP		 1229 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1230 return 0;
1231
1232 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
ed25ffa1
AK		 1233 NETXEN_HOST_DUMMY_DMA_SIZE,
1234 &adapter->dummy_dma.phys_addr);
1235 if (adapter->dummy_dma.addr == NULL) {
83ac51fa
DP		 1236 dev_err(&adapter->pdev->dev,
1237 "ERROR: Could not allocate dummy DMA memory\n");
ed25ffa1
AK		 1238 return -ENOMEM;
1239 }
1240
1241 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1242 hi = (addr >> 32) & 0xffffffff;
1243 lo = addr & 0xffffffff;
1244
f98a9f69
DP		 1245 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1246 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
ed25ffa1
AK		 1247
1248 return 0;
1249}
1250
83ac51fa
DP		 1251/*
1252 * NetXen DMA watchdog control:
1253 *
1254 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
1255 * Bit 1 : disable_request => 1 req disable dma watchdog
1256 * Bit 2 : enable_request => 1 req enable dma watchdog
1257 * Bit 3-31 : unused
1258 */
1259void netxen_free_dummy_dma(struct netxen_adapter *adapter)
ed25ffa1 1260{
15eef1e1 1261 int i = 100;
83ac51fa
DP		 1262 u32 ctrl;
1263
1264 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1265 return;
15eef1e1
DP		 1266
1267 if (!adapter->dummy_dma.addr)
1268 return;
439b454e 1269
83ac51fa
DP		 1270 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1271 if ((ctrl & 0x1) != 0) {
1272 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
1273
1274 while ((ctrl & 0x1) != 0) {
1275
439b454e 1276 msleep(50);
83ac51fa
DP		 1277
1278 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1279
1280 if (--i == 0)
439b454e 1281 break;
83ac51fa 1282 };
15eef1e1 1283 }
439b454e 1284
15eef1e1
DP		 1285 if (i) {
1286 pci_free_consistent(adapter->pdev,
1287 NETXEN_HOST_DUMMY_DMA_SIZE,
1288 adapter->dummy_dma.addr,
1289 adapter->dummy_dma.phys_addr);
1290 adapter->dummy_dma.addr = NULL;
83ac51fa
DP		 1291 } else
1292 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
ed25ffa1
AK		 1293}
1294
96acb6eb 1295int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 1296{
1297 u32 val = 0;
2956640d 1298 int retries = 60;
3d396eb1 1299
96f2ebd2
DP		 1300 if (pegtune_val)
1301 return 0;
1302
1303 do {
1304 val = NXRD32(adapter, CRB_CMDPEG_STATE);
96acb6eb 1305
96f2ebd2
DP		 1306 switch (val) {
1307 case PHAN_INITIALIZE_COMPLETE:
1308 case PHAN_INITIALIZE_ACK:
1309 return 0;
1310 case PHAN_INITIALIZE_FAILED:
1311 goto out_err;
1312 default:
1313 break;
1314 }
96acb6eb 1315
96f2ebd2 1316 msleep(500);
2956640d 1317
96f2ebd2 1318 } while (--retries);
2956640d 1319
96f2ebd2 1320 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
96acb6eb 1321
96f2ebd2
DP		 1322out_err:
1323 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1324 return -EIO;
3d396eb1
AK		 1325}
1326
56a00787
DP		 1327static int
1328netxen_receive_peg_ready(struct netxen_adapter *adapter)
2956640d
DP		 1329{
1330 u32 val = 0;
1331 int retries = 2000;
1332
1333 do {
f98a9f69 1334 val = NXRD32(adapter, CRB_RCVPEG_STATE);
2956640d
DP		 1335
1336 if (val == PHAN_PEG_RCV_INITIALIZED)
1337 return 0;
1338
1339 msleep(10);
1340
1341 } while (--retries);
1342
1343 if (!retries) {
1344 printk(KERN_ERR "Receive Peg initialization not "
1345 "complete, state: 0x%x.\n", val);
1346 return -EIO;
1347 }
1348
1349 return 0;
1350}
1351
56a00787
DP		 1352int netxen_init_firmware(struct netxen_adapter *adapter)
1353{
1354 int err;
1355
1356 err = netxen_receive_peg_ready(adapter);
1357 if (err)
1358 return err;
1359
f98a9f69 1360 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
f98a9f69
DP		 1361 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1362 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
56a00787 1363
f8e21f8f
AKS		 1364 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1365 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1366
56a00787
DP		 1367 return err;
1368}
1369
3bf26ce3
DP		 1370static void
1371netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1372{
1373 u32 cable_OUI;
1374 u16 cable_len;
1375 u16 link_speed;
1376 u8 link_status, module, duplex, autoneg;
1377 struct net_device *netdev = adapter->netdev;
1378
1379 adapter->has_link_events = 1;
1380
1381 cable_OUI = msg->body[1] & 0xffffffff;
1382 cable_len = (msg->body[1] >> 32) & 0xffff;
1383 link_speed = (msg->body[1] >> 48) & 0xffff;
1384
1385 link_status = msg->body[2] & 0xff;
1386 duplex = (msg->body[2] >> 16) & 0xff;
1387 autoneg = (msg->body[2] >> 24) & 0xff;
1388
1389 module = (msg->body[2] >> 8) & 0xff;
1390 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1391 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1392 netdev->name, cable_OUI, cable_len);
1393 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1394 printk(KERN_INFO "%s: unsupported cable length %d\n",
1395 netdev->name, cable_len);
1396 }
1397
1398 netxen_advert_link_change(adapter, link_status);
1399
1400 /* update link parameters */
1401 if (duplex == LINKEVENT_FULL_DUPLEX)
1402 adapter->link_duplex = DUPLEX_FULL;
1403 else
1404 adapter->link_duplex = DUPLEX_HALF;
1405 adapter->module_type = module;
1406 adapter->link_autoneg = autoneg;
1407 adapter->link_speed = link_speed;
1408}
1409
1410static void
1411netxen_handle_fw_message(int desc_cnt, int index,
1412 struct nx_host_sds_ring *sds_ring)
1413{
1414 nx_fw_msg_t msg;
1415 struct status_desc *desc;
1416 int i = 0, opcode;
1417
1418 while (desc_cnt > 0 && i < 8) {
1419 desc = &sds_ring->desc_head[index];
1420 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1421 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1422
1423 index = get_next_index(index, sds_ring->num_desc);
1424 desc_cnt--;
1425 }
1426
1427 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1428 switch (opcode) {
1429 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1430 netxen_handle_linkevent(sds_ring->adapter, &msg);
1431 break;
1432 default:
1433 break;
1434 }
1435}
1436
d8b100c5
DP		 1437static int
1438netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1439 struct nx_host_rds_ring *rds_ring,
1440 struct netxen_rx_buffer *buffer)
1441{
1442 struct sk_buff *skb;
1443 dma_addr_t dma;
1444 struct pci_dev *pdev = adapter->pdev;
1445
1446 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1447 if (!buffer->skb)
1448 return 1;
1449
1450 skb = buffer->skb;
1451
1452 if (!adapter->ahw.cut_through)
1453 skb_reserve(skb, 2);
1454
1455 dma = pci_map_single(pdev, skb->data,
1456 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1457
1458 if (pci_dma_mapping_error(pdev, dma)) {
1459 dev_kfree_skb_any(skb);
1460 buffer->skb = NULL;
1461 return 1;
1462 }
1463
1464 buffer->skb = skb;
1465 buffer->dma = dma;
1466 buffer->state = NETXEN_BUFFER_BUSY;
1467
1468 return 0;
1469}
1470
d9e651bc
DP		 1471static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1472 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1473{
1474 struct netxen_rx_buffer *buffer;
1475 struct sk_buff *skb;
1476
1477 buffer = &rds_ring->rx_buf_arr[index];
1478
1479 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1480 PCI_DMA_FROMDEVICE);
1481
1482 skb = buffer->skb;
1483 if (!skb)
1484 goto no_skb;
1485
1486 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1487 adapter->stats.csummed++;
1488 skb->ip_summed = CHECKSUM_UNNECESSARY;
1489 } else
1490 skb->ip_summed = CHECKSUM_NONE;
1491
1492 skb->dev = adapter->netdev;
1493
1494 buffer->skb = NULL;
d9e651bc
DP		 1495no_skb:
1496 buffer->state = NETXEN_BUFFER_FREE;
d9e651bc
DP		 1497 return skb;
1498}
1499
d8b100c5 1500static struct netxen_rx_buffer *
9b3ef55c 1501netxen_process_rcv(struct netxen_adapter *adapter,
c1c00ab8
DP		 1502 struct nx_host_sds_ring *sds_ring,
1503 int ring, u64 sts_data0)
3d396eb1 1504{
3176ff3e 1505 struct net_device *netdev = adapter->netdev;
becf46a0 1506 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
3d396eb1
AK		 1507 struct netxen_rx_buffer *buffer;
1508 struct sk_buff *skb;
c1c00ab8
DP		 1509 struct nx_host_rds_ring *rds_ring;
1510 int index, length, cksum, pkt_offset;
3d396eb1 1511
c1c00ab8
DP		 1512 if (unlikely(ring >= adapter->max_rds_rings))
1513 return NULL;
1514
1515 rds_ring = &recv_ctx->rds_rings[ring];
1516
1517 index = netxen_get_sts_refhandle(sts_data0);
1518 if (unlikely(index >= rds_ring->num_desc))
d8b100c5 1519 return NULL;
438627c7 1520
48bfd1e0 1521 buffer = &rds_ring->rx_buf_arr[index];
3d396eb1 1522
c1c00ab8
DP		 1523 length = netxen_get_sts_totallength(sts_data0);
1524 cksum = netxen_get_sts_status(sts_data0);
1525 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1526
d9e651bc
DP		 1527 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1528 if (!skb)
d8b100c5 1529 return buffer;
200eef20 1530
9b3ef55c
DP		 1531 if (length > rds_ring->skb_size)
1532 skb_put(skb, rds_ring->skb_size);
1533 else
1534 skb_put(skb, length);
d9e651bc 1535
9b3ef55c
DP		 1536
1537 if (pkt_offset)
1538 skb_pull(skb, pkt_offset);
ed25ffa1 1539
3d396eb1
AK		 1540 skb->protocol = eth_type_trans(skb, netdev);
1541
a92e9e65 1542 napi_gro_receive(&sds_ring->napi, skb);
d9e651bc 1543
1bb482f8 1544 adapter->stats.rx_pkts++;
0ddc110c 1545 adapter->stats.rxbytes += length;
d8b100c5
DP		 1546
1547 return buffer;
3d396eb1
AK		 1548}
1549
c1c00ab8
DP		 1550#define TCP_HDR_SIZE 20
1551#define TCP_TS_OPTION_SIZE 12
1552#define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1553
1554static struct netxen_rx_buffer *
1555netxen_process_lro(struct netxen_adapter *adapter,
1556 struct nx_host_sds_ring *sds_ring,
1557 int ring, u64 sts_data0, u64 sts_data1)
1558{
1559 struct net_device *netdev = adapter->netdev;
1560 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1561 struct netxen_rx_buffer *buffer;
1562 struct sk_buff *skb;
1563 struct nx_host_rds_ring *rds_ring;
1564 struct iphdr *iph;
1565 struct tcphdr *th;
1566 bool push, timestamp;
1567 int l2_hdr_offset, l4_hdr_offset;
1568 int index;
1569 u16 lro_length, length, data_offset;
1570 u32 seq_number;
1571
1572 if (unlikely(ring > adapter->max_rds_rings))
1573 return NULL;
1574
1575 rds_ring = &recv_ctx->rds_rings[ring];
1576
1577 index = netxen_get_lro_sts_refhandle(sts_data0);
1578 if (unlikely(index > rds_ring->num_desc))
1579 return NULL;
1580
1581 buffer = &rds_ring->rx_buf_arr[index];
1582
1583 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1584 lro_length = netxen_get_lro_sts_length(sts_data0);
1585 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1586 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1587 push = netxen_get_lro_sts_push_flag(sts_data0);
1588 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1589
1590 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1591 if (!skb)
1592 return buffer;
1593
1594 if (timestamp)
1595 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1596 else
1597 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1598
1599 skb_put(skb, lro_length + data_offset);
1600
c1c00ab8
DP		 1601 skb_pull(skb, l2_hdr_offset);
1602 skb->protocol = eth_type_trans(skb, netdev);
1603
1604 iph = (struct iphdr *)skb->data;
1605 th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
1606
1607 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1608 iph->tot_len = htons(length);
1609 iph->check = 0;
1610 iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
1611 th->psh = push;
1612 th->seq = htonl(seq_number);
1613
1bb482f8
NK		 1614 length = skb->len;
1615
c1c00ab8
DP		 1616 netif_receive_skb(skb);
1617
1bb482f8
NK		 1618 adapter->stats.lro_pkts++;
1619 adapter->stats.rxbytes += length;
1620
c1c00ab8
DP		 1621 return buffer;
1622}
1623
d8b100c5
DP		 1624#define netxen_merge_rx_buffers(list, head) \
1625 do { list_splice_tail_init(list, head); } while (0);
1626
becf46a0 1627int
d8b100c5 1628netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
3d396eb1 1629{
d8b100c5
DP		 1630 struct netxen_adapter *adapter = sds_ring->adapter;
1631
1632 struct list_head *cur;
1633
0ddc110c 1634 struct status_desc *desc;
d8b100c5
DP		 1635 struct netxen_rx_buffer *rxbuf;
1636
1637 u32 consumer = sds_ring->consumer;
1638
9b3ef55c 1639 int count = 0;
c1c00ab8
DP		 1640 u64 sts_data0, sts_data1;
1641 int opcode, ring = 0, desc_cnt;
3d396eb1 1642
3d396eb1 1643 while (count < max) {
d8b100c5 1644 desc = &sds_ring->desc_head[consumer];
c1c00ab8 1645 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
0ddc110c 1646
c1c00ab8 1647 if (!(sts_data0 & STATUS_OWNER_HOST))
3d396eb1 1648 break;
d9e651bc 1649
c1c00ab8 1650 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
3bf26ce3 1651
c1c00ab8 1652 opcode = netxen_get_sts_opcode(sts_data0);
d9e651bc 1653
3bf26ce3
DP		 1654 switch (opcode) {
1655 case NETXEN_NIC_RXPKT_DESC:
1656 case NETXEN_OLD_RXPKT_DESC:
6598b169 1657 case NETXEN_NIC_SYN_OFFLOAD:
c1c00ab8
DP		 1658 ring = netxen_get_sts_type(sts_data0);
1659 rxbuf = netxen_process_rcv(adapter, sds_ring,
1660 ring, sts_data0);
1661 break;
1662 case NETXEN_NIC_LRO_DESC:
1663 ring = netxen_get_lro_sts_type(sts_data0);
1664 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1665 rxbuf = netxen_process_lro(adapter, sds_ring,
1666 ring, sts_data0, sts_data1);
3bf26ce3
DP		 1667 break;
1668 case NETXEN_NIC_RESPONSE_DESC:
1669 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1670 default:
1671 goto skip;
1672 }
1673
1674 WARN_ON(desc_cnt > 1);
1675
d8b100c5
DP		 1676 if (rxbuf)
1677 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1678
3bf26ce3
DP		 1679skip:
1680 for (; desc_cnt > 0; desc_cnt--) {
1681 desc = &sds_ring->desc_head[consumer];
1682 desc->status_desc_data[0] =
1683 cpu_to_le64(STATUS_OWNER_PHANTOM);
1684 consumer = get_next_index(consumer, sds_ring->num_desc);
1685 }
3d396eb1
AK		 1686 count++;
1687 }
0ddc110c 1688
d8b100c5
DP		 1689 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1690 struct nx_host_rds_ring *rds_ring =
1691 &adapter->recv_ctx.rds_rings[ring];
1692
1693 if (!list_empty(&sds_ring->free_list[ring])) {
1694 list_for_each(cur, &sds_ring->free_list[ring]) {
1695 rxbuf = list_entry(cur,
1696 struct netxen_rx_buffer, list);
1697 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1698 }
1699 spin_lock(&rds_ring->lock);
1700 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1701 &rds_ring->free_list);
1702 spin_unlock(&rds_ring->lock);
1703 }
1704
1705 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1706 }
3d396eb1 1707
3d396eb1 1708 if (count) {
d8b100c5 1709 sds_ring->consumer = consumer;
195c5f98 1710 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
3d396eb1
AK		 1711 }
1712
1713 return count;
1714}
1715
1716/* Process Command status ring */
05aaa02d 1717int netxen_process_cmd_ring(struct netxen_adapter *adapter)
3d396eb1 1718{
d877f1e3 1719 u32 sw_consumer, hw_consumer;
ba53e6b4 1720 int count = 0, i;
3d396eb1 1721 struct netxen_cmd_buffer *buffer;
ba53e6b4
DP		 1722 struct pci_dev *pdev = adapter->pdev;
1723 struct net_device *netdev = adapter->netdev;
3d396eb1 1724 struct netxen_skb_frag *frag;
ba53e6b4 1725 int done = 0;
4ea528a1 1726 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
3d396eb1 1727
d8b100c5
DP		 1728 if (!spin_trylock(&adapter->tx_clean_lock))
1729 return 1;
1730
d877f1e3 1731 sw_consumer = tx_ring->sw_consumer;
d877f1e3 1732 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
3d396eb1 1733
d877f1e3
DP		 1734 while (sw_consumer != hw_consumer) {
1735 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
53a01e00 1736 if (buffer->skb) {
1737 frag = &buffer->frag_array[0];
3d396eb1
AK		 1738 pci_unmap_single(pdev, frag->dma, frag->length,
1739 PCI_DMA_TODEVICE);
96acb6eb 1740 frag->dma = 0ULL;
3d396eb1 1741 for (i = 1; i < buffer->frag_count; i++) {
3d396eb1
AK		 1742 frag++; /* Get the next frag */
1743 pci_unmap_page(pdev, frag->dma, frag->length,
1744 PCI_DMA_TODEVICE);
96acb6eb 1745 frag->dma = 0ULL;
3d396eb1
AK		 1746 }
1747
ba53e6b4 1748 adapter->stats.xmitfinished++;
53a01e00 1749 dev_kfree_skb_any(buffer->skb);
1750 buffer->skb = NULL;
3d396eb1
AK		 1751 }
1752
d877f1e3 1753 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
ba53e6b4
DP		 1754 if (++count >= MAX_STATUS_HANDLE)
1755 break;
3d396eb1 1756 }
3d396eb1 1757
22527864 1758 if (count && netif_running(netdev)) {
cb2107be
DP		 1759 tx_ring->sw_consumer = sw_consumer;
1760
ba53e6b4 1761 smp_mb();
cb2107be 1762
7a9905e6
RB		 1763 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev))
1764 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
cb2107be 1765 netif_wake_queue(netdev);
7a9905e6 1766 adapter->tx_timeo_cnt = 0;
3d396eb1 1767 }
ed25ffa1
AK		 1768 /*
1769 * If everything is freed up to consumer then check if the ring is full
1770 * If the ring is full then check if more needs to be freed and
1771 * schedule the call back again.
1772 *
1773 * This happens when there are 2 CPUs. One could be freeing and the
1774 * other filling it. If the ring is full when we get out of here and
1775 * the card has already interrupted the host then the host can miss the
1776 * interrupt.
1777 *
1778 * There is still a possible race condition and the host could miss an
1779 * interrupt. The card has to take care of this.
1780 */
d877f1e3
DP		 1781 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1782 done = (sw_consumer == hw_consumer);
d8b100c5 1783 spin_unlock(&adapter->tx_clean_lock);
3d396eb1 1784
807540ba 1785 return done;
3d396eb1
AK		 1786}
1787
becf46a0 1788void
d8b100c5
DP		 1789netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1790 struct nx_host_rds_ring *rds_ring)
3d396eb1 1791{
3d396eb1
AK		 1792 struct rcv_desc *pdesc;
1793 struct netxen_rx_buffer *buffer;
d8b100c5 1794 int producer, count = 0;
ed25ffa1 1795 netxen_ctx_msg msg = 0;
d9e651bc 1796 struct list_head *head;
3d396eb1 1797
48bfd1e0 1798 producer = rds_ring->producer;
d9e651bc 1799
d8b100c5 1800 head = &rds_ring->free_list;
d9e651bc
DP		 1801 while (!list_empty(head)) {
1802
d8b100c5 1803 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
6f703406 1804
d8b100c5
DP		 1805 if (!buffer->skb) {
1806 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1807 break;
6f703406
DP		 1808 }
1809
1810 count++;
d9e651bc
DP		 1811 list_del(&buffer->list);
1812
ed25ffa1 1813 /* make a rcv descriptor */
6f703406 1814 pdesc = &rds_ring->desc_head[producer];
d8b100c5 1815 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
ed33ebe4 1816 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1817 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
6f703406 1818
438627c7 1819 producer = get_next_index(producer, rds_ring->num_desc);
ed25ffa1 1820 }
9b3ef55c 1821
ed25ffa1 1822 if (count) {
48bfd1e0 1823 rds_ring->producer = producer;
195c5f98 1824 NXWRIO(adapter, rds_ring->crb_rcv_producer,
438627c7 1825 (producer-1) & (rds_ring->num_desc-1));
48bfd1e0 1826
4f96b988 1827 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
ed25ffa1
AK		 1828 /*
1829 * Write a doorbell msg to tell phanmon of change in
1830 * receive ring producer
48bfd1e0 1831 * Only for firmware version < 4.0.0
ed25ffa1
AK		 1832 */
1833 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1834 netxen_set_msg_privid(msg);
1835 netxen_set_msg_count(msg,
438627c7
DP		 1836 ((producer - 1) &
1837 (rds_ring->num_desc - 1)));
3176ff3e 1838 netxen_set_msg_ctxid(msg, adapter->portnum);
ed25ffa1 1839 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
f03b0ebd
DP		 1840 NXWRIO(adapter, DB_NORMALIZE(adapter,
1841 NETXEN_RCV_PRODUCER_OFFSET), msg);
48bfd1e0 1842 }
ed25ffa1
AK		 1843 }
1844}
1845
becf46a0 1846static void
d8b100c5
DP		 1847netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1848 struct nx_host_rds_ring *rds_ring)
ed25ffa1 1849{
ed25ffa1
AK		 1850 struct rcv_desc *pdesc;
1851 struct netxen_rx_buffer *buffer;
d8b100c5 1852 int producer, count = 0;
d9e651bc 1853 struct list_head *head;
ed25ffa1 1854
d8b100c5
DP		 1855 if (!spin_trylock(&rds_ring->lock))
1856 return;
1857
2227bae2
AKS		 1858 producer = rds_ring->producer;
1859
d9e651bc 1860 head = &rds_ring->free_list;
d9e651bc
DP		 1861 while (!list_empty(head)) {
1862
d8b100c5 1863 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
6f703406 1864
d8b100c5
DP		 1865 if (!buffer->skb) {
1866 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1867 break;
6f703406
DP		 1868 }
1869
1870 count++;
d9e651bc
DP		 1871 list_del(&buffer->list);
1872
3d396eb1 1873 /* make a rcv descriptor */
6f703406 1874 pdesc = &rds_ring->desc_head[producer];
ed33ebe4 1875 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1876 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
3d396eb1 1877 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
6f703406 1878
438627c7 1879 producer = get_next_index(producer, rds_ring->num_desc);
3d396eb1
AK		 1880 }
1881
3d396eb1 1882 if (count) {
48bfd1e0 1883 rds_ring->producer = producer;
195c5f98 1884 NXWRIO(adapter, rds_ring->crb_rcv_producer,
438627c7 1885 (producer - 1) & (rds_ring->num_desc - 1));
3d396eb1 1886 }
d8b100c5 1887 spin_unlock(&rds_ring->lock);
3d396eb1
AK		 1888}
1889
3d396eb1
AK		 1890void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1891{
3d396eb1 1892 memset(&adapter->stats, 0, sizeof(adapter->stats));
3d396eb1
AK		 1893}
1894
Linux kernel - Deliverables
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