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NetXen: Firmware crb init changes.
[deliverable/linux.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1
AK		 1/*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
80922fbc 4 *
3d396eb1
AK		 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
80922fbc 9 *
3d396eb1
AK		 10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
80922fbc 14 *
3d396eb1
AK		 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
80922fbc 19 *
3d396eb1
AK		 20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
80922fbc 22 *
3d396eb1
AK		 23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34#include <linux/netdevice.h>
35#include <linux/delay.h>
36#include "netxen_nic.h"
37#include "netxen_nic_hw.h"
3d396eb1
AK		 38#include "netxen_nic_phan_reg.h"
39
40struct crb_addr_pair {
41 long addr;
42 long data;
43};
44
45#define NETXEN_MAX_CRB_XFORM 60
46static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
47#define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff )
48
49#define crb_addr_transform(name) \
50 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
51 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
52
cb8011ad
AK		 53#define NETXEN_NIC_XDMA_RESET 0x8000ff
54
3d396eb1
AK		 55static inline void
56netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
57 unsigned long off, int *data)
58{
cb8011ad 59 void __iomem *addr = pci_base_offset(adapter, off);
3d396eb1
AK		 60 writel(*data, addr);
61}
62
63static void crb_addr_transform_setup(void)
64{
65 crb_addr_transform(XDMA);
66 crb_addr_transform(TIMR);
67 crb_addr_transform(SRE);
68 crb_addr_transform(SQN3);
69 crb_addr_transform(SQN2);
70 crb_addr_transform(SQN1);
71 crb_addr_transform(SQN0);
72 crb_addr_transform(SQS3);
73 crb_addr_transform(SQS2);
74 crb_addr_transform(SQS1);
75 crb_addr_transform(SQS0);
76 crb_addr_transform(RPMX7);
77 crb_addr_transform(RPMX6);
78 crb_addr_transform(RPMX5);
79 crb_addr_transform(RPMX4);
80 crb_addr_transform(RPMX3);
81 crb_addr_transform(RPMX2);
82 crb_addr_transform(RPMX1);
83 crb_addr_transform(RPMX0);
84 crb_addr_transform(ROMUSB);
85 crb_addr_transform(SN);
86 crb_addr_transform(QMN);
87 crb_addr_transform(QMS);
88 crb_addr_transform(PGNI);
89 crb_addr_transform(PGND);
90 crb_addr_transform(PGN3);
91 crb_addr_transform(PGN2);
92 crb_addr_transform(PGN1);
93 crb_addr_transform(PGN0);
94 crb_addr_transform(PGSI);
95 crb_addr_transform(PGSD);
96 crb_addr_transform(PGS3);
97 crb_addr_transform(PGS2);
98 crb_addr_transform(PGS1);
99 crb_addr_transform(PGS0);
100 crb_addr_transform(PS);
101 crb_addr_transform(PH);
102 crb_addr_transform(NIU);
103 crb_addr_transform(I2Q);
104 crb_addr_transform(EG);
105 crb_addr_transform(MN);
106 crb_addr_transform(MS);
107 crb_addr_transform(CAS2);
108 crb_addr_transform(CAS1);
109 crb_addr_transform(CAS0);
110 crb_addr_transform(CAM);
111 crb_addr_transform(C2C1);
112 crb_addr_transform(C2C0);
1fcca1a5 113 crb_addr_transform(SMB);
3d396eb1
AK		 114}
115
116int netxen_init_firmware(struct netxen_adapter *adapter)
117{
118 u32 state = 0, loops = 0, err = 0;
119
120 /* Window 1 call */
121 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
122
123 if (state == PHAN_INITIALIZE_ACK)
124 return 0;
125
126 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
127 udelay(100);
128 /* Window 1 call */
129 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
130
131 loops++;
132 }
133 if (loops >= 2000) {
134 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
135 state);
136 err = -EIO;
137 return err;
138 }
139 /* Window 1 call */
ed25ffa1
AK		 140 writel(MPORT_SINGLE_FUNCTION_MODE,
141 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
3d396eb1
AK		 142 writel(PHAN_INITIALIZE_ACK,
143 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
144
145 return err;
146}
147
cb8011ad
AK		 148#define NETXEN_ADDR_LIMIT 0xffffffffULL
149
150void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
151 struct pci_dev **used_dev)
152{
153 void *addr;
154
155 addr = pci_alloc_consistent(pdev, sz, ptr);
156 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
157 *used_dev = pdev;
158 return addr;
159 }
160 pci_free_consistent(pdev, sz, addr, *ptr);
161 addr = pci_alloc_consistent(NULL, sz, ptr);
162 *used_dev = NULL;
163 return addr;
164}
165
3d396eb1
AK		 166void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
167{
168 int ctxid, ring;
169 u32 i;
170 u32 num_rx_bufs = 0;
171 struct netxen_rcv_desc_ctx *rcv_desc;
172
173 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
174 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
175 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
176 struct netxen_rx_buffer *rx_buf;
177 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
178 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
179 rcv_desc->begin_alloc = 0;
180 rx_buf = rcv_desc->rx_buf_arr;
181 num_rx_bufs = rcv_desc->max_rx_desc_count;
182 /*
183 * Now go through all of them, set reference handles
184 * and put them in the queues.
185 */
186 for (i = 0; i < num_rx_bufs; i++) {
187 rx_buf->ref_handle = i;
188 rx_buf->state = NETXEN_BUFFER_FREE;
3d396eb1
AK		 189 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
190 "%p\n", ctxid, i, rx_buf);
191 rx_buf++;
192 }
193 }
194 }
3d396eb1
AK		 195}
196
197void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
198{
cb8011ad
AK		 199 int ports = 0;
200 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
201
3d396eb1
AK		 202 if (netxen_nic_get_board_info(adapter) != 0)
203 printk("%s: Error getting board config info.\n",
204 netxen_nic_driver_name);
cb8011ad
AK		 205 get_brd_port_by_type(board_info->board_type, &ports);
206 if (ports == 0)
3d396eb1
AK		 207 printk(KERN_ERR "%s: Unknown board type\n",
208 netxen_nic_driver_name);
cb8011ad 209 adapter->ahw.max_ports = ports;
3d396eb1
AK		 210}
211
212void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
213{
3d396eb1
AK		 214 switch (adapter->ahw.board_type) {
215 case NETXEN_NIC_GBE:
80922fbc 216 adapter->enable_phy_interrupts =
3d396eb1 217 netxen_niu_gbe_enable_phy_interrupts;
80922fbc 218 adapter->disable_phy_interrupts =
3d396eb1 219 netxen_niu_gbe_disable_phy_interrupts;
80922fbc
AK		 220 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
221 adapter->macaddr_set = netxen_niu_macaddr_set;
222 adapter->set_mtu = netxen_nic_set_mtu_gb;
223 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
224 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
225 adapter->phy_read = netxen_niu_gbe_phy_read;
226 adapter->phy_write = netxen_niu_gbe_phy_write;
227 adapter->init_port = netxen_niu_gbe_init_port;
228 adapter->init_niu = netxen_nic_init_niu_gb;
229 adapter->stop_port = netxen_niu_disable_gbe_port;
3d396eb1
AK		 230 break;
231
232 case NETXEN_NIC_XGBE:
80922fbc 233 adapter->enable_phy_interrupts =
3d396eb1 234 netxen_niu_xgbe_enable_phy_interrupts;
80922fbc 235 adapter->disable_phy_interrupts =
3d396eb1 236 netxen_niu_xgbe_disable_phy_interrupts;
80922fbc
AK		 237 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
238 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
239 adapter->set_mtu = netxen_nic_set_mtu_xgb;
240 adapter->init_port = netxen_niu_xg_init_port;
241 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
242 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
243 adapter->stop_port = netxen_niu_disable_xg_port;
3d396eb1
AK		 244 break;
245
246 default:
247 break;
248 }
249}
250
251/*
252 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
253 * address to external PCI CRB address.
254 */
255unsigned long netxen_decode_crb_addr(unsigned long addr)
256{
257 int i;
258 unsigned long base_addr, offset, pci_base;
259
260 crb_addr_transform_setup();
261
262 pci_base = NETXEN_ADDR_ERROR;
263 base_addr = addr & 0xfff00000;
264 offset = addr & 0x000fffff;
265
266 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
267 if (crb_addr_xform[i] == base_addr) {
268 pci_base = i << 20;
269 break;
270 }
271 }
272 if (pci_base == NETXEN_ADDR_ERROR)
273 return pci_base;
274 else
275 return (pci_base + offset);
276}
277
278static long rom_max_timeout = 10000;
279static long rom_lock_timeout = 1000000;
280
281static inline int rom_lock(struct netxen_adapter *adapter)
282{
283 int iter;
284 u32 done = 0;
285 int timeout = 0;
286
287 while (!done) {
288 /* acquire semaphore2 from PCI HW block */
289 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
290 &done);
291 if (done == 1)
292 break;
293 if (timeout >= rom_lock_timeout)
294 return -EIO;
295
296 timeout++;
297 /*
298 * Yield CPU
299 */
300 if (!in_atomic())
301 schedule();
302 else {
303 for (iter = 0; iter < 20; iter++)
304 cpu_relax(); /*This a nop instr on i386 */
305 }
306 }
307 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
308 return 0;
309}
310
3d396eb1
AK		 311int netxen_wait_rom_done(struct netxen_adapter *adapter)
312{
313 long timeout = 0;
314 long done = 0;
315
316 while (done == 0) {
317 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
318 done &= 2;
319 timeout++;
320 if (timeout >= rom_max_timeout) {
321 printk("Timeout reached waiting for rom done");
322 return -EIO;
323 }
324 }
325 return 0;
326}
327
cb8011ad
AK		 328static inline int netxen_rom_wren(struct netxen_adapter *adapter)
329{
330 /* Set write enable latch in ROM status register */
331 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
332 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
333 M25P_INSTR_WREN);
334 if (netxen_wait_rom_done(adapter)) {
335 return -1;
336 }
337 return 0;
338}
339
340static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
341 unsigned int addr)
342{
343 unsigned int data = 0xdeaddead;
344 data = netxen_nic_reg_read(adapter, addr);
345 return data;
346}
347
348static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
349{
350 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
351 M25P_INSTR_RDSR);
352 if (netxen_wait_rom_done(adapter)) {
353 return -1;
354 }
355 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
356}
357
358static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
359{
360 u32 val;
361
362 /* release semaphore2 */
363 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
364
365}
366
367int netxen_rom_wip_poll(struct netxen_adapter *adapter)
368{
369 long timeout = 0;
370 long wip = 1;
371 int val;
372 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
373 while (wip != 0) {
374 val = netxen_do_rom_rdsr(adapter);
375 wip = val & 1;
376 timeout++;
377 if (timeout > rom_max_timeout) {
378 return -1;
379 }
380 }
381 return 0;
382}
383
80922fbc
AK		 384static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
385 int data)
cb8011ad
AK		 386{
387 if (netxen_rom_wren(adapter)) {
388 return -1;
389 }
390 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
391 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
392 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
393 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
394 M25P_INSTR_PP);
395 if (netxen_wait_rom_done(adapter)) {
396 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
397 return -1;
398 }
399
400 return netxen_rom_wip_poll(adapter);
401}
402
3d396eb1
AK		 403static inline int
404do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
405{
406 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
407 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
408 udelay(100); /* prevent bursting on CRB */
409 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
410 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
411 if (netxen_wait_rom_done(adapter)) {
412 printk("Error waiting for rom done\n");
413 return -EIO;
414 }
415 /* reset abyte_cnt and dummy_byte_cnt */
416 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
417 udelay(100); /* prevent bursting on CRB */
418 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
419
420 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
421 return 0;
422}
423
424int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
425{
426 int ret;
427
428 if (rom_lock(adapter) != 0)
429 return -EIO;
430
431 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 432 netxen_rom_unlock(adapter);
433 return ret;
434}
435
436int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
437{
438 int ret = 0;
439
440 if (rom_lock(adapter) != 0) {
441 return -1;
442 }
443 ret = do_rom_fast_write(adapter, addr, data);
444 netxen_rom_unlock(adapter);
445 return ret;
446}
447int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
448{
449 netxen_rom_wren(adapter);
450 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
451 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
452 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
453 M25P_INSTR_SE);
454 if (netxen_wait_rom_done(adapter)) {
455 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
456 return -1;
457 }
458 return netxen_rom_wip_poll(adapter);
459}
460
461int netxen_rom_se(struct netxen_adapter *adapter, int addr)
462{
463 int ret = 0;
464 if (rom_lock(adapter) != 0) {
465 return -1;
466 }
467 ret = netxen_do_rom_se(adapter, addr);
468 netxen_rom_unlock(adapter);
3d396eb1
AK		 469 return ret;
470}
471
472#define NETXEN_BOARDTYPE 0x4008
473#define NETXEN_BOARDNUM 0x400c
474#define NETXEN_CHIPNUM 0x4010
475#define NETXEN_ROMBUS_RESET 0xFFFFFFFF
476#define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
477#define NETXEN_ROM_FOUND_INIT 0x400
478
479int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
480{
481 int addr, val, status;
482 int n, i;
483 int init_delay = 0;
484 struct crb_addr_pair *buf;
485 unsigned long off;
486
487 /* resetall */
488 status = netxen_nic_get_board_info(adapter);
489 if (status)
cb8011ad 490 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
3d396eb1
AK		 491 netxen_nic_driver_name);
492
493 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
494 NETXEN_ROMBUS_RESET);
495
496 if (verbose) {
497 int val;
498 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
499 printk("P2 ROM board type: 0x%08x\n", val);
500 else
501 printk("Could not read board type\n");
502 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
503 printk("P2 ROM board num: 0x%08x\n", val);
504 else
505 printk("Could not read board number\n");
506 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
507 printk("P2 ROM chip num: 0x%08x\n", val);
508 else
509 printk("Could not read chip number\n");
510 }
511
512 if (netxen_rom_fast_read(adapter, 0, &n) == 0
513 && (n & NETXEN_ROM_FIRST_BARRIER)) {
514 n &= ~NETXEN_ROM_ROUNDUP;
515 if (n < NETXEN_ROM_FOUND_INIT) {
516 if (verbose)
517 printk("%s: %d CRB init values found"
518 " in ROM.\n", netxen_nic_driver_name, n);
519 } else {
520 printk("%s:n=0x%x Error! NetXen card flash not"
521 " initialized.\n", __FUNCTION__, n);
522 return -EIO;
523 }
524 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
525 if (buf == NULL) {
cb8011ad
AK		 526 printk("%s: netxen_pinit_from_rom: Unable to calloc "
527 "memory.\n", netxen_nic_driver_name);
3d396eb1
AK		 528 return -ENOMEM;
529 }
530 for (i = 0; i < n; i++) {
531 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
532 || netxen_rom_fast_read(adapter, 8 * i + 8,
533 &addr) != 0)
534 return -EIO;
535
536 buf[i].addr = addr;
537 buf[i].data = val;
538
539 if (verbose)
540 printk("%s: PCI: 0x%08x == 0x%08x\n",
541 netxen_nic_driver_name, (unsigned int)
542 netxen_decode_crb_addr((unsigned long)
543 addr), val);
544 }
545 for (i = 0; i < n; i++) {
546
1fcca1a5
AK		 547 off = netxen_decode_crb_addr((unsigned long)buf[i].addr);
548 if (off == NETXEN_ADDR_ERROR) {
549 printk(KERN_ERR"CRB init value out of range %lx\n",
550 buf[i].addr);
551 continue;
552 }
553 off += NETXEN_PCI_CRBSPACE;
3d396eb1
AK		 554 /* skipping cold reboot MAGIC */
555 if (off == NETXEN_CAM_RAM(0x1fc))
556 continue;
557
558 /* After writing this register, HW needs time for CRB */
559 /* to quiet down (else crb_window returns 0xffffffff) */
560 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
561 init_delay = 1;
562 /* hold xdma in reset also */
cb8011ad 563 buf[i].data = NETXEN_NIC_XDMA_RESET;
3d396eb1
AK		 564 }
565
566 if (ADDR_IN_WINDOW1(off)) {
567 writel(buf[i].data,
568 NETXEN_CRB_NORMALIZE(adapter, off));
569 } else {
570 netxen_nic_pci_change_crbwindow(adapter, 0);
571 writel(buf[i].data,
cb8011ad 572 pci_base_offset(adapter, off));
3d396eb1
AK		 573
574 netxen_nic_pci_change_crbwindow(adapter, 1);
575 }
576 if (init_delay == 1) {
577 ssleep(1);
578 init_delay = 0;
579 }
580 msleep(1);
581 }
582 kfree(buf);
583
584 /* disable_peg_cache_all */
585
586 /* unreset_net_cache */
587 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
588 4);
589 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
590 (val & 0xffffff0f));
591 /* p2dn replyCount */
592 netxen_crb_writelit_adapter(adapter,
593 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
594 /* disable_peg_cache 0 */
595 netxen_crb_writelit_adapter(adapter,
596 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
597 /* disable_peg_cache 1 */
598 netxen_crb_writelit_adapter(adapter,
599 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
600
601 /* peg_clr_all */
602
603 /* peg_clr 0 */
604 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
605 0);
606 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
607 0);
608 /* peg_clr 1 */
609 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
610 0);
611 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
612 0);
613 /* peg_clr 2 */
614 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
615 0);
616 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
617 0);
618 /* peg_clr 3 */
619 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
620 0);
621 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
622 0);
623 }
624 return 0;
625}
626
ed25ffa1
AK		 627int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
628{
629 uint64_t addr;
630 uint32_t hi;
631 uint32_t lo;
632
633 adapter->dummy_dma.addr =
634 pci_alloc_consistent(adapter->ahw.pdev,
635 NETXEN_HOST_DUMMY_DMA_SIZE,
636 &adapter->dummy_dma.phys_addr);
637 if (adapter->dummy_dma.addr == NULL) {
638 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
639 __FUNCTION__);
640 return -ENOMEM;
641 }
642
643 addr = (uint64_t) adapter->dummy_dma.phys_addr;
644 hi = (addr >> 32) & 0xffffffff;
645 lo = addr & 0xffffffff;
646
647 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
648 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
649
650 return 0;
651}
652
653void netxen_free_adapter_offload(struct netxen_adapter *adapter)
654{
655 if (adapter->dummy_dma.addr) {
656 pci_free_consistent(adapter->ahw.pdev,
657 NETXEN_HOST_DUMMY_DMA_SIZE,
658 adapter->dummy_dma.addr,
659 adapter->dummy_dma.phys_addr);
660 adapter->dummy_dma.addr = NULL;
661 }
662}
663
cb8011ad 664void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 665{
666 u32 val = 0;
667 int loops = 0;
668
cb8011ad 669 if (!pegtune_val) {
1fcca1a5 670 val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
3d396eb1
AK		 671 while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
672 udelay(100);
cb8011ad 673 schedule();
3d396eb1
AK		 674 val =
675 readl(NETXEN_CRB_NORMALIZE
676 (adapter, CRB_CMDPEG_STATE));
677 loops++;
678 }
679 if (val != PHAN_INITIALIZE_COMPLETE)
680 printk("WARNING: Initial boot wait loop failed...\n");
681 }
682}
683
684int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
685{
686 int ctx;
687
688 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
689 struct netxen_recv_context *recv_ctx =
690 &(adapter->recv_ctx[ctx]);
691 u32 consumer;
692 struct status_desc *desc_head;
cb8011ad 693 struct status_desc *desc;
3d396eb1
AK		 694
695 consumer = recv_ctx->status_rx_consumer;
696 desc_head = recv_ctx->rcv_status_desc_head;
697 desc = &desc_head[consumer];
698
a608ab9c 699 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
3d396eb1
AK		 700 return 1;
701 }
702
703 return 0;
704}
705
cb8011ad
AK		 706static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
707{
708 int port_num;
709 struct netxen_port *port;
710 struct net_device *netdev;
711 uint32_t temp, temp_state, temp_val;
712 int rv = 0;
713
714 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
715
716 temp_state = nx_get_temp_state(temp);
717 temp_val = nx_get_temp_val(temp);
718
719 if (temp_state == NX_TEMP_PANIC) {
720 printk(KERN_ALERT
721 "%s: Device temperature %d degrees C exceeds"
722 " maximum allowed. Hardware has been shut down.\n",
723 netxen_nic_driver_name, temp_val);
724 for (port_num = 0; port_num < adapter->ahw.max_ports;
725 port_num++) {
726 port = adapter->port[port_num];
727 netdev = port->netdev;
728
729 netif_carrier_off(netdev);
730 netif_stop_queue(netdev);
731 }
732 rv = 1;
733 } else if (temp_state == NX_TEMP_WARN) {
734 if (adapter->temp == NX_TEMP_NORMAL) {
735 printk(KERN_ALERT
736 "%s: Device temperature %d degrees C "
737 "exceeds operating range."
738 " Immediate action needed.\n",
739 netxen_nic_driver_name, temp_val);
740 }
741 } else {
742 if (adapter->temp == NX_TEMP_WARN) {
743 printk(KERN_INFO
744 "%s: Device temperature is now %d degrees C"
745 " in normal range.\n", netxen_nic_driver_name,
746 temp_val);
747 }
748 }
749 adapter->temp = temp_state;
750 return rv;
751}
752
6d5aefb8 753void netxen_watchdog_task(struct work_struct *work)
3d396eb1
AK		 754{
755 int port_num;
756 struct netxen_port *port;
757 struct net_device *netdev;
6d5aefb8
DH		 758 struct netxen_adapter *adapter =
759 container_of(work, struct netxen_adapter, watchdog_task);
3d396eb1 760
cb8011ad
AK		 761 if (netxen_nic_check_temp(adapter))
762 return;
763
3d396eb1
AK		 764 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
765 port = adapter->port[port_num];
766 netdev = port->netdev;
767
768 if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
769 printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
770 netxen_nic_driver_name, port_num, netdev->name);
771 netif_carrier_on(netdev);
772 }
773
774 if (netif_queue_stopped(netdev))
775 netif_wake_queue(netdev);
776 }
777
80922fbc
AK		 778 if (adapter->handle_phy_intr)
779 adapter->handle_phy_intr(adapter);
3d396eb1
AK		 780 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
781}
782
783/*
784 * netxen_process_rcv() send the received packet to the protocol stack.
785 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
786 * invoke the routine to send more rx buffers to the Phantom...
787 */
788void
789netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
790 struct status_desc *desc)
791{
ed25ffa1 792 struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)];
3d396eb1
AK		 793 struct pci_dev *pdev = port->pdev;
794 struct net_device *netdev = port->netdev;
a608ab9c 795 int index = netxen_get_sts_refhandle(desc);
3d396eb1
AK		 796 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
797 struct netxen_rx_buffer *buffer;
798 struct sk_buff *skb;
a608ab9c 799 u32 length = netxen_get_sts_totallength(desc);
3d396eb1
AK		 800 u32 desc_ctx;
801 struct netxen_rcv_desc_ctx *rcv_desc;
802 int ret;
803
ed25ffa1 804 desc_ctx = netxen_get_sts_type(desc);
3d396eb1
AK		 805 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
806 printk("%s: %s Bad Rcv descriptor ring\n",
807 netxen_nic_driver_name, netdev->name);
808 return;
809 }
810
811 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
ed25ffa1
AK		 812 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
813 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
814 index, rcv_desc->max_rx_desc_count);
815 return;
816 }
3d396eb1 817 buffer = &rcv_desc->rx_buf_arr[index];
ed25ffa1
AK		 818 if (desc_ctx == RCV_DESC_LRO_CTXID) {
819 buffer->lro_current_frags++;
820 if (netxen_get_sts_desc_lro_last_frag(desc)) {
821 buffer->lro_expected_frags =
822 netxen_get_sts_desc_lro_cnt(desc);
823 buffer->lro_length = length;
824 }
825 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
826 if (buffer->lro_expected_frags != 0) {
827 printk("LRO: (refhandle:%x) recv frag."
828 "wait for last. flags: %x expected:%d"
829 "have:%d\n", index,
830 netxen_get_sts_desc_lro_last_frag(desc),
831 buffer->lro_expected_frags,
832 buffer->lro_current_frags);
833 }
834 return;
835 }
836 }
3d396eb1
AK		 837
838 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
839 PCI_DMA_FROMDEVICE);
840
841 skb = (struct sk_buff *)buffer->skb;
842
ed25ffa1 843 if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
3d396eb1
AK		 844 port->stats.csummed++;
845 skb->ip_summed = CHECKSUM_UNNECESSARY;
ed25ffa1 846 }
3d396eb1 847 skb->dev = netdev;
ed25ffa1
AK		 848 if (desc_ctx == RCV_DESC_LRO_CTXID) {
849 /* True length was only available on the last pkt */
850 skb_put(skb, buffer->lro_length);
851 } else {
852 skb_put(skb, length);
853 }
854
3d396eb1
AK		 855 skb->protocol = eth_type_trans(skb, netdev);
856
857 ret = netif_receive_skb(skb);
858
859 /*
860 * RH: Do we need these stats on a regular basis. Can we get it from
861 * Linux stats.
862 */
863 switch (ret) {
864 case NET_RX_SUCCESS:
865 port->stats.uphappy++;
866 break;
867
868 case NET_RX_CN_LOW:
869 port->stats.uplcong++;
870 break;
871
872 case NET_RX_CN_MOD:
873 port->stats.upmcong++;
874 break;
875
876 case NET_RX_CN_HIGH:
877 port->stats.uphcong++;
878 break;
879
880 case NET_RX_DROP:
881 port->stats.updropped++;
882 break;
883
884 default:
885 port->stats.updunno++;
886 break;
887 }
888
889 netdev->last_rx = jiffies;
890
891 rcv_desc->rcv_free++;
892 rcv_desc->rcv_pending--;
893
894 /*
895 * We just consumed one buffer so post a buffer.
896 */
897 adapter->stats.post_called++;
898 buffer->skb = NULL;
899 buffer->state = NETXEN_BUFFER_FREE;
ed25ffa1
AK		 900 buffer->lro_current_frags = 0;
901 buffer->lro_expected_frags = 0;
3d396eb1
AK		 902
903 port->stats.no_rcv++;
904 port->stats.rxbytes += length;
905}
906
907/* Process Receive status ring */
908u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
909{
910 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
911 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
912 struct status_desc *desc; /* used to read status desc here */
913 u32 consumer = recv_ctx->status_rx_consumer;
ed25ffa1 914 u32 producer = 0;
3d396eb1
AK		 915 int count = 0, ring;
916
917 DPRINTK(INFO, "procesing receive\n");
918 /*
919 * we assume in this case that there is only one port and that is
920 * port #1...changes need to be done in firmware to indicate port
921 * number as part of the descriptor. This way we will be able to get
922 * the netdev which is associated with that device.
923 */
924 while (count < max) {
925 desc = &desc_head[consumer];
a608ab9c 926 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
ed25ffa1
AK		 927 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
928 netxen_get_sts_owner(desc));
3d396eb1
AK		 929 break;
930 }
931 netxen_process_rcv(adapter, ctxid, desc);
ed25ffa1 932 netxen_clear_sts_owner(desc);
a608ab9c 933 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
3d396eb1
AK		 934 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
935 count++;
936 }
937 if (count) {
938 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
ed25ffa1 939 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
3d396eb1
AK		 940 }
941 }
942
943 /* update the consumer index in phantom */
944 if (count) {
945 adapter->stats.process_rcv++;
946 recv_ctx->status_rx_consumer = consumer;
ed25ffa1 947 recv_ctx->status_rx_producer = producer;
3d396eb1
AK		 948
949 /* Window = 1 */
950 writel(consumer,
951 NETXEN_CRB_NORMALIZE(adapter,
952 recv_crb_registers[ctxid].
953 crb_rcv_status_consumer));
954 }
955
956 return count;
957}
958
959/* Process Command status ring */
ed25ffa1 960int netxen_process_cmd_ring(unsigned long data)
3d396eb1
AK		 961{
962 u32 last_consumer;
963 u32 consumer;
964 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
ed25ffa1
AK		 965 int count1 = 0;
966 int count2 = 0;
3d396eb1
AK		 967 struct netxen_cmd_buffer *buffer;
968 struct netxen_port *port; /* port #1 */
969 struct netxen_port *nport;
970 struct pci_dev *pdev;
971 struct netxen_skb_frag *frag;
972 u32 i;
973 struct sk_buff *skb = NULL;
974 int p;
ed25ffa1 975 int done;
3d396eb1
AK		 976
977 spin_lock(&adapter->tx_lock);
978 last_consumer = adapter->last_cmd_consumer;
979 DPRINTK(INFO, "procesing xmit complete\n");
980 /* we assume in this case that there is only one port and that is
981 * port #1...changes need to be done in firmware to indicate port
982 * number as part of the descriptor. This way we will be able to get
983 * the netdev which is associated with that device.
984 */
3d396eb1 985
ed25ffa1 986 consumer = *(adapter->cmd_consumer);
3d396eb1
AK		 987 if (last_consumer == consumer) { /* Ring is empty */
988 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
989 last_consumer, consumer);
990 spin_unlock(&adapter->tx_lock);
ed25ffa1 991 return 1;
3d396eb1
AK		 992 }
993
994 adapter->proc_cmd_buf_counter++;
995 adapter->stats.process_xmit++;
996 /*
997 * Not needed - does not seem to be used anywhere.
998 * adapter->cmd_consumer = consumer;
999 */
1000 spin_unlock(&adapter->tx_lock);
1001
ed25ffa1 1002 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
3d396eb1
AK		 1003 buffer = &adapter->cmd_buf_arr[last_consumer];
1004 port = adapter->port[buffer->port];
1005 pdev = port->pdev;
1006 frag = &buffer->frag_array[0];
1007 skb = buffer->skb;
1008 if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
1009 pci_unmap_single(pdev, frag->dma, frag->length,
1010 PCI_DMA_TODEVICE);
1011 for (i = 1; i < buffer->frag_count; i++) {
1012 DPRINTK(INFO, "getting fragment no %d\n", i);
1013 frag++; /* Get the next frag */
1014 pci_unmap_page(pdev, frag->dma, frag->length,
1015 PCI_DMA_TODEVICE);
1016 }
1017
1018 port->stats.skbfreed++;
1019 dev_kfree_skb_any(skb);
1020 skb = NULL;
1021 } else if (adapter->proc_cmd_buf_counter == 1) {
1022 port->stats.txnullskb++;
1023 }
1024 if (unlikely(netif_queue_stopped(port->netdev)
1025 && netif_carrier_ok(port->netdev))
1026 && ((jiffies - port->netdev->trans_start) >
1027 port->netdev->watchdog_timeo)) {
6c586644 1028 SCHEDULE_WORK(&port->tx_timeout_task);
3d396eb1
AK		 1029 }
1030
1031 last_consumer = get_next_index(last_consumer,
1032 adapter->max_tx_desc_count);
ed25ffa1 1033 count1++;
3d396eb1 1034 }
ed25ffa1 1035 adapter->stats.noxmitdone += count1;
3d396eb1 1036
ed25ffa1 1037 count2 = 0;
3d396eb1
AK		 1038 spin_lock(&adapter->tx_lock);
1039 if ((--adapter->proc_cmd_buf_counter) == 0) {
1040 adapter->last_cmd_consumer = last_consumer;
1041 while ((adapter->last_cmd_consumer != consumer)
ed25ffa1 1042 && (count2 < MAX_STATUS_HANDLE)) {
3d396eb1
AK		 1043 buffer =
1044 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
ed25ffa1 1045 count2++;
3d396eb1
AK		 1046 if (buffer->skb)
1047 break;
1048 else
1049 adapter->last_cmd_consumer =
1050 get_next_index(adapter->last_cmd_consumer,
1051 adapter->max_tx_desc_count);
1052 }
1053 }
ed25ffa1 1054 if (count1 || count2) {
3d396eb1
AK		 1055 for (p = 0; p < adapter->ahw.max_ports; p++) {
1056 nport = adapter->port[p];
1057 if (netif_queue_stopped(nport->netdev)
1058 && (nport->flags & NETXEN_NETDEV_STATUS)) {
1059 netif_wake_queue(nport->netdev);
1060 nport->flags &= ~NETXEN_NETDEV_STATUS;
1061 }
1062 }
1063 }
ed25ffa1
AK		 1064 /*
1065 * If everything is freed up to consumer then check if the ring is full
1066 * If the ring is full then check if more needs to be freed and
1067 * schedule the call back again.
1068 *
1069 * This happens when there are 2 CPUs. One could be freeing and the
1070 * other filling it. If the ring is full when we get out of here and
1071 * the card has already interrupted the host then the host can miss the
1072 * interrupt.
1073 *
1074 * There is still a possible race condition and the host could miss an
1075 * interrupt. The card has to take care of this.
1076 */
1077 if (adapter->last_cmd_consumer == consumer &&
1078 (((adapter->cmd_producer + 1) %
1079 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
1080 consumer = *(adapter->cmd_consumer);
1081 }
1082 done = (adapter->last_cmd_consumer == consumer);
3d396eb1
AK		 1083
1084 spin_unlock(&adapter->tx_lock);
1085 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1086 __FUNCTION__);
ed25ffa1 1087 return (done);
3d396eb1
AK		 1088}
1089
1090/*
1091 * netxen_post_rx_buffers puts buffer in the Phantom memory
1092 */
1093void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1094{
1095 struct pci_dev *pdev = adapter->ahw.pdev;
1096 struct sk_buff *skb;
1097 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1098 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
ed25ffa1 1099 uint producer;
3d396eb1
AK		 1100 struct rcv_desc *pdesc;
1101 struct netxen_rx_buffer *buffer;
1102 int count = 0;
1103 int index = 0;
ed25ffa1
AK		 1104 netxen_ctx_msg msg = 0;
1105 dma_addr_t dma;
3d396eb1
AK		 1106
1107 adapter->stats.post_called++;
1108 rcv_desc = &recv_ctx->rcv_desc[ringid];
3d396eb1
AK		 1109
1110 producer = rcv_desc->producer;
1111 index = rcv_desc->begin_alloc;
1112 buffer = &rcv_desc->rx_buf_arr[index];
1113 /* We can start writing rx descriptors into the phantom memory. */
1114 while (buffer->state == NETXEN_BUFFER_FREE) {
1115 skb = dev_alloc_skb(rcv_desc->skb_size);
1116 if (unlikely(!skb)) {
1117 /*
ed25ffa1 1118 * TODO
3d396eb1
AK		 1119 * We need to schedule the posting of buffers to the pegs.
1120 */
1121 rcv_desc->begin_alloc = index;
cb8011ad 1122 DPRINTK(ERR, "netxen_post_rx_buffers: "
3d396eb1
AK		 1123 " allocated only %d buffers\n", count);
1124 break;
1125 }
ed25ffa1
AK		 1126
1127 count++; /* now there should be no failure */
1128 pdesc = &rcv_desc->desc_head[producer];
1129
1130#if defined(XGB_DEBUG)
1131 *(unsigned long *)(skb->head) = 0xc0debabe;
1132 if (skb_is_nonlinear(skb)) {
1133 printk("Allocated SKB @%p is nonlinear\n");
1134 }
1135#endif
1136 skb_reserve(skb, 2);
1137 /* This will be setup when we receive the
1138 * buffer after it has been filled FSL TBD TBD
1139 * skb->dev = netdev;
1140 */
1141 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1142 PCI_DMA_FROMDEVICE);
ed33ebe4 1143 pdesc->addr_buffer = cpu_to_le64(dma);
ed25ffa1
AK		 1144 buffer->skb = skb;
1145 buffer->state = NETXEN_BUFFER_BUSY;
1146 buffer->dma = dma;
1147 /* make a rcv descriptor */
ed33ebe4
AK		 1148 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1149 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
ed25ffa1
AK		 1150 DPRINTK(INFO, "done writing descripter\n");
1151 producer =
1152 get_next_index(producer, rcv_desc->max_rx_desc_count);
1153 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1154 buffer = &rcv_desc->rx_buf_arr[index];
1155 }
1156 /* if we did allocate buffers, then write the count to Phantom */
1157 if (count) {
1158 rcv_desc->begin_alloc = index;
1159 rcv_desc->rcv_pending += count;
1160 adapter->stats.lastposted = count;
1161 adapter->stats.posted += count;
1162 rcv_desc->producer = producer;
1163 if (rcv_desc->rcv_free >= 32) {
1164 rcv_desc->rcv_free = 0;
1165 /* Window = 1 */
1166 writel((producer - 1) &
1167 (rcv_desc->max_rx_desc_count - 1),
1168 NETXEN_CRB_NORMALIZE(adapter,
1169 recv_crb_registers[0].
1170 rcv_desc_crb[ringid].
1171 crb_rcv_producer_offset));
1172 /*
1173 * Write a doorbell msg to tell phanmon of change in
1174 * receive ring producer
1175 */
1176 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1177 netxen_set_msg_privid(msg);
1178 netxen_set_msg_count(msg,
1179 ((producer -
1180 1) & (rcv_desc->
1181 max_rx_desc_count - 1)));
1182 netxen_set_msg_ctxid(msg, 0);
1183 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1184 writel(msg,
1185 DB_NORMALIZE(adapter,
1186 NETXEN_RCV_PRODUCER_OFFSET));
1187 }
1188 }
1189}
1190
1191void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
1192 uint32_t ringid)
1193{
1194 struct pci_dev *pdev = adapter->ahw.pdev;
1195 struct sk_buff *skb;
1196 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1197 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1198 u32 producer;
1199 struct rcv_desc *pdesc;
1200 struct netxen_rx_buffer *buffer;
1201 int count = 0;
1202 int index = 0;
1203
1204 adapter->stats.post_called++;
1205 rcv_desc = &recv_ctx->rcv_desc[ringid];
1206
1207 producer = rcv_desc->producer;
1208 index = rcv_desc->begin_alloc;
1209 buffer = &rcv_desc->rx_buf_arr[index];
1210 /* We can start writing rx descriptors into the phantom memory. */
1211 while (buffer->state == NETXEN_BUFFER_FREE) {
1212 skb = dev_alloc_skb(rcv_desc->skb_size);
1213 if (unlikely(!skb)) {
1214 /*
1215 * We need to schedule the posting of buffers to the pegs.
1216 */
1217 rcv_desc->begin_alloc = index;
1218 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1219 " allocated only %d buffers\n", count);
1220 break;
1221 }
3d396eb1
AK		 1222 count++; /* now there should be no failure */
1223 pdesc = &rcv_desc->desc_head[producer];
ed25ffa1 1224 skb_reserve(skb, 2);
3d396eb1
AK		 1225 /*
1226 * This will be setup when we receive the
1227 * buffer after it has been filled
1228 * skb->dev = netdev;
1229 */
1230 buffer->skb = skb;
1231 buffer->state = NETXEN_BUFFER_BUSY;
1232 buffer->dma = pci_map_single(pdev, skb->data,
1233 rcv_desc->dma_size,
1234 PCI_DMA_FROMDEVICE);
ed25ffa1 1235
3d396eb1 1236 /* make a rcv descriptor */
ed33ebe4 1237 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
a608ab9c 1238 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
3d396eb1
AK		 1239 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1240 DPRINTK(INFO, "done writing descripter\n");
1241 producer =
1242 get_next_index(producer, rcv_desc->max_rx_desc_count);
1243 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1244 buffer = &rcv_desc->rx_buf_arr[index];
1245 }
1246
1247 /* if we did allocate buffers, then write the count to Phantom */
1248 if (count) {
1249 rcv_desc->begin_alloc = index;
1250 rcv_desc->rcv_pending += count;
1251 adapter->stats.lastposted = count;
1252 adapter->stats.posted += count;
1253 rcv_desc->producer = producer;
1254 if (rcv_desc->rcv_free >= 32) {
1255 rcv_desc->rcv_free = 0;
1256 /* Window = 1 */
1257 writel((producer - 1) &
1258 (rcv_desc->max_rx_desc_count - 1),
1259 NETXEN_CRB_NORMALIZE(adapter,
ed25ffa1
AK		 1260 recv_crb_registers[0].
1261 rcv_desc_crb[ringid].
3d396eb1
AK		 1262 crb_rcv_producer_offset));
1263 wmb();
1264 }
1265 }
1266}
1267
1268int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1269{
1270 if (find_diff_among(adapter->last_cmd_consumer,
1271 adapter->cmd_producer,
1272 adapter->max_tx_desc_count) > 0)
1273 return 1;
1274
1275 return 0;
1276}
1277
3d396eb1
AK		 1278
1279void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1280{
1281 struct netxen_port *port;
1282 int port_num;
1283
1284 memset(&adapter->stats, 0, sizeof(adapter->stats));
1285 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
1286 port = adapter->port[port_num];
1287 memset(&port->stats, 0, sizeof(port->stats));
1288 }
1289}
1290
Linux kernel - Deliverables
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