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dm9601: Consolidate common parts of dm_write_*_async
[deliverable/linux.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1
AK		 1/*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
80922fbc 4 *
3d396eb1
AK		 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
80922fbc 9 *
3d396eb1
AK		 10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
80922fbc 14 *
3d396eb1
AK		 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
80922fbc 19 *
3d396eb1
AK		 20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
80922fbc 22 *
3d396eb1
AK		 23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34#include <linux/netdevice.h>
35#include <linux/delay.h>
36#include "netxen_nic.h"
37#include "netxen_nic_hw.h"
3d396eb1
AK		 38#include "netxen_nic_phan_reg.h"
39
40struct crb_addr_pair {
e0e20a1a
LCMT		 41 u32 addr;
42 u32 data;
3d396eb1
AK		 43};
44
b58ecad8
LCMT		 45unsigned long last_schedule_time;
46
3d396eb1
AK		 47#define NETXEN_MAX_CRB_XFORM 60
48static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 49#define NETXEN_ADDR_ERROR (0xffffffff)
3d396eb1
AK		 50
51#define crb_addr_transform(name) \
52 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
53 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
54
cb8011ad
AK		 55#define NETXEN_NIC_XDMA_RESET 0x8000ff
56
993fb90c
AB		 57static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
58 uint32_t ctx, uint32_t ringid);
59
60#if 0
61static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
62 unsigned long off, int *data)
3d396eb1 63{
cb8011ad 64 void __iomem *addr = pci_base_offset(adapter, off);
3d396eb1
AK		 65 writel(*data, addr);
66}
993fb90c 67#endif /* 0 */
3d396eb1
AK		 68
69static void crb_addr_transform_setup(void)
70{
71 crb_addr_transform(XDMA);
72 crb_addr_transform(TIMR);
73 crb_addr_transform(SRE);
74 crb_addr_transform(SQN3);
75 crb_addr_transform(SQN2);
76 crb_addr_transform(SQN1);
77 crb_addr_transform(SQN0);
78 crb_addr_transform(SQS3);
79 crb_addr_transform(SQS2);
80 crb_addr_transform(SQS1);
81 crb_addr_transform(SQS0);
82 crb_addr_transform(RPMX7);
83 crb_addr_transform(RPMX6);
84 crb_addr_transform(RPMX5);
85 crb_addr_transform(RPMX4);
86 crb_addr_transform(RPMX3);
87 crb_addr_transform(RPMX2);
88 crb_addr_transform(RPMX1);
89 crb_addr_transform(RPMX0);
90 crb_addr_transform(ROMUSB);
91 crb_addr_transform(SN);
92 crb_addr_transform(QMN);
93 crb_addr_transform(QMS);
94 crb_addr_transform(PGNI);
95 crb_addr_transform(PGND);
96 crb_addr_transform(PGN3);
97 crb_addr_transform(PGN2);
98 crb_addr_transform(PGN1);
99 crb_addr_transform(PGN0);
100 crb_addr_transform(PGSI);
101 crb_addr_transform(PGSD);
102 crb_addr_transform(PGS3);
103 crb_addr_transform(PGS2);
104 crb_addr_transform(PGS1);
105 crb_addr_transform(PGS0);
106 crb_addr_transform(PS);
107 crb_addr_transform(PH);
108 crb_addr_transform(NIU);
109 crb_addr_transform(I2Q);
110 crb_addr_transform(EG);
111 crb_addr_transform(MN);
112 crb_addr_transform(MS);
113 crb_addr_transform(CAS2);
114 crb_addr_transform(CAS1);
115 crb_addr_transform(CAS0);
116 crb_addr_transform(CAM);
117 crb_addr_transform(C2C1);
118 crb_addr_transform(C2C0);
1fcca1a5 119 crb_addr_transform(SMB);
3d396eb1
AK		 120}
121
122int netxen_init_firmware(struct netxen_adapter *adapter)
123{
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
127 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
133 udelay(100);
134 /* Window 1 call */
135 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
2d1a3bbd 146 writel(INTR_SCHEME_PERPORT,
147 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
3176ff3e 148 writel(MPORT_MULTI_FUNCTION_MODE,
ed25ffa1 149 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
3d396eb1
AK		 150 writel(PHAN_INITIALIZE_ACK,
151 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
152
153 return err;
154}
155
cb8011ad
AK		 156#define NETXEN_ADDR_LIMIT 0xffffffffULL
157
158void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
159 struct pci_dev **used_dev)
160{
161 void *addr;
162
163 addr = pci_alloc_consistent(pdev, sz, ptr);
164 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
165 *used_dev = pdev;
166 return addr;
167 }
168 pci_free_consistent(pdev, sz, addr, *ptr);
169 addr = pci_alloc_consistent(NULL, sz, ptr);
170 *used_dev = NULL;
171 return addr;
172}
173
3d396eb1
AK		 174void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
175{
176 int ctxid, ring;
177 u32 i;
178 u32 num_rx_bufs = 0;
179 struct netxen_rcv_desc_ctx *rcv_desc;
180
181 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
182 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
183 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
184 struct netxen_rx_buffer *rx_buf;
185 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
186 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
187 rcv_desc->begin_alloc = 0;
188 rx_buf = rcv_desc->rx_buf_arr;
189 num_rx_bufs = rcv_desc->max_rx_desc_count;
190 /*
191 * Now go through all of them, set reference handles
192 * and put them in the queues.
193 */
194 for (i = 0; i < num_rx_bufs; i++) {
195 rx_buf->ref_handle = i;
196 rx_buf->state = NETXEN_BUFFER_FREE;
3d396eb1
AK		 197 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
198 "%p\n", ctxid, i, rx_buf);
199 rx_buf++;
200 }
201 }
202 }
3d396eb1
AK		 203}
204
205void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
206{
cb8011ad
AK		 207 int ports = 0;
208 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
209
3d396eb1
AK		 210 if (netxen_nic_get_board_info(adapter) != 0)
211 printk("%s: Error getting board config info.\n",
212 netxen_nic_driver_name);
cb8011ad
AK		 213 get_brd_port_by_type(board_info->board_type, &ports);
214 if (ports == 0)
3d396eb1
AK		 215 printk(KERN_ERR "%s: Unknown board type\n",
216 netxen_nic_driver_name);
cb8011ad 217 adapter->ahw.max_ports = ports;
3d396eb1
AK		 218}
219
220void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
221{
3d396eb1
AK		 222 switch (adapter->ahw.board_type) {
223 case NETXEN_NIC_GBE:
80922fbc 224 adapter->enable_phy_interrupts =
3d396eb1 225 netxen_niu_gbe_enable_phy_interrupts;
80922fbc 226 adapter->disable_phy_interrupts =
3d396eb1 227 netxen_niu_gbe_disable_phy_interrupts;
80922fbc
AK		 228 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
229 adapter->macaddr_set = netxen_niu_macaddr_set;
230 adapter->set_mtu = netxen_nic_set_mtu_gb;
231 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
232 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
233 adapter->phy_read = netxen_niu_gbe_phy_read;
234 adapter->phy_write = netxen_niu_gbe_phy_write;
80922fbc
AK		 235 adapter->init_niu = netxen_nic_init_niu_gb;
236 adapter->stop_port = netxen_niu_disable_gbe_port;
3d396eb1
AK		 237 break;
238
239 case NETXEN_NIC_XGBE:
80922fbc 240 adapter->enable_phy_interrupts =
3d396eb1 241 netxen_niu_xgbe_enable_phy_interrupts;
80922fbc 242 adapter->disable_phy_interrupts =
3d396eb1 243 netxen_niu_xgbe_disable_phy_interrupts;
80922fbc
AK		 244 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
245 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
246 adapter->set_mtu = netxen_nic_set_mtu_xgb;
247 adapter->init_port = netxen_niu_xg_init_port;
248 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
249 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
250 adapter->stop_port = netxen_niu_disable_xg_port;
3d396eb1
AK		 251 break;
252
253 default:
254 break;
255 }
256}
257
258/*
259 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
260 * address to external PCI CRB address.
261 */
993fb90c 262static u32 netxen_decode_crb_addr(u32 addr)
3d396eb1
AK		 263{
264 int i;
e0e20a1a 265 u32 base_addr, offset, pci_base;
3d396eb1
AK		 266
267 crb_addr_transform_setup();
268
269 pci_base = NETXEN_ADDR_ERROR;
270 base_addr = addr & 0xfff00000;
271 offset = addr & 0x000fffff;
272
273 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
274 if (crb_addr_xform[i] == base_addr) {
275 pci_base = i << 20;
276 break;
277 }
278 }
279 if (pci_base == NETXEN_ADDR_ERROR)
280 return pci_base;
281 else
282 return (pci_base + offset);
283}
284
13ba9c77
MT		 285static long rom_max_timeout = 100;
286static long rom_lock_timeout = 10000;
27d2ab54 287static long rom_write_timeout = 700;
3d396eb1 288
993fb90c 289static int rom_lock(struct netxen_adapter *adapter)
3d396eb1
AK		 290{
291 int iter;
292 u32 done = 0;
293 int timeout = 0;
294
295 while (!done) {
296 /* acquire semaphore2 from PCI HW block */
297 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
298 &done);
299 if (done == 1)
300 break;
301 if (timeout >= rom_lock_timeout)
302 return -EIO;
303
304 timeout++;
305 /*
306 * Yield CPU
307 */
308 if (!in_atomic())
309 schedule();
310 else {
311 for (iter = 0; iter < 20; iter++)
312 cpu_relax(); /*This a nop instr on i386 */
313 }
314 }
315 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
316 return 0;
317}
318
993fb90c 319static int netxen_wait_rom_done(struct netxen_adapter *adapter)
3d396eb1
AK		 320{
321 long timeout = 0;
322 long done = 0;
323
324 while (done == 0) {
325 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
326 done &= 2;
327 timeout++;
328 if (timeout >= rom_max_timeout) {
329 printk("Timeout reached waiting for rom done");
330 return -EIO;
331 }
332 }
333 return 0;
334}
335
993fb90c 336static int netxen_rom_wren(struct netxen_adapter *adapter)
cb8011ad
AK		 337{
338 /* Set write enable latch in ROM status register */
339 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
340 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
341 M25P_INSTR_WREN);
342 if (netxen_wait_rom_done(adapter)) {
343 return -1;
344 }
345 return 0;
346}
347
993fb90c
AB		 348static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
349 unsigned int addr)
cb8011ad
AK		 350{
351 unsigned int data = 0xdeaddead;
352 data = netxen_nic_reg_read(adapter, addr);
353 return data;
354}
355
993fb90c 356static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
cb8011ad
AK		 357{
358 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
359 M25P_INSTR_RDSR);
360 if (netxen_wait_rom_done(adapter)) {
361 return -1;
362 }
363 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
364}
365
993fb90c 366static void netxen_rom_unlock(struct netxen_adapter *adapter)
cb8011ad
AK		 367{
368 u32 val;
369
370 /* release semaphore2 */
371 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
372
373}
374
993fb90c 375static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
cb8011ad
AK		 376{
377 long timeout = 0;
378 long wip = 1;
379 int val;
380 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
381 while (wip != 0) {
382 val = netxen_do_rom_rdsr(adapter);
383 wip = val & 1;
384 timeout++;
385 if (timeout > rom_max_timeout) {
386 return -1;
387 }
388 }
389 return 0;
390}
391
993fb90c
AB		 392static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
393 int data)
cb8011ad
AK		 394{
395 if (netxen_rom_wren(adapter)) {
396 return -1;
397 }
398 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
399 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
400 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
401 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
402 M25P_INSTR_PP);
403 if (netxen_wait_rom_done(adapter)) {
404 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
405 return -1;
406 }
407
408 return netxen_rom_wip_poll(adapter);
409}
410
993fb90c
AB		 411static int do_rom_fast_read(struct netxen_adapter *adapter,
412 int addr, int *valp)
3d396eb1 413{
96acb6eb 414 cond_resched();
b58ecad8 415
3d396eb1
AK		 416 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
417 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
b58ecad8 418 udelay(100); /* prevent bursting on CRB */
3d396eb1
AK		 419 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
420 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
421 if (netxen_wait_rom_done(adapter)) {
422 printk("Error waiting for rom done\n");
423 return -EIO;
424 }
425 /* reset abyte_cnt and dummy_byte_cnt */
426 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
b58ecad8 427 udelay(100); /* prevent bursting on CRB */
3d396eb1
AK		 428 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
429
430 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
431 return 0;
432}
433
993fb90c
AB		 434static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
435 u8 *bytes, size_t size)
27d2ab54
AK		 436{
437 int addridx;
438 int ret = 0;
439
440 for (addridx = addr; addridx < (addr + size); addridx += 4) {
441 ret = do_rom_fast_read(adapter, addridx, (int *)bytes);
442 if (ret != 0)
443 break;
6d1495f2 444 *(int *)bytes = cpu_to_le32(*(int *)bytes);
27d2ab54
AK		 445 bytes += 4;
446 }
447
448 return ret;
449}
450
451int
452netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
453 u8 *bytes, size_t size)
454{
455 int ret;
456
457 ret = rom_lock(adapter);
458 if (ret < 0)
459 return ret;
460
461 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
462
463 netxen_rom_unlock(adapter);
464 return ret;
465}
466
3d396eb1
AK		 467int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
468{
469 int ret;
470
471 if (rom_lock(adapter) != 0)
472 return -EIO;
473
474 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 475 netxen_rom_unlock(adapter);
476 return ret;
477}
478
993fb90c 479#if 0
cb8011ad
AK		 480int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
481{
482 int ret = 0;
483
484 if (rom_lock(adapter) != 0) {
485 return -1;
486 }
487 ret = do_rom_fast_write(adapter, addr, data);
488 netxen_rom_unlock(adapter);
489 return ret;
490}
993fb90c 491#endif /* 0 */
27d2ab54 492
993fb90c
AB		 493static int do_rom_fast_write_words(struct netxen_adapter *adapter,
494 int addr, u8 *bytes, size_t size)
27d2ab54
AK		 495{
496 int addridx = addr;
497 int ret = 0;
498
499 while (addridx < (addr + size)) {
500 int last_attempt = 0;
501 int timeout = 0;
502 int data;
503
6d1495f2 504 data = le32_to_cpu((*(u32*)bytes));
27d2ab54
AK		 505 ret = do_rom_fast_write(adapter, addridx, data);
506 if (ret < 0)
507 return ret;
508
509 while(1) {
510 int data1;
511
f8dfdd5c
SH		 512 ret = do_rom_fast_read(adapter, addridx, &data1);
513 if (ret < 0)
514 return ret;
515
27d2ab54
AK		 516 if (data1 == data)
517 break;
518
519 if (timeout++ >= rom_write_timeout) {
520 if (last_attempt++ < 4) {
521 ret = do_rom_fast_write(adapter,
522 addridx, data);
523 if (ret < 0)
524 return ret;
525 }
526 else {
527 printk(KERN_INFO "Data write did not "
528 "succeed at address 0x%x\n", addridx);
529 break;
530 }
531 }
532 }
533
534 bytes += 4;
535 addridx += 4;
536 }
537
538 return ret;
539}
540
541int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
542 u8 *bytes, size_t size)
543{
544 int ret = 0;
545
546 ret = rom_lock(adapter);
547 if (ret < 0)
548 return ret;
549
550 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
551 netxen_rom_unlock(adapter);
552
553 return ret;
554}
555
993fb90c 556static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
27d2ab54
AK		 557{
558 int ret;
559
560 ret = netxen_rom_wren(adapter);
561 if (ret < 0)
562 return ret;
563
564 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
565 netxen_crb_writelit_adapter(adapter,
566 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
567
568 ret = netxen_wait_rom_done(adapter);
569 if (ret < 0)
570 return ret;
571
572 return netxen_rom_wip_poll(adapter);
573}
574
993fb90c 575static int netxen_rom_rdsr(struct netxen_adapter *adapter)
27d2ab54
AK		 576{
577 int ret;
578
579 ret = rom_lock(adapter);
580 if (ret < 0)
581 return ret;
582
583 ret = netxen_do_rom_rdsr(adapter);
584 netxen_rom_unlock(adapter);
585 return ret;
586}
587
588int netxen_backup_crbinit(struct netxen_adapter *adapter)
589{
590 int ret = FLASH_SUCCESS;
591 int val;
0d04761d 592 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
27d2ab54
AK		 593
594 if (!buffer)
595 return -ENOMEM;
596 /* unlock sector 63 */
597 val = netxen_rom_rdsr(adapter);
598 val = val & 0xe3;
599 ret = netxen_rom_wrsr(adapter, val);
600 if (ret != FLASH_SUCCESS)
601 goto out_kfree;
602
603 ret = netxen_rom_wip_poll(adapter);
604 if (ret != FLASH_SUCCESS)
605 goto out_kfree;
606
607 /* copy sector 0 to sector 63 */
0d04761d
MT		 608 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
609 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 610 if (ret != FLASH_SUCCESS)
611 goto out_kfree;
612
0d04761d
MT		 613 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
614 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 615 if (ret != FLASH_SUCCESS)
616 goto out_kfree;
617
618 /* lock sector 63 */
619 val = netxen_rom_rdsr(adapter);
620 if (!(val & 0x8)) {
621 val |= (0x1 << 2);
622 /* lock sector 63 */
623 if (netxen_rom_wrsr(adapter, val) == 0) {
624 ret = netxen_rom_wip_poll(adapter);
625 if (ret != FLASH_SUCCESS)
626 goto out_kfree;
627
628 /* lock SR writes */
629 ret = netxen_rom_wip_poll(adapter);
630 if (ret != FLASH_SUCCESS)
631 goto out_kfree;
632 }
633 }
634
635out_kfree:
636 kfree(buffer);
637 return ret;
638}
639
993fb90c 640static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
cb8011ad
AK		 641{
642 netxen_rom_wren(adapter);
643 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
644 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
645 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
646 M25P_INSTR_SE);
647 if (netxen_wait_rom_done(adapter)) {
648 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
649 return -1;
650 }
651 return netxen_rom_wip_poll(adapter);
652}
653
993fb90c 654static void check_erased_flash(struct netxen_adapter *adapter, int addr)
27d2ab54
AK		 655{
656 int i;
657 int val;
658 int count = 0, erased_errors = 0;
659 int range;
660
0d04761d
MT		 661 range = (addr == NETXEN_USER_START) ?
662 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 663
664 for (i = addr; i < range; i += 4) {
665 netxen_rom_fast_read(adapter, i, &val);
666 if (val != 0xffffffff)
667 erased_errors++;
668 count++;
669 }
670
671 if (erased_errors)
672 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
673 "for sector address: %x\n", erased_errors, count, addr);
674}
675
cb8011ad
AK		 676int netxen_rom_se(struct netxen_adapter *adapter, int addr)
677{
678 int ret = 0;
679 if (rom_lock(adapter) != 0) {
680 return -1;
681 }
682 ret = netxen_do_rom_se(adapter, addr);
683 netxen_rom_unlock(adapter);
27d2ab54
AK		 684 msleep(30);
685 check_erased_flash(adapter, addr);
686
687 return ret;
688}
689
993fb90c
AB		 690static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
691 int start, int end)
27d2ab54
AK		 692{
693 int ret = FLASH_SUCCESS;
694 int i;
695
696 for (i = start; i < end; i++) {
0d04761d 697 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 698 if (ret)
699 break;
700 ret = netxen_rom_wip_poll(adapter);
701 if (ret < 0)
702 return ret;
703 }
704
705 return ret;
706}
707
708int
709netxen_flash_erase_secondary(struct netxen_adapter *adapter)
710{
711 int ret = FLASH_SUCCESS;
712 int start, end;
713
0d04761d
MT		 714 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
715 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 716 ret = netxen_flash_erase_sections(adapter, start, end);
717
718 return ret;
719}
720
721int
722netxen_flash_erase_primary(struct netxen_adapter *adapter)
723{
724 int ret = FLASH_SUCCESS;
725 int start, end;
726
0d04761d
MT		 727 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
728 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 729 ret = netxen_flash_erase_sections(adapter, start, end);
730
731 return ret;
732}
733
e45d9ab4
AK		 734void netxen_halt_pegs(struct netxen_adapter *adapter)
735{
736 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
737 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
738 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
739 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
740}
741
27d2ab54
AK		 742int netxen_flash_unlock(struct netxen_adapter *adapter)
743{
744 int ret = 0;
745
746 ret = netxen_rom_wrsr(adapter, 0);
747 if (ret < 0)
748 return ret;
749
750 ret = netxen_rom_wren(adapter);
751 if (ret < 0)
752 return ret;
753
3d396eb1
AK		 754 return ret;
755}
756
757#define NETXEN_BOARDTYPE 0x4008
758#define NETXEN_BOARDNUM 0x400c
759#define NETXEN_CHIPNUM 0x4010
760#define NETXEN_ROMBUS_RESET 0xFFFFFFFF
761#define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
762#define NETXEN_ROM_FOUND_INIT 0x400
763
764int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
765{
766 int addr, val, status;
767 int n, i;
768 int init_delay = 0;
769 struct crb_addr_pair *buf;
e0e20a1a 770 u32 off;
3d396eb1
AK		 771
772 /* resetall */
773 status = netxen_nic_get_board_info(adapter);
774 if (status)
cb8011ad 775 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
3d396eb1
AK		 776 netxen_nic_driver_name);
777
778 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
779 NETXEN_ROMBUS_RESET);
780
781 if (verbose) {
782 int val;
783 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
784 printk("P2 ROM board type: 0x%08x\n", val);
785 else
786 printk("Could not read board type\n");
787 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
788 printk("P2 ROM board num: 0x%08x\n", val);
789 else
790 printk("Could not read board number\n");
791 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
792 printk("P2 ROM chip num: 0x%08x\n", val);
793 else
794 printk("Could not read chip number\n");
795 }
796
797 if (netxen_rom_fast_read(adapter, 0, &n) == 0
798 && (n & NETXEN_ROM_FIRST_BARRIER)) {
799 n &= ~NETXEN_ROM_ROUNDUP;
800 if (n < NETXEN_ROM_FOUND_INIT) {
801 if (verbose)
802 printk("%s: %d CRB init values found"
803 " in ROM.\n", netxen_nic_driver_name, n);
804 } else {
805 printk("%s:n=0x%x Error! NetXen card flash not"
806 " initialized.\n", __FUNCTION__, n);
807 return -EIO;
808 }
809 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
810 if (buf == NULL) {
cb8011ad
AK		 811 printk("%s: netxen_pinit_from_rom: Unable to calloc "
812 "memory.\n", netxen_nic_driver_name);
3d396eb1
AK		 813 return -ENOMEM;
814 }
815 for (i = 0; i < n; i++) {
816 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
817 || netxen_rom_fast_read(adapter, 8 * i + 8,
818 &addr) != 0)
819 return -EIO;
820
821 buf[i].addr = addr;
822 buf[i].data = val;
823
824 if (verbose)
825 printk("%s: PCI: 0x%08x == 0x%08x\n",
826 netxen_nic_driver_name, (unsigned int)
e0e20a1a 827 netxen_decode_crb_addr(addr), val);
3d396eb1
AK		 828 }
829 for (i = 0; i < n; i++) {
830
e0e20a1a 831 off = netxen_decode_crb_addr(buf[i].addr);
1fcca1a5 832 if (off == NETXEN_ADDR_ERROR) {
e0e20a1a 833 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5
AK		 834 buf[i].addr);
835 continue;
836 }
837 off += NETXEN_PCI_CRBSPACE;
3d396eb1
AK		 838 /* skipping cold reboot MAGIC */
839 if (off == NETXEN_CAM_RAM(0x1fc))
840 continue;
841
842 /* After writing this register, HW needs time for CRB */
843 /* to quiet down (else crb_window returns 0xffffffff) */
844 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
845 init_delay = 1;
846 /* hold xdma in reset also */
cb8011ad 847 buf[i].data = NETXEN_NIC_XDMA_RESET;
3d396eb1
AK		 848 }
849
850 if (ADDR_IN_WINDOW1(off)) {
851 writel(buf[i].data,
852 NETXEN_CRB_NORMALIZE(adapter, off));
853 } else {
854 netxen_nic_pci_change_crbwindow(adapter, 0);
855 writel(buf[i].data,
cb8011ad 856 pci_base_offset(adapter, off));
3d396eb1
AK		 857
858 netxen_nic_pci_change_crbwindow(adapter, 1);
859 }
860 if (init_delay == 1) {
96acb6eb 861 msleep(2000);
3d396eb1
AK		 862 init_delay = 0;
863 }
96acb6eb 864 msleep(20);
3d396eb1
AK		 865 }
866 kfree(buf);
867
868 /* disable_peg_cache_all */
869
870 /* unreset_net_cache */
871 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
872 4);
873 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
874 (val & 0xffffff0f));
875 /* p2dn replyCount */
876 netxen_crb_writelit_adapter(adapter,
877 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
878 /* disable_peg_cache 0 */
879 netxen_crb_writelit_adapter(adapter,
880 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
881 /* disable_peg_cache 1 */
882 netxen_crb_writelit_adapter(adapter,
883 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
884
885 /* peg_clr_all */
886
887 /* peg_clr 0 */
888 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
889 0);
890 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
891 0);
892 /* peg_clr 1 */
893 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
894 0);
895 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
896 0);
897 /* peg_clr 2 */
898 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
899 0);
900 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
901 0);
902 /* peg_clr 3 */
903 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
904 0);
905 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
906 0);
907 }
908 return 0;
909}
910
ed25ffa1
AK		 911int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
912{
913 uint64_t addr;
914 uint32_t hi;
915 uint32_t lo;
916
917 adapter->dummy_dma.addr =
918 pci_alloc_consistent(adapter->ahw.pdev,
919 NETXEN_HOST_DUMMY_DMA_SIZE,
920 &adapter->dummy_dma.phys_addr);
921 if (adapter->dummy_dma.addr == NULL) {
922 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
923 __FUNCTION__);
924 return -ENOMEM;
925 }
926
927 addr = (uint64_t) adapter->dummy_dma.phys_addr;
928 hi = (addr >> 32) & 0xffffffff;
929 lo = addr & 0xffffffff;
930
931 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
932 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
933
934 return 0;
935}
936
937void netxen_free_adapter_offload(struct netxen_adapter *adapter)
938{
939 if (adapter->dummy_dma.addr) {
940 pci_free_consistent(adapter->ahw.pdev,
941 NETXEN_HOST_DUMMY_DMA_SIZE,
942 adapter->dummy_dma.addr,
943 adapter->dummy_dma.phys_addr);
944 adapter->dummy_dma.addr = NULL;
945 }
946}
947
96acb6eb 948int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 949{
950 u32 val = 0;
96acb6eb 951 int retries = 30;
3d396eb1 952
cb8011ad 953 if (!pegtune_val) {
96acb6eb
DP		 954 do {
955 val = readl(NETXEN_CRB_NORMALIZE
3d396eb1 956 (adapter, CRB_CMDPEG_STATE));
96acb6eb
DP		 957 pegtune_val = readl(NETXEN_CRB_NORMALIZE
958 (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
959
960 if (val == PHAN_INITIALIZE_COMPLETE ||
961 val == PHAN_INITIALIZE_ACK)
962 return 0;
963
964 msleep(1000);
965 } while (--retries);
966 if (!retries) {
967 printk(KERN_WARNING "netxen_phantom_init: init failed, "
968 "pegtune_val=%x\n", pegtune_val);
969 return -1;
3d396eb1 970 }
3d396eb1 971 }
96acb6eb
DP		 972
973 return 0;
3d396eb1
AK		 974}
975
976int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
977{
978 int ctx;
979
980 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
981 struct netxen_recv_context *recv_ctx =
982 &(adapter->recv_ctx[ctx]);
983 u32 consumer;
984 struct status_desc *desc_head;
cb8011ad 985 struct status_desc *desc;
3d396eb1
AK		 986
987 consumer = recv_ctx->status_rx_consumer;
988 desc_head = recv_ctx->rcv_status_desc_head;
989 desc = &desc_head[consumer];
990
a608ab9c 991 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
3d396eb1
AK		 992 return 1;
993 }
994
995 return 0;
996}
997
993fb90c 998static int netxen_nic_check_temp(struct netxen_adapter *adapter)
cb8011ad 999{
3176ff3e 1000 struct net_device *netdev = adapter->netdev;
cb8011ad
AK		 1001 uint32_t temp, temp_state, temp_val;
1002 int rv = 0;
1003
1004 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
1005
1006 temp_state = nx_get_temp_state(temp);
1007 temp_val = nx_get_temp_val(temp);
1008
1009 if (temp_state == NX_TEMP_PANIC) {
1010 printk(KERN_ALERT
1011 "%s: Device temperature %d degrees C exceeds"
1012 " maximum allowed. Hardware has been shut down.\n",
1013 netxen_nic_driver_name, temp_val);
cb8011ad 1014
3176ff3e
MT		 1015 netif_carrier_off(netdev);
1016 netif_stop_queue(netdev);
cb8011ad
AK		 1017 rv = 1;
1018 } else if (temp_state == NX_TEMP_WARN) {
1019 if (adapter->temp == NX_TEMP_NORMAL) {
1020 printk(KERN_ALERT
1021 "%s: Device temperature %d degrees C "
1022 "exceeds operating range."
1023 " Immediate action needed.\n",
1024 netxen_nic_driver_name, temp_val);
1025 }
1026 } else {
1027 if (adapter->temp == NX_TEMP_WARN) {
1028 printk(KERN_INFO
1029 "%s: Device temperature is now %d degrees C"
1030 " in normal range.\n", netxen_nic_driver_name,
1031 temp_val);
1032 }
1033 }
1034 adapter->temp = temp_state;
1035 return rv;
1036}
1037
6d5aefb8 1038void netxen_watchdog_task(struct work_struct *work)
3d396eb1 1039{
3d396eb1 1040 struct net_device *netdev;
6d5aefb8
DH		 1041 struct netxen_adapter *adapter =
1042 container_of(work, struct netxen_adapter, watchdog_task);
3d396eb1 1043
6c80b18d 1044 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
cb8011ad
AK		 1045 return;
1046
c27e6721
MT		 1047 if (adapter->handle_phy_intr)
1048 adapter->handle_phy_intr(adapter);
1049
3176ff3e 1050 netdev = adapter->netdev;
c27e6721
MT		 1051 if ((netif_running(netdev)) && !netif_carrier_ok(netdev) &&
1052 netxen_nic_link_ok(adapter) ) {
1053 printk(KERN_INFO "%s %s (port %d), Link is up\n",
1054 netxen_nic_driver_name, netdev->name, adapter->portnum);
3176ff3e 1055 netif_carrier_on(netdev);
3176ff3e 1056 netif_wake_queue(netdev);
c27e6721
MT		 1057 } else if(!(netif_running(netdev)) && netif_carrier_ok(netdev)) {
1058 printk(KERN_ERR "%s %s Link is Down\n",
1059 netxen_nic_driver_name, netdev->name);
1060 netif_carrier_off(netdev);
1061 netif_stop_queue(netdev);
1062 }
3176ff3e 1063
3d396eb1
AK		 1064 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1065}
1066
1067/*
1068 * netxen_process_rcv() send the received packet to the protocol stack.
1069 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1070 * invoke the routine to send more rx buffers to the Phantom...
1071 */
993fb90c
AB		 1072static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1073 struct status_desc *desc)
3d396eb1 1074{
3176ff3e
MT		 1075 struct pci_dev *pdev = adapter->pdev;
1076 struct net_device *netdev = adapter->netdev;
5dc16268
DP		 1077 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1078 int index = netxen_get_sts_refhandle(sts_data);
3d396eb1
AK		 1079 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1080 struct netxen_rx_buffer *buffer;
1081 struct sk_buff *skb;
5dc16268 1082 u32 length = netxen_get_sts_totallength(sts_data);
3d396eb1
AK		 1083 u32 desc_ctx;
1084 struct netxen_rcv_desc_ctx *rcv_desc;
1085 int ret;
1086
5dc16268 1087 desc_ctx = netxen_get_sts_type(sts_data);
3d396eb1
AK		 1088 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1089 printk("%s: %s Bad Rcv descriptor ring\n",
1090 netxen_nic_driver_name, netdev->name);
1091 return;
1092 }
1093
1094 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
ed25ffa1
AK		 1095 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1096 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1097 index, rcv_desc->max_rx_desc_count);
1098 return;
1099 }
3d396eb1 1100 buffer = &rcv_desc->rx_buf_arr[index];
ed25ffa1
AK		 1101 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1102 buffer->lro_current_frags++;
1103 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1104 buffer->lro_expected_frags =
1105 netxen_get_sts_desc_lro_cnt(desc);
1106 buffer->lro_length = length;
1107 }
1108 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1109 if (buffer->lro_expected_frags != 0) {
5bc51424
JP		 1110 printk("LRO: (refhandle:%x) recv frag. "
1111 "wait for last. flags: %x expected:%d "
ed25ffa1
AK		 1112 "have:%d\n", index,
1113 netxen_get_sts_desc_lro_last_frag(desc),
1114 buffer->lro_expected_frags,
1115 buffer->lro_current_frags);
1116 }
1117 return;
1118 }
1119 }
3d396eb1
AK		 1120
1121 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1122 PCI_DMA_FROMDEVICE);
1123
1124 skb = (struct sk_buff *)buffer->skb;
1125
200eef20 1126 if (likely(adapter->rx_csum &&
5dc16268 1127 netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
3176ff3e 1128 adapter->stats.csummed++;
3d396eb1 1129 skb->ip_summed = CHECKSUM_UNNECESSARY;
200eef20
DP		 1130 } else
1131 skb->ip_summed = CHECKSUM_NONE;
1132
96acb6eb 1133 skb->dev = netdev;
ed25ffa1
AK		 1134 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1135 /* True length was only available on the last pkt */
1136 skb_put(skb, buffer->lro_length);
1137 } else {
1138 skb_put(skb, length);
1139 }
1140
3d396eb1
AK		 1141 skb->protocol = eth_type_trans(skb, netdev);
1142
1143 ret = netif_receive_skb(skb);
1144
1145 /*
1146 * RH: Do we need these stats on a regular basis. Can we get it from
1147 * Linux stats.
1148 */
1149 switch (ret) {
1150 case NET_RX_SUCCESS:
3176ff3e 1151 adapter->stats.uphappy++;
3d396eb1
AK		 1152 break;
1153
1154 case NET_RX_CN_LOW:
3176ff3e 1155 adapter->stats.uplcong++;
3d396eb1
AK		 1156 break;
1157
1158 case NET_RX_CN_MOD:
3176ff3e 1159 adapter->stats.upmcong++;
3d396eb1
AK		 1160 break;
1161
1162 case NET_RX_CN_HIGH:
3176ff3e 1163 adapter->stats.uphcong++;
3d396eb1
AK		 1164 break;
1165
1166 case NET_RX_DROP:
3176ff3e 1167 adapter->stats.updropped++;
3d396eb1
AK		 1168 break;
1169
1170 default:
3176ff3e 1171 adapter->stats.updunno++;
3d396eb1
AK		 1172 break;
1173 }
1174
1175 netdev->last_rx = jiffies;
1176
1177 rcv_desc->rcv_free++;
1178 rcv_desc->rcv_pending--;
1179
1180 /*
1181 * We just consumed one buffer so post a buffer.
1182 */
3d396eb1
AK		 1183 buffer->skb = NULL;
1184 buffer->state = NETXEN_BUFFER_FREE;
ed25ffa1
AK		 1185 buffer->lro_current_frags = 0;
1186 buffer->lro_expected_frags = 0;
3d396eb1 1187
3176ff3e
MT		 1188 adapter->stats.no_rcv++;
1189 adapter->stats.rxbytes += length;
3d396eb1
AK		 1190}
1191
1192/* Process Receive status ring */
1193u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1194{
1195 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1196 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1197 struct status_desc *desc; /* used to read status desc here */
1198 u32 consumer = recv_ctx->status_rx_consumer;
ed25ffa1 1199 u32 producer = 0;
3d396eb1
AK		 1200 int count = 0, ring;
1201
1202 DPRINTK(INFO, "procesing receive\n");
1203 /*
1204 * we assume in this case that there is only one port and that is
1205 * port #1...changes need to be done in firmware to indicate port
1206 * number as part of the descriptor. This way we will be able to get
1207 * the netdev which is associated with that device.
1208 */
1209 while (count < max) {
1210 desc = &desc_head[consumer];
a608ab9c 1211 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
ed25ffa1
AK		 1212 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1213 netxen_get_sts_owner(desc));
3d396eb1
AK		 1214 break;
1215 }
1216 netxen_process_rcv(adapter, ctxid, desc);
a608ab9c 1217 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
3d396eb1
AK		 1218 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1219 count++;
1220 }
1221 if (count) {
1222 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
ed25ffa1 1223 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
3d396eb1
AK		 1224 }
1225 }
1226
1227 /* update the consumer index in phantom */
1228 if (count) {
3d396eb1 1229 recv_ctx->status_rx_consumer = consumer;
ed25ffa1 1230 recv_ctx->status_rx_producer = producer;
3d396eb1
AK		 1231
1232 /* Window = 1 */
1233 writel(consumer,
1234 NETXEN_CRB_NORMALIZE(adapter,
4a79a04e 1235 recv_crb_registers[adapter->portnum].
3d396eb1 1236 crb_rcv_status_consumer));
96acb6eb 1237 wmb();
3d396eb1
AK		 1238 }
1239
1240 return count;
1241}
1242
1243/* Process Command status ring */
ed25ffa1 1244int netxen_process_cmd_ring(unsigned long data)
3d396eb1
AK		 1245{
1246 u32 last_consumer;
1247 u32 consumer;
1248 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
ed25ffa1
AK		 1249 int count1 = 0;
1250 int count2 = 0;
3d396eb1 1251 struct netxen_cmd_buffer *buffer;
3d396eb1
AK		 1252 struct pci_dev *pdev;
1253 struct netxen_skb_frag *frag;
1254 u32 i;
ed25ffa1 1255 int done;
3d396eb1
AK		 1256
1257 spin_lock(&adapter->tx_lock);
1258 last_consumer = adapter->last_cmd_consumer;
1259 DPRINTK(INFO, "procesing xmit complete\n");
1260 /* we assume in this case that there is only one port and that is
1261 * port #1...changes need to be done in firmware to indicate port
1262 * number as part of the descriptor. This way we will be able to get
1263 * the netdev which is associated with that device.
1264 */
3d396eb1 1265
9b410117 1266 consumer = le32_to_cpu(*(adapter->cmd_consumer));
3d396eb1
AK		 1267 if (last_consumer == consumer) { /* Ring is empty */
1268 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
1269 last_consumer, consumer);
1270 spin_unlock(&adapter->tx_lock);
ed25ffa1 1271 return 1;
3d396eb1
AK		 1272 }
1273
1274 adapter->proc_cmd_buf_counter++;
3d396eb1
AK		 1275 /*
1276 * Not needed - does not seem to be used anywhere.
1277 * adapter->cmd_consumer = consumer;
1278 */
1279 spin_unlock(&adapter->tx_lock);
1280
ed25ffa1 1281 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
3d396eb1 1282 buffer = &adapter->cmd_buf_arr[last_consumer];
3176ff3e 1283 pdev = adapter->pdev;
53a01e00 1284 if (buffer->skb) {
1285 frag = &buffer->frag_array[0];
3d396eb1
AK		 1286 pci_unmap_single(pdev, frag->dma, frag->length,
1287 PCI_DMA_TODEVICE);
96acb6eb 1288 frag->dma = 0ULL;
3d396eb1
AK		 1289 for (i = 1; i < buffer->frag_count; i++) {
1290 DPRINTK(INFO, "getting fragment no %d\n", i);
1291 frag++; /* Get the next frag */
1292 pci_unmap_page(pdev, frag->dma, frag->length,
1293 PCI_DMA_TODEVICE);
96acb6eb 1294 frag->dma = 0ULL;
3d396eb1
AK		 1295 }
1296
3176ff3e 1297 adapter->stats.skbfreed++;
53a01e00 1298 dev_kfree_skb_any(buffer->skb);
1299 buffer->skb = NULL;
3d396eb1 1300 } else if (adapter->proc_cmd_buf_counter == 1) {
3176ff3e 1301 adapter->stats.txnullskb++;
3d396eb1 1302 }
3176ff3e
MT		 1303 if (unlikely(netif_queue_stopped(adapter->netdev)
1304 && netif_carrier_ok(adapter->netdev))
1305 && ((jiffies - adapter->netdev->trans_start) >
1306 adapter->netdev->watchdog_timeo)) {
1307 SCHEDULE_WORK(&adapter->tx_timeout_task);
3d396eb1
AK		 1308 }
1309
1310 last_consumer = get_next_index(last_consumer,
1311 adapter->max_tx_desc_count);
ed25ffa1 1312 count1++;
3d396eb1 1313 }
3d396eb1 1314
ed25ffa1 1315 count2 = 0;
3d396eb1
AK		 1316 spin_lock(&adapter->tx_lock);
1317 if ((--adapter->proc_cmd_buf_counter) == 0) {
1318 adapter->last_cmd_consumer = last_consumer;
1319 while ((adapter->last_cmd_consumer != consumer)
ed25ffa1 1320 && (count2 < MAX_STATUS_HANDLE)) {
3d396eb1
AK		 1321 buffer =
1322 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
ed25ffa1 1323 count2++;
3d396eb1
AK		 1324 if (buffer->skb)
1325 break;
1326 else
1327 adapter->last_cmd_consumer =
1328 get_next_index(adapter->last_cmd_consumer,
1329 adapter->max_tx_desc_count);
1330 }
1331 }
ed25ffa1 1332 if (count1 || count2) {
3176ff3e
MT		 1333 if (netif_queue_stopped(adapter->netdev)
1334 && (adapter->flags & NETXEN_NETDEV_STATUS)) {
1335 netif_wake_queue(adapter->netdev);
1336 adapter->flags &= ~NETXEN_NETDEV_STATUS;
3d396eb1
AK		 1337 }
1338 }
ed25ffa1
AK		 1339 /*
1340 * If everything is freed up to consumer then check if the ring is full
1341 * If the ring is full then check if more needs to be freed and
1342 * schedule the call back again.
1343 *
1344 * This happens when there are 2 CPUs. One could be freeing and the
1345 * other filling it. If the ring is full when we get out of here and
1346 * the card has already interrupted the host then the host can miss the
1347 * interrupt.
1348 *
1349 * There is still a possible race condition and the host could miss an
1350 * interrupt. The card has to take care of this.
1351 */
1352 if (adapter->last_cmd_consumer == consumer &&
1353 (((adapter->cmd_producer + 1) %
1354 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
9b410117 1355 consumer = le32_to_cpu(*(adapter->cmd_consumer));
ed25ffa1
AK		 1356 }
1357 done = (adapter->last_cmd_consumer == consumer);
3d396eb1
AK		 1358
1359 spin_unlock(&adapter->tx_lock);
1360 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1361 __FUNCTION__);
ed25ffa1 1362 return (done);
3d396eb1
AK		 1363}
1364
1365/*
1366 * netxen_post_rx_buffers puts buffer in the Phantom memory
1367 */
1368void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1369{
1370 struct pci_dev *pdev = adapter->ahw.pdev;
1371 struct sk_buff *skb;
1372 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1373 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
ed25ffa1 1374 uint producer;
3d396eb1
AK		 1375 struct rcv_desc *pdesc;
1376 struct netxen_rx_buffer *buffer;
1377 int count = 0;
1378 int index = 0;
ed25ffa1
AK		 1379 netxen_ctx_msg msg = 0;
1380 dma_addr_t dma;
3d396eb1 1381
3d396eb1 1382 rcv_desc = &recv_ctx->rcv_desc[ringid];
3d396eb1
AK		 1383
1384 producer = rcv_desc->producer;
1385 index = rcv_desc->begin_alloc;
1386 buffer = &rcv_desc->rx_buf_arr[index];
1387 /* We can start writing rx descriptors into the phantom memory. */
1388 while (buffer->state == NETXEN_BUFFER_FREE) {
1389 skb = dev_alloc_skb(rcv_desc->skb_size);
1390 if (unlikely(!skb)) {
1391 /*
ed25ffa1 1392 * TODO
3d396eb1
AK		 1393 * We need to schedule the posting of buffers to the pegs.
1394 */
1395 rcv_desc->begin_alloc = index;
cb8011ad 1396 DPRINTK(ERR, "netxen_post_rx_buffers: "
3d396eb1
AK		 1397 " allocated only %d buffers\n", count);
1398 break;
1399 }
ed25ffa1
AK		 1400
1401 count++; /* now there should be no failure */
1402 pdesc = &rcv_desc->desc_head[producer];
1403
1404#if defined(XGB_DEBUG)
1405 *(unsigned long *)(skb->head) = 0xc0debabe;
1406 if (skb_is_nonlinear(skb)) {
1407 printk("Allocated SKB @%p is nonlinear\n");
1408 }
1409#endif
1410 skb_reserve(skb, 2);
1411 /* This will be setup when we receive the
1412 * buffer after it has been filled FSL TBD TBD
1413 * skb->dev = netdev;
1414 */
1415 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1416 PCI_DMA_FROMDEVICE);
ed33ebe4 1417 pdesc->addr_buffer = cpu_to_le64(dma);
ed25ffa1
AK		 1418 buffer->skb = skb;
1419 buffer->state = NETXEN_BUFFER_BUSY;
1420 buffer->dma = dma;
1421 /* make a rcv descriptor */
ed33ebe4
AK		 1422 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1423 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
ed25ffa1
AK		 1424 DPRINTK(INFO, "done writing descripter\n");
1425 producer =
1426 get_next_index(producer, rcv_desc->max_rx_desc_count);
1427 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1428 buffer = &rcv_desc->rx_buf_arr[index];
1429 }
1430 /* if we did allocate buffers, then write the count to Phantom */
1431 if (count) {
1432 rcv_desc->begin_alloc = index;
1433 rcv_desc->rcv_pending += count;
ed25ffa1
AK		 1434 rcv_desc->producer = producer;
1435 if (rcv_desc->rcv_free >= 32) {
1436 rcv_desc->rcv_free = 0;
1437 /* Window = 1 */
1438 writel((producer - 1) &
1439 (rcv_desc->max_rx_desc_count - 1),
1440 NETXEN_CRB_NORMALIZE(adapter,
3176ff3e
MT		 1441 recv_crb_registers[
1442 adapter->portnum].
ed25ffa1
AK		 1443 rcv_desc_crb[ringid].
1444 crb_rcv_producer_offset));
1445 /*
1446 * Write a doorbell msg to tell phanmon of change in
1447 * receive ring producer
1448 */
1449 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1450 netxen_set_msg_privid(msg);
1451 netxen_set_msg_count(msg,
1452 ((producer -
1453 1) & (rcv_desc->
1454 max_rx_desc_count - 1)));
3176ff3e 1455 netxen_set_msg_ctxid(msg, adapter->portnum);
ed25ffa1
AK		 1456 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1457 writel(msg,
1458 DB_NORMALIZE(adapter,
1459 NETXEN_RCV_PRODUCER_OFFSET));
96acb6eb 1460 wmb();
ed25ffa1
AK		 1461 }
1462 }
1463}
1464
993fb90c
AB		 1465static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1466 uint32_t ctx, uint32_t ringid)
ed25ffa1
AK		 1467{
1468 struct pci_dev *pdev = adapter->ahw.pdev;
1469 struct sk_buff *skb;
1470 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1471 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1472 u32 producer;
1473 struct rcv_desc *pdesc;
1474 struct netxen_rx_buffer *buffer;
1475 int count = 0;
1476 int index = 0;
1477
ed25ffa1
AK		 1478 rcv_desc = &recv_ctx->rcv_desc[ringid];
1479
1480 producer = rcv_desc->producer;
1481 index = rcv_desc->begin_alloc;
1482 buffer = &rcv_desc->rx_buf_arr[index];
1483 /* We can start writing rx descriptors into the phantom memory. */
1484 while (buffer->state == NETXEN_BUFFER_FREE) {
1485 skb = dev_alloc_skb(rcv_desc->skb_size);
1486 if (unlikely(!skb)) {
1487 /*
1488 * We need to schedule the posting of buffers to the pegs.
1489 */
1490 rcv_desc->begin_alloc = index;
1491 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1492 " allocated only %d buffers\n", count);
1493 break;
1494 }
3d396eb1
AK		 1495 count++; /* now there should be no failure */
1496 pdesc = &rcv_desc->desc_head[producer];
ed25ffa1 1497 skb_reserve(skb, 2);
3d396eb1
AK		 1498 /*
1499 * This will be setup when we receive the
1500 * buffer after it has been filled
1501 * skb->dev = netdev;
1502 */
1503 buffer->skb = skb;
1504 buffer->state = NETXEN_BUFFER_BUSY;
1505 buffer->dma = pci_map_single(pdev, skb->data,
1506 rcv_desc->dma_size,
1507 PCI_DMA_FROMDEVICE);
ed25ffa1 1508
3d396eb1 1509 /* make a rcv descriptor */
ed33ebe4 1510 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
a608ab9c 1511 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
3d396eb1
AK		 1512 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1513 DPRINTK(INFO, "done writing descripter\n");
1514 producer =
1515 get_next_index(producer, rcv_desc->max_rx_desc_count);
1516 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1517 buffer = &rcv_desc->rx_buf_arr[index];
1518 }
1519
1520 /* if we did allocate buffers, then write the count to Phantom */
1521 if (count) {
1522 rcv_desc->begin_alloc = index;
1523 rcv_desc->rcv_pending += count;
3d396eb1
AK		 1524 rcv_desc->producer = producer;
1525 if (rcv_desc->rcv_free >= 32) {
1526 rcv_desc->rcv_free = 0;
1527 /* Window = 1 */
1528 writel((producer - 1) &
1529 (rcv_desc->max_rx_desc_count - 1),
1530 NETXEN_CRB_NORMALIZE(adapter,
3176ff3e
MT		 1531 recv_crb_registers[
1532 adapter->portnum].
ed25ffa1 1533 rcv_desc_crb[ringid].
3d396eb1
AK		 1534 crb_rcv_producer_offset));
1535 wmb();
1536 }
1537 }
1538}
1539
1540int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1541{
1542 if (find_diff_among(adapter->last_cmd_consumer,
1543 adapter->cmd_producer,
1544 adapter->max_tx_desc_count) > 0)
1545 return 1;
1546
1547 return 0;
1548}
1549
3d396eb1
AK		 1550
1551void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1552{
3d396eb1 1553 memset(&adapter->stats, 0, sizeof(adapter->stats));
3176ff3e 1554 return;
3d396eb1
AK		 1555}
1556
Linux kernel - Deliverables
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