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netxen: fix link speed reporting for some boards
[deliverable/linux.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1
AK		 1/*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
80922fbc 4 *
3d396eb1
AK		 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
80922fbc 9 *
3d396eb1
AK		 10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
80922fbc 14 *
3d396eb1
AK		 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
80922fbc 19 *
3d396eb1
AK		 20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
80922fbc 22 *
3d396eb1
AK		 23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34#include <linux/netdevice.h>
35#include <linux/delay.h>
36#include "netxen_nic.h"
37#include "netxen_nic_hw.h"
3d396eb1
AK		 38#include "netxen_nic_phan_reg.h"
39
40struct crb_addr_pair {
e0e20a1a
LCMT		 41 u32 addr;
42 u32 data;
3d396eb1
AK		 43};
44
45#define NETXEN_MAX_CRB_XFORM 60
46static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 47#define NETXEN_ADDR_ERROR (0xffffffff)
3d396eb1
AK		 48
49#define crb_addr_transform(name) \
50 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
51 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
52
cb8011ad
AK		 53#define NETXEN_NIC_XDMA_RESET 0x8000ff
54
993fb90c
AB		 55static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
56 uint32_t ctx, uint32_t ringid);
57
58#if 0
59static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
60 unsigned long off, int *data)
3d396eb1 61{
cb8011ad 62 void __iomem *addr = pci_base_offset(adapter, off);
3d396eb1
AK		 63 writel(*data, addr);
64}
993fb90c 65#endif /* 0 */
3d396eb1
AK		 66
67static void crb_addr_transform_setup(void)
68{
69 crb_addr_transform(XDMA);
70 crb_addr_transform(TIMR);
71 crb_addr_transform(SRE);
72 crb_addr_transform(SQN3);
73 crb_addr_transform(SQN2);
74 crb_addr_transform(SQN1);
75 crb_addr_transform(SQN0);
76 crb_addr_transform(SQS3);
77 crb_addr_transform(SQS2);
78 crb_addr_transform(SQS1);
79 crb_addr_transform(SQS0);
80 crb_addr_transform(RPMX7);
81 crb_addr_transform(RPMX6);
82 crb_addr_transform(RPMX5);
83 crb_addr_transform(RPMX4);
84 crb_addr_transform(RPMX3);
85 crb_addr_transform(RPMX2);
86 crb_addr_transform(RPMX1);
87 crb_addr_transform(RPMX0);
88 crb_addr_transform(ROMUSB);
89 crb_addr_transform(SN);
90 crb_addr_transform(QMN);
91 crb_addr_transform(QMS);
92 crb_addr_transform(PGNI);
93 crb_addr_transform(PGND);
94 crb_addr_transform(PGN3);
95 crb_addr_transform(PGN2);
96 crb_addr_transform(PGN1);
97 crb_addr_transform(PGN0);
98 crb_addr_transform(PGSI);
99 crb_addr_transform(PGSD);
100 crb_addr_transform(PGS3);
101 crb_addr_transform(PGS2);
102 crb_addr_transform(PGS1);
103 crb_addr_transform(PGS0);
104 crb_addr_transform(PS);
105 crb_addr_transform(PH);
106 crb_addr_transform(NIU);
107 crb_addr_transform(I2Q);
108 crb_addr_transform(EG);
109 crb_addr_transform(MN);
110 crb_addr_transform(MS);
111 crb_addr_transform(CAS2);
112 crb_addr_transform(CAS1);
113 crb_addr_transform(CAS0);
114 crb_addr_transform(CAM);
115 crb_addr_transform(C2C1);
116 crb_addr_transform(C2C0);
1fcca1a5 117 crb_addr_transform(SMB);
e4c93c81
DP		 118 crb_addr_transform(OCM0);
119 crb_addr_transform(I2C0);
3d396eb1
AK		 120}
121
122int netxen_init_firmware(struct netxen_adapter *adapter)
123{
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
3ce06a32 127 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
3d396eb1
AK		 128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
2956640d 133 msleep(1);
3d396eb1 134 /* Window 1 call */
3ce06a32 135 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
3d396eb1
AK		 136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
3ce06a32
DP		 146 adapter->pci_write_normalize(adapter,
147 CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
148 adapter->pci_write_normalize(adapter,
149 CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
150 adapter->pci_write_normalize(adapter,
151 CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
152 adapter->pci_write_normalize(adapter,
153 CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
3d396eb1
AK		 154
155 return err;
156}
157
2956640d 158void netxen_release_rx_buffers(struct netxen_adapter *adapter)
3d396eb1 159{
2956640d 160 struct netxen_recv_context *recv_ctx;
48bfd1e0 161 struct nx_host_rds_ring *rds_ring;
2956640d
DP		 162 struct netxen_rx_buffer *rx_buf;
163 int i, ctxid, ring;
3d396eb1 164
3d396eb1 165 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
2956640d 166 recv_ctx = &adapter->recv_ctx[ctxid];
48bfd1e0
DP		 167 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
168 rds_ring = &recv_ctx->rds_rings[ring];
169 for (i = 0; i < rds_ring->max_rx_desc_count; ++i) {
170 rx_buf = &(rds_ring->rx_buf_arr[i]);
2956640d
DP		 171 if (rx_buf->state == NETXEN_BUFFER_FREE)
172 continue;
173 pci_unmap_single(adapter->pdev,
174 rx_buf->dma,
48bfd1e0 175 rds_ring->dma_size,
2956640d
DP		 176 PCI_DMA_FROMDEVICE);
177 if (rx_buf->skb != NULL)
178 dev_kfree_skb_any(rx_buf->skb);
179 }
180 }
181 }
182}
183
184void netxen_release_tx_buffers(struct netxen_adapter *adapter)
185{
186 struct netxen_cmd_buffer *cmd_buf;
187 struct netxen_skb_frag *buffrag;
188 int i, j;
189
190 cmd_buf = adapter->cmd_buf_arr;
191 for (i = 0; i < adapter->max_tx_desc_count; i++) {
192 buffrag = cmd_buf->frag_array;
193 if (buffrag->dma) {
194 pci_unmap_single(adapter->pdev, buffrag->dma,
195 buffrag->length, PCI_DMA_TODEVICE);
196 buffrag->dma = 0ULL;
197 }
198 for (j = 0; j < cmd_buf->frag_count; j++) {
199 buffrag++;
200 if (buffrag->dma) {
201 pci_unmap_page(adapter->pdev, buffrag->dma,
202 buffrag->length,
203 PCI_DMA_TODEVICE);
204 buffrag->dma = 0ULL;
205 }
206 }
207 /* Free the skb we received in netxen_nic_xmit_frame */
208 if (cmd_buf->skb) {
209 dev_kfree_skb_any(cmd_buf->skb);
210 cmd_buf->skb = NULL;
211 }
212 cmd_buf++;
213 }
214}
215
216void netxen_free_sw_resources(struct netxen_adapter *adapter)
217{
218 struct netxen_recv_context *recv_ctx;
48bfd1e0 219 struct nx_host_rds_ring *rds_ring;
2956640d
DP		 220 int ctx, ring;
221
222 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
223 recv_ctx = &adapter->recv_ctx[ctx];
48bfd1e0
DP		 224 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
225 rds_ring = &recv_ctx->rds_rings[ring];
226 if (rds_ring->rx_buf_arr) {
227 vfree(rds_ring->rx_buf_arr);
228 rds_ring->rx_buf_arr = NULL;
2956640d
DP		 229 }
230 }
231 }
232 if (adapter->cmd_buf_arr)
233 vfree(adapter->cmd_buf_arr);
234 return;
235}
236
237int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
238{
239 struct netxen_recv_context *recv_ctx;
48bfd1e0 240 struct nx_host_rds_ring *rds_ring;
2956640d
DP		 241 struct netxen_rx_buffer *rx_buf;
242 int ctx, ring, i, num_rx_bufs;
243
244 struct netxen_cmd_buffer *cmd_buf_arr;
245 struct net_device *netdev = adapter->netdev;
246
247 cmd_buf_arr = (struct netxen_cmd_buffer *)vmalloc(TX_RINGSIZE);
248 if (cmd_buf_arr == NULL) {
249 printk(KERN_ERR "%s: Failed to allocate cmd buffer ring\n",
250 netdev->name);
251 return -ENOMEM;
252 }
253 memset(cmd_buf_arr, 0, TX_RINGSIZE);
254 adapter->cmd_buf_arr = cmd_buf_arr;
255
256 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
257 recv_ctx = &adapter->recv_ctx[ctx];
48bfd1e0
DP		 258 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
259 rds_ring = &recv_ctx->rds_rings[ring];
2956640d
DP		 260 switch (RCV_DESC_TYPE(ring)) {
261 case RCV_DESC_NORMAL:
48bfd1e0 262 rds_ring->max_rx_desc_count =
2956640d 263 adapter->max_rx_desc_count;
48bfd1e0 264 rds_ring->flags = RCV_DESC_NORMAL;
d9e651bc
DP		 265 if (adapter->ahw.cut_through) {
266 rds_ring->dma_size =
267 NX_CT_DEFAULT_RX_BUF_LEN;
268 rds_ring->skb_size =
269 NX_CT_DEFAULT_RX_BUF_LEN;
270 } else {
271 rds_ring->dma_size = RX_DMA_MAP_LEN;
272 rds_ring->skb_size =
273 MAX_RX_BUFFER_LENGTH;
274 }
2956640d
DP		 275 break;
276
277 case RCV_DESC_JUMBO:
48bfd1e0 278 rds_ring->max_rx_desc_count =
2956640d 279 adapter->max_jumbo_rx_desc_count;
48bfd1e0 280 rds_ring->flags = RCV_DESC_JUMBO;
d9e651bc
DP		 281 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
282 rds_ring->dma_size =
283 NX_P3_RX_JUMBO_BUF_MAX_LEN;
284 else
285 rds_ring->dma_size =
286 NX_P2_RX_JUMBO_BUF_MAX_LEN;
48bfd1e0 287 rds_ring->skb_size =
d9e651bc 288 rds_ring->dma_size + NET_IP_ALIGN;
2956640d
DP		 289 break;
290
291 case RCV_RING_LRO:
48bfd1e0 292 rds_ring->max_rx_desc_count =
2956640d 293 adapter->max_lro_rx_desc_count;
48bfd1e0
DP		 294 rds_ring->flags = RCV_DESC_LRO;
295 rds_ring->dma_size = RX_LRO_DMA_MAP_LEN;
296 rds_ring->skb_size = MAX_RX_LRO_BUFFER_LENGTH;
2956640d
DP		 297 break;
298
299 }
48bfd1e0 300 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
2956640d 301 vmalloc(RCV_BUFFSIZE);
48bfd1e0 302 if (rds_ring->rx_buf_arr == NULL) {
2956640d
DP		 303 printk(KERN_ERR "%s: Failed to allocate "
304 "rx buffer ring %d\n",
305 netdev->name, ring);
306 /* free whatever was already allocated */
307 goto err_out;
308 }
48bfd1e0 309 memset(rds_ring->rx_buf_arr, 0, RCV_BUFFSIZE);
d9e651bc 310 INIT_LIST_HEAD(&rds_ring->free_list);
48bfd1e0 311 rds_ring->begin_alloc = 0;
3d396eb1
AK		 312 /*
313 * Now go through all of them, set reference handles
314 * and put them in the queues.
315 */
48bfd1e0
DP		 316 num_rx_bufs = rds_ring->max_rx_desc_count;
317 rx_buf = rds_ring->rx_buf_arr;
3d396eb1 318 for (i = 0; i < num_rx_bufs; i++) {
d9e651bc
DP		 319 list_add_tail(&rx_buf->list,
320 &rds_ring->free_list);
3d396eb1
AK		 321 rx_buf->ref_handle = i;
322 rx_buf->state = NETXEN_BUFFER_FREE;
3d396eb1
AK		 323 rx_buf++;
324 }
325 }
326 }
2956640d
DP		 327
328 return 0;
329
330err_out:
331 netxen_free_sw_resources(adapter);
332 return -ENOMEM;
3d396eb1
AK		 333}
334
3d396eb1
AK		 335void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
336{
3d396eb1
AK		 337 switch (adapter->ahw.board_type) {
338 case NETXEN_NIC_GBE:
80922fbc 339 adapter->enable_phy_interrupts =
3d396eb1 340 netxen_niu_gbe_enable_phy_interrupts;
80922fbc 341 adapter->disable_phy_interrupts =
3d396eb1 342 netxen_niu_gbe_disable_phy_interrupts;
80922fbc
AK		 343 adapter->macaddr_set = netxen_niu_macaddr_set;
344 adapter->set_mtu = netxen_nic_set_mtu_gb;
345 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
80922fbc
AK		 346 adapter->phy_read = netxen_niu_gbe_phy_read;
347 adapter->phy_write = netxen_niu_gbe_phy_write;
c9fc891f 348 adapter->init_port = netxen_niu_gbe_init_port;
80922fbc 349 adapter->stop_port = netxen_niu_disable_gbe_port;
3d396eb1
AK		 350 break;
351
352 case NETXEN_NIC_XGBE:
80922fbc 353 adapter->enable_phy_interrupts =
3d396eb1 354 netxen_niu_xgbe_enable_phy_interrupts;
80922fbc 355 adapter->disable_phy_interrupts =
3d396eb1 356 netxen_niu_xgbe_disable_phy_interrupts;
80922fbc
AK		 357 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
358 adapter->set_mtu = netxen_nic_set_mtu_xgb;
359 adapter->init_port = netxen_niu_xg_init_port;
360 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
80922fbc 361 adapter->stop_port = netxen_niu_disable_xg_port;
3d396eb1
AK		 362 break;
363
364 default:
365 break;
366 }
9ad27643
DP		 367
368 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
369 adapter->set_mtu = nx_fw_cmd_set_mtu;
370 adapter->set_promisc = netxen_p3_nic_set_promisc;
371 }
3d396eb1
AK		 372}
373
374/*
375 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
376 * address to external PCI CRB address.
377 */
993fb90c 378static u32 netxen_decode_crb_addr(u32 addr)
3d396eb1
AK		 379{
380 int i;
e0e20a1a 381 u32 base_addr, offset, pci_base;
3d396eb1
AK		 382
383 crb_addr_transform_setup();
384
385 pci_base = NETXEN_ADDR_ERROR;
386 base_addr = addr & 0xfff00000;
387 offset = addr & 0x000fffff;
388
389 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
390 if (crb_addr_xform[i] == base_addr) {
391 pci_base = i << 20;
392 break;
393 }
394 }
395 if (pci_base == NETXEN_ADDR_ERROR)
396 return pci_base;
397 else
398 return (pci_base + offset);
399}
400
13ba9c77
MT		 401static long rom_max_timeout = 100;
402static long rom_lock_timeout = 10000;
7830b22c 403#if 0
27d2ab54 404static long rom_write_timeout = 700;
7830b22c 405#endif
3d396eb1 406
993fb90c 407static int rom_lock(struct netxen_adapter *adapter)
3d396eb1
AK		 408{
409 int iter;
410 u32 done = 0;
411 int timeout = 0;
412
413 while (!done) {
414 /* acquire semaphore2 from PCI HW block */
415 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
416 &done);
417 if (done == 1)
418 break;
419 if (timeout >= rom_lock_timeout)
420 return -EIO;
421
422 timeout++;
423 /*
424 * Yield CPU
425 */
426 if (!in_atomic())
427 schedule();
428 else {
429 for (iter = 0; iter < 20; iter++)
430 cpu_relax(); /*This a nop instr on i386 */
431 }
432 }
433 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
434 return 0;
435}
436
993fb90c 437static int netxen_wait_rom_done(struct netxen_adapter *adapter)
3d396eb1
AK		 438{
439 long timeout = 0;
440 long done = 0;
441
442 while (done == 0) {
443 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
444 done &= 2;
445 timeout++;
446 if (timeout >= rom_max_timeout) {
447 printk("Timeout reached waiting for rom done");
448 return -EIO;
449 }
450 }
451 return 0;
452}
453
7830b22c 454#if 0
993fb90c 455static int netxen_rom_wren(struct netxen_adapter *adapter)
cb8011ad
AK		 456{
457 /* Set write enable latch in ROM status register */
458 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
459 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
460 M25P_INSTR_WREN);
461 if (netxen_wait_rom_done(adapter)) {
462 return -1;
463 }
464 return 0;
465}
466
993fb90c
AB		 467static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
468 unsigned int addr)
cb8011ad
AK		 469{
470 unsigned int data = 0xdeaddead;
471 data = netxen_nic_reg_read(adapter, addr);
472 return data;
473}
474
993fb90c 475static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
cb8011ad
AK		 476{
477 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
478 M25P_INSTR_RDSR);
479 if (netxen_wait_rom_done(adapter)) {
480 return -1;
481 }
482 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
483}
7830b22c 484#endif
cb8011ad 485
993fb90c 486static void netxen_rom_unlock(struct netxen_adapter *adapter)
cb8011ad
AK		 487{
488 u32 val;
489
490 /* release semaphore2 */
491 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
492
493}
494
7830b22c 495#if 0
993fb90c 496static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
cb8011ad
AK		 497{
498 long timeout = 0;
499 long wip = 1;
500 int val;
501 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
502 while (wip != 0) {
503 val = netxen_do_rom_rdsr(adapter);
504 wip = val & 1;
505 timeout++;
506 if (timeout > rom_max_timeout) {
507 return -1;
508 }
509 }
510 return 0;
511}
512
993fb90c
AB		 513static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
514 int data)
cb8011ad
AK		 515{
516 if (netxen_rom_wren(adapter)) {
517 return -1;
518 }
519 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
520 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
521 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
522 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
523 M25P_INSTR_PP);
524 if (netxen_wait_rom_done(adapter)) {
525 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
526 return -1;
527 }
528
529 return netxen_rom_wip_poll(adapter);
530}
7830b22c 531#endif
cb8011ad 532
993fb90c
AB		 533static int do_rom_fast_read(struct netxen_adapter *adapter,
534 int addr, int *valp)
3d396eb1 535{
96acb6eb 536 cond_resched();
b58ecad8 537
3d396eb1
AK		 538 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
539 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
b58ecad8 540 udelay(100); /* prevent bursting on CRB */
3d396eb1
AK		 541 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
542 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
543 if (netxen_wait_rom_done(adapter)) {
544 printk("Error waiting for rom done\n");
545 return -EIO;
546 }
547 /* reset abyte_cnt and dummy_byte_cnt */
548 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
b58ecad8 549 udelay(100); /* prevent bursting on CRB */
3d396eb1
AK		 550 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
551
552 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
553 return 0;
554}
555
993fb90c
AB		 556static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
557 u8 *bytes, size_t size)
27d2ab54
AK		 558{
559 int addridx;
560 int ret = 0;
561
562 for (addridx = addr; addridx < (addr + size); addridx += 4) {
f305f789
AV		 563 int v;
564 ret = do_rom_fast_read(adapter, addridx, &v);
27d2ab54
AK		 565 if (ret != 0)
566 break;
f305f789 567 *(__le32 *)bytes = cpu_to_le32(v);
27d2ab54
AK		 568 bytes += 4;
569 }
570
571 return ret;
572}
573
574int
4790654c 575netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
27d2ab54
AK		 576 u8 *bytes, size_t size)
577{
578 int ret;
579
580 ret = rom_lock(adapter);
581 if (ret < 0)
582 return ret;
583
584 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
585
586 netxen_rom_unlock(adapter);
587 return ret;
588}
589
3d396eb1
AK		 590int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
591{
592 int ret;
593
594 if (rom_lock(adapter) != 0)
595 return -EIO;
596
597 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 598 netxen_rom_unlock(adapter);
599 return ret;
600}
601
993fb90c 602#if 0
cb8011ad
AK		 603int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
604{
605 int ret = 0;
606
607 if (rom_lock(adapter) != 0) {
608 return -1;
609 }
610 ret = do_rom_fast_write(adapter, addr, data);
611 netxen_rom_unlock(adapter);
612 return ret;
613}
27d2ab54 614
4790654c 615static int do_rom_fast_write_words(struct netxen_adapter *adapter,
993fb90c 616 int addr, u8 *bytes, size_t size)
27d2ab54
AK		 617{
618 int addridx = addr;
619 int ret = 0;
620
621 while (addridx < (addr + size)) {
622 int last_attempt = 0;
623 int timeout = 0;
624 int data;
625
f305f789 626 data = le32_to_cpu((*(__le32*)bytes));
27d2ab54
AK		 627 ret = do_rom_fast_write(adapter, addridx, data);
628 if (ret < 0)
629 return ret;
4790654c 630
27d2ab54
AK		 631 while(1) {
632 int data1;
633
f8dfdd5c
SH		 634 ret = do_rom_fast_read(adapter, addridx, &data1);
635 if (ret < 0)
636 return ret;
637
27d2ab54
AK		 638 if (data1 == data)
639 break;
640
641 if (timeout++ >= rom_write_timeout) {
642 if (last_attempt++ < 4) {
4790654c 643 ret = do_rom_fast_write(adapter,
27d2ab54
AK		 644 addridx, data);
645 if (ret < 0)
646 return ret;
647 }
648 else {
649 printk(KERN_INFO "Data write did not "
650 "succeed at address 0x%x\n", addridx);
651 break;
652 }
653 }
654 }
655
656 bytes += 4;
657 addridx += 4;
658 }
659
660 return ret;
661}
662
4790654c 663int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
27d2ab54
AK		 664 u8 *bytes, size_t size)
665{
666 int ret = 0;
667
668 ret = rom_lock(adapter);
669 if (ret < 0)
670 return ret;
671
672 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
673 netxen_rom_unlock(adapter);
674
675 return ret;
676}
677
993fb90c 678static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
27d2ab54
AK		 679{
680 int ret;
681
682 ret = netxen_rom_wren(adapter);
683 if (ret < 0)
684 return ret;
685
686 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
4790654c 687 netxen_crb_writelit_adapter(adapter,
27d2ab54
AK		 688 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
689
690 ret = netxen_wait_rom_done(adapter);
691 if (ret < 0)
692 return ret;
693
694 return netxen_rom_wip_poll(adapter);
695}
696
993fb90c 697static int netxen_rom_rdsr(struct netxen_adapter *adapter)
27d2ab54
AK		 698{
699 int ret;
700
701 ret = rom_lock(adapter);
702 if (ret < 0)
703 return ret;
704
705 ret = netxen_do_rom_rdsr(adapter);
706 netxen_rom_unlock(adapter);
707 return ret;
708}
709
710int netxen_backup_crbinit(struct netxen_adapter *adapter)
711{
712 int ret = FLASH_SUCCESS;
713 int val;
0d04761d 714 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
27d2ab54
AK		 715
716 if (!buffer)
4790654c 717 return -ENOMEM;
27d2ab54
AK		 718 /* unlock sector 63 */
719 val = netxen_rom_rdsr(adapter);
720 val = val & 0xe3;
721 ret = netxen_rom_wrsr(adapter, val);
722 if (ret != FLASH_SUCCESS)
723 goto out_kfree;
724
725 ret = netxen_rom_wip_poll(adapter);
726 if (ret != FLASH_SUCCESS)
727 goto out_kfree;
728
729 /* copy sector 0 to sector 63 */
4790654c 730 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
0d04761d 731 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 732 if (ret != FLASH_SUCCESS)
733 goto out_kfree;
734
4790654c 735 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
0d04761d 736 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 737 if (ret != FLASH_SUCCESS)
738 goto out_kfree;
739
740 /* lock sector 63 */
741 val = netxen_rom_rdsr(adapter);
742 if (!(val & 0x8)) {
743 val |= (0x1 << 2);
744 /* lock sector 63 */
745 if (netxen_rom_wrsr(adapter, val) == 0) {
746 ret = netxen_rom_wip_poll(adapter);
747 if (ret != FLASH_SUCCESS)
748 goto out_kfree;
749
750 /* lock SR writes */
751 ret = netxen_rom_wip_poll(adapter);
752 if (ret != FLASH_SUCCESS)
753 goto out_kfree;
754 }
755 }
756
757out_kfree:
758 kfree(buffer);
759 return ret;
760}
761
993fb90c 762static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
cb8011ad
AK		 763{
764 netxen_rom_wren(adapter);
765 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
766 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
767 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
768 M25P_INSTR_SE);
769 if (netxen_wait_rom_done(adapter)) {
770 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
771 return -1;
772 }
773 return netxen_rom_wip_poll(adapter);
774}
775
993fb90c 776static void check_erased_flash(struct netxen_adapter *adapter, int addr)
27d2ab54
AK		 777{
778 int i;
779 int val;
780 int count = 0, erased_errors = 0;
781 int range;
782
4790654c 783 range = (addr == NETXEN_USER_START) ?
0d04761d 784 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
4790654c 785
27d2ab54
AK		 786 for (i = addr; i < range; i += 4) {
787 netxen_rom_fast_read(adapter, i, &val);
788 if (val != 0xffffffff)
789 erased_errors++;
790 count++;
791 }
792
793 if (erased_errors)
794 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
795 "for sector address: %x\n", erased_errors, count, addr);
796}
797
cb8011ad
AK		 798int netxen_rom_se(struct netxen_adapter *adapter, int addr)
799{
800 int ret = 0;
801 if (rom_lock(adapter) != 0) {
802 return -1;
803 }
804 ret = netxen_do_rom_se(adapter, addr);
805 netxen_rom_unlock(adapter);
27d2ab54
AK		 806 msleep(30);
807 check_erased_flash(adapter, addr);
808
809 return ret;
810}
811
993fb90c
AB		 812static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
813 int start, int end)
27d2ab54
AK		 814{
815 int ret = FLASH_SUCCESS;
816 int i;
817
818 for (i = start; i < end; i++) {
0d04761d 819 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 820 if (ret)
821 break;
822 ret = netxen_rom_wip_poll(adapter);
823 if (ret < 0)
824 return ret;
825 }
826
827 return ret;
828}
829
830int
831netxen_flash_erase_secondary(struct netxen_adapter *adapter)
832{
833 int ret = FLASH_SUCCESS;
834 int start, end;
835
0d04761d
MT		 836 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
837 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 838 ret = netxen_flash_erase_sections(adapter, start, end);
839
840 return ret;
841}
842
843int
844netxen_flash_erase_primary(struct netxen_adapter *adapter)
845{
846 int ret = FLASH_SUCCESS;
847 int start, end;
848
0d04761d
MT		 849 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
850 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 851 ret = netxen_flash_erase_sections(adapter, start, end);
852
853 return ret;
854}
855
e45d9ab4
AK		 856void netxen_halt_pegs(struct netxen_adapter *adapter)
857{
858 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
859 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
860 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
861 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
862}
863
27d2ab54
AK		 864int netxen_flash_unlock(struct netxen_adapter *adapter)
865{
866 int ret = 0;
867
868 ret = netxen_rom_wrsr(adapter, 0);
869 if (ret < 0)
870 return ret;
871
872 ret = netxen_rom_wren(adapter);
873 if (ret < 0)
874 return ret;
875
3d396eb1
AK		 876 return ret;
877}
7830b22c 878#endif /* 0 */
3d396eb1
AK		 879
880#define NETXEN_BOARDTYPE 0x4008
881#define NETXEN_BOARDNUM 0x400c
882#define NETXEN_CHIPNUM 0x4010
3d396eb1
AK		 883
884int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
885{
dcd56fdb 886 int addr, val;
2956640d 887 int i, init_delay = 0;
3d396eb1 888 struct crb_addr_pair *buf;
2956640d 889 unsigned offset, n;
e0e20a1a 890 u32 off;
3d396eb1
AK		 891
892 /* resetall */
3d396eb1 893 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
2956640d 894 0xffffffff);
3d396eb1
AK		 895
896 if (verbose) {
3d396eb1
AK		 897 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
898 printk("P2 ROM board type: 0x%08x\n", val);
899 else
900 printk("Could not read board type\n");
901 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
902 printk("P2 ROM board num: 0x%08x\n", val);
903 else
904 printk("Could not read board number\n");
905 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
906 printk("P2 ROM chip num: 0x%08x\n", val);
907 else
908 printk("Could not read chip number\n");
909 }
910
2956640d
DP		 911 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
912 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
913 (n != 0xcafecafeUL) ||
914 netxen_rom_fast_read(adapter, 4, &n) != 0) {
915 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
916 "n: %08x\n", netxen_nic_driver_name, n);
3d396eb1
AK		 917 return -EIO;
918 }
2956640d
DP		 919 offset = n & 0xffffU;
920 n = (n >> 16) & 0xffffU;
921 } else {
922 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
923 !(n & 0x80000000)) {
924 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
925 "n: %08x\n", netxen_nic_driver_name, n);
926 return -EIO;
3d396eb1 927 }
2956640d
DP		 928 offset = 1;
929 n &= ~0x80000000;
930 }
931
932 if (n < 1024) {
933 if (verbose)
934 printk(KERN_DEBUG "%s: %d CRB init values found"
935 " in ROM.\n", netxen_nic_driver_name, n);
936 } else {
937 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
938 " initialized.\n", __func__, n);
939 return -EIO;
940 }
3d396eb1 941
2956640d
DP		 942 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
943 if (buf == NULL) {
944 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
945 netxen_nic_driver_name);
946 return -ENOMEM;
947 }
948 for (i = 0; i < n; i++) {
949 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
950 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0)
951 return -EIO;
952
953 buf[i].addr = addr;
954 buf[i].data = val;
955
956 if (verbose)
957 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
958 netxen_nic_driver_name,
959 (u32)netxen_decode_crb_addr(addr), val);
960 }
961 for (i = 0; i < n; i++) {
962
963 off = netxen_decode_crb_addr(buf[i].addr);
964 if (off == NETXEN_ADDR_ERROR) {
965 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5 966 buf[i].addr);
2956640d
DP		 967 continue;
968 }
969 off += NETXEN_PCI_CRBSPACE;
970 /* skipping cold reboot MAGIC */
971 if (off == NETXEN_CAM_RAM(0x1fc))
972 continue;
973
974 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
975 /* do not reset PCI */
976 if (off == (ROMUSB_GLB + 0xbc))
1fcca1a5 977 continue;
2956640d
DP		 978 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
979 buf[i].data = 0x1020;
980 /* skip the function enable register */
981 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
3d396eb1 982 continue;
2956640d
DP		 983 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
984 continue;
985 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
986 continue;
987 }
3d396eb1 988
2956640d
DP		 989 if (off == NETXEN_ADDR_ERROR) {
990 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
991 netxen_nic_driver_name, buf[i].addr);
992 continue;
993 }
994
995 /* After writing this register, HW needs time for CRB */
996 /* to quiet down (else crb_window returns 0xffffffff) */
997 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
998 init_delay = 1;
999 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
3d396eb1 1000 /* hold xdma in reset also */
cb8011ad 1001 buf[i].data = NETXEN_NIC_XDMA_RESET;
3d396eb1 1002 }
2956640d 1003 }
3d396eb1 1004
2956640d 1005 adapter->hw_write_wx(adapter, off, &buf[i].data, 4);
3d396eb1 1006
2956640d
DP		 1007 if (init_delay == 1) {
1008 msleep(1000);
1009 init_delay = 0;
3d396eb1 1010 }
2956640d
DP		 1011 msleep(1);
1012 }
1013 kfree(buf);
3d396eb1 1014
2956640d 1015 /* disable_peg_cache_all */
3d396eb1 1016
2956640d
DP		 1017 /* unreset_net_cache */
1018 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1019 adapter->hw_read_wx(adapter,
1020 NETXEN_ROMUSB_GLB_SW_RESET, &val, 4);
3d396eb1 1021 netxen_crb_writelit_adapter(adapter,
2956640d 1022 NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
3d396eb1 1023 }
2956640d
DP		 1024
1025 /* p2dn replyCount */
1026 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
1027 /* disable_peg_cache 0 */
1028 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
1029 /* disable_peg_cache 1 */
1030 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
1031
1032 /* peg_clr_all */
1033
1034 /* peg_clr 0 */
1035 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
1036 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
1037 /* peg_clr 1 */
1038 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
1039 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
1040 /* peg_clr 2 */
1041 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
1042 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
1043 /* peg_clr 3 */
1044 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
1045 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
3d396eb1
AK		 1046 return 0;
1047}
1048
ed25ffa1
AK		 1049int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
1050{
1051 uint64_t addr;
1052 uint32_t hi;
1053 uint32_t lo;
1054
1055 adapter->dummy_dma.addr =
7830b22c 1056 pci_alloc_consistent(adapter->pdev,
ed25ffa1
AK		 1057 NETXEN_HOST_DUMMY_DMA_SIZE,
1058 &adapter->dummy_dma.phys_addr);
1059 if (adapter->dummy_dma.addr == NULL) {
1060 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
2956640d 1061 __func__);
ed25ffa1
AK		 1062 return -ENOMEM;
1063 }
1064
1065 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1066 hi = (addr >> 32) & 0xffffffff;
1067 lo = addr & 0xffffffff;
1068
3ce06a32
DP		 1069 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1070 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
ed25ffa1 1071
2956640d
DP		 1072 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1073 uint32_t temp = 0;
1074 adapter->hw_write_wx(adapter, CRB_HOST_DUMMY_BUF, &temp, 4);
1075 }
1076
ed25ffa1
AK		 1077 return 0;
1078}
1079
1080void netxen_free_adapter_offload(struct netxen_adapter *adapter)
1081{
15eef1e1
DP		 1082 int i = 100;
1083
1084 if (!adapter->dummy_dma.addr)
1085 return;
439b454e 1086
15eef1e1 1087 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
439b454e
DP		 1088 do {
1089 if (dma_watchdog_shutdown_request(adapter) == 1)
1090 break;
1091 msleep(50);
1092 if (dma_watchdog_shutdown_poll_result(adapter) == 1)
1093 break;
1094 } while (--i);
15eef1e1 1095 }
439b454e 1096
15eef1e1
DP		 1097 if (i) {
1098 pci_free_consistent(adapter->pdev,
1099 NETXEN_HOST_DUMMY_DMA_SIZE,
1100 adapter->dummy_dma.addr,
1101 adapter->dummy_dma.phys_addr);
1102 adapter->dummy_dma.addr = NULL;
1103 } else {
1104 printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
1105 adapter->netdev->name);
ed25ffa1
AK		 1106 }
1107}
1108
96acb6eb 1109int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 1110{
1111 u32 val = 0;
2956640d 1112 int retries = 60;
3d396eb1 1113
cb8011ad 1114 if (!pegtune_val) {
96acb6eb 1115 do {
3ce06a32
DP		 1116 val = adapter->pci_read_normalize(adapter,
1117 CRB_CMDPEG_STATE);
96acb6eb
DP		 1118
1119 if (val == PHAN_INITIALIZE_COMPLETE ||
1120 val == PHAN_INITIALIZE_ACK)
1121 return 0;
1122
2956640d
DP		 1123 msleep(500);
1124
96acb6eb 1125 } while (--retries);
2956640d 1126
96acb6eb 1127 if (!retries) {
2956640d
DP		 1128 pegtune_val = adapter->pci_read_normalize(adapter,
1129 NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
96acb6eb
DP		 1130 printk(KERN_WARNING "netxen_phantom_init: init failed, "
1131 "pegtune_val=%x\n", pegtune_val);
1132 return -1;
3d396eb1 1133 }
3d396eb1 1134 }
96acb6eb
DP		 1135
1136 return 0;
3d396eb1
AK		 1137}
1138
2956640d
DP		 1139int netxen_receive_peg_ready(struct netxen_adapter *adapter)
1140{
1141 u32 val = 0;
1142 int retries = 2000;
1143
1144 do {
1145 val = adapter->pci_read_normalize(adapter, CRB_RCVPEG_STATE);
1146
1147 if (val == PHAN_PEG_RCV_INITIALIZED)
1148 return 0;
1149
1150 msleep(10);
1151
1152 } while (--retries);
1153
1154 if (!retries) {
1155 printk(KERN_ERR "Receive Peg initialization not "
1156 "complete, state: 0x%x.\n", val);
1157 return -EIO;
1158 }
1159
1160 return 0;
1161}
1162
d9e651bc
DP		 1163static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1164 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1165{
1166 struct netxen_rx_buffer *buffer;
1167 struct sk_buff *skb;
1168
1169 buffer = &rds_ring->rx_buf_arr[index];
1170
1171 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1172 PCI_DMA_FROMDEVICE);
1173
1174 skb = buffer->skb;
1175 if (!skb)
1176 goto no_skb;
1177
1178 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1179 adapter->stats.csummed++;
1180 skb->ip_summed = CHECKSUM_UNNECESSARY;
1181 } else
1182 skb->ip_summed = CHECKSUM_NONE;
1183
1184 skb->dev = adapter->netdev;
1185
1186 buffer->skb = NULL;
1187
1188no_skb:
1189 buffer->state = NETXEN_BUFFER_FREE;
1190 buffer->lro_current_frags = 0;
1191 buffer->lro_expected_frags = 0;
1192 list_add_tail(&buffer->list, &rds_ring->free_list);
1193 return skb;
1194}
1195
3d396eb1
AK		 1196/*
1197 * netxen_process_rcv() send the received packet to the protocol stack.
1198 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1199 * invoke the routine to send more rx buffers to the Phantom...
1200 */
993fb90c 1201static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
d9e651bc 1202 struct status_desc *desc, struct status_desc *frag_desc)
3d396eb1 1203{
3176ff3e 1204 struct net_device *netdev = adapter->netdev;
5dc16268
DP		 1205 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1206 int index = netxen_get_sts_refhandle(sts_data);
3d396eb1
AK		 1207 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1208 struct netxen_rx_buffer *buffer;
1209 struct sk_buff *skb;
5dc16268 1210 u32 length = netxen_get_sts_totallength(sts_data);
3d396eb1 1211 u32 desc_ctx;
d9e651bc 1212 u16 pkt_offset = 0, cksum;
48bfd1e0 1213 struct nx_host_rds_ring *rds_ring;
3d396eb1 1214
5dc16268 1215 desc_ctx = netxen_get_sts_type(sts_data);
3d396eb1
AK		 1216 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1217 printk("%s: %s Bad Rcv descriptor ring\n",
1218 netxen_nic_driver_name, netdev->name);
1219 return;
1220 }
1221
48bfd1e0
DP		 1222 rds_ring = &recv_ctx->rds_rings[desc_ctx];
1223 if (unlikely(index > rds_ring->max_rx_desc_count)) {
ed25ffa1 1224 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
48bfd1e0 1225 index, rds_ring->max_rx_desc_count);
ed25ffa1
AK		 1226 return;
1227 }
48bfd1e0 1228 buffer = &rds_ring->rx_buf_arr[index];
ed25ffa1
AK		 1229 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1230 buffer->lro_current_frags++;
1231 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1232 buffer->lro_expected_frags =
1233 netxen_get_sts_desc_lro_cnt(desc);
1234 buffer->lro_length = length;
1235 }
1236 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1237 if (buffer->lro_expected_frags != 0) {
5bc51424
JP		 1238 printk("LRO: (refhandle:%x) recv frag. "
1239 "wait for last. flags: %x expected:%d "
ed25ffa1
AK		 1240 "have:%d\n", index,
1241 netxen_get_sts_desc_lro_last_frag(desc),
1242 buffer->lro_expected_frags,
1243 buffer->lro_current_frags);
1244 }
1245 return;
1246 }
1247 }
3d396eb1 1248
d9e651bc 1249 cksum = netxen_get_sts_status(sts_data);
3d396eb1 1250
d9e651bc
DP		 1251 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1252 if (!skb)
1253 return;
200eef20 1254
ed25ffa1
AK		 1255 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1256 /* True length was only available on the last pkt */
1257 skb_put(skb, buffer->lro_length);
1258 } else {
d9e651bc
DP		 1259 if (length > rds_ring->skb_size)
1260 skb_put(skb, rds_ring->skb_size);
1261 else
1262 skb_put(skb, length);
1263
1264 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
1265 if (pkt_offset)
1266 skb_pull(skb, pkt_offset);
ed25ffa1
AK		 1267 }
1268
3d396eb1
AK		 1269 skb->protocol = eth_type_trans(skb, netdev);
1270
3d396eb1 1271 /*
d9e651bc
DP		 1272 * rx buffer chaining is disabled, walk and free
1273 * any spurious rx buffer chain.
3d396eb1 1274 */
d9e651bc
DP		 1275 if (frag_desc) {
1276 u16 i, nr_frags = desc->nr_frags;
1277
1278 dev_kfree_skb_any(skb);
1279 for (i = 0; i < nr_frags; i++) {
2edbb454 1280 index = le16_to_cpu(frag_desc->frag_handles[i]);
d9e651bc
DP		 1281 skb = netxen_process_rxbuf(adapter,
1282 rds_ring, index, cksum);
1283 if (skb)
1284 dev_kfree_skb_any(skb);
1285 }
1286 adapter->stats.rxdropped++;
1287 } else {
d9e651bc 1288 netif_receive_skb(skb);
d9e651bc
DP		 1289
1290 adapter->stats.no_rcv++;
1291 adapter->stats.rxbytes += length;
1292 }
3d396eb1
AK		 1293}
1294
1295/* Process Receive status ring */
1296u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1297{
1298 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1299 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
d9e651bc 1300 struct status_desc *desc, *frag_desc;
3d396eb1
AK		 1301 u32 consumer = recv_ctx->status_rx_consumer;
1302 int count = 0, ring;
d9e651bc
DP		 1303 u64 sts_data;
1304 u16 opcode;
3d396eb1 1305
3d396eb1
AK		 1306 while (count < max) {
1307 desc = &desc_head[consumer];
a608ab9c 1308 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
ed25ffa1
AK		 1309 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1310 netxen_get_sts_owner(desc));
3d396eb1
AK		 1311 break;
1312 }
d9e651bc
DP		 1313
1314 sts_data = le64_to_cpu(desc->status_desc_data);
1315 opcode = netxen_get_sts_opcode(sts_data);
1316 frag_desc = NULL;
1317 if (opcode == NETXEN_NIC_RXPKT_DESC) {
1318 if (desc->nr_frags) {
1319 consumer = get_next_index(consumer,
1320 adapter->max_rx_desc_count);
1321 frag_desc = &desc_head[consumer];
1322 netxen_set_sts_owner(frag_desc,
1323 STATUS_OWNER_PHANTOM);
1324 }
1325 }
1326
1327 netxen_process_rcv(adapter, ctxid, desc, frag_desc);
1328
a608ab9c 1329 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
d9e651bc
DP		 1330
1331 consumer = get_next_index(consumer,
1332 adapter->max_rx_desc_count);
3d396eb1
AK		 1333 count++;
1334 }
48bfd1e0 1335 for (ring = 0; ring < adapter->max_rds_rings; ring++)
05aaa02d 1336 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
3d396eb1
AK		 1337
1338 /* update the consumer index in phantom */
1339 if (count) {
3d396eb1
AK		 1340 recv_ctx->status_rx_consumer = consumer;
1341
1342 /* Window = 1 */
3ce06a32
DP		 1343 adapter->pci_write_normalize(adapter,
1344 recv_ctx->crb_sts_consumer, consumer);
3d396eb1
AK		 1345 }
1346
1347 return count;
1348}
1349
1350/* Process Command status ring */
05aaa02d 1351int netxen_process_cmd_ring(struct netxen_adapter *adapter)
3d396eb1 1352{
ba53e6b4
DP		 1353 u32 last_consumer, consumer;
1354 int count = 0, i;
3d396eb1 1355 struct netxen_cmd_buffer *buffer;
ba53e6b4
DP		 1356 struct pci_dev *pdev = adapter->pdev;
1357 struct net_device *netdev = adapter->netdev;
3d396eb1 1358 struct netxen_skb_frag *frag;
ba53e6b4 1359 int done = 0;
3d396eb1 1360
3d396eb1 1361 last_consumer = adapter->last_cmd_consumer;
9b410117 1362 consumer = le32_to_cpu(*(adapter->cmd_consumer));
3d396eb1 1363
ba53e6b4 1364 while (last_consumer != consumer) {
3d396eb1 1365 buffer = &adapter->cmd_buf_arr[last_consumer];
53a01e00 1366 if (buffer->skb) {
1367 frag = &buffer->frag_array[0];
3d396eb1
AK		 1368 pci_unmap_single(pdev, frag->dma, frag->length,
1369 PCI_DMA_TODEVICE);
96acb6eb 1370 frag->dma = 0ULL;
3d396eb1 1371 for (i = 1; i < buffer->frag_count; i++) {
3d396eb1
AK		 1372 frag++; /* Get the next frag */
1373 pci_unmap_page(pdev, frag->dma, frag->length,
1374 PCI_DMA_TODEVICE);
96acb6eb 1375 frag->dma = 0ULL;
3d396eb1
AK		 1376 }
1377
ba53e6b4 1378 adapter->stats.xmitfinished++;
53a01e00 1379 dev_kfree_skb_any(buffer->skb);
1380 buffer->skb = NULL;
3d396eb1
AK		 1381 }
1382
1383 last_consumer = get_next_index(last_consumer,
1384 adapter->max_tx_desc_count);
ba53e6b4
DP		 1385 if (++count >= MAX_STATUS_HANDLE)
1386 break;
3d396eb1 1387 }
3d396eb1 1388
ba53e6b4 1389 if (count) {
3d396eb1 1390 adapter->last_cmd_consumer = last_consumer;
ba53e6b4
DP		 1391 smp_mb();
1392 if (netif_queue_stopped(netdev) && netif_running(netdev)) {
1393 netif_tx_lock(netdev);
1394 netif_wake_queue(netdev);
1395 smp_mb();
1396 netif_tx_unlock(netdev);
3d396eb1
AK		 1397 }
1398 }
ed25ffa1
AK		 1399 /*
1400 * If everything is freed up to consumer then check if the ring is full
1401 * If the ring is full then check if more needs to be freed and
1402 * schedule the call back again.
1403 *
1404 * This happens when there are 2 CPUs. One could be freeing and the
1405 * other filling it. If the ring is full when we get out of here and
1406 * the card has already interrupted the host then the host can miss the
1407 * interrupt.
1408 *
1409 * There is still a possible race condition and the host could miss an
1410 * interrupt. The card has to take care of this.
1411 */
ba53e6b4
DP		 1412 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1413 done = (last_consumer == consumer);
3d396eb1 1414
ed25ffa1 1415 return (done);
3d396eb1
AK		 1416}
1417
1418/*
1419 * netxen_post_rx_buffers puts buffer in the Phantom memory
1420 */
1421void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1422{
7830b22c 1423 struct pci_dev *pdev = adapter->pdev;
3d396eb1
AK		 1424 struct sk_buff *skb;
1425 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
48bfd1e0 1426 struct nx_host_rds_ring *rds_ring = NULL;
ed25ffa1 1427 uint producer;
3d396eb1
AK		 1428 struct rcv_desc *pdesc;
1429 struct netxen_rx_buffer *buffer;
1430 int count = 0;
1431 int index = 0;
ed25ffa1
AK		 1432 netxen_ctx_msg msg = 0;
1433 dma_addr_t dma;
d9e651bc 1434 struct list_head *head;
3d396eb1 1435
48bfd1e0 1436 rds_ring = &recv_ctx->rds_rings[ringid];
3d396eb1 1437
48bfd1e0
DP		 1438 producer = rds_ring->producer;
1439 index = rds_ring->begin_alloc;
d9e651bc
DP		 1440 head = &rds_ring->free_list;
1441
3d396eb1 1442 /* We can start writing rx descriptors into the phantom memory. */
d9e651bc
DP		 1443 while (!list_empty(head)) {
1444
48bfd1e0 1445 skb = dev_alloc_skb(rds_ring->skb_size);
3d396eb1 1446 if (unlikely(!skb)) {
48bfd1e0 1447 rds_ring->begin_alloc = index;
3d396eb1
AK		 1448 break;
1449 }
ed25ffa1 1450
d9e651bc
DP		 1451 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1452 list_del(&buffer->list);
1453
ed25ffa1 1454 count++; /* now there should be no failure */
48bfd1e0 1455 pdesc = &rds_ring->desc_head[producer];
ed25ffa1 1456
d9e651bc
DP		 1457 if (!adapter->ahw.cut_through)
1458 skb_reserve(skb, 2);
ed25ffa1
AK		 1459 /* This will be setup when we receive the
1460 * buffer after it has been filled FSL TBD TBD
1461 * skb->dev = netdev;
1462 */
48bfd1e0 1463 dma = pci_map_single(pdev, skb->data, rds_ring->dma_size,
ed25ffa1 1464 PCI_DMA_FROMDEVICE);
ed33ebe4 1465 pdesc->addr_buffer = cpu_to_le64(dma);
ed25ffa1
AK		 1466 buffer->skb = skb;
1467 buffer->state = NETXEN_BUFFER_BUSY;
1468 buffer->dma = dma;
1469 /* make a rcv descriptor */
ed33ebe4 1470 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1471 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
ed25ffa1
AK		 1472 DPRINTK(INFO, "done writing descripter\n");
1473 producer =
48bfd1e0
DP		 1474 get_next_index(producer, rds_ring->max_rx_desc_count);
1475 index = get_next_index(index, rds_ring->max_rx_desc_count);
ed25ffa1
AK		 1476 }
1477 /* if we did allocate buffers, then write the count to Phantom */
1478 if (count) {
48bfd1e0
DP		 1479 rds_ring->begin_alloc = index;
1480 rds_ring->producer = producer;
ed25ffa1 1481 /* Window = 1 */
3ce06a32 1482 adapter->pci_write_normalize(adapter,
48bfd1e0
DP		 1483 rds_ring->crb_rcv_producer,
1484 (producer-1) & (rds_ring->max_rx_desc_count-1));
1485
1486 if (adapter->fw_major < 4) {
ed25ffa1
AK		 1487 /*
1488 * Write a doorbell msg to tell phanmon of change in
1489 * receive ring producer
48bfd1e0 1490 * Only for firmware version < 4.0.0
ed25ffa1
AK		 1491 */
1492 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1493 netxen_set_msg_privid(msg);
1494 netxen_set_msg_count(msg,
1495 ((producer -
48bfd1e0 1496 1) & (rds_ring->
ed25ffa1 1497 max_rx_desc_count - 1)));
3176ff3e 1498 netxen_set_msg_ctxid(msg, adapter->portnum);
ed25ffa1
AK		 1499 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1500 writel(msg,
1501 DB_NORMALIZE(adapter,
1502 NETXEN_RCV_PRODUCER_OFFSET));
48bfd1e0 1503 }
ed25ffa1
AK		 1504 }
1505}
1506
993fb90c
AB		 1507static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1508 uint32_t ctx, uint32_t ringid)
ed25ffa1 1509{
7830b22c 1510 struct pci_dev *pdev = adapter->pdev;
ed25ffa1
AK		 1511 struct sk_buff *skb;
1512 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
48bfd1e0 1513 struct nx_host_rds_ring *rds_ring = NULL;
ed25ffa1
AK		 1514 u32 producer;
1515 struct rcv_desc *pdesc;
1516 struct netxen_rx_buffer *buffer;
1517 int count = 0;
1518 int index = 0;
d9e651bc 1519 struct list_head *head;
ed25ffa1 1520
48bfd1e0 1521 rds_ring = &recv_ctx->rds_rings[ringid];
ed25ffa1 1522
48bfd1e0
DP		 1523 producer = rds_ring->producer;
1524 index = rds_ring->begin_alloc;
d9e651bc 1525 head = &rds_ring->free_list;
ed25ffa1 1526 /* We can start writing rx descriptors into the phantom memory. */
d9e651bc
DP		 1527 while (!list_empty(head)) {
1528
48bfd1e0 1529 skb = dev_alloc_skb(rds_ring->skb_size);
ed25ffa1 1530 if (unlikely(!skb)) {
48bfd1e0 1531 rds_ring->begin_alloc = index;
ed25ffa1
AK		 1532 break;
1533 }
d9e651bc
DP		 1534
1535 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1536 list_del(&buffer->list);
1537
3d396eb1 1538 count++; /* now there should be no failure */
48bfd1e0 1539 pdesc = &rds_ring->desc_head[producer];
d9e651bc
DP		 1540 if (!adapter->ahw.cut_through)
1541 skb_reserve(skb, 2);
3d396eb1
AK		 1542 buffer->skb = skb;
1543 buffer->state = NETXEN_BUFFER_BUSY;
1544 buffer->dma = pci_map_single(pdev, skb->data,
48bfd1e0 1545 rds_ring->dma_size,
3d396eb1 1546 PCI_DMA_FROMDEVICE);
ed25ffa1 1547
3d396eb1 1548 /* make a rcv descriptor */
ed33ebe4 1549 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1550 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
3d396eb1 1551 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
3d396eb1 1552 producer =
48bfd1e0
DP		 1553 get_next_index(producer, rds_ring->max_rx_desc_count);
1554 index = get_next_index(index, rds_ring->max_rx_desc_count);
1555 buffer = &rds_ring->rx_buf_arr[index];
3d396eb1
AK		 1556 }
1557
1558 /* if we did allocate buffers, then write the count to Phantom */
1559 if (count) {
48bfd1e0
DP		 1560 rds_ring->begin_alloc = index;
1561 rds_ring->producer = producer;
3d396eb1 1562 /* Window = 1 */
3ce06a32 1563 adapter->pci_write_normalize(adapter,
48bfd1e0
DP		 1564 rds_ring->crb_rcv_producer,
1565 (producer-1) & (rds_ring->max_rx_desc_count-1));
3d396eb1 1566 wmb();
3d396eb1
AK		 1567 }
1568}
1569
3d396eb1
AK		 1570void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1571{
3d396eb1 1572 memset(&adapter->stats, 0, sizeof(adapter->stats));
3176ff3e 1573 return;
3d396eb1
AK		 1574}
1575
Linux kernel - Deliverables
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