Commit | Line | Data |
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1da177e4 LT |
1 | /*====================================================================== |
2 | ||
3 | A PCMCIA ethernet driver for SMC91c92-based cards. | |
4 | ||
5 | This driver supports Megahertz PCMCIA ethernet cards; and | |
6 | Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem | |
7 | multifunction cards. | |
8 | ||
9 | Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net | |
10 | ||
11 | smc91c92_cs.c 1.122 2002/10/25 06:26:39 | |
12 | ||
13 | This driver contains code written by Donald Becker | |
14 | (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au), | |
15 | David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman | |
16 | (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of | |
17 | Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've | |
18 | incorporated some parts of his driver here. I (Dave) wrote most | |
19 | of the PCMCIA glue code, and the Ositech support code. Kelly | |
20 | Stephens (kstephen@holli.com) added support for the Motorola | |
21 | Mariner, with help from Allen Brost. | |
22 | ||
23 | This software may be used and distributed according to the terms of | |
24 | the GNU General Public License, incorporated herein by reference. | |
25 | ||
26 | ======================================================================*/ | |
27 | ||
636b8116 JP |
28 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
29 | ||
1da177e4 LT |
30 | #include <linux/module.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/timer.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/delay.h> | |
38 | #include <linux/crc32.h> | |
39 | #include <linux/netdevice.h> | |
40 | #include <linux/etherdevice.h> | |
41 | #include <linux/skbuff.h> | |
42 | #include <linux/if_arp.h> | |
43 | #include <linux/ioport.h> | |
44 | #include <linux/ethtool.h> | |
45 | #include <linux/mii.h> | |
4851d3aa | 46 | #include <linux/jiffies.h> |
75bf758f | 47 | #include <linux/firmware.h> |
1da177e4 | 48 | |
1da177e4 LT |
49 | #include <pcmcia/cistpl.h> |
50 | #include <pcmcia/cisreg.h> | |
51 | #include <pcmcia/ciscode.h> | |
52 | #include <pcmcia/ds.h> | |
50db3fdb | 53 | #include <pcmcia/ss.h> |
1da177e4 LT |
54 | |
55 | #include <asm/io.h> | |
56 | #include <asm/system.h> | |
57 | #include <asm/uaccess.h> | |
58 | ||
1da177e4 LT |
59 | /*====================================================================*/ |
60 | ||
f71e1309 | 61 | static const char *if_names[] = { "auto", "10baseT", "10base2"}; |
1da177e4 | 62 | |
75bf758f JSR |
63 | /* Firmware name */ |
64 | #define FIRMWARE_NAME "ositech/Xilinx7OD.bin" | |
65 | ||
1da177e4 LT |
66 | /* Module parameters */ |
67 | ||
68 | MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver"); | |
69 | MODULE_LICENSE("GPL"); | |
75bf758f | 70 | MODULE_FIRMWARE(FIRMWARE_NAME); |
1da177e4 LT |
71 | |
72 | #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0) | |
73 | ||
74 | /* | |
75 | Transceiver/media type. | |
76 | 0 = auto | |
77 | 1 = 10baseT (and autoselect if #define AUTOSELECT), | |
78 | 2 = AUI/10base2, | |
79 | */ | |
80 | INT_MODULE_PARM(if_port, 0); | |
81 | ||
1da177e4 LT |
82 | |
83 | #define DRV_NAME "smc91c92_cs" | |
d5b20697 | 84 | #define DRV_VERSION "1.123" |
1da177e4 LT |
85 | |
86 | /*====================================================================*/ | |
87 | ||
88 | /* Operational parameter that usually are not changed. */ | |
89 | ||
90 | /* Time in jiffies before concluding Tx hung */ | |
91 | #define TX_TIMEOUT ((400*HZ)/1000) | |
92 | ||
93 | /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ | |
94 | #define INTR_WORK 4 | |
95 | ||
96 | /* Times to check the check the chip before concluding that it doesn't | |
97 | currently have room for another Tx packet. */ | |
98 | #define MEMORY_WAIT_TIME 8 | |
99 | ||
1da177e4 | 100 | struct smc_private { |
fd238232 | 101 | struct pcmcia_device *p_dev; |
1da177e4 LT |
102 | spinlock_t lock; |
103 | u_short manfid; | |
104 | u_short cardid; | |
6fb7298c | 105 | |
1da177e4 LT |
106 | struct sk_buff *saved_skb; |
107 | int packets_waiting; | |
108 | void __iomem *base; | |
109 | u_short cfg; | |
110 | struct timer_list media; | |
111 | int watchdog, tx_err; | |
112 | u_short media_status; | |
113 | u_short fast_poll; | |
114 | u_short link_status; | |
115 | struct mii_if_info mii_if; | |
116 | int duplex; | |
117 | int rx_ovrn; | |
118 | }; | |
119 | ||
120 | /* Special definitions for Megahertz multifunction cards */ | |
121 | #define MEGAHERTZ_ISR 0x0380 | |
122 | ||
123 | /* Special function registers for Motorola Mariner */ | |
124 | #define MOT_LAN 0x0000 | |
125 | #define MOT_UART 0x0020 | |
126 | #define MOT_EEPROM 0x20 | |
127 | ||
128 | #define MOT_NORMAL \ | |
129 | (COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA) | |
130 | ||
131 | /* Special function registers for Ositech cards */ | |
132 | #define OSITECH_AUI_CTL 0x0c | |
133 | #define OSITECH_PWRDOWN 0x0d | |
134 | #define OSITECH_RESET 0x0e | |
135 | #define OSITECH_ISR 0x0f | |
136 | #define OSITECH_AUI_PWR 0x0c | |
137 | #define OSITECH_RESET_ISR 0x0e | |
138 | ||
139 | #define OSI_AUI_PWR 0x40 | |
140 | #define OSI_LAN_PWRDOWN 0x02 | |
141 | #define OSI_MODEM_PWRDOWN 0x01 | |
142 | #define OSI_LAN_RESET 0x02 | |
143 | #define OSI_MODEM_RESET 0x01 | |
144 | ||
145 | /* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */ | |
146 | #define BANK_SELECT 14 /* Window select register. */ | |
147 | #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); } | |
148 | ||
149 | /* Bank 0 registers. */ | |
150 | #define TCR 0 /* transmit control register */ | |
151 | #define TCR_CLEAR 0 /* do NOTHING */ | |
152 | #define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */ | |
153 | #define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */ | |
154 | #define TCR_MONCSN 0x0400 /* Monitor Carrier. */ | |
155 | #define TCR_FDUPLX 0x0800 /* Full duplex mode. */ | |
156 | #define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN | |
157 | ||
158 | #define EPH 2 /* Ethernet Protocol Handler report. */ | |
159 | #define EPH_TX_SUC 0x0001 | |
160 | #define EPH_SNGLCOL 0x0002 | |
161 | #define EPH_MULCOL 0x0004 | |
162 | #define EPH_LTX_MULT 0x0008 | |
163 | #define EPH_16COL 0x0010 | |
164 | #define EPH_SQET 0x0020 | |
165 | #define EPH_LTX_BRD 0x0040 | |
166 | #define EPH_TX_DEFR 0x0080 | |
167 | #define EPH_LAT_COL 0x0200 | |
168 | #define EPH_LOST_CAR 0x0400 | |
169 | #define EPH_EXC_DEF 0x0800 | |
170 | #define EPH_CTR_ROL 0x1000 | |
171 | #define EPH_RX_OVRN 0x2000 | |
172 | #define EPH_LINK_OK 0x4000 | |
173 | #define EPH_TX_UNRN 0x8000 | |
174 | #define MEMINFO 8 /* Memory Information Register */ | |
175 | #define MEMCFG 10 /* Memory Configuration Register */ | |
176 | ||
177 | /* Bank 1 registers. */ | |
178 | #define CONFIG 0 | |
179 | #define CFG_MII_SELECT 0x8000 /* 91C100 only */ | |
180 | #define CFG_NO_WAIT 0x1000 | |
181 | #define CFG_FULL_STEP 0x0400 | |
182 | #define CFG_SET_SQLCH 0x0200 | |
183 | #define CFG_AUI_SELECT 0x0100 | |
184 | #define CFG_16BIT 0x0080 | |
185 | #define CFG_DIS_LINK 0x0040 | |
186 | #define CFG_STATIC 0x0030 | |
187 | #define CFG_IRQ_SEL_1 0x0004 | |
188 | #define CFG_IRQ_SEL_0 0x0002 | |
189 | #define BASE_ADDR 2 | |
190 | #define ADDR0 4 | |
191 | #define GENERAL 10 | |
192 | #define CONTROL 12 | |
193 | #define CTL_STORE 0x0001 | |
194 | #define CTL_RELOAD 0x0002 | |
195 | #define CTL_EE_SELECT 0x0004 | |
196 | #define CTL_TE_ENABLE 0x0020 | |
197 | #define CTL_CR_ENABLE 0x0040 | |
198 | #define CTL_LE_ENABLE 0x0080 | |
199 | #define CTL_AUTO_RELEASE 0x0800 | |
200 | #define CTL_POWERDOWN 0x2000 | |
201 | ||
202 | /* Bank 2 registers. */ | |
203 | #define MMU_CMD 0 | |
204 | #define MC_ALLOC 0x20 /* or with number of 256 byte packets */ | |
205 | #define MC_RESET 0x40 | |
206 | #define MC_RELEASE 0x80 /* remove and release the current rx packet */ | |
207 | #define MC_FREEPKT 0xA0 /* Release packet in PNR register */ | |
208 | #define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */ | |
209 | #define PNR_ARR 2 | |
210 | #define FIFO_PORTS 4 | |
211 | #define FP_RXEMPTY 0x8000 | |
212 | #define POINTER 6 | |
213 | #define PTR_AUTO_INC 0x0040 | |
214 | #define PTR_READ 0x2000 | |
215 | #define PTR_AUTOINC 0x4000 | |
216 | #define PTR_RCV 0x8000 | |
217 | #define DATA_1 8 | |
218 | #define INTERRUPT 12 | |
219 | #define IM_RCV_INT 0x1 | |
220 | #define IM_TX_INT 0x2 | |
221 | #define IM_TX_EMPTY_INT 0x4 | |
222 | #define IM_ALLOC_INT 0x8 | |
223 | #define IM_RX_OVRN_INT 0x10 | |
224 | #define IM_EPH_INT 0x20 | |
225 | ||
226 | #define RCR 4 | |
227 | enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002, | |
228 | RxEnable = 0x0100, RxStripCRC = 0x0200}; | |
229 | #define RCR_SOFTRESET 0x8000 /* resets the chip */ | |
230 | #define RCR_STRIP_CRC 0x200 /* strips CRC */ | |
231 | #define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */ | |
232 | #define RCR_ALMUL 0x4 /* receive all multicast packets */ | |
233 | #define RCR_PROMISC 0x2 /* enable promiscuous mode */ | |
234 | ||
235 | /* the normal settings for the RCR register : */ | |
236 | #define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE) | |
237 | #define RCR_CLEAR 0x0 /* set it to a base state */ | |
238 | #define COUNTER 6 | |
239 | ||
240 | /* BANK 3 -- not the same values as in smc9194! */ | |
241 | #define MULTICAST0 0 | |
242 | #define MULTICAST2 2 | |
243 | #define MULTICAST4 4 | |
244 | #define MULTICAST6 6 | |
245 | #define MGMT 8 | |
246 | #define REVISION 0x0a | |
247 | ||
248 | /* Transmit status bits. */ | |
249 | #define TS_SUCCESS 0x0001 | |
250 | #define TS_16COL 0x0010 | |
251 | #define TS_LATCOL 0x0200 | |
252 | #define TS_LOSTCAR 0x0400 | |
253 | ||
254 | /* Receive status bits. */ | |
255 | #define RS_ALGNERR 0x8000 | |
256 | #define RS_BADCRC 0x2000 | |
257 | #define RS_ODDFRAME 0x1000 | |
258 | #define RS_TOOLONG 0x0800 | |
259 | #define RS_TOOSHORT 0x0400 | |
260 | #define RS_MULTICAST 0x0001 | |
261 | #define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT) | |
262 | ||
263 | #define set_bits(v, p) outw(inw(p)|(v), (p)) | |
264 | #define mask_bits(v, p) outw(inw(p)&(v), (p)) | |
265 | ||
266 | /*====================================================================*/ | |
267 | ||
cc3b4866 | 268 | static void smc91c92_detach(struct pcmcia_device *p_dev); |
15b99ac1 | 269 | static int smc91c92_config(struct pcmcia_device *link); |
fba395ee | 270 | static void smc91c92_release(struct pcmcia_device *link); |
1da177e4 LT |
271 | |
272 | static int smc_open(struct net_device *dev); | |
273 | static int smc_close(struct net_device *dev); | |
274 | static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
275 | static void smc_tx_timeout(struct net_device *dev); | |
dbf02fae SH |
276 | static netdev_tx_t smc_start_xmit(struct sk_buff *skb, |
277 | struct net_device *dev); | |
7d12e780 | 278 | static irqreturn_t smc_interrupt(int irq, void *dev_id); |
1da177e4 | 279 | static void smc_rx(struct net_device *dev); |
1da177e4 LT |
280 | static void set_rx_mode(struct net_device *dev); |
281 | static int s9k_config(struct net_device *dev, struct ifmap *map); | |
282 | static void smc_set_xcvr(struct net_device *dev, int if_port); | |
283 | static void smc_reset(struct net_device *dev); | |
284 | static void media_check(u_long arg); | |
906da809 | 285 | static void mdio_sync(unsigned int addr); |
1da177e4 LT |
286 | static int mdio_read(struct net_device *dev, int phy_id, int loc); |
287 | static void mdio_write(struct net_device *dev, int phy_id, int loc, int value); | |
288 | static int smc_link_ok(struct net_device *dev); | |
7282d491 | 289 | static const struct ethtool_ops ethtool_ops; |
1da177e4 | 290 | |
9b31b697 SH |
291 | static const struct net_device_ops smc_netdev_ops = { |
292 | .ndo_open = smc_open, | |
293 | .ndo_stop = smc_close, | |
294 | .ndo_start_xmit = smc_start_xmit, | |
295 | .ndo_tx_timeout = smc_tx_timeout, | |
296 | .ndo_set_config = s9k_config, | |
297 | .ndo_set_multicast_list = set_rx_mode, | |
c061b18d | 298 | .ndo_do_ioctl = smc_ioctl, |
9b31b697 SH |
299 | .ndo_change_mtu = eth_change_mtu, |
300 | .ndo_set_mac_address = eth_mac_addr, | |
301 | .ndo_validate_addr = eth_validate_addr, | |
302 | }; | |
303 | ||
15b99ac1 | 304 | static int smc91c92_probe(struct pcmcia_device *link) |
1da177e4 | 305 | { |
1da177e4 | 306 | struct smc_private *smc; |
1da177e4 | 307 | struct net_device *dev; |
1da177e4 | 308 | |
dd0fab5b | 309 | dev_dbg(&link->dev, "smc91c92_attach()\n"); |
1da177e4 LT |
310 | |
311 | /* Create new ethernet device */ | |
312 | dev = alloc_etherdev(sizeof(struct smc_private)); | |
313 | if (!dev) | |
f8cfa618 | 314 | return -ENOMEM; |
1da177e4 | 315 | smc = netdev_priv(dev); |
fba395ee | 316 | smc->p_dev = link; |
44b496f6 | 317 | link->priv = dev; |
1da177e4 LT |
318 | |
319 | spin_lock_init(&smc->lock); | |
1da177e4 LT |
320 | |
321 | /* The SMC91c92-specific entries in the device structure. */ | |
9b31b697 | 322 | dev->netdev_ops = &smc_netdev_ops; |
1da177e4 | 323 | SET_ETHTOOL_OPS(dev, ðtool_ops); |
1da177e4 | 324 | dev->watchdog_timeo = TX_TIMEOUT; |
1da177e4 LT |
325 | |
326 | smc->mii_if.dev = dev; | |
327 | smc->mii_if.mdio_read = mdio_read; | |
328 | smc->mii_if.mdio_write = mdio_write; | |
329 | smc->mii_if.phy_id_mask = 0x1f; | |
330 | smc->mii_if.reg_num_mask = 0x1f; | |
331 | ||
15b99ac1 | 332 | return smc91c92_config(link); |
1da177e4 LT |
333 | } /* smc91c92_attach */ |
334 | ||
fba395ee | 335 | static void smc91c92_detach(struct pcmcia_device *link) |
1da177e4 LT |
336 | { |
337 | struct net_device *dev = link->priv; | |
1da177e4 | 338 | |
dd0fab5b | 339 | dev_dbg(&link->dev, "smc91c92_detach\n"); |
1da177e4 | 340 | |
c7c2fa07 | 341 | unregister_netdev(dev); |
1da177e4 | 342 | |
e2d40963 | 343 | smc91c92_release(link); |
1da177e4 | 344 | |
1da177e4 LT |
345 | free_netdev(dev); |
346 | } /* smc91c92_detach */ | |
347 | ||
348 | /*====================================================================*/ | |
349 | ||
350 | static int cvt_ascii_address(struct net_device *dev, char *s) | |
351 | { | |
352 | int i, j, da, c; | |
353 | ||
354 | if (strlen(s) != 12) | |
355 | return -1; | |
356 | for (i = 0; i < 6; i++) { | |
357 | da = 0; | |
358 | for (j = 0; j < 2; j++) { | |
359 | c = *s++; | |
360 | da <<= 4; | |
361 | da += ((c >= '0') && (c <= '9')) ? | |
362 | (c - '0') : ((c & 0x0f) + 9); | |
363 | } | |
364 | dev->dev_addr[i] = da; | |
365 | } | |
366 | return 0; | |
367 | } | |
368 | ||
dddfbd82 | 369 | /*==================================================================== |
1da177e4 LT |
370 | |
371 | Configuration stuff for Megahertz cards | |
372 | ||
373 | mhz_3288_power() is used to power up a 3288's ethernet chip. | |
374 | mhz_mfc_config() handles socket setup for multifunction (1144 | |
375 | and 3288) cards. mhz_setup() gets a card's hardware ethernet | |
376 | address. | |
377 | ||
378 | ======================================================================*/ | |
379 | ||
fba395ee | 380 | static int mhz_3288_power(struct pcmcia_device *link) |
1da177e4 LT |
381 | { |
382 | struct net_device *dev = link->priv; | |
383 | struct smc_private *smc = netdev_priv(dev); | |
384 | u_char tmp; | |
385 | ||
386 | /* Read the ISR twice... */ | |
387 | readb(smc->base+MEGAHERTZ_ISR); | |
388 | udelay(5); | |
389 | readb(smc->base+MEGAHERTZ_ISR); | |
390 | ||
391 | /* Pause 200ms... */ | |
392 | mdelay(200); | |
393 | ||
394 | /* Now read and write the COR... */ | |
7feabb64 | 395 | tmp = readb(smc->base + link->config_base + CISREG_COR); |
1da177e4 | 396 | udelay(5); |
7feabb64 | 397 | writeb(tmp, smc->base + link->config_base + CISREG_COR); |
1da177e4 LT |
398 | |
399 | return 0; | |
400 | } | |
401 | ||
00990e7c | 402 | static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data) |
b54bf94b DB |
403 | { |
404 | int k; | |
00990e7c DB |
405 | p_dev->io_lines = 16; |
406 | p_dev->resource[1]->start = p_dev->resource[0]->start; | |
407 | p_dev->resource[1]->end = 8; | |
408 | p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH; | |
409 | p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8; | |
410 | p_dev->resource[0]->end = 16; | |
411 | p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; | |
412 | p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO; | |
b54bf94b DB |
413 | for (k = 0; k < 0x400; k += 0x10) { |
414 | if (k & 0x80) | |
415 | continue; | |
90abdc3b | 416 | p_dev->resource[0]->start = k ^ 0x300; |
90abdc3b | 417 | if (!pcmcia_request_io(p_dev)) |
b54bf94b DB |
418 | return 0; |
419 | } | |
420 | return -ENODEV; | |
421 | } | |
422 | ||
fba395ee | 423 | static int mhz_mfc_config(struct pcmcia_device *link) |
1da177e4 LT |
424 | { |
425 | struct net_device *dev = link->priv; | |
426 | struct smc_private *smc = netdev_priv(dev); | |
b5cb259e | 427 | unsigned int offset; |
b54bf94b | 428 | int i; |
1da177e4 | 429 | |
00990e7c DB |
430 | link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ | |
431 | CONF_AUTO_SET_IO; | |
1da177e4 | 432 | |
1da177e4 LT |
433 | /* The Megahertz combo cards have modem-like CIS entries, so |
434 | we have to explicitly try a bunch of port combinations. */ | |
b54bf94b | 435 | if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL)) |
dddfbd82 DB |
436 | return -ENODEV; |
437 | ||
9a017a91 | 438 | dev->base_addr = link->resource[0]->start; |
1da177e4 LT |
439 | |
440 | /* Allocate a memory window, for accessing the ISR */ | |
cdb13808 DB |
441 | link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE; |
442 | link->resource[2]->start = link->resource[2]->end = 0; | |
443 | i = pcmcia_request_window(link, link->resource[2], 0); | |
4c89e88b | 444 | if (i != 0) |
dddfbd82 DB |
445 | return -ENODEV; |
446 | ||
cdb13808 DB |
447 | smc->base = ioremap(link->resource[2]->start, |
448 | resource_size(link->resource[2])); | |
7feabb64 | 449 | offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0; |
cdb13808 | 450 | i = pcmcia_map_mem_page(link, link->resource[2], offset); |
8e95a202 JP |
451 | if ((i == 0) && |
452 | (smc->manfid == MANFID_MEGAHERTZ) && | |
453 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)) | |
454 | mhz_3288_power(link); | |
1da177e4 | 455 | |
dddfbd82 | 456 | return 0; |
1da177e4 LT |
457 | } |
458 | ||
dddfbd82 DB |
459 | static int pcmcia_get_versmac(struct pcmcia_device *p_dev, |
460 | tuple_t *tuple, | |
461 | void *priv) | |
1da177e4 | 462 | { |
dddfbd82 DB |
463 | struct net_device *dev = priv; |
464 | cisparse_t parse; | |
fb9e2d88 | 465 | u8 *buf; |
4638aef4 | 466 | |
dddfbd82 DB |
467 | if (pcmcia_parse_tuple(tuple, &parse)) |
468 | return -EINVAL; | |
1da177e4 | 469 | |
fb9e2d88 KK |
470 | buf = parse.version_1.str + parse.version_1.ofs[3]; |
471 | ||
472 | if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0)) | |
dddfbd82 | 473 | return 0; |
4638aef4 | 474 | |
dddfbd82 DB |
475 | return -EINVAL; |
476 | }; | |
477 | ||
fba395ee | 478 | static int mhz_setup(struct pcmcia_device *link) |
1da177e4 | 479 | { |
1da177e4 | 480 | struct net_device *dev = link->priv; |
dddfbd82 DB |
481 | size_t len; |
482 | u8 *buf; | |
4638aef4 | 483 | int rc; |
1da177e4 LT |
484 | |
485 | /* Read the station address from the CIS. It is stored as the last | |
486 | (fourth) string in the Version 1 Version/ID tuple. */ | |
7d2e8d00 DB |
487 | if ((link->prod_id[3]) && |
488 | (cvt_ascii_address(dev, link->prod_id[3]) == 0)) | |
489 | return 0; | |
490 | ||
491 | /* Workarounds for broken cards start here. */ | |
a1a98b72 | 492 | /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */ |
dddfbd82 DB |
493 | if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev)) |
494 | return 0; | |
1da177e4 LT |
495 | |
496 | /* Another possibility: for the EM3288, in a special tuple */ | |
4638aef4 | 497 | rc = -1; |
dddfbd82 DB |
498 | len = pcmcia_get_tuple(link, 0x81, &buf); |
499 | if (buf && len >= 13) { | |
500 | buf[12] = '\0'; | |
fb9e2d88 | 501 | if (cvt_ascii_address(dev, buf) == 0) |
dddfbd82 DB |
502 | rc = 0; |
503 | } | |
504 | kfree(buf); | |
505 | ||
506 | return rc; | |
507 | }; | |
1da177e4 LT |
508 | |
509 | /*====================================================================== | |
510 | ||
511 | Configuration stuff for the Motorola Mariner | |
512 | ||
513 | mot_config() writes directly to the Mariner configuration | |
514 | registers because the CIS is just bogus. | |
515 | ||
516 | ======================================================================*/ | |
517 | ||
fba395ee | 518 | static void mot_config(struct pcmcia_device *link) |
1da177e4 LT |
519 | { |
520 | struct net_device *dev = link->priv; | |
521 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 522 | unsigned int ioaddr = dev->base_addr; |
9a017a91 | 523 | unsigned int iouart = link->resource[1]->start; |
1da177e4 LT |
524 | |
525 | /* Set UART base address and force map with COR bit 1 */ | |
526 | writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0); | |
527 | writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1); | |
528 | writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR); | |
529 | ||
530 | /* Set SMC base address and force map with COR bit 1 */ | |
531 | writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0); | |
532 | writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1); | |
533 | writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR); | |
534 | ||
535 | /* Wait for things to settle down */ | |
536 | mdelay(100); | |
537 | } | |
538 | ||
fba395ee | 539 | static int mot_setup(struct pcmcia_device *link) |
1da177e4 LT |
540 | { |
541 | struct net_device *dev = link->priv; | |
906da809 | 542 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
543 | int i, wait, loop; |
544 | u_int addr; | |
545 | ||
546 | /* Read Ethernet address from Serial EEPROM */ | |
547 | ||
548 | for (i = 0; i < 3; i++) { | |
549 | SMC_SELECT_BANK(2); | |
550 | outw(MOT_EEPROM + i, ioaddr + POINTER); | |
551 | SMC_SELECT_BANK(1); | |
552 | outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL); | |
553 | ||
554 | for (loop = wait = 0; loop < 200; loop++) { | |
555 | udelay(10); | |
556 | wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL)); | |
557 | if (wait == 0) break; | |
558 | } | |
559 | ||
560 | if (wait) | |
561 | return -1; | |
562 | ||
563 | addr = inw(ioaddr + GENERAL); | |
564 | dev->dev_addr[2*i] = addr & 0xff; | |
565 | dev->dev_addr[2*i+1] = (addr >> 8) & 0xff; | |
566 | } | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
571 | /*====================================================================*/ | |
572 | ||
00990e7c | 573 | static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data) |
b54bf94b | 574 | { |
00990e7c DB |
575 | p_dev->resource[0]->end = 16; |
576 | p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH; | |
577 | p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO; | |
578 | ||
90abdc3b | 579 | return pcmcia_request_io(p_dev); |
b54bf94b DB |
580 | } |
581 | ||
fba395ee | 582 | static int smc_config(struct pcmcia_device *link) |
1da177e4 LT |
583 | { |
584 | struct net_device *dev = link->priv; | |
1da177e4 LT |
585 | int i; |
586 | ||
00990e7c DB |
587 | link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO; |
588 | ||
b54bf94b DB |
589 | i = pcmcia_loop_config(link, smc_configcheck, NULL); |
590 | if (!i) | |
9a017a91 | 591 | dev->base_addr = link->resource[0]->start; |
4638aef4 | 592 | |
1da177e4 LT |
593 | return i; |
594 | } | |
595 | ||
dddfbd82 | 596 | |
fba395ee | 597 | static int smc_setup(struct pcmcia_device *link) |
1da177e4 | 598 | { |
1da177e4 | 599 | struct net_device *dev = link->priv; |
1da177e4 LT |
600 | |
601 | /* Check for a LAN function extension tuple */ | |
dddfbd82 DB |
602 | if (!pcmcia_get_mac_from_cis(link, dev)) |
603 | return 0; | |
604 | ||
1da177e4 | 605 | /* Try the third string in the Version 1 Version/ID tuple. */ |
a9606fd3 | 606 | if (link->prod_id[2]) { |
dddfbd82 DB |
607 | if (cvt_ascii_address(dev, link->prod_id[2]) == 0) |
608 | return 0; | |
4638aef4 | 609 | } |
dddfbd82 | 610 | return -1; |
1da177e4 LT |
611 | } |
612 | ||
613 | /*====================================================================*/ | |
614 | ||
fba395ee | 615 | static int osi_config(struct pcmcia_device *link) |
1da177e4 LT |
616 | { |
617 | struct net_device *dev = link->priv; | |
906da809 | 618 | static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
1da177e4 LT |
619 | int i, j; |
620 | ||
00990e7c | 621 | link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ; |
90abdc3b DB |
622 | link->resource[0]->end = 64; |
623 | link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8; | |
624 | link->resource[1]->end = 8; | |
1da177e4 LT |
625 | |
626 | /* Enable Hard Decode, LAN, Modem */ | |
90abdc3b | 627 | link->io_lines = 16; |
7feabb64 | 628 | link->config_index = 0x23; |
1da177e4 LT |
629 | |
630 | for (i = j = 0; j < 4; j++) { | |
90abdc3b DB |
631 | link->resource[1]->start = com[j]; |
632 | i = pcmcia_request_io(link); | |
4c89e88b DB |
633 | if (i == 0) |
634 | break; | |
1da177e4 | 635 | } |
4c89e88b | 636 | if (i != 0) { |
1da177e4 | 637 | /* Fallback: turn off hard decode */ |
7feabb64 | 638 | link->config_index = 0x03; |
90abdc3b DB |
639 | link->resource[1]->end = 0; |
640 | i = pcmcia_request_io(link); | |
1da177e4 | 641 | } |
9a017a91 | 642 | dev->base_addr = link->resource[0]->start + 0x10; |
1da177e4 LT |
643 | return i; |
644 | } | |
645 | ||
75bf758f JSR |
646 | static int osi_load_firmware(struct pcmcia_device *link) |
647 | { | |
648 | const struct firmware *fw; | |
649 | int i, err; | |
650 | ||
651 | err = request_firmware(&fw, FIRMWARE_NAME, &link->dev); | |
652 | if (err) { | |
653 | pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME); | |
654 | return err; | |
655 | } | |
656 | ||
657 | /* Download the Seven of Diamonds firmware */ | |
658 | for (i = 0; i < fw->size; i++) { | |
9a017a91 | 659 | outb(fw->data[i], link->resource[0]->start + 2); |
75bf758f JSR |
660 | udelay(50); |
661 | } | |
662 | release_firmware(fw); | |
663 | return err; | |
664 | } | |
665 | ||
dddfbd82 DB |
666 | static int pcmcia_osi_mac(struct pcmcia_device *p_dev, |
667 | tuple_t *tuple, | |
668 | void *priv) | |
1da177e4 | 669 | { |
dddfbd82 DB |
670 | struct net_device *dev = priv; |
671 | int i; | |
1da177e4 | 672 | |
dddfbd82 DB |
673 | if (tuple->TupleDataLen < 8) |
674 | return -EINVAL; | |
675 | if (tuple->TupleData[0] != 0x04) | |
676 | return -EINVAL; | |
677 | for (i = 0; i < 6; i++) | |
678 | dev->dev_addr[i] = tuple->TupleData[i+2]; | |
679 | return 0; | |
680 | }; | |
4638aef4 | 681 | |
4638aef4 | 682 | |
dddfbd82 DB |
683 | static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid) |
684 | { | |
685 | struct net_device *dev = link->priv; | |
686 | int rc; | |
1da177e4 LT |
687 | |
688 | /* Read the station address from tuple 0x90, subtuple 0x04 */ | |
dddfbd82 DB |
689 | if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev)) |
690 | return -1; | |
1da177e4 LT |
691 | |
692 | if (((manfid == MANFID_OSITECH) && | |
693 | (cardid == PRODID_OSITECH_SEVEN)) || | |
694 | ((manfid == MANFID_PSION) && | |
695 | (cardid == PRODID_PSION_NET100))) { | |
75bf758f JSR |
696 | rc = osi_load_firmware(link); |
697 | if (rc) | |
dddfbd82 | 698 | return rc; |
1da177e4 LT |
699 | } else if (manfid == MANFID_OSITECH) { |
700 | /* Make sure both functions are powered up */ | |
9a017a91 | 701 | set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR); |
1da177e4 | 702 | /* Now, turn on the interrupt for both card functions */ |
9a017a91 | 703 | set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR); |
dd0fab5b | 704 | dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n", |
9a017a91 DB |
705 | inw(link->resource[0]->start + OSITECH_AUI_PWR), |
706 | inw(link->resource[0]->start + OSITECH_RESET_ISR)); | |
1da177e4 | 707 | } |
dddfbd82 | 708 | return 0; |
1da177e4 LT |
709 | } |
710 | ||
fba395ee | 711 | static int smc91c92_suspend(struct pcmcia_device *link) |
98e4c28b | 712 | { |
98e4c28b DB |
713 | struct net_device *dev = link->priv; |
714 | ||
e2d40963 | 715 | if (link->open) |
4bbed523 | 716 | netif_device_detach(dev); |
98e4c28b DB |
717 | |
718 | return 0; | |
719 | } | |
720 | ||
fba395ee | 721 | static int smc91c92_resume(struct pcmcia_device *link) |
98e4c28b | 722 | { |
98e4c28b DB |
723 | struct net_device *dev = link->priv; |
724 | struct smc_private *smc = netdev_priv(dev); | |
725 | int i; | |
726 | ||
e2d40963 DB |
727 | if ((smc->manfid == MANFID_MEGAHERTZ) && |
728 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)) | |
729 | mhz_3288_power(link); | |
730 | if (smc->manfid == MANFID_MOTOROLA) | |
731 | mot_config(link); | |
732 | if ((smc->manfid == MANFID_OSITECH) && | |
733 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
734 | /* Power up the card and enable interrupts */ | |
735 | set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR); | |
736 | set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR); | |
737 | } | |
738 | if (((smc->manfid == MANFID_OSITECH) && | |
739 | (smc->cardid == PRODID_OSITECH_SEVEN)) || | |
740 | ((smc->manfid == MANFID_PSION) && | |
741 | (smc->cardid == PRODID_PSION_NET100))) { | |
75bf758f JSR |
742 | i = osi_load_firmware(link); |
743 | if (i) { | |
744 | pr_err("smc91c92_cs: Failed to load firmware\n"); | |
745 | return i; | |
98e4c28b DB |
746 | } |
747 | } | |
e2d40963 DB |
748 | if (link->open) { |
749 | smc_reset(dev); | |
750 | netif_device_attach(dev); | |
751 | } | |
98e4c28b DB |
752 | |
753 | return 0; | |
754 | } | |
755 | ||
756 | ||
1da177e4 LT |
757 | /*====================================================================== |
758 | ||
759 | This verifies that the chip is some SMC91cXX variant, and returns | |
760 | the revision code if successful. Otherwise, it returns -ENODEV. | |
761 | ||
762 | ======================================================================*/ | |
763 | ||
fba395ee | 764 | static int check_sig(struct pcmcia_device *link) |
1da177e4 LT |
765 | { |
766 | struct net_device *dev = link->priv; | |
906da809 | 767 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
768 | int width; |
769 | u_short s; | |
770 | ||
771 | SMC_SELECT_BANK(1); | |
772 | if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) { | |
773 | /* Try powering up the chip */ | |
774 | outw(0, ioaddr + CONTROL); | |
775 | mdelay(55); | |
776 | } | |
777 | ||
778 | /* Try setting bus width */ | |
90abdc3b | 779 | width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO); |
1da177e4 LT |
780 | s = inb(ioaddr + CONFIG); |
781 | if (width) | |
782 | s |= CFG_16BIT; | |
783 | else | |
784 | s &= ~CFG_16BIT; | |
785 | outb(s, ioaddr + CONFIG); | |
786 | ||
787 | /* Check Base Address Register to make sure bus width is OK */ | |
788 | s = inw(ioaddr + BASE_ADDR); | |
789 | if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) && | |
790 | ((s >> 8) != (s & 0xff))) { | |
791 | SMC_SELECT_BANK(3); | |
792 | s = inw(ioaddr + REVISION); | |
807540ba | 793 | return s & 0xff; |
1da177e4 LT |
794 | } |
795 | ||
796 | if (width) { | |
636b8116 | 797 | pr_info("using 8-bit IO window\n"); |
4bbed523 | 798 | |
fba395ee | 799 | smc91c92_suspend(link); |
fb49fa53 | 800 | pcmcia_fixup_iowidth(link); |
fba395ee | 801 | smc91c92_resume(link); |
4bbed523 | 802 | return check_sig(link); |
1da177e4 LT |
803 | } |
804 | return -ENODEV; | |
805 | } | |
806 | ||
15b99ac1 | 807 | static int smc91c92_config(struct pcmcia_device *link) |
1da177e4 | 808 | { |
1da177e4 LT |
809 | struct net_device *dev = link->priv; |
810 | struct smc_private *smc = netdev_priv(dev); | |
1da177e4 LT |
811 | char *name; |
812 | int i, j, rev; | |
906da809 | 813 | unsigned int ioaddr; |
1da177e4 LT |
814 | u_long mir; |
815 | ||
dd0fab5b | 816 | dev_dbg(&link->dev, "smc91c92_config\n"); |
1da177e4 | 817 | |
efd50585 DB |
818 | smc->manfid = link->manf_id; |
819 | smc->cardid = link->card_id; | |
1da177e4 | 820 | |
1da177e4 LT |
821 | if ((smc->manfid == MANFID_OSITECH) && |
822 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
823 | i = osi_config(link); | |
824 | } else if ((smc->manfid == MANFID_MOTOROLA) || | |
825 | ((smc->manfid == MANFID_MEGAHERTZ) && | |
826 | ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) || | |
827 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) { | |
828 | i = mhz_mfc_config(link); | |
829 | } else { | |
830 | i = smc_config(link); | |
831 | } | |
dd0fab5b DB |
832 | if (i) |
833 | goto config_failed; | |
1da177e4 | 834 | |
eb14120f | 835 | i = pcmcia_request_irq(link, smc_interrupt); |
dd0fab5b DB |
836 | if (i) |
837 | goto config_failed; | |
1ac71e5a | 838 | i = pcmcia_enable_device(link); |
dd0fab5b DB |
839 | if (i) |
840 | goto config_failed; | |
1da177e4 LT |
841 | |
842 | if (smc->manfid == MANFID_MOTOROLA) | |
843 | mot_config(link); | |
844 | ||
eb14120f | 845 | dev->irq = link->irq; |
1da177e4 LT |
846 | |
847 | if ((if_port >= 0) && (if_port <= 2)) | |
848 | dev->if_port = if_port; | |
849 | else | |
636b8116 | 850 | dev_notice(&link->dev, "invalid if_port requested\n"); |
1da177e4 LT |
851 | |
852 | switch (smc->manfid) { | |
853 | case MANFID_OSITECH: | |
854 | case MANFID_PSION: | |
855 | i = osi_setup(link, smc->manfid, smc->cardid); break; | |
856 | case MANFID_SMC: | |
857 | case MANFID_NEW_MEDIA: | |
858 | i = smc_setup(link); break; | |
859 | case 0x128: /* For broken Megahertz cards */ | |
860 | case MANFID_MEGAHERTZ: | |
861 | i = mhz_setup(link); break; | |
862 | case MANFID_MOTOROLA: | |
863 | default: /* get the hw address from EEPROM */ | |
864 | i = mot_setup(link); break; | |
865 | } | |
866 | ||
867 | if (i != 0) { | |
636b8116 | 868 | dev_notice(&link->dev, "Unable to find hardware address.\n"); |
fb9e2d88 | 869 | goto config_failed; |
1da177e4 LT |
870 | } |
871 | ||
872 | smc->duplex = 0; | |
873 | smc->rx_ovrn = 0; | |
874 | ||
875 | rev = check_sig(link); | |
876 | name = "???"; | |
877 | if (rev > 0) | |
878 | switch (rev >> 4) { | |
879 | case 3: name = "92"; break; | |
880 | case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break; | |
881 | case 5: name = "95"; break; | |
882 | case 7: name = "100"; break; | |
883 | case 8: name = "100-FD"; break; | |
884 | case 9: name = "110"; break; | |
885 | } | |
886 | ||
887 | ioaddr = dev->base_addr; | |
888 | if (rev > 0) { | |
889 | u_long mcr; | |
890 | SMC_SELECT_BANK(0); | |
891 | mir = inw(ioaddr + MEMINFO) & 0xff; | |
892 | if (mir == 0xff) mir++; | |
893 | /* Get scale factor for memory size */ | |
894 | mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200; | |
895 | mir *= 128 * (1<<((mcr >> 9) & 7)); | |
896 | SMC_SELECT_BANK(1); | |
897 | smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT; | |
898 | smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC; | |
899 | if (smc->manfid == MANFID_OSITECH) | |
900 | smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0; | |
901 | if ((rev >> 4) >= 7) | |
902 | smc->cfg |= CFG_MII_SELECT; | |
903 | } else | |
904 | mir = 0; | |
905 | ||
906 | if (smc->cfg & CFG_MII_SELECT) { | |
907 | SMC_SELECT_BANK(3); | |
908 | ||
909 | for (i = 0; i < 32; i++) { | |
910 | j = mdio_read(dev, i, 1); | |
911 | if ((j != 0) && (j != 0xffff)) break; | |
912 | } | |
913 | smc->mii_if.phy_id = (i < 32) ? i : -1; | |
914 | ||
915 | SMC_SELECT_BANK(0); | |
916 | } | |
917 | ||
dd2e5a15 | 918 | SET_NETDEV_DEV(dev, &link->dev); |
1da177e4 LT |
919 | |
920 | if (register_netdev(dev) != 0) { | |
636b8116 | 921 | dev_err(&link->dev, "register_netdev() failed\n"); |
1da177e4 LT |
922 | goto config_undo; |
923 | } | |
924 | ||
636b8116 JP |
925 | netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n", |
926 | name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr); | |
1da177e4 LT |
927 | |
928 | if (rev > 0) { | |
929 | if (mir & 0x3ff) | |
636b8116 | 930 | netdev_info(dev, " %lu byte", mir); |
1da177e4 | 931 | else |
636b8116 JP |
932 | netdev_info(dev, " %lu kb", mir>>10); |
933 | pr_cont(" buffer, %s xcvr\n", | |
934 | (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]); | |
1da177e4 LT |
935 | } |
936 | ||
937 | if (smc->cfg & CFG_MII_SELECT) { | |
938 | if (smc->mii_if.phy_id != -1) { | |
636b8116 JP |
939 | netdev_dbg(dev, " MII transceiver at index %d, status %x\n", |
940 | smc->mii_if.phy_id, j); | |
1da177e4 | 941 | } else { |
636b8116 | 942 | netdev_notice(dev, " No MII transceivers found!\n"); |
1da177e4 LT |
943 | } |
944 | } | |
15b99ac1 | 945 | return 0; |
1da177e4 LT |
946 | |
947 | config_undo: | |
948 | unregister_netdev(dev); | |
dd0fab5b | 949 | config_failed: |
1da177e4 | 950 | smc91c92_release(link); |
fb9e2d88 | 951 | free_netdev(dev); |
15b99ac1 | 952 | return -ENODEV; |
1da177e4 LT |
953 | } /* smc91c92_config */ |
954 | ||
fba395ee | 955 | static void smc91c92_release(struct pcmcia_device *link) |
1da177e4 | 956 | { |
dd0fab5b | 957 | dev_dbg(&link->dev, "smc91c92_release\n"); |
cdb13808 | 958 | if (link->resource[2]->end) { |
5f2a71fc DB |
959 | struct net_device *dev = link->priv; |
960 | struct smc_private *smc = netdev_priv(dev); | |
961 | iounmap(smc->base); | |
962 | } | |
fba395ee | 963 | pcmcia_disable_device(link); |
1da177e4 LT |
964 | } |
965 | ||
1da177e4 LT |
966 | /*====================================================================== |
967 | ||
968 | MII interface support for SMC91cXX based cards | |
969 | ======================================================================*/ | |
970 | ||
971 | #define MDIO_SHIFT_CLK 0x04 | |
972 | #define MDIO_DATA_OUT 0x01 | |
973 | #define MDIO_DIR_WRITE 0x08 | |
974 | #define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE) | |
975 | #define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT) | |
976 | #define MDIO_DATA_READ 0x02 | |
977 | ||
906da809 | 978 | static void mdio_sync(unsigned int addr) |
1da177e4 LT |
979 | { |
980 | int bits; | |
981 | for (bits = 0; bits < 32; bits++) { | |
982 | outb(MDIO_DATA_WRITE1, addr); | |
983 | outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr); | |
984 | } | |
985 | } | |
986 | ||
987 | static int mdio_read(struct net_device *dev, int phy_id, int loc) | |
988 | { | |
906da809 | 989 | unsigned int addr = dev->base_addr + MGMT; |
1da177e4 LT |
990 | u_int cmd = (0x06<<10)|(phy_id<<5)|loc; |
991 | int i, retval = 0; | |
992 | ||
993 | mdio_sync(addr); | |
994 | for (i = 13; i >= 0; i--) { | |
995 | int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; | |
996 | outb(dat, addr); | |
997 | outb(dat | MDIO_SHIFT_CLK, addr); | |
998 | } | |
999 | for (i = 19; i > 0; i--) { | |
1000 | outb(0, addr); | |
1001 | retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0); | |
1002 | outb(MDIO_SHIFT_CLK, addr); | |
1003 | } | |
1004 | return (retval>>1) & 0xffff; | |
1005 | } | |
1006 | ||
1007 | static void mdio_write(struct net_device *dev, int phy_id, int loc, int value) | |
1008 | { | |
906da809 | 1009 | unsigned int addr = dev->base_addr + MGMT; |
1da177e4 LT |
1010 | u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value; |
1011 | int i; | |
1012 | ||
1013 | mdio_sync(addr); | |
1014 | for (i = 31; i >= 0; i--) { | |
1015 | int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0; | |
1016 | outb(dat, addr); | |
1017 | outb(dat | MDIO_SHIFT_CLK, addr); | |
1018 | } | |
1019 | for (i = 1; i >= 0; i--) { | |
1020 | outb(0, addr); | |
1021 | outb(MDIO_SHIFT_CLK, addr); | |
1022 | } | |
1023 | } | |
1024 | ||
1025 | /*====================================================================== | |
1026 | ||
1027 | The driver core code, most of which should be common with a | |
1028 | non-PCMCIA implementation. | |
1029 | ||
1030 | ======================================================================*/ | |
1031 | ||
1032 | #ifdef PCMCIA_DEBUG | |
1033 | static void smc_dump(struct net_device *dev) | |
1034 | { | |
906da809 | 1035 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1036 | u_short i, w, save; |
1037 | save = inw(ioaddr + BANK_SELECT); | |
1038 | for (w = 0; w < 4; w++) { | |
1039 | SMC_SELECT_BANK(w); | |
636b8116 | 1040 | netdev_printk(KERN_DEBUG, dev, "bank %d: ", w); |
1da177e4 | 1041 | for (i = 0; i < 14; i += 2) |
636b8116 JP |
1042 | pr_cont(" %04x", inw(ioaddr + i)); |
1043 | pr_cont("\n"); | |
1da177e4 LT |
1044 | } |
1045 | outw(save, ioaddr + BANK_SELECT); | |
1046 | } | |
1047 | #endif | |
1048 | ||
1049 | static int smc_open(struct net_device *dev) | |
1050 | { | |
1051 | struct smc_private *smc = netdev_priv(dev); | |
fba395ee | 1052 | struct pcmcia_device *link = smc->p_dev; |
1da177e4 | 1053 | |
dd0fab5b | 1054 | dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n", |
1da177e4 | 1055 | dev->name, dev, inw(dev->base_addr + BANK_SELECT)); |
dd0fab5b DB |
1056 | #ifdef PCMCIA_DEBUG |
1057 | smc_dump(dev); | |
1da177e4 LT |
1058 | #endif |
1059 | ||
1060 | /* Check that the PCMCIA card is still here. */ | |
9940ec36 | 1061 | if (!pcmcia_dev_present(link)) |
1da177e4 LT |
1062 | return -ENODEV; |
1063 | /* Physical device present signature. */ | |
1064 | if (check_sig(link) < 0) { | |
636b8116 | 1065 | netdev_info(dev, "Yikes! Bad chip signature!\n"); |
1da177e4 LT |
1066 | return -ENODEV; |
1067 | } | |
1068 | link->open++; | |
1069 | ||
1070 | netif_start_queue(dev); | |
1071 | smc->saved_skb = NULL; | |
1072 | smc->packets_waiting = 0; | |
1073 | ||
1074 | smc_reset(dev); | |
1075 | init_timer(&smc->media); | |
c061b18d | 1076 | smc->media.function = media_check; |
1da177e4 LT |
1077 | smc->media.data = (u_long) dev; |
1078 | smc->media.expires = jiffies + HZ; | |
1079 | add_timer(&smc->media); | |
1080 | ||
1081 | return 0; | |
1082 | } /* smc_open */ | |
1083 | ||
1084 | /*====================================================================*/ | |
1085 | ||
1086 | static int smc_close(struct net_device *dev) | |
1087 | { | |
1088 | struct smc_private *smc = netdev_priv(dev); | |
fba395ee | 1089 | struct pcmcia_device *link = smc->p_dev; |
906da809 | 1090 | unsigned int ioaddr = dev->base_addr; |
1da177e4 | 1091 | |
dd0fab5b | 1092 | dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n", |
1da177e4 LT |
1093 | dev->name, inw(ioaddr + BANK_SELECT)); |
1094 | ||
1095 | netif_stop_queue(dev); | |
1096 | ||
1097 | /* Shut off all interrupts, and turn off the Tx and Rx sections. | |
1098 | Don't bother to check for chip present. */ | |
1099 | SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */ | |
1100 | outw(0, ioaddr + INTERRUPT); | |
1101 | SMC_SELECT_BANK(0); | |
1102 | mask_bits(0xff00, ioaddr + RCR); | |
1103 | mask_bits(0xff00, ioaddr + TCR); | |
1104 | ||
1105 | /* Put the chip into power-down mode. */ | |
1106 | SMC_SELECT_BANK(1); | |
1107 | outw(CTL_POWERDOWN, ioaddr + CONTROL ); | |
1108 | ||
1109 | link->open--; | |
1110 | del_timer_sync(&smc->media); | |
1111 | ||
1112 | return 0; | |
1113 | } /* smc_close */ | |
1114 | ||
1115 | /*====================================================================== | |
1116 | ||
1117 | Transfer a packet to the hardware and trigger the packet send. | |
1118 | This may be called at either from either the Tx queue code | |
1119 | or the interrupt handler. | |
1120 | ||
1121 | ======================================================================*/ | |
1122 | ||
1123 | static void smc_hardware_send_packet(struct net_device * dev) | |
1124 | { | |
1125 | struct smc_private *smc = netdev_priv(dev); | |
1126 | struct sk_buff *skb = smc->saved_skb; | |
906da809 | 1127 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1128 | u_char packet_no; |
1129 | ||
1130 | if (!skb) { | |
636b8116 | 1131 | netdev_err(dev, "In XMIT with no packet to send\n"); |
1da177e4 LT |
1132 | return; |
1133 | } | |
1134 | ||
1135 | /* There should be a packet slot waiting. */ | |
1136 | packet_no = inw(ioaddr + PNR_ARR) >> 8; | |
1137 | if (packet_no & 0x80) { | |
1138 | /* If not, there is a hardware problem! Likely an ejected card. */ | |
636b8116 JP |
1139 | netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n", |
1140 | packet_no); | |
1da177e4 LT |
1141 | dev_kfree_skb_irq(skb); |
1142 | smc->saved_skb = NULL; | |
1143 | netif_start_queue(dev); | |
1144 | return; | |
1145 | } | |
1146 | ||
6fb7298c | 1147 | dev->stats.tx_bytes += skb->len; |
1da177e4 LT |
1148 | /* The card should use the just-allocated buffer. */ |
1149 | outw(packet_no, ioaddr + PNR_ARR); | |
1150 | /* point to the beginning of the packet */ | |
1151 | outw(PTR_AUTOINC , ioaddr + POINTER); | |
1152 | ||
1153 | /* Send the packet length (+6 for status, length and ctl byte) | |
1154 | and the status word (set to zeros). */ | |
1155 | { | |
1156 | u_char *buf = skb->data; | |
1157 | u_int length = skb->len; /* The chip will pad to ethernet min. */ | |
1158 | ||
636b8116 | 1159 | netdev_dbg(dev, "Trying to xmit packet of length %d\n", length); |
1da177e4 LT |
1160 | |
1161 | /* send the packet length: +6 for status word, length, and ctl */ | |
1162 | outw(0, ioaddr + DATA_1); | |
1163 | outw(length + 6, ioaddr + DATA_1); | |
1164 | outsw(ioaddr + DATA_1, buf, length >> 1); | |
1165 | ||
1166 | /* The odd last byte, if there is one, goes in the control word. */ | |
1167 | outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1); | |
1168 | } | |
1169 | ||
1170 | /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */ | |
1171 | outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) | | |
1172 | (inw(ioaddr + INTERRUPT) & 0xff00), | |
1173 | ioaddr + INTERRUPT); | |
1174 | ||
1175 | /* The chip does the rest of the work. */ | |
1176 | outw(MC_ENQUEUE , ioaddr + MMU_CMD); | |
1177 | ||
1178 | smc->saved_skb = NULL; | |
1179 | dev_kfree_skb_irq(skb); | |
1180 | dev->trans_start = jiffies; | |
1181 | netif_start_queue(dev); | |
1da177e4 LT |
1182 | } |
1183 | ||
1184 | /*====================================================================*/ | |
1185 | ||
1186 | static void smc_tx_timeout(struct net_device *dev) | |
1187 | { | |
1188 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1189 | unsigned int ioaddr = dev->base_addr; |
1da177e4 | 1190 | |
636b8116 JP |
1191 | netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n", |
1192 | inw(ioaddr)&0xff, inw(ioaddr + 2)); | |
6fb7298c | 1193 | dev->stats.tx_errors++; |
1da177e4 | 1194 | smc_reset(dev); |
1ae5dc34 | 1195 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1da177e4 LT |
1196 | smc->saved_skb = NULL; |
1197 | netif_wake_queue(dev); | |
1198 | } | |
1199 | ||
dbf02fae SH |
1200 | static netdev_tx_t smc_start_xmit(struct sk_buff *skb, |
1201 | struct net_device *dev) | |
1da177e4 LT |
1202 | { |
1203 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1204 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1205 | u_short num_pages; |
1206 | short time_out, ir; | |
85e27831 | 1207 | unsigned long flags; |
1da177e4 LT |
1208 | |
1209 | netif_stop_queue(dev); | |
1210 | ||
636b8116 JP |
1211 | netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n", |
1212 | skb->len, inw(ioaddr + 2)); | |
1da177e4 LT |
1213 | |
1214 | if (smc->saved_skb) { | |
1215 | /* THIS SHOULD NEVER HAPPEN. */ | |
6fb7298c | 1216 | dev->stats.tx_aborted_errors++; |
636b8116 JP |
1217 | netdev_printk(KERN_DEBUG, dev, |
1218 | "Internal error -- sent packet while busy\n"); | |
5b548140 | 1219 | return NETDEV_TX_BUSY; |
1da177e4 LT |
1220 | } |
1221 | smc->saved_skb = skb; | |
1222 | ||
1223 | num_pages = skb->len >> 8; | |
1224 | ||
1225 | if (num_pages > 7) { | |
636b8116 | 1226 | netdev_err(dev, "Far too big packet error: %d pages\n", num_pages); |
1da177e4 LT |
1227 | dev_kfree_skb (skb); |
1228 | smc->saved_skb = NULL; | |
6fb7298c | 1229 | dev->stats.tx_dropped++; |
6ed10654 | 1230 | return NETDEV_TX_OK; /* Do not re-queue this packet. */ |
1da177e4 LT |
1231 | } |
1232 | /* A packet is now waiting. */ | |
1233 | smc->packets_waiting++; | |
1234 | ||
85e27831 | 1235 | spin_lock_irqsave(&smc->lock, flags); |
1da177e4 LT |
1236 | SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */ |
1237 | ||
1238 | /* need MC_RESET to keep the memory consistent. errata? */ | |
1239 | if (smc->rx_ovrn) { | |
1240 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1241 | smc->rx_ovrn = 0; | |
1242 | } | |
1243 | ||
1244 | /* Allocate the memory; send the packet now if we win. */ | |
1245 | outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD); | |
1246 | for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) { | |
1247 | ir = inw(ioaddr+INTERRUPT); | |
1248 | if (ir & IM_ALLOC_INT) { | |
1249 | /* Acknowledge the interrupt, send the packet. */ | |
1250 | outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT); | |
1251 | smc_hardware_send_packet(dev); /* Send the packet now.. */ | |
85e27831 | 1252 | spin_unlock_irqrestore(&smc->lock, flags); |
6ed10654 | 1253 | return NETDEV_TX_OK; |
1da177e4 LT |
1254 | } |
1255 | } | |
1256 | ||
1257 | /* Otherwise defer until the Tx-space-allocated interrupt. */ | |
dd0fab5b | 1258 | pr_debug("%s: memory allocation deferred.\n", dev->name); |
1da177e4 | 1259 | outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT); |
85e27831 | 1260 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 | 1261 | |
6ed10654 | 1262 | return NETDEV_TX_OK; |
1da177e4 LT |
1263 | } |
1264 | ||
1265 | /*====================================================================== | |
1266 | ||
1267 | Handle a Tx anomolous event. Entered while in Window 2. | |
1268 | ||
1269 | ======================================================================*/ | |
1270 | ||
1271 | static void smc_tx_err(struct net_device * dev) | |
1272 | { | |
1273 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1274 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1275 | int saved_packet = inw(ioaddr + PNR_ARR) & 0xff; |
1276 | int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f; | |
1277 | int tx_status; | |
1278 | ||
1279 | /* select this as the packet to read from */ | |
1280 | outw(packet_no, ioaddr + PNR_ARR); | |
1281 | ||
1282 | /* read the first word from this packet */ | |
1283 | outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER); | |
1284 | ||
1285 | tx_status = inw(ioaddr + DATA_1); | |
1286 | ||
6fb7298c SH |
1287 | dev->stats.tx_errors++; |
1288 | if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++; | |
1289 | if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++; | |
1da177e4 | 1290 | if (tx_status & TS_16COL) { |
6fb7298c | 1291 | dev->stats.tx_aborted_errors++; |
1da177e4 LT |
1292 | smc->tx_err++; |
1293 | } | |
1294 | ||
1295 | if (tx_status & TS_SUCCESS) { | |
636b8116 | 1296 | netdev_notice(dev, "Successful packet caused error interrupt?\n"); |
1da177e4 LT |
1297 | } |
1298 | /* re-enable transmit */ | |
1299 | SMC_SELECT_BANK(0); | |
1300 | outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); | |
1301 | SMC_SELECT_BANK(2); | |
1302 | ||
1303 | outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */ | |
1304 | ||
1305 | /* one less packet waiting for me */ | |
1306 | smc->packets_waiting--; | |
1307 | ||
1308 | outw(saved_packet, ioaddr + PNR_ARR); | |
1da177e4 LT |
1309 | } |
1310 | ||
1311 | /*====================================================================*/ | |
1312 | ||
1313 | static void smc_eph_irq(struct net_device *dev) | |
1314 | { | |
1315 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1316 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1317 | u_short card_stats, ephs; |
1318 | ||
1319 | SMC_SELECT_BANK(0); | |
1320 | ephs = inw(ioaddr + EPH); | |
dd0fab5b | 1321 | pr_debug("%s: Ethernet protocol handler interrupt, status" |
1da177e4 LT |
1322 | " %4.4x.\n", dev->name, ephs); |
1323 | /* Could be a counter roll-over warning: update stats. */ | |
1324 | card_stats = inw(ioaddr + COUNTER); | |
1325 | /* single collisions */ | |
6fb7298c | 1326 | dev->stats.collisions += card_stats & 0xF; |
1da177e4 LT |
1327 | card_stats >>= 4; |
1328 | /* multiple collisions */ | |
6fb7298c | 1329 | dev->stats.collisions += card_stats & 0xF; |
1da177e4 LT |
1330 | #if 0 /* These are for when linux supports these statistics */ |
1331 | card_stats >>= 4; /* deferred */ | |
1332 | card_stats >>= 4; /* excess deferred */ | |
1333 | #endif | |
1334 | /* If we had a transmit error we must re-enable the transmitter. */ | |
1335 | outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR); | |
1336 | ||
1337 | /* Clear a link error interrupt. */ | |
1338 | SMC_SELECT_BANK(1); | |
1339 | outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL); | |
1340 | outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, | |
1341 | ioaddr + CONTROL); | |
1342 | SMC_SELECT_BANK(2); | |
1343 | } | |
1344 | ||
1345 | /*====================================================================*/ | |
1346 | ||
7d12e780 | 1347 | static irqreturn_t smc_interrupt(int irq, void *dev_id) |
1da177e4 LT |
1348 | { |
1349 | struct net_device *dev = dev_id; | |
1350 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1351 | unsigned int ioaddr; |
1da177e4 LT |
1352 | u_short saved_bank, saved_pointer, mask, status; |
1353 | unsigned int handled = 1; | |
1354 | char bogus_cnt = INTR_WORK; /* Work we are willing to do. */ | |
1355 | ||
1356 | if (!netif_device_present(dev)) | |
1357 | return IRQ_NONE; | |
1358 | ||
1359 | ioaddr = dev->base_addr; | |
1360 | ||
dd0fab5b | 1361 | pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name, |
1da177e4 LT |
1362 | irq, ioaddr); |
1363 | ||
85e27831 | 1364 | spin_lock(&smc->lock); |
1da177e4 LT |
1365 | smc->watchdog = 0; |
1366 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1367 | if ((saved_bank & 0xff00) != 0x3300) { | |
1368 | /* The device does not exist -- the card could be off-line, or | |
1369 | maybe it has been ejected. */ | |
dd0fab5b | 1370 | pr_debug("%s: SMC91c92 interrupt %d for non-existent" |
1da177e4 LT |
1371 | "/ejected device.\n", dev->name, irq); |
1372 | handled = 0; | |
1373 | goto irq_done; | |
1374 | } | |
1375 | ||
1376 | SMC_SELECT_BANK(2); | |
1377 | saved_pointer = inw(ioaddr + POINTER); | |
1378 | mask = inw(ioaddr + INTERRUPT) >> 8; | |
1379 | /* clear all interrupts */ | |
1380 | outw(0, ioaddr + INTERRUPT); | |
1381 | ||
1382 | do { /* read the status flag, and mask it */ | |
1383 | status = inw(ioaddr + INTERRUPT) & 0xff; | |
dd0fab5b | 1384 | pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name, |
1da177e4 LT |
1385 | status, mask); |
1386 | if ((status & mask) == 0) { | |
1387 | if (bogus_cnt == INTR_WORK) | |
1388 | handled = 0; | |
1389 | break; | |
1390 | } | |
1391 | if (status & IM_RCV_INT) { | |
1392 | /* Got a packet(s). */ | |
1393 | smc_rx(dev); | |
1394 | } | |
1395 | if (status & IM_TX_INT) { | |
1396 | smc_tx_err(dev); | |
1397 | outw(IM_TX_INT, ioaddr + INTERRUPT); | |
1398 | } | |
1399 | status &= mask; | |
1400 | if (status & IM_TX_EMPTY_INT) { | |
1401 | outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT); | |
1402 | mask &= ~IM_TX_EMPTY_INT; | |
6fb7298c | 1403 | dev->stats.tx_packets += smc->packets_waiting; |
1da177e4 LT |
1404 | smc->packets_waiting = 0; |
1405 | } | |
1406 | if (status & IM_ALLOC_INT) { | |
1407 | /* Clear this interrupt so it doesn't happen again */ | |
1408 | mask &= ~IM_ALLOC_INT; | |
1409 | ||
1410 | smc_hardware_send_packet(dev); | |
1411 | ||
1412 | /* enable xmit interrupts based on this */ | |
1413 | mask |= (IM_TX_EMPTY_INT | IM_TX_INT); | |
1414 | ||
1415 | /* and let the card send more packets to me */ | |
1416 | netif_wake_queue(dev); | |
1417 | } | |
1418 | if (status & IM_RX_OVRN_INT) { | |
6fb7298c SH |
1419 | dev->stats.rx_errors++; |
1420 | dev->stats.rx_fifo_errors++; | |
1da177e4 LT |
1421 | if (smc->duplex) |
1422 | smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */ | |
1423 | outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT); | |
1424 | } | |
1425 | if (status & IM_EPH_INT) | |
1426 | smc_eph_irq(dev); | |
1427 | } while (--bogus_cnt); | |
1428 | ||
dd0fab5b | 1429 | pr_debug(" Restoring saved registers mask %2.2x bank %4.4x" |
1da177e4 LT |
1430 | " pointer %4.4x.\n", mask, saved_bank, saved_pointer); |
1431 | ||
1432 | /* restore state register */ | |
1433 | outw((mask<<8), ioaddr + INTERRUPT); | |
1434 | outw(saved_pointer, ioaddr + POINTER); | |
1435 | SMC_SELECT_BANK(saved_bank); | |
1436 | ||
dd0fab5b | 1437 | pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq); |
1da177e4 LT |
1438 | |
1439 | irq_done: | |
1440 | ||
1441 | if ((smc->manfid == MANFID_OSITECH) && | |
1442 | (smc->cardid != PRODID_OSITECH_SEVEN)) { | |
1443 | /* Retrigger interrupt if needed */ | |
1444 | mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR); | |
1445 | set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR); | |
1446 | } | |
1447 | if (smc->manfid == MANFID_MOTOROLA) { | |
1448 | u_char cor; | |
1449 | cor = readb(smc->base + MOT_UART + CISREG_COR); | |
1450 | writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR); | |
1451 | writeb(cor, smc->base + MOT_UART + CISREG_COR); | |
1452 | cor = readb(smc->base + MOT_LAN + CISREG_COR); | |
1453 | writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR); | |
1454 | writeb(cor, smc->base + MOT_LAN + CISREG_COR); | |
1455 | } | |
9735b7ef KK |
1456 | |
1457 | if ((smc->base != NULL) && /* Megahertz MFC's */ | |
1458 | (smc->manfid == MANFID_MEGAHERTZ) && | |
1459 | (smc->cardid == PRODID_MEGAHERTZ_EM3288)) { | |
1460 | ||
1461 | u_char tmp; | |
1462 | tmp = readb(smc->base+MEGAHERTZ_ISR); | |
1463 | tmp = readb(smc->base+MEGAHERTZ_ISR); | |
1464 | ||
1465 | /* Retrigger interrupt if needed */ | |
1466 | writeb(tmp, smc->base + MEGAHERTZ_ISR); | |
1467 | writeb(tmp, smc->base + MEGAHERTZ_ISR); | |
1da177e4 | 1468 | } |
9735b7ef | 1469 | |
85e27831 | 1470 | spin_unlock(&smc->lock); |
1da177e4 LT |
1471 | return IRQ_RETVAL(handled); |
1472 | } | |
1473 | ||
1474 | /*====================================================================*/ | |
1475 | ||
1476 | static void smc_rx(struct net_device *dev) | |
1477 | { | |
906da809 | 1478 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1479 | int rx_status; |
1480 | int packet_length; /* Caution: not frame length, rather words | |
1481 | to transfer from the chip. */ | |
1482 | ||
1483 | /* Assertion: we are in Window 2. */ | |
1484 | ||
1485 | if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) { | |
636b8116 | 1486 | netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n"); |
1da177e4 LT |
1487 | return; |
1488 | } | |
1489 | ||
1490 | /* Reset the read pointer, and read the status and packet length. */ | |
1491 | outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER); | |
1492 | rx_status = inw(ioaddr + DATA_1); | |
1493 | packet_length = inw(ioaddr + DATA_1) & 0x07ff; | |
1494 | ||
dd0fab5b | 1495 | pr_debug("%s: Receive status %4.4x length %d.\n", |
1da177e4 LT |
1496 | dev->name, rx_status, packet_length); |
1497 | ||
1498 | if (!(rx_status & RS_ERRORS)) { | |
1499 | /* do stuff to make a new packet */ | |
1500 | struct sk_buff *skb; | |
1501 | ||
1502 | /* Note: packet_length adds 5 or 6 extra bytes here! */ | |
1503 | skb = dev_alloc_skb(packet_length+2); | |
1504 | ||
1505 | if (skb == NULL) { | |
dd0fab5b | 1506 | pr_debug("%s: Low memory, packet dropped.\n", dev->name); |
6fb7298c | 1507 | dev->stats.rx_dropped++; |
1da177e4 LT |
1508 | outw(MC_RELEASE, ioaddr + MMU_CMD); |
1509 | return; | |
1510 | } | |
1511 | ||
1512 | packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6); | |
1513 | skb_reserve(skb, 2); | |
1514 | insw(ioaddr+DATA_1, skb_put(skb, packet_length), | |
1515 | (packet_length+1)>>1); | |
1516 | skb->protocol = eth_type_trans(skb, dev); | |
1517 | ||
1da177e4 LT |
1518 | netif_rx(skb); |
1519 | dev->last_rx = jiffies; | |
6fb7298c SH |
1520 | dev->stats.rx_packets++; |
1521 | dev->stats.rx_bytes += packet_length; | |
1da177e4 | 1522 | if (rx_status & RS_MULTICAST) |
6fb7298c | 1523 | dev->stats.multicast++; |
1da177e4 LT |
1524 | } else { |
1525 | /* error ... */ | |
6fb7298c | 1526 | dev->stats.rx_errors++; |
1da177e4 | 1527 | |
6fb7298c | 1528 | if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++; |
1da177e4 | 1529 | if (rx_status & (RS_TOOSHORT | RS_TOOLONG)) |
6fb7298c SH |
1530 | dev->stats.rx_length_errors++; |
1531 | if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++; | |
1da177e4 LT |
1532 | } |
1533 | /* Let the MMU free the memory of this packet. */ | |
1534 | outw(MC_RELEASE, ioaddr + MMU_CMD); | |
1da177e4 LT |
1535 | } |
1536 | ||
1da177e4 LT |
1537 | /*====================================================================== |
1538 | ||
1539 | Set the receive mode. | |
1540 | ||
1541 | This routine is used by both the protocol level to notify us of | |
1542 | promiscuous/multicast mode changes, and by the open/reset code to | |
1543 | initialize the Rx registers. We always set the multicast list and | |
1544 | leave the receiver running. | |
1545 | ||
1546 | ======================================================================*/ | |
1547 | ||
1548 | static void set_rx_mode(struct net_device *dev) | |
1549 | { | |
906da809 | 1550 | unsigned int ioaddr = dev->base_addr; |
1da177e4 | 1551 | struct smc_private *smc = netdev_priv(dev); |
a6d37024 | 1552 | unsigned char multicast_table[8]; |
1da177e4 LT |
1553 | unsigned long flags; |
1554 | u_short rx_cfg_setting; | |
a6d37024 KK |
1555 | int i; |
1556 | ||
1557 | memset(multicast_table, 0, sizeof(multicast_table)); | |
1da177e4 LT |
1558 | |
1559 | if (dev->flags & IFF_PROMISC) { | |
1da177e4 LT |
1560 | rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti; |
1561 | } else if (dev->flags & IFF_ALLMULTI) | |
1562 | rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti; | |
1563 | else { | |
4cd24eaf | 1564 | if (!netdev_mc_empty(dev)) { |
22bedad3 | 1565 | struct netdev_hw_addr *ha; |
91fea585 | 1566 | |
22bedad3 JP |
1567 | netdev_for_each_mc_addr(ha, dev) { |
1568 | u_int position = ether_crc(6, ha->addr); | |
91fea585 JP |
1569 | multicast_table[position >> 29] |= 1 << ((position >> 26) & 7); |
1570 | } | |
1da177e4 LT |
1571 | } |
1572 | rx_cfg_setting = RxStripCRC | RxEnable; | |
1573 | } | |
1574 | ||
1575 | /* Load MC table and Rx setting into the chip without interrupts. */ | |
1576 | spin_lock_irqsave(&smc->lock, flags); | |
1577 | SMC_SELECT_BANK(3); | |
a6d37024 KK |
1578 | for (i = 0; i < 8; i++) |
1579 | outb(multicast_table[i], ioaddr + MULTICAST0 + i); | |
1da177e4 LT |
1580 | SMC_SELECT_BANK(0); |
1581 | outw(rx_cfg_setting, ioaddr + RCR); | |
1582 | SMC_SELECT_BANK(2); | |
1583 | spin_unlock_irqrestore(&smc->lock, flags); | |
1da177e4 LT |
1584 | } |
1585 | ||
1586 | /*====================================================================== | |
1587 | ||
1588 | Senses when a card's config changes. Here, it's coax or TP. | |
1589 | ||
1590 | ======================================================================*/ | |
1591 | ||
1592 | static int s9k_config(struct net_device *dev, struct ifmap *map) | |
1593 | { | |
1594 | struct smc_private *smc = netdev_priv(dev); | |
1595 | if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { | |
1596 | if (smc->cfg & CFG_MII_SELECT) | |
1597 | return -EOPNOTSUPP; | |
1598 | else if (map->port > 2) | |
1599 | return -EINVAL; | |
1600 | dev->if_port = map->port; | |
636b8116 | 1601 | netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]); |
1da177e4 LT |
1602 | smc_reset(dev); |
1603 | } | |
1604 | return 0; | |
1605 | } | |
1606 | ||
1607 | /*====================================================================== | |
1608 | ||
1609 | Reset the chip, reloading every register that might be corrupted. | |
1610 | ||
1611 | ======================================================================*/ | |
1612 | ||
1613 | /* | |
1614 | Set transceiver type, perhaps to something other than what the user | |
1615 | specified in dev->if_port. | |
1616 | */ | |
1617 | static void smc_set_xcvr(struct net_device *dev, int if_port) | |
1618 | { | |
1619 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1620 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1621 | u_short saved_bank; |
1622 | ||
1623 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1624 | SMC_SELECT_BANK(1); | |
1625 | if (if_port == 2) { | |
1626 | outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG); | |
1627 | if ((smc->manfid == MANFID_OSITECH) && | |
1628 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1629 | set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1630 | smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002); | |
1631 | } else { | |
1632 | outw(smc->cfg, ioaddr + CONFIG); | |
1633 | if ((smc->manfid == MANFID_OSITECH) && | |
1634 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1635 | mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1636 | smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001); | |
1637 | } | |
1638 | SMC_SELECT_BANK(saved_bank); | |
1639 | } | |
1640 | ||
1641 | static void smc_reset(struct net_device *dev) | |
1642 | { | |
906da809 | 1643 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1644 | struct smc_private *smc = netdev_priv(dev); |
1645 | int i; | |
1646 | ||
dd0fab5b | 1647 | pr_debug("%s: smc91c92 reset called.\n", dev->name); |
1da177e4 LT |
1648 | |
1649 | /* The first interaction must be a write to bring the chip out | |
1650 | of sleep mode. */ | |
1651 | SMC_SELECT_BANK(0); | |
1652 | /* Reset the chip. */ | |
1653 | outw(RCR_SOFTRESET, ioaddr + RCR); | |
1654 | udelay(10); | |
1655 | ||
1656 | /* Clear the transmit and receive configuration registers. */ | |
1657 | outw(RCR_CLEAR, ioaddr + RCR); | |
1658 | outw(TCR_CLEAR, ioaddr + TCR); | |
1659 | ||
1660 | /* Set the Window 1 control, configuration and station addr registers. | |
1661 | No point in writing the I/O base register ;-> */ | |
1662 | SMC_SELECT_BANK(1); | |
d6e05edc | 1663 | /* Automatically release successfully transmitted packets, |
1da177e4 LT |
1664 | Accept link errors, counter and Tx error interrupts. */ |
1665 | outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE, | |
1666 | ioaddr + CONTROL); | |
1667 | smc_set_xcvr(dev, dev->if_port); | |
1668 | if ((smc->manfid == MANFID_OSITECH) && | |
1669 | (smc->cardid != PRODID_OSITECH_SEVEN)) | |
1670 | outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) | | |
1671 | (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00), | |
1672 | ioaddr - 0x10 + OSITECH_AUI_PWR); | |
1673 | ||
1674 | /* Fill in the physical address. The databook is wrong about the order! */ | |
1675 | for (i = 0; i < 6; i += 2) | |
1676 | outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i], | |
1677 | ioaddr + ADDR0 + i); | |
1678 | ||
1679 | /* Reset the MMU */ | |
1680 | SMC_SELECT_BANK(2); | |
1681 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1682 | outw(0, ioaddr + INTERRUPT); | |
1683 | ||
1684 | /* Re-enable the chip. */ | |
1685 | SMC_SELECT_BANK(0); | |
1686 | outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) | | |
1687 | TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR); | |
1688 | set_rx_mode(dev); | |
1689 | ||
1690 | if (smc->cfg & CFG_MII_SELECT) { | |
1691 | SMC_SELECT_BANK(3); | |
1692 | ||
1693 | /* Reset MII */ | |
1694 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000); | |
1695 | ||
1696 | /* Advertise 100F, 100H, 10F, 10H */ | |
1697 | mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1); | |
1698 | ||
1699 | /* Restart MII autonegotiation */ | |
1700 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000); | |
1701 | mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200); | |
1702 | } | |
1703 | ||
1704 | /* Enable interrupts. */ | |
1705 | SMC_SELECT_BANK(2); | |
1706 | outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8, | |
1707 | ioaddr + INTERRUPT); | |
1708 | } | |
1709 | ||
1710 | /*====================================================================== | |
1711 | ||
1712 | Media selection timer routine | |
1713 | ||
1714 | ======================================================================*/ | |
1715 | ||
1716 | static void media_check(u_long arg) | |
1717 | { | |
1718 | struct net_device *dev = (struct net_device *) arg; | |
1719 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1720 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1721 | u_short i, media, saved_bank; |
1722 | u_short link; | |
85e27831 K |
1723 | unsigned long flags; |
1724 | ||
1725 | spin_lock_irqsave(&smc->lock, flags); | |
1da177e4 LT |
1726 | |
1727 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1728 | ||
1729 | if (!netif_device_present(dev)) | |
1730 | goto reschedule; | |
1731 | ||
1732 | SMC_SELECT_BANK(2); | |
1733 | ||
1734 | /* need MC_RESET to keep the memory consistent. errata? */ | |
1735 | if (smc->rx_ovrn) { | |
1736 | outw(MC_RESET, ioaddr + MMU_CMD); | |
1737 | smc->rx_ovrn = 0; | |
1738 | } | |
1739 | i = inw(ioaddr + INTERRUPT); | |
1740 | SMC_SELECT_BANK(0); | |
1741 | media = inw(ioaddr + EPH) & EPH_LINK_OK; | |
1742 | SMC_SELECT_BANK(1); | |
1743 | media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1; | |
1744 | ||
2a915157 KK |
1745 | SMC_SELECT_BANK(saved_bank); |
1746 | spin_unlock_irqrestore(&smc->lock, flags); | |
1747 | ||
1da177e4 LT |
1748 | /* Check for pending interrupt with watchdog flag set: with |
1749 | this, we can limp along even if the interrupt is blocked */ | |
1750 | if (smc->watchdog++ && ((i>>8) & i)) { | |
1751 | if (!smc->fast_poll) | |
636b8116 | 1752 | netdev_info(dev, "interrupt(s) dropped!\n"); |
2a915157 | 1753 | local_irq_save(flags); |
e363d138 | 1754 | smc_interrupt(dev->irq, dev); |
2a915157 | 1755 | local_irq_restore(flags); |
1da177e4 LT |
1756 | smc->fast_poll = HZ; |
1757 | } | |
1758 | if (smc->fast_poll) { | |
1759 | smc->fast_poll--; | |
1760 | smc->media.expires = jiffies + HZ/100; | |
1761 | add_timer(&smc->media); | |
1da177e4 LT |
1762 | return; |
1763 | } | |
1764 | ||
2a915157 KK |
1765 | spin_lock_irqsave(&smc->lock, flags); |
1766 | ||
1767 | saved_bank = inw(ioaddr + BANK_SELECT); | |
1768 | ||
1da177e4 LT |
1769 | if (smc->cfg & CFG_MII_SELECT) { |
1770 | if (smc->mii_if.phy_id < 0) | |
1771 | goto reschedule; | |
1772 | ||
1773 | SMC_SELECT_BANK(3); | |
1774 | link = mdio_read(dev, smc->mii_if.phy_id, 1); | |
1775 | if (!link || (link == 0xffff)) { | |
636b8116 | 1776 | netdev_info(dev, "MII is missing!\n"); |
1da177e4 LT |
1777 | smc->mii_if.phy_id = -1; |
1778 | goto reschedule; | |
1779 | } | |
1780 | ||
1781 | link &= 0x0004; | |
1782 | if (link != smc->link_status) { | |
1783 | u_short p = mdio_read(dev, smc->mii_if.phy_id, 5); | |
636b8116 | 1784 | netdev_info(dev, "%s link beat\n", link ? "found" : "lost"); |
1da177e4 LT |
1785 | smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40)) |
1786 | ? TCR_FDUPLX : 0); | |
1787 | if (link) { | |
636b8116 JP |
1788 | netdev_info(dev, "autonegotiation complete: " |
1789 | "%dbaseT-%cD selected\n", | |
1790 | (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H'); | |
1da177e4 LT |
1791 | } |
1792 | SMC_SELECT_BANK(0); | |
1793 | outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR); | |
1794 | smc->link_status = link; | |
1795 | } | |
1796 | goto reschedule; | |
1797 | } | |
1798 | ||
1799 | /* Ignore collisions unless we've had no rx's recently */ | |
4851d3aa | 1800 | if (time_after(jiffies, dev->last_rx + HZ)) { |
1da177e4 LT |
1801 | if (smc->tx_err || (smc->media_status & EPH_16COL)) |
1802 | media |= EPH_16COL; | |
1803 | } | |
1804 | smc->tx_err = 0; | |
1805 | ||
1806 | if (media != smc->media_status) { | |
1807 | if ((media & smc->media_status & 1) && | |
1808 | ((smc->media_status ^ media) & EPH_LINK_OK)) | |
636b8116 JP |
1809 | netdev_info(dev, "%s link beat\n", |
1810 | smc->media_status & EPH_LINK_OK ? "lost" : "found"); | |
1da177e4 LT |
1811 | else if ((media & smc->media_status & 2) && |
1812 | ((smc->media_status ^ media) & EPH_16COL)) | |
636b8116 JP |
1813 | netdev_info(dev, "coax cable %s\n", |
1814 | media & EPH_16COL ? "problem" : "ok"); | |
1da177e4 LT |
1815 | if (dev->if_port == 0) { |
1816 | if (media & 1) { | |
1817 | if (media & EPH_LINK_OK) | |
636b8116 | 1818 | netdev_info(dev, "flipped to 10baseT\n"); |
1da177e4 LT |
1819 | else |
1820 | smc_set_xcvr(dev, 2); | |
1821 | } else { | |
1822 | if (media & EPH_16COL) | |
1823 | smc_set_xcvr(dev, 1); | |
1824 | else | |
636b8116 | 1825 | netdev_info(dev, "flipped to 10base2\n"); |
1da177e4 LT |
1826 | } |
1827 | } | |
1828 | smc->media_status = media; | |
1829 | } | |
1830 | ||
1831 | reschedule: | |
1832 | smc->media.expires = jiffies + HZ; | |
1833 | add_timer(&smc->media); | |
1834 | SMC_SELECT_BANK(saved_bank); | |
85e27831 | 1835 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1836 | } |
1837 | ||
1838 | static int smc_link_ok(struct net_device *dev) | |
1839 | { | |
906da809 | 1840 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1841 | struct smc_private *smc = netdev_priv(dev); |
1842 | ||
1843 | if (smc->cfg & CFG_MII_SELECT) { | |
1844 | return mii_link_ok(&smc->mii_if); | |
1845 | } else { | |
1846 | SMC_SELECT_BANK(0); | |
1847 | return inw(ioaddr + EPH) & EPH_LINK_OK; | |
1848 | } | |
1849 | } | |
1850 | ||
1851 | static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) | |
1852 | { | |
1853 | u16 tmp; | |
906da809 | 1854 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1855 | |
1856 | ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI | | |
1857 | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full); | |
1858 | ||
1859 | SMC_SELECT_BANK(1); | |
1860 | tmp = inw(ioaddr + CONFIG); | |
1861 | ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP; | |
1862 | ecmd->transceiver = XCVR_INTERNAL; | |
1863 | ecmd->speed = SPEED_10; | |
1864 | ecmd->phy_address = ioaddr + MGMT; | |
1865 | ||
1866 | SMC_SELECT_BANK(0); | |
1867 | tmp = inw(ioaddr + TCR); | |
1868 | ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF; | |
1869 | ||
1870 | return 0; | |
1871 | } | |
1872 | ||
1873 | static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd) | |
1874 | { | |
1875 | u16 tmp; | |
906da809 | 1876 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1877 | |
1878 | if (ecmd->speed != SPEED_10) | |
1879 | return -EINVAL; | |
1880 | if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL) | |
1881 | return -EINVAL; | |
1882 | if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI) | |
1883 | return -EINVAL; | |
1884 | if (ecmd->transceiver != XCVR_INTERNAL) | |
1885 | return -EINVAL; | |
1886 | ||
1887 | if (ecmd->port == PORT_AUI) | |
1888 | smc_set_xcvr(dev, 1); | |
1889 | else | |
1890 | smc_set_xcvr(dev, 0); | |
1891 | ||
1892 | SMC_SELECT_BANK(0); | |
1893 | tmp = inw(ioaddr + TCR); | |
1894 | if (ecmd->duplex == DUPLEX_FULL) | |
1895 | tmp |= TCR_FDUPLX; | |
1896 | else | |
1897 | tmp &= ~TCR_FDUPLX; | |
1898 | outw(tmp, ioaddr + TCR); | |
1899 | ||
1900 | return 0; | |
1901 | } | |
1902 | ||
1903 | static int check_if_running(struct net_device *dev) | |
1904 | { | |
1905 | if (!netif_running(dev)) | |
1906 | return -EINVAL; | |
1907 | return 0; | |
1908 | } | |
1909 | ||
1910 | static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
1911 | { | |
1912 | strcpy(info->driver, DRV_NAME); | |
1913 | strcpy(info->version, DRV_VERSION); | |
1914 | } | |
1915 | ||
1916 | static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
1917 | { | |
1918 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1919 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1920 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
1921 | int ret; | |
2a915157 | 1922 | unsigned long flags; |
1da177e4 | 1923 | |
2a915157 | 1924 | spin_lock_irqsave(&smc->lock, flags); |
85e27831 | 1925 | SMC_SELECT_BANK(3); |
1da177e4 LT |
1926 | if (smc->cfg & CFG_MII_SELECT) |
1927 | ret = mii_ethtool_gset(&smc->mii_if, ecmd); | |
1928 | else | |
1929 | ret = smc_netdev_get_ecmd(dev, ecmd); | |
1da177e4 | 1930 | SMC_SELECT_BANK(saved_bank); |
2a915157 | 1931 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1932 | return ret; |
1933 | } | |
1934 | ||
1935 | static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | |
1936 | { | |
1937 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1938 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1939 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
1940 | int ret; | |
2a915157 | 1941 | unsigned long flags; |
1da177e4 | 1942 | |
2a915157 | 1943 | spin_lock_irqsave(&smc->lock, flags); |
85e27831 | 1944 | SMC_SELECT_BANK(3); |
1da177e4 LT |
1945 | if (smc->cfg & CFG_MII_SELECT) |
1946 | ret = mii_ethtool_sset(&smc->mii_if, ecmd); | |
1947 | else | |
1948 | ret = smc_netdev_set_ecmd(dev, ecmd); | |
1da177e4 | 1949 | SMC_SELECT_BANK(saved_bank); |
2a915157 | 1950 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1951 | return ret; |
1952 | } | |
1953 | ||
1954 | static u32 smc_get_link(struct net_device *dev) | |
1955 | { | |
1956 | struct smc_private *smc = netdev_priv(dev); | |
906da809 | 1957 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1958 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
1959 | u32 ret; | |
2a915157 | 1960 | unsigned long flags; |
1da177e4 | 1961 | |
2a915157 | 1962 | spin_lock_irqsave(&smc->lock, flags); |
85e27831 | 1963 | SMC_SELECT_BANK(3); |
1da177e4 | 1964 | ret = smc_link_ok(dev); |
1da177e4 | 1965 | SMC_SELECT_BANK(saved_bank); |
2a915157 | 1966 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
1967 | return ret; |
1968 | } | |
1969 | ||
1da177e4 LT |
1970 | static int smc_nway_reset(struct net_device *dev) |
1971 | { | |
1972 | struct smc_private *smc = netdev_priv(dev); | |
1973 | if (smc->cfg & CFG_MII_SELECT) { | |
906da809 | 1974 | unsigned int ioaddr = dev->base_addr; |
1da177e4 LT |
1975 | u16 saved_bank = inw(ioaddr + BANK_SELECT); |
1976 | int res; | |
1977 | ||
1978 | SMC_SELECT_BANK(3); | |
1979 | res = mii_nway_restart(&smc->mii_if); | |
1980 | SMC_SELECT_BANK(saved_bank); | |
1981 | ||
1982 | return res; | |
1983 | } else | |
1984 | return -EOPNOTSUPP; | |
1985 | } | |
1986 | ||
7282d491 | 1987 | static const struct ethtool_ops ethtool_ops = { |
1da177e4 LT |
1988 | .begin = check_if_running, |
1989 | .get_drvinfo = smc_get_drvinfo, | |
1990 | .get_settings = smc_get_settings, | |
1991 | .set_settings = smc_set_settings, | |
1992 | .get_link = smc_get_link, | |
1da177e4 LT |
1993 | .nway_reset = smc_nway_reset, |
1994 | }; | |
1995 | ||
1996 | static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |
1997 | { | |
1998 | struct smc_private *smc = netdev_priv(dev); | |
1999 | struct mii_ioctl_data *mii = if_mii(rq); | |
2000 | int rc = 0; | |
2001 | u16 saved_bank; | |
906da809 | 2002 | unsigned int ioaddr = dev->base_addr; |
2a915157 | 2003 | unsigned long flags; |
1da177e4 LT |
2004 | |
2005 | if (!netif_running(dev)) | |
2006 | return -EINVAL; | |
2007 | ||
2a915157 | 2008 | spin_lock_irqsave(&smc->lock, flags); |
1da177e4 LT |
2009 | saved_bank = inw(ioaddr + BANK_SELECT); |
2010 | SMC_SELECT_BANK(3); | |
2011 | rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL); | |
2012 | SMC_SELECT_BANK(saved_bank); | |
2a915157 | 2013 | spin_unlock_irqrestore(&smc->lock, flags); |
1da177e4 LT |
2014 | return rc; |
2015 | } | |
2016 | ||
5c672220 DB |
2017 | static struct pcmcia_device_id smc91c92_ids[] = { |
2018 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501), | |
2019 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a), | |
2020 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63), | |
2021 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63), | |
2022 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef), | |
2023 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef), | |
2024 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c), | |
2025 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e), | |
d277ad0e K |
2026 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9), |
2027 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed), | |
5c672220 DB |
2028 | PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020), |
2029 | PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023), | |
2030 | PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb), | |
2031 | PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc), | |
2032 | PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1), | |
2033 | PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5), | |
2034 | PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9), | |
2035 | PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953), | |
2036 | PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a), | |
d277ad0e K |
2037 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314), |
2038 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a), | |
5c672220 DB |
2039 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc), |
2040 | PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9), | |
2041 | PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d), | |
2042 | /* These conflict with other cards! */ | |
2043 | /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */ | |
2044 | /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */ | |
2045 | PCMCIA_DEVICE_NULL, | |
2046 | }; | |
2047 | MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids); | |
2048 | ||
1da177e4 LT |
2049 | static struct pcmcia_driver smc91c92_cs_driver = { |
2050 | .owner = THIS_MODULE, | |
2e9b981a | 2051 | .name = "smc91c92_cs", |
15b99ac1 | 2052 | .probe = smc91c92_probe, |
cc3b4866 | 2053 | .remove = smc91c92_detach, |
5c672220 | 2054 | .id_table = smc91c92_ids, |
98e4c28b DB |
2055 | .suspend = smc91c92_suspend, |
2056 | .resume = smc91c92_resume, | |
1da177e4 LT |
2057 | }; |
2058 | ||
2059 | static int __init init_smc91c92_cs(void) | |
2060 | { | |
2061 | return pcmcia_register_driver(&smc91c92_cs_driver); | |
2062 | } | |
2063 | ||
2064 | static void __exit exit_smc91c92_cs(void) | |
2065 | { | |
2066 | pcmcia_unregister_driver(&smc91c92_cs_driver); | |
1da177e4 LT |
2067 | } |
2068 | ||
2069 | module_init(init_smc91c92_cs); | |
2070 | module_exit(exit_smc91c92_cs); |