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Merge branch 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
[deliverable/linux.git] / drivers / net / pcmcia / xirc2ps_cs.c
CommitLineData
1da177e4
LT		 1/* [xirc2ps_cs.c wk 03.11.99] (1.40 1999/11/18 00:06:03)
2 * Xircom CreditCard Ethernet Adapter IIps driver
3 * Xircom Realport 10/100 (RE-100) driver
4 *
5 * This driver supports various Xircom CreditCard Ethernet adapters
6 * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56,
7 * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100.
8 *
9 * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not
10 * autodetect the media properly. In this case use the
11 * if_port=1 (for 10BaseT) or if_port=4 (for 100BaseT) options
12 * to force the media type.
13 *
14 * Written originally by Werner Koch based on David Hinds' skeleton of the
15 * PCMCIA driver.
16 *
17 * Copyright (c) 1997,1998 Werner Koch (dd9jn)
18 *
19 * This driver is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * It is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
32 *
33 *
34 * ALTERNATIVELY, this driver may be distributed under the terms of
35 * the following license, in which case the provisions of this license
36 * are required INSTEAD OF the GNU General Public License. (This clause
37 * is necessary due to a potential bad interaction between the GPL and
38 * the restrictions contained in a BSD-style copyright.)
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, and the entire permission notice in its entirety,
45 * including the disclaimer of warranties.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. The name of the author may not be used to endorse or promote
50 * products derived from this software without specific prior
51 * written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
54 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
56 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
57 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
58 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
59 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
61 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
63 * OF THE POSSIBILITY OF SUCH DAMAGE.
64 */
65
636b8116
JP		 66#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
67
1da177e4
LT		 68#include <linux/module.h>
69#include <linux/kernel.h>
70#include <linux/init.h>
71#include <linux/ptrace.h>
72#include <linux/slab.h>
73#include <linux/string.h>
74#include <linux/timer.h>
75#include <linux/interrupt.h>
76#include <linux/in.h>
77#include <linux/delay.h>
78#include <linux/ethtool.h>
79#include <linux/netdevice.h>
80#include <linux/etherdevice.h>
81#include <linux/skbuff.h>
82#include <linux/if_arp.h>
83#include <linux/ioport.h>
84#include <linux/bitops.h>
0fa0ee05 85#include <linux/mii.h>
1da177e4 86
1da177e4
LT		 87#include <pcmcia/cistpl.h>
88#include <pcmcia/cisreg.h>
89#include <pcmcia/ciscode.h>
90
91#include <asm/io.h>
92#include <asm/system.h>
93#include <asm/uaccess.h>
94
95#ifndef MANFID_COMPAQ
96 #define MANFID_COMPAQ 0x0138
97 #define MANFID_COMPAQ2 0x0183 /* is this correct? */
98#endif
99
100#include <pcmcia/ds.h>
101
102/* Time in jiffies before concluding Tx hung */
103#define TX_TIMEOUT ((400*HZ)/1000)
104
105/****************
106 * Some constants used to access the hardware
107 */
108
109/* Register offsets and value constans */
110#define XIRCREG_CR 0 /* Command register (wr) */
111enum xirc_cr {
112 TransmitPacket = 0x01,
113 SoftReset = 0x02,
114 EnableIntr = 0x04,
115 ForceIntr = 0x08,
116 ClearTxFIFO = 0x10,
117 ClearRxOvrun = 0x20,
118 RestartTx = 0x40
119};
120#define XIRCREG_ESR 0 /* Ethernet status register (rd) */
121enum xirc_esr {
122 FullPktRcvd = 0x01, /* full packet in receive buffer */
123 PktRejected = 0x04, /* a packet has been rejected */
124 TxPktPend = 0x08, /* TX Packet Pending */
125 IncorPolarity = 0x10,
126 MediaSelect = 0x20 /* set if TP, clear if AUI */
127};
128#define XIRCREG_PR 1 /* Page Register select */
129#define XIRCREG_EDP 4 /* Ethernet Data Port Register */
130#define XIRCREG_ISR 6 /* Ethernet Interrupt Status Register */
131enum xirc_isr {
132 TxBufOvr = 0x01, /* TX Buffer Overflow */
133 PktTxed = 0x02, /* Packet Transmitted */
134 MACIntr = 0x04, /* MAC Interrupt occurred */
135 TxResGrant = 0x08, /* Tx Reservation Granted */
136 RxFullPkt = 0x20, /* Rx Full Packet */
137 RxPktRej = 0x40, /* Rx Packet Rejected */
138 ForcedIntr= 0x80 /* Forced Interrupt */
139};
140#define XIRCREG1_IMR0 12 /* Ethernet Interrupt Mask Register (on page 1)*/
141#define XIRCREG1_IMR1 13
142#define XIRCREG0_TSO 8 /* Transmit Space Open Register (on page 0)*/
143#define XIRCREG0_TRS 10 /* Transmit reservation Size Register (page 0)*/
144#define XIRCREG0_DO 12 /* Data Offset Register (page 0) (wr) */
145#define XIRCREG0_RSR 12 /* Receive Status Register (page 0) (rd) */
146enum xirc_rsr {
147 PhyPkt = 0x01, /* set:physical packet, clear: multicast packet */
148 BrdcstPkt = 0x02, /* set if it is a broadcast packet */
149 PktTooLong = 0x04, /* set if packet length > 1518 */
150 AlignErr = 0x10, /* incorrect CRC and last octet not complete */
151 CRCErr = 0x20, /* incorrect CRC and last octet is complete */
152 PktRxOk = 0x80 /* received ok */
153};
154#define XIRCREG0_PTR 13 /* packets transmitted register (rd) */
155#define XIRCREG0_RBC 14 /* receive byte count regsister (rd) */
156#define XIRCREG1_ECR 14 /* ethernet configurationn register */
157enum xirc_ecr {
158 FullDuplex = 0x04, /* enable full duplex mode */
159 LongTPMode = 0x08, /* adjust for longer lengths of TP cable */
160 DisablePolCor = 0x10,/* disable auto polarity correction */
161 DisableLinkPulse = 0x20, /* disable link pulse generation */
162 DisableAutoTx = 0x40, /* disable auto-transmit */
163};
164#define XIRCREG2_RBS 8 /* receive buffer start register */
165#define XIRCREG2_LED 10 /* LED Configuration register */
166/* values for the leds: Bits 2-0 for led 1
167 * 0 disabled Bits 5-3 for led 2
168 * 1 collision
169 * 2 noncollision
170 * 3 link_detected
171 * 4 incor_polarity
172 * 5 jabber
173 * 6 auto_assertion
174 * 7 rx_tx_activity
175 */
176#define XIRCREG2_MSR 12 /* Mohawk specific register */
177
178#define XIRCREG4_GPR0 8 /* General Purpose Register 0 */
179#define XIRCREG4_GPR1 9 /* General Purpose Register 1 */
180#define XIRCREG2_GPR2 13 /* General Purpose Register 2 (page2!)*/
181#define XIRCREG4_BOV 10 /* Bonding Version Register */
182#define XIRCREG4_LMA 12 /* Local Memory Address Register */
183#define XIRCREG4_LMD 14 /* Local Memory Data Port */
184/* MAC register can only by accessed with 8 bit operations */
185#define XIRCREG40_CMD0 8 /* Command Register (wr) */
186enum xirc_cmd { /* Commands */
187 Transmit = 0x01,
188 EnableRecv = 0x04,
189 DisableRecv = 0x08,
190 Abort = 0x10,
191 Online = 0x20,
192 IntrAck = 0x40,
193 Offline = 0x80
194};
195#define XIRCREG5_RHSA0 10 /* Rx Host Start Address */
196#define XIRCREG40_RXST0 9 /* Receive Status Register */
197#define XIRCREG40_TXST0 11 /* Transmit Status Register 0 */
198#define XIRCREG40_TXST1 12 /* Transmit Status Register 10 */
199#define XIRCREG40_RMASK0 13 /* Receive Mask Register */
200#define XIRCREG40_TMASK0 14 /* Transmit Mask Register 0 */
201#define XIRCREG40_TMASK1 15 /* Transmit Mask Register 0 */
202#define XIRCREG42_SWC0 8 /* Software Configuration 0 */
203#define XIRCREG42_SWC1 9 /* Software Configuration 1 */
204#define XIRCREG42_BOC 10 /* Back-Off Configuration */
205#define XIRCREG44_TDR0 8 /* Time Domain Reflectometry 0 */
206#define XIRCREG44_TDR1 9 /* Time Domain Reflectometry 1 */
207#define XIRCREG44_RXBC_LO 10 /* Rx Byte Count 0 (rd) */
208#define XIRCREG44_RXBC_HI 11 /* Rx Byte Count 1 (rd) */
209#define XIRCREG45_REV 15 /* Revision Register (rd) */
210#define XIRCREG50_IA 8 /* Individual Address (8-13) */
211
f71e1309 212static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
1da177e4 213
1da177e4
LT		 214/* card types */
215#define XIR_UNKNOWN 0 /* unknown: not supported */
216#define XIR_CE 1 /* (prodid 1) different hardware: not supported */
217#define XIR_CE2 2 /* (prodid 2) */
218#define XIR_CE3 3 /* (prodid 3) */
219#define XIR_CEM 4 /* (prodid 1) different hardware: not supported */
220#define XIR_CEM2 5 /* (prodid 2) */
221#define XIR_CEM3 6 /* (prodid 3) */
222#define XIR_CEM33 7 /* (prodid 4) */
223#define XIR_CEM56M 8 /* (prodid 5) */
224#define XIR_CEM56 9 /* (prodid 6) */
225#define XIR_CM28 10 /* (prodid 3) modem only: not supported here */
226#define XIR_CM33 11 /* (prodid 4) modem only: not supported here */
227#define XIR_CM56 12 /* (prodid 5) modem only: not supported here */
228#define XIR_CG 13 /* (prodid 1) GSM modem only: not supported */
229#define XIR_CBE 14 /* (prodid 1) cardbus ethernet: not supported */
230/*====================================================================*/
231
232/* Module parameters */
233
234MODULE_DESCRIPTION("Xircom PCMCIA ethernet driver");
235MODULE_LICENSE("Dual MPL/GPL");
236
237#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
238
239INT_MODULE_PARM(if_port, 0);
240INT_MODULE_PARM(full_duplex, 0);
241INT_MODULE_PARM(do_sound, 1);
242INT_MODULE_PARM(lockup_hack, 0); /* anti lockup hack */
243
244/*====================================================================*/
245
246/* We do not process more than these number of bytes during one
247 * interrupt. (Of course we receive complete packets, so this is not
248 * an exact value).
249 * Something between 2000..22000; first value gives best interrupt latency,
250 * the second enables the usage of the complete on-chip buffer. We use the
251 * high value as the initial value.
252 */
253static unsigned maxrx_bytes = 22000;
254
255/* MII management prototypes */
906da809
OJ		 256static void mii_idle(unsigned int ioaddr);
257static void mii_putbit(unsigned int ioaddr, unsigned data);
258static int mii_getbit(unsigned int ioaddr);
259static void mii_wbits(unsigned int ioaddr, unsigned data, int len);
260static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
261static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
1da177e4
LT		 262 unsigned data, int len);
263
fba395ee 264static int has_ce2_string(struct pcmcia_device * link);
15b99ac1 265static int xirc2ps_config(struct pcmcia_device * link);
fba395ee 266static void xirc2ps_release(struct pcmcia_device * link);
cc3b4866 267static void xirc2ps_detach(struct pcmcia_device *p_dev);
1da177e4 268
7d12e780 269static irqreturn_t xirc2ps_interrupt(int irq, void *dev_id);
1da177e4 270
1da177e4 271typedef struct local_info_t {
c4028958 272 struct net_device *dev;
fd238232 273 struct pcmcia_device *p_dev;
6394d7c9 274
1da177e4
LT		 275 int card_type;
276 int probe_port;
277 int silicon; /* silicon revision. 0=old CE2, 1=Scipper, 4=Mohawk */
278 int mohawk; /* a CE3 type card */
279 int dingo; /* a CEM56 type card */
280 int new_mii; /* has full 10baseT/100baseT MII */
281 int modem; /* is a multi function card (i.e with a modem) */
282 void __iomem *dingo_ccr; /* only used for CEM56 cards */
283 unsigned last_ptr_value; /* last packets transmitted value */
284 const char *manf_str;
9a469abe 285 struct work_struct tx_timeout_task;
1da177e4
LT		 286} local_info_t;
287
288/****************
289 * Some more prototypes
290 */
dbf02fae
SH		 291static netdev_tx_t do_start_xmit(struct sk_buff *skb,
292 struct net_device *dev);
ed4cb133 293static void xirc_tx_timeout(struct net_device *dev);
c4028958 294static void xirc2ps_tx_timeout_task(struct work_struct *work);
1da177e4
LT		 295static void set_addresses(struct net_device *dev);
296static void set_multicast_list(struct net_device *dev);
dddfbd82 297static int set_card_type(struct pcmcia_device *link);
1da177e4
LT		 298static int do_config(struct net_device *dev, struct ifmap *map);
299static int do_open(struct net_device *dev);
300static int do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
7282d491 301static const struct ethtool_ops netdev_ethtool_ops;
1da177e4
LT		 302static void hardreset(struct net_device *dev);
303static void do_reset(struct net_device *dev, int full);
304static int init_mii(struct net_device *dev);
305static void do_powerdown(struct net_device *dev);
306static int do_stop(struct net_device *dev);
307
308/*=============== Helper functions =========================*/
1da177e4
LT		 309#define SelectPage(pgnr) outb((pgnr), ioaddr + XIRCREG_PR)
310#define GetByte(reg) ((unsigned)inb(ioaddr + (reg)))
311#define GetWord(reg) ((unsigned)inw(ioaddr + (reg)))
312#define PutByte(reg,value) outb((value), ioaddr+(reg))
313#define PutWord(reg,value) outw((value), ioaddr+(reg))
314
315/*====== Functions used for debugging =================================*/
dd0fab5b 316#if 0 /* reading regs may change system status */
1da177e4
LT		 317static void
318PrintRegisters(struct net_device *dev)
319{
906da809 320 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 321
322 if (pc_debug > 1) {
323 int i, page;
324
636b8116 325 printk(KERN_DEBUG pr_fmt("Register common: "));
1da177e4 326 for (i = 0; i < 8; i++)
636b8116
JP		 327 pr_cont(" %2.2x", GetByte(i));
328 pr_cont("\n");
1da177e4 329 for (page = 0; page <= 8; page++) {
636b8116 330 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
1da177e4
LT		 331 SelectPage(page);
332 for (i = 8; i < 16; i++)
636b8116
JP		 333 pr_cont(" %2.2x", GetByte(i));
334 pr_cont("\n");
1da177e4
LT		 335 }
336 for (page=0x40 ; page <= 0x5f; page++) {
8e95a202
JP		 337 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) ||
338 (page >= 0x51 && page <=0x5e))
339 continue;
636b8116 340 printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
1da177e4
LT		 341 SelectPage(page);
342 for (i = 8; i < 16; i++)
636b8116
JP		 343 pr_cont(" %2.2x", GetByte(i));
344 pr_cont("\n");
1da177e4
LT		 345 }
346 }
347}
dd0fab5b 348#endif /* 0 */
1da177e4
LT		 349
350/*============== MII Management functions ===============*/
351
352/****************
353 * Turn around for read
354 */
355static void
906da809 356mii_idle(unsigned int ioaddr)
1da177e4
LT		 357{
358 PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */
359 udelay(1);
360 PutByte(XIRCREG2_GPR2, 0x04|1); /* and drive MDCK high */
361 udelay(1);
362}
363
364/****************
365 * Write a bit to MDI/O
366 */
367static void
906da809 368mii_putbit(unsigned int ioaddr, unsigned data)
1da177e4
LT		 369{
370 #if 1
371 if (data) {
372 PutByte(XIRCREG2_GPR2, 0x0c|2|0); /* set MDIO */
373 udelay(1);
374 PutByte(XIRCREG2_GPR2, 0x0c|2|1); /* and drive MDCK high */
375 udelay(1);
376 } else {
377 PutByte(XIRCREG2_GPR2, 0x0c|0|0); /* clear MDIO */
378 udelay(1);
379 PutByte(XIRCREG2_GPR2, 0x0c|0|1); /* and drive MDCK high */
380 udelay(1);
381 }
382 #else
383 if (data) {
384 PutWord(XIRCREG2_GPR2-1, 0x0e0e);
385 udelay(1);
386 PutWord(XIRCREG2_GPR2-1, 0x0f0f);
387 udelay(1);
388 } else {
389 PutWord(XIRCREG2_GPR2-1, 0x0c0c);
390 udelay(1);
391 PutWord(XIRCREG2_GPR2-1, 0x0d0d);
392 udelay(1);
393 }
394 #endif
395}
396
397/****************
398 * Get a bit from MDI/O
399 */
400static int
906da809 401mii_getbit(unsigned int ioaddr)
1da177e4
LT		 402{
403 unsigned d;
404
405 PutByte(XIRCREG2_GPR2, 4|0); /* drive MDCK low */
406 udelay(1);
407 d = GetByte(XIRCREG2_GPR2); /* read MDIO */
408 PutByte(XIRCREG2_GPR2, 4|1); /* drive MDCK high again */
409 udelay(1);
410 return d & 0x20; /* read MDIO */
411}
412
413static void
906da809 414mii_wbits(unsigned int ioaddr, unsigned data, int len)
1da177e4
LT		 415{
416 unsigned m = 1 << (len-1);
417 for (; m; m >>= 1)
418 mii_putbit(ioaddr, data & m);
419}
420
421static unsigned
906da809 422mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg)
1da177e4
LT		 423{
424 int i;
425 unsigned data=0, m;
426
427 SelectPage(2);
428 for (i=0; i < 32; i++) /* 32 bit preamble */
429 mii_putbit(ioaddr, 1);
430 mii_wbits(ioaddr, 0x06, 4); /* Start and opcode for read */
431 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
432 mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */
433 mii_idle(ioaddr); /* turn around */
434 mii_getbit(ioaddr);
435
436 for (m = 1<<15; m; m >>= 1)
437 if (mii_getbit(ioaddr))
438 data |= m;
439 mii_idle(ioaddr);
440 return data;
441}
442
443static void
906da809
OJ		 444mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data,
445 int len)
1da177e4
LT		 446{
447 int i;
448
449 SelectPage(2);
450 for (i=0; i < 32; i++) /* 32 bit preamble */
451 mii_putbit(ioaddr, 1);
452 mii_wbits(ioaddr, 0x05, 4); /* Start and opcode for write */
453 mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
454 mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */
455 mii_putbit(ioaddr, 1); /* turn around */
456 mii_putbit(ioaddr, 0);
457 mii_wbits(ioaddr, data, len); /* And write the data */
458 mii_idle(ioaddr);
459}
460
461/*============= Main bulk of functions =========================*/
462
0cd6e828
SH		 463static const struct net_device_ops netdev_ops = {
464 .ndo_open = do_open,
465 .ndo_stop = do_stop,
466 .ndo_start_xmit = do_start_xmit,
467 .ndo_tx_timeout = xirc_tx_timeout,
468 .ndo_set_config = do_config,
469 .ndo_do_ioctl = do_ioctl,
470 .ndo_set_multicast_list = set_multicast_list,
471 .ndo_change_mtu = eth_change_mtu,
472 .ndo_set_mac_address = eth_mac_addr,
473 .ndo_validate_addr = eth_validate_addr,
474};
475
f8cfa618 476static int
15b99ac1 477xirc2ps_probe(struct pcmcia_device *link)
1da177e4 478{
1da177e4
LT		 479 struct net_device *dev;
480 local_info_t *local;
1da177e4 481
dd0fab5b 482 dev_dbg(&link->dev, "attach()\n");
1da177e4
LT		 483
484 /* Allocate the device structure */
485 dev = alloc_etherdev(sizeof(local_info_t));
486 if (!dev)
f8cfa618 487 return -ENOMEM;
1da177e4 488 local = netdev_priv(dev);
c4028958 489 local->dev = dev;
fba395ee 490 local->p_dev = link;
1da177e4
LT		 491 link->priv = dev;
492
493 /* General socket configuration */
7feabb64 494 link->config_index = 1;
1da177e4
LT		 495
496 /* Fill in card specific entries */
0cd6e828
SH		 497 dev->netdev_ops = &netdev_ops;
498 dev->ethtool_ops = &netdev_ethtool_ops;
1da177e4 499 dev->watchdog_timeo = TX_TIMEOUT;
c4028958 500 INIT_WORK(&local->tx_timeout_task, xirc2ps_tx_timeout_task);
1da177e4 501
15b99ac1 502 return xirc2ps_config(link);
1da177e4
LT		 503} /* xirc2ps_attach */
504
1da177e4 505static void
fba395ee 506xirc2ps_detach(struct pcmcia_device *link)
1da177e4
LT		 507{
508 struct net_device *dev = link->priv;
1da177e4 509
dd0fab5b 510 dev_dbg(&link->dev, "detach\n");
1da177e4 511
c7c2fa07 512 unregister_netdev(dev);
1da177e4 513
e2d40963 514 xirc2ps_release(link);
1da177e4 515
1da177e4
LT		 516 free_netdev(dev);
517} /* xirc2ps_detach */
518
519/****************
520 * Detect the type of the card. s is the buffer with the data of tuple 0x20
521 * Returns: 0 := not supported
522 * mediaid=11 and prodid=47
523 * Media-Id bits:
524 * Ethernet 0x01
525 * Tokenring 0x02
526 * Arcnet 0x04
527 * Wireless 0x08
528 * Modem 0x10
529 * GSM only 0x20
530 * Prod-Id bits:
531 * Pocket 0x10
532 * External 0x20
533 * Creditcard 0x40
534 * Cardbus 0x80
535 *
536 */
537static int
dddfbd82 538set_card_type(struct pcmcia_device *link)
1da177e4
LT		 539{
540 struct net_device *dev = link->priv;
541 local_info_t *local = netdev_priv(dev);
dddfbd82
DB		 542 u8 *buf;
543 unsigned int cisrev, mediaid, prodid;
544 size_t len;
545
546 len = pcmcia_get_tuple(link, CISTPL_MANFID, &buf);
547 if (len < 5) {
548 dev_err(&link->dev, "invalid CIS -- sorry\n");
549 return 0;
550 }
1da177e4 551
dddfbd82
DB		 552 cisrev = buf[2];
553 mediaid = buf[3];
554 prodid = buf[4];
1da177e4 555
dd0fab5b 556 dev_dbg(&link->dev, "cisrev=%02x mediaid=%02x prodid=%02x\n",
1da177e4
LT		 557 cisrev, mediaid, prodid);
558
559 local->mohawk = 0;
560 local->dingo = 0;
561 local->modem = 0;
562 local->card_type = XIR_UNKNOWN;
563 if (!(prodid & 0x40)) {
636b8116 564 pr_notice("Oops: Not a creditcard\n");
1da177e4
LT		 565 return 0;
566 }
567 if (!(mediaid & 0x01)) {
636b8116 568 pr_notice("Not an Ethernet card\n");
1da177e4
LT		 569 return 0;
570 }
571 if (mediaid & 0x10) {
572 local->modem = 1;
573 switch(prodid & 15) {
574 case 1: local->card_type = XIR_CEM ; break;
575 case 2: local->card_type = XIR_CEM2 ; break;
576 case 3: local->card_type = XIR_CEM3 ; break;
577 case 4: local->card_type = XIR_CEM33 ; break;
578 case 5: local->card_type = XIR_CEM56M;
579 local->mohawk = 1;
580 break;
581 case 6:
582 case 7: /* 7 is the RealPort 10/56 */
583 local->card_type = XIR_CEM56 ;
584 local->mohawk = 1;
585 local->dingo = 1;
586 break;
587 }
588 } else {
589 switch(prodid & 15) {
590 case 1: local->card_type = has_ce2_string(link)? XIR_CE2 : XIR_CE ;
591 break;
592 case 2: local->card_type = XIR_CE2; break;
593 case 3: local->card_type = XIR_CE3;
594 local->mohawk = 1;
595 break;
596 }
597 }
598 if (local->card_type == XIR_CE || local->card_type == XIR_CEM) {
636b8116 599 pr_notice("Sorry, this is an old CE card\n");
1da177e4
LT		 600 return 0;
601 }
602 if (local->card_type == XIR_UNKNOWN)
636b8116 603 pr_notice("unknown card (mediaid=%02x prodid=%02x)\n", mediaid, prodid);
1da177e4
LT		 604
605 return 1;
606}
607
608/****************
609 * There are some CE2 cards out which claim to be a CE card.
610 * This function looks for a "CE2" in the 3rd version field.
611 * Returns: true if this is a CE2
612 */
613static int
a9606fd3 614has_ce2_string(struct pcmcia_device * p_dev)
1da177e4 615{
a9606fd3
DB		 616 if (p_dev->prod_id[2] && strstr(p_dev->prod_id[2], "CE2"))
617 return 1;
618 return 0;
1da177e4
LT		 619}
620
b54bf94b 621static int
00990e7c 622xirc2ps_config_modem(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b
DB		 623{
624 unsigned int ioaddr;
625
00990e7c
DB		 626 if ((p_dev->resource[0]->start & 0xf) == 8)
627 return -ENODEV;
628
629 p_dev->resource[0]->end = 16;
630 p_dev->resource[1]->end = 8;
631 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
632 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
633 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
634 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
635 p_dev->io_lines = 10;
636
637 p_dev->resource[1]->start = p_dev->resource[0]->start;
638 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
639 p_dev->resource[0]->start = ioaddr;
640 if (!pcmcia_request_io(p_dev))
641 return 0;
b54bf94b
DB		 642 }
643 return -ENODEV;
644}
645
646static int
00990e7c 647xirc2ps_config_check(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b
DB		 648{
649 int *pass = priv_data;
00990e7c 650 resource_size_t tmp = p_dev->resource[1]->start;
b54bf94b 651
00990e7c
DB		 652 tmp += (*pass ? (p_dev->config_index & 0x20 ? -24 : 8)
653 : (p_dev->config_index & 0x20 ? 8 : -24));
654
655 if ((p_dev->resource[0]->start & 0xf) == 8)
656 return -ENODEV;
657
658 p_dev->resource[0]->end = 18;
659 p_dev->resource[1]->end = 8;
660 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
661 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
662 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
663 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
664 p_dev->io_lines = 10;
b54bf94b 665
00990e7c
DB		 666 p_dev->resource[1]->start = p_dev->resource[0]->start;
667 p_dev->resource[0]->start = tmp;
668 return pcmcia_request_io(p_dev);
b54bf94b
DB		 669}
670
dddfbd82
DB		 671
672static int pcmcia_get_mac_ce(struct pcmcia_device *p_dev,
673 tuple_t *tuple,
674 void *priv)
675{
676 struct net_device *dev = priv;
677 int i;
678
679 if (tuple->TupleDataLen != 13)
680 return -EINVAL;
681 if ((tuple->TupleData[0] != 2) || (tuple->TupleData[1] != 1) ||
682 (tuple->TupleData[2] != 6))
683 return -EINVAL;
684 /* another try (James Lehmer's CE2 version 4.1)*/
685 for (i = 2; i < 6; i++)
686 dev->dev_addr[i] = tuple->TupleData[i+2];
687 return 0;
688};
689
690
15b99ac1 691static int
fba395ee 692xirc2ps_config(struct pcmcia_device * link)
1da177e4 693{
1da177e4
LT		 694 struct net_device *dev = link->priv;
695 local_info_t *local = netdev_priv(dev);
b54bf94b 696 unsigned int ioaddr;
dddfbd82
DB		 697 int err;
698 u8 *buf;
699 size_t len;
1da177e4
LT		 700
701 local->dingo_ccr = NULL;
702
dd0fab5b 703 dev_dbg(&link->dev, "config\n");
1da177e4
LT		 704
705 /* Is this a valid card */
7d2e8d00 706 if (link->has_manf_id == 0) {
636b8116 707 pr_notice("manfid not found in CIS\n");
1da177e4
LT		 708 goto failure;
709 }
710
7d2e8d00 711 switch (link->manf_id) {
1da177e4
LT		 712 case MANFID_XIRCOM:
713 local->manf_str = "Xircom";
714 break;
715 case MANFID_ACCTON:
716 local->manf_str = "Accton";
717 break;
718 case MANFID_COMPAQ:
719 case MANFID_COMPAQ2:
720 local->manf_str = "Compaq";
721 break;
722 case MANFID_INTEL:
723 local->manf_str = "Intel";
724 break;
725 case MANFID_TOSHIBA:
726 local->manf_str = "Toshiba";
727 break;
728 default:
636b8116
JP		 729 pr_notice("Unknown Card Manufacturer ID: 0x%04x\n",
730 (unsigned)link->manf_id);
1da177e4
LT		 731 goto failure;
732 }
dd0fab5b 733 dev_dbg(&link->dev, "found %s card\n", local->manf_str);
1da177e4 734
dddfbd82 735 if (!set_card_type(link)) {
636b8116 736 pr_notice("this card is not supported\n");
1da177e4
LT		 737 goto failure;
738 }
739
1da177e4 740 /* get the ethernet address from the CIS */
dddfbd82
DB		 741 err = pcmcia_get_mac_from_cis(link, dev);
742
743 /* not found: try to get the node-id from tuple 0x89 */
744 if (err) {
745 len = pcmcia_get_tuple(link, 0x89, &buf);
746 /* data layout looks like tuple 0x22 */
747 if (buf && len == 8) {
748 if (*buf == CISTPL_FUNCE_LAN_NODE_ID) {
749 int i;
750 for (i = 2; i < 6; i++)
751 dev->dev_addr[i] = buf[i+2];
752 } else
753 err = -1;
1da177e4 754 }
dddfbd82 755 kfree(buf);
1da177e4 756 }
dddfbd82
DB		 757
758 if (err)
759 err = pcmcia_loop_tuple(link, CISTPL_FUNCE, pcmcia_get_mac_ce, dev);
760
1da177e4 761 if (err) {
636b8116 762 pr_notice("node-id not found in CIS\n");
1da177e4
LT		 763 goto failure;
764 }
1da177e4 765
1da177e4
LT		 766 if (local->modem) {
767 int pass;
00990e7c 768 link->config_flags |= CONF_AUTO_SET_IO;
1da177e4 769
1da177e4
LT		 770 if (local->dingo) {
771 /* Take the Modem IO port from the CIS and scan for a free
772 * Ethernet port */
b54bf94b
DB		 773 if (!pcmcia_loop_config(link, xirc2ps_config_modem, NULL))
774 goto port_found;
1da177e4 775 } else {
1da177e4
LT		 776 /* We do 2 passes here: The first one uses the regular mapping and
777 * the second tries again, thereby considering that the 32 ports are
778 * mirrored every 32 bytes. Actually we use a mirrored port for
779 * the Mako if (on the first pass) the COR bit 5 is set.
780 */
b54bf94b 781 for (pass=0; pass < 2; pass++)
440eed43
DB		 782 if (!pcmcia_loop_config(link, xirc2ps_config_check,
783 &pass))
1da177e4 784 goto port_found;
1da177e4
LT		 785 /* if special option:
786 * try to configure as Ethernet only.
787 * .... */
788 }
636b8116 789 pr_notice("no ports available\n");
1da177e4 790 } else {
00990e7c 791 link->io_lines = 10;
90abdc3b 792 link->resource[0]->end = 16;
00990e7c 793 link->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
1da177e4 794 for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
90abdc3b
DB		 795 link->resource[0]->start = ioaddr;
796 if (!(err = pcmcia_request_io(link)))
1da177e4
LT		 797 goto port_found;
798 }
90abdc3b
DB		 799 link->resource[0]->start = 0; /* let CS decide */
800 if ((err = pcmcia_request_io(link)))
1da177e4 801 goto config_error;
1da177e4
LT		 802 }
803 port_found:
804 if (err)
805 goto config_error;
806
807 /****************
808 * Now allocate an interrupt line. Note that this does not
809 * actually assign a handler to the interrupt.
810 */
eb14120f 811 if ((err=pcmcia_request_irq(link, xirc2ps_interrupt)))
1da177e4 812 goto config_error;
1da177e4 813
1ac71e5a
DB		 814 link->config_flags |= CONF_ENABLE_IRQ;
815 if (do_sound)
816 link->config_flags |= CONF_ENABLE_SPKR;
817
818 if ((err = pcmcia_enable_device(link)))
1da177e4 819 goto config_error;
1da177e4
LT		 820
821 if (local->dingo) {
1da177e4
LT		 822 /* Reset the modem's BAR to the correct value
823 * This is necessary because in the RequestConfiguration call,
824 * the base address of the ethernet port (BasePort1) is written
825 * to the BAR registers of the modem.
826 */
9a017a91
DB		 827 err = pcmcia_write_config_byte(link, CISREG_IOBASE_0, (u8)
828 link->resource[1]->start & 0xff);
1d5cc192 829 if (err)
1da177e4 830 goto config_error;
1d5cc192
DB		 831
832 err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
9a017a91 833 (link->resource[1]->start >> 8) & 0xff);
1d5cc192 834 if (err)
1da177e4 835 goto config_error;
1da177e4
LT		 836
837 /* There is no config entry for the Ethernet part which
838 * is at 0x0800. So we allocate a window into the attribute
839 * memory and write direct to the CIS registers
840 */
cdb13808
DB		 841 link->resource[2]->flags = WIN_DATA_WIDTH_8 | WIN_MEMORY_TYPE_AM |
842 WIN_ENABLE;
843 link->resource[2]->start = link->resource[2]->end = 0;
844 if ((err = pcmcia_request_window(link, link->resource[2], 0)))
1da177e4 845 goto config_error;
dd0fab5b 846
cdb13808
DB		 847 local->dingo_ccr = ioremap(link->resource[2]->start, 0x1000) + 0x0800;
848 if ((err = pcmcia_map_mem_page(link, link->resource[2], 0)))
1da177e4 849 goto config_error;
1da177e4
LT		 850
851 /* Setup the CCRs; there are no infos in the CIS about the Ethernet
852 * part.
853 */
854 writeb(0x47, local->dingo_ccr + CISREG_COR);
9a017a91 855 ioaddr = link->resource[0]->start;
1da177e4
LT		 856 writeb(ioaddr & 0xff , local->dingo_ccr + CISREG_IOBASE_0);
857 writeb((ioaddr >> 8)&0xff , local->dingo_ccr + CISREG_IOBASE_1);
858
859 #if 0
860 {
861 u_char tmp;
636b8116 862 pr_info("ECOR:");
1da177e4
LT		 863 for (i=0; i < 7; i++) {
864 tmp = readb(local->dingo_ccr + i*2);
636b8116 865 pr_cont(" %02x", tmp);
1da177e4 866 }
636b8116
JP		 867 pr_cont("\n");
868 pr_info("DCOR:");
1da177e4
LT		 869 for (i=0; i < 4; i++) {
870 tmp = readb(local->dingo_ccr + 0x20 + i*2);
636b8116 871 pr_cont(" %02x", tmp);
1da177e4 872 }
636b8116
JP		 873 pr_cont("\n");
874 pr_info("SCOR:");
1da177e4
LT		 875 for (i=0; i < 10; i++) {
876 tmp = readb(local->dingo_ccr + 0x40 + i*2);
636b8116 877 pr_cont(" %02x", tmp);
1da177e4 878 }
636b8116 879 pr_cont("\n");
1da177e4
LT		 880 }
881 #endif
882
883 writeb(0x01, local->dingo_ccr + 0x20);
884 writeb(0x0c, local->dingo_ccr + 0x22);
885 writeb(0x00, local->dingo_ccr + 0x24);
886 writeb(0x00, local->dingo_ccr + 0x26);
887 writeb(0x00, local->dingo_ccr + 0x28);
888 }
889
890 /* The if_port symbol can be set when the module is loaded */
891 local->probe_port=0;
892 if (!if_port) {
893 local->probe_port = dev->if_port = 1;
894 } else if ((if_port >= 1 && if_port <= 2) ||
895 (local->mohawk && if_port==4))
896 dev->if_port = if_port;
897 else
636b8116 898 pr_notice("invalid if_port requested\n");
1da177e4
LT		 899
900 /* we can now register the device with the net subsystem */
eb14120f 901 dev->irq = link->irq;
9a017a91 902 dev->base_addr = link->resource[0]->start;
1da177e4
LT		 903
904 if (local->dingo)
905 do_reset(dev, 1); /* a kludge to make the cem56 work */
906
dd2e5a15 907 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 908
909 if ((err=register_netdev(dev))) {
636b8116 910 pr_notice("register_netdev() failed\n");
1da177e4
LT		 911 goto config_error;
912 }
913
1da177e4 914 /* give some infos about the hardware */
636b8116
JP		 915 netdev_info(dev, "%s: port %#3lx, irq %d, hwaddr %pM\n",
916 local->manf_str, (u_long)dev->base_addr, (int)dev->irq,
917 dev->dev_addr);
1da177e4 918
15b99ac1 919 return 0;
1da177e4
LT		 920
921 config_error:
1da177e4 922 xirc2ps_release(link);
15b99ac1 923 return -ENODEV;
1da177e4 924
1da177e4 925 failure:
15b99ac1 926 return -ENODEV;
1da177e4
LT		 927} /* xirc2ps_config */
928
1da177e4 929static void
fba395ee 930xirc2ps_release(struct pcmcia_device *link)
1da177e4 931{
dd0fab5b 932 dev_dbg(&link->dev, "release\n");
1da177e4 933
cdb13808 934 if (link->resource[2]->end) {
5f2a71fc
DB		 935 struct net_device *dev = link->priv;
936 local_info_t *local = netdev_priv(dev);
937 if (local->dingo)
938 iounmap(local->dingo_ccr - 0x0800);
939 }
fba395ee 940 pcmcia_disable_device(link);
1da177e4
LT		 941} /* xirc2ps_release */
942
943/*====================================================================*/
944
98e4c28b 945
fba395ee 946static int xirc2ps_suspend(struct pcmcia_device *link)
98e4c28b 947{
98e4c28b
DB		 948 struct net_device *dev = link->priv;
949
e2d40963
DB		 950 if (link->open) {
951 netif_device_detach(dev);
952 do_powerdown(dev);
98e4c28b
DB		 953 }
954
955 return 0;
956}
957
fba395ee 958static int xirc2ps_resume(struct pcmcia_device *link)
98e4c28b 959{
98e4c28b
DB		 960 struct net_device *dev = link->priv;
961
e2d40963 962 if (link->open) {
8661bb5b
DB		 963 do_reset(dev,1);
964 netif_device_attach(dev);
98e4c28b
DB		 965 }
966
967 return 0;
968}
969
1da177e4
LT		 970
971/*====================================================================*/
972
973/****************
974 * This is the Interrupt service route.
975 */
976static irqreturn_t
7d12e780 977xirc2ps_interrupt(int irq, void *dev_id)
1da177e4
LT		 978{
979 struct net_device *dev = (struct net_device *)dev_id;
980 local_info_t *lp = netdev_priv(dev);
906da809 981 unsigned int ioaddr;
1da177e4
LT		 982 u_char saved_page;
983 unsigned bytes_rcvd;
984 unsigned int_status, eth_status, rx_status, tx_status;
985 unsigned rsr, pktlen;
986 ulong start_ticks = jiffies; /* fixme: jiffies rollover every 497 days
987 * is this something to worry about?
988 * -- on a laptop?
989 */
990
991 if (!netif_device_present(dev))
992 return IRQ_HANDLED;
993
994 ioaddr = dev->base_addr;
995 if (lp->mohawk) { /* must disable the interrupt */
996 PutByte(XIRCREG_CR, 0);
997 }
998
dd0fab5b 999 pr_debug("%s: interrupt %d at %#x.\n", dev->name, irq, ioaddr);
1da177e4
LT		 1000
1001 saved_page = GetByte(XIRCREG_PR);
1002 /* Read the ISR to see whats the cause for the interrupt.
1003 * This also clears the interrupt flags on CE2 cards
1004 */
1005 int_status = GetByte(XIRCREG_ISR);
1006 bytes_rcvd = 0;
1007 loop_entry:
1008 if (int_status == 0xff) { /* card may be ejected */
dd0fab5b 1009 pr_debug("%s: interrupt %d for dead card\n", dev->name, irq);
1da177e4
LT		 1010 goto leave;
1011 }
1012 eth_status = GetByte(XIRCREG_ESR);
1013
1014 SelectPage(0x40);
1015 rx_status = GetByte(XIRCREG40_RXST0);
1016 PutByte(XIRCREG40_RXST0, (~rx_status & 0xff));
1017 tx_status = GetByte(XIRCREG40_TXST0);
1018 tx_status |= GetByte(XIRCREG40_TXST1) << 8;
1019 PutByte(XIRCREG40_TXST0, 0);
1020 PutByte(XIRCREG40_TXST1, 0);
1021
dd0fab5b 1022 pr_debug("%s: ISR=%#2.2x ESR=%#2.2x RSR=%#2.2x TSR=%#4.4x\n",
1da177e4
LT		 1023 dev->name, int_status, eth_status, rx_status, tx_status);
1024
1025 /***** receive section ******/
1026 SelectPage(0);
1027 while (eth_status & FullPktRcvd) {
1028 rsr = GetByte(XIRCREG0_RSR);
1029 if (bytes_rcvd > maxrx_bytes && (rsr & PktRxOk)) {
1030 /* too many bytes received during this int, drop the rest of the
1031 * packets */
6394d7c9 1032 dev->stats.rx_dropped++;
dd0fab5b 1033 pr_debug("%s: RX drop, too much done\n", dev->name);
1da177e4
LT		 1034 } else if (rsr & PktRxOk) {
1035 struct sk_buff *skb;
1036
1037 pktlen = GetWord(XIRCREG0_RBC);
1038 bytes_rcvd += pktlen;
1039
dd0fab5b 1040 pr_debug("rsr=%#02x packet_length=%u\n", rsr, pktlen);
1da177e4
LT		 1041
1042 skb = dev_alloc_skb(pktlen+3); /* 1 extra so we can use insw */
1043 if (!skb) {
636b8116 1044 pr_notice("low memory, packet dropped (size=%u)\n", pktlen);
6394d7c9 1045 dev->stats.rx_dropped++;
1da177e4
LT		 1046 } else { /* okay get the packet */
1047 skb_reserve(skb, 2);
1048 if (lp->silicon == 0 ) { /* work around a hardware bug */
1049 unsigned rhsa; /* receive start address */
1050
1051 SelectPage(5);
1052 rhsa = GetWord(XIRCREG5_RHSA0);
1053 SelectPage(0);
1054 rhsa += 3; /* skip control infos */
1055 if (rhsa >= 0x8000)
1056 rhsa = 0;
1057 if (rhsa + pktlen > 0x8000) {
1058 unsigned i;
1059 u_char *buf = skb_put(skb, pktlen);
1060 for (i=0; i < pktlen ; i++, rhsa++) {
1061 buf[i] = GetByte(XIRCREG_EDP);
1062 if (rhsa == 0x8000) {
1063 rhsa = 0;
1064 i--;
1065 }
1066 }
1067 } else {
1068 insw(ioaddr+XIRCREG_EDP,
1069 skb_put(skb, pktlen), (pktlen+1)>>1);
1070 }
1071 }
1072 #if 0
1073 else if (lp->mohawk) {
1074 /* To use this 32 bit access we should use
1075 * a manual optimized loop
1076 * Also the words are swapped, we can get more
1077 * performance by using 32 bit access and swapping
1078 * the words in a register. Will need this for cardbus
1079 *
1080 * Note: don't forget to change the ALLOC_SKB to .. +3
1081 */
1082 unsigned i;
1083 u_long *p = skb_put(skb, pktlen);
1084 register u_long a;
906da809 1085 unsigned int edpreg = ioaddr+XIRCREG_EDP-2;
1da177e4
LT		 1086 for (i=0; i < len ; i += 4, p++) {
1087 a = inl(edpreg);
1088 __asm__("rorl $16,%0\n\t"
1089 :"=q" (a)
1090 : "0" (a));
1091 *p = a;
1092 }
1093 }
1094 #endif
1095 else {
1096 insw(ioaddr+XIRCREG_EDP, skb_put(skb, pktlen),
1097 (pktlen+1)>>1);
1098 }
1099 skb->protocol = eth_type_trans(skb, dev);
1da177e4 1100 netif_rx(skb);
6394d7c9
SH		 1101 dev->stats.rx_packets++;
1102 dev->stats.rx_bytes += pktlen;
1da177e4 1103 if (!(rsr & PhyPkt))
6394d7c9 1104 dev->stats.multicast++;
1da177e4
LT		 1105 }
1106 } else { /* bad packet */
dd0fab5b 1107 pr_debug("rsr=%#02x\n", rsr);
1da177e4
LT		 1108 }
1109 if (rsr & PktTooLong) {
6394d7c9 1110 dev->stats.rx_frame_errors++;
dd0fab5b 1111 pr_debug("%s: Packet too long\n", dev->name);
1da177e4
LT		 1112 }
1113 if (rsr & CRCErr) {
6394d7c9 1114 dev->stats.rx_crc_errors++;
dd0fab5b 1115 pr_debug("%s: CRC error\n", dev->name);
1da177e4
LT		 1116 }
1117 if (rsr & AlignErr) {
6394d7c9 1118 dev->stats.rx_fifo_errors++; /* okay ? */
dd0fab5b 1119 pr_debug("%s: Alignment error\n", dev->name);
1da177e4
LT		 1120 }
1121
1122 /* clear the received/dropped/error packet */
1123 PutWord(XIRCREG0_DO, 0x8000); /* issue cmd: skip_rx_packet */
1124
1125 /* get the new ethernet status */
1126 eth_status = GetByte(XIRCREG_ESR);
1127 }
1128 if (rx_status & 0x10) { /* Receive overrun */
6394d7c9 1129 dev->stats.rx_over_errors++;
1da177e4 1130 PutByte(XIRCREG_CR, ClearRxOvrun);
dd0fab5b 1131 pr_debug("receive overrun cleared\n");
1da177e4
LT		 1132 }
1133
1134 /***** transmit section ******/
1135 if (int_status & PktTxed) {
1136 unsigned n, nn;
1137
1138 n = lp->last_ptr_value;
1139 nn = GetByte(XIRCREG0_PTR);
1140 lp->last_ptr_value = nn;
1141 if (nn < n) /* rollover */
6394d7c9 1142 dev->stats.tx_packets += 256 - n;
1da177e4 1143 else if (n == nn) { /* happens sometimes - don't know why */
dd0fab5b 1144 pr_debug("PTR not changed?\n");
1da177e4 1145 } else
6394d7c9 1146 dev->stats.tx_packets += lp->last_ptr_value - n;
1da177e4
LT		 1147 netif_wake_queue(dev);
1148 }
1149 if (tx_status & 0x0002) { /* Execessive collissions */
dd0fab5b 1150 pr_debug("tx restarted due to execssive collissions\n");
1da177e4
LT		 1151 PutByte(XIRCREG_CR, RestartTx); /* restart transmitter process */
1152 }
1153 if (tx_status & 0x0040)
6394d7c9 1154 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1155
1156 /* recalculate our work chunk so that we limit the duration of this
1157 * ISR to about 1/10 of a second.
1158 * Calculate only if we received a reasonable amount of bytes.
1159 */
1160 if (bytes_rcvd > 1000) {
1161 u_long duration = jiffies - start_ticks;
1162
1163 if (duration >= HZ/10) { /* if more than about 1/10 second */
1164 maxrx_bytes = (bytes_rcvd * (HZ/10)) / duration;
1165 if (maxrx_bytes < 2000)
1166 maxrx_bytes = 2000;
1167 else if (maxrx_bytes > 22000)
1168 maxrx_bytes = 22000;
dd0fab5b 1169 pr_debug("set maxrx=%u (rcvd=%u ticks=%lu)\n",
1da177e4
LT		 1170 maxrx_bytes, bytes_rcvd, duration);
1171 } else if (!duration && maxrx_bytes < 22000) {
1172 /* now much faster */
1173 maxrx_bytes += 2000;
1174 if (maxrx_bytes > 22000)
1175 maxrx_bytes = 22000;
dd0fab5b 1176 pr_debug("set maxrx=%u\n", maxrx_bytes);
1da177e4
LT		 1177 }
1178 }
1179
1180 leave:
1181 if (lockup_hack) {
1182 if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)
1183 goto loop_entry;
1184 }
1185 SelectPage(saved_page);
1186 PutByte(XIRCREG_CR, EnableIntr); /* re-enable interrupts */
1187 /* Instead of dropping packets during a receive, we could
1188 * force an interrupt with this command:
1189 * PutByte(XIRCREG_CR, EnableIntr|ForceIntr);
1190 */
1191 return IRQ_HANDLED;
1192} /* xirc2ps_interrupt */
1193
1194/*====================================================================*/
1195
1196static void
c4028958 1197xirc2ps_tx_timeout_task(struct work_struct *work)
1da177e4 1198{
c4028958
DH		 1199 local_info_t *local =
1200 container_of(work, local_info_t, tx_timeout_task);
1201 struct net_device *dev = local->dev;
1da177e4
LT		 1202 /* reset the card */
1203 do_reset(dev,1);
1ae5dc34 1204 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT		 1205 netif_wake_queue(dev);
1206}
1207
9a469abe 1208static void
ed4cb133 1209xirc_tx_timeout(struct net_device *dev)
9a469abe
JA		 1210{
1211 local_info_t *lp = netdev_priv(dev);
6394d7c9 1212 dev->stats.tx_errors++;
636b8116 1213 netdev_notice(dev, "transmit timed out\n");
9a469abe
JA		 1214 schedule_work(&lp->tx_timeout_task);
1215}
1216
dbf02fae 1217static netdev_tx_t
1da177e4
LT		 1218do_start_xmit(struct sk_buff *skb, struct net_device *dev)
1219{
1220 local_info_t *lp = netdev_priv(dev);
906da809 1221 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1222 int okay;
1223 unsigned freespace;
da4f5ccf 1224 unsigned pktlen = skb->len;
1da177e4 1225
dd0fab5b 1226 pr_debug("do_start_xmit(skb=%p, dev=%p) len=%u\n",
1da177e4
LT		 1227 skb, dev, pktlen);
1228
1229
1230 /* adjust the packet length to min. required
1231 * and hope that the buffer is large enough
1232 * to provide some random data.
1233 * fixme: For Mohawk we can change this by sending
1234 * a larger packetlen than we actually have; the chip will
1235 * pad this in his buffer with random bytes
1236 */
1237 if (pktlen < ETH_ZLEN)
1238 {
5b057c6b 1239 if (skb_padto(skb, ETH_ZLEN))
6ed10654 1240 return NETDEV_TX_OK;
1da177e4
LT		 1241 pktlen = ETH_ZLEN;
1242 }
1243
1244 netif_stop_queue(dev);
1245 SelectPage(0);
1246 PutWord(XIRCREG0_TRS, (u_short)pktlen+2);
1247 freespace = GetWord(XIRCREG0_TSO);
1248 okay = freespace & 0x8000;
1249 freespace &= 0x7fff;
1250 /* TRS doesn't work - (indeed it is eliminated with sil-rev 1) */
1251 okay = pktlen +2 < freespace;
dd0fab5b 1252 pr_debug("%s: avail. tx space=%u%s\n",
1da177e4
LT		 1253 dev->name, freespace, okay ? " (okay)":" (not enough)");
1254 if (!okay) { /* not enough space */
5b548140 1255 return NETDEV_TX_BUSY; /* upper layer may decide to requeue this packet */
1da177e4
LT		 1256 }
1257 /* send the packet */
1258 PutWord(XIRCREG_EDP, (u_short)pktlen);
1259 outsw(ioaddr+XIRCREG_EDP, skb->data, pktlen>>1);
1260 if (pktlen & 1)
1261 PutByte(XIRCREG_EDP, skb->data[pktlen-1]);
1262
1263 if (lp->mohawk)
1264 PutByte(XIRCREG_CR, TransmitPacket|EnableIntr);
1265
1266 dev_kfree_skb (skb);
6394d7c9 1267 dev->stats.tx_bytes += pktlen;
1da177e4 1268 netif_start_queue(dev);
6ed10654 1269 return NETDEV_TX_OK;
1da177e4
LT		 1270}
1271
91fea585
JP		 1272struct set_address_info {
1273 int reg_nr;
1274 int page_nr;
1275 int mohawk;
1276 unsigned int ioaddr;
1277};
1278
1279static void set_address(struct set_address_info *sa_info, char *addr)
1280{
1281 unsigned int ioaddr = sa_info->ioaddr;
1282 int i;
1283
1284 for (i = 0; i < 6; i++) {
1285 if (sa_info->reg_nr > 15) {
1286 sa_info->reg_nr = 8;
1287 sa_info->page_nr++;
1288 SelectPage(sa_info->page_nr);
1289 }
1290 if (sa_info->mohawk)
1291 PutByte(sa_info->reg_nr++, addr[5 - i]);
1292 else
1293 PutByte(sa_info->reg_nr++, addr[i]);
1294 }
1295}
1296
1da177e4
LT		 1297/****************
1298 * Set all addresses: This first one is the individual address,
1299 * the next 9 addresses are taken from the multicast list and
1300 * the rest is filled with the individual address.
1301 */
91fea585 1302static void set_addresses(struct net_device *dev)
1da177e4 1303{
91fea585
JP		 1304 unsigned int ioaddr = dev->base_addr;
1305 local_info_t *lp = netdev_priv(dev);
22bedad3 1306 struct netdev_hw_addr *ha;
91fea585
JP		 1307 struct set_address_info sa_info;
1308 int i;
1da177e4 1309
91fea585
JP		 1310 /*
1311 * Setup the info structure so that by first set_address call it will do
1312 * SelectPage with the right page number. Hence these ones here.
1313 */
1314 sa_info.reg_nr = 15 + 1;
1315 sa_info.page_nr = 0x50 - 1;
1316 sa_info.mohawk = lp->mohawk;
1317 sa_info.ioaddr = ioaddr;
1318
1319 set_address(&sa_info, dev->dev_addr);
1320 i = 0;
22bedad3 1321 netdev_for_each_mc_addr(ha, dev) {
91fea585
JP		 1322 if (i++ == 9)
1323 break;
22bedad3 1324 set_address(&sa_info, ha->addr);
91fea585
JP		 1325 }
1326 while (i++ < 9)
1327 set_address(&sa_info, dev->dev_addr);
1328 SelectPage(0);
1da177e4
LT		 1329}
1330
1331/****************
1332 * Set or clear the multicast filter for this adaptor.
1333 * We can filter up to 9 addresses, if more are requested we set
1334 * multicast promiscuous mode.
1335 */
1336
1337static void
1338set_multicast_list(struct net_device *dev)
1339{
906da809 1340 unsigned int ioaddr = dev->base_addr;
43fc63dc 1341 unsigned value;
1da177e4
LT		 1342
1343 SelectPage(0x42);
43fc63dc
K		 1344 value = GetByte(XIRCREG42_SWC1) & 0xC0;
1345
1da177e4 1346 if (dev->flags & IFF_PROMISC) { /* snoop */
43fc63dc 1347 PutByte(XIRCREG42_SWC1, value | 0x06); /* set MPE and PME */
4cd24eaf 1348 } else if (netdev_mc_count(dev) > 9 || (dev->flags & IFF_ALLMULTI)) {
43fc63dc 1349 PutByte(XIRCREG42_SWC1, value | 0x02); /* set MPE */
4cd24eaf 1350 } else if (!netdev_mc_empty(dev)) {
1da177e4 1351 /* the chip can filter 9 addresses perfectly */
43fc63dc 1352 PutByte(XIRCREG42_SWC1, value | 0x01);
1da177e4
LT		 1353 SelectPage(0x40);
1354 PutByte(XIRCREG40_CMD0, Offline);
1355 set_addresses(dev);
1356 SelectPage(0x40);
1357 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1358 } else { /* standard usage */
43fc63dc 1359 PutByte(XIRCREG42_SWC1, value | 0x00);
1da177e4
LT		 1360 }
1361 SelectPage(0);
1362}
1363
1364static int
1365do_config(struct net_device *dev, struct ifmap *map)
1366{
1367 local_info_t *local = netdev_priv(dev);
1368
dd0fab5b 1369 pr_debug("do_config(%p)\n", dev);
1da177e4
LT		 1370 if (map->port != 255 && map->port != dev->if_port) {
1371 if (map->port > 4)
1372 return -EINVAL;
1373 if (!map->port) {
1374 local->probe_port = 1;
1375 dev->if_port = 1;
1376 } else {
1377 local->probe_port = 0;
1378 dev->if_port = map->port;
1379 }
636b8116 1380 netdev_info(dev, "switching to %s port\n", if_names[dev->if_port]);
1da177e4
LT		 1381 do_reset(dev,1); /* not the fine way :-) */
1382 }
1383 return 0;
1384}
1385
1386/****************
1387 * Open the driver
1388 */
1389static int
1390do_open(struct net_device *dev)
1391{
1392 local_info_t *lp = netdev_priv(dev);
fba395ee 1393 struct pcmcia_device *link = lp->p_dev;
1da177e4 1394
dd0fab5b 1395 dev_dbg(&link->dev, "do_open(%p)\n", dev);
1da177e4
LT		 1396
1397 /* Check that the PCMCIA card is still here. */
1398 /* Physical device present signature. */
9940ec36 1399 if (!pcmcia_dev_present(link))
1da177e4
LT		 1400 return -ENODEV;
1401
1402 /* okay */
1403 link->open++;
1404
1405 netif_start_queue(dev);
1406 do_reset(dev,1);
1407
1408 return 0;
1409}
1410
1411static void netdev_get_drvinfo(struct net_device *dev,
1412 struct ethtool_drvinfo *info)
1413{
1414 strcpy(info->driver, "xirc2ps_cs");
1415 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
1416}
1417
7282d491 1418static const struct ethtool_ops netdev_ethtool_ops = {
1da177e4
LT		 1419 .get_drvinfo = netdev_get_drvinfo,
1420};
1421
1422static int
1423do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1424{
1425 local_info_t *local = netdev_priv(dev);
906da809 1426 unsigned int ioaddr = dev->base_addr;
0fa0ee05 1427 struct mii_ioctl_data *data = if_mii(rq);
1da177e4 1428
dd0fab5b 1429 pr_debug("%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n",
1da177e4 1430 dev->name, rq->ifr_ifrn.ifrn_name, cmd,
0fa0ee05 1431 data->phy_id, data->reg_num, data->val_in, data->val_out);
1da177e4
LT		 1432
1433 if (!local->mohawk)
1434 return -EOPNOTSUPP;
1435
1436 switch(cmd) {
1437 case SIOCGMIIPHY: /* Get the address of the PHY in use. */
0fa0ee05 1438 data->phy_id = 0; /* we have only this address */
93b1fae4 1439 /* fall through */
1da177e4 1440 case SIOCGMIIREG: /* Read the specified MII register. */
0fa0ee05
BH		 1441 data->val_out = mii_rd(ioaddr, data->phy_id & 0x1f,
1442 data->reg_num & 0x1f);
1da177e4
LT		 1443 break;
1444 case SIOCSMIIREG: /* Write the specified MII register */
0fa0ee05
BH		 1445 mii_wr(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in,
1446 16);
1da177e4
LT		 1447 break;
1448 default:
1449 return -EOPNOTSUPP;
1450 }
1451 return 0;
1452}
1453
1454static void
1455hardreset(struct net_device *dev)
1456{
1457 local_info_t *local = netdev_priv(dev);
906da809 1458 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1459
1460 SelectPage(4);
1461 udelay(1);
1462 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1463 msleep(40); /* wait 40 msec */
1464 if (local->mohawk)
1465 PutByte(XIRCREG4_GPR1, 1); /* set bit 0: power up */
1466 else
1467 PutByte(XIRCREG4_GPR1, 1 | 4); /* set bit 0: power up, bit 2: AIC */
1468 msleep(20); /* wait 20 msec */
1469}
1470
1471static void
1472do_reset(struct net_device *dev, int full)
1473{
1474 local_info_t *local = netdev_priv(dev);
906da809 1475 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1476 unsigned value;
1477
dd0fab5b 1478 pr_debug("%s: do_reset(%p,%d)\n", dev? dev->name:"eth?", dev, full);
1da177e4
LT		 1479
1480 hardreset(dev);
1481 PutByte(XIRCREG_CR, SoftReset); /* set */
1482 msleep(20); /* wait 20 msec */
1483 PutByte(XIRCREG_CR, 0); /* clear */
1484 msleep(40); /* wait 40 msec */
1485 if (local->mohawk) {
1486 SelectPage(4);
1487 /* set pin GP1 and GP2 to output (0x0c)
1488 * set GP1 to low to power up the ML6692 (0x00)
1489 * set GP2 to high to power up the 10Mhz chip (0x02)
1490 */
1491 PutByte(XIRCREG4_GPR0, 0x0e);
1492 }
1493
1494 /* give the circuits some time to power up */
1495 msleep(500); /* about 500ms */
1496
1497 local->last_ptr_value = 0;
1498 local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4
1499 : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;
1500
1501 if (local->probe_port) {
1502 if (!local->mohawk) {
1503 SelectPage(4);
1504 PutByte(XIRCREG4_GPR0, 4);
1505 local->probe_port = 0;
1506 }
1507 } else if (dev->if_port == 2) { /* enable 10Base2 */
1508 SelectPage(0x42);
1509 PutByte(XIRCREG42_SWC1, 0xC0);
1510 } else { /* enable 10BaseT */
1511 SelectPage(0x42);
1512 PutByte(XIRCREG42_SWC1, 0x80);
1513 }
1514 msleep(40); /* wait 40 msec to let it complete */
1515
dd0fab5b
DB		 1516 #if 0
1517 {
1da177e4
LT		 1518 SelectPage(0);
1519 value = GetByte(XIRCREG_ESR); /* read the ESR */
636b8116 1520 pr_debug("%s: ESR is: %#02x\n", dev->name, value);
1da177e4
LT		 1521 }
1522 #endif
1523
1524 /* setup the ECR */
1525 SelectPage(1);
1526 PutByte(XIRCREG1_IMR0, 0xff); /* allow all ints */
1527 PutByte(XIRCREG1_IMR1, 1 ); /* and Set TxUnderrunDetect */
1528 value = GetByte(XIRCREG1_ECR);
1529 #if 0
1530 if (local->mohawk)
1531 value |= DisableLinkPulse;
1532 PutByte(XIRCREG1_ECR, value);
1533 #endif
dd0fab5b 1534 pr_debug("%s: ECR is: %#02x\n", dev->name, value);
1da177e4
LT		 1535
1536 SelectPage(0x42);
1537 PutByte(XIRCREG42_SWC0, 0x20); /* disable source insertion */
1538
1539 if (local->silicon != 1) {
1540 /* set the local memory dividing line.
1541 * The comments in the sample code say that this is only
1542 * settable with the scipper version 2 which is revision 0.
1543 * Always for CE3 cards
1544 */
1545 SelectPage(2);
1546 PutWord(XIRCREG2_RBS, 0x2000);
1547 }
1548
1549 if (full)
1550 set_addresses(dev);
1551
1552 /* Hardware workaround:
1553 * The receive byte pointer after reset is off by 1 so we need
1554 * to move the offset pointer back to 0.
1555 */
1556 SelectPage(0);
1557 PutWord(XIRCREG0_DO, 0x2000); /* change offset command, off=0 */
1558
1559 /* setup MAC IMRs and clear status registers */
1560 SelectPage(0x40); /* Bit 7 ... bit 0 */
1561 PutByte(XIRCREG40_RMASK0, 0xff); /* ROK, RAB, rsv, RO, CRC, AE, PTL, MP */
1562 PutByte(XIRCREG40_TMASK0, 0xff); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1563 PutByte(XIRCREG40_TMASK1, 0xb0); /* rsv, rsv, PTD, EXT, rsv,rsv,rsv, rsv*/
1564 PutByte(XIRCREG40_RXST0, 0x00); /* ROK, RAB, REN, RO, CRC, AE, PTL, MP */
1565 PutByte(XIRCREG40_TXST0, 0x00); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
1566 PutByte(XIRCREG40_TXST1, 0x00); /* TEN, rsv, PTD, EXT, retry_counter:4 */
1567
1568 if (full && local->mohawk && init_mii(dev)) {
1569 if (dev->if_port == 4 || local->dingo || local->new_mii) {
636b8116 1570 netdev_info(dev, "MII selected\n");
1da177e4
LT		 1571 SelectPage(2);
1572 PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);
1573 msleep(20);
1574 } else {
636b8116 1575 netdev_info(dev, "MII detected; using 10mbs\n");
1da177e4
LT		 1576 SelectPage(0x42);
1577 if (dev->if_port == 2) /* enable 10Base2 */
1578 PutByte(XIRCREG42_SWC1, 0xC0);
1579 else /* enable 10BaseT */
1580 PutByte(XIRCREG42_SWC1, 0x80);
1581 msleep(40); /* wait 40 msec to let it complete */
1582 }
1583 if (full_duplex)
1584 PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));
1585 } else { /* No MII */
1586 SelectPage(0);
1587 value = GetByte(XIRCREG_ESR); /* read the ESR */
1588 dev->if_port = (value & MediaSelect) ? 1 : 2;
1589 }
1590
1591 /* configure the LEDs */
1592 SelectPage(2);
1593 if (dev->if_port == 1 || dev->if_port == 4) /* TP: Link and Activity */
1594 PutByte(XIRCREG2_LED, 0x3b);
1595 else /* Coax: Not-Collision and Activity */
1596 PutByte(XIRCREG2_LED, 0x3a);
1597
1598 if (local->dingo)
1599 PutByte(0x0b, 0x04); /* 100 Mbit LED */
1600
1601 /* enable receiver and put the mac online */
1602 if (full) {
43fc63dc 1603 set_multicast_list(dev);
1da177e4
LT		 1604 SelectPage(0x40);
1605 PutByte(XIRCREG40_CMD0, EnableRecv | Online);
1606 }
1607
1608 /* setup Ethernet IMR and enable interrupts */
1609 SelectPage(1);
1610 PutByte(XIRCREG1_IMR0, 0xff);
1611 udelay(1);
1612 SelectPage(0);
1613 PutByte(XIRCREG_CR, EnableIntr);
1614 if (local->modem && !local->dingo) { /* do some magic */
1615 if (!(GetByte(0x10) & 0x01))
1616 PutByte(0x10, 0x11); /* unmask master-int bit */
1617 }
1618
1619 if (full)
636b8116
JP		 1620 netdev_info(dev, "media %s, silicon revision %d\n",
1621 if_names[dev->if_port], local->silicon);
1da177e4
LT		 1622 /* We should switch back to page 0 to avoid a bug in revision 0
1623 * where regs with offset below 8 can't be read after an access
1624 * to the MAC registers */
1625 SelectPage(0);
1626}
1627
1628/****************
1629 * Initialize the Media-Independent-Interface
1630 * Returns: True if we have a good MII
1631 */
1632static int
1633init_mii(struct net_device *dev)
1634{
1635 local_info_t *local = netdev_priv(dev);
906da809 1636 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1637 unsigned control, status, linkpartner;
1638 int i;
1639
1640 if (if_port == 4 || if_port == 1) { /* force 100BaseT or 10BaseT */
1641 dev->if_port = if_port;
1642 local->probe_port = 0;
1643 return 1;
1644 }
1645
1646 status = mii_rd(ioaddr, 0, 1);
1647 if ((status & 0xff00) != 0x7800)
1648 return 0; /* No MII */
1649
1650 local->new_mii = (mii_rd(ioaddr, 0, 2) != 0xffff);
1651
1652 if (local->probe_port)
1653 control = 0x1000; /* auto neg */
1654 else if (dev->if_port == 4)
1655 control = 0x2000; /* no auto neg, 100mbs mode */
1656 else
1657 control = 0x0000; /* no auto neg, 10mbs mode */
1658 mii_wr(ioaddr, 0, 0, control, 16);
1659 udelay(100);
1660 control = mii_rd(ioaddr, 0, 0);
1661
1662 if (control & 0x0400) {
636b8116 1663 netdev_notice(dev, "can't take PHY out of isolation mode\n");
1da177e4
LT		 1664 local->probe_port = 0;
1665 return 0;
1666 }
1667
1668 if (local->probe_port) {
1669 /* according to the DP83840A specs the auto negotiation process
1670 * may take up to 3.5 sec, so we use this also for our ML6692
1671 * Fixme: Better to use a timer here!
1672 */
1673 for (i=0; i < 35; i++) {
1674 msleep(100); /* wait 100 msec */
1675 status = mii_rd(ioaddr, 0, 1);
1676 if ((status & 0x0020) && (status & 0x0004))
1677 break;
1678 }
1679
1680 if (!(status & 0x0020)) {
636b8116 1681 netdev_info(dev, "autonegotiation failed; using 10mbs\n");
1da177e4
LT		 1682 if (!local->new_mii) {
1683 control = 0x0000;
1684 mii_wr(ioaddr, 0, 0, control, 16);
1685 udelay(100);
1686 SelectPage(0);
1687 dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;
1688 }
1689 } else {
1690 linkpartner = mii_rd(ioaddr, 0, 5);
636b8116 1691 netdev_info(dev, "MII link partner: %04x\n", linkpartner);
1da177e4
LT		 1692 if (linkpartner & 0x0080) {
1693 dev->if_port = 4;
1694 } else
1695 dev->if_port = 1;
1696 }
1697 }
1698
1699 return 1;
1700}
1701
1702static void
1703do_powerdown(struct net_device *dev)
1704{
1705
906da809 1706 unsigned int ioaddr = dev->base_addr;
1da177e4 1707
dd0fab5b 1708 pr_debug("do_powerdown(%p)\n", dev);
1da177e4
LT		 1709
1710 SelectPage(4);
1711 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1712 SelectPage(0);
1713}
1714
1715static int
1716do_stop(struct net_device *dev)
1717{
906da809 1718 unsigned int ioaddr = dev->base_addr;
1da177e4 1719 local_info_t *lp = netdev_priv(dev);
fba395ee 1720 struct pcmcia_device *link = lp->p_dev;
1da177e4 1721
dd0fab5b 1722 dev_dbg(&link->dev, "do_stop(%p)\n", dev);
1da177e4
LT		 1723
1724 if (!link)
1725 return -ENODEV;
1726
1727 netif_stop_queue(dev);
1728
1729 SelectPage(0);
1730 PutByte(XIRCREG_CR, 0); /* disable interrupts */
1731 SelectPage(0x01);
1732 PutByte(XIRCREG1_IMR0, 0x00); /* forbid all ints */
1733 SelectPage(4);
1734 PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
1735 SelectPage(0);
1736
1737 link->open--;
1738 return 0;
1739}
1740
ff07bb19
DB		 1741static struct pcmcia_device_id xirc2ps_ids[] = {
1742 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0089, 0x110a),
1743 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0138, 0x110a),
1744 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM28", 0x2e3ee845, 0x0ea978ea),
1745 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM33", 0x2e3ee845, 0x80609023),
1746 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM56", 0x2e3ee845, 0xa650c32a),
1747 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29),
1748 PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719),
d277ad0e 1749 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf),
ff07bb19
DB		 1750 PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x010a),
1751 PCMCIA_DEVICE_PROD_ID13("Toshiba Information Systems", "TPCENET", 0x1b3b94fe, 0xf381c1a2),
1752 PCMCIA_DEVICE_PROD_ID13("Xircom", "CE3-10/100", 0x2e3ee845, 0x0ec0ac37),
1753 PCMCIA_DEVICE_PROD_ID13("Xircom", "PS-CE2-10", 0x2e3ee845, 0x947d9073),
1754 PCMCIA_DEVICE_PROD_ID13("Xircom", "R2E-100BTX", 0x2e3ee845, 0x2464a6e3),
1755 PCMCIA_DEVICE_PROD_ID13("Xircom", "RE-10", 0x2e3ee845, 0x3e08d609),
1756 PCMCIA_DEVICE_PROD_ID13("Xircom", "XE2000", 0x2e3ee845, 0xf7188e46),
1757 PCMCIA_DEVICE_PROD_ID12("Compaq", "Ethernet LAN Card", 0x54f7c49c, 0x9fd2f0a2),
1758 PCMCIA_DEVICE_PROD_ID12("Compaq", "Netelligent 10/100 PC Card", 0x54f7c49c, 0xefe96769),
1759 PCMCIA_DEVICE_PROD_ID12("Intel", "EtherExpress(TM) PRO/100 PC Card Mobile Adapter16", 0x816cc815, 0x174397db),
1760 PCMCIA_DEVICE_PROD_ID12("Toshiba", "10/100 Ethernet PC Card", 0x44a09d9c, 0xb44deecf),
1761 /* also matches CFE-10 cards! */
1762 /* PCMCIA_DEVICE_MANF_CARD(0x0105, 0x010a), */
1763 PCMCIA_DEVICE_NULL,
1764};
1765MODULE_DEVICE_TABLE(pcmcia, xirc2ps_ids);
1766
1767
1da177e4
LT		 1768static struct pcmcia_driver xirc2ps_cs_driver = {
1769 .owner = THIS_MODULE,
2e9b981a 1770 .name = "xirc2ps_cs",
15b99ac1 1771 .probe = xirc2ps_probe,
cc3b4866 1772 .remove = xirc2ps_detach,
ff07bb19 1773 .id_table = xirc2ps_ids,
98e4c28b
DB		 1774 .suspend = xirc2ps_suspend,
1775 .resume = xirc2ps_resume,
1da177e4
LT		 1776};
1777
1778static int __init
1779init_xirc2ps_cs(void)
1780{
1781 return pcmcia_register_driver(&xirc2ps_cs_driver);
1782}
1783
1784static void __exit
1785exit_xirc2ps_cs(void)
1786{
1787 pcmcia_unregister_driver(&xirc2ps_cs_driver);
1da177e4
LT		 1788}
1789
1790module_init(init_xirc2ps_cs);
1791module_exit(exit_xirc2ps_cs);
1792
1793#ifndef MODULE
1794static int __init setup_xirc2ps_cs(char *str)
1795{
1796 /* if_port, full_duplex, do_sound, lockup_hack
1797 */
1798 int ints[10] = { -1 };
1799
1800 str = get_options(str, 9, ints);
1801
1802#define MAYBE_SET(X,Y) if (ints[0] >= Y && ints[Y] != -1) { X = ints[Y]; }
1803 MAYBE_SET(if_port, 3);
1804 MAYBE_SET(full_duplex, 4);
1805 MAYBE_SET(do_sound, 5);
1806 MAYBE_SET(lockup_hack, 6);
1807#undef MAYBE_SET
1808
9b41046c 1809 return 1;
1da177e4
LT		 1810}
1811
1812__setup("xirc2ps_cs=", setup_xirc2ps_cs);
1813#endif
Linux kernel - Deliverables
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