Commit | Line | Data |
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a8e510f6 | 1 | /* |
240a12d5 | 2 | * SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches |
a8e510f6 FL |
3 | * |
4 | * Copyright (C) 2008 Gabor Juhos <juhosg at openwrt.org> | |
5 | * | |
6 | * This file was based on: drivers/spi/at25.c | |
7 | * Copyright (C) 2006 David Brownell | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License version 2 as published | |
11 | * by the Free Software Foundation. | |
12 | */ | |
13 | ||
8d242488 JP |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
a8e510f6 FL |
16 | #include <linux/types.h> |
17 | #include <linux/kernel.h> | |
a8e510f6 FL |
18 | #include <linux/module.h> |
19 | #include <linux/delay.h> | |
20 | #include <linux/device.h> | |
21 | ||
22 | #include <linux/spi/spi.h> | |
23 | ||
24 | #define DRV_VERSION "0.1.1" | |
25 | #define DRV_DESC "Micrel KS8995 Ethernet switch SPI driver" | |
26 | ||
27 | /* ------------------------------------------------------------------------ */ | |
28 | ||
29 | #define KS8995_REG_ID0 0x00 /* Chip ID0 */ | |
30 | #define KS8995_REG_ID1 0x01 /* Chip ID1 */ | |
31 | ||
32 | #define KS8995_REG_GC0 0x02 /* Global Control 0 */ | |
33 | #define KS8995_REG_GC1 0x03 /* Global Control 1 */ | |
34 | #define KS8995_REG_GC2 0x04 /* Global Control 2 */ | |
35 | #define KS8995_REG_GC3 0x05 /* Global Control 3 */ | |
36 | #define KS8995_REG_GC4 0x06 /* Global Control 4 */ | |
37 | #define KS8995_REG_GC5 0x07 /* Global Control 5 */ | |
38 | #define KS8995_REG_GC6 0x08 /* Global Control 6 */ | |
39 | #define KS8995_REG_GC7 0x09 /* Global Control 7 */ | |
40 | #define KS8995_REG_GC8 0x0a /* Global Control 8 */ | |
41 | #define KS8995_REG_GC9 0x0b /* Global Control 9 */ | |
42 | ||
43 | #define KS8995_REG_PC(p, r) ((0x10 * p) + r) /* Port Control */ | |
44 | #define KS8995_REG_PS(p, r) ((0x10 * p) + r + 0xe) /* Port Status */ | |
45 | ||
46 | #define KS8995_REG_TPC0 0x60 /* TOS Priority Control 0 */ | |
47 | #define KS8995_REG_TPC1 0x61 /* TOS Priority Control 1 */ | |
48 | #define KS8995_REG_TPC2 0x62 /* TOS Priority Control 2 */ | |
49 | #define KS8995_REG_TPC3 0x63 /* TOS Priority Control 3 */ | |
50 | #define KS8995_REG_TPC4 0x64 /* TOS Priority Control 4 */ | |
51 | #define KS8995_REG_TPC5 0x65 /* TOS Priority Control 5 */ | |
52 | #define KS8995_REG_TPC6 0x66 /* TOS Priority Control 6 */ | |
53 | #define KS8995_REG_TPC7 0x67 /* TOS Priority Control 7 */ | |
54 | ||
55 | #define KS8995_REG_MAC0 0x68 /* MAC address 0 */ | |
56 | #define KS8995_REG_MAC1 0x69 /* MAC address 1 */ | |
57 | #define KS8995_REG_MAC2 0x6a /* MAC address 2 */ | |
58 | #define KS8995_REG_MAC3 0x6b /* MAC address 3 */ | |
59 | #define KS8995_REG_MAC4 0x6c /* MAC address 4 */ | |
60 | #define KS8995_REG_MAC5 0x6d /* MAC address 5 */ | |
61 | ||
62 | #define KS8995_REG_IAC0 0x6e /* Indirect Access Control 0 */ | |
63 | #define KS8995_REG_IAC1 0x6f /* Indirect Access Control 0 */ | |
64 | #define KS8995_REG_IAD7 0x70 /* Indirect Access Data 7 */ | |
65 | #define KS8995_REG_IAD6 0x71 /* Indirect Access Data 6 */ | |
66 | #define KS8995_REG_IAD5 0x72 /* Indirect Access Data 5 */ | |
67 | #define KS8995_REG_IAD4 0x73 /* Indirect Access Data 4 */ | |
68 | #define KS8995_REG_IAD3 0x74 /* Indirect Access Data 3 */ | |
69 | #define KS8995_REG_IAD2 0x75 /* Indirect Access Data 2 */ | |
70 | #define KS8995_REG_IAD1 0x76 /* Indirect Access Data 1 */ | |
71 | #define KS8995_REG_IAD0 0x77 /* Indirect Access Data 0 */ | |
72 | ||
240a12d5 PZ |
73 | #define KSZ8864_REG_ID1 0xfe /* Chip ID in bit 7 */ |
74 | ||
a8e510f6 | 75 | #define KS8995_REGS_SIZE 0x80 |
240a12d5 | 76 | #define KSZ8864_REGS_SIZE 0x100 |
a8e510f6 FL |
77 | |
78 | #define ID1_CHIPID_M 0xf | |
79 | #define ID1_CHIPID_S 4 | |
80 | #define ID1_REVISION_M 0x7 | |
81 | #define ID1_REVISION_S 1 | |
82 | #define ID1_START_SW 1 /* start the switch */ | |
83 | ||
84 | #define FAMILY_KS8995 0x95 | |
85 | #define CHIPID_M 0 | |
86 | ||
87 | #define KS8995_CMD_WRITE 0x02U | |
88 | #define KS8995_CMD_READ 0x03U | |
89 | ||
90 | #define KS8995_RESET_DELAY 10 /* usec */ | |
91 | ||
92 | struct ks8995_pdata { | |
93 | /* not yet implemented */ | |
94 | }; | |
95 | ||
96 | struct ks8995_switch { | |
97 | struct spi_device *spi; | |
98 | struct mutex lock; | |
99 | struct ks8995_pdata *pdata; | |
240a12d5 | 100 | struct bin_attribute regs_attr; |
a8e510f6 FL |
101 | }; |
102 | ||
103 | static inline u8 get_chip_id(u8 val) | |
104 | { | |
105 | return (val >> ID1_CHIPID_S) & ID1_CHIPID_M; | |
106 | } | |
107 | ||
108 | static inline u8 get_chip_rev(u8 val) | |
109 | { | |
110 | return (val >> ID1_REVISION_S) & ID1_REVISION_M; | |
111 | } | |
112 | ||
113 | /* ------------------------------------------------------------------------ */ | |
114 | static int ks8995_read(struct ks8995_switch *ks, char *buf, | |
115 | unsigned offset, size_t count) | |
116 | { | |
117 | u8 cmd[2]; | |
118 | struct spi_transfer t[2]; | |
119 | struct spi_message m; | |
120 | int err; | |
121 | ||
122 | spi_message_init(&m); | |
123 | ||
124 | memset(&t, 0, sizeof(t)); | |
125 | ||
126 | t[0].tx_buf = cmd; | |
127 | t[0].len = sizeof(cmd); | |
128 | spi_message_add_tail(&t[0], &m); | |
129 | ||
130 | t[1].rx_buf = buf; | |
131 | t[1].len = count; | |
132 | spi_message_add_tail(&t[1], &m); | |
133 | ||
134 | cmd[0] = KS8995_CMD_READ; | |
135 | cmd[1] = offset; | |
136 | ||
137 | mutex_lock(&ks->lock); | |
138 | err = spi_sync(ks->spi, &m); | |
139 | mutex_unlock(&ks->lock); | |
140 | ||
141 | return err ? err : count; | |
142 | } | |
143 | ||
144 | ||
145 | static int ks8995_write(struct ks8995_switch *ks, char *buf, | |
146 | unsigned offset, size_t count) | |
147 | { | |
148 | u8 cmd[2]; | |
149 | struct spi_transfer t[2]; | |
150 | struct spi_message m; | |
151 | int err; | |
152 | ||
153 | spi_message_init(&m); | |
154 | ||
155 | memset(&t, 0, sizeof(t)); | |
156 | ||
157 | t[0].tx_buf = cmd; | |
158 | t[0].len = sizeof(cmd); | |
159 | spi_message_add_tail(&t[0], &m); | |
160 | ||
161 | t[1].tx_buf = buf; | |
162 | t[1].len = count; | |
163 | spi_message_add_tail(&t[1], &m); | |
164 | ||
165 | cmd[0] = KS8995_CMD_WRITE; | |
166 | cmd[1] = offset; | |
167 | ||
168 | mutex_lock(&ks->lock); | |
169 | err = spi_sync(ks->spi, &m); | |
170 | mutex_unlock(&ks->lock); | |
171 | ||
172 | return err ? err : count; | |
173 | } | |
174 | ||
175 | static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf) | |
176 | { | |
7aff9675 | 177 | return ks8995_read(ks, buf, addr, 1) != 1; |
a8e510f6 FL |
178 | } |
179 | ||
180 | static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val) | |
181 | { | |
182 | char buf = val; | |
183 | ||
7aff9675 | 184 | return ks8995_write(ks, &buf, addr, 1) != 1; |
a8e510f6 FL |
185 | } |
186 | ||
187 | /* ------------------------------------------------------------------------ */ | |
188 | ||
189 | static int ks8995_stop(struct ks8995_switch *ks) | |
190 | { | |
191 | return ks8995_write_reg(ks, KS8995_REG_ID1, 0); | |
192 | } | |
193 | ||
194 | static int ks8995_start(struct ks8995_switch *ks) | |
195 | { | |
196 | return ks8995_write_reg(ks, KS8995_REG_ID1, 1); | |
197 | } | |
198 | ||
199 | static int ks8995_reset(struct ks8995_switch *ks) | |
200 | { | |
201 | int err; | |
202 | ||
203 | err = ks8995_stop(ks); | |
204 | if (err) | |
205 | return err; | |
206 | ||
207 | udelay(KS8995_RESET_DELAY); | |
208 | ||
209 | return ks8995_start(ks); | |
210 | } | |
211 | ||
a8e510f6 FL |
212 | static ssize_t ks8995_registers_read(struct file *filp, struct kobject *kobj, |
213 | struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count) | |
214 | { | |
215 | struct device *dev; | |
216 | struct ks8995_switch *ks8995; | |
217 | ||
218 | dev = container_of(kobj, struct device, kobj); | |
219 | ks8995 = dev_get_drvdata(dev); | |
220 | ||
a8e510f6 FL |
221 | return ks8995_read(ks8995, buf, off, count); |
222 | } | |
223 | ||
a8e510f6 FL |
224 | static ssize_t ks8995_registers_write(struct file *filp, struct kobject *kobj, |
225 | struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count) | |
226 | { | |
227 | struct device *dev; | |
228 | struct ks8995_switch *ks8995; | |
229 | ||
230 | dev = container_of(kobj, struct device, kobj); | |
231 | ks8995 = dev_get_drvdata(dev); | |
232 | ||
a8e510f6 FL |
233 | return ks8995_write(ks8995, buf, off, count); |
234 | } | |
235 | ||
240a12d5 | 236 | static const struct bin_attribute ks8995_registers_attr = { |
a8e510f6 FL |
237 | .attr = { |
238 | .name = "registers", | |
239 | .mode = S_IRUSR | S_IWUSR, | |
240 | }, | |
241 | .size = KS8995_REGS_SIZE, | |
242 | .read = ks8995_registers_read, | |
243 | .write = ks8995_registers_write, | |
244 | }; | |
245 | ||
246 | /* ------------------------------------------------------------------------ */ | |
247 | ||
633d1594 | 248 | static int ks8995_probe(struct spi_device *spi) |
a8e510f6 FL |
249 | { |
250 | struct ks8995_switch *ks; | |
251 | struct ks8995_pdata *pdata; | |
252 | u8 ids[2]; | |
253 | int err; | |
254 | ||
255 | /* Chip description */ | |
256 | pdata = spi->dev.platform_data; | |
257 | ||
b32a8b64 | 258 | ks = devm_kzalloc(&spi->dev, sizeof(*ks), GFP_KERNEL); |
e68ed8f0 | 259 | if (!ks) |
a8e510f6 | 260 | return -ENOMEM; |
a8e510f6 FL |
261 | |
262 | mutex_init(&ks->lock); | |
263 | ks->pdata = pdata; | |
264 | ks->spi = spi_dev_get(spi); | |
5d5f1846 | 265 | spi_set_drvdata(spi, ks); |
a8e510f6 FL |
266 | |
267 | spi->mode = SPI_MODE_0; | |
268 | spi->bits_per_word = 8; | |
269 | err = spi_setup(spi); | |
270 | if (err) { | |
271 | dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); | |
b32a8b64 | 272 | return err; |
a8e510f6 FL |
273 | } |
274 | ||
275 | err = ks8995_read(ks, ids, KS8995_REG_ID0, sizeof(ids)); | |
276 | if (err < 0) { | |
277 | dev_err(&spi->dev, "unable to read id registers, err=%d\n", | |
278 | err); | |
b32a8b64 | 279 | return err; |
a8e510f6 FL |
280 | } |
281 | ||
282 | switch (ids[0]) { | |
283 | case FAMILY_KS8995: | |
284 | break; | |
285 | default: | |
286 | dev_err(&spi->dev, "unknown family id:%02x\n", ids[0]); | |
b32a8b64 | 287 | return -ENODEV; |
a8e510f6 FL |
288 | } |
289 | ||
240a12d5 PZ |
290 | memcpy(&ks->regs_attr, &ks8995_registers_attr, sizeof(ks->regs_attr)); |
291 | if (get_chip_id(ids[1]) != CHIPID_M) { | |
292 | u8 val; | |
293 | ||
294 | /* Check if this is a KSZ8864RMN */ | |
295 | err = ks8995_read(ks, &val, KSZ8864_REG_ID1, sizeof(val)); | |
296 | if (err < 0) { | |
297 | dev_err(&spi->dev, | |
298 | "unable to read chip id register, err=%d\n", | |
299 | err); | |
b32a8b64 | 300 | return err; |
240a12d5 PZ |
301 | } |
302 | if ((val & 0x80) == 0) { | |
303 | dev_err(&spi->dev, "unknown chip:%02x,0\n", ids[1]); | |
b32a8b64 | 304 | return err; |
240a12d5 PZ |
305 | } |
306 | ks->regs_attr.size = KSZ8864_REGS_SIZE; | |
307 | } | |
308 | ||
a8e510f6 FL |
309 | err = ks8995_reset(ks); |
310 | if (err) | |
b32a8b64 | 311 | return err; |
a8e510f6 | 312 | |
240a12d5 | 313 | err = sysfs_create_bin_file(&spi->dev.kobj, &ks->regs_attr); |
a8e510f6 FL |
314 | if (err) { |
315 | dev_err(&spi->dev, "unable to create sysfs file, err=%d\n", | |
316 | err); | |
b32a8b64 | 317 | return err; |
a8e510f6 FL |
318 | } |
319 | ||
240a12d5 PZ |
320 | if (get_chip_id(ids[1]) == CHIPID_M) { |
321 | dev_info(&spi->dev, | |
322 | "KS8995 device found, Chip ID:%x, Revision:%x\n", | |
323 | get_chip_id(ids[1]), get_chip_rev(ids[1])); | |
324 | } else { | |
325 | dev_info(&spi->dev, "KSZ8864 device found, Revision:%x\n", | |
326 | get_chip_rev(ids[1])); | |
327 | } | |
a8e510f6 FL |
328 | |
329 | return 0; | |
a8e510f6 FL |
330 | } |
331 | ||
633d1594 | 332 | static int ks8995_remove(struct spi_device *spi) |
a8e510f6 | 333 | { |
30349bdb VZ |
334 | struct ks8995_switch *ks = spi_get_drvdata(spi); |
335 | ||
336 | sysfs_remove_bin_file(&spi->dev.kobj, &ks->regs_attr); | |
a8e510f6 | 337 | |
a8e510f6 FL |
338 | return 0; |
339 | } | |
340 | ||
341 | /* ------------------------------------------------------------------------ */ | |
342 | ||
343 | static struct spi_driver ks8995_driver = { | |
344 | .driver = { | |
345 | .name = "spi-ks8995", | |
a8e510f6 FL |
346 | .owner = THIS_MODULE, |
347 | }, | |
348 | .probe = ks8995_probe, | |
633d1594 | 349 | .remove = ks8995_remove, |
a8e510f6 FL |
350 | }; |
351 | ||
1a9561a3 | 352 | module_spi_driver(ks8995_driver); |
a8e510f6 FL |
353 | |
354 | MODULE_DESCRIPTION(DRV_DESC); | |
355 | MODULE_VERSION(DRV_VERSION); | |
356 | MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>"); | |
357 | MODULE_LICENSE("GPL v2"); |