Commit | Line | Data |
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1da177e4 | 1 | /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux. |
6aa20a22 | 2 | Copyright 1999 Silicon Integrated System Corporation |
d269a69f | 3 | Revision: 1.08.10 Apr. 2 2006 |
6aa20a22 | 4 | |
1da177e4 | 5 | Modified from the driver which is originally written by Donald Becker. |
6aa20a22 | 6 | |
1da177e4 LT |
7 | This software may be used and distributed according to the terms |
8 | of the GNU General Public License (GPL), incorporated herein by reference. | |
9 | Drivers based on this skeleton fall under the GPL and must retain | |
10 | the authorship (implicit copyright) notice. | |
6aa20a22 | 11 | |
1da177e4 LT |
12 | References: |
13 | SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support, | |
14 | preliminary Rev. 1.0 Jan. 14, 1998 | |
15 | SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support, | |
16 | preliminary Rev. 1.0 Nov. 10, 1998 | |
17 | SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution, | |
18 | preliminary Rev. 1.0 Jan. 18, 1998 | |
19 | ||
d269a69f | 20 | Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support |
ea37ccea | 21 | Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support |
1da177e4 | 22 | Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages |
d269a69f | 23 | Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support |
1da177e4 LT |
24 | Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support |
25 | Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary | |
26 | Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support | |
27 | Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function | |
28 | Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem | |
29 | Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY | |
30 | Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix | |
31 | Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3 | |
6aa20a22 | 32 | Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support |
1da177e4 LT |
33 | Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup |
34 | Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support | |
35 | Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix | |
36 | Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning | |
37 | Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig | |
38 | Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support | |
39 | Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule | |
40 | Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 | |
41 | Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring | |
42 | Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 | |
43 | Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release | |
44 | Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed | |
45 | Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com) | |
46 | Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release | |
47 | Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx | |
48 | Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support | |
49 | Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release | |
50 | */ | |
51 | ||
52 | #include <linux/module.h> | |
53 | #include <linux/moduleparam.h> | |
54 | #include <linux/kernel.h> | |
55 | #include <linux/string.h> | |
56 | #include <linux/timer.h> | |
57 | #include <linux/errno.h> | |
58 | #include <linux/ioport.h> | |
59 | #include <linux/slab.h> | |
60 | #include <linux/interrupt.h> | |
61 | #include <linux/pci.h> | |
62 | #include <linux/netdevice.h> | |
63 | #include <linux/init.h> | |
64 | #include <linux/mii.h> | |
65 | #include <linux/etherdevice.h> | |
66 | #include <linux/skbuff.h> | |
67 | #include <linux/delay.h> | |
68 | #include <linux/ethtool.h> | |
69 | #include <linux/crc32.h> | |
70 | #include <linux/bitops.h> | |
12b279f9 | 71 | #include <linux/dma-mapping.h> |
1da177e4 LT |
72 | |
73 | #include <asm/processor.h> /* Processor type for cache alignment. */ | |
74 | #include <asm/io.h> | |
75 | #include <asm/irq.h> | |
76 | #include <asm/uaccess.h> /* User space memory access functions */ | |
77 | ||
78 | #include "sis900.h" | |
79 | ||
80 | #define SIS900_MODULE_NAME "sis900" | |
d269a69f | 81 | #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006" |
1da177e4 LT |
82 | |
83 | static char version[] __devinitdata = | |
84 | KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n"; | |
85 | ||
86 | static int max_interrupt_work = 40; | |
87 | static int multicast_filter_limit = 128; | |
88 | ||
89 | static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ | |
90 | ||
91 | #define SIS900_DEF_MSG \ | |
92 | (NETIF_MSG_DRV | \ | |
93 | NETIF_MSG_LINK | \ | |
94 | NETIF_MSG_RX_ERR | \ | |
95 | NETIF_MSG_TX_ERR) | |
96 | ||
97 | /* Time in jiffies before concluding the transmitter is hung. */ | |
98 | #define TX_TIMEOUT (4*HZ) | |
1da177e4 LT |
99 | |
100 | enum { | |
101 | SIS_900 = 0, | |
102 | SIS_7016 | |
103 | }; | |
f71e1309 | 104 | static const char * card_names[] = { |
1da177e4 LT |
105 | "SiS 900 PCI Fast Ethernet", |
106 | "SiS 7016 PCI Fast Ethernet" | |
107 | }; | |
108 | static struct pci_device_id sis900_pci_tbl [] = { | |
109 | {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900, | |
110 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900}, | |
111 | {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016, | |
112 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016}, | |
113 | {0,} | |
114 | }; | |
115 | MODULE_DEVICE_TABLE (pci, sis900_pci_tbl); | |
116 | ||
117 | static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex); | |
118 | ||
f71e1309 | 119 | static const struct mii_chip_info { |
1da177e4 LT |
120 | const char * name; |
121 | u16 phy_id0; | |
122 | u16 phy_id1; | |
123 | u8 phy_types; | |
124 | #define HOME 0x0001 | |
125 | #define LAN 0x0002 | |
126 | #define MIX 0x0003 | |
127 | #define UNKNOWN 0x0 | |
128 | } mii_chip_table[] = { | |
129 | { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN }, | |
130 | { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN }, | |
d8e95e52 | 131 | { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN }, |
1da177e4 | 132 | { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN }, |
494aced2 | 133 | { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN }, |
1da177e4 LT |
134 | { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN }, |
135 | { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME}, | |
136 | { "ICS LAN PHY", 0x0015, 0xF440, LAN }, | |
80a8003f | 137 | { "ICS LAN PHY", 0x0143, 0xBC70, LAN }, |
1da177e4 LT |
138 | { "NS 83851 PHY", 0x2000, 0x5C20, MIX }, |
139 | { "NS 83847 PHY", 0x2000, 0x5C30, MIX }, | |
140 | { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN }, | |
141 | { "VIA 6103 PHY", 0x0101, 0x8f20, LAN }, | |
142 | {NULL,}, | |
143 | }; | |
144 | ||
145 | struct mii_phy { | |
146 | struct mii_phy * next; | |
147 | int phy_addr; | |
148 | u16 phy_id0; | |
149 | u16 phy_id1; | |
150 | u16 status; | |
151 | u8 phy_types; | |
152 | }; | |
153 | ||
154 | typedef struct _BufferDesc { | |
155 | u32 link; | |
156 | u32 cmdsts; | |
157 | u32 bufptr; | |
158 | } BufferDesc; | |
159 | ||
160 | struct sis900_private { | |
1da177e4 LT |
161 | struct pci_dev * pci_dev; |
162 | ||
163 | spinlock_t lock; | |
164 | ||
165 | struct mii_phy * mii; | |
166 | struct mii_phy * first_mii; /* record the first mii structure */ | |
167 | unsigned int cur_phy; | |
da369b01 | 168 | struct mii_if_info mii_info; |
1da177e4 LT |
169 | |
170 | struct timer_list timer; /* Link status detection timer. */ | |
171 | u8 autong_complete; /* 1: auto-negotiate complete */ | |
172 | ||
173 | u32 msg_enable; | |
174 | ||
175 | unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */ | |
176 | unsigned int cur_tx, dirty_tx; | |
177 | ||
178 | /* The saved address of a sent/receive-in-place packet buffer */ | |
179 | struct sk_buff *tx_skbuff[NUM_TX_DESC]; | |
180 | struct sk_buff *rx_skbuff[NUM_RX_DESC]; | |
181 | BufferDesc *tx_ring; | |
182 | BufferDesc *rx_ring; | |
183 | ||
184 | dma_addr_t tx_ring_dma; | |
185 | dma_addr_t rx_ring_dma; | |
186 | ||
187 | unsigned int tx_full; /* The Tx queue is full. */ | |
188 | u8 host_bridge_rev; | |
189 | u8 chipset_rev; | |
190 | }; | |
191 | ||
192 | MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>"); | |
193 | MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver"); | |
194 | MODULE_LICENSE("GPL"); | |
195 | ||
196 | module_param(multicast_filter_limit, int, 0444); | |
197 | module_param(max_interrupt_work, int, 0444); | |
198 | module_param(sis900_debug, int, 0444); | |
199 | MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses"); | |
200 | MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt"); | |
201 | MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level"); | |
202 | ||
203 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
204 | static void sis900_poll(struct net_device *dev); | |
205 | #endif | |
206 | static int sis900_open(struct net_device *net_dev); | |
207 | static int sis900_mii_probe (struct net_device * net_dev); | |
208 | static void sis900_init_rxfilter (struct net_device * net_dev); | |
209 | static u16 read_eeprom(long ioaddr, int location); | |
da369b01 | 210 | static int mdio_read(struct net_device *net_dev, int phy_id, int location); |
1da177e4 LT |
211 | static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val); |
212 | static void sis900_timer(unsigned long data); | |
213 | static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy); | |
214 | static void sis900_tx_timeout(struct net_device *net_dev); | |
215 | static void sis900_init_tx_ring(struct net_device *net_dev); | |
216 | static void sis900_init_rx_ring(struct net_device *net_dev); | |
217 | static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev); | |
218 | static int sis900_rx(struct net_device *net_dev); | |
219 | static void sis900_finish_xmit (struct net_device *net_dev); | |
7d12e780 | 220 | static irqreturn_t sis900_interrupt(int irq, void *dev_instance); |
1da177e4 LT |
221 | static int sis900_close(struct net_device *net_dev); |
222 | static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd); | |
1da177e4 LT |
223 | static u16 sis900_mcast_bitnr(u8 *addr, u8 revision); |
224 | static void set_rx_mode(struct net_device *net_dev); | |
225 | static void sis900_reset(struct net_device *net_dev); | |
226 | static void sis630_set_eq(struct net_device *net_dev, u8 revision); | |
227 | static int sis900_set_config(struct net_device *dev, struct ifmap *map); | |
228 | static u16 sis900_default_phy(struct net_device * net_dev); | |
229 | static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy); | |
230 | static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr); | |
231 | static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr); | |
232 | static void sis900_set_mode (long ioaddr, int speed, int duplex); | |
7282d491 | 233 | static const struct ethtool_ops sis900_ethtool_ops; |
1da177e4 LT |
234 | |
235 | /** | |
236 | * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model | |
237 | * @pci_dev: the sis900 pci device | |
6aa20a22 | 238 | * @net_dev: the net device to get address for |
1da177e4 LT |
239 | * |
240 | * Older SiS900 and friends, use EEPROM to store MAC address. | |
241 | * MAC address is read from read_eeprom() into @net_dev->dev_addr. | |
242 | */ | |
243 | ||
244 | static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev) | |
245 | { | |
246 | long ioaddr = pci_resource_start(pci_dev, 0); | |
247 | u16 signature; | |
248 | int i; | |
249 | ||
250 | /* check to see if we have sane EEPROM */ | |
6aa20a22 | 251 | signature = (u16) read_eeprom(ioaddr, EEPROMSignature); |
1da177e4 | 252 | if (signature == 0xffff || signature == 0x0000) { |
6aa20a22 | 253 | printk (KERN_WARNING "%s: Error EERPOM read %x\n", |
1da177e4 LT |
254 | pci_name(pci_dev), signature); |
255 | return 0; | |
256 | } | |
257 | ||
258 | /* get MAC address from EEPROM */ | |
259 | for (i = 0; i < 3; i++) | |
260 | ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); | |
261 | ||
262 | return 1; | |
263 | } | |
264 | ||
265 | /** | |
266 | * sis630e_get_mac_addr - Get MAC address for SiS630E model | |
267 | * @pci_dev: the sis900 pci device | |
6aa20a22 | 268 | * @net_dev: the net device to get address for |
1da177e4 LT |
269 | * |
270 | * SiS630E model, use APC CMOS RAM to store MAC address. | |
271 | * APC CMOS RAM is accessed through ISA bridge. | |
272 | * MAC address is read into @net_dev->dev_addr. | |
273 | */ | |
274 | ||
275 | static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev, | |
276 | struct net_device *net_dev) | |
277 | { | |
278 | struct pci_dev *isa_bridge = NULL; | |
279 | u8 reg; | |
280 | int i; | |
281 | ||
282 | isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge); | |
283 | if (!isa_bridge) | |
284 | isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge); | |
285 | if (!isa_bridge) { | |
286 | printk(KERN_WARNING "%s: Can not find ISA bridge\n", | |
287 | pci_name(pci_dev)); | |
288 | return 0; | |
289 | } | |
290 | pci_read_config_byte(isa_bridge, 0x48, ®); | |
291 | pci_write_config_byte(isa_bridge, 0x48, reg | 0x40); | |
292 | ||
293 | for (i = 0; i < 6; i++) { | |
294 | outb(0x09 + i, 0x70); | |
6aa20a22 | 295 | ((u8 *)(net_dev->dev_addr))[i] = inb(0x71); |
1da177e4 LT |
296 | } |
297 | pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40); | |
298 | pci_dev_put(isa_bridge); | |
299 | ||
300 | return 1; | |
301 | } | |
302 | ||
303 | ||
304 | /** | |
305 | * sis635_get_mac_addr - Get MAC address for SIS635 model | |
306 | * @pci_dev: the sis900 pci device | |
6aa20a22 | 307 | * @net_dev: the net device to get address for |
1da177e4 LT |
308 | * |
309 | * SiS635 model, set MAC Reload Bit to load Mac address from APC | |
6aa20a22 | 310 | * to rfdr. rfdr is accessed through rfcr. MAC address is read into |
1da177e4 LT |
311 | * @net_dev->dev_addr. |
312 | */ | |
313 | ||
314 | static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev, | |
315 | struct net_device *net_dev) | |
316 | { | |
317 | long ioaddr = net_dev->base_addr; | |
318 | u32 rfcrSave; | |
319 | u32 i; | |
320 | ||
321 | rfcrSave = inl(rfcr + ioaddr); | |
322 | ||
323 | outl(rfcrSave | RELOAD, ioaddr + cr); | |
324 | outl(0, ioaddr + cr); | |
325 | ||
326 | /* disable packet filtering before setting filter */ | |
327 | outl(rfcrSave & ~RFEN, rfcr + ioaddr); | |
328 | ||
329 | /* load MAC addr to filter data register */ | |
330 | for (i = 0 ; i < 3 ; i++) { | |
331 | outl((i << RFADDR_shift), ioaddr + rfcr); | |
332 | *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr); | |
333 | } | |
334 | ||
335 | /* enable packet filtering */ | |
336 | outl(rfcrSave | RFEN, rfcr + ioaddr); | |
337 | ||
338 | return 1; | |
339 | } | |
340 | ||
341 | /** | |
342 | * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model | |
343 | * @pci_dev: the sis900 pci device | |
6aa20a22 | 344 | * @net_dev: the net device to get address for |
1da177e4 | 345 | * |
6aa20a22 | 346 | * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM |
1da177e4 | 347 | * is shared by |
6aa20a22 JG |
348 | * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first |
349 | * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access | |
1da177e4 | 350 | * by LAN, otherwise is not. After MAC address is read from EEPROM, send |
6aa20a22 JG |
351 | * EEDONE signal to refuse EEPROM access by LAN. |
352 | * The EEPROM map of SiS962 or SiS963 is different to SiS900. | |
353 | * The signature field in SiS962 or SiS963 spec is meaningless. | |
1da177e4 LT |
354 | * MAC address is read into @net_dev->dev_addr. |
355 | */ | |
356 | ||
357 | static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, | |
358 | struct net_device *net_dev) | |
359 | { | |
360 | long ioaddr = net_dev->base_addr; | |
361 | long ee_addr = ioaddr + mear; | |
362 | u32 waittime = 0; | |
363 | int i; | |
6aa20a22 | 364 | |
1da177e4 LT |
365 | outl(EEREQ, ee_addr); |
366 | while(waittime < 2000) { | |
367 | if(inl(ee_addr) & EEGNT) { | |
368 | ||
369 | /* get MAC address from EEPROM */ | |
370 | for (i = 0; i < 3; i++) | |
371 | ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr); | |
372 | ||
373 | outl(EEDONE, ee_addr); | |
374 | return 1; | |
375 | } else { | |
6aa20a22 | 376 | udelay(1); |
1da177e4 LT |
377 | waittime ++; |
378 | } | |
379 | } | |
380 | outl(EEDONE, ee_addr); | |
381 | return 0; | |
382 | } | |
383 | ||
09ab9e7c SH |
384 | static const struct net_device_ops sis900_netdev_ops = { |
385 | .ndo_open = sis900_open, | |
386 | .ndo_stop = sis900_close, | |
387 | .ndo_start_xmit = sis900_start_xmit, | |
388 | .ndo_set_config = sis900_set_config, | |
389 | .ndo_set_multicast_list = set_rx_mode, | |
390 | .ndo_change_mtu = eth_change_mtu, | |
391 | .ndo_validate_addr = eth_validate_addr, | |
fe96aaa1 | 392 | .ndo_set_mac_address = eth_mac_addr, |
09ab9e7c SH |
393 | .ndo_do_ioctl = mii_ioctl, |
394 | .ndo_tx_timeout = sis900_tx_timeout, | |
395 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
396 | .ndo_poll_controller = sis900_poll, | |
397 | #endif | |
398 | }; | |
399 | ||
1da177e4 LT |
400 | /** |
401 | * sis900_probe - Probe for sis900 device | |
402 | * @pci_dev: the sis900 pci device | |
403 | * @pci_id: the pci device ID | |
404 | * | |
405 | * Check and probe sis900 net device for @pci_dev. | |
6aa20a22 | 406 | * Get mac address according to the chip revision, |
1da177e4 LT |
407 | * and assign SiS900-specific entries in the device structure. |
408 | * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc. | |
409 | */ | |
410 | ||
411 | static int __devinit sis900_probe(struct pci_dev *pci_dev, | |
412 | const struct pci_device_id *pci_id) | |
413 | { | |
414 | struct sis900_private *sis_priv; | |
415 | struct net_device *net_dev; | |
416 | struct pci_dev *dev; | |
417 | dma_addr_t ring_dma; | |
418 | void *ring_space; | |
419 | long ioaddr; | |
420 | int i, ret; | |
f71e1309 | 421 | const char *card_name = card_names[pci_id->driver_data]; |
1da177e4 LT |
422 | const char *dev_name = pci_name(pci_dev); |
423 | ||
424 | /* when built into the kernel, we only print version if device is found */ | |
425 | #ifndef MODULE | |
426 | static int printed_version; | |
427 | if (!printed_version++) | |
428 | printk(version); | |
429 | #endif | |
430 | ||
431 | /* setup various bits in PCI command register */ | |
432 | ret = pci_enable_device(pci_dev); | |
433 | if(ret) return ret; | |
6aa20a22 | 434 | |
12b279f9 | 435 | i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK); |
1da177e4 | 436 | if(i){ |
2450022a | 437 | printk(KERN_ERR "sis900.c: architecture does not support " |
1da177e4 LT |
438 | "32bit PCI busmaster DMA\n"); |
439 | return i; | |
440 | } | |
6aa20a22 | 441 | |
1da177e4 | 442 | pci_set_master(pci_dev); |
6aa20a22 | 443 | |
1da177e4 LT |
444 | net_dev = alloc_etherdev(sizeof(struct sis900_private)); |
445 | if (!net_dev) | |
446 | return -ENOMEM; | |
1da177e4 LT |
447 | SET_NETDEV_DEV(net_dev, &pci_dev->dev); |
448 | ||
449 | /* We do a request_region() to register /proc/ioports info. */ | |
6aa20a22 | 450 | ioaddr = pci_resource_start(pci_dev, 0); |
1da177e4 LT |
451 | ret = pci_request_regions(pci_dev, "sis900"); |
452 | if (ret) | |
453 | goto err_out; | |
454 | ||
8f15ea42 | 455 | sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
456 | net_dev->base_addr = ioaddr; |
457 | net_dev->irq = pci_dev->irq; | |
458 | sis_priv->pci_dev = pci_dev; | |
459 | spin_lock_init(&sis_priv->lock); | |
460 | ||
461 | pci_set_drvdata(pci_dev, net_dev); | |
462 | ||
463 | ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma); | |
464 | if (!ring_space) { | |
465 | ret = -ENOMEM; | |
466 | goto err_out_cleardev; | |
467 | } | |
468 | sis_priv->tx_ring = (BufferDesc *)ring_space; | |
469 | sis_priv->tx_ring_dma = ring_dma; | |
470 | ||
471 | ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma); | |
472 | if (!ring_space) { | |
473 | ret = -ENOMEM; | |
474 | goto err_unmap_tx; | |
475 | } | |
476 | sis_priv->rx_ring = (BufferDesc *)ring_space; | |
477 | sis_priv->rx_ring_dma = ring_dma; | |
6aa20a22 | 478 | |
1da177e4 | 479 | /* The SiS900-specific entries in the device structure. */ |
09ab9e7c | 480 | net_dev->netdev_ops = &sis900_netdev_ops; |
1da177e4 LT |
481 | net_dev->watchdog_timeo = TX_TIMEOUT; |
482 | net_dev->ethtool_ops = &sis900_ethtool_ops; | |
483 | ||
1da177e4 LT |
484 | if (sis900_debug > 0) |
485 | sis_priv->msg_enable = sis900_debug; | |
486 | else | |
487 | sis_priv->msg_enable = SIS900_DEF_MSG; | |
da369b01 DV |
488 | |
489 | sis_priv->mii_info.dev = net_dev; | |
490 | sis_priv->mii_info.mdio_read = mdio_read; | |
491 | sis_priv->mii_info.mdio_write = mdio_write; | |
492 | sis_priv->mii_info.phy_id_mask = 0x1f; | |
493 | sis_priv->mii_info.reg_num_mask = 0x1f; | |
494 | ||
1da177e4 LT |
495 | /* Get Mac address according to the chip revision */ |
496 | pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev)); | |
497 | if(netif_msg_probe(sis_priv)) | |
498 | printk(KERN_DEBUG "%s: detected revision %2.2x, " | |
499 | "trying to get MAC address...\n", | |
500 | dev_name, sis_priv->chipset_rev); | |
6aa20a22 | 501 | |
1da177e4 LT |
502 | ret = 0; |
503 | if (sis_priv->chipset_rev == SIS630E_900_REV) | |
504 | ret = sis630e_get_mac_addr(pci_dev, net_dev); | |
505 | else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) ) | |
506 | ret = sis635_get_mac_addr(pci_dev, net_dev); | |
507 | else if (sis_priv->chipset_rev == SIS96x_900_REV) | |
508 | ret = sis96x_get_mac_addr(pci_dev, net_dev); | |
509 | else | |
510 | ret = sis900_get_mac_addr(pci_dev, net_dev); | |
511 | ||
512 | if (ret == 0) { | |
513 | printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name); | |
514 | ret = -ENODEV; | |
515 | goto err_unmap_rx; | |
516 | } | |
6aa20a22 | 517 | |
1da177e4 LT |
518 | /* 630ET : set the mii access mode as software-mode */ |
519 | if (sis_priv->chipset_rev == SIS630ET_900_REV) | |
520 | outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr); | |
521 | ||
522 | /* probe for mii transceiver */ | |
523 | if (sis900_mii_probe(net_dev) == 0) { | |
524 | printk(KERN_WARNING "%s: Error probing MII device.\n", | |
525 | dev_name); | |
526 | ret = -ENODEV; | |
527 | goto err_unmap_rx; | |
528 | } | |
529 | ||
530 | /* save our host bridge revision */ | |
531 | dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL); | |
532 | if (dev) { | |
533 | pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev); | |
534 | pci_dev_put(dev); | |
535 | } | |
536 | ||
537 | ret = register_netdev(net_dev); | |
538 | if (ret) | |
539 | goto err_unmap_rx; | |
540 | ||
541 | /* print some information about our NIC */ | |
e174961c | 542 | printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n", |
0795af57 | 543 | net_dev->name, card_name, ioaddr, net_dev->irq, |
e174961c | 544 | net_dev->dev_addr); |
1da177e4 | 545 | |
ea37ccea | 546 | /* Detect Wake on Lan support */ |
7bef4b39 | 547 | ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27; |
ea37ccea DV |
548 | if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) |
549 | printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); | |
550 | ||
1da177e4 LT |
551 | return 0; |
552 | ||
553 | err_unmap_rx: | |
554 | pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, | |
555 | sis_priv->rx_ring_dma); | |
556 | err_unmap_tx: | |
557 | pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, | |
558 | sis_priv->tx_ring_dma); | |
559 | err_out_cleardev: | |
560 | pci_set_drvdata(pci_dev, NULL); | |
561 | pci_release_regions(pci_dev); | |
562 | err_out: | |
563 | free_netdev(net_dev); | |
564 | return ret; | |
565 | } | |
566 | ||
567 | /** | |
568 | * sis900_mii_probe - Probe MII PHY for sis900 | |
569 | * @net_dev: the net device to probe for | |
6aa20a22 | 570 | * |
1da177e4 LT |
571 | * Search for total of 32 possible mii phy addresses. |
572 | * Identify and set current phy if found one, | |
573 | * return error if it failed to found. | |
574 | */ | |
575 | ||
4e50a8e3 | 576 | static int __devinit sis900_mii_probe(struct net_device * net_dev) |
1da177e4 | 577 | { |
8f15ea42 | 578 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
579 | const char *dev_name = pci_name(sis_priv->pci_dev); |
580 | u16 poll_bit = MII_STAT_LINK, status = 0; | |
581 | unsigned long timeout = jiffies + 5 * HZ; | |
582 | int phy_addr; | |
583 | ||
584 | sis_priv->mii = NULL; | |
585 | ||
586 | /* search for total of 32 possible mii phy addresses */ | |
6aa20a22 | 587 | for (phy_addr = 0; phy_addr < 32; phy_addr++) { |
1da177e4 LT |
588 | struct mii_phy * mii_phy = NULL; |
589 | u16 mii_status; | |
590 | int i; | |
591 | ||
592 | mii_phy = NULL; | |
593 | for(i = 0; i < 2; i++) | |
594 | mii_status = mdio_read(net_dev, phy_addr, MII_STATUS); | |
595 | ||
596 | if (mii_status == 0xffff || mii_status == 0x0000) { | |
597 | if (netif_msg_probe(sis_priv)) | |
598 | printk(KERN_DEBUG "%s: MII at address %d" | |
599 | " not accessible\n", | |
600 | dev_name, phy_addr); | |
601 | continue; | |
602 | } | |
6aa20a22 | 603 | |
1da177e4 LT |
604 | if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) { |
605 | printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n"); | |
606 | mii_phy = sis_priv->first_mii; | |
607 | while (mii_phy) { | |
608 | struct mii_phy *phy; | |
609 | phy = mii_phy; | |
610 | mii_phy = mii_phy->next; | |
611 | kfree(phy); | |
612 | } | |
613 | return 0; | |
614 | } | |
6aa20a22 | 615 | |
1da177e4 | 616 | mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0); |
6aa20a22 | 617 | mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1); |
1da177e4 LT |
618 | mii_phy->phy_addr = phy_addr; |
619 | mii_phy->status = mii_status; | |
620 | mii_phy->next = sis_priv->mii; | |
621 | sis_priv->mii = mii_phy; | |
622 | sis_priv->first_mii = mii_phy; | |
623 | ||
624 | for (i = 0; mii_chip_table[i].phy_id1; i++) | |
625 | if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) && | |
626 | ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){ | |
627 | mii_phy->phy_types = mii_chip_table[i].phy_types; | |
628 | if (mii_chip_table[i].phy_types == MIX) | |
629 | mii_phy->phy_types = | |
630 | (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME; | |
631 | printk(KERN_INFO "%s: %s transceiver found " | |
632 | "at address %d.\n", | |
633 | dev_name, | |
634 | mii_chip_table[i].name, | |
635 | phy_addr); | |
636 | break; | |
637 | } | |
6aa20a22 | 638 | |
1da177e4 LT |
639 | if( !mii_chip_table[i].phy_id1 ) { |
640 | printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n", | |
641 | dev_name, phy_addr); | |
642 | mii_phy->phy_types = UNKNOWN; | |
643 | } | |
644 | } | |
6aa20a22 | 645 | |
1da177e4 LT |
646 | if (sis_priv->mii == NULL) { |
647 | printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name); | |
648 | return 0; | |
649 | } | |
650 | ||
651 | /* select default PHY for mac */ | |
652 | sis_priv->mii = NULL; | |
653 | sis900_default_phy( net_dev ); | |
654 | ||
655 | /* Reset phy if default phy is internal sis900 */ | |
656 | if ((sis_priv->mii->phy_id0 == 0x001D) && | |
657 | ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000)) | |
658 | status = sis900_reset_phy(net_dev, sis_priv->cur_phy); | |
6aa20a22 | 659 | |
1da177e4 LT |
660 | /* workaround for ICS1893 PHY */ |
661 | if ((sis_priv->mii->phy_id0 == 0x0015) && | |
662 | ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440)) | |
663 | mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200); | |
664 | ||
665 | if(status & MII_STAT_LINK){ | |
666 | while (poll_bit) { | |
667 | yield(); | |
668 | ||
669 | poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit); | |
670 | if (time_after_eq(jiffies, timeout)) { | |
671 | printk(KERN_WARNING "%s: reset phy and link down now\n", | |
672 | dev_name); | |
673 | return -ETIME; | |
674 | } | |
675 | } | |
676 | } | |
677 | ||
678 | if (sis_priv->chipset_rev == SIS630E_900_REV) { | |
679 | /* SiS 630E has some bugs on default value of PHY registers */ | |
680 | mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1); | |
681 | mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22); | |
682 | mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00); | |
683 | mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0); | |
6aa20a22 | 684 | //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000); |
1da177e4 LT |
685 | } |
686 | ||
687 | if (sis_priv->mii->status & MII_STAT_LINK) | |
688 | netif_carrier_on(net_dev); | |
689 | else | |
690 | netif_carrier_off(net_dev); | |
691 | ||
692 | return 1; | |
693 | } | |
694 | ||
695 | /** | |
696 | * sis900_default_phy - Select default PHY for sis900 mac. | |
697 | * @net_dev: the net device to probe for | |
698 | * | |
699 | * Select first detected PHY with link as default. | |
700 | * If no one is link on, select PHY whose types is HOME as default. | |
701 | * If HOME doesn't exist, select LAN. | |
702 | */ | |
703 | ||
704 | static u16 sis900_default_phy(struct net_device * net_dev) | |
705 | { | |
8f15ea42 | 706 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
6aa20a22 | 707 | struct mii_phy *phy = NULL, *phy_home = NULL, |
1da177e4 LT |
708 | *default_phy = NULL, *phy_lan = NULL; |
709 | u16 status; | |
710 | ||
711 | for (phy=sis_priv->first_mii; phy; phy=phy->next) { | |
712 | status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); | |
713 | status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); | |
714 | ||
715 | /* Link ON & Not select default PHY & not ghost PHY */ | |
716 | if ((status & MII_STAT_LINK) && !default_phy && | |
717 | (phy->phy_types != UNKNOWN)) | |
718 | default_phy = phy; | |
719 | else { | |
720 | status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); | |
721 | mdio_write(net_dev, phy->phy_addr, MII_CONTROL, | |
722 | status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); | |
723 | if (phy->phy_types == HOME) | |
724 | phy_home = phy; | |
725 | else if(phy->phy_types == LAN) | |
726 | phy_lan = phy; | |
727 | } | |
728 | } | |
729 | ||
730 | if (!default_phy && phy_home) | |
731 | default_phy = phy_home; | |
732 | else if (!default_phy && phy_lan) | |
733 | default_phy = phy_lan; | |
734 | else if (!default_phy) | |
735 | default_phy = sis_priv->first_mii; | |
736 | ||
737 | if (sis_priv->mii != default_phy) { | |
738 | sis_priv->mii = default_phy; | |
739 | sis_priv->cur_phy = default_phy->phy_addr; | |
740 | printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", | |
741 | pci_name(sis_priv->pci_dev), sis_priv->cur_phy); | |
742 | } | |
6aa20a22 | 743 | |
da369b01 DV |
744 | sis_priv->mii_info.phy_id = sis_priv->cur_phy; |
745 | ||
1da177e4 LT |
746 | status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL); |
747 | status &= (~MII_CNTL_ISOLATE); | |
748 | ||
6aa20a22 | 749 | mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status); |
1da177e4 LT |
750 | status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); |
751 | status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); | |
752 | ||
6aa20a22 | 753 | return status; |
1da177e4 LT |
754 | } |
755 | ||
756 | ||
757 | /** | |
758 | * sis900_set_capability - set the media capability of network adapter. | |
759 | * @net_dev : the net device to probe for | |
760 | * @phy : default PHY | |
761 | * | |
762 | * Set the media capability of network adapter according to | |
763 | * mii status register. It's necessary before auto-negotiate. | |
764 | */ | |
6aa20a22 | 765 | |
1da177e4 LT |
766 | static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy) |
767 | { | |
768 | u16 cap; | |
769 | u16 status; | |
6aa20a22 | 770 | |
1da177e4 LT |
771 | status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); |
772 | status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); | |
6aa20a22 | 773 | |
1da177e4 LT |
774 | cap = MII_NWAY_CSMA_CD | |
775 | ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) | | |
776 | ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) | | |
777 | ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)| | |
778 | ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0); | |
779 | ||
780 | mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap); | |
781 | } | |
782 | ||
783 | ||
784 | /* Delay between EEPROM clock transitions. */ | |
785 | #define eeprom_delay() inl(ee_addr) | |
786 | ||
787 | /** | |
788 | * read_eeprom - Read Serial EEPROM | |
789 | * @ioaddr: base i/o address | |
790 | * @location: the EEPROM location to read | |
791 | * | |
792 | * Read Serial EEPROM through EEPROM Access Register. | |
793 | * Note that location is in word (16 bits) unit | |
794 | */ | |
795 | ||
796 | static u16 __devinit read_eeprom(long ioaddr, int location) | |
797 | { | |
798 | int i; | |
799 | u16 retval = 0; | |
800 | long ee_addr = ioaddr + mear; | |
801 | u32 read_cmd = location | EEread; | |
802 | ||
803 | outl(0, ee_addr); | |
804 | eeprom_delay(); | |
805 | outl(EECS, ee_addr); | |
806 | eeprom_delay(); | |
807 | ||
808 | /* Shift the read command (9) bits out. */ | |
809 | for (i = 8; i >= 0; i--) { | |
810 | u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS; | |
811 | outl(dataval, ee_addr); | |
812 | eeprom_delay(); | |
813 | outl(dataval | EECLK, ee_addr); | |
814 | eeprom_delay(); | |
815 | } | |
816 | outl(EECS, ee_addr); | |
817 | eeprom_delay(); | |
818 | ||
819 | /* read the 16-bits data in */ | |
820 | for (i = 16; i > 0; i--) { | |
821 | outl(EECS, ee_addr); | |
822 | eeprom_delay(); | |
823 | outl(EECS | EECLK, ee_addr); | |
824 | eeprom_delay(); | |
825 | retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0); | |
826 | eeprom_delay(); | |
827 | } | |
828 | ||
829 | /* Terminate the EEPROM access. */ | |
830 | outl(0, ee_addr); | |
831 | eeprom_delay(); | |
832 | ||
833 | return (retval); | |
834 | } | |
835 | ||
836 | /* Read and write the MII management registers using software-generated | |
837 | serial MDIO protocol. Note that the command bits and data bits are | |
838 | send out separately */ | |
839 | #define mdio_delay() inl(mdio_addr) | |
840 | ||
841 | static void mdio_idle(long mdio_addr) | |
842 | { | |
843 | outl(MDIO | MDDIR, mdio_addr); | |
844 | mdio_delay(); | |
845 | outl(MDIO | MDDIR | MDC, mdio_addr); | |
846 | } | |
847 | ||
848 | /* Syncronize the MII management interface by shifting 32 one bits out. */ | |
849 | static void mdio_reset(long mdio_addr) | |
850 | { | |
851 | int i; | |
852 | ||
853 | for (i = 31; i >= 0; i--) { | |
854 | outl(MDDIR | MDIO, mdio_addr); | |
855 | mdio_delay(); | |
856 | outl(MDDIR | MDIO | MDC, mdio_addr); | |
857 | mdio_delay(); | |
858 | } | |
859 | return; | |
860 | } | |
861 | ||
862 | /** | |
863 | * mdio_read - read MII PHY register | |
864 | * @net_dev: the net device to read | |
865 | * @phy_id: the phy address to read | |
866 | * @location: the phy regiester id to read | |
867 | * | |
868 | * Read MII registers through MDIO and MDC | |
869 | * using MDIO management frame structure and protocol(defined by ISO/IEC). | |
870 | * Please see SiS7014 or ICS spec | |
871 | */ | |
872 | ||
da369b01 | 873 | static int mdio_read(struct net_device *net_dev, int phy_id, int location) |
1da177e4 LT |
874 | { |
875 | long mdio_addr = net_dev->base_addr + mear; | |
876 | int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift); | |
877 | u16 retval = 0; | |
878 | int i; | |
879 | ||
880 | mdio_reset(mdio_addr); | |
881 | mdio_idle(mdio_addr); | |
882 | ||
883 | for (i = 15; i >= 0; i--) { | |
884 | int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; | |
885 | outl(dataval, mdio_addr); | |
886 | mdio_delay(); | |
887 | outl(dataval | MDC, mdio_addr); | |
888 | mdio_delay(); | |
889 | } | |
890 | ||
891 | /* Read the 16 data bits. */ | |
892 | for (i = 16; i > 0; i--) { | |
893 | outl(0, mdio_addr); | |
894 | mdio_delay(); | |
895 | retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0); | |
896 | outl(MDC, mdio_addr); | |
897 | mdio_delay(); | |
898 | } | |
899 | outl(0x00, mdio_addr); | |
900 | ||
901 | return retval; | |
902 | } | |
903 | ||
904 | /** | |
905 | * mdio_write - write MII PHY register | |
906 | * @net_dev: the net device to write | |
907 | * @phy_id: the phy address to write | |
908 | * @location: the phy regiester id to write | |
909 | * @value: the register value to write with | |
910 | * | |
911 | * Write MII registers with @value through MDIO and MDC | |
912 | * using MDIO management frame structure and protocol(defined by ISO/IEC) | |
913 | * please see SiS7014 or ICS spec | |
914 | */ | |
915 | ||
916 | static void mdio_write(struct net_device *net_dev, int phy_id, int location, | |
917 | int value) | |
918 | { | |
919 | long mdio_addr = net_dev->base_addr + mear; | |
920 | int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift); | |
921 | int i; | |
922 | ||
923 | mdio_reset(mdio_addr); | |
924 | mdio_idle(mdio_addr); | |
925 | ||
926 | /* Shift the command bits out. */ | |
927 | for (i = 15; i >= 0; i--) { | |
928 | int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR; | |
929 | outb(dataval, mdio_addr); | |
930 | mdio_delay(); | |
931 | outb(dataval | MDC, mdio_addr); | |
932 | mdio_delay(); | |
933 | } | |
934 | mdio_delay(); | |
935 | ||
936 | /* Shift the value bits out. */ | |
937 | for (i = 15; i >= 0; i--) { | |
938 | int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR; | |
939 | outl(dataval, mdio_addr); | |
940 | mdio_delay(); | |
941 | outl(dataval | MDC, mdio_addr); | |
942 | mdio_delay(); | |
943 | } | |
944 | mdio_delay(); | |
945 | ||
946 | /* Clear out extra bits. */ | |
947 | for (i = 2; i > 0; i--) { | |
948 | outb(0, mdio_addr); | |
949 | mdio_delay(); | |
950 | outb(MDC, mdio_addr); | |
951 | mdio_delay(); | |
952 | } | |
953 | outl(0x00, mdio_addr); | |
954 | ||
955 | return; | |
956 | } | |
957 | ||
958 | ||
959 | /** | |
960 | * sis900_reset_phy - reset sis900 mii phy. | |
961 | * @net_dev: the net device to write | |
962 | * @phy_addr: default phy address | |
963 | * | |
964 | * Some specific phy can't work properly without reset. | |
965 | * This function will be called during initialization and | |
966 | * link status change from ON to DOWN. | |
967 | */ | |
968 | ||
969 | static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr) | |
970 | { | |
f3be9742 | 971 | int i; |
1da177e4 LT |
972 | u16 status; |
973 | ||
f3be9742 | 974 | for (i = 0; i < 2; i++) |
1da177e4 LT |
975 | status = mdio_read(net_dev, phy_addr, MII_STATUS); |
976 | ||
977 | mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET ); | |
6aa20a22 | 978 | |
1da177e4 LT |
979 | return status; |
980 | } | |
981 | ||
982 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
983 | /* | |
984 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
985 | * without having to re-enable interrupts. It's not called while | |
986 | * the interrupt routine is executing. | |
987 | */ | |
988 | static void sis900_poll(struct net_device *dev) | |
989 | { | |
990 | disable_irq(dev->irq); | |
7d12e780 | 991 | sis900_interrupt(dev->irq, dev); |
1da177e4 LT |
992 | enable_irq(dev->irq); |
993 | } | |
994 | #endif | |
995 | ||
996 | /** | |
997 | * sis900_open - open sis900 device | |
998 | * @net_dev: the net device to open | |
999 | * | |
1000 | * Do some initialization and start net interface. | |
1001 | * enable interrupts and set sis900 timer. | |
1002 | */ | |
1003 | ||
1004 | static int | |
1005 | sis900_open(struct net_device *net_dev) | |
1006 | { | |
8f15ea42 | 1007 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1008 | long ioaddr = net_dev->base_addr; |
1009 | int ret; | |
1010 | ||
1011 | /* Soft reset the chip. */ | |
1012 | sis900_reset(net_dev); | |
1013 | ||
1014 | /* Equalizer workaround Rule */ | |
1015 | sis630_set_eq(net_dev, sis_priv->chipset_rev); | |
1016 | ||
1fb9df5d | 1017 | ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED, |
1da177e4 LT |
1018 | net_dev->name, net_dev); |
1019 | if (ret) | |
1020 | return ret; | |
1021 | ||
1022 | sis900_init_rxfilter(net_dev); | |
1023 | ||
1024 | sis900_init_tx_ring(net_dev); | |
1025 | sis900_init_rx_ring(net_dev); | |
1026 | ||
1027 | set_rx_mode(net_dev); | |
1028 | ||
1029 | netif_start_queue(net_dev); | |
1030 | ||
1031 | /* Workaround for EDB */ | |
1032 | sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); | |
1033 | ||
1034 | /* Enable all known interrupts by setting the interrupt mask. */ | |
1035 | outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); | |
1036 | outl(RxENA | inl(ioaddr + cr), ioaddr + cr); | |
1037 | outl(IE, ioaddr + ier); | |
1038 | ||
1039 | sis900_check_mode(net_dev, sis_priv->mii); | |
1040 | ||
1041 | /* Set the timer to switch to check for link beat and perhaps switch | |
1042 | to an alternate media type. */ | |
1043 | init_timer(&sis_priv->timer); | |
1044 | sis_priv->timer.expires = jiffies + HZ; | |
1045 | sis_priv->timer.data = (unsigned long)net_dev; | |
1046 | sis_priv->timer.function = &sis900_timer; | |
1047 | add_timer(&sis_priv->timer); | |
1048 | ||
1049 | return 0; | |
1050 | } | |
1051 | ||
1052 | /** | |
1053 | * sis900_init_rxfilter - Initialize the Rx filter | |
1054 | * @net_dev: the net device to initialize for | |
1055 | * | |
1056 | * Set receive filter address to our MAC address | |
1057 | * and enable packet filtering. | |
1058 | */ | |
1059 | ||
1060 | static void | |
1061 | sis900_init_rxfilter (struct net_device * net_dev) | |
1062 | { | |
8f15ea42 | 1063 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1064 | long ioaddr = net_dev->base_addr; |
1065 | u32 rfcrSave; | |
1066 | u32 i; | |
1067 | ||
1068 | rfcrSave = inl(rfcr + ioaddr); | |
1069 | ||
1070 | /* disable packet filtering before setting filter */ | |
1071 | outl(rfcrSave & ~RFEN, rfcr + ioaddr); | |
1072 | ||
1073 | /* load MAC addr to filter data register */ | |
1074 | for (i = 0 ; i < 3 ; i++) { | |
1075 | u32 w; | |
1076 | ||
1077 | w = (u32) *((u16 *)(net_dev->dev_addr)+i); | |
1078 | outl((i << RFADDR_shift), ioaddr + rfcr); | |
1079 | outl(w, ioaddr + rfdr); | |
1080 | ||
1081 | if (netif_msg_hw(sis_priv)) { | |
1082 | printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n", | |
1083 | net_dev->name, i, inl(ioaddr + rfdr)); | |
1084 | } | |
1085 | } | |
1086 | ||
1087 | /* enable packet filtering */ | |
1088 | outl(rfcrSave | RFEN, rfcr + ioaddr); | |
1089 | } | |
1090 | ||
1091 | /** | |
1092 | * sis900_init_tx_ring - Initialize the Tx descriptor ring | |
1093 | * @net_dev: the net device to initialize for | |
1094 | * | |
6aa20a22 | 1095 | * Initialize the Tx descriptor ring, |
1da177e4 LT |
1096 | */ |
1097 | ||
1098 | static void | |
1099 | sis900_init_tx_ring(struct net_device *net_dev) | |
1100 | { | |
8f15ea42 | 1101 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1102 | long ioaddr = net_dev->base_addr; |
1103 | int i; | |
1104 | ||
1105 | sis_priv->tx_full = 0; | |
1106 | sis_priv->dirty_tx = sis_priv->cur_tx = 0; | |
1107 | ||
1108 | for (i = 0; i < NUM_TX_DESC; i++) { | |
1109 | sis_priv->tx_skbuff[i] = NULL; | |
1110 | ||
1111 | sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma + | |
1112 | ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc); | |
1113 | sis_priv->tx_ring[i].cmdsts = 0; | |
1114 | sis_priv->tx_ring[i].bufptr = 0; | |
1115 | } | |
1116 | ||
1117 | /* load Transmit Descriptor Register */ | |
1118 | outl(sis_priv->tx_ring_dma, ioaddr + txdp); | |
1119 | if (netif_msg_hw(sis_priv)) | |
1120 | printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n", | |
1121 | net_dev->name, inl(ioaddr + txdp)); | |
1122 | } | |
1123 | ||
1124 | /** | |
1125 | * sis900_init_rx_ring - Initialize the Rx descriptor ring | |
1126 | * @net_dev: the net device to initialize for | |
1127 | * | |
6aa20a22 | 1128 | * Initialize the Rx descriptor ring, |
1da177e4 LT |
1129 | * and pre-allocate recevie buffers (socket buffer) |
1130 | */ | |
1131 | ||
6aa20a22 | 1132 | static void |
1da177e4 LT |
1133 | sis900_init_rx_ring(struct net_device *net_dev) |
1134 | { | |
8f15ea42 | 1135 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1136 | long ioaddr = net_dev->base_addr; |
1137 | int i; | |
1138 | ||
1139 | sis_priv->cur_rx = 0; | |
1140 | sis_priv->dirty_rx = 0; | |
1141 | ||
1142 | /* init RX descriptor */ | |
1143 | for (i = 0; i < NUM_RX_DESC; i++) { | |
1144 | sis_priv->rx_skbuff[i] = NULL; | |
1145 | ||
1146 | sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma + | |
1147 | ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc); | |
1148 | sis_priv->rx_ring[i].cmdsts = 0; | |
1149 | sis_priv->rx_ring[i].bufptr = 0; | |
1150 | } | |
1151 | ||
1152 | /* allocate sock buffers */ | |
1153 | for (i = 0; i < NUM_RX_DESC; i++) { | |
1154 | struct sk_buff *skb; | |
1155 | ||
1156 | if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { | |
1157 | /* not enough memory for skbuff, this makes a "hole" | |
1158 | on the buffer ring, it is not clear how the | |
1159 | hardware will react to this kind of degenerated | |
1160 | buffer */ | |
1161 | break; | |
1162 | } | |
1da177e4 LT |
1163 | sis_priv->rx_skbuff[i] = skb; |
1164 | sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; | |
1165 | sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, | |
689be439 | 1166 | skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
1da177e4 LT |
1167 | } |
1168 | sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); | |
1169 | ||
1170 | /* load Receive Descriptor Register */ | |
1171 | outl(sis_priv->rx_ring_dma, ioaddr + rxdp); | |
1172 | if (netif_msg_hw(sis_priv)) | |
1173 | printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n", | |
1174 | net_dev->name, inl(ioaddr + rxdp)); | |
1175 | } | |
1176 | ||
1177 | /** | |
1178 | * sis630_set_eq - set phy equalizer value for 630 LAN | |
1179 | * @net_dev: the net device to set equalizer value | |
1180 | * @revision: 630 LAN revision number | |
1181 | * | |
1182 | * 630E equalizer workaround rule(Cyrus Huang 08/15) | |
1183 | * PHY register 14h(Test) | |
1184 | * Bit 14: 0 -- Automatically dectect (default) | |
1185 | * 1 -- Manually set Equalizer filter | |
1186 | * Bit 13: 0 -- (Default) | |
1187 | * 1 -- Speed up convergence of equalizer setting | |
1188 | * Bit 9 : 0 -- (Default) | |
1189 | * 1 -- Disable Baseline Wander | |
1190 | * Bit 3~7 -- Equalizer filter setting | |
1191 | * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0 | |
1192 | * Then calculate equalizer value | |
1193 | * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0 | |
1194 | * Link Off:Set Bit 13 to 1, Bit 14 to 0 | |
1195 | * Calculate Equalizer value: | |
1196 | * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value. | |
1197 | * When the equalizer is stable, this value is not a fixed value. It will be within | |
1198 | * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9) | |
1199 | * 0 <= max <= 4 --> set equalizer to max | |
1200 | * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min | |
1201 | * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min | |
1202 | */ | |
1203 | ||
1204 | static void sis630_set_eq(struct net_device *net_dev, u8 revision) | |
1205 | { | |
8f15ea42 | 1206 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1207 | u16 reg14h, eq_value=0, max_value=0, min_value=0; |
1208 | int i, maxcount=10; | |
1209 | ||
1210 | if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || | |
1211 | revision == SIS630A_900_REV || revision == SIS630ET_900_REV) ) | |
1212 | return; | |
1213 | ||
1214 | if (netif_carrier_ok(net_dev)) { | |
1215 | reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); | |
1216 | mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, | |
1217 | (0x2200 | reg14h) & 0xBFFF); | |
1218 | for (i=0; i < maxcount; i++) { | |
1219 | eq_value = (0x00F8 & mdio_read(net_dev, | |
1220 | sis_priv->cur_phy, MII_RESV)) >> 3; | |
1221 | if (i == 0) | |
1222 | max_value=min_value=eq_value; | |
1223 | max_value = (eq_value > max_value) ? | |
1224 | eq_value : max_value; | |
1225 | min_value = (eq_value < min_value) ? | |
1226 | eq_value : min_value; | |
1227 | } | |
1228 | /* 630E rule to determine the equalizer value */ | |
1229 | if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV || | |
1230 | revision == SIS630ET_900_REV) { | |
1231 | if (max_value < 5) | |
1232 | eq_value = max_value; | |
1233 | else if (max_value >= 5 && max_value < 15) | |
1234 | eq_value = (max_value == min_value) ? | |
1235 | max_value+2 : max_value+1; | |
1236 | else if (max_value >= 15) | |
1237 | eq_value=(max_value == min_value) ? | |
1238 | max_value+6 : max_value+5; | |
1239 | } | |
1240 | /* 630B0&B1 rule to determine the equalizer value */ | |
6aa20a22 JG |
1241 | if (revision == SIS630A_900_REV && |
1242 | (sis_priv->host_bridge_rev == SIS630B0 || | |
1da177e4 LT |
1243 | sis_priv->host_bridge_rev == SIS630B1)) { |
1244 | if (max_value == 0) | |
1245 | eq_value = 3; | |
1246 | else | |
1247 | eq_value = (max_value + min_value + 1)/2; | |
1248 | } | |
1249 | /* write equalizer value and setting */ | |
1250 | reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); | |
1251 | reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8); | |
1252 | reg14h = (reg14h | 0x6000) & 0xFDFF; | |
1253 | mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h); | |
1254 | } else { | |
1255 | reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV); | |
6aa20a22 JG |
1256 | if (revision == SIS630A_900_REV && |
1257 | (sis_priv->host_bridge_rev == SIS630B0 || | |
1258 | sis_priv->host_bridge_rev == SIS630B1)) | |
1da177e4 LT |
1259 | mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, |
1260 | (reg14h | 0x2200) & 0xBFFF); | |
1261 | else | |
1262 | mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, | |
1263 | (reg14h | 0x2000) & 0xBFFF); | |
1264 | } | |
1265 | return; | |
1266 | } | |
1267 | ||
1268 | /** | |
1269 | * sis900_timer - sis900 timer routine | |
1270 | * @data: pointer to sis900 net device | |
1271 | * | |
6aa20a22 | 1272 | * On each timer ticks we check two things, |
1da177e4 LT |
1273 | * link status (ON/OFF) and link mode (10/100/Full/Half) |
1274 | */ | |
1275 | ||
1276 | static void sis900_timer(unsigned long data) | |
1277 | { | |
1278 | struct net_device *net_dev = (struct net_device *)data; | |
8f15ea42 | 1279 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 | 1280 | struct mii_phy *mii_phy = sis_priv->mii; |
f71e1309 | 1281 | static const int next_tick = 5*HZ; |
1da177e4 LT |
1282 | u16 status; |
1283 | ||
1284 | if (!sis_priv->autong_complete){ | |
ef0cd87e | 1285 | int uninitialized_var(speed), duplex = 0; |
1da177e4 LT |
1286 | |
1287 | sis900_read_mode(net_dev, &speed, &duplex); | |
1288 | if (duplex){ | |
1289 | sis900_set_mode(net_dev->base_addr, speed, duplex); | |
1290 | sis630_set_eq(net_dev, sis_priv->chipset_rev); | |
1291 | netif_start_queue(net_dev); | |
1292 | } | |
1293 | ||
1294 | sis_priv->timer.expires = jiffies + HZ; | |
1295 | add_timer(&sis_priv->timer); | |
1296 | return; | |
1297 | } | |
1298 | ||
1299 | status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); | |
1300 | status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS); | |
1301 | ||
1302 | /* Link OFF -> ON */ | |
1303 | if (!netif_carrier_ok(net_dev)) { | |
1304 | LookForLink: | |
1305 | /* Search for new PHY */ | |
1306 | status = sis900_default_phy(net_dev); | |
1307 | mii_phy = sis_priv->mii; | |
1308 | ||
1309 | if (status & MII_STAT_LINK){ | |
1310 | sis900_check_mode(net_dev, mii_phy); | |
1311 | netif_carrier_on(net_dev); | |
1312 | } | |
1313 | } else { | |
1314 | /* Link ON -> OFF */ | |
1315 | if (!(status & MII_STAT_LINK)){ | |
1316 | netif_carrier_off(net_dev); | |
1317 | if(netif_msg_link(sis_priv)) | |
1318 | printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); | |
1319 | ||
1320 | /* Change mode issue */ | |
6aa20a22 | 1321 | if ((mii_phy->phy_id0 == 0x001D) && |
1da177e4 LT |
1322 | ((mii_phy->phy_id1 & 0xFFF0) == 0x8000)) |
1323 | sis900_reset_phy(net_dev, sis_priv->cur_phy); | |
6aa20a22 | 1324 | |
1da177e4 | 1325 | sis630_set_eq(net_dev, sis_priv->chipset_rev); |
6aa20a22 | 1326 | |
1da177e4 LT |
1327 | goto LookForLink; |
1328 | } | |
1329 | } | |
1330 | ||
1331 | sis_priv->timer.expires = jiffies + next_tick; | |
1332 | add_timer(&sis_priv->timer); | |
1333 | } | |
1334 | ||
1335 | /** | |
1336 | * sis900_check_mode - check the media mode for sis900 | |
1337 | * @net_dev: the net device to be checked | |
1338 | * @mii_phy: the mii phy | |
1339 | * | |
1340 | * Older driver gets the media mode from mii status output | |
1341 | * register. Now we set our media capability and auto-negotiate | |
1342 | * to get the upper bound of speed and duplex between two ends. | |
1343 | * If the types of mii phy is HOME, it doesn't need to auto-negotiate | |
1344 | * and autong_complete should be set to 1. | |
1345 | */ | |
1346 | ||
1347 | static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy) | |
1348 | { | |
8f15ea42 | 1349 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1350 | long ioaddr = net_dev->base_addr; |
1351 | int speed, duplex; | |
1352 | ||
1353 | if (mii_phy->phy_types == LAN) { | |
1354 | outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg); | |
1355 | sis900_set_capability(net_dev , mii_phy); | |
1356 | sis900_auto_negotiate(net_dev, sis_priv->cur_phy); | |
1357 | } else { | |
1358 | outl(EXD | inl(ioaddr + cfg), ioaddr + cfg); | |
1359 | speed = HW_SPEED_HOME; | |
1360 | duplex = FDX_CAPABLE_HALF_SELECTED; | |
1361 | sis900_set_mode(ioaddr, speed, duplex); | |
1362 | sis_priv->autong_complete = 1; | |
1363 | } | |
1364 | } | |
1365 | ||
1366 | /** | |
1367 | * sis900_set_mode - Set the media mode of mac register. | |
1368 | * @ioaddr: the address of the device | |
1369 | * @speed : the transmit speed to be determined | |
1370 | * @duplex: the duplex mode to be determined | |
1371 | * | |
1372 | * Set the media mode of mac register txcfg/rxcfg according to | |
1373 | * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB | |
1374 | * bus is used instead of PCI bus. When this bit is set 1, the | |
1375 | * Max DMA Burst Size for TX/RX DMA should be no larger than 16 | |
1376 | * double words. | |
1377 | */ | |
1378 | ||
1379 | static void sis900_set_mode (long ioaddr, int speed, int duplex) | |
1380 | { | |
1381 | u32 tx_flags = 0, rx_flags = 0; | |
1382 | ||
1383 | if (inl(ioaddr + cfg) & EDB_MASTER_EN) { | |
1384 | tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | | |
1385 | (TX_FILL_THRESH << TxFILLT_shift); | |
1386 | rx_flags = DMA_BURST_64 << RxMXDMA_shift; | |
1387 | } else { | |
1388 | tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | | |
1389 | (TX_FILL_THRESH << TxFILLT_shift); | |
1390 | rx_flags = DMA_BURST_512 << RxMXDMA_shift; | |
1391 | } | |
1392 | ||
1393 | if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) { | |
1394 | rx_flags |= (RxDRNT_10 << RxDRNT_shift); | |
1395 | tx_flags |= (TxDRNT_10 << TxDRNT_shift); | |
1396 | } else { | |
1397 | rx_flags |= (RxDRNT_100 << RxDRNT_shift); | |
1398 | tx_flags |= (TxDRNT_100 << TxDRNT_shift); | |
1399 | } | |
1400 | ||
1401 | if (duplex == FDX_CAPABLE_FULL_SELECTED) { | |
1402 | tx_flags |= (TxCSI | TxHBI); | |
1403 | rx_flags |= RxATX; | |
1404 | } | |
1405 | ||
d269a69f DV |
1406 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) |
1407 | /* Can accept Jumbo packet */ | |
1408 | rx_flags |= RxAJAB; | |
1409 | #endif | |
1410 | ||
1da177e4 LT |
1411 | outl (tx_flags, ioaddr + txcfg); |
1412 | outl (rx_flags, ioaddr + rxcfg); | |
1413 | } | |
1414 | ||
1415 | /** | |
1416 | * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit. | |
1417 | * @net_dev: the net device to read mode for | |
1418 | * @phy_addr: mii phy address | |
1419 | * | |
1420 | * If the adapter is link-on, set the auto-negotiate enable/reset bit. | |
1421 | * autong_complete should be set to 0 when starting auto-negotiation. | |
1422 | * autong_complete should be set to 1 if we didn't start auto-negotiation. | |
1423 | * sis900_timer will wait for link on again if autong_complete = 0. | |
1424 | */ | |
1425 | ||
1426 | static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr) | |
1427 | { | |
8f15ea42 | 1428 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1429 | int i = 0; |
1430 | u32 status; | |
6aa20a22 | 1431 | |
f3be9742 | 1432 | for (i = 0; i < 2; i++) |
1da177e4 LT |
1433 | status = mdio_read(net_dev, phy_addr, MII_STATUS); |
1434 | ||
1435 | if (!(status & MII_STAT_LINK)){ | |
1436 | if(netif_msg_link(sis_priv)) | |
1437 | printk(KERN_INFO "%s: Media Link Off\n", net_dev->name); | |
1438 | sis_priv->autong_complete = 1; | |
1439 | netif_carrier_off(net_dev); | |
1440 | return; | |
1441 | } | |
1442 | ||
1443 | /* (Re)start AutoNegotiate */ | |
1444 | mdio_write(net_dev, phy_addr, MII_CONTROL, | |
1445 | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); | |
1446 | sis_priv->autong_complete = 0; | |
1447 | } | |
1448 | ||
1449 | ||
1450 | /** | |
1451 | * sis900_read_mode - read media mode for sis900 internal phy | |
1452 | * @net_dev: the net device to read mode for | |
1453 | * @speed : the transmit speed to be determined | |
1454 | * @duplex : the duplex mode to be determined | |
1455 | * | |
1456 | * The capability of remote end will be put in mii register autorec | |
1457 | * after auto-negotiation. Use AND operation to get the upper bound | |
1458 | * of speed and duplex between two ends. | |
1459 | */ | |
1460 | ||
1461 | static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex) | |
1462 | { | |
8f15ea42 | 1463 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1464 | struct mii_phy *phy = sis_priv->mii; |
1465 | int phy_addr = sis_priv->cur_phy; | |
1466 | u32 status; | |
1467 | u16 autoadv, autorec; | |
f3be9742 | 1468 | int i; |
1da177e4 | 1469 | |
f3be9742 | 1470 | for (i = 0; i < 2; i++) |
1da177e4 LT |
1471 | status = mdio_read(net_dev, phy_addr, MII_STATUS); |
1472 | ||
1473 | if (!(status & MII_STAT_LINK)) | |
1474 | return; | |
1475 | ||
1476 | /* AutoNegotiate completed */ | |
1477 | autoadv = mdio_read(net_dev, phy_addr, MII_ANADV); | |
1478 | autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR); | |
1479 | status = autoadv & autorec; | |
6aa20a22 | 1480 | |
1da177e4 LT |
1481 | *speed = HW_SPEED_10_MBPS; |
1482 | *duplex = FDX_CAPABLE_HALF_SELECTED; | |
1483 | ||
1484 | if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX)) | |
1485 | *speed = HW_SPEED_100_MBPS; | |
1486 | if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX)) | |
1487 | *duplex = FDX_CAPABLE_FULL_SELECTED; | |
6aa20a22 | 1488 | |
1da177e4 LT |
1489 | sis_priv->autong_complete = 1; |
1490 | ||
1491 | /* Workaround for Realtek RTL8201 PHY issue */ | |
1492 | if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) { | |
1493 | if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX) | |
1494 | *duplex = FDX_CAPABLE_FULL_SELECTED; | |
1495 | if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01) | |
1496 | *speed = HW_SPEED_100_MBPS; | |
1497 | } | |
1498 | ||
1499 | if(netif_msg_link(sis_priv)) | |
1500 | printk(KERN_INFO "%s: Media Link On %s %s-duplex \n", | |
1501 | net_dev->name, | |
1502 | *speed == HW_SPEED_100_MBPS ? | |
1503 | "100mbps" : "10mbps", | |
1504 | *duplex == FDX_CAPABLE_FULL_SELECTED ? | |
1505 | "full" : "half"); | |
1506 | } | |
1507 | ||
1508 | /** | |
1509 | * sis900_tx_timeout - sis900 transmit timeout routine | |
1510 | * @net_dev: the net device to transmit | |
1511 | * | |
1512 | * print transmit timeout status | |
1513 | * disable interrupts and do some tasks | |
1514 | */ | |
1515 | ||
1516 | static void sis900_tx_timeout(struct net_device *net_dev) | |
1517 | { | |
8f15ea42 | 1518 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1519 | long ioaddr = net_dev->base_addr; |
1520 | unsigned long flags; | |
1521 | int i; | |
1522 | ||
1523 | if(netif_msg_tx_err(sis_priv)) | |
1524 | printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n", | |
1525 | net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr)); | |
1526 | ||
1527 | /* Disable interrupts by clearing the interrupt mask. */ | |
1528 | outl(0x0000, ioaddr + imr); | |
1529 | ||
1530 | /* use spinlock to prevent interrupt handler accessing buffer ring */ | |
1531 | spin_lock_irqsave(&sis_priv->lock, flags); | |
1532 | ||
1533 | /* discard unsent packets */ | |
1534 | sis_priv->dirty_tx = sis_priv->cur_tx = 0; | |
1535 | for (i = 0; i < NUM_TX_DESC; i++) { | |
1536 | struct sk_buff *skb = sis_priv->tx_skbuff[i]; | |
1537 | ||
1538 | if (skb) { | |
6aa20a22 | 1539 | pci_unmap_single(sis_priv->pci_dev, |
1da177e4 LT |
1540 | sis_priv->tx_ring[i].bufptr, skb->len, |
1541 | PCI_DMA_TODEVICE); | |
1542 | dev_kfree_skb_irq(skb); | |
1543 | sis_priv->tx_skbuff[i] = NULL; | |
1544 | sis_priv->tx_ring[i].cmdsts = 0; | |
1545 | sis_priv->tx_ring[i].bufptr = 0; | |
09f75cd7 | 1546 | net_dev->stats.tx_dropped++; |
1da177e4 LT |
1547 | } |
1548 | } | |
1549 | sis_priv->tx_full = 0; | |
1550 | netif_wake_queue(net_dev); | |
1551 | ||
1552 | spin_unlock_irqrestore(&sis_priv->lock, flags); | |
1553 | ||
1554 | net_dev->trans_start = jiffies; | |
1555 | ||
1556 | /* load Transmit Descriptor Register */ | |
1557 | outl(sis_priv->tx_ring_dma, ioaddr + txdp); | |
1558 | ||
1559 | /* Enable all known interrupts by setting the interrupt mask. */ | |
1560 | outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); | |
1561 | return; | |
1562 | } | |
1563 | ||
1564 | /** | |
1565 | * sis900_start_xmit - sis900 start transmit routine | |
1566 | * @skb: socket buffer pointer to put the data being transmitted | |
1567 | * @net_dev: the net device to transmit with | |
1568 | * | |
6aa20a22 | 1569 | * Set the transmit buffer descriptor, |
1da177e4 LT |
1570 | * and write TxENA to enable transmit state machine. |
1571 | * tell upper layer if the buffer is full | |
1572 | */ | |
1573 | ||
1574 | static int | |
1575 | sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev) | |
1576 | { | |
8f15ea42 | 1577 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1578 | long ioaddr = net_dev->base_addr; |
1579 | unsigned int entry; | |
1580 | unsigned long flags; | |
1581 | unsigned int index_cur_tx, index_dirty_tx; | |
1582 | unsigned int count_dirty_tx; | |
1583 | ||
1584 | /* Don't transmit data before the complete of auto-negotiation */ | |
1585 | if(!sis_priv->autong_complete){ | |
1586 | netif_stop_queue(net_dev); | |
1587 | return 1; | |
1588 | } | |
1589 | ||
1590 | spin_lock_irqsave(&sis_priv->lock, flags); | |
1591 | ||
1592 | /* Calculate the next Tx descriptor entry. */ | |
1593 | entry = sis_priv->cur_tx % NUM_TX_DESC; | |
1594 | sis_priv->tx_skbuff[entry] = skb; | |
1595 | ||
1596 | /* set the transmit buffer descriptor and enable Transmit State Machine */ | |
1597 | sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev, | |
1598 | skb->data, skb->len, PCI_DMA_TODEVICE); | |
1599 | sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len); | |
1600 | outl(TxENA | inl(ioaddr + cr), ioaddr + cr); | |
1601 | ||
1602 | sis_priv->cur_tx ++; | |
1603 | index_cur_tx = sis_priv->cur_tx; | |
1604 | index_dirty_tx = sis_priv->dirty_tx; | |
1605 | ||
1606 | for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++) | |
1607 | count_dirty_tx ++; | |
1608 | ||
1609 | if (index_cur_tx == index_dirty_tx) { | |
1610 | /* dirty_tx is met in the cycle of cur_tx, buffer full */ | |
1611 | sis_priv->tx_full = 1; | |
1612 | netif_stop_queue(net_dev); | |
6aa20a22 | 1613 | } else if (count_dirty_tx < NUM_TX_DESC) { |
1da177e4 LT |
1614 | /* Typical path, tell upper layer that more transmission is possible */ |
1615 | netif_start_queue(net_dev); | |
1616 | } else { | |
1617 | /* buffer full, tell upper layer no more transmission */ | |
1618 | sis_priv->tx_full = 1; | |
1619 | netif_stop_queue(net_dev); | |
1620 | } | |
1621 | ||
1622 | spin_unlock_irqrestore(&sis_priv->lock, flags); | |
1623 | ||
1624 | net_dev->trans_start = jiffies; | |
1625 | ||
1626 | if (netif_msg_tx_queued(sis_priv)) | |
1627 | printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d " | |
1628 | "to slot %d.\n", | |
1629 | net_dev->name, skb->data, (int)skb->len, entry); | |
1630 | ||
1631 | return 0; | |
1632 | } | |
1633 | ||
1634 | /** | |
1635 | * sis900_interrupt - sis900 interrupt handler | |
1636 | * @irq: the irq number | |
1637 | * @dev_instance: the client data object | |
1da177e4 | 1638 | * |
6aa20a22 | 1639 | * The interrupt handler does all of the Rx thread work, |
1da177e4 LT |
1640 | * and cleans up after the Tx thread |
1641 | */ | |
1642 | ||
7d12e780 | 1643 | static irqreturn_t sis900_interrupt(int irq, void *dev_instance) |
1da177e4 LT |
1644 | { |
1645 | struct net_device *net_dev = dev_instance; | |
8f15ea42 | 1646 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1647 | int boguscnt = max_interrupt_work; |
1648 | long ioaddr = net_dev->base_addr; | |
1649 | u32 status; | |
1650 | unsigned int handled = 0; | |
1651 | ||
1652 | spin_lock (&sis_priv->lock); | |
1653 | ||
1654 | do { | |
1655 | status = inl(ioaddr + isr); | |
1656 | ||
1657 | if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0) | |
1658 | /* nothing intresting happened */ | |
1659 | break; | |
1660 | handled = 1; | |
1661 | ||
1662 | /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */ | |
1663 | if (status & (RxORN | RxERR | RxOK)) | |
1664 | /* Rx interrupt */ | |
1665 | sis900_rx(net_dev); | |
1666 | ||
1667 | if (status & (TxURN | TxERR | TxIDLE)) | |
1668 | /* Tx interrupt */ | |
1669 | sis900_finish_xmit(net_dev); | |
1670 | ||
1671 | /* something strange happened !!! */ | |
1672 | if (status & HIBERR) { | |
1673 | if(netif_msg_intr(sis_priv)) | |
2450022a | 1674 | printk(KERN_INFO "%s: Abnormal interrupt, " |
1da177e4 LT |
1675 | "status %#8.8x.\n", net_dev->name, status); |
1676 | break; | |
1677 | } | |
1678 | if (--boguscnt < 0) { | |
1679 | if(netif_msg_intr(sis_priv)) | |
1680 | printk(KERN_INFO "%s: Too much work at interrupt, " | |
1681 | "interrupt status = %#8.8x.\n", | |
1682 | net_dev->name, status); | |
1683 | break; | |
1684 | } | |
1685 | } while (1); | |
1686 | ||
1687 | if(netif_msg_intr(sis_priv)) | |
1688 | printk(KERN_DEBUG "%s: exiting interrupt, " | |
1689 | "interrupt status = 0x%#8.8x.\n", | |
1690 | net_dev->name, inl(ioaddr + isr)); | |
6aa20a22 | 1691 | |
1da177e4 LT |
1692 | spin_unlock (&sis_priv->lock); |
1693 | return IRQ_RETVAL(handled); | |
1694 | } | |
1695 | ||
1696 | /** | |
1697 | * sis900_rx - sis900 receive routine | |
1698 | * @net_dev: the net device which receives data | |
1699 | * | |
6aa20a22 | 1700 | * Process receive interrupt events, |
1da177e4 | 1701 | * put buffer to higher layer and refill buffer pool |
0b28002f | 1702 | * Note: This function is called by interrupt handler, |
1da177e4 LT |
1703 | * don't do "too much" work here |
1704 | */ | |
1705 | ||
1706 | static int sis900_rx(struct net_device *net_dev) | |
1707 | { | |
8f15ea42 | 1708 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1709 | long ioaddr = net_dev->base_addr; |
1710 | unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC; | |
1711 | u32 rx_status = sis_priv->rx_ring[entry].cmdsts; | |
7380a78a | 1712 | int rx_work_limit; |
1da177e4 LT |
1713 | |
1714 | if (netif_msg_rx_status(sis_priv)) | |
1715 | printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d " | |
1716 | "status:0x%8.8x\n", | |
1717 | sis_priv->cur_rx, sis_priv->dirty_rx, rx_status); | |
7380a78a | 1718 | rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx; |
1da177e4 LT |
1719 | |
1720 | while (rx_status & OWN) { | |
1721 | unsigned int rx_size; | |
d269a69f | 1722 | unsigned int data_size; |
1da177e4 | 1723 | |
7380a78a VA |
1724 | if (--rx_work_limit < 0) |
1725 | break; | |
1726 | ||
d269a69f DV |
1727 | data_size = rx_status & DSIZE; |
1728 | rx_size = data_size - CRC_SIZE; | |
1729 | ||
1730 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | |
1731 | /* ``TOOLONG'' flag means jumbo packet recived. */ | |
1732 | if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE) | |
1733 | rx_status &= (~ ((unsigned int)TOOLONG)); | |
1734 | #endif | |
1da177e4 LT |
1735 | |
1736 | if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) { | |
1737 | /* corrupted packet received */ | |
1738 | if (netif_msg_rx_err(sis_priv)) | |
1739 | printk(KERN_DEBUG "%s: Corrupted packet " | |
d269a69f DV |
1740 | "received, buffer status = 0x%8.8x/%d.\n", |
1741 | net_dev->name, rx_status, data_size); | |
09f75cd7 | 1742 | net_dev->stats.rx_errors++; |
1da177e4 | 1743 | if (rx_status & OVERRUN) |
09f75cd7 | 1744 | net_dev->stats.rx_over_errors++; |
1da177e4 | 1745 | if (rx_status & (TOOLONG|RUNT)) |
09f75cd7 | 1746 | net_dev->stats.rx_length_errors++; |
1da177e4 | 1747 | if (rx_status & (RXISERR | FAERR)) |
09f75cd7 | 1748 | net_dev->stats.rx_frame_errors++; |
6aa20a22 | 1749 | if (rx_status & CRCERR) |
09f75cd7 | 1750 | net_dev->stats.rx_crc_errors++; |
1da177e4 LT |
1751 | /* reset buffer descriptor state */ |
1752 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; | |
1753 | } else { | |
1754 | struct sk_buff * skb; | |
dc5a1449 | 1755 | struct sk_buff * rx_skb; |
1da177e4 | 1756 | |
b748d9e3 NH |
1757 | pci_unmap_single(sis_priv->pci_dev, |
1758 | sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, | |
1759 | PCI_DMA_FROMDEVICE); | |
1760 | ||
1761 | /* refill the Rx buffer, what if there is not enought | |
1762 | * memory for new socket buffer ?? */ | |
1763 | if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { | |
1764 | /* | |
1765 | * Not enough memory to refill the buffer | |
1766 | * so we need to recycle the old one so | |
1767 | * as to avoid creating a memory hole | |
1768 | * in the rx ring | |
1769 | */ | |
1770 | skb = sis_priv->rx_skbuff[entry]; | |
09f75cd7 | 1771 | net_dev->stats.rx_dropped++; |
b748d9e3 | 1772 | goto refill_rx_ring; |
7d2e3cb7 | 1773 | } |
b748d9e3 | 1774 | |
1da177e4 LT |
1775 | /* This situation should never happen, but due to |
1776 | some unknow bugs, it is possible that | |
1777 | we are working on NULL sk_buff :-( */ | |
1778 | if (sis_priv->rx_skbuff[entry] == NULL) { | |
1779 | if (netif_msg_rx_err(sis_priv)) | |
6aa20a22 | 1780 | printk(KERN_WARNING "%s: NULL pointer " |
7380a78a VA |
1781 | "encountered in Rx ring\n" |
1782 | "cur_rx:%4.4d, dirty_rx:%4.4d\n", | |
1783 | net_dev->name, sis_priv->cur_rx, | |
1784 | sis_priv->dirty_rx); | |
1da177e4 LT |
1785 | break; |
1786 | } | |
1787 | ||
1da177e4 | 1788 | /* give the socket buffer to upper layers */ |
dc5a1449 NH |
1789 | rx_skb = sis_priv->rx_skbuff[entry]; |
1790 | skb_put(rx_skb, rx_size); | |
1791 | rx_skb->protocol = eth_type_trans(rx_skb, net_dev); | |
1792 | netif_rx(rx_skb); | |
1da177e4 LT |
1793 | |
1794 | /* some network statistics */ | |
1795 | if ((rx_status & BCAST) == MCAST) | |
09f75cd7 | 1796 | net_dev->stats.multicast++; |
09f75cd7 JG |
1797 | net_dev->stats.rx_bytes += rx_size; |
1798 | net_dev->stats.rx_packets++; | |
b748d9e3 NH |
1799 | sis_priv->dirty_rx++; |
1800 | refill_rx_ring: | |
1da177e4 LT |
1801 | sis_priv->rx_skbuff[entry] = skb; |
1802 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; | |
6aa20a22 JG |
1803 | sis_priv->rx_ring[entry].bufptr = |
1804 | pci_map_single(sis_priv->pci_dev, skb->data, | |
1da177e4 | 1805 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
1da177e4 LT |
1806 | } |
1807 | sis_priv->cur_rx++; | |
1808 | entry = sis_priv->cur_rx % NUM_RX_DESC; | |
1809 | rx_status = sis_priv->rx_ring[entry].cmdsts; | |
1810 | } // while | |
1811 | ||
1812 | /* refill the Rx buffer, what if the rate of refilling is slower | |
1813 | * than consuming ?? */ | |
7380a78a | 1814 | for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) { |
1da177e4 LT |
1815 | struct sk_buff *skb; |
1816 | ||
1817 | entry = sis_priv->dirty_rx % NUM_RX_DESC; | |
1818 | ||
1819 | if (sis_priv->rx_skbuff[entry] == NULL) { | |
1820 | if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { | |
1821 | /* not enough memory for skbuff, this makes a | |
1822 | * "hole" on the buffer ring, it is not clear | |
1823 | * how the hardware will react to this kind | |
1824 | * of degenerated buffer */ | |
1825 | if (netif_msg_rx_err(sis_priv)) | |
2450022a | 1826 | printk(KERN_INFO "%s: Memory squeeze, " |
1da177e4 LT |
1827 | "deferring packet.\n", |
1828 | net_dev->name); | |
09f75cd7 | 1829 | net_dev->stats.rx_dropped++; |
1da177e4 LT |
1830 | break; |
1831 | } | |
1da177e4 LT |
1832 | sis_priv->rx_skbuff[entry] = skb; |
1833 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; | |
1834 | sis_priv->rx_ring[entry].bufptr = | |
689be439 | 1835 | pci_map_single(sis_priv->pci_dev, skb->data, |
1da177e4 LT |
1836 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
1837 | } | |
1838 | } | |
1839 | /* re-enable the potentially idle receive state matchine */ | |
1840 | outl(RxENA | inl(ioaddr + cr), ioaddr + cr ); | |
1841 | ||
1842 | return 0; | |
1843 | } | |
1844 | ||
1845 | /** | |
1846 | * sis900_finish_xmit - finish up transmission of packets | |
1847 | * @net_dev: the net device to be transmitted on | |
1848 | * | |
6aa20a22 | 1849 | * Check for error condition and free socket buffer etc |
1da177e4 | 1850 | * schedule for more transmission as needed |
0b28002f | 1851 | * Note: This function is called by interrupt handler, |
1da177e4 LT |
1852 | * don't do "too much" work here |
1853 | */ | |
1854 | ||
1855 | static void sis900_finish_xmit (struct net_device *net_dev) | |
1856 | { | |
8f15ea42 | 1857 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1858 | |
1859 | for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) { | |
1860 | struct sk_buff *skb; | |
1861 | unsigned int entry; | |
1862 | u32 tx_status; | |
1863 | ||
1864 | entry = sis_priv->dirty_tx % NUM_TX_DESC; | |
1865 | tx_status = sis_priv->tx_ring[entry].cmdsts; | |
1866 | ||
1867 | if (tx_status & OWN) { | |
1868 | /* The packet is not transmitted yet (owned by hardware) ! | |
1869 | * Note: the interrupt is generated only when Tx Machine | |
1870 | * is idle, so this is an almost impossible case */ | |
1871 | break; | |
1872 | } | |
1873 | ||
1874 | if (tx_status & (ABORT | UNDERRUN | OWCOLL)) { | |
1875 | /* packet unsuccessfully transmitted */ | |
1876 | if (netif_msg_tx_err(sis_priv)) | |
1877 | printk(KERN_DEBUG "%s: Transmit " | |
1878 | "error, Tx status %8.8x.\n", | |
1879 | net_dev->name, tx_status); | |
09f75cd7 | 1880 | net_dev->stats.tx_errors++; |
1da177e4 | 1881 | if (tx_status & UNDERRUN) |
09f75cd7 | 1882 | net_dev->stats.tx_fifo_errors++; |
1da177e4 | 1883 | if (tx_status & ABORT) |
09f75cd7 | 1884 | net_dev->stats.tx_aborted_errors++; |
1da177e4 | 1885 | if (tx_status & NOCARRIER) |
09f75cd7 | 1886 | net_dev->stats.tx_carrier_errors++; |
1da177e4 | 1887 | if (tx_status & OWCOLL) |
09f75cd7 | 1888 | net_dev->stats.tx_window_errors++; |
1da177e4 LT |
1889 | } else { |
1890 | /* packet successfully transmitted */ | |
09f75cd7 JG |
1891 | net_dev->stats.collisions += (tx_status & COLCNT) >> 16; |
1892 | net_dev->stats.tx_bytes += tx_status & DSIZE; | |
1893 | net_dev->stats.tx_packets++; | |
1da177e4 LT |
1894 | } |
1895 | /* Free the original skb. */ | |
1896 | skb = sis_priv->tx_skbuff[entry]; | |
6aa20a22 | 1897 | pci_unmap_single(sis_priv->pci_dev, |
1da177e4 LT |
1898 | sis_priv->tx_ring[entry].bufptr, skb->len, |
1899 | PCI_DMA_TODEVICE); | |
1900 | dev_kfree_skb_irq(skb); | |
1901 | sis_priv->tx_skbuff[entry] = NULL; | |
1902 | sis_priv->tx_ring[entry].bufptr = 0; | |
1903 | sis_priv->tx_ring[entry].cmdsts = 0; | |
1904 | } | |
1905 | ||
1906 | if (sis_priv->tx_full && netif_queue_stopped(net_dev) && | |
1907 | sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) { | |
1908 | /* The ring is no longer full, clear tx_full and schedule | |
1909 | * more transmission by netif_wake_queue(net_dev) */ | |
1910 | sis_priv->tx_full = 0; | |
1911 | netif_wake_queue (net_dev); | |
1912 | } | |
1913 | } | |
1914 | ||
1915 | /** | |
6aa20a22 | 1916 | * sis900_close - close sis900 device |
1da177e4 LT |
1917 | * @net_dev: the net device to be closed |
1918 | * | |
6aa20a22 | 1919 | * Disable interrupts, stop the Tx and Rx Status Machine |
1da177e4 LT |
1920 | * free Tx and RX socket buffer |
1921 | */ | |
1922 | ||
1923 | static int sis900_close(struct net_device *net_dev) | |
1924 | { | |
1925 | long ioaddr = net_dev->base_addr; | |
8f15ea42 | 1926 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1927 | struct sk_buff *skb; |
1928 | int i; | |
1929 | ||
1930 | netif_stop_queue(net_dev); | |
1931 | ||
1932 | /* Disable interrupts by clearing the interrupt mask. */ | |
1933 | outl(0x0000, ioaddr + imr); | |
1934 | outl(0x0000, ioaddr + ier); | |
1935 | ||
1936 | /* Stop the chip's Tx and Rx Status Machine */ | |
1937 | outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); | |
1938 | ||
1939 | del_timer(&sis_priv->timer); | |
1940 | ||
1941 | free_irq(net_dev->irq, net_dev); | |
1942 | ||
1943 | /* Free Tx and RX skbuff */ | |
1944 | for (i = 0; i < NUM_RX_DESC; i++) { | |
1945 | skb = sis_priv->rx_skbuff[i]; | |
1946 | if (skb) { | |
6aa20a22 | 1947 | pci_unmap_single(sis_priv->pci_dev, |
1da177e4 LT |
1948 | sis_priv->rx_ring[i].bufptr, |
1949 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | |
1950 | dev_kfree_skb(skb); | |
1951 | sis_priv->rx_skbuff[i] = NULL; | |
1952 | } | |
1953 | } | |
1954 | for (i = 0; i < NUM_TX_DESC; i++) { | |
1955 | skb = sis_priv->tx_skbuff[i]; | |
1956 | if (skb) { | |
6aa20a22 | 1957 | pci_unmap_single(sis_priv->pci_dev, |
1da177e4 LT |
1958 | sis_priv->tx_ring[i].bufptr, skb->len, |
1959 | PCI_DMA_TODEVICE); | |
1960 | dev_kfree_skb(skb); | |
1961 | sis_priv->tx_skbuff[i] = NULL; | |
1962 | } | |
1963 | } | |
1964 | ||
1965 | /* Green! Put the chip in low-power mode. */ | |
1966 | ||
1967 | return 0; | |
1968 | } | |
1969 | ||
1970 | /** | |
1971 | * sis900_get_drvinfo - Return information about driver | |
1972 | * @net_dev: the net device to probe | |
1973 | * @info: container for info returned | |
1974 | * | |
1975 | * Process ethtool command such as "ehtool -i" to show information | |
1976 | */ | |
6aa20a22 | 1977 | |
1da177e4 LT |
1978 | static void sis900_get_drvinfo(struct net_device *net_dev, |
1979 | struct ethtool_drvinfo *info) | |
1980 | { | |
8f15ea42 | 1981 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1982 | |
1983 | strcpy (info->driver, SIS900_MODULE_NAME); | |
1984 | strcpy (info->version, SIS900_DRV_VERSION); | |
1985 | strcpy (info->bus_info, pci_name(sis_priv->pci_dev)); | |
1986 | } | |
1987 | ||
1988 | static u32 sis900_get_msglevel(struct net_device *net_dev) | |
1989 | { | |
8f15ea42 | 1990 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1991 | return sis_priv->msg_enable; |
1992 | } | |
6aa20a22 | 1993 | |
1da177e4 LT |
1994 | static void sis900_set_msglevel(struct net_device *net_dev, u32 value) |
1995 | { | |
8f15ea42 | 1996 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
1997 | sis_priv->msg_enable = value; |
1998 | } | |
1999 | ||
da369b01 DV |
2000 | static u32 sis900_get_link(struct net_device *net_dev) |
2001 | { | |
8f15ea42 | 2002 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
da369b01 DV |
2003 | return mii_link_ok(&sis_priv->mii_info); |
2004 | } | |
2005 | ||
2006 | static int sis900_get_settings(struct net_device *net_dev, | |
2007 | struct ethtool_cmd *cmd) | |
2008 | { | |
8f15ea42 | 2009 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
da369b01 DV |
2010 | spin_lock_irq(&sis_priv->lock); |
2011 | mii_ethtool_gset(&sis_priv->mii_info, cmd); | |
2012 | spin_unlock_irq(&sis_priv->lock); | |
2013 | return 0; | |
2014 | } | |
2015 | ||
2016 | static int sis900_set_settings(struct net_device *net_dev, | |
2017 | struct ethtool_cmd *cmd) | |
2018 | { | |
8f15ea42 | 2019 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
da369b01 DV |
2020 | int rt; |
2021 | spin_lock_irq(&sis_priv->lock); | |
2022 | rt = mii_ethtool_sset(&sis_priv->mii_info, cmd); | |
2023 | spin_unlock_irq(&sis_priv->lock); | |
2024 | return rt; | |
2025 | } | |
2026 | ||
2027 | static int sis900_nway_reset(struct net_device *net_dev) | |
2028 | { | |
8f15ea42 | 2029 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
da369b01 DV |
2030 | return mii_nway_restart(&sis_priv->mii_info); |
2031 | } | |
2032 | ||
ea37ccea DV |
2033 | /** |
2034 | * sis900_set_wol - Set up Wake on Lan registers | |
2035 | * @net_dev: the net device to probe | |
2036 | * @wol: container for info passed to the driver | |
2037 | * | |
2038 | * Process ethtool command "wol" to setup wake on lan features. | |
2039 | * SiS900 supports sending WoL events if a correct packet is received, | |
2040 | * but there is no simple way to filter them to only a subset (broadcast, | |
2041 | * multicast, unicast or arp). | |
2042 | */ | |
6aa20a22 | 2043 | |
ea37ccea DV |
2044 | static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) |
2045 | { | |
8f15ea42 | 2046 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
ea37ccea DV |
2047 | long pmctrl_addr = net_dev->base_addr + pmctrl; |
2048 | u32 cfgpmcsr = 0, pmctrl_bits = 0; | |
2049 | ||
2050 | if (wol->wolopts == 0) { | |
2051 | pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); | |
7bef4b39 | 2052 | cfgpmcsr &= ~PME_EN; |
ea37ccea DV |
2053 | pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); |
2054 | outl(pmctrl_bits, pmctrl_addr); | |
2055 | if (netif_msg_wol(sis_priv)) | |
2056 | printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name); | |
2057 | return 0; | |
2058 | } | |
2059 | ||
2060 | if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST | |
2061 | | WAKE_BCAST | WAKE_ARP)) | |
2062 | return -EINVAL; | |
2063 | ||
2064 | if (wol->wolopts & WAKE_MAGIC) | |
2065 | pmctrl_bits |= MAGICPKT; | |
2066 | if (wol->wolopts & WAKE_PHY) | |
2067 | pmctrl_bits |= LINKON; | |
6aa20a22 | 2068 | |
ea37ccea DV |
2069 | outl(pmctrl_bits, pmctrl_addr); |
2070 | ||
2071 | pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); | |
2072 | cfgpmcsr |= PME_EN; | |
2073 | pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); | |
2074 | if (netif_msg_wol(sis_priv)) | |
2075 | printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name); | |
2076 | ||
2077 | return 0; | |
2078 | } | |
2079 | ||
2080 | static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol) | |
2081 | { | |
2082 | long pmctrl_addr = net_dev->base_addr + pmctrl; | |
2083 | u32 pmctrl_bits; | |
2084 | ||
2085 | pmctrl_bits = inl(pmctrl_addr); | |
2086 | if (pmctrl_bits & MAGICPKT) | |
2087 | wol->wolopts |= WAKE_MAGIC; | |
2088 | if (pmctrl_bits & LINKON) | |
2089 | wol->wolopts |= WAKE_PHY; | |
2090 | ||
2091 | wol->supported = (WAKE_PHY | WAKE_MAGIC); | |
2092 | } | |
2093 | ||
7282d491 | 2094 | static const struct ethtool_ops sis900_ethtool_ops = { |
1da177e4 LT |
2095 | .get_drvinfo = sis900_get_drvinfo, |
2096 | .get_msglevel = sis900_get_msglevel, | |
2097 | .set_msglevel = sis900_set_msglevel, | |
da369b01 DV |
2098 | .get_link = sis900_get_link, |
2099 | .get_settings = sis900_get_settings, | |
2100 | .set_settings = sis900_set_settings, | |
2101 | .nway_reset = sis900_nway_reset, | |
ea37ccea DV |
2102 | .get_wol = sis900_get_wol, |
2103 | .set_wol = sis900_set_wol | |
1da177e4 LT |
2104 | }; |
2105 | ||
2106 | /** | |
6aa20a22 | 2107 | * mii_ioctl - process MII i/o control command |
1da177e4 LT |
2108 | * @net_dev: the net device to command for |
2109 | * @rq: parameter for command | |
2110 | * @cmd: the i/o command | |
2111 | * | |
2112 | * Process MII command like read/write MII register | |
2113 | */ | |
2114 | ||
2115 | static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd) | |
2116 | { | |
8f15ea42 | 2117 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
2118 | struct mii_ioctl_data *data = if_mii(rq); |
2119 | ||
2120 | switch(cmd) { | |
2121 | case SIOCGMIIPHY: /* Get address of MII PHY in use. */ | |
2122 | data->phy_id = sis_priv->mii->phy_addr; | |
2123 | /* Fall Through */ | |
2124 | ||
2125 | case SIOCGMIIREG: /* Read MII PHY register. */ | |
2126 | data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f); | |
2127 | return 0; | |
2128 | ||
2129 | case SIOCSMIIREG: /* Write MII PHY register. */ | |
2130 | if (!capable(CAP_NET_ADMIN)) | |
2131 | return -EPERM; | |
2132 | mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); | |
2133 | return 0; | |
2134 | default: | |
2135 | return -EOPNOTSUPP; | |
2136 | } | |
2137 | } | |
2138 | ||
1da177e4 | 2139 | /** |
6aa20a22 | 2140 | * sis900_set_config - Set media type by net_device.set_config |
1da177e4 LT |
2141 | * @dev: the net device for media type change |
2142 | * @map: ifmap passed by ifconfig | |
2143 | * | |
2144 | * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig | |
2145 | * we support only port changes. All other runtime configuration | |
2146 | * changes will be ignored | |
2147 | */ | |
2148 | ||
2149 | static int sis900_set_config(struct net_device *dev, struct ifmap *map) | |
6aa20a22 | 2150 | { |
8f15ea42 | 2151 | struct sis900_private *sis_priv = netdev_priv(dev); |
1da177e4 | 2152 | struct mii_phy *mii_phy = sis_priv->mii; |
6aa20a22 | 2153 | |
1da177e4 LT |
2154 | u16 status; |
2155 | ||
2156 | if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) { | |
2157 | /* we switch on the ifmap->port field. I couldn't find anything | |
2158 | * like a definition or standard for the values of that field. | |
2159 | * I think the meaning of those values is device specific. But | |
2160 | * since I would like to change the media type via the ifconfig | |
6aa20a22 | 2161 | * command I use the definition from linux/netdevice.h |
1da177e4 LT |
2162 | * (which seems to be different from the ifport(pcmcia) definition) */ |
2163 | switch(map->port){ | |
6aa20a22 | 2164 | case IF_PORT_UNKNOWN: /* use auto here */ |
1da177e4 LT |
2165 | dev->if_port = map->port; |
2166 | /* we are going to change the media type, so the Link | |
2167 | * will be temporary down and we need to reflect that | |
2168 | * here. When the Link comes up again, it will be | |
2169 | * sensed by the sis_timer procedure, which also does | |
2170 | * all the rest for us */ | |
2171 | netif_carrier_off(dev); | |
6aa20a22 | 2172 | |
1da177e4 LT |
2173 | /* read current state */ |
2174 | status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); | |
6aa20a22 | 2175 | |
1da177e4 LT |
2176 | /* enable auto negotiation and reset the negotioation |
2177 | * (I don't really know what the auto negatiotiation | |
2178 | * reset really means, but it sounds for me right to | |
2179 | * do one here) */ | |
2180 | mdio_write(dev, mii_phy->phy_addr, | |
2181 | MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO); | |
2182 | ||
2183 | break; | |
6aa20a22 JG |
2184 | |
2185 | case IF_PORT_10BASET: /* 10BaseT */ | |
1da177e4 | 2186 | dev->if_port = map->port; |
6aa20a22 | 2187 | |
1da177e4 LT |
2188 | /* we are going to change the media type, so the Link |
2189 | * will be temporary down and we need to reflect that | |
2190 | * here. When the Link comes up again, it will be | |
2191 | * sensed by the sis_timer procedure, which also does | |
2192 | * all the rest for us */ | |
2193 | netif_carrier_off(dev); | |
6aa20a22 | 2194 | |
1da177e4 LT |
2195 | /* set Speed to 10Mbps */ |
2196 | /* read current state */ | |
2197 | status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); | |
6aa20a22 | 2198 | |
1da177e4 LT |
2199 | /* disable auto negotiation and force 10MBit mode*/ |
2200 | mdio_write(dev, mii_phy->phy_addr, | |
2201 | MII_CONTROL, status & ~(MII_CNTL_SPEED | | |
2202 | MII_CNTL_AUTO)); | |
2203 | break; | |
6aa20a22 | 2204 | |
1da177e4 | 2205 | case IF_PORT_100BASET: /* 100BaseT */ |
6aa20a22 | 2206 | case IF_PORT_100BASETX: /* 100BaseTx */ |
1da177e4 | 2207 | dev->if_port = map->port; |
6aa20a22 | 2208 | |
1da177e4 LT |
2209 | /* we are going to change the media type, so the Link |
2210 | * will be temporary down and we need to reflect that | |
2211 | * here. When the Link comes up again, it will be | |
2212 | * sensed by the sis_timer procedure, which also does | |
2213 | * all the rest for us */ | |
2214 | netif_carrier_off(dev); | |
6aa20a22 | 2215 | |
1da177e4 LT |
2216 | /* set Speed to 100Mbps */ |
2217 | /* disable auto negotiation and enable 100MBit Mode */ | |
2218 | status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL); | |
2219 | mdio_write(dev, mii_phy->phy_addr, | |
2220 | MII_CONTROL, (status & ~MII_CNTL_SPEED) | | |
2221 | MII_CNTL_SPEED); | |
6aa20a22 | 2222 | |
1da177e4 | 2223 | break; |
6aa20a22 | 2224 | |
1da177e4 LT |
2225 | case IF_PORT_10BASE2: /* 10Base2 */ |
2226 | case IF_PORT_AUI: /* AUI */ | |
2227 | case IF_PORT_100BASEFX: /* 100BaseFx */ | |
2228 | /* These Modes are not supported (are they?)*/ | |
2229 | return -EOPNOTSUPP; | |
2230 | break; | |
6aa20a22 | 2231 | |
1da177e4 LT |
2232 | default: |
2233 | return -EINVAL; | |
2234 | } | |
2235 | } | |
2236 | return 0; | |
2237 | } | |
2238 | ||
2239 | /** | |
6aa20a22 | 2240 | * sis900_mcast_bitnr - compute hashtable index |
1da177e4 LT |
2241 | * @addr: multicast address |
2242 | * @revision: revision id of chip | |
2243 | * | |
2244 | * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast | |
2245 | * hash table, which makes this function a little bit different from other drivers | |
2246 | * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits | |
6aa20a22 | 2247 | * multicast hash table. |
1da177e4 LT |
2248 | */ |
2249 | ||
2250 | static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision) | |
2251 | { | |
2252 | ||
2253 | u32 crc = ether_crc(6, addr); | |
2254 | ||
2255 | /* leave 8 or 7 most siginifant bits */ | |
2256 | if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV)) | |
2257 | return ((int)(crc >> 24)); | |
2258 | else | |
2259 | return ((int)(crc >> 25)); | |
2260 | } | |
2261 | ||
2262 | /** | |
6aa20a22 | 2263 | * set_rx_mode - Set SiS900 receive mode |
1da177e4 LT |
2264 | * @net_dev: the net device to be set |
2265 | * | |
2266 | * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode. | |
2267 | * And set the appropriate multicast filter. | |
2268 | * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0. | |
2269 | */ | |
2270 | ||
2271 | static void set_rx_mode(struct net_device *net_dev) | |
2272 | { | |
2273 | long ioaddr = net_dev->base_addr; | |
8f15ea42 | 2274 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
2275 | u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */ |
2276 | int i, table_entries; | |
2277 | u32 rx_mode; | |
2278 | ||
7f927fcc | 2279 | /* 635 Hash Table entries = 256(2^16) */ |
1da177e4 LT |
2280 | if((sis_priv->chipset_rev >= SIS635A_900_REV) || |
2281 | (sis_priv->chipset_rev == SIS900B_900_REV)) | |
2282 | table_entries = 16; | |
2283 | else | |
2284 | table_entries = 8; | |
2285 | ||
2286 | if (net_dev->flags & IFF_PROMISC) { | |
2287 | /* Accept any kinds of packets */ | |
2288 | rx_mode = RFPromiscuous; | |
2289 | for (i = 0; i < table_entries; i++) | |
2290 | mc_filter[i] = 0xffff; | |
2291 | } else if ((net_dev->mc_count > multicast_filter_limit) || | |
2292 | (net_dev->flags & IFF_ALLMULTI)) { | |
2293 | /* too many multicast addresses or accept all multicast packet */ | |
2294 | rx_mode = RFAAB | RFAAM; | |
2295 | for (i = 0; i < table_entries; i++) | |
2296 | mc_filter[i] = 0xffff; | |
2297 | } else { | |
2298 | /* Accept Broadcast packet, destination address matchs our | |
2299 | * MAC address, use Receive Filter to reject unwanted MCAST | |
2300 | * packets */ | |
2301 | struct dev_mc_list *mclist; | |
2302 | rx_mode = RFAAB; | |
2303 | for (i = 0, mclist = net_dev->mc_list; | |
2304 | mclist && i < net_dev->mc_count; | |
2305 | i++, mclist = mclist->next) { | |
2306 | unsigned int bit_nr = | |
2307 | sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev); | |
2308 | mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf)); | |
2309 | } | |
2310 | } | |
2311 | ||
2312 | /* update Multicast Hash Table in Receive Filter */ | |
2313 | for (i = 0; i < table_entries; i++) { | |
2314 | /* why plus 0x04 ??, That makes the correct value for hash table. */ | |
2315 | outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr); | |
2316 | outl(mc_filter[i], ioaddr + rfdr); | |
2317 | } | |
2318 | ||
2319 | outl(RFEN | rx_mode, ioaddr + rfcr); | |
2320 | ||
2321 | /* sis900 is capable of looping back packets at MAC level for | |
2322 | * debugging purpose */ | |
2323 | if (net_dev->flags & IFF_LOOPBACK) { | |
2324 | u32 cr_saved; | |
2325 | /* We must disable Tx/Rx before setting loopback mode */ | |
2326 | cr_saved = inl(ioaddr + cr); | |
2327 | outl(cr_saved | TxDIS | RxDIS, ioaddr + cr); | |
2328 | /* enable loopback */ | |
2329 | outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg); | |
2330 | outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg); | |
2331 | /* restore cr */ | |
2332 | outl(cr_saved, ioaddr + cr); | |
2333 | } | |
2334 | ||
2335 | return; | |
2336 | } | |
2337 | ||
2338 | /** | |
6aa20a22 | 2339 | * sis900_reset - Reset sis900 MAC |
1da177e4 LT |
2340 | * @net_dev: the net device to reset |
2341 | * | |
2342 | * reset sis900 MAC and wait until finished | |
2343 | * reset through command register | |
2344 | * change backoff algorithm for 900B0 & 635 M/B | |
2345 | */ | |
2346 | ||
2347 | static void sis900_reset(struct net_device *net_dev) | |
2348 | { | |
8f15ea42 | 2349 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
2350 | long ioaddr = net_dev->base_addr; |
2351 | int i = 0; | |
2352 | u32 status = TxRCMP | RxRCMP; | |
2353 | ||
2354 | outl(0, ioaddr + ier); | |
2355 | outl(0, ioaddr + imr); | |
2356 | outl(0, ioaddr + rfcr); | |
2357 | ||
2358 | outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr); | |
6aa20a22 | 2359 | |
1da177e4 LT |
2360 | /* Check that the chip has finished the reset. */ |
2361 | while (status && (i++ < 1000)) { | |
2362 | status ^= (inl(isr + ioaddr) & status); | |
2363 | } | |
2364 | ||
2365 | if( (sis_priv->chipset_rev >= SIS635A_900_REV) || | |
2366 | (sis_priv->chipset_rev == SIS900B_900_REV) ) | |
2367 | outl(PESEL | RND_CNT, ioaddr + cfg); | |
2368 | else | |
2369 | outl(PESEL, ioaddr + cfg); | |
2370 | } | |
2371 | ||
2372 | /** | |
6aa20a22 | 2373 | * sis900_remove - Remove sis900 device |
1da177e4 LT |
2374 | * @pci_dev: the pci device to be removed |
2375 | * | |
2376 | * remove and release SiS900 net device | |
2377 | */ | |
2378 | ||
2379 | static void __devexit sis900_remove(struct pci_dev *pci_dev) | |
2380 | { | |
2381 | struct net_device *net_dev = pci_get_drvdata(pci_dev); | |
8f15ea42 | 2382 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
2383 | struct mii_phy *phy = NULL; |
2384 | ||
2385 | while (sis_priv->first_mii) { | |
2386 | phy = sis_priv->first_mii; | |
2387 | sis_priv->first_mii = phy->next; | |
2388 | kfree(phy); | |
2389 | } | |
2390 | ||
2391 | pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring, | |
2392 | sis_priv->rx_ring_dma); | |
2393 | pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring, | |
2394 | sis_priv->tx_ring_dma); | |
2395 | unregister_netdev(net_dev); | |
2396 | free_netdev(net_dev); | |
2397 | pci_release_regions(pci_dev); | |
2398 | pci_set_drvdata(pci_dev, NULL); | |
2399 | } | |
2400 | ||
2401 | #ifdef CONFIG_PM | |
2402 | ||
2403 | static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state) | |
2404 | { | |
2405 | struct net_device *net_dev = pci_get_drvdata(pci_dev); | |
2406 | long ioaddr = net_dev->base_addr; | |
2407 | ||
2408 | if(!netif_running(net_dev)) | |
2409 | return 0; | |
2410 | ||
2411 | netif_stop_queue(net_dev); | |
2412 | netif_device_detach(net_dev); | |
2413 | ||
2414 | /* Stop the chip's Tx and Rx Status Machine */ | |
2415 | outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr); | |
2416 | ||
2417 | pci_set_power_state(pci_dev, PCI_D3hot); | |
2418 | pci_save_state(pci_dev); | |
2419 | ||
2420 | return 0; | |
2421 | } | |
2422 | ||
2423 | static int sis900_resume(struct pci_dev *pci_dev) | |
2424 | { | |
2425 | struct net_device *net_dev = pci_get_drvdata(pci_dev); | |
8f15ea42 | 2426 | struct sis900_private *sis_priv = netdev_priv(net_dev); |
1da177e4 LT |
2427 | long ioaddr = net_dev->base_addr; |
2428 | ||
2429 | if(!netif_running(net_dev)) | |
2430 | return 0; | |
2431 | pci_restore_state(pci_dev); | |
2432 | pci_set_power_state(pci_dev, PCI_D0); | |
2433 | ||
2434 | sis900_init_rxfilter(net_dev); | |
2435 | ||
2436 | sis900_init_tx_ring(net_dev); | |
2437 | sis900_init_rx_ring(net_dev); | |
2438 | ||
2439 | set_rx_mode(net_dev); | |
2440 | ||
2441 | netif_device_attach(net_dev); | |
2442 | netif_start_queue(net_dev); | |
2443 | ||
2444 | /* Workaround for EDB */ | |
2445 | sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED); | |
2446 | ||
2447 | /* Enable all known interrupts by setting the interrupt mask. */ | |
2448 | outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr); | |
2449 | outl(RxENA | inl(ioaddr + cr), ioaddr + cr); | |
2450 | outl(IE, ioaddr + ier); | |
2451 | ||
2452 | sis900_check_mode(net_dev, sis_priv->mii); | |
2453 | ||
2454 | return 0; | |
2455 | } | |
2456 | #endif /* CONFIG_PM */ | |
2457 | ||
2458 | static struct pci_driver sis900_pci_driver = { | |
2459 | .name = SIS900_MODULE_NAME, | |
2460 | .id_table = sis900_pci_tbl, | |
2461 | .probe = sis900_probe, | |
2462 | .remove = __devexit_p(sis900_remove), | |
2463 | #ifdef CONFIG_PM | |
2464 | .suspend = sis900_suspend, | |
2465 | .resume = sis900_resume, | |
2466 | #endif /* CONFIG_PM */ | |
2467 | }; | |
2468 | ||
2469 | static int __init sis900_init_module(void) | |
2470 | { | |
2471 | /* when a module, this is printed whether or not devices are found in probe */ | |
2472 | #ifdef MODULE | |
2473 | printk(version); | |
2474 | #endif | |
2475 | ||
29917620 | 2476 | return pci_register_driver(&sis900_pci_driver); |
1da177e4 LT |
2477 | } |
2478 | ||
2479 | static void __exit sis900_cleanup_module(void) | |
2480 | { | |
2481 | pci_unregister_driver(&sis900_pci_driver); | |
2482 | } | |
2483 | ||
2484 | module_init(sis900_init_module); | |
2485 | module_exit(sis900_cleanup_module); | |
2486 |