ehea: Enable DLPAR memory remove
[deliverable/linux.git] / drivers / net / smc911x.c
CommitLineData
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1/*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
d5498bef 7 * and the smsc911x.c reference driver by SMSC
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8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33/* Debugging options */
34#define ENABLE_SMC_DEBUG_RX 0
35#define ENABLE_SMC_DEBUG_TX 0
36#define ENABLE_SMC_DEBUG_DMA 0
37#define ENABLE_SMC_DEBUG_PKTS 0
38#define ENABLE_SMC_DEBUG_MISC 0
39#define ENABLE_SMC_DEBUG_FUNC 0
40
41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48#ifndef SMC_DEBUG
49#define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56#endif
57
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58#include <linux/init.h>
59#include <linux/module.h>
60#include <linux/kernel.h>
61#include <linux/sched.h>
62#include <linux/slab.h>
63#include <linux/delay.h>
64#include <linux/interrupt.h>
65#include <linux/errno.h>
66#include <linux/ioport.h>
67#include <linux/crc32.h>
68#include <linux/device.h>
69#include <linux/platform_device.h>
70#include <linux/spinlock.h>
71#include <linux/ethtool.h>
72#include <linux/mii.h>
73#include <linux/workqueue.h>
74
75#include <linux/netdevice.h>
76#include <linux/etherdevice.h>
77#include <linux/skbuff.h>
78
79#include <asm/io.h>
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80
81#include "smc911x.h"
82
83/*
84 * Transmit timeout, default 5 seconds.
85 */
86static int watchdog = 5000;
87module_param(watchdog, int, 0400);
88MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89
90static int tx_fifo_kb=8;
91module_param(tx_fifo_kb, int, 0400);
92MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93
94MODULE_LICENSE("GPL");
72abb461 95MODULE_ALIAS("platform:smc911x");
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96
97/*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102#define CARDNAME "smc911x"
103
104/*
105 * Use power-down feature of the chip
106 */
107#define POWER_DOWN 1
108
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109#if SMC_DEBUG > 0
110#define DBG(n, args...) \
111 do { \
112 if (SMC_DEBUG & (n)) \
113 printk(args); \
114 } while (0)
115
116#define PRINTK(args...) printk(args)
117#else
118#define DBG(n, args...) do { } while (0)
119#define PRINTK(args...) printk(KERN_DEBUG args)
120#endif
121
122#if SMC_DEBUG_PKTS > 0
123static void PRINT_PKT(u_char *buf, int length)
124{
125 int i;
126 int remainder;
127 int lines;
128
129 lines = length / 16;
130 remainder = length % 16;
131
132 for (i = 0; i < lines ; i ++) {
133 int cur;
134 for (cur = 0; cur < 8; cur++) {
135 u_char a, b;
136 a = *buf++;
137 b = *buf++;
138 printk("%02x%02x ", a, b);
139 }
140 printk("\n");
141 }
142 for (i = 0; i < remainder/2 ; i++) {
143 u_char a, b;
144 a = *buf++;
145 b = *buf++;
146 printk("%02x%02x ", a, b);
147 }
148 printk("\n");
149}
150#else
151#define PRINT_PKT(x...) do { } while (0)
152#endif
153
154
155/* this enables an interrupt in the interrupt mask register */
699559f8 156#define SMC_ENABLE_INT(lp, x) do { \
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157 unsigned int __mask; \
158 unsigned long __flags; \
159 spin_lock_irqsave(&lp->lock, __flags); \
699559f8 160 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 161 __mask |= (x); \
699559f8 162 SMC_SET_INT_EN((lp), __mask); \
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163 spin_unlock_irqrestore(&lp->lock, __flags); \
164} while (0)
165
166/* this disables an interrupt from the interrupt mask register */
699559f8 167#define SMC_DISABLE_INT(lp, x) do { \
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168 unsigned int __mask; \
169 unsigned long __flags; \
170 spin_lock_irqsave(&lp->lock, __flags); \
699559f8 171 __mask = SMC_GET_INT_EN((lp)); \
0a0c72c9 172 __mask &= ~(x); \
699559f8 173 SMC_SET_INT_EN((lp), __mask); \
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174 spin_unlock_irqrestore(&lp->lock, __flags); \
175} while (0)
176
177/*
178 * this does a soft reset on the device
179 */
180static void smc911x_reset(struct net_device *dev)
181{
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182 struct smc911x_local *lp = netdev_priv(dev);
183 unsigned int reg, timeout=0, resets=1;
184 unsigned long flags;
185
186 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
187
188 /* Take out of PM setting first */
699559f8 189 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
0a0c72c9 190 /* Write to the bytetest will take out of powerdown */
699559f8 191 SMC_SET_BYTE_TEST(lp, 0);
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192 timeout=10;
193 do {
194 udelay(10);
699559f8 195 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
db2961c5 196 } while (--timeout && !reg);
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197 if (timeout == 0) {
198 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
199 return;
200 }
201 }
202
203 /* Disable all interrupts */
204 spin_lock_irqsave(&lp->lock, flags);
699559f8 205 SMC_SET_INT_EN(lp, 0);
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206 spin_unlock_irqrestore(&lp->lock, flags);
207
208 while (resets--) {
699559f8 209 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
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210 timeout=10;
211 do {
212 udelay(10);
699559f8 213 reg = SMC_GET_HW_CFG(lp);
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214 /* If chip indicates reset timeout then try again */
215 if (reg & HW_CFG_SRST_TO_) {
216 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
217 resets++;
218 break;
219 }
db2961c5 220 } while (--timeout && (reg & HW_CFG_SRST_));
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221 }
222 if (timeout == 0) {
223 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
224 return;
225 }
226
227 /* make sure EEPROM has finished loading before setting GPIO_CFG */
228 timeout=1000;
699559f8 229 while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) {
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230 udelay(10);
231 }
232 if (timeout == 0){
233 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
234 return;
235 }
236
237 /* Initialize interrupts */
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238 SMC_SET_INT_EN(lp, 0);
239 SMC_ACK_INT(lp, -1);
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240
241 /* Reset the FIFO level and flow control settings */
699559f8 242 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
0a0c72c9 243//TODO: Figure out what appropriate pause time is
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244 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
245 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
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246
247
248 /* Set to LED outputs */
699559f8 249 SMC_SET_GPIO_CFG(lp, 0x70070000);
0a0c72c9 250
d5498bef 251 /*
0a0c72c9 252 * Deassert IRQ for 1*10us for edge type interrupts
d5498bef 253 * and drive IRQ pin push-pull
0a0c72c9 254 */
699559f8 255 SMC_SET_IRQ_CFG(lp, (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_);
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256
257 /* clear anything saved */
258 if (lp->pending_tx_skb != NULL) {
259 dev_kfree_skb (lp->pending_tx_skb);
260 lp->pending_tx_skb = NULL;
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261 dev->stats.tx_errors++;
262 dev->stats.tx_aborted_errors++;
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263 }
264}
265
266/*
267 * Enable Interrupts, Receive, and Transmit
268 */
269static void smc911x_enable(struct net_device *dev)
270{
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271 struct smc911x_local *lp = netdev_priv(dev);
272 unsigned mask, cfg, cr;
273 unsigned long flags;
274
275 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
276
699559f8 277 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
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278
279 /* Enable TX */
699559f8 280 cfg = SMC_GET_HW_CFG(lp);
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281 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
282 cfg |= HW_CFG_SF_;
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283 SMC_SET_HW_CFG(lp, cfg);
284 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9 285 /* Update TX stats on every 64 packets received or every 1 sec */
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286 SMC_SET_FIFO_TSL(lp, 64);
287 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
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288
289 spin_lock_irqsave(&lp->lock, flags);
699559f8 290 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 291 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
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292 SMC_SET_MAC_CR(lp, cr);
293 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
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294 spin_unlock_irqrestore(&lp->lock, flags);
295
296 /* Add 2 byte padding to start of packets */
699559f8 297 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
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298
299 /* Turn on receiver and enable RX */
300 if (cr & MAC_CR_RXEN_)
301 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
302
303 spin_lock_irqsave(&lp->lock, flags);
699559f8 304 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
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305 spin_unlock_irqrestore(&lp->lock, flags);
306
307 /* Interrupt on every received packet */
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308 SMC_SET_FIFO_RSA(lp, 0x01);
309 SMC_SET_FIFO_RSL(lp, 0x00);
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310
311 /* now, enable interrupts */
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312 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
313 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
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314 INT_EN_PHY_INT_EN_;
315 if (IS_REV_A(lp->revision))
316 mask|=INT_EN_RDFL_EN_;
317 else {
318 mask|=INT_EN_RDFO_EN_;
319 }
699559f8 320 SMC_ENABLE_INT(lp, mask);
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321}
322
323/*
324 * this puts the device in an inactive state
325 */
326static void smc911x_shutdown(struct net_device *dev)
327{
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328 struct smc911x_local *lp = netdev_priv(dev);
329 unsigned cr;
330 unsigned long flags;
331
332 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
333
334 /* Disable IRQ's */
699559f8 335 SMC_SET_INT_EN(lp, 0);
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336
337 /* Turn of Rx and TX */
338 spin_lock_irqsave(&lp->lock, flags);
699559f8 339 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 340 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
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341 SMC_SET_MAC_CR(lp, cr);
342 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
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343 spin_unlock_irqrestore(&lp->lock, flags);
344}
345
346static inline void smc911x_drop_pkt(struct net_device *dev)
d5498bef 347{
699559f8 348 struct smc911x_local *lp = netdev_priv(dev);
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349 unsigned int fifo_count, timeout, reg;
350
351 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
699559f8 352 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
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353 if (fifo_count <= 4) {
354 /* Manually dump the packet data */
355 while (fifo_count--)
699559f8 356 SMC_GET_RX_FIFO(lp);
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357 } else {
358 /* Fast forward through the bad packet */
699559f8 359 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
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360 timeout=50;
361 do {
362 udelay(10);
699559f8 363 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
db2961c5 364 } while (--timeout && reg);
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365 if (timeout == 0) {
366 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
367 }
368 }
369}
370
371/*
372 * This is the procedure to handle the receipt of a packet.
373 * It should be called after checking for packet presence in
d5498bef 374 * the RX status FIFO. It must be called with the spin lock
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375 * already held.
376 */
377static inline void smc911x_rcv(struct net_device *dev)
378{
699559f8 379 struct smc911x_local *lp = netdev_priv(dev);
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380 unsigned int pkt_len, status;
381 struct sk_buff *skb;
382 unsigned char *data;
383
d5498bef 384 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
0a0c72c9 385 dev->name, __FUNCTION__);
699559f8 386 status = SMC_GET_RX_STS_FIFO(lp);
d5498bef 387 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
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388 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
389 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
d5498bef 390 if (status & RX_STS_ES_) {
0a0c72c9 391 /* Deal with a bad packet */
09f75cd7 392 dev->stats.rx_errors++;
d5498bef 393 if (status & RX_STS_CRC_ERR_)
09f75cd7 394 dev->stats.rx_crc_errors++;
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395 else {
396 if (status & RX_STS_LEN_ERR_)
09f75cd7 397 dev->stats.rx_length_errors++;
d5498bef 398 if (status & RX_STS_MCAST_)
09f75cd7 399 dev->stats.multicast++;
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400 }
401 /* Remove the bad packet data from the RX FIFO */
402 smc911x_drop_pkt(dev);
403 } else {
404 /* Receive a valid packet */
405 /* Alloc a buffer with extra room for DMA alignment */
406 skb=dev_alloc_skb(pkt_len+32);
407 if (unlikely(skb == NULL)) {
408 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
409 dev->name);
09f75cd7 410 dev->stats.rx_dropped++;
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411 smc911x_drop_pkt(dev);
412 return;
413 }
d5498bef 414 /* Align IP header to 32 bits
0a0c72c9 415 * Note that the device is configured to add a 2
d5498bef 416 * byte padding to the packet start, so we really
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417 * want to write to the orignal data pointer */
418 data = skb->data;
419 skb_reserve(skb, 2);
420 skb_put(skb,pkt_len-4);
421#ifdef SMC_USE_DMA
422 {
423 unsigned int fifo;
424 /* Lower the FIFO threshold if possible */
699559f8 425 fifo = SMC_GET_FIFO_INT(lp);
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426 if (fifo & 0xFF) fifo--;
427 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
428 dev->name, fifo & 0xff);
699559f8 429 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9 430 /* Setup RX DMA */
699559f8 431 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
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432 lp->rxdma_active = 1;
433 lp->current_rx_skb = skb;
699559f8 434 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
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435 /* Packet processing deferred to DMA RX interrupt */
436 }
437#else
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438 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
439 SMC_PULL_DATA(lp, data, pkt_len+2+3);
0a0c72c9 440
b4cf2058 441 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
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442 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
443 dev->last_rx = jiffies;
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444 skb->protocol = eth_type_trans(skb, dev);
445 netif_rx(skb);
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446 dev->stats.rx_packets++;
447 dev->stats.rx_bytes += pkt_len-4;
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448#endif
449 }
450}
451
452/*
453 * This is called to actually send a packet to the chip.
454 */
455static void smc911x_hardware_send_pkt(struct net_device *dev)
456{
457 struct smc911x_local *lp = netdev_priv(dev);
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458 struct sk_buff *skb;
459 unsigned int cmdA, cmdB, len;
460 unsigned char *buf;
461 unsigned long flags;
462
463 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
464 BUG_ON(lp->pending_tx_skb == NULL);
465
466 skb = lp->pending_tx_skb;
467 lp->pending_tx_skb = NULL;
468
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469 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
470 /* cmdB {31:16] pkt tag [10:0] length */
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471#ifdef SMC_USE_DMA
472 /* 16 byte buffer alignment mode */
473 buf = (char*)((u32)(skb->data) & ~0xF);
d5498bef 474 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
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475 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
476 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
477 skb->len;
478#else
479 buf = (char*)((u32)skb->data & ~0x3);
d5498bef 480 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
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481 cmdA = (((u32)skb->data & 0x3) << 16) |
482 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
483 skb->len;
484#endif
d5498bef 485 /* tag is packet length so we can use this in stats update later */
0a0c72c9 486 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
d5498bef 487
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488 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
489 dev->name, len, len, buf, cmdA, cmdB);
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490 SMC_SET_TX_FIFO(lp, cmdA);
491 SMC_SET_TX_FIFO(lp, cmdB);
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492
493 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
494 PRINT_PKT(buf, len <= 64 ? len : 64);
495
496 /* Send pkt via PIO or DMA */
497#ifdef SMC_USE_DMA
498 lp->current_tx_skb = skb;
699559f8 499 SMC_PUSH_DATA(lp, buf, len);
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500 /* DMA complete IRQ will free buffer and set jiffies */
501#else
699559f8 502 SMC_PUSH_DATA(lp, buf, len);
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503 dev->trans_start = jiffies;
504 dev_kfree_skb(skb);
505#endif
506 spin_lock_irqsave(&lp->lock, flags);
507 if (!lp->tx_throttle) {
508 netif_wake_queue(dev);
509 }
510 spin_unlock_irqrestore(&lp->lock, flags);
699559f8 511 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
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512}
513
514/*
515 * Since I am not sure if I will have enough room in the chip's ram
516 * to store the packet, I call this routine which either sends it
517 * now, or set the card to generates an interrupt when ready
518 * for the packet.
519 */
520static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
521{
522 struct smc911x_local *lp = netdev_priv(dev);
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523 unsigned int free;
524 unsigned long flags;
525
d5498bef 526 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
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527 dev->name, __FUNCTION__);
528
529 BUG_ON(lp->pending_tx_skb != NULL);
530
699559f8 531 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
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532 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
533
534 /* Turn off the flow when running out of space in FIFO */
535 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
d5498bef 536 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
0a0c72c9
DM
537 dev->name, free);
538 spin_lock_irqsave(&lp->lock, flags);
539 /* Reenable when at least 1 packet of size MTU present */
699559f8 540 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
0a0c72c9
DM
541 lp->tx_throttle = 1;
542 netif_stop_queue(dev);
543 spin_unlock_irqrestore(&lp->lock, flags);
544 }
545
d5498bef 546 /* Drop packets when we run out of space in TX FIFO
0a0c72c9 547 * Account for overhead required for:
d5498bef
JG
548 *
549 * Tx command words 8 bytes
0a0c72c9
DM
550 * Start offset 15 bytes
551 * End padding 15 bytes
d5498bef 552 */
0a0c72c9 553 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
d5498bef 554 printk("%s: No Tx free space %d < %d\n",
0a0c72c9
DM
555 dev->name, free, skb->len);
556 lp->pending_tx_skb = NULL;
09f75cd7
JG
557 dev->stats.tx_errors++;
558 dev->stats.tx_dropped++;
0a0c72c9
DM
559 dev_kfree_skb(skb);
560 return 0;
561 }
d5498bef 562
0a0c72c9
DM
563#ifdef SMC_USE_DMA
564 {
565 /* If the DMA is already running then defer this packet Tx until
d5498bef 566 * the DMA IRQ starts it
0a0c72c9
DM
567 */
568 spin_lock_irqsave(&lp->lock, flags);
569 if (lp->txdma_active) {
570 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
571 lp->pending_tx_skb = skb;
572 netif_stop_queue(dev);
573 spin_unlock_irqrestore(&lp->lock, flags);
574 return 0;
575 } else {
576 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
577 lp->txdma_active = 1;
578 }
579 spin_unlock_irqrestore(&lp->lock, flags);
580 }
581#endif
582 lp->pending_tx_skb = skb;
583 smc911x_hardware_send_pkt(dev);
584
585 return 0;
586}
587
588/*
589 * This handles a TX status interrupt, which is only called when:
590 * - a TX error occurred, or
591 * - TX of a packet completed.
592 */
593static void smc911x_tx(struct net_device *dev)
594{
0a0c72c9
DM
595 struct smc911x_local *lp = netdev_priv(dev);
596 unsigned int tx_status;
597
d5498bef 598 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
0a0c72c9
DM
599 dev->name, __FUNCTION__);
600
601 /* Collect the TX status */
699559f8 602 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
d5498bef
JG
603 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
604 dev->name,
699559f8
MD
605 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
606 tx_status = SMC_GET_TX_STS_FIFO(lp);
09f75cd7
JG
607 dev->stats.tx_packets++;
608 dev->stats.tx_bytes+=tx_status>>16;
d5498bef
JG
609 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
610 dev->name, (tx_status & 0xffff0000) >> 16,
0a0c72c9 611 tx_status & 0x0000ffff);
d5498bef 612 /* count Tx errors, but ignore lost carrier errors when in
0a0c72c9 613 * full-duplex mode */
d5498bef 614 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
0a0c72c9 615 !(tx_status & 0x00000306))) {
09f75cd7 616 dev->stats.tx_errors++;
0a0c72c9
DM
617 }
618 if (tx_status & TX_STS_MANY_COLL_) {
09f75cd7
JG
619 dev->stats.collisions+=16;
620 dev->stats.tx_aborted_errors++;
0a0c72c9 621 } else {
09f75cd7 622 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
0a0c72c9
DM
623 }
624 /* carrier error only has meaning for half-duplex communication */
d5498bef 625 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
0a0c72c9 626 !lp->ctl_rfduplx) {
09f75cd7 627 dev->stats.tx_carrier_errors++;
d5498bef 628 }
0a0c72c9 629 if (tx_status & TX_STS_LATE_COLL_) {
09f75cd7
JG
630 dev->stats.collisions++;
631 dev->stats.tx_aborted_errors++;
0a0c72c9
DM
632 }
633 }
634}
635
636
637/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
638/*
639 * Reads a register from the MII Management serial interface
640 */
641
642static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
643{
699559f8 644 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
645 unsigned int phydata;
646
699559f8 647 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
648
649 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
650 __FUNCTION__, phyaddr, phyreg, phydata);
651 return phydata;
652}
653
654
655/*
656 * Writes a register to the MII Management serial interface
657 */
658static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
659 int phydata)
660{
699559f8 661 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
662
663 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
664 __FUNCTION__, phyaddr, phyreg, phydata);
665
699559f8 666 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
0a0c72c9
DM
667}
668
669/*
670 * Finds and reports the PHY address (115 and 117 have external
671 * PHY interface 118 has internal only
672 */
673static void smc911x_phy_detect(struct net_device *dev)
674{
0a0c72c9
DM
675 struct smc911x_local *lp = netdev_priv(dev);
676 int phyaddr;
677 unsigned int cfg, id1, id2;
678
679 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
680
681 lp->phy_type = 0;
682
683 /*
684 * Scan all 32 PHY addresses if necessary, starting at
685 * PHY#1 to PHY#31, and then PHY#0 last.
686 */
687 switch(lp->version) {
688 case 0x115:
689 case 0x117:
699559f8 690 cfg = SMC_GET_HW_CFG(lp);
0a0c72c9
DM
691 if (cfg & HW_CFG_EXT_PHY_DET_) {
692 cfg &= ~HW_CFG_PHY_CLK_SEL_;
693 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
699559f8 694 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
695 udelay(10); /* Wait for clocks to stop */
696
697 cfg |= HW_CFG_EXT_PHY_EN_;
699559f8 698 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
699 udelay(10); /* Wait for clocks to stop */
700
701 cfg &= ~HW_CFG_PHY_CLK_SEL_;
702 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
699559f8 703 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
704 udelay(10); /* Wait for clocks to stop */
705
706 cfg |= HW_CFG_SMI_SEL_;
699559f8 707 SMC_SET_HW_CFG(lp, cfg);
0a0c72c9
DM
708
709 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
710
711 /* Read the PHY identifiers */
699559f8
MD
712 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
713 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
0a0c72c9
DM
714
715 /* Make sure it is a valid identifier */
d5498bef
JG
716 if (id1 != 0x0000 && id1 != 0xffff &&
717 id1 != 0x8000 && id2 != 0x0000 &&
0a0c72c9
DM
718 id2 != 0xffff && id2 != 0x8000) {
719 /* Save the PHY's address */
720 lp->mii.phy_id = phyaddr & 31;
721 lp->phy_type = id1 << 16 | id2;
722 break;
723 }
724 }
725 }
726 default:
727 /* Internal media only */
699559f8
MD
728 SMC_GET_PHY_ID1(lp, 1, id1);
729 SMC_GET_PHY_ID2(lp, 1, id2);
0a0c72c9
DM
730 /* Save the PHY's address */
731 lp->mii.phy_id = 1;
732 lp->phy_type = id1 << 16 | id2;
733 }
734
735 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
736 dev->name, id1, id2, lp->mii.phy_id);
737}
738
739/*
740 * Sets the PHY to a configuration as determined by the user.
741 * Called with spin_lock held.
742 */
743static int smc911x_phy_fixed(struct net_device *dev)
744{
745 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
746 int phyaddr = lp->mii.phy_id;
747 int bmcr;
748
749 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
750
751 /* Enter Link Disable state */
699559f8 752 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9 753 bmcr |= BMCR_PDOWN;
699559f8 754 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
755
756 /*
757 * Set our fixed capabilities
758 * Disable auto-negotiation
759 */
760 bmcr &= ~BMCR_ANENABLE;
761 if (lp->ctl_rfduplx)
762 bmcr |= BMCR_FULLDPLX;
763
764 if (lp->ctl_rspeed == 100)
765 bmcr |= BMCR_SPEED100;
766
767 /* Write our capabilities to the phy control register */
699559f8 768 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
769
770 /* Re-Configure the Receive/Phy Control register */
771 bmcr &= ~BMCR_PDOWN;
699559f8 772 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
0a0c72c9
DM
773
774 return 1;
775}
776
777/*
778 * smc911x_phy_reset - reset the phy
779 * @dev: net device
780 * @phy: phy address
781 *
782 * Issue a software reset for the specified PHY and
783 * wait up to 100ms for the reset to complete. We should
784 * not access the PHY for 50ms after issuing the reset.
785 *
786 * The time to wait appears to be dependent on the PHY.
787 *
788 */
789static int smc911x_phy_reset(struct net_device *dev, int phy)
790{
791 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
792 int timeout;
793 unsigned long flags;
794 unsigned int reg;
795
796 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
797
798 spin_lock_irqsave(&lp->lock, flags);
699559f8 799 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
800 reg &= ~0xfffff030;
801 reg |= PMT_CTRL_PHY_RST_;
699559f8 802 SMC_SET_PMT_CTRL(lp, reg);
0a0c72c9
DM
803 spin_unlock_irqrestore(&lp->lock, flags);
804 for (timeout = 2; timeout; timeout--) {
805 msleep(50);
806 spin_lock_irqsave(&lp->lock, flags);
699559f8 807 reg = SMC_GET_PMT_CTRL(lp);
0a0c72c9
DM
808 spin_unlock_irqrestore(&lp->lock, flags);
809 if (!(reg & PMT_CTRL_PHY_RST_)) {
d5498bef 810 /* extra delay required because the phy may
0a0c72c9 811 * not be completed with its reset
d5498bef 812 * when PHY_BCR_RESET_ is cleared. 256us
0a0c72c9
DM
813 * should suffice, but use 500us to be safe
814 */
815 udelay(500);
816 break;
817 }
818 }
819
820 return reg & PMT_CTRL_PHY_RST_;
821}
822
823/*
824 * smc911x_phy_powerdown - powerdown phy
825 * @dev: net device
826 * @phy: phy address
827 *
828 * Power down the specified PHY
829 */
830static void smc911x_phy_powerdown(struct net_device *dev, int phy)
831{
699559f8 832 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
833 unsigned int bmcr;
834
835 /* Enter Link Disable state */
699559f8 836 SMC_GET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9 837 bmcr |= BMCR_PDOWN;
699559f8 838 SMC_SET_PHY_BMCR(lp, phy, bmcr);
0a0c72c9
DM
839}
840
841/*
842 * smc911x_phy_check_media - check the media status and adjust BMCR
843 * @dev: net device
844 * @init: set true for initialisation
845 *
846 * Select duplex mode depending on negotiation state. This
847 * also updates our carrier state.
848 */
849static void smc911x_phy_check_media(struct net_device *dev, int init)
850{
851 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
852 int phyaddr = lp->mii.phy_id;
853 unsigned int bmcr, cr;
854
855 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
856
857 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
858 /* duplex state has changed */
699559f8
MD
859 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
860 SMC_GET_MAC_CR(lp, cr);
0a0c72c9
DM
861 if (lp->mii.full_duplex) {
862 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
863 bmcr |= BMCR_FULLDPLX;
864 cr |= MAC_CR_RCVOWN_;
865 } else {
866 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
867 bmcr &= ~BMCR_FULLDPLX;
868 cr &= ~MAC_CR_RCVOWN_;
869 }
699559f8
MD
870 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
871 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
872 }
873}
874
875/*
876 * Configures the specified PHY through the MII management interface
877 * using Autonegotiation.
878 * Calls smc911x_phy_fixed() if the user has requested a certain config.
879 * If RPC ANEG bit is set, the media selection is dependent purely on
880 * the selection by the MII (either in the MII BMCR reg or the result
881 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
882 * is controlled by the RPC SPEED and RPC DPLX bits.
883 */
ef8142a5 884static void smc911x_phy_configure(struct work_struct *work)
0a0c72c9 885{
ef8142a5
AM
886 struct smc911x_local *lp = container_of(work, struct smc911x_local,
887 phy_configure);
888 struct net_device *dev = lp->netdev;
0a0c72c9
DM
889 int phyaddr = lp->mii.phy_id;
890 int my_phy_caps; /* My PHY capabilities */
891 int my_ad_caps; /* My Advertised capabilities */
892 int status;
893 unsigned long flags;
894
895 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
896
897 /*
898 * We should not be called if phy_type is zero.
899 */
900 if (lp->phy_type == 0)
4bb073c0 901 return;
0a0c72c9
DM
902
903 if (smc911x_phy_reset(dev, phyaddr)) {
904 printk("%s: PHY reset timed out\n", dev->name);
4bb073c0 905 return;
0a0c72c9
DM
906 }
907 spin_lock_irqsave(&lp->lock, flags);
908
909 /*
910 * Enable PHY Interrupts (for register 18)
911 * Interrupts listed here are enabled
912 */
699559f8 913 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
0a0c72c9
DM
914 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
915 PHY_INT_MASK_LINK_DOWN_);
916
917 /* If the user requested no auto neg, then go set his request */
918 if (lp->mii.force_media) {
919 smc911x_phy_fixed(dev);
920 goto smc911x_phy_configure_exit;
921 }
922
923 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
699559f8 924 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
0a0c72c9
DM
925 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
926 printk(KERN_INFO "Auto negotiation NOT supported\n");
927 smc911x_phy_fixed(dev);
928 goto smc911x_phy_configure_exit;
929 }
930
931 /* CSMA capable w/ both pauses */
932 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
933
934 if (my_phy_caps & BMSR_100BASE4)
935 my_ad_caps |= ADVERTISE_100BASE4;
936 if (my_phy_caps & BMSR_100FULL)
937 my_ad_caps |= ADVERTISE_100FULL;
938 if (my_phy_caps & BMSR_100HALF)
939 my_ad_caps |= ADVERTISE_100HALF;
940 if (my_phy_caps & BMSR_10FULL)
941 my_ad_caps |= ADVERTISE_10FULL;
942 if (my_phy_caps & BMSR_10HALF)
943 my_ad_caps |= ADVERTISE_10HALF;
944
945 /* Disable capabilities not selected by our user */
946 if (lp->ctl_rspeed != 100)
947 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
948
949 if (!lp->ctl_rfduplx)
950 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
951
952 /* Update our Auto-Neg Advertisement Register */
699559f8 953 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
0a0c72c9
DM
954 lp->mii.advertising = my_ad_caps;
955
956 /*
957 * Read the register back. Without this, it appears that when
958 * auto-negotiation is restarted, sometimes it isn't ready and
959 * the link does not come up.
960 */
961 udelay(10);
699559f8 962 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
0a0c72c9
DM
963
964 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
965 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
966
967 /* Restart auto-negotiation process in order to advertise my caps */
699559f8 968 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
0a0c72c9
DM
969
970 smc911x_phy_check_media(dev, 1);
971
972smc911x_phy_configure_exit:
973 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
974}
975
976/*
977 * smc911x_phy_interrupt
978 *
979 * Purpose: Handle interrupts relating to PHY register 18. This is
980 * called from the "hard" interrupt handler under our private spinlock.
981 */
982static void smc911x_phy_interrupt(struct net_device *dev)
983{
984 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
985 int phyaddr = lp->mii.phy_id;
986 int status;
987
988 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
989
990 if (lp->phy_type == 0)
991 return;
992
993 smc911x_phy_check_media(dev, 0);
994 /* read to clear status bits */
699559f8 995 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
d5498bef 996 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
0a0c72c9 997 dev->name, status & 0xffff);
d5498bef 998 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
699559f8 999 dev->name, SMC_GET_AFC_CFG(lp));
0a0c72c9
DM
1000}
1001
1002/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1003
1004/*
1005 * This is the main routine of the driver, to handle the device when
1006 * it needs some attention.
1007 */
7d12e780 1008static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
0a0c72c9
DM
1009{
1010 struct net_device *dev = dev_id;
0a0c72c9
DM
1011 struct smc911x_local *lp = netdev_priv(dev);
1012 unsigned int status, mask, timeout;
1013 unsigned int rx_overrun=0, cr, pkts;
1014 unsigned long flags;
1015
1016 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1017
1018 spin_lock_irqsave(&lp->lock, flags);
1019
1020 /* Spurious interrupt check */
699559f8 1021 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
0a0c72c9 1022 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
a4d09272 1023 spin_unlock_irqrestore(&lp->lock, flags);
0a0c72c9
DM
1024 return IRQ_NONE;
1025 }
1026
699559f8
MD
1027 mask = SMC_GET_INT_EN(lp);
1028 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1029
1030 /* set a timeout value, so I don't stay here forever */
1031 timeout = 8;
1032
1033
1034 do {
699559f8 1035 status = SMC_GET_INT(lp);
0a0c72c9
DM
1036
1037 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1038 dev->name, status, mask, status & ~mask);
1039
1040 status &= mask;
1041 if (!status)
1042 break;
1043
1044 /* Handle SW interrupt condition */
1045 if (status & INT_STS_SW_INT_) {
699559f8 1046 SMC_ACK_INT(lp, INT_STS_SW_INT_);
0a0c72c9
DM
1047 mask &= ~INT_EN_SW_INT_EN_;
1048 }
1049 /* Handle various error conditions */
1050 if (status & INT_STS_RXE_) {
699559f8 1051 SMC_ACK_INT(lp, INT_STS_RXE_);
09f75cd7 1052 dev->stats.rx_errors++;
d5498bef 1053 }
0a0c72c9 1054 if (status & INT_STS_RXDFH_INT_) {
699559f8
MD
1055 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1056 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
0a0c72c9
DM
1057 }
1058 /* Undocumented interrupt-what is the right thing to do here? */
1059 if (status & INT_STS_RXDF_INT_) {
699559f8 1060 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
0a0c72c9
DM
1061 }
1062
1063 /* Rx Data FIFO exceeds set level */
1064 if (status & INT_STS_RDFL_) {
1065 if (IS_REV_A(lp->revision)) {
1066 rx_overrun=1;
699559f8 1067 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1068 cr &= ~MAC_CR_RXEN_;
699559f8 1069 SMC_SET_MAC_CR(lp, cr);
0a0c72c9 1070 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1071 dev->stats.rx_errors++;
1072 dev->stats.rx_fifo_errors++;
0a0c72c9 1073 }
699559f8 1074 SMC_ACK_INT(lp, INT_STS_RDFL_);
0a0c72c9
DM
1075 }
1076 if (status & INT_STS_RDFO_) {
1077 if (!IS_REV_A(lp->revision)) {
699559f8 1078 SMC_GET_MAC_CR(lp, cr);
0a0c72c9 1079 cr &= ~MAC_CR_RXEN_;
699559f8 1080 SMC_SET_MAC_CR(lp, cr);
0a0c72c9
DM
1081 rx_overrun=1;
1082 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
09f75cd7
JG
1083 dev->stats.rx_errors++;
1084 dev->stats.rx_fifo_errors++;
0a0c72c9 1085 }
699559f8 1086 SMC_ACK_INT(lp, INT_STS_RDFO_);
0a0c72c9
DM
1087 }
1088 /* Handle receive condition */
1089 if ((status & INT_STS_RSFL_) || rx_overrun) {
1090 unsigned int fifo;
1091 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
699559f8 1092 fifo = SMC_GET_RX_FIFO_INF(lp);
d5498bef
JG
1093 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1094 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
0a0c72c9
DM
1095 dev->name, pkts, fifo & 0xFFFF );
1096 if (pkts != 0) {
1097#ifdef SMC_USE_DMA
1098 unsigned int fifo;
1099 if (lp->rxdma_active){
d5498bef 1100 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
0a0c72c9
DM
1101 "%s: RX DMA active\n", dev->name);
1102 /* The DMA is already running so up the IRQ threshold */
699559f8 1103 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
0a0c72c9 1104 fifo |= pkts & 0xFF;
d5498bef 1105 DBG(SMC_DEBUG_RX,
0a0c72c9
DM
1106 "%s: Setting RX stat FIFO threshold to %d\n",
1107 dev->name, fifo & 0xff);
699559f8 1108 SMC_SET_FIFO_INT(lp, fifo);
0a0c72c9
DM
1109 } else
1110#endif
1111 smc911x_rcv(dev);
1112 }
699559f8 1113 SMC_ACK_INT(lp, INT_STS_RSFL_);
0a0c72c9
DM
1114 }
1115 /* Handle transmit FIFO available */
1116 if (status & INT_STS_TDFA_) {
1117 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
699559f8 1118 SMC_SET_FIFO_TDA(lp, 0xFF);
0a0c72c9
DM
1119 lp->tx_throttle = 0;
1120#ifdef SMC_USE_DMA
1121 if (!lp->txdma_active)
1122#endif
1123 netif_wake_queue(dev);
699559f8 1124 SMC_ACK_INT(lp, INT_STS_TDFA_);
0a0c72c9
DM
1125 }
1126 /* Handle transmit done condition */
1127#if 1
1128 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
d5498bef
JG
1129 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1130 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
699559f8 1131 dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
0a0c72c9 1132 smc911x_tx(dev);
699559f8
MD
1133 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1134 SMC_ACK_INT(lp, INT_STS_TSFL_);
1135 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
0a0c72c9
DM
1136 }
1137#else
1138 if (status & INT_STS_TSFL_) {
1139 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1140 smc911x_tx(dev);
699559f8 1141 SMC_ACK_INT(lp, INT_STS_TSFL_);
0a0c72c9
DM
1142 }
1143
1144 if (status & INT_STS_GPT_INT_) {
d5498bef
JG
1145 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1146 dev->name,
699559f8
MD
1147 SMC_GET_IRQ_CFG(lp),
1148 SMC_GET_FIFO_INT(lp),
1149 SMC_GET_RX_CFG(lp));
0a0c72c9
DM
1150 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1151 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
d5498bef 1152 dev->name,
699559f8
MD
1153 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1154 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1155 SMC_GET_RX_STS_FIFO_PEEK(lp));
1156 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1157 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
0a0c72c9
DM
1158 }
1159#endif
1160
3a4fa0a2 1161 /* Handle PHY interrupt condition */
0a0c72c9
DM
1162 if (status & INT_STS_PHY_INT_) {
1163 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1164 smc911x_phy_interrupt(dev);
699559f8 1165 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
0a0c72c9
DM
1166 }
1167 } while (--timeout);
1168
1169 /* restore mask state */
699559f8 1170 SMC_SET_INT_EN(lp, mask);
0a0c72c9 1171
d5498bef 1172 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
0a0c72c9
DM
1173 dev->name, 8-timeout);
1174
1175 spin_unlock_irqrestore(&lp->lock, flags);
1176
0a0c72c9
DM
1177 return IRQ_HANDLED;
1178}
1179
1180#ifdef SMC_USE_DMA
1181static void
7d12e780 1182smc911x_tx_dma_irq(int dma, void *data)
0a0c72c9
DM
1183{
1184 struct net_device *dev = (struct net_device *)data;
1185 struct smc911x_local *lp = netdev_priv(dev);
1186 struct sk_buff *skb = lp->current_tx_skb;
1187 unsigned long flags;
1188
1189 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1190
1191 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1192 /* Clear the DMA interrupt sources */
1193 SMC_DMA_ACK_IRQ(dev, dma);
1194 BUG_ON(skb == NULL);
1195 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1196 dev->trans_start = jiffies;
1197 dev_kfree_skb_irq(skb);
1198 lp->current_tx_skb = NULL;
1199 if (lp->pending_tx_skb != NULL)
1200 smc911x_hardware_send_pkt(dev);
1201 else {
d5498bef 1202 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1203 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1204 spin_lock_irqsave(&lp->lock, flags);
1205 lp->txdma_active = 0;
1206 if (!lp->tx_throttle) {
1207 netif_wake_queue(dev);
1208 }
1209 spin_unlock_irqrestore(&lp->lock, flags);
1210 }
1211
d5498bef 1212 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
0a0c72c9
DM
1213 "%s: TX DMA irq completed\n", dev->name);
1214}
1215static void
7d12e780 1216smc911x_rx_dma_irq(int dma, void *data)
0a0c72c9
DM
1217{
1218 struct net_device *dev = (struct net_device *)data;
1219 unsigned long ioaddr = dev->base_addr;
1220 struct smc911x_local *lp = netdev_priv(dev);
1221 struct sk_buff *skb = lp->current_rx_skb;
1222 unsigned long flags;
1223 unsigned int pkts;
1224
1225 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1226 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1227 /* Clear the DMA interrupt sources */
1228 SMC_DMA_ACK_IRQ(dev, dma);
1229 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1230 BUG_ON(skb == NULL);
1231 lp->current_rx_skb = NULL;
1232 PRINT_PKT(skb->data, skb->len);
1233 dev->last_rx = jiffies;
0a0c72c9 1234 skb->protocol = eth_type_trans(skb, dev);
09f75cd7
JG
1235 dev->stats.rx_packets++;
1236 dev->stats.rx_bytes += skb->len;
d30f53ae 1237 netif_rx(skb);
0a0c72c9
DM
1238
1239 spin_lock_irqsave(&lp->lock, flags);
d5498bef 1240 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
0a0c72c9
DM
1241 if (pkts != 0) {
1242 smc911x_rcv(dev);
1243 }else {
1244 lp->rxdma_active = 0;
1245 }
1246 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef
JG
1247 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1248 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
0a0c72c9
DM
1249 dev->name, pkts);
1250}
1251#endif /* SMC_USE_DMA */
1252
1253#ifdef CONFIG_NET_POLL_CONTROLLER
1254/*
1255 * Polling receive - used by netconsole and other diagnostic tools
1256 * to allow network i/o with interrupts disabled.
1257 */
1258static void smc911x_poll_controller(struct net_device *dev)
1259{
1260 disable_irq(dev->irq);
9b6d2efe 1261 smc911x_interrupt(dev->irq, dev);
0a0c72c9
DM
1262 enable_irq(dev->irq);
1263}
1264#endif
1265
1266/* Our watchdog timed out. Called by the networking layer */
1267static void smc911x_timeout(struct net_device *dev)
1268{
1269 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1270 int status, mask;
1271 unsigned long flags;
1272
1273 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1274
1275 spin_lock_irqsave(&lp->lock, flags);
699559f8
MD
1276 status = SMC_GET_INT(lp);
1277 mask = SMC_GET_INT_EN(lp);
0a0c72c9
DM
1278 spin_unlock_irqrestore(&lp->lock, flags);
1279 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1280 dev->name, status, mask);
1281
1282 /* Dump the current TX FIFO contents and restart */
699559f8
MD
1283 mask = SMC_GET_TX_CFG(lp);
1284 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
0a0c72c9
DM
1285 /*
1286 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1287 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1288 * which calls schedule(). Hence we use a work queue.
1289 */
4bb073c0
DM
1290 if (lp->phy_type != 0)
1291 schedule_work(&lp->phy_configure);
0a0c72c9
DM
1292
1293 /* We can accept TX packets again */
1294 dev->trans_start = jiffies;
1295 netif_wake_queue(dev);
1296}
1297
1298/*
1299 * This routine will, depending on the values passed to it,
1300 * either make it accept multicast packets, go into
1301 * promiscuous mode (for TCPDUMP and cousins) or accept
1302 * a select set of multicast packets
1303 */
1304static void smc911x_set_multicast_list(struct net_device *dev)
1305{
1306 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1307 unsigned int multicast_table[2];
1308 unsigned int mcr, update_multicast = 0;
1309 unsigned long flags;
0a0c72c9
DM
1310
1311 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1312
1313 spin_lock_irqsave(&lp->lock, flags);
699559f8 1314 SMC_GET_MAC_CR(lp, mcr);
0a0c72c9
DM
1315 spin_unlock_irqrestore(&lp->lock, flags);
1316
1317 if (dev->flags & IFF_PROMISC) {
1318
1319 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1320 mcr |= MAC_CR_PRMS_;
1321 }
1322 /*
1323 * Here, I am setting this to accept all multicast packets.
1324 * I don't need to zero the multicast table, because the flag is
1325 * checked before the table is
1326 */
1327 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1328 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1329 mcr |= MAC_CR_MCPAS_;
1330 }
1331
1332 /*
1333 * This sets the internal hardware table to filter out unwanted
1334 * multicast packets before they take up memory.
1335 *
1336 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1337 * address are the offset into the table. If that bit is 1, then the
1338 * multicast packet is accepted. Otherwise, it's dropped silently.
1339 *
1340 * To use the 6 bits as an offset into the table, the high 1 bit is
1341 * the number of the 32 bit register, while the low 5 bits are the bit
1342 * within that register.
1343 */
1344 else if (dev->mc_count) {
1345 int i;
1346 struct dev_mc_list *cur_addr;
1347
1348 /* Set the Hash perfec mode */
1349 mcr |= MAC_CR_HPFILT_;
1350
1351 /* start with a table of all zeros: reject all */
1352 memset(multicast_table, 0, sizeof(multicast_table));
1353
1354 cur_addr = dev->mc_list;
1355 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
7b31f7ff 1356 u32 position;
0a0c72c9
DM
1357
1358 /* do we have a pointer here? */
1359 if (!cur_addr)
1360 break;
1361 /* make sure this is a multicast address -
1362 shouldn't this be a given if we have it here ? */
1363 if (!(*cur_addr->dmi_addr & 1))
1364 continue;
1365
7b31f7ff
PK
1366 /* upper 6 bits are used as hash index */
1367 position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
0a0c72c9 1368
7b31f7ff 1369 multicast_table[position>>5] |= 1 << (position&0x1f);
0a0c72c9
DM
1370 }
1371
1372 /* be sure I get rid of flags I might have set */
1373 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1374
1375 /* now, the table can be loaded into the chipset */
1376 update_multicast = 1;
1377 } else {
d5498bef 1378 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
0a0c72c9
DM
1379 dev->name);
1380 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1381
1382 /*
1383 * since I'm disabling all multicast entirely, I need to
1384 * clear the multicast list
1385 */
1386 memset(multicast_table, 0, sizeof(multicast_table));
1387 update_multicast = 1;
1388 }
1389
1390 spin_lock_irqsave(&lp->lock, flags);
699559f8 1391 SMC_SET_MAC_CR(lp, mcr);
0a0c72c9 1392 if (update_multicast) {
d5498bef
JG
1393 DBG(SMC_DEBUG_MISC,
1394 "%s: update mcast hash table 0x%08x 0x%08x\n",
0a0c72c9 1395 dev->name, multicast_table[0], multicast_table[1]);
699559f8
MD
1396 SMC_SET_HASHL(lp, multicast_table[0]);
1397 SMC_SET_HASHH(lp, multicast_table[1]);
0a0c72c9
DM
1398 }
1399 spin_unlock_irqrestore(&lp->lock, flags);
1400}
1401
1402
1403/*
1404 * Open and Initialize the board
1405 *
1406 * Set up everything, reset the card, etc..
1407 */
1408static int
1409smc911x_open(struct net_device *dev)
1410{
ef8142a5
AM
1411 struct smc911x_local *lp = netdev_priv(dev);
1412
0a0c72c9
DM
1413 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1414
1415 /*
1416 * Check that the address is valid. If its not, refuse
1417 * to bring the device up. The user must specify an
1418 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1419 */
1420 if (!is_valid_ether_addr(dev->dev_addr)) {
1421 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1422 return -EINVAL;
1423 }
1424
1425 /* reset the hardware */
1426 smc911x_reset(dev);
1427
1428 /* Configure the PHY, initialize the link state */
ef8142a5 1429 smc911x_phy_configure(&lp->phy_configure);
0a0c72c9
DM
1430
1431 /* Turn on Tx + Rx */
1432 smc911x_enable(dev);
1433
1434 netif_start_queue(dev);
1435
1436 return 0;
1437}
1438
1439/*
1440 * smc911x_close
1441 *
1442 * this makes the board clean up everything that it can
1443 * and not talk to the outside world. Caused by
1444 * an 'ifconfig ethX down'
1445 */
1446static int smc911x_close(struct net_device *dev)
1447{
1448 struct smc911x_local *lp = netdev_priv(dev);
1449
1450 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1451
1452 netif_stop_queue(dev);
1453 netif_carrier_off(dev);
1454
1455 /* clear everything */
1456 smc911x_shutdown(dev);
1457
1458 if (lp->phy_type != 0) {
1459 /* We need to ensure that no calls to
1460 * smc911x_phy_configure are pending.
0a0c72c9 1461 */
4bb073c0 1462 cancel_work_sync(&lp->phy_configure);
0a0c72c9
DM
1463 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1464 }
1465
1466 if (lp->pending_tx_skb) {
1467 dev_kfree_skb(lp->pending_tx_skb);
1468 lp->pending_tx_skb = NULL;
1469 }
1470
1471 return 0;
1472}
1473
0a0c72c9
DM
1474/*
1475 * Ethtool support
1476 */
1477static int
1478smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1479{
1480 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1481 int ret, status;
1482 unsigned long flags;
1483
1484 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1485 cmd->maxtxpkt = 1;
1486 cmd->maxrxpkt = 1;
1487
1488 if (lp->phy_type != 0) {
1489 spin_lock_irqsave(&lp->lock, flags);
1490 ret = mii_ethtool_gset(&lp->mii, cmd);
1491 spin_unlock_irqrestore(&lp->lock, flags);
1492 } else {
1493 cmd->supported = SUPPORTED_10baseT_Half |
1494 SUPPORTED_10baseT_Full |
1495 SUPPORTED_TP | SUPPORTED_AUI;
1496
1497 if (lp->ctl_rspeed == 10)
1498 cmd->speed = SPEED_10;
1499 else if (lp->ctl_rspeed == 100)
1500 cmd->speed = SPEED_100;
1501
1502 cmd->autoneg = AUTONEG_DISABLE;
1503 if (lp->mii.phy_id==1)
1504 cmd->transceiver = XCVR_INTERNAL;
1505 else
1506 cmd->transceiver = XCVR_EXTERNAL;
1507 cmd->port = 0;
699559f8 1508 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
d5498bef
JG
1509 cmd->duplex =
1510 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
0a0c72c9
DM
1511 DUPLEX_FULL : DUPLEX_HALF;
1512 ret = 0;
1513 }
1514
1515 return ret;
1516}
1517
1518static int
1519smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1520{
1521 struct smc911x_local *lp = netdev_priv(dev);
1522 int ret;
1523 unsigned long flags;
1524
1525 if (lp->phy_type != 0) {
1526 spin_lock_irqsave(&lp->lock, flags);
1527 ret = mii_ethtool_sset(&lp->mii, cmd);
1528 spin_unlock_irqrestore(&lp->lock, flags);
1529 } else {
1530 if (cmd->autoneg != AUTONEG_DISABLE ||
1531 cmd->speed != SPEED_10 ||
1532 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1533 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1534 return -EINVAL;
1535
1536 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1537
1538 ret = 0;
1539 }
1540
1541 return ret;
1542}
1543
1544static void
1545smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1546{
1547 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1548 strncpy(info->version, version, sizeof(info->version));
43cb76d9 1549 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
0a0c72c9
DM
1550}
1551
1552static int smc911x_ethtool_nwayreset(struct net_device *dev)
1553{
1554 struct smc911x_local *lp = netdev_priv(dev);
1555 int ret = -EINVAL;
1556 unsigned long flags;
1557
1558 if (lp->phy_type != 0) {
1559 spin_lock_irqsave(&lp->lock, flags);
1560 ret = mii_nway_restart(&lp->mii);
1561 spin_unlock_irqrestore(&lp->lock, flags);
1562 }
1563
1564 return ret;
1565}
1566
1567static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1568{
1569 struct smc911x_local *lp = netdev_priv(dev);
1570 return lp->msg_enable;
1571}
1572
1573static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1574{
1575 struct smc911x_local *lp = netdev_priv(dev);
1576 lp->msg_enable = level;
1577}
1578
1579static int smc911x_ethtool_getregslen(struct net_device *dev)
1580{
1581 /* System regs + MAC regs + PHY regs */
d5498bef
JG
1582 return (((E2P_CMD - ID_REV)/4 + 1) +
1583 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
0a0c72c9
DM
1584}
1585
d5498bef 1586static void smc911x_ethtool_getregs(struct net_device *dev,
0a0c72c9
DM
1587 struct ethtool_regs* regs, void *buf)
1588{
0a0c72c9
DM
1589 struct smc911x_local *lp = netdev_priv(dev);
1590 unsigned long flags;
1591 u32 reg,i,j=0;
1592 u32 *data = (u32*)buf;
1593
1594 regs->version = lp->version;
1595 for(i=ID_REV;i<=E2P_CMD;i+=4) {
699559f8 1596 data[j++] = SMC_inl(lp, i);
0a0c72c9
DM
1597 }
1598 for(i=MAC_CR;i<=WUCSR;i++) {
1599 spin_lock_irqsave(&lp->lock, flags);
699559f8 1600 SMC_GET_MAC_CSR(lp, i, reg);
0a0c72c9 1601 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1602 data[j++] = reg;
0a0c72c9
DM
1603 }
1604 for(i=0;i<=31;i++) {
1605 spin_lock_irqsave(&lp->lock, flags);
699559f8 1606 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
0a0c72c9 1607 spin_unlock_irqrestore(&lp->lock, flags);
d5498bef 1608 data[j++] = reg & 0xFFFF;
0a0c72c9
DM
1609 }
1610}
1611
1612static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1613{
699559f8 1614 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1615 unsigned int timeout;
1616 int e2p_cmd;
1617
699559f8 1618 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1619 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1620 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
d5498bef 1621 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
0a0c72c9
DM
1622 dev->name, __FUNCTION__);
1623 return -EFAULT;
d5498bef 1624 }
0a0c72c9 1625 mdelay(1);
699559f8 1626 e2p_cmd = SMC_GET_E2P_CMD(lp);
0a0c72c9
DM
1627 }
1628 if (timeout == 0) {
d5498bef 1629 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
0a0c72c9
DM
1630 dev->name, __FUNCTION__);
1631 return -ETIMEDOUT;
1632 }
1633 return 0;
1634}
1635
d5498bef 1636static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
0a0c72c9
DM
1637 int cmd, int addr)
1638{
699559f8 1639 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1640 int ret;
1641
d5498bef 1642 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1643 return ret;
699559f8 1644 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
d5498bef 1645 ((cmd) & (0x7<<28)) |
0a0c72c9
DM
1646 ((addr) & 0xFF));
1647 return 0;
1648}
1649
d5498bef 1650static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1651 u8 *data)
1652{
699559f8 1653 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1654 int ret;
1655
d5498bef 1656 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1657 return ret;
699559f8 1658 *data = SMC_GET_E2P_DATA(lp);
0a0c72c9
DM
1659 return 0;
1660}
1661
d5498bef 1662static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
0a0c72c9
DM
1663 u8 data)
1664{
699559f8 1665 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1666 int ret;
1667
d5498bef 1668 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
0a0c72c9 1669 return ret;
699559f8 1670 SMC_SET_E2P_DATA(lp, data);
0a0c72c9
DM
1671 return 0;
1672}
1673
d5498bef 1674static int smc911x_ethtool_geteeprom(struct net_device *dev,
0a0c72c9
DM
1675 struct ethtool_eeprom *eeprom, u8 *data)
1676{
1677 u8 eebuf[SMC911X_EEPROM_LEN];
1678 int i, ret;
1679
1680 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1681 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1682 return ret;
1683 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1684 return ret;
1685 }
1686 memcpy(data, eebuf+eeprom->offset, eeprom->len);
d5498bef 1687 return 0;
0a0c72c9
DM
1688}
1689
d5498bef 1690static int smc911x_ethtool_seteeprom(struct net_device *dev,
0a0c72c9
DM
1691 struct ethtool_eeprom *eeprom, u8 *data)
1692{
1693 int i, ret;
1694
1695 /* Enable erase */
1696 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1697 return ret;
1698 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1699 /* erase byte */
1700 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1701 return ret;
1702 /* write byte */
1703 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1704 return ret;
1705 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1706 return ret;
1707 }
1708 return 0;
1709}
1710
1711static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1712{
1713 return SMC911X_EEPROM_LEN;
1714}
1715
7282d491 1716static const struct ethtool_ops smc911x_ethtool_ops = {
0a0c72c9
DM
1717 .get_settings = smc911x_ethtool_getsettings,
1718 .set_settings = smc911x_ethtool_setsettings,
1719 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1720 .get_msglevel = smc911x_ethtool_getmsglevel,
1721 .set_msglevel = smc911x_ethtool_setmsglevel,
1722 .nway_reset = smc911x_ethtool_nwayreset,
1723 .get_link = ethtool_op_get_link,
1724 .get_regs_len = smc911x_ethtool_getregslen,
1725 .get_regs = smc911x_ethtool_getregs,
1726 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1727 .get_eeprom = smc911x_ethtool_geteeprom,
1728 .set_eeprom = smc911x_ethtool_seteeprom,
1729};
1730
1731/*
1732 * smc911x_findirq
1733 *
1734 * This routine has a simple purpose -- make the SMC chip generate an
1735 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1736 */
699559f8 1737static int __init smc911x_findirq(struct net_device *dev)
0a0c72c9 1738{
699559f8 1739 struct smc911x_local *lp = netdev_priv(dev);
0a0c72c9
DM
1740 int timeout = 20;
1741 unsigned long cookie;
1742
1743 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
1744
1745 cookie = probe_irq_on();
1746
1747 /*
1748 * Force a SW interrupt
1749 */
1750
699559f8 1751 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
0a0c72c9
DM
1752
1753 /*
1754 * Wait until positive that the interrupt has been generated
1755 */
1756 do {
1757 int int_status;
1758 udelay(10);
699559f8 1759 int_status = SMC_GET_INT_EN(lp);
0a0c72c9
DM
1760 if (int_status & INT_EN_SW_INT_EN_)
1761 break; /* got the interrupt */
1762 } while (--timeout);
1763
1764 /*
1765 * there is really nothing that I can do here if timeout fails,
1766 * as autoirq_report will return a 0 anyway, which is what I
1767 * want in this case. Plus, the clean up is needed in both
1768 * cases.
1769 */
1770
1771 /* and disable all interrupts again */
699559f8 1772 SMC_SET_INT_EN(lp, 0);
0a0c72c9
DM
1773
1774 /* and return what I found */
1775 return probe_irq_off(cookie);
1776}
1777
1778/*
1779 * Function: smc911x_probe(unsigned long ioaddr)
1780 *
1781 * Purpose:
1782 * Tests to see if a given ioaddr points to an SMC911x chip.
1783 * Returns a 0 on success
1784 *
1785 * Algorithm:
1786 * (1) see if the endian word is OK
1787 * (1) see if I recognize the chip ID in the appropriate register
1788 *
1789 * Here I do typical initialization tasks.
1790 *
1791 * o Initialize the structure if needed
1792 * o print out my vanity message if not done so already
1793 * o print out what type of hardware is detected
1794 * o print out the ethernet address
1795 * o find the IRQ
1796 * o set up my private data
1797 * o configure the dev structure with my subroutines
1798 * o actually GRAB the irq.
1799 * o GRAB the region
1800 */
699559f8 1801static int __init smc911x_probe(struct net_device *dev)
0a0c72c9
DM
1802{
1803 struct smc911x_local *lp = netdev_priv(dev);
1804 int i, retval;
1805 unsigned int val, chip_id, revision;
1806 const char *version_string;
12c03f59 1807 unsigned long irq_flags;
0a0c72c9
DM
1808
1809 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
1810
1811 /* First, see if the endian word is recognized */
699559f8 1812 val = SMC_GET_BYTE_TEST(lp);
0a0c72c9
DM
1813 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1814 if (val != 0x87654321) {
1815 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
1816 retval = -ENODEV;
1817 goto err_out;
1818 }
1819
1820 /*
1821 * check if the revision register is something that I
1822 * recognize. These might need to be added to later,
1823 * as future revisions could be added.
1824 */
699559f8 1825 chip_id = SMC_GET_PN(lp);
0a0c72c9
DM
1826 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1827 for(i=0;chip_ids[i].id != 0; i++) {
1828 if (chip_ids[i].id == chip_id) break;
1829 }
1830 if (!chip_ids[i].id) {
1831 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1832 retval = -ENODEV;
1833 goto err_out;
1834 }
1835 version_string = chip_ids[i].name;
1836
699559f8 1837 revision = SMC_GET_REV(lp);
0a0c72c9
DM
1838 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1839
1840 /* At this point I'll assume that the chip is an SMC911x. */
1841 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1842
1843 /* Validate the TX FIFO size requested */
1844 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1845 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1846 retval = -EINVAL;
1847 goto err_out;
1848 }
d5498bef 1849
0a0c72c9 1850 /* fill in some of the fields */
0a0c72c9
DM
1851 lp->version = chip_ids[i].id;
1852 lp->revision = revision;
1853 lp->tx_fifo_kb = tx_fifo_kb;
1854 /* Reverse calculate the RX FIFO size from the TX */
1855 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1856 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1857
1858 /* Set the automatic flow control values */
1859 switch(lp->tx_fifo_kb) {
d5498bef 1860 /*
0a0c72c9
DM
1861 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1862 * AFC_LO is AFC_HI/2
1863 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1864 */
1865 case 2:/* 13440 Rx Data Fifo Size */
1866 lp->afc_cfg=0x008C46AF;break;
1867 case 3:/* 12480 Rx Data Fifo Size */
1868 lp->afc_cfg=0x0082419F;break;
1869 case 4:/* 11520 Rx Data Fifo Size */
1870 lp->afc_cfg=0x00783C9F;break;
1871 case 5:/* 10560 Rx Data Fifo Size */
1872 lp->afc_cfg=0x006E374F;break;
1873 case 6:/* 9600 Rx Data Fifo Size */
1874 lp->afc_cfg=0x0064328F;break;
1875 case 7:/* 8640 Rx Data Fifo Size */
1876 lp->afc_cfg=0x005A2D7F;break;
1877 case 8:/* 7680 Rx Data Fifo Size */
1878 lp->afc_cfg=0x0050287F;break;
1879 case 9:/* 6720 Rx Data Fifo Size */
1880 lp->afc_cfg=0x0046236F;break;
1881 case 10:/* 5760 Rx Data Fifo Size */
1882 lp->afc_cfg=0x003C1E6F;break;
1883 case 11:/* 4800 Rx Data Fifo Size */
1884 lp->afc_cfg=0x0032195F;break;
d5498bef 1885 /*
0a0c72c9
DM
1886 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1887 * AFC_LO is AFC_HI/2
1888 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1889 */
1890 case 12:/* 3840 Rx Data Fifo Size */
1891 lp->afc_cfg=0x0024124F;break;
1892 case 13:/* 2880 Rx Data Fifo Size */
1893 lp->afc_cfg=0x0015073F;break;
1894 case 14:/* 1920 Rx Data Fifo Size */
1895 lp->afc_cfg=0x0006032F;break;
1896 default:
d5498bef 1897 PRINTK("%s: ERROR -- no AFC_CFG setting found",
0a0c72c9
DM
1898 dev->name);
1899 break;
1900 }
1901
d5498bef
JG
1902 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
1903 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
0a0c72c9
DM
1904 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1905
1906 spin_lock_init(&lp->lock);
1907
1908 /* Get the MAC address */
699559f8 1909 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
0a0c72c9
DM
1910
1911 /* now, reset the chip, and put it into a known state */
1912 smc911x_reset(dev);
1913
1914 /*
1915 * If dev->irq is 0, then the device has to be banged on to see
1916 * what the IRQ is.
1917 *
1918 * Specifying an IRQ is done with the assumption that the user knows
1919 * what (s)he is doing. No checking is done!!!!
1920 */
1921 if (dev->irq < 1) {
1922 int trials;
1923
1924 trials = 3;
1925 while (trials--) {
699559f8 1926 dev->irq = smc911x_findirq(dev);
0a0c72c9
DM
1927 if (dev->irq)
1928 break;
1929 /* kick the card and try again */
1930 smc911x_reset(dev);
1931 }
1932 }
1933 if (dev->irq == 0) {
1934 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1935 dev->name);
1936 retval = -ENODEV;
1937 goto err_out;
1938 }
1939 dev->irq = irq_canonicalize(dev->irq);
1940
1941 /* Fill in the fields of the device structure with ethernet values. */
1942 ether_setup(dev);
1943
1944 dev->open = smc911x_open;
1945 dev->stop = smc911x_close;
1946 dev->hard_start_xmit = smc911x_hard_start_xmit;
1947 dev->tx_timeout = smc911x_timeout;
1948 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
0a0c72c9
DM
1949 dev->set_multicast_list = smc911x_set_multicast_list;
1950 dev->ethtool_ops = &smc911x_ethtool_ops;
1951#ifdef CONFIG_NET_POLL_CONTROLLER
1952 dev->poll_controller = smc911x_poll_controller;
1953#endif
1954
ef8142a5 1955 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
0a0c72c9
DM
1956 lp->mii.phy_id_mask = 0x1f;
1957 lp->mii.reg_num_mask = 0x1f;
1958 lp->mii.force_media = 0;
1959 lp->mii.full_duplex = 0;
1960 lp->mii.dev = dev;
1961 lp->mii.mdio_read = smc911x_phy_read;
1962 lp->mii.mdio_write = smc911x_phy_write;
1963
1964 /*
1965 * Locate the phy, if any.
1966 */
1967 smc911x_phy_detect(dev);
1968
1969 /* Set default parameters */
1970 lp->msg_enable = NETIF_MSG_LINK;
1971 lp->ctl_rfduplx = 1;
1972 lp->ctl_rspeed = 100;
1973
12c03f59
MD
1974#ifdef SMC_DYNAMIC_BUS_CONFIG
1975 irq_flags = lp->cfg.irq_flags;
1976#else
1977 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1978#endif
1979
0a0c72c9 1980 /* Grab the IRQ */
f2773a29 1981 retval = request_irq(dev->irq, &smc911x_interrupt,
12c03f59 1982 irq_flags, dev->name, dev);
0a0c72c9
DM
1983 if (retval)
1984 goto err_out;
1985
0a0c72c9
DM
1986#ifdef SMC_USE_DMA
1987 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
1988 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
1989 lp->rxdma_active = 0;
1990 lp->txdma_active = 0;
1991 dev->dma = lp->rxdma;
1992#endif
1993
1994 retval = register_netdev(dev);
1995 if (retval == 0) {
1996 /* now, print out the card info, in a short format.. */
1997 printk("%s: %s (rev %d) at %#lx IRQ %d",
1998 dev->name, version_string, lp->revision,
1999 dev->base_addr, dev->irq);
2000
2001#ifdef SMC_USE_DMA
2002 if (lp->rxdma != -1)
2003 printk(" RXDMA %d ", lp->rxdma);
2004
2005 if (lp->txdma != -1)
2006 printk("TXDMA %d", lp->txdma);
2007#endif
2008 printk("\n");
2009 if (!is_valid_ether_addr(dev->dev_addr)) {
2010 printk("%s: Invalid ethernet MAC address. Please "
2011 "set using ifconfig\n", dev->name);
2012 } else {
2013 /* Print the Ethernet address */
2014 printk("%s: Ethernet addr: ", dev->name);
2015 for (i = 0; i < 5; i++)
2016 printk("%2.2x:", dev->dev_addr[i]);
2017 printk("%2.2x\n", dev->dev_addr[5]);
2018 }
2019
2020 if (lp->phy_type == 0) {
2021 PRINTK("%s: No PHY found\n", dev->name);
2022 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2023 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2024 } else {
2025 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2026 }
2027 }
d5498bef 2028
0a0c72c9
DM
2029err_out:
2030#ifdef SMC_USE_DMA
2031 if (retval) {
2032 if (lp->rxdma != -1) {
2033 SMC_DMA_FREE(dev, lp->rxdma);
2034 }
2035 if (lp->txdma != -1) {
2036 SMC_DMA_FREE(dev, lp->txdma);
2037 }
2038 }
2039#endif
2040 return retval;
2041}
2042
2043/*
2044 * smc911x_init(void)
2045 *
2046 * Output:
2047 * 0 --> there is a device
2048 * anything else, error
2049 */
2050static int smc911x_drv_probe(struct platform_device *pdev)
2051{
12c03f59 2052 struct smc91x_platdata *pd = pdev->dev.platform_data;
0a0c72c9
DM
2053 struct net_device *ndev;
2054 struct resource *res;
ef8142a5 2055 struct smc911x_local *lp;
0a0c72c9
DM
2056 unsigned int *addr;
2057 int ret;
2058
2059 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2060 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2061 if (!res) {
2062 ret = -ENODEV;
2063 goto out;
2064 }
2065
2066 /*
2067 * Request the regions.
2068 */
2069 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2070 ret = -EBUSY;
2071 goto out;
2072 }
2073
2074 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2075 if (!ndev) {
2076 printk("%s: could not allocate device.\n", CARDNAME);
2077 ret = -ENOMEM;
2078 goto release_1;
2079 }
0a0c72c9
DM
2080 SET_NETDEV_DEV(ndev, &pdev->dev);
2081
2082 ndev->dma = (unsigned char)-1;
2083 ndev->irq = platform_get_irq(pdev, 0);
ef8142a5
AM
2084 lp = netdev_priv(ndev);
2085 lp->netdev = ndev;
12c03f59
MD
2086#ifdef SMC_DYNAMIC_BUS_CONFIG
2087 if (!pd) {
2088 ret = -EINVAL;
2089 goto release_both;
2090 }
2091 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2092#endif
0a0c72c9
DM
2093
2094 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2095 if (!addr) {
2096 ret = -ENOMEM;
2097 goto release_both;
2098 }
2099
2100 platform_set_drvdata(pdev, ndev);
699559f8
MD
2101 lp->base = addr;
2102 ndev->base_addr = res->start;
2103 ret = smc911x_probe(ndev);
0a0c72c9
DM
2104 if (ret != 0) {
2105 platform_set_drvdata(pdev, NULL);
2106 iounmap(addr);
2107release_both:
2108 free_netdev(ndev);
2109release_1:
2110 release_mem_region(res->start, SMC911X_IO_EXTENT);
2111out:
2112 printk("%s: not found (%d).\n", CARDNAME, ret);
2113 }
2114#ifdef SMC_USE_DMA
2115 else {
0a0c72c9
DM
2116 lp->physaddr = res->start;
2117 lp->dev = &pdev->dev;
2118 }
2119#endif
2120
2121 return ret;
2122}
2123
2124static int smc911x_drv_remove(struct platform_device *pdev)
2125{
2126 struct net_device *ndev = platform_get_drvdata(pdev);
699559f8 2127 struct smc911x_local *lp = netdev_priv(ndev);
0a0c72c9
DM
2128 struct resource *res;
2129
2130 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2131 platform_set_drvdata(pdev, NULL);
2132
2133 unregister_netdev(ndev);
2134
2135 free_irq(ndev->irq, ndev);
2136
2137#ifdef SMC_USE_DMA
2138 {
0a0c72c9
DM
2139 if (lp->rxdma != -1) {
2140 SMC_DMA_FREE(dev, lp->rxdma);
2141 }
2142 if (lp->txdma != -1) {
2143 SMC_DMA_FREE(dev, lp->txdma);
2144 }
2145 }
2146#endif
699559f8 2147 iounmap(lp->base);
0a0c72c9
DM
2148 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2149 release_mem_region(res->start, SMC911X_IO_EXTENT);
2150
2151 free_netdev(ndev);
2152 return 0;
2153}
2154
2155static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2156{
2157 struct net_device *ndev = platform_get_drvdata(dev);
699559f8 2158 struct smc911x_local *lp = netdev_priv(ndev);
0a0c72c9
DM
2159
2160 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2161 if (ndev) {
2162 if (netif_running(ndev)) {
2163 netif_device_detach(ndev);
2164 smc911x_shutdown(ndev);
2165#if POWER_DOWN
2166 /* Set D2 - Energy detect only setting */
699559f8 2167 SMC_SET_PMT_CTRL(lp, 2<<12);
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2168#endif
2169 }
2170 }
2171 return 0;
2172}
2173
2174static int smc911x_drv_resume(struct platform_device *dev)
2175{
2176 struct net_device *ndev = platform_get_drvdata(dev);
2177
2178 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
2179 if (ndev) {
2180 struct smc911x_local *lp = netdev_priv(ndev);
2181
2182 if (netif_running(ndev)) {
2183 smc911x_reset(ndev);
2184 smc911x_enable(ndev);
2185 if (lp->phy_type != 0)
ef8142a5 2186 smc911x_phy_configure(&lp->phy_configure);
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2187 netif_device_attach(ndev);
2188 }
2189 }
2190 return 0;
2191}
2192
2193static struct platform_driver smc911x_driver = {
2194 .probe = smc911x_drv_probe,
2195 .remove = smc911x_drv_remove,
2196 .suspend = smc911x_drv_suspend,
2197 .resume = smc911x_drv_resume,
2198 .driver = {
2199 .name = CARDNAME,
72abb461 2200 .owner = THIS_MODULE,
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2201 },
2202};
d5498bef 2203
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2204static int __init smc911x_init(void)
2205{
2206 return platform_driver_register(&smc911x_driver);
2207}
2208
2209static void __exit smc911x_cleanup(void)
2210{
2211 platform_driver_unregister(&smc911x_driver);
2212}
2213
2214module_init(smc911x_init);
2215module_exit(smc911x_cleanup);
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