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dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
[deliverable/linux.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
1da177e4
LT		 16 ** Useful (if not required) reading:
17 *
18 * Texas Instruments, ThunderLAN Programmer's Guide,
19 * TI Literature Number SPWU013A
20 * available in PDF format from www.ti.com
21 * Level One, LXT901 and LXT970 Data Sheets
22 * available in PDF format from www.level1.com
23 * National Semiconductor, DP83840A Data Sheet
24 * available in PDF format from www.national.com
25 * Microchip Technology, 24C01A/02A/04A Data Sheet
26 * available in PDF format from www.microchip.com
27 *
28 * Change History
29 *
30 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
31 * new PCI BIOS interface.
113aa838
AC		 32 * Alan Cox <alan@lxorguk.ukuu.org.uk>:
33 * Fixed the out of memory
1da177e4 34 * handling.
6aa20a22 35 *
1da177e4
LT		 36 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
37 *
38 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 39 * Patch from Tigran Aivazian.
1da177e4
LT		 40 * - v1.1 includes Alan's SMP updates.
41 * - We still have problems on SMP though,
6aa20a22
JG		 42 * but I'm looking into that.
43 *
1da177e4
LT		 44 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
45 * - Removed dependency of HZ being 100.
6aa20a22 46 * - We now allow higher priority timers to
1da177e4
LT		 47 * overwrite timers like TLAN_TIMER_ACTIVITY
48 * Patch from John Cagle <john.cagle@compaq.com>.
49 * - Fixed a few compiler warnings.
50 *
51 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 52 * - Removed call to pci_present().
1da177e4 53 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 54 * - Added __init and __initdata to reduce resisdent
1da177e4
LT		 55 * code size.
56 * - Driver now uses module_init/module_exit.
57 * - Rewrote init_module and tlan_probe to
58 * share a lot more code. We now use tlan_probe
59 * with builtin and module driver.
6aa20a22
JG		 60 * - Driver ported to new net API.
61 * - tlan.txt has been reworked to reflect current
1da177e4
LT		 62 * driver (almost)
63 * - Other minor stuff
64 *
65 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
66 * network cleanup in 2.3.43pre7 (Tigran & myself)
67 * - Minor stuff.
68 *
69 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
70 * if no cable/link were present.
71 * - Cosmetic changes.
72 * - TODO: Port completely to new PCI/DMA API
73 * Auto-Neg fallback.
74 *
75 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 76 * tested it though, as the kernel support is currently
1da177e4
LT		 77 * broken (2.3.99p4p3).
78 * - Updated tlan.txt accordingly.
79 * - Adjusted minimum/maximum frame length.
6aa20a22 80 * - There is now a TLAN website up at
1da177e4
LT		 81 * http://tlan.kernel.dk
82 *
83 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
84 * reports PHY information when used with Donald
85 * Beckers userspace MII diagnostics utility.
86 *
87 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
88 * - Added link information to Auto-Neg and forced
89 * modes. When NIC operates with auto-neg the driver
90 * will report Link speed & duplex modes as well as
91 * link partner abilities. When forced link is used,
92 * the driver will report status of the established
93 * link.
6aa20a22
JG		 94 * Please read tlan.txt for additional information.
95 * - Removed call to check_region(), and used
1da177e4 96 * return value of request_region() instead.
6aa20a22 97 *
1da177e4
LT		 98 * v1.8a May 28, 2000 - Minor updates.
99 *
100 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
101 * - Updated with timer fixes from Andrew Morton.
102 * - Fixed module race in TLan_Open.
103 * - Added routine to monitor PHY status.
104 * - Added activity led support for Proliant devices.
105 *
6aa20a22
JG		 106 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
107 * like the Compaq NetFlex3/E.
1da177e4
LT		 108 * - Rewrote tlan_probe to better handle multiple
109 * bus probes. Probing and device setup is now
110 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 111 * hardware probe is done with kernel API and
1da177e4
LT		 112 * TLan_EisaProbe.
113 * - Adjusted debug information for probing.
6aa20a22
JG		 114 * - Fixed bug that would cause general debug information
115 * to be printed after driver removal.
1da177e4 116 * - Added transmit timeout handling.
6aa20a22
JG		 117 * - Fixed OOM return values in tlan_probe.
118 * - Fixed possible mem leak in tlan_exit
1da177e4
LT		 119 * (now tlan_remove_one).
120 * - Fixed timer bug in TLan_phyMonitor.
121 * - This driver version is alpha quality, please
122 * send me any bug issues you may encounter.
123 *
6aa20a22 124 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT		 125 * set for EISA cards.
126 * - Added support for NetFlex3/E with nibble-rate
127 * 10Base-T PHY. This is untestet as I haven't got
128 * one of these cards.
129 * - Fixed timer being added twice.
130 * - Disabled PhyMonitoring by default as this is
131 * work in progress. Define MONITOR to enable it.
132 * - Now we don't display link info with PHYs that
133 * doesn't support it (level1).
134 * - Incresed tx_timeout beacuse of auto-neg.
135 * - Adjusted timers for forced speeds.
136 *
137 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
138 *
139 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
140 * when link can't be established.
141 * - Added the bbuf option as a kernel parameter.
142 * - Fixed ioaddr probe bug.
143 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 144 * - Added support for speed/duplex selection with
1da177e4
LT		 145 * multiple nics.
146 * - Added partly fix for TX Channel lockup with
147 * TLAN v1.0 silicon. This needs to be investigated
148 * further.
149 *
150 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
151 * interrupt. Thanks goes to
152 * Adam Keys <adam@ti.com>
153 * Denis Beaudoin <dbeaudoin@ti.com>
154 * for providing the patch.
155 * - Fixed auto-neg output when using multiple
156 * adapters.
157 * - Converted to use new taskq interface.
158 *
159 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
160 *
161 * Samuel Chessman <chessman@tux.org> New Maintainer!
162 *
163 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
164 * 10T half duplex no loopback
165 * Thanks to Gunnar Eikman
5eeabf51
SA		 166 *
167 * Sakari Ailus <sakari.ailus@iki.fi>:
168 *
169 * v1.15a Dec 15 2008 - Remove bbuf support, it doesn't work anyway.
170 *
1da177e4
LT		 171 *******************************************************************************/
172
173#include <linux/module.h>
174#include <linux/init.h>
175#include <linux/ioport.h>
176#include <linux/eisa.h>
177#include <linux/pci.h>
1e7f0bd8 178#include <linux/dma-mapping.h>
1da177e4
LT		 179#include <linux/netdevice.h>
180#include <linux/etherdevice.h>
181#include <linux/delay.h>
182#include <linux/spinlock.h>
183#include <linux/workqueue.h>
184#include <linux/mii.h>
185
186#include "tlan.h"
187
188typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
189
190
191/* For removing EISA devices */
192static struct net_device *TLan_Eisa_Devices;
193
194static int TLanDevicesInstalled;
195
196/* Set speed, duplex and aui settings */
197static int aui[MAX_TLAN_BOARDS];
198static int duplex[MAX_TLAN_BOARDS];
199static int speed[MAX_TLAN_BOARDS];
200static int boards_found;
15efa9bb
SH		 201module_param_array(aui, int, NULL, 0);
202module_param_array(duplex, int, NULL, 0);
203module_param_array(speed, int, NULL, 0);
204MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
205MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
206MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT		 207
208MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
209MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
210MODULE_LICENSE("GPL");
211
212
213/* Define this to enable Link beat monitoring */
214#undef MONITOR
215
216/* Turn on debugging. See Documentation/networking/tlan.txt for details */
217static int debug;
15efa9bb
SH		 218module_param(debug, int, 0);
219MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4 220
a3ccc789 221static const char TLanSignature[] = "TLAN";
5eeabf51 222static const char tlan_banner[] = "ThunderLAN driver v1.15a\n";
1da177e4
LT		 223static int tlan_have_pci;
224static int tlan_have_eisa;
225
226static const char *media[] = {
6aa20a22 227 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT		 228 "100baseTx-FD", "100baseT4", NULL
229};
230
231static struct board {
232 const char *deviceLabel;
233 u32 flags;
234 u16 addrOfs;
235} board_info[] = {
236 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
237 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
238 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 239 { "Compaq NetFlex-3/P",
240 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4 241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 242 { "Compaq Netelligent Integrated 10/100 TX UTP",
243 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
1da177e4
LT		 244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
dfc2c0a6
SH		 251 { "Compaq NetFlex-3/E",
252 TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
253 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT		 254 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
255};
256
257static struct pci_device_id tlan_pci_tbl[] = {
258 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
259 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
260 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
261 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
262 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
263 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
264 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
265 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
266 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
267 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
268 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
269 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
270 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
271 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
272 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
273 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
274 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
275 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
276 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
277 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
278 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
279 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
280 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
281 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
282 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
283 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
284 { 0,}
285};
6aa20a22 286MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT		 287
288static void TLan_EisaProbe( void );
289static void TLan_Eisa_Cleanup( void );
290static int TLan_Init( struct net_device * );
291static int TLan_Open( struct net_device *dev );
292static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 293static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT		 294static int TLan_Close( struct net_device *);
295static struct net_device_stats *TLan_GetStats( struct net_device *);
296static void TLan_SetMulticastList( struct net_device *);
297static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
dfc2c0a6
SH		 298static int TLan_probe1( struct pci_dev *pdev, long ioaddr,
299 int irq, int rev, const struct pci_device_id *ent);
1da177e4 300static void TLan_tx_timeout( struct net_device *dev);
c4028958 301static void TLan_tx_timeout_work(struct work_struct *work);
1da177e4
LT		 302static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
303
1da177e4
LT		 304static u32 TLan_HandleTxEOF( struct net_device *, u16 );
305static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
306static u32 TLan_HandleRxEOF( struct net_device *, u16 );
307static u32 TLan_HandleDummy( struct net_device *, u16 );
308static u32 TLan_HandleTxEOC( struct net_device *, u16 );
309static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
310static u32 TLan_HandleRxEOC( struct net_device *, u16 );
311
312static void TLan_Timer( unsigned long );
313
314static void TLan_ResetLists( struct net_device * );
315static void TLan_FreeLists( struct net_device * );
316static void TLan_PrintDio( u16 );
317static void TLan_PrintList( TLanList *, char *, int );
318static void TLan_ReadAndClearStats( struct net_device *, int );
319static void TLan_ResetAdapter( struct net_device * );
320static void TLan_FinishReset( struct net_device * );
321static void TLan_SetMac( struct net_device *, int areg, char *mac );
322
323static void TLan_PhyPrint( struct net_device * );
324static void TLan_PhyDetect( struct net_device * );
325static void TLan_PhyPowerDown( struct net_device * );
326static void TLan_PhyPowerUp( struct net_device * );
327static void TLan_PhyReset( struct net_device * );
328static void TLan_PhyStartLink( struct net_device * );
329static void TLan_PhyFinishAutoNeg( struct net_device * );
330#ifdef MONITOR
331static void TLan_PhyMonitor( struct net_device * );
332#endif
333
334/*
335static int TLan_PhyNop( struct net_device * );
336static int TLan_PhyInternalCheck( struct net_device * );
337static int TLan_PhyInternalService( struct net_device * );
338static int TLan_PhyDp83840aCheck( struct net_device * );
339*/
340
341static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
342static void TLan_MiiSendData( u16, u32, unsigned );
343static void TLan_MiiSync( u16 );
344static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
345
346static void TLan_EeSendStart( u16 );
347static int TLan_EeSendByte( u16, u8, int );
348static void TLan_EeReceiveByte( u16, u8 *, int );
349static int TLan_EeReadByte( struct net_device *, u8, u8 * );
350
351
93e16847 352static inline void
1da177e4
LT		 353TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
354{
355 unsigned long addr = (unsigned long)skb;
93e16847
SH		 356 tag->buffer[9].address = addr;
357 tag->buffer[8].address = upper_32_bits(addr);
1da177e4
LT		 358}
359
93e16847
SH		 360static inline struct sk_buff *
361TLan_GetSKB( const struct tlan_list_tag *tag)
1da177e4 362{
93e16847
SH		 363 unsigned long addr;
364
0d63bea2
RF		 365 addr = tag->buffer[9].address;
366 addr |= (tag->buffer[8].address << 16) << 16;
1da177e4
LT		 367 return (struct sk_buff *) addr;
368}
369
370
371static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
a3ccc789 372 NULL,
1da177e4
LT		 373 TLan_HandleTxEOF,
374 TLan_HandleStatOverflow,
375 TLan_HandleRxEOF,
376 TLan_HandleDummy,
377 TLan_HandleTxEOC,
378 TLan_HandleStatusCheck,
379 TLan_HandleRxEOC
380};
381
382static inline void
383TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
384{
385 TLanPrivateInfo *priv = netdev_priv(dev);
386 unsigned long flags = 0;
6aa20a22 387
1da177e4
LT		 388 if (!in_irq())
389 spin_lock_irqsave(&priv->lock, flags);
390 if ( priv->timer.function != NULL &&
6aa20a22 391 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT		 392 if (!in_irq())
393 spin_unlock_irqrestore(&priv->lock, flags);
394 return;
395 }
396 priv->timer.function = &TLan_Timer;
397 if (!in_irq())
398 spin_unlock_irqrestore(&priv->lock, flags);
399
400 priv->timer.data = (unsigned long) dev;
401 priv->timerSetAt = jiffies;
402 priv->timerType = type;
403 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 404
1da177e4
LT		 405} /* TLan_SetTimer */
406
407
408/*****************************************************************************
409******************************************************************************
410
411 ThunderLAN Driver Primary Functions
412
413 These functions are more or less common to all Linux network drivers.
414
415******************************************************************************
416*****************************************************************************/
417
418
419
420
421
422 /***************************************************************
423 * tlan_remove_one
424 *
425 * Returns:
426 * Nothing
427 * Parms:
428 * None
429 *
430 * Goes through the TLanDevices list and frees the device
431 * structs and memory associated with each device (lists
432 * and buffers). It also ureserves the IO port regions
433 * associated with this device.
434 *
435 **************************************************************/
436
437
438static void __devexit tlan_remove_one( struct pci_dev *pdev)
439{
440 struct net_device *dev = pci_get_drvdata( pdev );
441 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 442
1da177e4
LT		 443 unregister_netdev( dev );
444
445 if ( priv->dmaStorage ) {
dfc2c0a6
SH		 446 pci_free_consistent(priv->pciDev,
447 priv->dmaSize, priv->dmaStorage,
448 priv->dmaStorageDMA );
1da177e4
LT		 449 }
450
451#ifdef CONFIG_PCI
452 pci_release_regions(pdev);
453#endif
6aa20a22 454
1da177e4 455 free_netdev( dev );
6aa20a22 456
1da177e4 457 pci_set_drvdata( pdev, NULL );
6aa20a22 458}
1da177e4
LT		 459
460static struct pci_driver tlan_driver = {
461 .name = "tlan",
462 .id_table = tlan_pci_tbl,
463 .probe = tlan_init_one,
6aa20a22 464 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT		 465};
466
467static int __init tlan_probe(void)
468{
6c04a515 469 int rc = -ENODEV;
6aa20a22 470
1da177e4 471 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 472
1da177e4 473 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 474
1da177e4
LT		 475 /* Use new style PCI probing. Now the kernel will
476 do most of this for us */
6c04a515
LP		 477 rc = pci_register_driver(&tlan_driver);
478
479 if (rc != 0) {
480 printk(KERN_ERR "TLAN: Could not register pci driver.\n");
481 goto err_out_pci_free;
482 }
1da177e4
LT		 483
484 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
485 TLan_EisaProbe();
6aa20a22
JG		 486
487 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT		 488 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
489 tlan_have_pci, tlan_have_eisa);
490
491 if (TLanDevicesInstalled == 0) {
6c04a515
LP		 492 rc = -ENODEV;
493 goto err_out_pci_unreg;
1da177e4
LT		 494 }
495 return 0;
6c04a515
LP		 496
497err_out_pci_unreg:
498 pci_unregister_driver(&tlan_driver);
499err_out_pci_free:
6c04a515 500 return rc;
1da177e4 501}
6aa20a22 502
1da177e4
LT		 503
504static int __devinit tlan_init_one( struct pci_dev *pdev,
505 const struct pci_device_id *ent)
506{
507 return TLan_probe1( pdev, -1, -1, 0, ent);
508}
509
510
511/*
512 ***************************************************************
513 * tlan_probe1
514 *
515 * Returns:
516 * 0 on success, error code on error
6aa20a22 517 * Parms:
1da177e4
LT		 518 * none
519 *
520 * The name is lower case to fit in with all the rest of
6aa20a22 521 * the netcard_probe names. This function looks for
1da177e4
LT		 522 * another TLan based adapter, setting it up with the
523 * allocated device struct if one is found.
524 * tlan_probe has been ported to the new net API and
525 * now allocates its own device structure. This function
526 * is also used by modules.
527 *
528 **************************************************************/
529
6aa20a22 530static int __devinit TLan_probe1(struct pci_dev *pdev,
dfc2c0a6
SH		 531 long ioaddr, int irq, int rev,
532 const struct pci_device_id *ent )
1da177e4
LT		 533{
534
535 struct net_device *dev;
536 TLanPrivateInfo *priv;
1da177e4
LT		 537 u16 device_id;
538 int reg, rc = -ENODEV;
539
ad9f6713 540#ifdef CONFIG_PCI
1da177e4
LT		 541 if (pdev) {
542 rc = pci_enable_device(pdev);
543 if (rc)
544 return rc;
545
546 rc = pci_request_regions(pdev, TLanSignature);
547 if (rc) {
548 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
549 goto err_out;
550 }
551 }
ad9f6713 552#endif /* CONFIG_PCI */
1da177e4
LT		 553
554 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
555 if (dev == NULL) {
556 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
557 rc = -ENOMEM;
558 goto err_out_regions;
559 }
1da177e4 560 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 561
1da177e4
LT		 562 priv = netdev_priv(dev);
563
564 priv->pciDev = pdev;
c4028958 565 priv->dev = dev;
6aa20a22 566
1da177e4
LT		 567 /* Is this a PCI device? */
568 if (pdev) {
569 u32 pci_io_base = 0;
570
571 priv->adapter = &board_info[ent->driver_data];
572
284901a9 573 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1da177e4
LT		 574 if (rc) {
575 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
576 goto err_out_free_dev;
577 }
578
1da177e4
LT		 579 for ( reg= 0; reg <= 5; reg ++ ) {
580 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
581 pci_io_base = pci_resource_start(pdev, reg);
582 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
583 pci_io_base);
584 break;
585 }
586 }
587 if (!pci_io_base) {
588 printk(KERN_ERR "TLAN: No IO mappings available\n");
589 rc = -EIO;
590 goto err_out_free_dev;
591 }
6aa20a22 592
1da177e4
LT		 593 dev->base_addr = pci_io_base;
594 dev->irq = pdev->irq;
44c10138 595 priv->adapterRev = pdev->revision;
1da177e4
LT		 596 pci_set_master(pdev);
597 pci_set_drvdata(pdev, dev);
598
599 } else { /* EISA card */
600 /* This is a hack. We need to know which board structure
601 * is suited for this adapter */
602 device_id = inw(ioaddr + EISA_ID2);
603 priv->is_eisa = 1;
604 if (device_id == 0x20F1) {
605 priv->adapter = &board_info[13]; /* NetFlex-3/E */
606 priv->adapterRev = 23; /* TLAN 2.3 */
607 } else {
608 priv->adapter = &board_info[14];
609 priv->adapterRev = 10; /* TLAN 1.0 */
610 }
611 dev->base_addr = ioaddr;
612 dev->irq = irq;
613 }
614
615 /* Kernel parameters */
616 if (dev->mem_start) {
617 priv->aui = dev->mem_start & 0x01;
dfc2c0a6
SH		 618 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0
619 : (dev->mem_start & 0x06) >> 1;
620 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0
621 : (dev->mem_start & 0x18) >> 3;
6aa20a22 622
1da177e4
LT		 623 if (priv->speed == 0x1) {
624 priv->speed = TLAN_SPEED_10;
625 } else if (priv->speed == 0x2) {
626 priv->speed = TLAN_SPEED_100;
627 }
628 debug = priv->debug = dev->mem_end;
629 } else {
630 priv->aui = aui[boards_found];
631 priv->speed = speed[boards_found];
632 priv->duplex = duplex[boards_found];
633 priv->debug = debug;
634 }
6aa20a22 635
1da177e4
LT		 636 /* This will be used when we get an adapter error from
637 * within our irq handler */
c4028958 638 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work);
1da177e4
LT		 639
640 spin_lock_init(&priv->lock);
6aa20a22 641
1da177e4
LT		 642 rc = TLan_Init(dev);
643 if (rc) {
644 printk(KERN_ERR "TLAN: Could not set up device.\n");
645 goto err_out_free_dev;
646 }
647
648 rc = register_netdev(dev);
649 if (rc) {
650 printk(KERN_ERR "TLAN: Could not register device.\n");
651 goto err_out_uninit;
652 }
653
6aa20a22 654
1da177e4
LT		 655 TLanDevicesInstalled++;
656 boards_found++;
6aa20a22 657
1da177e4
LT		 658 /* pdev is NULL if this is an EISA device */
659 if (pdev)
660 tlan_have_pci++;
661 else {
662 priv->nextDevice = TLan_Eisa_Devices;
663 TLan_Eisa_Devices = dev;
664 tlan_have_eisa++;
665 }
6aa20a22 666
1da177e4
LT		 667 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
668 dev->name,
669 (int) dev->irq,
670 (int) dev->base_addr,
671 priv->adapter->deviceLabel,
672 priv->adapterRev);
673 return 0;
674
675err_out_uninit:
676 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
677 priv->dmaStorageDMA );
678err_out_free_dev:
679 free_netdev(dev);
680err_out_regions:
681#ifdef CONFIG_PCI
682 if (pdev)
683 pci_release_regions(pdev);
684#endif
685err_out:
686 if (pdev)
687 pci_disable_device(pdev);
688 return rc;
689}
690
691
692static void TLan_Eisa_Cleanup(void)
693{
694 struct net_device *dev;
695 TLanPrivateInfo *priv;
6aa20a22 696
1da177e4
LT		 697 while( tlan_have_eisa ) {
698 dev = TLan_Eisa_Devices;
699 priv = netdev_priv(dev);
700 if (priv->dmaStorage) {
dfc2c0a6
SH		 701 pci_free_consistent(priv->pciDev, priv->dmaSize,
702 priv->dmaStorage, priv->dmaStorageDMA );
1da177e4
LT		 703 }
704 release_region( dev->base_addr, 0x10);
705 unregister_netdev( dev );
706 TLan_Eisa_Devices = priv->nextDevice;
707 free_netdev( dev );
708 tlan_have_eisa--;
709 }
710}
6aa20a22
JG		 711
712
1da177e4
LT		 713static void __exit tlan_exit(void)
714{
715 pci_unregister_driver(&tlan_driver);
716
717 if (tlan_have_eisa)
718 TLan_Eisa_Cleanup();
719
1da177e4
LT		 720}
721
722
723/* Module loading/unloading */
724module_init(tlan_probe);
725module_exit(tlan_exit);
726
727
728
729 /**************************************************************
730 * TLan_EisaProbe
731 *
732 * Returns: 0 on success, 1 otherwise
733 *
734 * Parms: None
735 *
736 *
6aa20a22
JG		 737 * This functions probes for EISA devices and calls
738 * TLan_probe1 when one is found.
1da177e4
LT		 739 *
740 *************************************************************/
741
6aa20a22 742static void __init TLan_EisaProbe (void)
1da177e4
LT		 743{
744 long ioaddr;
745 int rc = -ENODEV;
746 int irq;
747 u16 device_id;
748
6aa20a22 749 if (!EISA_bus) {
1da177e4
LT		 750 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
751 return;
752 }
6aa20a22 753
1da177e4
LT		 754 /* Loop through all slots of the EISA bus */
755 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22 756
dfc2c0a6
SH		 757 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
758 (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
759 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n",
760 (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
1da177e4
LT		 761
762
763 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
764 (int) ioaddr);
6aa20a22 765 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT		 766 goto out;
767
6aa20a22 768 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT		 769 release_region(ioaddr, 0x10);
770 goto out;
771 }
6aa20a22 772
1da177e4 773 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 774 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT		 775 release_region (ioaddr, 0x10);
776 goto out;
777 }
6aa20a22 778
1da177e4
LT		 779 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
780 release_region (ioaddr, 0x10);
781 goto out2;
782 }
6aa20a22
JG		 783
784 if (debug == 0x10)
1da177e4
LT		 785 printk("Found one\n");
786
787
788 /* Get irq from board */
789 switch (inb(ioaddr + 0xCC0)) {
790 case(0x10):
791 irq=5;
792 break;
793 case(0x20):
794 irq=9;
795 break;
796 case(0x40):
797 irq=10;
798 break;
799 case(0x80):
800 irq=11;
801 break;
802 default:
803 goto out;
6aa20a22
JG		 804 }
805
806
1da177e4
LT		 807 /* Setup the newly found eisa adapter */
808 rc = TLan_probe1( NULL, ioaddr, irq,
809 12, NULL);
810 continue;
6aa20a22 811
1da177e4
LT		 812 out:
813 if (debug == 0x10)
814 printk("None found\n");
815 continue;
816
817 out2: if (debug == 0x10)
818 printk("Card found but it is not enabled, skipping\n");
819 continue;
6aa20a22 820
1da177e4
LT		 821 }
822
823} /* TLan_EisaProbe */
824
825#ifdef CONFIG_NET_POLL_CONTROLLER
826static void TLan_Poll(struct net_device *dev)
827{
828 disable_irq(dev->irq);
7d12e780 829 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT		 830 enable_irq(dev->irq);
831}
832#endif
833
391c5e6e
SH		 834static const struct net_device_ops TLan_netdev_ops = {
835 .ndo_open = TLan_Open,
836 .ndo_stop = TLan_Close,
837 .ndo_start_xmit = TLan_StartTx,
838 .ndo_tx_timeout = TLan_tx_timeout,
839 .ndo_get_stats = TLan_GetStats,
840 .ndo_set_multicast_list = TLan_SetMulticastList,
841 .ndo_do_ioctl = TLan_ioctl,
842 .ndo_change_mtu = eth_change_mtu,
843 .ndo_set_mac_address = eth_mac_addr,
844 .ndo_validate_addr = eth_validate_addr,
845#ifdef CONFIG_NET_POLL_CONTROLLER
846 .ndo_poll_controller = TLan_Poll,
847#endif
848};
6aa20a22 849
1da177e4
LT		 850
851
852 /***************************************************************
853 * TLan_Init
854 *
855 * Returns:
856 * 0 on success, error code otherwise.
857 * Parms:
858 * dev The structure of the device to be
859 * init'ed.
860 *
861 * This function completes the initialization of the
862 * device structure and driver. It reserves the IO
863 * addresses, allocates memory for the lists and bounce
864 * buffers, retrieves the MAC address from the eeprom
865 * and assignes the device's methods.
6aa20a22 866 *
1da177e4
LT		 867 **************************************************************/
868
869static int TLan_Init( struct net_device *dev )
870{
871 int dma_size;
872 int err;
873 int i;
874 TLanPrivateInfo *priv;
875
876 priv = netdev_priv(dev);
6aa20a22 877
5eeabf51
SA		 878 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
879 * ( sizeof(TLanList) );
93e16847
SH		 880 priv->dmaStorage = pci_alloc_consistent(priv->pciDev,
881 dma_size, &priv->dmaStorageDMA);
1da177e4 882 priv->dmaSize = dma_size;
6aa20a22 883
1da177e4
LT		 884 if ( priv->dmaStorage == NULL ) {
885 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
886 dev->name );
887 return -ENOMEM;
888 }
889 memset( priv->dmaStorage, 0, dma_size );
93e16847
SH		 890 priv->rxList = (TLanList *) ALIGN((unsigned long)priv->dmaStorage, 8);
891 priv->rxListDMA = ALIGN(priv->dmaStorageDMA, 8);
1da177e4
LT		 892 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
893 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
93e16847 894
1da177e4
LT		 895 err = 0;
896 for ( i = 0; i < 6 ; i++ )
897 err |= TLan_EeReadByte( dev,
898 (u8) priv->adapter->addrOfs + i,
899 (u8 *) &dev->dev_addr[i] );
900 if ( err ) {
901 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
902 dev->name,
903 err );
904 }
905 dev->addr_len = 6;
906
907 netif_carrier_off(dev);
908
909 /* Device methods */
391c5e6e 910 dev->netdev_ops = &TLan_netdev_ops;
1da177e4
LT		 911 dev->watchdog_timeo = TX_TIMEOUT;
912
913 return 0;
914
915} /* TLan_Init */
916
917
918
919
920 /***************************************************************
921 * TLan_Open
922 *
923 * Returns:
924 * 0 on success, error code otherwise.
925 * Parms:
926 * dev Structure of device to be opened.
927 *
928 * This routine puts the driver and TLAN adapter in a
929 * state where it is ready to send and receive packets.
930 * It allocates the IRQ, resets and brings the adapter
931 * out of reset, and allows interrupts. It also delays
932 * the startup for autonegotiation or sends a Rx GO
933 * command to the adapter, as appropriate.
934 *
935 **************************************************************/
936
937static int TLan_Open( struct net_device *dev )
938{
939 TLanPrivateInfo *priv = netdev_priv(dev);
940 int err;
6aa20a22 941
1da177e4 942 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
a3ccc789
SH		 943 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED,
944 dev->name, dev );
6aa20a22 945
1da177e4 946 if ( err ) {
dfc2c0a6
SH		 947 pr_err("TLAN: Cannot open %s because IRQ %d is already in use.\n",
948 dev->name, dev->irq );
1da177e4
LT		 949 return err;
950 }
6aa20a22 951
1da177e4
LT		 952 init_timer(&priv->timer);
953 netif_start_queue(dev);
6aa20a22 954
1da177e4
LT		 955 /* NOTE: It might not be necessary to read the stats before a
956 reset if you don't care what the values are.
957 */
958 TLan_ResetLists( dev );
959 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
960 TLan_ResetAdapter( dev );
961
dfc2c0a6
SH		 962 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n",
963 dev->name, priv->tlanRev );
1da177e4
LT		 964
965 return 0;
966
967} /* TLan_Open */
968
969
970
971 /**************************************************************
972 * TLan_ioctl
6aa20a22 973 *
1da177e4
LT		 974 * Returns:
975 * 0 on success, error code otherwise
976 * Params:
977 * dev structure of device to receive ioctl.
6aa20a22 978 *
1da177e4
LT		 979 * rq ifreq structure to hold userspace data.
980 *
981 * cmd ioctl command.
982 *
983 *
984 *************************************************************/
985
986static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
987{
988 TLanPrivateInfo *priv = netdev_priv(dev);
989 struct mii_ioctl_data *data = if_mii(rq);
990 u32 phy = priv->phy[priv->phyNum];
6aa20a22 991
1da177e4
LT		 992 if (!priv->phyOnline)
993 return -EAGAIN;
994
995 switch(cmd) {
996 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
997 data->phy_id = phy;
998
999
1000 case SIOCGMIIREG: /* Read MII PHY register. */
dfc2c0a6
SH		 1001 TLan_MiiReadReg(dev, data->phy_id & 0x1f,
1002 data->reg_num & 0x1f, &data->val_out);
1da177e4 1003 return 0;
6aa20a22 1004
1da177e4
LT		 1005
1006 case SIOCSMIIREG: /* Write MII PHY register. */
1007 if (!capable(CAP_NET_ADMIN))
1008 return -EPERM;
dfc2c0a6
SH		 1009 TLan_MiiWriteReg(dev, data->phy_id & 0x1f,
1010 data->reg_num & 0x1f, data->val_in);
1da177e4
LT		 1011 return 0;
1012 default:
1013 return -EOPNOTSUPP;
1014 }
1015} /* tlan_ioctl */
1016
1017
1018 /***************************************************************
1019 * TLan_tx_timeout
1020 *
1021 * Returns: nothing
1022 *
1023 * Params:
6aa20a22 1024 * dev structure of device which timed out
1da177e4
LT		 1025 * during transmit.
1026 *
1027 **************************************************************/
1028
1029static void TLan_tx_timeout(struct net_device *dev)
1030{
6aa20a22 1031
1da177e4 1032 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1033
1da177e4
LT		 1034 /* Ok so we timed out, lets see what we can do about it...*/
1035 TLan_FreeLists( dev );
6aa20a22 1036 TLan_ResetLists( dev );
1da177e4
LT		 1037 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1038 TLan_ResetAdapter( dev );
1039 dev->trans_start = jiffies;
6aa20a22 1040 netif_wake_queue( dev );
1da177e4
LT		 1041
1042}
6aa20a22 1043
1da177e4 1044
c4028958
DH		 1045 /***************************************************************
1046 * TLan_tx_timeout_work
1047 *
1048 * Returns: nothing
1049 *
1050 * Params:
1051 * work work item of device which timed out
1052 *
1053 **************************************************************/
1054
1055static void TLan_tx_timeout_work(struct work_struct *work)
1056{
1057 TLanPrivateInfo *priv =
1058 container_of(work, TLanPrivateInfo, tlan_tqueue);
1059
1060 TLan_tx_timeout(priv->dev);
1061}
1062
1063
1da177e4
LT		 1064
1065 /***************************************************************
1066 * TLan_StartTx
6aa20a22 1067 *
1da177e4
LT		 1068 * Returns:
1069 * 0 on success, non-zero on failure.
1070 * Parms:
1071 * skb A pointer to the sk_buff containing the
1072 * frame to be sent.
1073 * dev The device to send the data on.
1074 *
1075 * This function adds a frame to the Tx list to be sent
1076 * ASAP. First it verifies that the adapter is ready and
1077 * there is room in the queue. Then it sets up the next
1078 * available list, copies the frame to the corresponding
1079 * buffer. If the adapter Tx channel is idle, it gives
1080 * the adapter a Tx Go command on the list, otherwise it
1081 * sets the forward address of the previous list to point
1082 * to this one. Then it frees the sk_buff.
1083 *
1084 **************************************************************/
1085
1086static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1087{
1088 TLanPrivateInfo *priv = netdev_priv(dev);
1da177e4 1089 dma_addr_t tail_list_phys;
5eeabf51 1090 TLanList *tail_list;
1da177e4 1091 unsigned long flags;
8953f128 1092 unsigned int txlen;
1da177e4
LT		 1093
1094 if ( ! priv->phyOnline ) {
dfc2c0a6
SH		 1095 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n",
1096 dev->name );
1da177e4
LT		 1097 dev_kfree_skb_any(skb);
1098 return 0;
1099 }
1100
41873e9a
SH		 1101 if (skb_padto(skb, TLAN_MIN_FRAME_SIZE))
1102 return 0;
8953f128 1103 txlen = max(skb->len, (unsigned int)TLAN_MIN_FRAME_SIZE);
41873e9a 1104
1da177e4
LT		 1105 tail_list = priv->txList + priv->txTail;
1106 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1107
1da177e4 1108 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
dfc2c0a6
SH		 1109 TLAN_DBG( TLAN_DEBUG_TX,
1110 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
1111 dev->name, priv->txHead, priv->txTail );
1da177e4
LT		 1112 netif_stop_queue(dev);
1113 priv->txBusyCount++;
1114 return 1;
1115 }
1116
1117 tail_list->forward = 0;
1118
5eeabf51
SA		 1119 tail_list->buffer[0].address = pci_map_single(priv->pciDev,
1120 skb->data, txlen,
1121 PCI_DMA_TODEVICE);
1122 TLan_StoreSKB(tail_list, skb);
1da177e4 1123
8953f128
SA		 1124 tail_list->frameSize = (u16) txlen;
1125 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) txlen;
41873e9a
SH		 1126 tail_list->buffer[1].count = 0;
1127 tail_list->buffer[1].address = 0;
1da177e4
LT		 1128
1129 spin_lock_irqsave(&priv->lock, flags);
1130 tail_list->cStat = TLAN_CSTAT_READY;
1131 if ( ! priv->txInProgress ) {
1132 priv->txInProgress = 1;
dfc2c0a6
SH		 1133 TLAN_DBG( TLAN_DEBUG_TX,
1134 "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1da177e4
LT		 1135 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1136 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1137 } else {
dfc2c0a6
SH		 1138 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n",
1139 priv->txTail );
1da177e4 1140 if ( priv->txTail == 0 ) {
dfc2c0a6
SH		 1141 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward
1142 = tail_list_phys;
1da177e4 1143 } else {
dfc2c0a6
SH		 1144 ( priv->txList + ( priv->txTail - 1 ) )->forward
1145 = tail_list_phys;
1da177e4
LT		 1146 }
1147 }
1148 spin_unlock_irqrestore(&priv->lock, flags);
1149
1150 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1151
1da177e4
LT		 1152 dev->trans_start = jiffies;
1153 return 0;
1154
1155} /* TLan_StartTx */
1156
1157
1158
1159
1160 /***************************************************************
1161 * TLan_HandleInterrupt
6aa20a22
JG		 1162 *
1163 * Returns:
1da177e4
LT		 1164 * Nothing
1165 * Parms:
1166 * irq The line on which the interrupt
1167 * occurred.
1168 * dev_id A pointer to the device assigned to
1169 * this irq line.
1da177e4
LT		 1170 *
1171 * This function handles an interrupt generated by its
1172 * assigned TLAN adapter. The function deactivates
1173 * interrupts on its adapter, records the type of
1174 * interrupt, executes the appropriate subhandler, and
1175 * acknowdges the interrupt to the adapter (thus
1176 * re-enabling adapter interrupts.
1177 *
1178 **************************************************************/
1179
7d12e780 1180static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4 1181{
a3ccc789
SH		 1182 struct net_device *dev = dev_id;
1183 TLanPrivateInfo *priv = netdev_priv(dev);
1da177e4 1184 u16 host_int;
a3ccc789 1185 u16 type;
1da177e4
LT		 1186
1187 spin_lock(&priv->lock);
1188
1189 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1da177e4 1190 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
a3ccc789
SH		 1191 if ( type ) {
1192 u32 ack;
1193 u32 host_cmd;
1da177e4 1194
a3ccc789
SH		 1195 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1196 ack = TLanIntVector[type]( dev, host_int );
1da177e4 1197
a3ccc789
SH		 1198 if ( ack ) {
1199 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1200 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1201 }
1da177e4
LT		 1202 }
1203
1204 spin_unlock(&priv->lock);
1205
a3ccc789 1206 return IRQ_RETVAL(type);
1da177e4
LT		 1207} /* TLan_HandleInterrupts */
1208
1209
1210
1211
1212 /***************************************************************
1213 * TLan_Close
6aa20a22 1214 *
1da177e4
LT		 1215 * Returns:
1216 * An error code.
1217 * Parms:
1218 * dev The device structure of the device to
1219 * close.
1220 *
1221 * This function shuts down the adapter. It records any
1222 * stats, puts the adapter into reset state, deactivates
1223 * its time as needed, and frees the irq it is using.
1224 *
1225 **************************************************************/
1226
1227static int TLan_Close(struct net_device *dev)
1228{
1229 TLanPrivateInfo *priv = netdev_priv(dev);
1230
1231 netif_stop_queue(dev);
1232 priv->neg_be_verbose = 0;
1233
1234 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1235 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1236 if ( priv->timer.function != NULL ) {
1237 del_timer_sync( &priv->timer );
1238 priv->timer.function = NULL;
1239 }
6aa20a22 1240
1da177e4
LT		 1241 free_irq( dev->irq, dev );
1242 TLan_FreeLists( dev );
1243 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1244
1245 return 0;
1246
1247} /* TLan_Close */
1248
1249
1250
1251
1252 /***************************************************************
1253 * TLan_GetStats
6aa20a22 1254 *
1da177e4
LT		 1255 * Returns:
1256 * A pointer to the device's statistics structure.
1257 * Parms:
1258 * dev The device structure to return the
1259 * stats for.
1260 *
1261 * This function updates the devices statistics by reading
1262 * the TLAN chip's onboard registers. Then it returns the
1263 * address of the statistics structure.
1264 *
1265 **************************************************************/
1266
1267static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1268{
1269 TLanPrivateInfo *priv = netdev_priv(dev);
1270 int i;
1271
1272 /* Should only read stats if open ? */
1273 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1274
dfc2c0a6
SH		 1275 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name,
1276 priv->rxEocCount );
1277 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name,
1278 priv->txBusyCount );
1da177e4
LT		 1279 if ( debug & TLAN_DEBUG_GNRL ) {
1280 TLan_PrintDio( dev->base_addr );
6aa20a22 1281 TLan_PhyPrint( dev );
1da177e4
LT		 1282 }
1283 if ( debug & TLAN_DEBUG_LIST ) {
1284 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1285 TLan_PrintList( priv->rxList + i, "RX", i );
1286 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1287 TLan_PrintList( priv->txList + i, "TX", i );
1288 }
6aa20a22 1289
f8f31544 1290 return &dev->stats;
1da177e4
LT		 1291
1292} /* TLan_GetStats */
1293
1294
1295
1296
1297 /***************************************************************
1298 * TLan_SetMulticastList
6aa20a22 1299 *
1da177e4
LT		 1300 * Returns:
1301 * Nothing
1302 * Parms:
1303 * dev The device structure to set the
1304 * multicast list for.
1305 *
1306 * This function sets the TLAN adaptor to various receive
1307 * modes. If the IFF_PROMISC flag is set, promiscuous
1308 * mode is acitviated. Otherwise, promiscuous mode is
1309 * turned off. If the IFF_ALLMULTI flag is set, then
1310 * the hash table is set to receive all group addresses.
1311 * Otherwise, the first three multicast addresses are
1312 * stored in AREG_1-3, and the rest are selected via the
1313 * hash table, as necessary.
1314 *
1315 **************************************************************/
1316
1317static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1318{
1da177e4
LT		 1319 struct dev_mc_list *dmi = dev->mc_list;
1320 u32 hash1 = 0;
1321 u32 hash2 = 0;
1322 int i;
1323 u32 offset;
1324 u8 tmp;
1325
1326 if ( dev->flags & IFF_PROMISC ) {
1327 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
dfc2c0a6
SH		 1328 TLan_DioWrite8( dev->base_addr,
1329 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1da177e4
LT		 1330 } else {
1331 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
dfc2c0a6
SH		 1332 TLan_DioWrite8( dev->base_addr,
1333 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1da177e4 1334 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1335 for ( i = 0; i < 3; i++ )
1da177e4
LT		 1336 TLan_SetMac( dev, i + 1, NULL );
1337 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1338 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1339 } else {
1340 for ( i = 0; i < dev->mc_count; i++ ) {
1341 if ( i < 3 ) {
dfc2c0a6
SH		 1342 TLan_SetMac( dev, i + 1,
1343 (char *) &dmi->dmi_addr );
1da177e4
LT		 1344 } else {
1345 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1346 if ( offset < 32 )
1da177e4
LT		 1347 hash1 |= ( 1 << offset );
1348 else
1349 hash2 |= ( 1 << ( offset - 32 ) );
1350 }
1351 dmi = dmi->next;
1352 }
6aa20a22 1353 for ( ; i < 3; i++ )
1da177e4
LT		 1354 TLan_SetMac( dev, i + 1, NULL );
1355 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1356 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1357 }
1358 }
1359
1360} /* TLan_SetMulticastList */
1361
1362
1363
1364/*****************************************************************************
1365******************************************************************************
1366
1367 ThunderLAN Driver Interrupt Vectors and Table
1368
1369 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1370 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1371 generated by TLAN based adapters.
1da177e4
LT		 1372
1373******************************************************************************
1374*****************************************************************************/
1375
1376
1da177e4
LT		 1377
1378
1379 /***************************************************************
1380 * TLan_HandleTxEOF
1381 *
1382 * Returns:
1383 * 1
1384 * Parms:
1385 * dev Device assigned the IRQ that was
1386 * raised.
1387 * host_int The contents of the HOST_INT
1388 * port.
1389 *
1390 * This function handles Tx EOF interrupts which are raised
1391 * by the adapter when it has completed sending the
1392 * contents of a buffer. If detemines which list/buffer
1393 * was completed and resets it. If the buffer was the last
1394 * in the channel (EOC), then the function checks to see if
1395 * another buffer is ready to send, and if so, sends a Tx
1396 * Go command. Finally, the driver activates/continues the
1397 * activity LED.
1398 *
1399 **************************************************************/
1400
98e0f521 1401static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT		 1402{
1403 TLanPrivateInfo *priv = netdev_priv(dev);
1404 int eoc = 0;
1405 TLanList *head_list;
1406 dma_addr_t head_list_phys;
1407 u32 ack = 0;
1408 u16 tmpCStat;
6aa20a22 1409
dfc2c0a6
SH		 1410 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n",
1411 priv->txHead, priv->txTail );
1da177e4
LT		 1412 head_list = priv->txList + priv->txHead;
1413
1414 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
5eeabf51
SA		 1415 struct sk_buff *skb = TLan_GetSKB(head_list);
1416
1da177e4 1417 ack++;
5eeabf51
SA		 1418 pci_unmap_single(priv->pciDev, head_list->buffer[0].address,
1419 max(skb->len,
1420 (unsigned int)TLAN_MIN_FRAME_SIZE),
1421 PCI_DMA_TODEVICE);
1422 dev_kfree_skb_any(skb);
1423 head_list->buffer[8].address = 0;
1424 head_list->buffer[9].address = 0;
6aa20a22 1425
1da177e4
LT		 1426 if ( tmpCStat & TLAN_CSTAT_EOC )
1427 eoc = 1;
6aa20a22 1428
f8f31544 1429 dev->stats.tx_bytes += head_list->frameSize;
1da177e4
LT		 1430
1431 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG		 1432 netif_start_queue(dev);
1433 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT		 1434 head_list = priv->txList + priv->txHead;
1435 }
1436
1437 if (!ack)
1438 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1439
1da177e4 1440 if ( eoc ) {
dfc2c0a6
SH		 1441 TLAN_DBG( TLAN_DEBUG_TX,
1442 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n",
1443 priv->txHead, priv->txTail );
1da177e4
LT		 1444 head_list = priv->txList + priv->txHead;
1445 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1446 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1447 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1448 ack |= TLAN_HC_GO;
1449 } else {
1450 priv->txInProgress = 0;
1451 }
1452 }
6aa20a22 1453
1da177e4 1454 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
dfc2c0a6
SH		 1455 TLan_DioWrite8( dev->base_addr,
1456 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1da177e4
LT		 1457 if ( priv->timer.function == NULL ) {
1458 priv->timer.function = &TLan_Timer;
1459 priv->timer.data = (unsigned long) dev;
1460 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1461 priv->timerSetAt = jiffies;
1462 priv->timerType = TLAN_TIMER_ACTIVITY;
1463 add_timer(&priv->timer);
1464 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1465 priv->timerSetAt = jiffies;
1466 }
1467 }
1468
1469 return ack;
1470
1471} /* TLan_HandleTxEOF */
1472
1473
1474
1475
1476 /***************************************************************
1477 * TLan_HandleStatOverflow
1478 *
1479 * Returns:
1480 * 1
1481 * Parms:
1482 * dev Device assigned the IRQ that was
1483 * raised.
1484 * host_int The contents of the HOST_INT
1485 * port.
1486 *
1487 * This function handles the Statistics Overflow interrupt
1488 * which means that one or more of the TLAN statistics
1489 * registers has reached 1/2 capacity and needs to be read.
1490 *
1491 **************************************************************/
1492
98e0f521 1493static u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1da177e4
LT		 1494{
1495 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1496
1497 return 1;
1498
1499} /* TLan_HandleStatOverflow */
1500
1501
1502
1503
1504 /***************************************************************
1505 * TLan_HandleRxEOF
1506 *
1507 * Returns:
1508 * 1
1509 * Parms:
1510 * dev Device assigned the IRQ that was
1511 * raised.
1512 * host_int The contents of the HOST_INT
1513 * port.
1514 *
1515 * This function handles the Rx EOF interrupt which
1516 * indicates a frame has been received by the adapter from
1517 * the net and the frame has been transferred to memory.
1518 * The function determines the bounce buffer the frame has
1519 * been loaded into, creates a new sk_buff big enough to
1520 * hold the frame, and sends it to protocol stack. It
1521 * then resets the used buffer and appends it to the end
1522 * of the list. If the frame was the last in the Rx
1523 * channel (EOC), the function restarts the receive channel
1524 * by sending an Rx Go command to the adapter. Then it
1525 * activates/continues the activity LED.
1526 *
1527 **************************************************************/
1528
98e0f521 1529static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT		 1530{
1531 TLanPrivateInfo *priv = netdev_priv(dev);
1532 u32 ack = 0;
1533 int eoc = 0;
1da177e4
LT		 1534 TLanList *head_list;
1535 struct sk_buff *skb;
1536 TLanList *tail_list;
1da177e4
LT		 1537 u16 tmpCStat;
1538 dma_addr_t head_list_phys;
1539
dfc2c0a6
SH		 1540 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n",
1541 priv->rxHead, priv->rxTail );
1da177e4
LT		 1542 head_list = priv->rxList + priv->rxHead;
1543 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1544
1da177e4 1545 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
9ded65a1
SH		 1546 dma_addr_t frameDma = head_list->buffer[0].address;
1547 u32 frameSize = head_list->frameSize;
5eeabf51
SA		 1548 struct sk_buff *new_skb;
1549
1da177e4
LT		 1550 ack++;
1551 if (tmpCStat & TLAN_CSTAT_EOC)
1552 eoc = 1;
6aa20a22 1553
5eeabf51
SA		 1554 new_skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
1555 if ( !new_skb )
1556 goto drop_and_reuse;
6aa20a22 1557
5eeabf51
SA		 1558 skb = TLan_GetSKB(head_list);
1559 pci_unmap_single(priv->pciDev, frameDma,
1560 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1561 skb_put( skb, frameSize );
1da177e4 1562
5eeabf51 1563 dev->stats.rx_bytes += frameSize;
1da177e4 1564
5eeabf51
SA		 1565 skb->protocol = eth_type_trans( skb, dev );
1566 netif_rx( skb );
6aa20a22 1567
5eeabf51
SA		 1568 skb_reserve( new_skb, NET_IP_ALIGN );
1569 head_list->buffer[0].address = pci_map_single(priv->pciDev,
1570 new_skb->data,
1571 TLAN_MAX_FRAME_SIZE,
1572 PCI_DMA_FROMDEVICE);
93e16847 1573
5eeabf51 1574 TLan_StoreSKB(head_list, new_skb);
dfc2c0a6 1575drop_and_reuse:
1da177e4
LT		 1576 head_list->forward = 0;
1577 head_list->cStat = 0;
1578 tail_list = priv->rxList + priv->rxTail;
1579 tail_list->forward = head_list_phys;
1580
1581 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1582 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1583 head_list = priv->rxList + priv->rxHead;
1584 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1585 }
1586
1587 if (!ack)
1588 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT		 1589
1590
6aa20a22 1591 if ( eoc ) {
dfc2c0a6
SH		 1592 TLAN_DBG( TLAN_DEBUG_RX,
1593 "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n",
1594 priv->rxHead, priv->rxTail );
1da177e4
LT		 1595 head_list = priv->rxList + priv->rxHead;
1596 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1597 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1598 ack |= TLAN_HC_GO | TLAN_HC_RT;
1599 priv->rxEocCount++;
1600 }
1601
1602 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
dfc2c0a6
SH		 1603 TLan_DioWrite8( dev->base_addr,
1604 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1da177e4
LT		 1605 if ( priv->timer.function == NULL ) {
1606 priv->timer.function = &TLan_Timer;
1607 priv->timer.data = (unsigned long) dev;
1608 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1609 priv->timerSetAt = jiffies;
1610 priv->timerType = TLAN_TIMER_ACTIVITY;
1611 add_timer(&priv->timer);
1612 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1613 priv->timerSetAt = jiffies;
1614 }
1615 }
1616
1da177e4
LT		 1617 return ack;
1618
1619} /* TLan_HandleRxEOF */
1620
1621
1622
1623
1624 /***************************************************************
1625 * TLan_HandleDummy
1626 *
1627 * Returns:
1628 * 1
1629 * Parms:
1630 * dev Device assigned the IRQ that was
1631 * raised.
1632 * host_int The contents of the HOST_INT
1633 * port.
1634 *
1635 * This function handles the Dummy interrupt, which is
1636 * raised whenever a test interrupt is generated by setting
1637 * the Req_Int bit of HOST_CMD to 1.
1638 *
1639 **************************************************************/
1640
98e0f521 1641static u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1da177e4
LT		 1642{
1643 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1644 return 1;
1645
1646} /* TLan_HandleDummy */
1647
1648
1649
1650
1651 /***************************************************************
1652 * TLan_HandleTxEOC
1653 *
1654 * Returns:
1655 * 1
1656 * Parms:
1657 * dev Device assigned the IRQ that was
1658 * raised.
1659 * host_int The contents of the HOST_INT
1660 * port.
1661 *
1662 * This driver is structured to determine EOC occurrences by
1663 * reading the CSTAT member of the list structure. Tx EOC
1664 * interrupts are disabled via the DIO INTDIS register.
1665 * However, TLAN chips before revision 3.0 didn't have this
1666 * functionality, so process EOC events if this is the
1667 * case.
1668 *
1669 **************************************************************/
1670
98e0f521 1671static u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT		 1672{
1673 TLanPrivateInfo *priv = netdev_priv(dev);
1674 TLanList *head_list;
1675 dma_addr_t head_list_phys;
1676 u32 ack = 1;
6aa20a22 1677
1da177e4
LT		 1678 host_int = 0;
1679 if ( priv->tlanRev < 0x30 ) {
dfc2c0a6
SH		 1680 TLAN_DBG( TLAN_DEBUG_TX,
1681 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n",
1682 priv->txHead, priv->txTail );
1da177e4
LT		 1683 head_list = priv->txList + priv->txHead;
1684 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1685 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1686 netif_stop_queue(dev);
1687 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1688 ack |= TLAN_HC_GO;
1689 } else {
1690 priv->txInProgress = 0;
1691 }
1692 }
1693
1694 return ack;
1695
1696} /* TLan_HandleTxEOC */
1697
1698
1699
1700
1701 /***************************************************************
1702 * TLan_HandleStatusCheck
1703 *
1704 * Returns:
1705 * 0 if Adapter check, 1 if Network Status check.
1706 * Parms:
1707 * dev Device assigned the IRQ that was
1708 * raised.
1709 * host_int The contents of the HOST_INT
1710 * port.
1711 *
1712 * This function handles Adapter Check/Network Status
1713 * interrupts generated by the adapter. It checks the
1714 * vector in the HOST_INT register to determine if it is
1715 * an Adapter Check interrupt. If so, it resets the
1716 * adapter. Otherwise it clears the status registers
1717 * and services the PHY.
1718 *
1719 **************************************************************/
1720
98e0f521 1721static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1722{
1da177e4
LT		 1723 TLanPrivateInfo *priv = netdev_priv(dev);
1724 u32 ack;
1725 u32 error;
1726 u8 net_sts;
1727 u32 phy;
1728 u16 tlphy_ctl;
1729 u16 tlphy_sts;
6aa20a22 1730
1da177e4
LT		 1731 ack = 1;
1732 if ( host_int & TLAN_HI_IV_MASK ) {
1733 netif_stop_queue( dev );
1734 error = inl( dev->base_addr + TLAN_CH_PARM );
1735 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1736 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1737 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1738
1739 schedule_work(&priv->tlan_tqueue);
1740
1741 netif_wake_queue(dev);
1742 ack = 0;
1743 } else {
1744 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1745 phy = priv->phy[priv->phyNum];
1746
1747 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1748 if ( net_sts ) {
1749 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
dfc2c0a6
SH		 1750 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n",
1751 dev->name, (unsigned) net_sts );
1da177e4
LT		 1752 }
1753 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1754 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1755 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
dfc2c0a6
SH		 1756 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) &&
1757 ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1da177e4
LT		 1758 tlphy_ctl |= TLAN_TC_SWAPOL;
1759 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
dfc2c0a6
SH		 1760 } else if ( ( tlphy_sts & TLAN_TS_POLOK )
1761 && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1da177e4
LT		 1762 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1763 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1764 }
1765
1766 if (debug) {
6aa20a22 1767 TLan_PhyPrint( dev );
1da177e4
LT		 1768 }
1769 }
1770 }
1771
1772 return ack;
1773
1774} /* TLan_HandleStatusCheck */
1775
1776
1777
1778
1779 /***************************************************************
1780 * TLan_HandleRxEOC
1781 *
1782 * Returns:
1783 * 1
1784 * Parms:
1785 * dev Device assigned the IRQ that was
1786 * raised.
1787 * host_int The contents of the HOST_INT
1788 * port.
1789 *
1790 * This driver is structured to determine EOC occurrences by
1791 * reading the CSTAT member of the list structure. Rx EOC
1792 * interrupts are disabled via the DIO INTDIS register.
1793 * However, TLAN chips before revision 3.0 didn't have this
1794 * CSTAT member or a INTDIS register, so if this chip is
1795 * pre-3.0, process EOC interrupts normally.
1796 *
1797 **************************************************************/
1798
98e0f521 1799static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT		 1800{
1801 TLanPrivateInfo *priv = netdev_priv(dev);
1802 dma_addr_t head_list_phys;
1803 u32 ack = 1;
1804
1805 if ( priv->tlanRev < 0x30 ) {
dfc2c0a6
SH		 1806 TLAN_DBG( TLAN_DEBUG_RX,
1807 "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n",
1808 priv->rxHead, priv->rxTail );
1da177e4
LT		 1809 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1810 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1811 ack |= TLAN_HC_GO | TLAN_HC_RT;
1812 priv->rxEocCount++;
1813 }
1814
1815 return ack;
1816
1817} /* TLan_HandleRxEOC */
1818
1819
1820
1821
1822/*****************************************************************************
1823******************************************************************************
1824
1825 ThunderLAN Driver Timer Function
1826
1827******************************************************************************
1828*****************************************************************************/
1829
1830
1831 /***************************************************************
1832 * TLan_Timer
1833 *
1834 * Returns:
1835 * Nothing
1836 * Parms:
1837 * data A value given to add timer when
1838 * add_timer was called.
1839 *
1840 * This function handles timed functionality for the
1841 * TLAN driver. The two current timer uses are for
1842 * delaying for autonegotionation and driving the ACT LED.
1843 * - Autonegotiation requires being allowed about
1844 * 2 1/2 seconds before attempting to transmit a
1845 * packet. It would be a very bad thing to hang
1846 * the kernel this long, so the driver doesn't
1847 * allow transmission 'til after this time, for
1848 * certain PHYs. It would be much nicer if all
1849 * PHYs were interrupt-capable like the internal
1850 * PHY.
1851 * - The ACT LED, which shows adapter activity, is
1852 * driven by the driver, and so must be left on
1853 * for a short period to power up the LED so it
1854 * can be seen. This delay can be changed by
1855 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1856 * if desired. 100 ms produces a slightly
1857 * sluggish response.
1858 *
1859 **************************************************************/
1860
98e0f521 1861static void TLan_Timer( unsigned long data )
1da177e4
LT		 1862{
1863 struct net_device *dev = (struct net_device *) data;
1864 TLanPrivateInfo *priv = netdev_priv(dev);
1865 u32 elapsed;
1866 unsigned long flags = 0;
1867
1868 priv->timer.function = NULL;
1869
1870 switch ( priv->timerType ) {
6aa20a22 1871#ifdef MONITOR
1da177e4
LT		 1872 case TLAN_TIMER_LINK_BEAT:
1873 TLan_PhyMonitor( dev );
1874 break;
1875#endif
1876 case TLAN_TIMER_PHY_PDOWN:
1877 TLan_PhyPowerDown( dev );
1878 break;
1879 case TLAN_TIMER_PHY_PUP:
1880 TLan_PhyPowerUp( dev );
1881 break;
1882 case TLAN_TIMER_PHY_RESET:
1883 TLan_PhyReset( dev );
1884 break;
1885 case TLAN_TIMER_PHY_START_LINK:
1886 TLan_PhyStartLink( dev );
1887 break;
1888 case TLAN_TIMER_PHY_FINISH_AN:
1889 TLan_PhyFinishAutoNeg( dev );
1890 break;
1891 case TLAN_TIMER_FINISH_RESET:
1892 TLan_FinishReset( dev );
1893 break;
1894 case TLAN_TIMER_ACTIVITY:
1895 spin_lock_irqsave(&priv->lock, flags);
1896 if ( priv->timer.function == NULL ) {
1897 elapsed = jiffies - priv->timerSetAt;
1898 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
dfc2c0a6
SH		 1899 TLan_DioWrite8( dev->base_addr,
1900 TLAN_LED_REG, TLAN_LED_LINK );
1da177e4
LT		 1901 } else {
1902 priv->timer.function = &TLan_Timer;
dfc2c0a6
SH		 1903 priv->timer.expires = priv->timerSetAt
1904 + TLAN_TIMER_ACT_DELAY;
1da177e4
LT		 1905 spin_unlock_irqrestore(&priv->lock, flags);
1906 add_timer( &priv->timer );
1907 break;
1908 }
1909 }
1910 spin_unlock_irqrestore(&priv->lock, flags);
1911 break;
1912 default:
1913 break;
1914 }
1915
1916} /* TLan_Timer */
1917
1918
1919
1920
1921/*****************************************************************************
1922******************************************************************************
1923
1924 ThunderLAN Driver Adapter Related Routines
1925
1926******************************************************************************
1927*****************************************************************************/
1928
1929
1930 /***************************************************************
1931 * TLan_ResetLists
6aa20a22 1932 *
1da177e4
LT		 1933 * Returns:
1934 * Nothing
1935 * Parms:
1936 * dev The device structure with the list
1937 * stuctures to be reset.
1938 *
1939 * This routine sets the variables associated with managing
1940 * the TLAN lists to their initial values.
1941 *
1942 **************************************************************/
1943
98e0f521 1944static void TLan_ResetLists( struct net_device *dev )
1da177e4
LT		 1945{
1946 TLanPrivateInfo *priv = netdev_priv(dev);
1947 int i;
1948 TLanList *list;
1949 dma_addr_t list_phys;
1950 struct sk_buff *skb;
1da177e4
LT		 1951
1952 priv->txHead = 0;
1953 priv->txTail = 0;
1954 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1955 list = priv->txList + i;
1956 list->cStat = TLAN_CSTAT_UNUSED;
5eeabf51 1957 list->buffer[0].address = 0;
1da177e4
LT		 1958 list->buffer[2].count = 0;
1959 list->buffer[2].address = 0;
1960 list->buffer[8].address = 0;
1961 list->buffer[9].address = 0;
1962 }
1963
1964 priv->rxHead = 0;
1965 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
1966 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1967 list = priv->rxList + i;
1968 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
1969 list->cStat = TLAN_CSTAT_READY;
1970 list->frameSize = TLAN_MAX_FRAME_SIZE;
1971 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
5eeabf51
SA		 1972 skb = netdev_alloc_skb(dev, TLAN_MAX_FRAME_SIZE + 7 );
1973 if ( !skb ) {
1974 pr_err("TLAN: out of memory for received data.\n" );
1975 break;
1da177e4 1976 }
5eeabf51
SA		 1977
1978 skb_reserve( skb, NET_IP_ALIGN );
1979 list->buffer[0].address = pci_map_single(priv->pciDev,
1980 skb->data,
1981 TLAN_MAX_FRAME_SIZE,
1982 PCI_DMA_FROMDEVICE);
1983 TLan_StoreSKB(list, skb);
1da177e4
LT		 1984 list->buffer[1].count = 0;
1985 list->buffer[1].address = 0;
9ded65a1
SH		 1986 list->forward = list_phys + sizeof(TLanList);
1987 }
1988
1989 /* in case ran out of memory early, clear bits */
1990 while (i < TLAN_NUM_RX_LISTS) {
1991 TLan_StoreSKB(priv->rxList + i, NULL);
1992 ++i;
1da177e4 1993 }
9ded65a1 1994 list->forward = 0;
1da177e4
LT		 1995
1996} /* TLan_ResetLists */
1997
1998
98e0f521 1999static void TLan_FreeLists( struct net_device *dev )
1da177e4
LT		 2000{
2001 TLanPrivateInfo *priv = netdev_priv(dev);
2002 int i;
2003 TLanList *list;
2004 struct sk_buff *skb;
2005
5eeabf51
SA		 2006 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2007 list = priv->txList + i;
2008 skb = TLan_GetSKB(list);
2009 if ( skb ) {
2010 pci_unmap_single(
2011 priv->pciDev,
2012 list->buffer[0].address,
2013 max(skb->len,
2014 (unsigned int)TLAN_MIN_FRAME_SIZE),
2015 PCI_DMA_TODEVICE);
2016 dev_kfree_skb_any( skb );
2017 list->buffer[8].address = 0;
2018 list->buffer[9].address = 0;
1da177e4 2019 }
5eeabf51 2020 }
1da177e4 2021
5eeabf51
SA		 2022 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2023 list = priv->rxList + i;
2024 skb = TLan_GetSKB(list);
2025 if ( skb ) {
2026 pci_unmap_single(priv->pciDev,
2027 list->buffer[0].address,
2028 TLAN_MAX_FRAME_SIZE,
2029 PCI_DMA_FROMDEVICE);
2030 dev_kfree_skb_any( skb );
2031 list->buffer[8].address = 0;
2032 list->buffer[9].address = 0;
1da177e4
LT		 2033 }
2034 }
2035} /* TLan_FreeLists */
2036
2037
2038
2039
2040 /***************************************************************
2041 * TLan_PrintDio
6aa20a22 2042 *
1da177e4
LT		 2043 * Returns:
2044 * Nothing
2045 * Parms:
2046 * io_base Base IO port of the device of
2047 * which to print DIO registers.
2048 *
2049 * This function prints out all the internal (DIO)
2050 * registers of a TLAN chip.
2051 *
2052 **************************************************************/
2053
98e0f521 2054static void TLan_PrintDio( u16 io_base )
1da177e4
LT		 2055{
2056 u32 data0, data1;
2057 int i;
2058
dfc2c0a6
SH		 2059 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n",
2060 io_base );
1da177e4
LT		 2061 printk( "TLAN: Off. +0 +4\n" );
2062 for ( i = 0; i < 0x4C; i+= 8 ) {
2063 data0 = TLan_DioRead32( io_base, i );
2064 data1 = TLan_DioRead32( io_base, i + 0x4 );
2065 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2066 }
2067
2068} /* TLan_PrintDio */
2069
2070
2071
2072
2073 /***************************************************************
2074 * TLan_PrintList
6aa20a22 2075 *
1da177e4
LT		 2076 * Returns:
2077 * Nothing
2078 * Parms:
2079 * list A pointer to the TLanList structure to
2080 * be printed.
2081 * type A string to designate type of list,
2082 * "Rx" or "Tx".
2083 * num The index of the list.
2084 *
2085 * This function prints out the contents of the list
2086 * pointed to by the list parameter.
2087 *
2088 **************************************************************/
2089
98e0f521 2090static void TLan_PrintList( TLanList *list, char *type, int num)
1da177e4
LT		 2091{
2092 int i;
2093
93e16847 2094 printk( "TLAN: %s List %d at %p\n", type, num, list );
1da177e4
LT		 2095 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2096 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2097 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2098 /* for ( i = 0; i < 10; i++ ) { */
2099 for ( i = 0; i < 2; i++ ) {
dfc2c0a6
SH		 2100 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n",
2101 i, list->buffer[i].count, list->buffer[i].address );
1da177e4
LT		 2102 }
2103
2104} /* TLan_PrintList */
2105
2106
2107
2108
2109 /***************************************************************
2110 * TLan_ReadAndClearStats
2111 *
2112 * Returns:
2113 * Nothing
2114 * Parms:
2115 * dev Pointer to device structure of adapter
2116 * to which to read stats.
6aa20a22 2117 * record Flag indicating whether to add
1da177e4
LT		 2118 *
2119 * This functions reads all the internal status registers
2120 * of the TLAN chip, which clears them as a side effect.
2121 * It then either adds the values to the device's status
2122 * struct, or discards them, depending on whether record
2123 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2124 *
2125 **************************************************************/
2126
98e0f521 2127static void TLan_ReadAndClearStats( struct net_device *dev, int record )
1da177e4 2128{
1da177e4
LT		 2129 u32 tx_good, tx_under;
2130 u32 rx_good, rx_over;
2131 u32 def_tx, crc, code;
2132 u32 multi_col, single_col;
2133 u32 excess_col, late_col, loss;
2134
2135 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2136 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2137 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2138 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2139 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2140
2141 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2142 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2143 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2144 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2145 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2146
1da177e4
LT		 2147 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2148 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2149 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2150 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2151 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2152
1da177e4
LT		 2153 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2154 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2155 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2156 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2157 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2158
2159 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2160 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2161 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2162 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2163
2164 if ( record ) {
f8f31544
SH		 2165 dev->stats.rx_packets += rx_good;
2166 dev->stats.rx_errors += rx_over + crc + code;
2167 dev->stats.tx_packets += tx_good;
2168 dev->stats.tx_errors += tx_under + loss;
2169 dev->stats.collisions += multi_col + single_col + excess_col + late_col;
2170
2171 dev->stats.rx_over_errors += rx_over;
2172 dev->stats.rx_crc_errors += crc;
2173 dev->stats.rx_frame_errors += code;
2174
2175 dev->stats.tx_aborted_errors += tx_under;
2176 dev->stats.tx_carrier_errors += loss;
1da177e4 2177 }
6aa20a22 2178
1da177e4
LT		 2179} /* TLan_ReadAndClearStats */
2180
2181
2182
2183
2184 /***************************************************************
2185 * TLan_Reset
2186 *
2187 * Returns:
2188 * 0
2189 * Parms:
2190 * dev Pointer to device structure of adapter
2191 * to be reset.
2192 *
2193 * This function resets the adapter and it's physical
2194 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2195 * Programmer's Guide" for details. The routine tries to
2196 * implement what is detailed there, though adjustments
2197 * have been made.
2198 *
2199 **************************************************************/
2200
98e0f521 2201static void
1da177e4
LT		 2202TLan_ResetAdapter( struct net_device *dev )
2203{
2204 TLanPrivateInfo *priv = netdev_priv(dev);
2205 int i;
2206 u32 addr;
2207 u32 data;
2208 u8 data8;
2209
2210 priv->tlanFullDuplex = FALSE;
2211 priv->phyOnline=0;
2212 netif_carrier_off(dev);
2213
2214/* 1. Assert reset bit. */
2215
2216 data = inl(dev->base_addr + TLAN_HOST_CMD);
2217 data |= TLAN_HC_AD_RST;
2218 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2219
1da177e4
LT		 2220 udelay(1000);
2221
2222/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2223
2224 data = inl(dev->base_addr + TLAN_HOST_CMD);
2225 data |= TLAN_HC_INT_OFF;
2226 outl(data, dev->base_addr + TLAN_HOST_CMD);
2227
2228/* 3. Clear AREGs and HASHs. */
2229
2230 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2231 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2232 }
2233
2234/* 4. Setup NetConfig register. */
2235
2236 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2237 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2238
2239/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2240
2241 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2242 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2243
2244/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2245
2246 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2247 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2248 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2249
2250/* 7. Setup the remaining registers. */
2251
2252 if ( priv->tlanRev >= 0x30 ) {
2253 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2254 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2255 }
2256 TLan_PhyDetect( dev );
2257 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2258
1da177e4
LT		 2259 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2260 data |= TLAN_NET_CFG_BIT;
2261 if ( priv->aui == 1 ) {
2262 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2263 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2264 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2265 priv->tlanFullDuplex = TRUE;
2266 } else {
2267 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2268 }
2269 }
2270
2271 if ( priv->phyNum == 0 ) {
2272 data |= TLAN_NET_CFG_PHY_EN;
2273 }
2274 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2275
2276 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2277 TLan_FinishReset( dev );
2278 } else {
2279 TLan_PhyPowerDown( dev );
2280 }
2281
2282} /* TLan_ResetAdapter */
2283
2284
2285
2286
98e0f521 2287static void
1da177e4
LT		 2288TLan_FinishReset( struct net_device *dev )
2289{
2290 TLanPrivateInfo *priv = netdev_priv(dev);
2291 u8 data;
2292 u32 phy;
2293 u8 sio;
2294 u16 status;
2295 u16 partner;
2296 u16 tlphy_ctl;
2297 u16 tlphy_par;
2298 u16 tlphy_id1, tlphy_id2;
2299 int i;
2300
2301 phy = priv->phy[priv->phyNum];
2302
2303 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2304 if ( priv->tlanFullDuplex ) {
2305 data |= TLAN_NET_CMD_DUPLEX;
2306 }
2307 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2308 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2309 if ( priv->phyNum == 0 ) {
6aa20a22 2310 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT		 2311 }
2312 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2313 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2314 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2315 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2316
dfc2c0a6
SH		 2317 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) ||
2318 ( priv->aui ) ) {
1da177e4
LT		 2319 status = MII_GS_LINK;
2320 printk( "TLAN: %s: Link forced.\n", dev->name );
2321 } else {
2322 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2323 udelay( 1000 );
2324 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
dfc2c0a6
SH		 2325 if ( (status & MII_GS_LINK) &&
2326 /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT		 2327 (tlphy_id1 == NAT_SEM_ID1) &&
2328 (tlphy_id2 == NAT_SEM_ID2) ) {
2329 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2330 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2331
1da177e4
LT		 2332 printk( "TLAN: %s: Link active with ", dev->name );
2333 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2334 printk( "forced 10%sMbps %s-Duplex\n",
dfc2c0a6
SH		 2335 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2336 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
1da177e4
LT		 2337 } else {
2338 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
dfc2c0a6
SH		 2339 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2340 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
1da177e4
LT		 2341 printk("TLAN: Partner capability: ");
2342 for (i = 5; i <= 10; i++)
2343 if (partner & (1<<i))
2344 printk("%s",media[i-5]);
2345 printk("\n");
2346 }
2347
2348 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2349#ifdef MONITOR
1da177e4
LT		 2350 /* We have link beat..for now anyway */
2351 priv->link = 1;
2352 /*Enabling link beat monitoring */
2353 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2354#endif
1da177e4
LT		 2355 } else if (status & MII_GS_LINK) {
2356 printk( "TLAN: %s: Link active\n", dev->name );
2357 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2358 }
2359 }
2360
2361 if ( priv->phyNum == 0 ) {
2362 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2363 tlphy_ctl |= TLAN_TC_INTEN;
2364 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2365 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2366 sio |= TLAN_NET_SIO_MINTEN;
2367 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2368 }
2369
2370 if ( status & MII_GS_LINK ) {
2371 TLan_SetMac( dev, 0, dev->dev_addr );
2372 priv->phyOnline = 1;
2373 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2374 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2375 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2376 }
2377 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2378 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2379 netif_carrier_on(dev);
2380 } else {
dfc2c0a6
SH		 2381 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n",
2382 dev->name );
1da177e4
LT		 2383 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2384 return;
2385 }
562faf46 2386 TLan_SetMulticastList(dev);
1da177e4
LT		 2387
2388} /* TLan_FinishReset */
2389
2390
2391
2392
2393 /***************************************************************
2394 * TLan_SetMac
2395 *
2396 * Returns:
2397 * Nothing
2398 * Parms:
2399 * dev Pointer to device structure of adapter
2400 * on which to change the AREG.
2401 * areg The AREG to set the address in (0 - 3).
2402 * mac A pointer to an array of chars. Each
2403 * element stores one byte of the address.
2404 * IE, it isn't in ascii.
2405 *
2406 * This function transfers a MAC address to one of the
2407 * TLAN AREGs (address registers). The TLAN chip locks
2408 * the register on writing to offset 0 and unlocks the
2409 * register after writing to offset 5. If NULL is passed
2410 * in mac, then the AREG is filled with 0's.
2411 *
2412 **************************************************************/
2413
98e0f521 2414static void TLan_SetMac( struct net_device *dev, int areg, char *mac )
1da177e4
LT		 2415{
2416 int i;
6aa20a22 2417
1da177e4
LT		 2418 areg *= 6;
2419
2420 if ( mac != NULL ) {
2421 for ( i = 0; i < 6; i++ )
dfc2c0a6
SH		 2422 TLan_DioWrite8( dev->base_addr,
2423 TLAN_AREG_0 + areg + i, mac[i] );
1da177e4
LT		 2424 } else {
2425 for ( i = 0; i < 6; i++ )
dfc2c0a6
SH		 2426 TLan_DioWrite8( dev->base_addr,
2427 TLAN_AREG_0 + areg + i, 0 );
1da177e4
LT		 2428 }
2429
2430} /* TLan_SetMac */
2431
2432
2433
2434
2435/*****************************************************************************
2436******************************************************************************
2437
2438 ThunderLAN Driver PHY Layer Routines
2439
2440******************************************************************************
2441*****************************************************************************/
2442
2443
2444
2445 /*********************************************************************
2446 * TLan_PhyPrint
2447 *
2448 * Returns:
2449 * Nothing
2450 * Parms:
2451 * dev A pointer to the device structure of the
2452 * TLAN device having the PHYs to be detailed.
6aa20a22 2453 *
1da177e4
LT		 2454 * This function prints the registers a PHY (aka transceiver).
2455 *
2456 ********************************************************************/
2457
98e0f521 2458static void TLan_PhyPrint( struct net_device *dev )
1da177e4
LT		 2459{
2460 TLanPrivateInfo *priv = netdev_priv(dev);
2461 u16 i, data0, data1, data2, data3, phy;
2462
2463 phy = priv->phy[priv->phyNum];
2464
2465 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2466 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2467 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2468 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2469 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2470 for ( i = 0; i < 0x20; i+= 4 ) {
2471 printk( "TLAN: 0x%02x", i );
2472 TLan_MiiReadReg( dev, phy, i, &data0 );
2473 printk( " 0x%04hx", data0 );
2474 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2475 printk( " 0x%04hx", data1 );
2476 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2477 printk( " 0x%04hx", data2 );
2478 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2479 printk( " 0x%04hx\n", data3 );
2480 }
2481 } else {
2482 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2483 }
2484
2485} /* TLan_PhyPrint */
2486
2487
2488
2489
2490 /*********************************************************************
2491 * TLan_PhyDetect
2492 *
2493 * Returns:
2494 * Nothing
2495 * Parms:
2496 * dev A pointer to the device structure of the adapter
2497 * for which the PHY needs determined.
2498 *
2499 * So far I've found that adapters which have external PHYs
2500 * may also use the internal PHY for part of the functionality.
2501 * (eg, AUI/Thinnet). This function finds out if this TLAN
2502 * chip has an internal PHY, and then finds the first external
2503 * PHY (starting from address 0) if it exists).
2504 *
2505 ********************************************************************/
2506
98e0f521 2507static void TLan_PhyDetect( struct net_device *dev )
1da177e4
LT		 2508{
2509 TLanPrivateInfo *priv = netdev_priv(dev);
2510 u16 control;
2511 u16 hi;
2512 u16 lo;
2513 u32 phy;
2514
2515 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2516 priv->phyNum = 0xFFFF;
2517 return;
2518 }
2519
2520 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2521
1da177e4
LT		 2522 if ( hi != 0xFFFF ) {
2523 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2524 } else {
2525 priv->phy[0] = TLAN_PHY_NONE;
2526 }
2527
2528 priv->phy[1] = TLAN_PHY_NONE;
2529 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2530 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2531 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2532 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
dfc2c0a6
SH		 2533 if ( ( control != 0xFFFF ) ||
2534 ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2535 TLAN_DBG( TLAN_DEBUG_GNRL,
2536 "PHY found at %02x %04x %04x %04x\n",
2537 phy, control, hi, lo );
2538 if ( ( priv->phy[1] == TLAN_PHY_NONE ) &&
2539 ( phy != TLAN_PHY_MAX_ADDR ) ) {
1da177e4
LT		 2540 priv->phy[1] = phy;
2541 }
2542 }
2543 }
2544
2545 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2546 priv->phyNum = 1;
2547 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2548 priv->phyNum = 0;
2549 } else {
2550 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2551 }
2552
2553} /* TLan_PhyDetect */
2554
2555
2556
2557
98e0f521 2558static void TLan_PhyPowerDown( struct net_device *dev )
1da177e4
LT		 2559{
2560 TLanPrivateInfo *priv = netdev_priv(dev);
2561 u16 value;
2562
2563 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2564 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2565 TLan_MiiSync( dev->base_addr );
2566 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
dfc2c0a6
SH		 2567 if ( ( priv->phyNum == 0 ) &&
2568 ( priv->phy[1] != TLAN_PHY_NONE ) &&
2569 ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
1da177e4
LT		 2570 TLan_MiiSync( dev->base_addr );
2571 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2572 }
2573
2574 /* Wait for 50 ms and powerup
2575 * This is abitrary. It is intended to make sure the
2576 * transceiver settles.
2577 */
2578 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2579
2580} /* TLan_PhyPowerDown */
2581
2582
2583
2584
98e0f521 2585static void TLan_PhyPowerUp( struct net_device *dev )
1da177e4
LT		 2586{
2587 TLanPrivateInfo *priv = netdev_priv(dev);
2588 u16 value;
2589
2590 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2591 TLan_MiiSync( dev->base_addr );
2592 value = MII_GC_LOOPBK;
2593 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2594 TLan_MiiSync(dev->base_addr);
2595 /* Wait for 500 ms and reset the
2596 * transceiver. The TLAN docs say both 50 ms and
2597 * 500 ms, so do the longer, just in case.
2598 */
2599 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2600
2601} /* TLan_PhyPowerUp */
2602
2603
2604
2605
98e0f521 2606static void TLan_PhyReset( struct net_device *dev )
1da177e4
LT		 2607{
2608 TLanPrivateInfo *priv = netdev_priv(dev);
2609 u16 phy;
2610 u16 value;
2611
2612 phy = priv->phy[priv->phyNum];
2613
2614 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2615 TLan_MiiSync( dev->base_addr );
2616 value = MII_GC_LOOPBK | MII_GC_RESET;
2617 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2618 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2619 while ( value & MII_GC_RESET ) {
2620 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2621 }
2622
2623 /* Wait for 500 ms and initialize.
2624 * I don't remember why I wait this long.
2625 * I've changed this to 50ms, as it seems long enough.
2626 */
2627 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2628
2629} /* TLan_PhyReset */
2630
2631
2632
2633
98e0f521 2634static void TLan_PhyStartLink( struct net_device *dev )
1da177e4
LT		 2635{
2636 TLanPrivateInfo *priv = netdev_priv(dev);
2637 u16 ability;
2638 u16 control;
2639 u16 data;
2640 u16 phy;
2641 u16 status;
2642 u16 tctl;
2643
2644 phy = priv->phy[priv->phyNum];
2645 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2646 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2647 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2648
6aa20a22 2649 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT		 2650 ( ! priv->aui ) ) {
2651 ability = status >> 11;
6aa20a22 2652 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT		 2653 priv->duplex == TLAN_DUPLEX_HALF) {
2654 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2655 } else if ( priv->speed == TLAN_SPEED_10 &&
2656 priv->duplex == TLAN_DUPLEX_FULL) {
2657 priv->tlanFullDuplex = TRUE;
2658 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2659 } else if ( priv->speed == TLAN_SPEED_100 &&
2660 priv->duplex == TLAN_DUPLEX_HALF) {
2661 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2662 } else if ( priv->speed == TLAN_SPEED_100 &&
2663 priv->duplex == TLAN_DUPLEX_FULL) {
2664 priv->tlanFullDuplex = TRUE;
2665 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2666 } else {
6aa20a22 2667
1da177e4
LT		 2668 /* Set Auto-Neg advertisement */
2669 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2670 /* Enablee Auto-Neg */
2671 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2672 /* Restart Auto-Neg */
2673 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2674 /* Wait for 4 sec for autonegotiation
2675 * to complete. The max spec time is less than this
2676 * but the card need additional time to start AN.
2677 * .5 sec should be plenty extra.
2678 */
2679 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2680 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2681 return;
2682 }
6aa20a22
JG		 2683
2684 }
2685
1da177e4
LT		 2686 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2687 priv->phyNum = 0;
2688 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2689 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2690 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2691 return;
2692 } else if ( priv->phyNum == 0 ) {
2693 control = 0;
2694 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2695 if ( priv->aui ) {
2696 tctl |= TLAN_TC_AUISEL;
6aa20a22 2697 } else {
1da177e4
LT		 2698 tctl &= ~TLAN_TC_AUISEL;
2699 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2700 control |= MII_GC_DUPLEX;
2701 priv->tlanFullDuplex = TRUE;
2702 }
2703 if ( priv->speed == TLAN_SPEED_100 ) {
2704 control |= MII_GC_SPEEDSEL;
2705 }
2706 }
2707 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2708 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2709 }
2710
2711 /* Wait for 2 sec to give the transceiver time
2712 * to establish link.
2713 */
2714 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2715
2716} /* TLan_PhyStartLink */
2717
2718
2719
2720
98e0f521 2721static void TLan_PhyFinishAutoNeg( struct net_device *dev )
1da177e4
LT		 2722{
2723 TLanPrivateInfo *priv = netdev_priv(dev);
2724 u16 an_adv;
2725 u16 an_lpa;
2726 u16 data;
2727 u16 mode;
2728 u16 phy;
2729 u16 status;
6aa20a22 2730
1da177e4
LT		 2731 phy = priv->phy[priv->phyNum];
2732
2733 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2734 udelay( 1000 );
2735 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2736
2737 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2738 /* Wait for 8 sec to give the process
2739 * more time. Perhaps we should fail after a while.
2740 */
2741 if (!priv->neg_be_verbose++) {
dfc2c0a6
SH		 2742 pr_info("TLAN: Giving autonegotiation more time.\n");
2743 pr_info("TLAN: Please check that your adapter has\n");
2744 pr_info("TLAN: been properly connected to a HUB or Switch.\n");
2745 pr_info("TLAN: Trying to establish link in the background...\n");
1da177e4
LT		 2746 }
2747 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2748 return;
2749 }
2750
2751 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2752 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2753 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2754 mode = an_adv & an_lpa & 0x03E0;
2755 if ( mode & 0x0100 ) {
2756 priv->tlanFullDuplex = TRUE;
2757 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2758 priv->tlanFullDuplex = TRUE;
2759 }
2760
dfc2c0a6
SH		 2761 if ( ( ! ( mode & 0x0180 ) ) &&
2762 ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) &&
2763 ( priv->phyNum != 0 ) ) {
1da177e4
LT		 2764 priv->phyNum = 0;
2765 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2766 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2767 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2768 return;
2769 }
2770
2771 if ( priv->phyNum == 0 ) {
dfc2c0a6
SH		 2772 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) ||
2773 ( an_adv & an_lpa & 0x0040 ) ) {
2774 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL,
2775 MII_GC_AUTOENB | MII_GC_DUPLEX );
2776 pr_info("TLAN: Starting internal PHY with FULL-DUPLEX\n" );
1da177e4
LT		 2777 } else {
2778 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
dfc2c0a6 2779 pr_info( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
1da177e4
LT		 2780 }
2781 }
2782
2783 /* Wait for 100 ms. No reason in partiticular.
2784 */
2785 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2786
1da177e4
LT		 2787} /* TLan_PhyFinishAutoNeg */
2788
2789#ifdef MONITOR
2790
2791 /*********************************************************************
2792 *
2793 * TLan_phyMonitor
2794 *
6aa20a22 2795 * Returns:
1da177e4
LT		 2796 * None
2797 *
2798 * Params:
2799 * dev The device structure of this device.
2800 *
6aa20a22 2801 *
1da177e4
LT		 2802 * This function monitors PHY condition by reading the status
2803 * register via the MII bus. This can be used to give info
2804 * about link changes (up/down), and possible switch to alternate
2805 * media.
2806 *
2807 * ******************************************************************/
2808
2809void TLan_PhyMonitor( struct net_device *dev )
2810{
2811 TLanPrivateInfo *priv = netdev_priv(dev);
2812 u16 phy;
2813 u16 phy_status;
2814
2815 phy = priv->phy[priv->phyNum];
2816
2817 /* Get PHY status register */
2818 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2819
2820 /* Check if link has been lost */
6aa20a22 2821 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT		 2822 if (priv->link) {
2823 priv->link = 0;
2824 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2825 netif_carrier_off(dev);
1da177e4
LT		 2826 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2827 return;
2828 }
2829 }
2830
2831 /* Link restablished? */
2832 if ((phy_status & MII_GS_LINK) && !priv->link) {
2833 priv->link = 1;
2834 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2835 netif_carrier_on(dev);
1da177e4
LT		 2836 }
2837
2838 /* Setup a new monitor */
2839 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2840}
1da177e4
LT		 2841
2842#endif /* MONITOR */
2843
2844
2845/*****************************************************************************
2846******************************************************************************
2847
2848 ThunderLAN Driver MII Routines
2849
2850 These routines are based on the information in Chap. 2 of the
2851 "ThunderLAN Programmer's Guide", pp. 15-24.
2852
2853******************************************************************************
2854*****************************************************************************/
2855
2856
2857 /***************************************************************
2858 * TLan_MiiReadReg
2859 *
2860 * Returns:
2861 * 0 if ack received ok
2862 * 1 otherwise.
2863 *
2864 * Parms:
2865 * dev The device structure containing
2866 * The io address and interrupt count
2867 * for this device.
2868 * phy The address of the PHY to be queried.
2869 * reg The register whose contents are to be
4a4efbde 2870 * retrieved.
1da177e4
LT		 2871 * val A pointer to a variable to store the
2872 * retrieved value.
2873 *
4a4efbde 2874 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT		 2875 * of a given register on a PHY. It sends the appropriate info
2876 * and then reads the 16-bit register value from the MII bus via
2877 * the TLAN SIO register.
2878 *
2879 **************************************************************/
2880
98e0f521 2881static int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
1da177e4
LT		 2882{
2883 u8 nack;
2884 u16 sio, tmp;
2885 u32 i;
2886 int err;
2887 int minten;
2888 TLanPrivateInfo *priv = netdev_priv(dev);
2889 unsigned long flags = 0;
2890
2891 err = FALSE;
2892 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2893 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2894
1da177e4
LT		 2895 if (!in_irq())
2896 spin_lock_irqsave(&priv->lock, flags);
2897
2898 TLan_MiiSync(dev->base_addr);
2899
2900 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2901 if ( minten )
2902 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2903
2904 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2905 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2906 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2907 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2908
2909
2910 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2911
2912 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2913 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2914 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2915
2916 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2917 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2918 if (nack) { /* No ACK, so fake it */
2919 for (i = 0; i < 16; i++) {
2920 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2921 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2922 }
2923 tmp = 0xffff;
2924 err = TRUE;
2925 } else { /* ACK, so read data */
2926 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2927 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2928 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2929 tmp |= i;
2930 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2931 }
2932 }
2933
2934
2935 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2936 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2937
2938 if ( minten )
2939 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2940
2941 *val = tmp;
6aa20a22 2942
1da177e4
LT		 2943 if (!in_irq())
2944 spin_unlock_irqrestore(&priv->lock, flags);
2945
2946 return err;
2947
2948} /* TLan_MiiReadReg */
2949
2950
2951
2952
2953 /***************************************************************
2954 * TLan_MiiSendData
2955 *
2956 * Returns:
2957 * Nothing
2958 * Parms:
2959 * base_port The base IO port of the adapter in
2960 * question.
2961 * dev The address of the PHY to be queried.
2962 * data The value to be placed on the MII bus.
2963 * num_bits The number of bits in data that are to
2964 * be placed on the MII bus.
2965 *
2966 * This function sends on sequence of bits on the MII
2967 * configuration bus.
2968 *
2969 **************************************************************/
2970
98e0f521 2971static void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
1da177e4
LT		 2972{
2973 u16 sio;
2974 u32 i;
2975
2976 if ( num_bits == 0 )
2977 return;
2978
2979 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2980 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2981 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2982
2983 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2984 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2985 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2986 if ( data & i )
2987 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
2988 else
2989 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
2990 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2991 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2992 }
2993
2994} /* TLan_MiiSendData */
2995
2996
2997
2998
2999 /***************************************************************
3000 * TLan_MiiSync
3001 *
3002 * Returns:
3003 * Nothing
3004 * Parms:
3005 * base_port The base IO port of the adapter in
3006 * question.
3007 *
3008 * This functions syncs all PHYs in terms of the MII configuration
3009 * bus.
3010 *
3011 **************************************************************/
3012
98e0f521 3013static void TLan_MiiSync( u16 base_port )
1da177e4
LT		 3014{
3015 int i;
3016 u16 sio;
3017
3018 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3019 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3020
3021 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3022 for ( i = 0; i < 32; i++ ) {
3023 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3024 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3025 }
3026
3027} /* TLan_MiiSync */
3028
3029
3030
3031
3032 /***************************************************************
3033 * TLan_MiiWriteReg
3034 *
3035 * Returns:
3036 * Nothing
3037 * Parms:
3038 * dev The device structure for the device
3039 * to write to.
3040 * phy The address of the PHY to be written to.
3041 * reg The register whose contents are to be
3042 * written.
3043 * val The value to be written to the register.
3044 *
3045 * This function uses the TLAN's MII bus to write the contents of a
3046 * given register on a PHY. It sends the appropriate info and then
3047 * writes the 16-bit register value from the MII configuration bus
3048 * via the TLAN SIO register.
3049 *
3050 **************************************************************/
3051
98e0f521 3052static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
1da177e4
LT		 3053{
3054 u16 sio;
3055 int minten;
3056 unsigned long flags = 0;
3057 TLanPrivateInfo *priv = netdev_priv(dev);
3058
3059 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3060 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3061
1da177e4
LT		 3062 if (!in_irq())
3063 spin_lock_irqsave(&priv->lock, flags);
3064
3065 TLan_MiiSync( dev->base_addr );
3066
3067 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3068 if ( minten )
3069 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3070
3071 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3072 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3073 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3074 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3075
3076 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3077 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3078
3079 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3080 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3081
3082 if ( minten )
3083 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3084
1da177e4
LT		 3085 if (!in_irq())
3086 spin_unlock_irqrestore(&priv->lock, flags);
3087
3088} /* TLan_MiiWriteReg */
3089
3090
3091
3092
3093/*****************************************************************************
3094******************************************************************************
3095
3096 ThunderLAN Driver Eeprom routines
3097
3098 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3099 EEPROM. These functions are based on information in Microchip's
3100 data sheet. I don't know how well this functions will work with
3101 other EEPROMs.
3102
3103******************************************************************************
3104*****************************************************************************/
3105
3106
3107 /***************************************************************
3108 * TLan_EeSendStart
3109 *
3110 * Returns:
3111 * Nothing
6aa20a22 3112 * Parms:
1da177e4
LT		 3113 * io_base The IO port base address for the
3114 * TLAN device with the EEPROM to
3115 * use.
3116 *
3117 * This function sends a start cycle to an EEPROM attached
3118 * to a TLAN chip.
3119 *
3120 **************************************************************/
3121
98e0f521 3122static void TLan_EeSendStart( u16 io_base )
1da177e4
LT		 3123{
3124 u16 sio;
3125
3126 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3127 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3128
3129 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3130 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3131 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3132 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3133 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3134
3135} /* TLan_EeSendStart */
3136
3137
3138
3139
3140 /***************************************************************
3141 * TLan_EeSendByte
3142 *
3143 * Returns:
3144 * If the correct ack was received, 0, otherwise 1
3145 * Parms: io_base The IO port base address for the
3146 * TLAN device with the EEPROM to
3147 * use.
3148 * data The 8 bits of information to
3149 * send to the EEPROM.
3150 * stop If TLAN_EEPROM_STOP is passed, a
3151 * stop cycle is sent after the
3152 * byte is sent after the ack is
3153 * read.
3154 *
3155 * This function sends a byte on the serial EEPROM line,
3156 * driving the clock to send each bit. The function then
3157 * reverses transmission direction and reads an acknowledge
3158 * bit.
3159 *
3160 **************************************************************/
3161
98e0f521 3162static int TLan_EeSendByte( u16 io_base, u8 data, int stop )
1da177e4
LT		 3163{
3164 int err;
3165 u8 place;
3166 u16 sio;
3167
3168 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3169 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3170
3171 /* Assume clock is low, tx is enabled; */
3172 for ( place = 0x80; place != 0; place >>= 1 ) {
3173 if ( place & data )
3174 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3175 else
3176 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3177 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3178 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3179 }
3180 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3181 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3182 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3183 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3184 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3185
3186 if ( ( ! err ) && stop ) {
dfc2c0a6
SH		 3187 /* STOP, raise data while clock is high */
3188 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
1da177e4
LT		 3189 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3190 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3191 }
3192
3193 return ( err );
3194
3195} /* TLan_EeSendByte */
3196
3197
3198
3199
3200 /***************************************************************
3201 * TLan_EeReceiveByte
3202 *
3203 * Returns:
3204 * Nothing
3205 * Parms:
3206 * io_base The IO port base address for the
3207 * TLAN device with the EEPROM to
3208 * use.
3209 * data An address to a char to hold the
3210 * data sent from the EEPROM.
3211 * stop If TLAN_EEPROM_STOP is passed, a
3212 * stop cycle is sent after the
3213 * byte is received, and no ack is
3214 * sent.
3215 *
3216 * This function receives 8 bits of data from the EEPROM
3217 * over the serial link. It then sends and ack bit, or no
3218 * ack and a stop bit. This function is used to retrieve
3219 * data after the address of a byte in the EEPROM has been
3220 * sent.
3221 *
3222 **************************************************************/
3223
98e0f521 3224static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
1da177e4
LT		 3225{
3226 u8 place;
3227 u16 sio;
3228
3229 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3230 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3231 *data = 0;
3232
3233 /* Assume clock is low, tx is enabled; */
3234 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3235 for ( place = 0x80; place; place >>= 1 ) {
3236 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3237 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3238 *data |= place;
3239 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3240 }
3241
3242 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3243 if ( ! stop ) {
3244 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3245 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3246 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3247 } else {
3248 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3249 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3250 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
dfc2c0a6
SH		 3251 /* STOP, raise data while clock is high */
3252 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
1da177e4
LT		 3253 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3254 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3255 }
3256
3257} /* TLan_EeReceiveByte */
3258
3259
3260
3261
3262 /***************************************************************
3263 * TLan_EeReadByte
3264 *
3265 * Returns:
3266 * No error = 0, else, the stage at which the error
3267 * occurred.
3268 * Parms:
3269 * io_base The IO port base address for the
3270 * TLAN device with the EEPROM to
3271 * use.
3272 * ee_addr The address of the byte in the
3273 * EEPROM whose contents are to be
3274 * retrieved.
3275 * data An address to a char to hold the
3276 * data obtained from the EEPROM.
3277 *
3278 * This function reads a byte of information from an byte
3279 * cell in the EEPROM.
3280 *
3281 **************************************************************/
3282
98e0f521 3283static int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
1da177e4
LT		 3284{
3285 int err;
3286 TLanPrivateInfo *priv = netdev_priv(dev);
3287 unsigned long flags = 0;
3288 int ret=0;
3289
3290 spin_lock_irqsave(&priv->lock, flags);
3291
3292 TLan_EeSendStart( dev->base_addr );
3293 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3294 if (err)
3295 {
3296 ret=1;
3297 goto fail;
3298 }
3299 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3300 if (err)
3301 {
3302 ret=2;
3303 goto fail;
3304 }
3305 TLan_EeSendStart( dev->base_addr );
3306 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3307 if (err)
3308 {
3309 ret=3;
3310 goto fail;
3311 }
3312 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3313fail:
3314 spin_unlock_irqrestore(&priv->lock, flags);
3315
3316 return ret;
3317
3318} /* TLan_EeReadByte */
3319
3320
3321
Linux kernel - Deliverables
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