tlan: get rid of padding buffer
[deliverable/linux.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading:
19 *
20 * Texas Instruments, ThunderLAN Programmer's Guide,
21 * TI Literature Number SPWU013A
22 * available in PDF format from www.ti.com
23 * Level One, LXT901 and LXT970 Data Sheets
24 * available in PDF format from www.level1.com
25 * National Semiconductor, DP83840A Data Sheet
26 * available in PDF format from www.national.com
27 * Microchip Technology, 24C01A/02A/04A Data Sheet
28 * available in PDF format from www.microchip.com
29 *
30 * Change History
31 *
32 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
33 * new PCI BIOS interface.
34 * Alan Cox <alan@redhat.com>: Fixed the out of memory
35 * handling.
6aa20a22 36 *
1da177e4
LT
37 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
38 *
39 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 40 * Patch from Tigran Aivazian.
1da177e4
LT
41 * - v1.1 includes Alan's SMP updates.
42 * - We still have problems on SMP though,
6aa20a22
JG
43 * but I'm looking into that.
44 *
1da177e4
LT
45 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
46 * - Removed dependency of HZ being 100.
6aa20a22 47 * - We now allow higher priority timers to
1da177e4
LT
48 * overwrite timers like TLAN_TIMER_ACTIVITY
49 * Patch from John Cagle <john.cagle@compaq.com>.
50 * - Fixed a few compiler warnings.
51 *
52 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 53 * - Removed call to pci_present().
1da177e4 54 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 55 * - Added __init and __initdata to reduce resisdent
1da177e4
LT
56 * code size.
57 * - Driver now uses module_init/module_exit.
58 * - Rewrote init_module and tlan_probe to
59 * share a lot more code. We now use tlan_probe
60 * with builtin and module driver.
6aa20a22
JG
61 * - Driver ported to new net API.
62 * - tlan.txt has been reworked to reflect current
1da177e4
LT
63 * driver (almost)
64 * - Other minor stuff
65 *
66 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
67 * network cleanup in 2.3.43pre7 (Tigran & myself)
68 * - Minor stuff.
69 *
70 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
71 * if no cable/link were present.
72 * - Cosmetic changes.
73 * - TODO: Port completely to new PCI/DMA API
74 * Auto-Neg fallback.
75 *
76 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 77 * tested it though, as the kernel support is currently
1da177e4
LT
78 * broken (2.3.99p4p3).
79 * - Updated tlan.txt accordingly.
80 * - Adjusted minimum/maximum frame length.
6aa20a22 81 * - There is now a TLAN website up at
1da177e4
LT
82 * http://tlan.kernel.dk
83 *
84 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
85 * reports PHY information when used with Donald
86 * Beckers userspace MII diagnostics utility.
87 *
88 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
89 * - Added link information to Auto-Neg and forced
90 * modes. When NIC operates with auto-neg the driver
91 * will report Link speed & duplex modes as well as
92 * link partner abilities. When forced link is used,
93 * the driver will report status of the established
94 * link.
6aa20a22
JG
95 * Please read tlan.txt for additional information.
96 * - Removed call to check_region(), and used
1da177e4 97 * return value of request_region() instead.
6aa20a22 98 *
1da177e4
LT
99 * v1.8a May 28, 2000 - Minor updates.
100 *
101 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
102 * - Updated with timer fixes from Andrew Morton.
103 * - Fixed module race in TLan_Open.
104 * - Added routine to monitor PHY status.
105 * - Added activity led support for Proliant devices.
106 *
6aa20a22
JG
107 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
108 * like the Compaq NetFlex3/E.
1da177e4
LT
109 * - Rewrote tlan_probe to better handle multiple
110 * bus probes. Probing and device setup is now
111 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 112 * hardware probe is done with kernel API and
1da177e4
LT
113 * TLan_EisaProbe.
114 * - Adjusted debug information for probing.
6aa20a22
JG
115 * - Fixed bug that would cause general debug information
116 * to be printed after driver removal.
1da177e4 117 * - Added transmit timeout handling.
6aa20a22
JG
118 * - Fixed OOM return values in tlan_probe.
119 * - Fixed possible mem leak in tlan_exit
1da177e4
LT
120 * (now tlan_remove_one).
121 * - Fixed timer bug in TLan_phyMonitor.
122 * - This driver version is alpha quality, please
123 * send me any bug issues you may encounter.
124 *
6aa20a22 125 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT
126 * set for EISA cards.
127 * - Added support for NetFlex3/E with nibble-rate
128 * 10Base-T PHY. This is untestet as I haven't got
129 * one of these cards.
130 * - Fixed timer being added twice.
131 * - Disabled PhyMonitoring by default as this is
132 * work in progress. Define MONITOR to enable it.
133 * - Now we don't display link info with PHYs that
134 * doesn't support it (level1).
135 * - Incresed tx_timeout beacuse of auto-neg.
136 * - Adjusted timers for forced speeds.
137 *
138 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
139 *
140 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
141 * when link can't be established.
142 * - Added the bbuf option as a kernel parameter.
143 * - Fixed ioaddr probe bug.
144 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 145 * - Added support for speed/duplex selection with
1da177e4
LT
146 * multiple nics.
147 * - Added partly fix for TX Channel lockup with
148 * TLAN v1.0 silicon. This needs to be investigated
149 * further.
150 *
151 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
152 * interrupt. Thanks goes to
153 * Adam Keys <adam@ti.com>
154 * Denis Beaudoin <dbeaudoin@ti.com>
155 * for providing the patch.
156 * - Fixed auto-neg output when using multiple
157 * adapters.
158 * - Converted to use new taskq interface.
159 *
160 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
161 *
162 * Samuel Chessman <chessman@tux.org> New Maintainer!
163 *
164 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
165 * 10T half duplex no loopback
166 * Thanks to Gunnar Eikman
167 *******************************************************************************/
168
169#include <linux/module.h>
170#include <linux/init.h>
171#include <linux/ioport.h>
172#include <linux/eisa.h>
173#include <linux/pci.h>
1e7f0bd8 174#include <linux/dma-mapping.h>
1da177e4
LT
175#include <linux/netdevice.h>
176#include <linux/etherdevice.h>
177#include <linux/delay.h>
178#include <linux/spinlock.h>
179#include <linux/workqueue.h>
180#include <linux/mii.h>
181
182#include "tlan.h"
183
184typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
185
186
187/* For removing EISA devices */
188static struct net_device *TLan_Eisa_Devices;
189
190static int TLanDevicesInstalled;
191
192/* Set speed, duplex and aui settings */
193static int aui[MAX_TLAN_BOARDS];
194static int duplex[MAX_TLAN_BOARDS];
195static int speed[MAX_TLAN_BOARDS];
196static int boards_found;
15efa9bb
SH
197module_param_array(aui, int, NULL, 0);
198module_param_array(duplex, int, NULL, 0);
199module_param_array(speed, int, NULL, 0);
200MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
201MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
202MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT
203
204MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
205MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
206MODULE_LICENSE("GPL");
207
208
209/* Define this to enable Link beat monitoring */
210#undef MONITOR
211
212/* Turn on debugging. See Documentation/networking/tlan.txt for details */
213static int debug;
15efa9bb
SH
214module_param(debug, int, 0);
215MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4
LT
216
217static int bbuf;
15efa9bb
SH
218module_param(bbuf, int, 0);
219MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
220
1da177e4
LT
221static char TLanSignature[] = "TLAN";
222static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
223static int tlan_have_pci;
224static int tlan_have_eisa;
225
226static const char *media[] = {
6aa20a22 227 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT
228 "100baseTx-FD", "100baseT4", NULL
229};
230
231static struct board {
232 const char *deviceLabel;
233 u32 flags;
234 u16 addrOfs;
235} board_info[] = {
236 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
237 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
238 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
239 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
240 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
242 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
244 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
245 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
246 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
247 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
248 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
249 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
6aa20a22 250 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
252};
253
254static struct pci_device_id tlan_pci_tbl[] = {
255 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
256 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
271 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
277 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
281 { 0,}
282};
6aa20a22 283MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT
284
285static void TLan_EisaProbe( void );
286static void TLan_Eisa_Cleanup( void );
287static int TLan_Init( struct net_device * );
288static int TLan_Open( struct net_device *dev );
289static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 290static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT
291static int TLan_Close( struct net_device *);
292static struct net_device_stats *TLan_GetStats( struct net_device *);
293static void TLan_SetMulticastList( struct net_device *);
294static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
295static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent);
296static void TLan_tx_timeout( struct net_device *dev);
c4028958 297static void TLan_tx_timeout_work(struct work_struct *work);
1da177e4
LT
298static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
299
300static u32 TLan_HandleInvalid( struct net_device *, u16 );
301static u32 TLan_HandleTxEOF( struct net_device *, u16 );
302static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
303static u32 TLan_HandleRxEOF( struct net_device *, u16 );
304static u32 TLan_HandleDummy( struct net_device *, u16 );
305static u32 TLan_HandleTxEOC( struct net_device *, u16 );
306static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
307static u32 TLan_HandleRxEOC( struct net_device *, u16 );
308
309static void TLan_Timer( unsigned long );
310
311static void TLan_ResetLists( struct net_device * );
312static void TLan_FreeLists( struct net_device * );
313static void TLan_PrintDio( u16 );
314static void TLan_PrintList( TLanList *, char *, int );
315static void TLan_ReadAndClearStats( struct net_device *, int );
316static void TLan_ResetAdapter( struct net_device * );
317static void TLan_FinishReset( struct net_device * );
318static void TLan_SetMac( struct net_device *, int areg, char *mac );
319
320static void TLan_PhyPrint( struct net_device * );
321static void TLan_PhyDetect( struct net_device * );
322static void TLan_PhyPowerDown( struct net_device * );
323static void TLan_PhyPowerUp( struct net_device * );
324static void TLan_PhyReset( struct net_device * );
325static void TLan_PhyStartLink( struct net_device * );
326static void TLan_PhyFinishAutoNeg( struct net_device * );
327#ifdef MONITOR
328static void TLan_PhyMonitor( struct net_device * );
329#endif
330
331/*
332static int TLan_PhyNop( struct net_device * );
333static int TLan_PhyInternalCheck( struct net_device * );
334static int TLan_PhyInternalService( struct net_device * );
335static int TLan_PhyDp83840aCheck( struct net_device * );
336*/
337
338static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
339static void TLan_MiiSendData( u16, u32, unsigned );
340static void TLan_MiiSync( u16 );
341static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
342
343static void TLan_EeSendStart( u16 );
344static int TLan_EeSendByte( u16, u8, int );
345static void TLan_EeReceiveByte( u16, u8 *, int );
346static int TLan_EeReadByte( struct net_device *, u8, u8 * );
347
348
6aa20a22 349static void
1da177e4
LT
350TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
351{
352 unsigned long addr = (unsigned long)skb;
353 tag->buffer[9].address = (u32)addr;
354 addr >>= 31; /* >>= 32 is undefined for 32bit arch, stupid C */
355 addr >>= 1;
356 tag->buffer[8].address = (u32)addr;
357}
358
359static struct sk_buff *
360TLan_GetSKB( struct tlan_list_tag *tag)
361{
362 unsigned long addr = tag->buffer[8].address;
363 addr <<= 31;
364 addr <<= 1;
365 addr |= tag->buffer[9].address;
366 return (struct sk_buff *) addr;
367}
368
369
370static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
371 TLan_HandleInvalid,
372 TLan_HandleTxEOF,
373 TLan_HandleStatOverflow,
374 TLan_HandleRxEOF,
375 TLan_HandleDummy,
376 TLan_HandleTxEOC,
377 TLan_HandleStatusCheck,
378 TLan_HandleRxEOC
379};
380
381static inline void
382TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
383{
384 TLanPrivateInfo *priv = netdev_priv(dev);
385 unsigned long flags = 0;
6aa20a22 386
1da177e4
LT
387 if (!in_irq())
388 spin_lock_irqsave(&priv->lock, flags);
389 if ( priv->timer.function != NULL &&
6aa20a22 390 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT
391 if (!in_irq())
392 spin_unlock_irqrestore(&priv->lock, flags);
393 return;
394 }
395 priv->timer.function = &TLan_Timer;
396 if (!in_irq())
397 spin_unlock_irqrestore(&priv->lock, flags);
398
399 priv->timer.data = (unsigned long) dev;
400 priv->timerSetAt = jiffies;
401 priv->timerType = type;
402 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 403
1da177e4
LT
404} /* TLan_SetTimer */
405
406
407/*****************************************************************************
408******************************************************************************
409
410 ThunderLAN Driver Primary Functions
411
412 These functions are more or less common to all Linux network drivers.
413
414******************************************************************************
415*****************************************************************************/
416
417
418
419
420
421 /***************************************************************
422 * tlan_remove_one
423 *
424 * Returns:
425 * Nothing
426 * Parms:
427 * None
428 *
429 * Goes through the TLanDevices list and frees the device
430 * structs and memory associated with each device (lists
431 * and buffers). It also ureserves the IO port regions
432 * associated with this device.
433 *
434 **************************************************************/
435
436
437static void __devexit tlan_remove_one( struct pci_dev *pdev)
438{
439 struct net_device *dev = pci_get_drvdata( pdev );
440 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 441
1da177e4
LT
442 unregister_netdev( dev );
443
444 if ( priv->dmaStorage ) {
445 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
446 }
447
448#ifdef CONFIG_PCI
449 pci_release_regions(pdev);
450#endif
6aa20a22 451
1da177e4 452 free_netdev( dev );
6aa20a22 453
1da177e4 454 pci_set_drvdata( pdev, NULL );
6aa20a22 455}
1da177e4
LT
456
457static struct pci_driver tlan_driver = {
458 .name = "tlan",
459 .id_table = tlan_pci_tbl,
460 .probe = tlan_init_one,
6aa20a22 461 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT
462};
463
464static int __init tlan_probe(void)
465{
6c04a515 466 int rc = -ENODEV;
6aa20a22 467
1da177e4 468 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 469
1da177e4 470 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 471
1da177e4
LT
472 /* Use new style PCI probing. Now the kernel will
473 do most of this for us */
6c04a515
LP
474 rc = pci_register_driver(&tlan_driver);
475
476 if (rc != 0) {
477 printk(KERN_ERR "TLAN: Could not register pci driver.\n");
478 goto err_out_pci_free;
479 }
1da177e4
LT
480
481 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
482 TLan_EisaProbe();
6aa20a22
JG
483
484 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT
485 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
486 tlan_have_pci, tlan_have_eisa);
487
488 if (TLanDevicesInstalled == 0) {
6c04a515
LP
489 rc = -ENODEV;
490 goto err_out_pci_unreg;
1da177e4
LT
491 }
492 return 0;
6c04a515
LP
493
494err_out_pci_unreg:
495 pci_unregister_driver(&tlan_driver);
496err_out_pci_free:
6c04a515 497 return rc;
1da177e4 498}
6aa20a22 499
1da177e4
LT
500
501static int __devinit tlan_init_one( struct pci_dev *pdev,
502 const struct pci_device_id *ent)
503{
504 return TLan_probe1( pdev, -1, -1, 0, ent);
505}
506
507
508/*
509 ***************************************************************
510 * tlan_probe1
511 *
512 * Returns:
513 * 0 on success, error code on error
6aa20a22 514 * Parms:
1da177e4
LT
515 * none
516 *
517 * The name is lower case to fit in with all the rest of
6aa20a22 518 * the netcard_probe names. This function looks for
1da177e4
LT
519 * another TLan based adapter, setting it up with the
520 * allocated device struct if one is found.
521 * tlan_probe has been ported to the new net API and
522 * now allocates its own device structure. This function
523 * is also used by modules.
524 *
525 **************************************************************/
526
6aa20a22 527static int __devinit TLan_probe1(struct pci_dev *pdev,
1da177e4
LT
528 long ioaddr, int irq, int rev, const struct pci_device_id *ent )
529{
530
531 struct net_device *dev;
532 TLanPrivateInfo *priv;
1da177e4
LT
533 u16 device_id;
534 int reg, rc = -ENODEV;
535
ad9f6713 536#ifdef CONFIG_PCI
1da177e4
LT
537 if (pdev) {
538 rc = pci_enable_device(pdev);
539 if (rc)
540 return rc;
541
542 rc = pci_request_regions(pdev, TLanSignature);
543 if (rc) {
544 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
545 goto err_out;
546 }
547 }
ad9f6713 548#endif /* CONFIG_PCI */
1da177e4
LT
549
550 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
551 if (dev == NULL) {
552 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
553 rc = -ENOMEM;
554 goto err_out_regions;
555 }
1da177e4 556 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 557
1da177e4
LT
558 priv = netdev_priv(dev);
559
560 priv->pciDev = pdev;
c4028958 561 priv->dev = dev;
6aa20a22 562
1da177e4
LT
563 /* Is this a PCI device? */
564 if (pdev) {
565 u32 pci_io_base = 0;
566
567 priv->adapter = &board_info[ent->driver_data];
568
1e7f0bd8 569 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1da177e4
LT
570 if (rc) {
571 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
572 goto err_out_free_dev;
573 }
574
1da177e4
LT
575 for ( reg= 0; reg <= 5; reg ++ ) {
576 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
577 pci_io_base = pci_resource_start(pdev, reg);
578 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
579 pci_io_base);
580 break;
581 }
582 }
583 if (!pci_io_base) {
584 printk(KERN_ERR "TLAN: No IO mappings available\n");
585 rc = -EIO;
586 goto err_out_free_dev;
587 }
6aa20a22 588
1da177e4
LT
589 dev->base_addr = pci_io_base;
590 dev->irq = pdev->irq;
44c10138 591 priv->adapterRev = pdev->revision;
1da177e4
LT
592 pci_set_master(pdev);
593 pci_set_drvdata(pdev, dev);
594
595 } else { /* EISA card */
596 /* This is a hack. We need to know which board structure
597 * is suited for this adapter */
598 device_id = inw(ioaddr + EISA_ID2);
599 priv->is_eisa = 1;
600 if (device_id == 0x20F1) {
601 priv->adapter = &board_info[13]; /* NetFlex-3/E */
602 priv->adapterRev = 23; /* TLAN 2.3 */
603 } else {
604 priv->adapter = &board_info[14];
605 priv->adapterRev = 10; /* TLAN 1.0 */
606 }
607 dev->base_addr = ioaddr;
608 dev->irq = irq;
609 }
610
611 /* Kernel parameters */
612 if (dev->mem_start) {
613 priv->aui = dev->mem_start & 0x01;
614 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
615 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
6aa20a22 616
1da177e4
LT
617 if (priv->speed == 0x1) {
618 priv->speed = TLAN_SPEED_10;
619 } else if (priv->speed == 0x2) {
620 priv->speed = TLAN_SPEED_100;
621 }
622 debug = priv->debug = dev->mem_end;
623 } else {
624 priv->aui = aui[boards_found];
625 priv->speed = speed[boards_found];
626 priv->duplex = duplex[boards_found];
627 priv->debug = debug;
628 }
6aa20a22 629
1da177e4
LT
630 /* This will be used when we get an adapter error from
631 * within our irq handler */
c4028958 632 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work);
1da177e4
LT
633
634 spin_lock_init(&priv->lock);
6aa20a22 635
1da177e4
LT
636 rc = TLan_Init(dev);
637 if (rc) {
638 printk(KERN_ERR "TLAN: Could not set up device.\n");
639 goto err_out_free_dev;
640 }
641
642 rc = register_netdev(dev);
643 if (rc) {
644 printk(KERN_ERR "TLAN: Could not register device.\n");
645 goto err_out_uninit;
646 }
647
6aa20a22 648
1da177e4
LT
649 TLanDevicesInstalled++;
650 boards_found++;
6aa20a22 651
1da177e4
LT
652 /* pdev is NULL if this is an EISA device */
653 if (pdev)
654 tlan_have_pci++;
655 else {
656 priv->nextDevice = TLan_Eisa_Devices;
657 TLan_Eisa_Devices = dev;
658 tlan_have_eisa++;
659 }
6aa20a22 660
1da177e4
LT
661 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
662 dev->name,
663 (int) dev->irq,
664 (int) dev->base_addr,
665 priv->adapter->deviceLabel,
666 priv->adapterRev);
667 return 0;
668
669err_out_uninit:
670 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
671 priv->dmaStorageDMA );
672err_out_free_dev:
673 free_netdev(dev);
674err_out_regions:
675#ifdef CONFIG_PCI
676 if (pdev)
677 pci_release_regions(pdev);
678#endif
679err_out:
680 if (pdev)
681 pci_disable_device(pdev);
682 return rc;
683}
684
685
686static void TLan_Eisa_Cleanup(void)
687{
688 struct net_device *dev;
689 TLanPrivateInfo *priv;
6aa20a22 690
1da177e4
LT
691 while( tlan_have_eisa ) {
692 dev = TLan_Eisa_Devices;
693 priv = netdev_priv(dev);
694 if (priv->dmaStorage) {
695 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
696 }
697 release_region( dev->base_addr, 0x10);
698 unregister_netdev( dev );
699 TLan_Eisa_Devices = priv->nextDevice;
700 free_netdev( dev );
701 tlan_have_eisa--;
702 }
703}
6aa20a22
JG
704
705
1da177e4
LT
706static void __exit tlan_exit(void)
707{
708 pci_unregister_driver(&tlan_driver);
709
710 if (tlan_have_eisa)
711 TLan_Eisa_Cleanup();
712
1da177e4
LT
713}
714
715
716/* Module loading/unloading */
717module_init(tlan_probe);
718module_exit(tlan_exit);
719
720
721
722 /**************************************************************
723 * TLan_EisaProbe
724 *
725 * Returns: 0 on success, 1 otherwise
726 *
727 * Parms: None
728 *
729 *
6aa20a22
JG
730 * This functions probes for EISA devices and calls
731 * TLan_probe1 when one is found.
1da177e4
LT
732 *
733 *************************************************************/
734
6aa20a22 735static void __init TLan_EisaProbe (void)
1da177e4
LT
736{
737 long ioaddr;
738 int rc = -ENODEV;
739 int irq;
740 u16 device_id;
741
6aa20a22 742 if (!EISA_bus) {
1da177e4
LT
743 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
744 return;
745 }
6aa20a22 746
1da177e4
LT
747 /* Loop through all slots of the EISA bus */
748 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22
JG
749
750 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
1da177e4
LT
751 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
752
753
754 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
755 (int) ioaddr);
6aa20a22 756 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT
757 goto out;
758
6aa20a22 759 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT
760 release_region(ioaddr, 0x10);
761 goto out;
762 }
6aa20a22 763
1da177e4 764 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 765 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT
766 release_region (ioaddr, 0x10);
767 goto out;
768 }
6aa20a22 769
1da177e4
LT
770 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
771 release_region (ioaddr, 0x10);
772 goto out2;
773 }
6aa20a22
JG
774
775 if (debug == 0x10)
1da177e4
LT
776 printk("Found one\n");
777
778
779 /* Get irq from board */
780 switch (inb(ioaddr + 0xCC0)) {
781 case(0x10):
782 irq=5;
783 break;
784 case(0x20):
785 irq=9;
786 break;
787 case(0x40):
788 irq=10;
789 break;
790 case(0x80):
791 irq=11;
792 break;
793 default:
794 goto out;
6aa20a22
JG
795 }
796
797
1da177e4
LT
798 /* Setup the newly found eisa adapter */
799 rc = TLan_probe1( NULL, ioaddr, irq,
800 12, NULL);
801 continue;
6aa20a22 802
1da177e4
LT
803 out:
804 if (debug == 0x10)
805 printk("None found\n");
806 continue;
807
808 out2: if (debug == 0x10)
809 printk("Card found but it is not enabled, skipping\n");
810 continue;
6aa20a22 811
1da177e4
LT
812 }
813
814} /* TLan_EisaProbe */
815
816#ifdef CONFIG_NET_POLL_CONTROLLER
817static void TLan_Poll(struct net_device *dev)
818{
819 disable_irq(dev->irq);
7d12e780 820 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT
821 enable_irq(dev->irq);
822}
823#endif
824
6aa20a22 825
1da177e4
LT
826
827
828 /***************************************************************
829 * TLan_Init
830 *
831 * Returns:
832 * 0 on success, error code otherwise.
833 * Parms:
834 * dev The structure of the device to be
835 * init'ed.
836 *
837 * This function completes the initialization of the
838 * device structure and driver. It reserves the IO
839 * addresses, allocates memory for the lists and bounce
840 * buffers, retrieves the MAC address from the eeprom
841 * and assignes the device's methods.
6aa20a22 842 *
1da177e4
LT
843 **************************************************************/
844
845static int TLan_Init( struct net_device *dev )
846{
847 int dma_size;
848 int err;
849 int i;
850 TLanPrivateInfo *priv;
851
852 priv = netdev_priv(dev);
6aa20a22 853
1da177e4
LT
854 if ( bbuf ) {
855 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
856 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
857 } else {
858 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
859 * ( sizeof(TLanList) );
860 }
861 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, dma_size, &priv->dmaStorageDMA);
862 priv->dmaSize = dma_size;
6aa20a22 863
1da177e4
LT
864 if ( priv->dmaStorage == NULL ) {
865 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
866 dev->name );
867 return -ENOMEM;
868 }
869 memset( priv->dmaStorage, 0, dma_size );
6aa20a22 870 priv->rxList = (TLanList *)
1da177e4
LT
871 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
872 priv->rxListDMA = ( ( ( (u32) priv->dmaStorageDMA ) + 7 ) & 0xFFFFFFF8 );
873 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
874 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
875 if ( bbuf ) {
876 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
877 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
878 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
879 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
880 }
881
882 err = 0;
883 for ( i = 0; i < 6 ; i++ )
884 err |= TLan_EeReadByte( dev,
885 (u8) priv->adapter->addrOfs + i,
886 (u8 *) &dev->dev_addr[i] );
887 if ( err ) {
888 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
889 dev->name,
890 err );
891 }
892 dev->addr_len = 6;
893
894 netif_carrier_off(dev);
895
896 /* Device methods */
897 dev->open = &TLan_Open;
898 dev->hard_start_xmit = &TLan_StartTx;
899 dev->stop = &TLan_Close;
900 dev->get_stats = &TLan_GetStats;
901 dev->set_multicast_list = &TLan_SetMulticastList;
902 dev->do_ioctl = &TLan_ioctl;
903#ifdef CONFIG_NET_POLL_CONTROLLER
904 dev->poll_controller = &TLan_Poll;
905#endif
906 dev->tx_timeout = &TLan_tx_timeout;
907 dev->watchdog_timeo = TX_TIMEOUT;
908
909 return 0;
910
911} /* TLan_Init */
912
913
914
915
916 /***************************************************************
917 * TLan_Open
918 *
919 * Returns:
920 * 0 on success, error code otherwise.
921 * Parms:
922 * dev Structure of device to be opened.
923 *
924 * This routine puts the driver and TLAN adapter in a
925 * state where it is ready to send and receive packets.
926 * It allocates the IRQ, resets and brings the adapter
927 * out of reset, and allows interrupts. It also delays
928 * the startup for autonegotiation or sends a Rx GO
929 * command to the adapter, as appropriate.
930 *
931 **************************************************************/
932
933static int TLan_Open( struct net_device *dev )
934{
935 TLanPrivateInfo *priv = netdev_priv(dev);
936 int err;
6aa20a22 937
1da177e4 938 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
1fb9df5d 939 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED, TLanSignature, dev );
6aa20a22 940
1da177e4
LT
941 if ( err ) {
942 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
943 return err;
944 }
6aa20a22 945
1da177e4
LT
946 init_timer(&priv->timer);
947 netif_start_queue(dev);
6aa20a22 948
1da177e4
LT
949 /* NOTE: It might not be necessary to read the stats before a
950 reset if you don't care what the values are.
951 */
952 TLan_ResetLists( dev );
953 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
954 TLan_ResetAdapter( dev );
955
956 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
957
958 return 0;
959
960} /* TLan_Open */
961
962
963
964 /**************************************************************
965 * TLan_ioctl
6aa20a22 966 *
1da177e4
LT
967 * Returns:
968 * 0 on success, error code otherwise
969 * Params:
970 * dev structure of device to receive ioctl.
6aa20a22 971 *
1da177e4
LT
972 * rq ifreq structure to hold userspace data.
973 *
974 * cmd ioctl command.
975 *
976 *
977 *************************************************************/
978
979static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
980{
981 TLanPrivateInfo *priv = netdev_priv(dev);
982 struct mii_ioctl_data *data = if_mii(rq);
983 u32 phy = priv->phy[priv->phyNum];
6aa20a22 984
1da177e4
LT
985 if (!priv->phyOnline)
986 return -EAGAIN;
987
988 switch(cmd) {
989 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
990 data->phy_id = phy;
991
992
993 case SIOCGMIIREG: /* Read MII PHY register. */
994 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out);
995 return 0;
6aa20a22 996
1da177e4
LT
997
998 case SIOCSMIIREG: /* Write MII PHY register. */
999 if (!capable(CAP_NET_ADMIN))
1000 return -EPERM;
1001 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1002 return 0;
1003 default:
1004 return -EOPNOTSUPP;
1005 }
1006} /* tlan_ioctl */
1007
1008
1009 /***************************************************************
1010 * TLan_tx_timeout
1011 *
1012 * Returns: nothing
1013 *
1014 * Params:
6aa20a22 1015 * dev structure of device which timed out
1da177e4
LT
1016 * during transmit.
1017 *
1018 **************************************************************/
1019
1020static void TLan_tx_timeout(struct net_device *dev)
1021{
6aa20a22 1022
1da177e4 1023 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1024
1da177e4
LT
1025 /* Ok so we timed out, lets see what we can do about it...*/
1026 TLan_FreeLists( dev );
6aa20a22 1027 TLan_ResetLists( dev );
1da177e4
LT
1028 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1029 TLan_ResetAdapter( dev );
1030 dev->trans_start = jiffies;
6aa20a22 1031 netif_wake_queue( dev );
1da177e4
LT
1032
1033}
6aa20a22 1034
1da177e4 1035
c4028958
DH
1036 /***************************************************************
1037 * TLan_tx_timeout_work
1038 *
1039 * Returns: nothing
1040 *
1041 * Params:
1042 * work work item of device which timed out
1043 *
1044 **************************************************************/
1045
1046static void TLan_tx_timeout_work(struct work_struct *work)
1047{
1048 TLanPrivateInfo *priv =
1049 container_of(work, TLanPrivateInfo, tlan_tqueue);
1050
1051 TLan_tx_timeout(priv->dev);
1052}
1053
1054
1da177e4
LT
1055
1056 /***************************************************************
1057 * TLan_StartTx
6aa20a22 1058 *
1da177e4
LT
1059 * Returns:
1060 * 0 on success, non-zero on failure.
1061 * Parms:
1062 * skb A pointer to the sk_buff containing the
1063 * frame to be sent.
1064 * dev The device to send the data on.
1065 *
1066 * This function adds a frame to the Tx list to be sent
1067 * ASAP. First it verifies that the adapter is ready and
1068 * there is room in the queue. Then it sets up the next
1069 * available list, copies the frame to the corresponding
1070 * buffer. If the adapter Tx channel is idle, it gives
1071 * the adapter a Tx Go command on the list, otherwise it
1072 * sets the forward address of the previous list to point
1073 * to this one. Then it frees the sk_buff.
1074 *
1075 **************************************************************/
1076
1077static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1078{
1079 TLanPrivateInfo *priv = netdev_priv(dev);
1080 TLanList *tail_list;
1081 dma_addr_t tail_list_phys;
1082 u8 *tail_buffer;
1da177e4
LT
1083 unsigned long flags;
1084
1085 if ( ! priv->phyOnline ) {
1086 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name );
1087 dev_kfree_skb_any(skb);
1088 return 0;
1089 }
1090
41873e9a
SH
1091 if (skb_padto(skb, TLAN_MIN_FRAME_SIZE))
1092 return 0;
1093
1da177e4
LT
1094 tail_list = priv->txList + priv->txTail;
1095 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1096
1da177e4
LT
1097 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1098 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
1099 netif_stop_queue(dev);
1100 priv->txBusyCount++;
1101 return 1;
1102 }
1103
1104 tail_list->forward = 0;
1105
1106 if ( bbuf ) {
1107 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
d626f62b 1108 skb_copy_from_linear_data(skb, tail_buffer, skb->len);
1da177e4
LT
1109 } else {
1110 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE);
1111 TLan_StoreSKB(tail_list, skb);
1112 }
1113
41873e9a
SH
1114 tail_list->frameSize = (u16) skb->len;
1115 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1116 tail_list->buffer[1].count = 0;
1117 tail_list->buffer[1].address = 0;
1da177e4
LT
1118
1119 spin_lock_irqsave(&priv->lock, flags);
1120 tail_list->cStat = TLAN_CSTAT_READY;
1121 if ( ! priv->txInProgress ) {
1122 priv->txInProgress = 1;
1123 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1124 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1125 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1126 } else {
1127 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
1128 if ( priv->txTail == 0 ) {
1129 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys;
1130 } else {
1131 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys;
1132 }
1133 }
1134 spin_unlock_irqrestore(&priv->lock, flags);
1135
1136 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1137
1138 if ( bbuf )
1139 dev_kfree_skb_any(skb);
6aa20a22 1140
1da177e4
LT
1141 dev->trans_start = jiffies;
1142 return 0;
1143
1144} /* TLan_StartTx */
1145
1146
1147
1148
1149 /***************************************************************
1150 * TLan_HandleInterrupt
6aa20a22
JG
1151 *
1152 * Returns:
1da177e4
LT
1153 * Nothing
1154 * Parms:
1155 * irq The line on which the interrupt
1156 * occurred.
1157 * dev_id A pointer to the device assigned to
1158 * this irq line.
1da177e4
LT
1159 *
1160 * This function handles an interrupt generated by its
1161 * assigned TLAN adapter. The function deactivates
1162 * interrupts on its adapter, records the type of
1163 * interrupt, executes the appropriate subhandler, and
1164 * acknowdges the interrupt to the adapter (thus
1165 * re-enabling adapter interrupts.
1166 *
1167 **************************************************************/
1168
7d12e780 1169static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4
LT
1170{
1171 u32 ack;
1172 struct net_device *dev;
1173 u32 host_cmd;
1174 u16 host_int;
1175 int type;
1176 TLanPrivateInfo *priv;
1177
1178 dev = dev_id;
1179 priv = netdev_priv(dev);
1180
1181 spin_lock(&priv->lock);
1182
1183 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1184 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1185
1186 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
1187
1188 ack = TLanIntVector[type]( dev, host_int );
1189
1190 if ( ack ) {
1191 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1192 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1193 }
1194
1195 spin_unlock(&priv->lock);
1196
1197 return IRQ_HANDLED;
1198} /* TLan_HandleInterrupts */
1199
1200
1201
1202
1203 /***************************************************************
1204 * TLan_Close
6aa20a22 1205 *
1da177e4
LT
1206 * Returns:
1207 * An error code.
1208 * Parms:
1209 * dev The device structure of the device to
1210 * close.
1211 *
1212 * This function shuts down the adapter. It records any
1213 * stats, puts the adapter into reset state, deactivates
1214 * its time as needed, and frees the irq it is using.
1215 *
1216 **************************************************************/
1217
1218static int TLan_Close(struct net_device *dev)
1219{
1220 TLanPrivateInfo *priv = netdev_priv(dev);
1221
1222 netif_stop_queue(dev);
1223 priv->neg_be_verbose = 0;
1224
1225 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1226 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1227 if ( priv->timer.function != NULL ) {
1228 del_timer_sync( &priv->timer );
1229 priv->timer.function = NULL;
1230 }
6aa20a22 1231
1da177e4
LT
1232 free_irq( dev->irq, dev );
1233 TLan_FreeLists( dev );
1234 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1235
1236 return 0;
1237
1238} /* TLan_Close */
1239
1240
1241
1242
1243 /***************************************************************
1244 * TLan_GetStats
6aa20a22 1245 *
1da177e4
LT
1246 * Returns:
1247 * A pointer to the device's statistics structure.
1248 * Parms:
1249 * dev The device structure to return the
1250 * stats for.
1251 *
1252 * This function updates the devices statistics by reading
1253 * the TLAN chip's onboard registers. Then it returns the
1254 * address of the statistics structure.
1255 *
1256 **************************************************************/
1257
1258static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1259{
1260 TLanPrivateInfo *priv = netdev_priv(dev);
1261 int i;
1262
1263 /* Should only read stats if open ? */
1264 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1265
1266 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
1267 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
1268 if ( debug & TLAN_DEBUG_GNRL ) {
1269 TLan_PrintDio( dev->base_addr );
6aa20a22 1270 TLan_PhyPrint( dev );
1da177e4
LT
1271 }
1272 if ( debug & TLAN_DEBUG_LIST ) {
1273 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1274 TLan_PrintList( priv->rxList + i, "RX", i );
1275 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1276 TLan_PrintList( priv->txList + i, "TX", i );
1277 }
6aa20a22 1278
1da177e4
LT
1279 return ( &( (TLanPrivateInfo *) netdev_priv(dev) )->stats );
1280
1281} /* TLan_GetStats */
1282
1283
1284
1285
1286 /***************************************************************
1287 * TLan_SetMulticastList
6aa20a22 1288 *
1da177e4
LT
1289 * Returns:
1290 * Nothing
1291 * Parms:
1292 * dev The device structure to set the
1293 * multicast list for.
1294 *
1295 * This function sets the TLAN adaptor to various receive
1296 * modes. If the IFF_PROMISC flag is set, promiscuous
1297 * mode is acitviated. Otherwise, promiscuous mode is
1298 * turned off. If the IFF_ALLMULTI flag is set, then
1299 * the hash table is set to receive all group addresses.
1300 * Otherwise, the first three multicast addresses are
1301 * stored in AREG_1-3, and the rest are selected via the
1302 * hash table, as necessary.
1303 *
1304 **************************************************************/
1305
1306static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1307{
1da177e4
LT
1308 struct dev_mc_list *dmi = dev->mc_list;
1309 u32 hash1 = 0;
1310 u32 hash2 = 0;
1311 int i;
1312 u32 offset;
1313 u8 tmp;
1314
1315 if ( dev->flags & IFF_PROMISC ) {
1316 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1317 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1318 } else {
1319 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1320 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1321 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1322 for ( i = 0; i < 3; i++ )
1da177e4
LT
1323 TLan_SetMac( dev, i + 1, NULL );
1324 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1325 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1326 } else {
1327 for ( i = 0; i < dev->mc_count; i++ ) {
1328 if ( i < 3 ) {
1329 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1330 } else {
1331 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1332 if ( offset < 32 )
1da177e4
LT
1333 hash1 |= ( 1 << offset );
1334 else
1335 hash2 |= ( 1 << ( offset - 32 ) );
1336 }
1337 dmi = dmi->next;
1338 }
6aa20a22 1339 for ( ; i < 3; i++ )
1da177e4
LT
1340 TLan_SetMac( dev, i + 1, NULL );
1341 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1342 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1343 }
1344 }
1345
1346} /* TLan_SetMulticastList */
1347
1348
1349
1350/*****************************************************************************
1351******************************************************************************
1352
1353 ThunderLAN Driver Interrupt Vectors and Table
1354
1355 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1356 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1357 generated by TLAN based adapters.
1da177e4
LT
1358
1359******************************************************************************
1360*****************************************************************************/
1361
1362
1363 /***************************************************************
1364 * TLan_HandleInvalid
1365 *
1366 * Returns:
1367 * 0
1368 * Parms:
1369 * dev Device assigned the IRQ that was
1370 * raised.
1371 * host_int The contents of the HOST_INT
1372 * port.
1373 *
1374 * This function handles invalid interrupts. This should
1375 * never happen unless some other adapter is trying to use
1376 * the IRQ line assigned to the device.
1377 *
1378 **************************************************************/
1379
98e0f521 1380static u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
1da177e4
LT
1381{
1382 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1383 return 0;
1384
1385} /* TLan_HandleInvalid */
1386
1387
1388
1389
1390 /***************************************************************
1391 * TLan_HandleTxEOF
1392 *
1393 * Returns:
1394 * 1
1395 * Parms:
1396 * dev Device assigned the IRQ that was
1397 * raised.
1398 * host_int The contents of the HOST_INT
1399 * port.
1400 *
1401 * This function handles Tx EOF interrupts which are raised
1402 * by the adapter when it has completed sending the
1403 * contents of a buffer. If detemines which list/buffer
1404 * was completed and resets it. If the buffer was the last
1405 * in the channel (EOC), then the function checks to see if
1406 * another buffer is ready to send, and if so, sends a Tx
1407 * Go command. Finally, the driver activates/continues the
1408 * activity LED.
1409 *
1410 **************************************************************/
1411
98e0f521 1412static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT
1413{
1414 TLanPrivateInfo *priv = netdev_priv(dev);
1415 int eoc = 0;
1416 TLanList *head_list;
1417 dma_addr_t head_list_phys;
1418 u32 ack = 0;
1419 u16 tmpCStat;
6aa20a22 1420
1da177e4
LT
1421 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1422 head_list = priv->txList + priv->txHead;
1423
1424 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1425 ack++;
1426 if ( ! bbuf ) {
1427 struct sk_buff *skb = TLan_GetSKB(head_list);
1428 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
1429 dev_kfree_skb_any(skb);
1430 head_list->buffer[8].address = 0;
1431 head_list->buffer[9].address = 0;
1432 }
6aa20a22 1433
1da177e4
LT
1434 if ( tmpCStat & TLAN_CSTAT_EOC )
1435 eoc = 1;
6aa20a22 1436
1da177e4
LT
1437 priv->stats.tx_bytes += head_list->frameSize;
1438
1439 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG
1440 netif_start_queue(dev);
1441 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT
1442 head_list = priv->txList + priv->txHead;
1443 }
1444
1445 if (!ack)
1446 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1447
1da177e4
LT
1448 if ( eoc ) {
1449 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1450 head_list = priv->txList + priv->txHead;
1451 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1452 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1453 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1454 ack |= TLAN_HC_GO;
1455 } else {
1456 priv->txInProgress = 0;
1457 }
1458 }
6aa20a22 1459
1da177e4
LT
1460 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1461 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1462 if ( priv->timer.function == NULL ) {
1463 priv->timer.function = &TLan_Timer;
1464 priv->timer.data = (unsigned long) dev;
1465 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1466 priv->timerSetAt = jiffies;
1467 priv->timerType = TLAN_TIMER_ACTIVITY;
1468 add_timer(&priv->timer);
1469 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1470 priv->timerSetAt = jiffies;
1471 }
1472 }
1473
1474 return ack;
1475
1476} /* TLan_HandleTxEOF */
1477
1478
1479
1480
1481 /***************************************************************
1482 * TLan_HandleStatOverflow
1483 *
1484 * Returns:
1485 * 1
1486 * Parms:
1487 * dev Device assigned the IRQ that was
1488 * raised.
1489 * host_int The contents of the HOST_INT
1490 * port.
1491 *
1492 * This function handles the Statistics Overflow interrupt
1493 * which means that one or more of the TLAN statistics
1494 * registers has reached 1/2 capacity and needs to be read.
1495 *
1496 **************************************************************/
1497
98e0f521 1498static u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1da177e4
LT
1499{
1500 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1501
1502 return 1;
1503
1504} /* TLan_HandleStatOverflow */
1505
1506
1507
1508
1509 /***************************************************************
1510 * TLan_HandleRxEOF
1511 *
1512 * Returns:
1513 * 1
1514 * Parms:
1515 * dev Device assigned the IRQ that was
1516 * raised.
1517 * host_int The contents of the HOST_INT
1518 * port.
1519 *
1520 * This function handles the Rx EOF interrupt which
1521 * indicates a frame has been received by the adapter from
1522 * the net and the frame has been transferred to memory.
1523 * The function determines the bounce buffer the frame has
1524 * been loaded into, creates a new sk_buff big enough to
1525 * hold the frame, and sends it to protocol stack. It
1526 * then resets the used buffer and appends it to the end
1527 * of the list. If the frame was the last in the Rx
1528 * channel (EOC), the function restarts the receive channel
1529 * by sending an Rx Go command to the adapter. Then it
1530 * activates/continues the activity LED.
1531 *
1532 **************************************************************/
1533
98e0f521 1534static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1da177e4
LT
1535{
1536 TLanPrivateInfo *priv = netdev_priv(dev);
1537 u32 ack = 0;
1538 int eoc = 0;
1539 u8 *head_buffer;
1540 TLanList *head_list;
1541 struct sk_buff *skb;
1542 TLanList *tail_list;
1543 void *t;
1544 u32 frameSize;
1545 u16 tmpCStat;
1546 dma_addr_t head_list_phys;
1547
1548 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1549 head_list = priv->rxList + priv->rxHead;
1550 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1551
1da177e4
LT
1552 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1553 frameSize = head_list->frameSize;
1554 ack++;
1555 if (tmpCStat & TLAN_CSTAT_EOC)
1556 eoc = 1;
6aa20a22 1557
1da177e4
LT
1558 if (bbuf) {
1559 skb = dev_alloc_skb(frameSize + 7);
1560 if (skb == NULL)
1561 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n");
1562 else {
1563 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1da177e4
LT
1564 skb_reserve(skb, 2);
1565 t = (void *) skb_put(skb, frameSize);
6aa20a22 1566
1da177e4
LT
1567 priv->stats.rx_bytes += head_list->frameSize;
1568
1569 memcpy( t, head_buffer, frameSize );
1570 skb->protocol = eth_type_trans( skb, dev );
1571 netif_rx( skb );
1572 }
1573 } else {
1574 struct sk_buff *new_skb;
6aa20a22 1575
1da177e4
LT
1576 /*
1577 * I changed the algorithm here. What we now do
1578 * is allocate the new frame. If this fails we
1579 * simply recycle the frame.
1580 */
6aa20a22 1581
1da177e4 1582 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
6aa20a22 1583
1da177e4
LT
1584 if ( new_skb != NULL ) {
1585 skb = TLan_GetSKB(head_list);
1586 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1587 skb_trim( skb, frameSize );
1588
1589 priv->stats.rx_bytes += frameSize;
1590
1591 skb->protocol = eth_type_trans( skb, dev );
1592 netif_rx( skb );
6aa20a22 1593
1da177e4
LT
1594 skb_reserve( new_skb, 2 );
1595 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE );
1596 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1597 head_list->buffer[8].address = (u32) t;
1598 TLan_StoreSKB(head_list, new_skb);
6aa20a22 1599 } else
1da177e4
LT
1600 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" );
1601 }
1602
1603 head_list->forward = 0;
1604 head_list->cStat = 0;
1605 tail_list = priv->rxList + priv->rxTail;
1606 tail_list->forward = head_list_phys;
1607
1608 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1609 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1610 head_list = priv->rxList + priv->rxHead;
1611 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1612 }
1613
1614 if (!ack)
1615 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT
1616
1617
1618
6aa20a22
JG
1619
1620 if ( eoc ) {
1da177e4
LT
1621 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1622 head_list = priv->rxList + priv->rxHead;
1623 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1624 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1625 ack |= TLAN_HC_GO | TLAN_HC_RT;
1626 priv->rxEocCount++;
1627 }
1628
1629 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1630 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1631 if ( priv->timer.function == NULL ) {
1632 priv->timer.function = &TLan_Timer;
1633 priv->timer.data = (unsigned long) dev;
1634 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1635 priv->timerSetAt = jiffies;
1636 priv->timerType = TLAN_TIMER_ACTIVITY;
1637 add_timer(&priv->timer);
1638 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1639 priv->timerSetAt = jiffies;
1640 }
1641 }
1642
1643 dev->last_rx = jiffies;
6aa20a22 1644
1da177e4
LT
1645 return ack;
1646
1647} /* TLan_HandleRxEOF */
1648
1649
1650
1651
1652 /***************************************************************
1653 * TLan_HandleDummy
1654 *
1655 * Returns:
1656 * 1
1657 * Parms:
1658 * dev Device assigned the IRQ that was
1659 * raised.
1660 * host_int The contents of the HOST_INT
1661 * port.
1662 *
1663 * This function handles the Dummy interrupt, which is
1664 * raised whenever a test interrupt is generated by setting
1665 * the Req_Int bit of HOST_CMD to 1.
1666 *
1667 **************************************************************/
1668
98e0f521 1669static u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1da177e4
LT
1670{
1671 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1672 return 1;
1673
1674} /* TLan_HandleDummy */
1675
1676
1677
1678
1679 /***************************************************************
1680 * TLan_HandleTxEOC
1681 *
1682 * Returns:
1683 * 1
1684 * Parms:
1685 * dev Device assigned the IRQ that was
1686 * raised.
1687 * host_int The contents of the HOST_INT
1688 * port.
1689 *
1690 * This driver is structured to determine EOC occurrences by
1691 * reading the CSTAT member of the list structure. Tx EOC
1692 * interrupts are disabled via the DIO INTDIS register.
1693 * However, TLAN chips before revision 3.0 didn't have this
1694 * functionality, so process EOC events if this is the
1695 * case.
1696 *
1697 **************************************************************/
1698
98e0f521 1699static u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT
1700{
1701 TLanPrivateInfo *priv = netdev_priv(dev);
1702 TLanList *head_list;
1703 dma_addr_t head_list_phys;
1704 u32 ack = 1;
6aa20a22 1705
1da177e4
LT
1706 host_int = 0;
1707 if ( priv->tlanRev < 0x30 ) {
1708 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1709 head_list = priv->txList + priv->txHead;
1710 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1711 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1712 netif_stop_queue(dev);
1713 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1714 ack |= TLAN_HC_GO;
1715 } else {
1716 priv->txInProgress = 0;
1717 }
1718 }
1719
1720 return ack;
1721
1722} /* TLan_HandleTxEOC */
1723
1724
1725
1726
1727 /***************************************************************
1728 * TLan_HandleStatusCheck
1729 *
1730 * Returns:
1731 * 0 if Adapter check, 1 if Network Status check.
1732 * Parms:
1733 * dev Device assigned the IRQ that was
1734 * raised.
1735 * host_int The contents of the HOST_INT
1736 * port.
1737 *
1738 * This function handles Adapter Check/Network Status
1739 * interrupts generated by the adapter. It checks the
1740 * vector in the HOST_INT register to determine if it is
1741 * an Adapter Check interrupt. If so, it resets the
1742 * adapter. Otherwise it clears the status registers
1743 * and services the PHY.
1744 *
1745 **************************************************************/
1746
98e0f521 1747static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1748{
1da177e4
LT
1749 TLanPrivateInfo *priv = netdev_priv(dev);
1750 u32 ack;
1751 u32 error;
1752 u8 net_sts;
1753 u32 phy;
1754 u16 tlphy_ctl;
1755 u16 tlphy_sts;
6aa20a22 1756
1da177e4
LT
1757 ack = 1;
1758 if ( host_int & TLAN_HI_IV_MASK ) {
1759 netif_stop_queue( dev );
1760 error = inl( dev->base_addr + TLAN_CH_PARM );
1761 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1762 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1763 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1764
1765 schedule_work(&priv->tlan_tqueue);
1766
1767 netif_wake_queue(dev);
1768 ack = 0;
1769 } else {
1770 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1771 phy = priv->phy[priv->phyNum];
1772
1773 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1774 if ( net_sts ) {
1775 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1776 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1777 }
1778 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1779 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1780 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1781 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1782 tlphy_ctl |= TLAN_TC_SWAPOL;
1783 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1784 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1785 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1786 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1787 }
1788
1789 if (debug) {
6aa20a22 1790 TLan_PhyPrint( dev );
1da177e4
LT
1791 }
1792 }
1793 }
1794
1795 return ack;
1796
1797} /* TLan_HandleStatusCheck */
1798
1799
1800
1801
1802 /***************************************************************
1803 * TLan_HandleRxEOC
1804 *
1805 * Returns:
1806 * 1
1807 * Parms:
1808 * dev Device assigned the IRQ that was
1809 * raised.
1810 * host_int The contents of the HOST_INT
1811 * port.
1812 *
1813 * This driver is structured to determine EOC occurrences by
1814 * reading the CSTAT member of the list structure. Rx EOC
1815 * interrupts are disabled via the DIO INTDIS register.
1816 * However, TLAN chips before revision 3.0 didn't have this
1817 * CSTAT member or a INTDIS register, so if this chip is
1818 * pre-3.0, process EOC interrupts normally.
1819 *
1820 **************************************************************/
1821
98e0f521 1822static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1da177e4
LT
1823{
1824 TLanPrivateInfo *priv = netdev_priv(dev);
1825 dma_addr_t head_list_phys;
1826 u32 ack = 1;
1827
1828 if ( priv->tlanRev < 0x30 ) {
1829 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1830 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1831 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1832 ack |= TLAN_HC_GO | TLAN_HC_RT;
1833 priv->rxEocCount++;
1834 }
1835
1836 return ack;
1837
1838} /* TLan_HandleRxEOC */
1839
1840
1841
1842
1843/*****************************************************************************
1844******************************************************************************
1845
1846 ThunderLAN Driver Timer Function
1847
1848******************************************************************************
1849*****************************************************************************/
1850
1851
1852 /***************************************************************
1853 * TLan_Timer
1854 *
1855 * Returns:
1856 * Nothing
1857 * Parms:
1858 * data A value given to add timer when
1859 * add_timer was called.
1860 *
1861 * This function handles timed functionality for the
1862 * TLAN driver. The two current timer uses are for
1863 * delaying for autonegotionation and driving the ACT LED.
1864 * - Autonegotiation requires being allowed about
1865 * 2 1/2 seconds before attempting to transmit a
1866 * packet. It would be a very bad thing to hang
1867 * the kernel this long, so the driver doesn't
1868 * allow transmission 'til after this time, for
1869 * certain PHYs. It would be much nicer if all
1870 * PHYs were interrupt-capable like the internal
1871 * PHY.
1872 * - The ACT LED, which shows adapter activity, is
1873 * driven by the driver, and so must be left on
1874 * for a short period to power up the LED so it
1875 * can be seen. This delay can be changed by
1876 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1877 * if desired. 100 ms produces a slightly
1878 * sluggish response.
1879 *
1880 **************************************************************/
1881
98e0f521 1882static void TLan_Timer( unsigned long data )
1da177e4
LT
1883{
1884 struct net_device *dev = (struct net_device *) data;
1885 TLanPrivateInfo *priv = netdev_priv(dev);
1886 u32 elapsed;
1887 unsigned long flags = 0;
1888
1889 priv->timer.function = NULL;
1890
1891 switch ( priv->timerType ) {
6aa20a22 1892#ifdef MONITOR
1da177e4
LT
1893 case TLAN_TIMER_LINK_BEAT:
1894 TLan_PhyMonitor( dev );
1895 break;
1896#endif
1897 case TLAN_TIMER_PHY_PDOWN:
1898 TLan_PhyPowerDown( dev );
1899 break;
1900 case TLAN_TIMER_PHY_PUP:
1901 TLan_PhyPowerUp( dev );
1902 break;
1903 case TLAN_TIMER_PHY_RESET:
1904 TLan_PhyReset( dev );
1905 break;
1906 case TLAN_TIMER_PHY_START_LINK:
1907 TLan_PhyStartLink( dev );
1908 break;
1909 case TLAN_TIMER_PHY_FINISH_AN:
1910 TLan_PhyFinishAutoNeg( dev );
1911 break;
1912 case TLAN_TIMER_FINISH_RESET:
1913 TLan_FinishReset( dev );
1914 break;
1915 case TLAN_TIMER_ACTIVITY:
1916 spin_lock_irqsave(&priv->lock, flags);
1917 if ( priv->timer.function == NULL ) {
1918 elapsed = jiffies - priv->timerSetAt;
1919 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1920 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1921 } else {
1922 priv->timer.function = &TLan_Timer;
1923 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1924 spin_unlock_irqrestore(&priv->lock, flags);
1925 add_timer( &priv->timer );
1926 break;
1927 }
1928 }
1929 spin_unlock_irqrestore(&priv->lock, flags);
1930 break;
1931 default:
1932 break;
1933 }
1934
1935} /* TLan_Timer */
1936
1937
1938
1939
1940/*****************************************************************************
1941******************************************************************************
1942
1943 ThunderLAN Driver Adapter Related Routines
1944
1945******************************************************************************
1946*****************************************************************************/
1947
1948
1949 /***************************************************************
1950 * TLan_ResetLists
6aa20a22 1951 *
1da177e4
LT
1952 * Returns:
1953 * Nothing
1954 * Parms:
1955 * dev The device structure with the list
1956 * stuctures to be reset.
1957 *
1958 * This routine sets the variables associated with managing
1959 * the TLAN lists to their initial values.
1960 *
1961 **************************************************************/
1962
98e0f521 1963static void TLan_ResetLists( struct net_device *dev )
1da177e4
LT
1964{
1965 TLanPrivateInfo *priv = netdev_priv(dev);
1966 int i;
1967 TLanList *list;
1968 dma_addr_t list_phys;
1969 struct sk_buff *skb;
1970 void *t = NULL;
1971
1972 priv->txHead = 0;
1973 priv->txTail = 0;
1974 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1975 list = priv->txList + i;
1976 list->cStat = TLAN_CSTAT_UNUSED;
1977 if ( bbuf ) {
1978 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1979 } else {
1980 list->buffer[0].address = 0;
1981 }
1982 list->buffer[2].count = 0;
1983 list->buffer[2].address = 0;
1984 list->buffer[8].address = 0;
1985 list->buffer[9].address = 0;
1986 }
1987
1988 priv->rxHead = 0;
1989 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
1990 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1991 list = priv->rxList + i;
1992 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
1993 list->cStat = TLAN_CSTAT_READY;
1994 list->frameSize = TLAN_MAX_FRAME_SIZE;
1995 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1996 if ( bbuf ) {
1997 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1998 } else {
1999 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
2000 if ( skb == NULL ) {
2001 printk( "TLAN: Couldn't allocate memory for received data.\n" );
2002 /* If this ever happened it would be a problem */
2003 } else {
2004 skb->dev = dev;
2005 skb_reserve( skb, 2 );
2006 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
2007 }
2008 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2009 list->buffer[8].address = (u32) t;
2010 TLan_StoreSKB(list, skb);
2011 }
2012 list->buffer[1].count = 0;
2013 list->buffer[1].address = 0;
2014 if ( i < TLAN_NUM_RX_LISTS - 1 )
2015 list->forward = list_phys + sizeof(TLanList);
2016 else
2017 list->forward = 0;
2018 }
2019
2020} /* TLan_ResetLists */
2021
2022
98e0f521 2023static void TLan_FreeLists( struct net_device *dev )
1da177e4
LT
2024{
2025 TLanPrivateInfo *priv = netdev_priv(dev);
2026 int i;
2027 TLanList *list;
2028 struct sk_buff *skb;
2029
2030 if ( ! bbuf ) {
2031 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2032 list = priv->txList + i;
2033 skb = TLan_GetSKB(list);
2034 if ( skb ) {
2035 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
2036 dev_kfree_skb_any( skb );
2037 list->buffer[8].address = 0;
2038 list->buffer[9].address = 0;
2039 }
2040 }
2041
2042 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2043 list = priv->rxList + i;
2044 skb = TLan_GetSKB(list);
2045 if ( skb ) {
2046 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2047 dev_kfree_skb_any( skb );
2048 list->buffer[8].address = 0;
2049 list->buffer[9].address = 0;
2050 }
2051 }
2052 }
2053} /* TLan_FreeLists */
2054
2055
2056
2057
2058 /***************************************************************
2059 * TLan_PrintDio
6aa20a22 2060 *
1da177e4
LT
2061 * Returns:
2062 * Nothing
2063 * Parms:
2064 * io_base Base IO port of the device of
2065 * which to print DIO registers.
2066 *
2067 * This function prints out all the internal (DIO)
2068 * registers of a TLAN chip.
2069 *
2070 **************************************************************/
2071
98e0f521 2072static void TLan_PrintDio( u16 io_base )
1da177e4
LT
2073{
2074 u32 data0, data1;
2075 int i;
2076
2077 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
2078 printk( "TLAN: Off. +0 +4\n" );
2079 for ( i = 0; i < 0x4C; i+= 8 ) {
2080 data0 = TLan_DioRead32( io_base, i );
2081 data1 = TLan_DioRead32( io_base, i + 0x4 );
2082 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2083 }
2084
2085} /* TLan_PrintDio */
2086
2087
2088
2089
2090 /***************************************************************
2091 * TLan_PrintList
6aa20a22 2092 *
1da177e4
LT
2093 * Returns:
2094 * Nothing
2095 * Parms:
2096 * list A pointer to the TLanList structure to
2097 * be printed.
2098 * type A string to designate type of list,
2099 * "Rx" or "Tx".
2100 * num The index of the list.
2101 *
2102 * This function prints out the contents of the list
2103 * pointed to by the list parameter.
2104 *
2105 **************************************************************/
2106
98e0f521 2107static void TLan_PrintList( TLanList *list, char *type, int num)
1da177e4
LT
2108{
2109 int i;
2110
2111 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
2112 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2113 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2114 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2115 /* for ( i = 0; i < 10; i++ ) { */
2116 for ( i = 0; i < 2; i++ ) {
2117 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
2118 }
2119
2120} /* TLan_PrintList */
2121
2122
2123
2124
2125 /***************************************************************
2126 * TLan_ReadAndClearStats
2127 *
2128 * Returns:
2129 * Nothing
2130 * Parms:
2131 * dev Pointer to device structure of adapter
2132 * to which to read stats.
6aa20a22 2133 * record Flag indicating whether to add
1da177e4
LT
2134 *
2135 * This functions reads all the internal status registers
2136 * of the TLAN chip, which clears them as a side effect.
2137 * It then either adds the values to the device's status
2138 * struct, or discards them, depending on whether record
2139 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2140 *
2141 **************************************************************/
2142
98e0f521 2143static void TLan_ReadAndClearStats( struct net_device *dev, int record )
1da177e4
LT
2144{
2145 TLanPrivateInfo *priv = netdev_priv(dev);
2146 u32 tx_good, tx_under;
2147 u32 rx_good, rx_over;
2148 u32 def_tx, crc, code;
2149 u32 multi_col, single_col;
2150 u32 excess_col, late_col, loss;
2151
2152 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2153 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2154 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2155 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2156 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2157
2158 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2159 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2160 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2161 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2162 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2163
1da177e4
LT
2164 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2165 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2166 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2167 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2168 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2169
1da177e4
LT
2170 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2171 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2172 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2173 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2174 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2175
2176 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2177 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2178 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2179 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2180
2181 if ( record ) {
2182 priv->stats.rx_packets += rx_good;
2183 priv->stats.rx_errors += rx_over + crc + code;
2184 priv->stats.tx_packets += tx_good;
2185 priv->stats.tx_errors += tx_under + loss;
2186 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
2187
2188 priv->stats.rx_over_errors += rx_over;
2189 priv->stats.rx_crc_errors += crc;
2190 priv->stats.rx_frame_errors += code;
2191
2192 priv->stats.tx_aborted_errors += tx_under;
2193 priv->stats.tx_carrier_errors += loss;
2194 }
6aa20a22 2195
1da177e4
LT
2196} /* TLan_ReadAndClearStats */
2197
2198
2199
2200
2201 /***************************************************************
2202 * TLan_Reset
2203 *
2204 * Returns:
2205 * 0
2206 * Parms:
2207 * dev Pointer to device structure of adapter
2208 * to be reset.
2209 *
2210 * This function resets the adapter and it's physical
2211 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2212 * Programmer's Guide" for details. The routine tries to
2213 * implement what is detailed there, though adjustments
2214 * have been made.
2215 *
2216 **************************************************************/
2217
98e0f521 2218static void
1da177e4
LT
2219TLan_ResetAdapter( struct net_device *dev )
2220{
2221 TLanPrivateInfo *priv = netdev_priv(dev);
2222 int i;
2223 u32 addr;
2224 u32 data;
2225 u8 data8;
2226
2227 priv->tlanFullDuplex = FALSE;
2228 priv->phyOnline=0;
2229 netif_carrier_off(dev);
2230
2231/* 1. Assert reset bit. */
2232
2233 data = inl(dev->base_addr + TLAN_HOST_CMD);
2234 data |= TLAN_HC_AD_RST;
2235 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2236
1da177e4
LT
2237 udelay(1000);
2238
2239/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2240
2241 data = inl(dev->base_addr + TLAN_HOST_CMD);
2242 data |= TLAN_HC_INT_OFF;
2243 outl(data, dev->base_addr + TLAN_HOST_CMD);
2244
2245/* 3. Clear AREGs and HASHs. */
2246
2247 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2248 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2249 }
2250
2251/* 4. Setup NetConfig register. */
2252
2253 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2254 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2255
2256/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2257
2258 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2259 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2260
2261/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2262
2263 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2264 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2265 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2266
2267/* 7. Setup the remaining registers. */
2268
2269 if ( priv->tlanRev >= 0x30 ) {
2270 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2271 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2272 }
2273 TLan_PhyDetect( dev );
2274 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2275
1da177e4
LT
2276 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2277 data |= TLAN_NET_CFG_BIT;
2278 if ( priv->aui == 1 ) {
2279 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2280 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2281 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2282 priv->tlanFullDuplex = TRUE;
2283 } else {
2284 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2285 }
2286 }
2287
2288 if ( priv->phyNum == 0 ) {
2289 data |= TLAN_NET_CFG_PHY_EN;
2290 }
2291 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2292
2293 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2294 TLan_FinishReset( dev );
2295 } else {
2296 TLan_PhyPowerDown( dev );
2297 }
2298
2299} /* TLan_ResetAdapter */
2300
2301
2302
2303
98e0f521 2304static void
1da177e4
LT
2305TLan_FinishReset( struct net_device *dev )
2306{
2307 TLanPrivateInfo *priv = netdev_priv(dev);
2308 u8 data;
2309 u32 phy;
2310 u8 sio;
2311 u16 status;
2312 u16 partner;
2313 u16 tlphy_ctl;
2314 u16 tlphy_par;
2315 u16 tlphy_id1, tlphy_id2;
2316 int i;
2317
2318 phy = priv->phy[priv->phyNum];
2319
2320 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2321 if ( priv->tlanFullDuplex ) {
2322 data |= TLAN_NET_CMD_DUPLEX;
2323 }
2324 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2325 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2326 if ( priv->phyNum == 0 ) {
6aa20a22 2327 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT
2328 }
2329 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2330 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2331 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2332 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2333
1da177e4
LT
2334 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
2335 status = MII_GS_LINK;
2336 printk( "TLAN: %s: Link forced.\n", dev->name );
2337 } else {
2338 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2339 udelay( 1000 );
2340 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
6aa20a22 2341 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT
2342 (tlphy_id1 == NAT_SEM_ID1) &&
2343 (tlphy_id2 == NAT_SEM_ID2) ) {
2344 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2345 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2346
1da177e4
LT
2347 printk( "TLAN: %s: Link active with ", dev->name );
2348 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2349 printk( "forced 10%sMbps %s-Duplex\n",
1da177e4
LT
2350 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2351 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2352 } else {
2353 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2354 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2355 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2356 printk("TLAN: Partner capability: ");
2357 for (i = 5; i <= 10; i++)
2358 if (partner & (1<<i))
2359 printk("%s",media[i-5]);
2360 printk("\n");
2361 }
2362
2363 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2364#ifdef MONITOR
1da177e4
LT
2365 /* We have link beat..for now anyway */
2366 priv->link = 1;
2367 /*Enabling link beat monitoring */
2368 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2369#endif
1da177e4
LT
2370 } else if (status & MII_GS_LINK) {
2371 printk( "TLAN: %s: Link active\n", dev->name );
2372 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2373 }
2374 }
2375
2376 if ( priv->phyNum == 0 ) {
2377 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2378 tlphy_ctl |= TLAN_TC_INTEN;
2379 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2380 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2381 sio |= TLAN_NET_SIO_MINTEN;
2382 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2383 }
2384
2385 if ( status & MII_GS_LINK ) {
2386 TLan_SetMac( dev, 0, dev->dev_addr );
2387 priv->phyOnline = 1;
2388 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2389 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2390 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2391 }
2392 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2393 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2394 netif_carrier_on(dev);
2395 } else {
2396 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2397 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2398 return;
2399 }
562faf46 2400 TLan_SetMulticastList(dev);
1da177e4
LT
2401
2402} /* TLan_FinishReset */
2403
2404
2405
2406
2407 /***************************************************************
2408 * TLan_SetMac
2409 *
2410 * Returns:
2411 * Nothing
2412 * Parms:
2413 * dev Pointer to device structure of adapter
2414 * on which to change the AREG.
2415 * areg The AREG to set the address in (0 - 3).
2416 * mac A pointer to an array of chars. Each
2417 * element stores one byte of the address.
2418 * IE, it isn't in ascii.
2419 *
2420 * This function transfers a MAC address to one of the
2421 * TLAN AREGs (address registers). The TLAN chip locks
2422 * the register on writing to offset 0 and unlocks the
2423 * register after writing to offset 5. If NULL is passed
2424 * in mac, then the AREG is filled with 0's.
2425 *
2426 **************************************************************/
2427
98e0f521 2428static void TLan_SetMac( struct net_device *dev, int areg, char *mac )
1da177e4
LT
2429{
2430 int i;
6aa20a22 2431
1da177e4
LT
2432 areg *= 6;
2433
2434 if ( mac != NULL ) {
2435 for ( i = 0; i < 6; i++ )
2436 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2437 } else {
2438 for ( i = 0; i < 6; i++ )
2439 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2440 }
2441
2442} /* TLan_SetMac */
2443
2444
2445
2446
2447/*****************************************************************************
2448******************************************************************************
2449
2450 ThunderLAN Driver PHY Layer Routines
2451
2452******************************************************************************
2453*****************************************************************************/
2454
2455
2456
2457 /*********************************************************************
2458 * TLan_PhyPrint
2459 *
2460 * Returns:
2461 * Nothing
2462 * Parms:
2463 * dev A pointer to the device structure of the
2464 * TLAN device having the PHYs to be detailed.
6aa20a22 2465 *
1da177e4
LT
2466 * This function prints the registers a PHY (aka transceiver).
2467 *
2468 ********************************************************************/
2469
98e0f521 2470static void TLan_PhyPrint( struct net_device *dev )
1da177e4
LT
2471{
2472 TLanPrivateInfo *priv = netdev_priv(dev);
2473 u16 i, data0, data1, data2, data3, phy;
2474
2475 phy = priv->phy[priv->phyNum];
2476
2477 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2478 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2479 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2480 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2481 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2482 for ( i = 0; i < 0x20; i+= 4 ) {
2483 printk( "TLAN: 0x%02x", i );
2484 TLan_MiiReadReg( dev, phy, i, &data0 );
2485 printk( " 0x%04hx", data0 );
2486 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2487 printk( " 0x%04hx", data1 );
2488 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2489 printk( " 0x%04hx", data2 );
2490 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2491 printk( " 0x%04hx\n", data3 );
2492 }
2493 } else {
2494 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2495 }
2496
2497} /* TLan_PhyPrint */
2498
2499
2500
2501
2502 /*********************************************************************
2503 * TLan_PhyDetect
2504 *
2505 * Returns:
2506 * Nothing
2507 * Parms:
2508 * dev A pointer to the device structure of the adapter
2509 * for which the PHY needs determined.
2510 *
2511 * So far I've found that adapters which have external PHYs
2512 * may also use the internal PHY for part of the functionality.
2513 * (eg, AUI/Thinnet). This function finds out if this TLAN
2514 * chip has an internal PHY, and then finds the first external
2515 * PHY (starting from address 0) if it exists).
2516 *
2517 ********************************************************************/
2518
98e0f521 2519static void TLan_PhyDetect( struct net_device *dev )
1da177e4
LT
2520{
2521 TLanPrivateInfo *priv = netdev_priv(dev);
2522 u16 control;
2523 u16 hi;
2524 u16 lo;
2525 u32 phy;
2526
2527 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2528 priv->phyNum = 0xFFFF;
2529 return;
2530 }
2531
2532 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2533
1da177e4
LT
2534 if ( hi != 0xFFFF ) {
2535 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2536 } else {
2537 priv->phy[0] = TLAN_PHY_NONE;
2538 }
2539
2540 priv->phy[1] = TLAN_PHY_NONE;
2541 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2542 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2543 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2544 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2545 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2546 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2547 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2548 priv->phy[1] = phy;
2549 }
2550 }
2551 }
2552
2553 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2554 priv->phyNum = 1;
2555 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2556 priv->phyNum = 0;
2557 } else {
2558 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2559 }
2560
2561} /* TLan_PhyDetect */
2562
2563
2564
2565
98e0f521 2566static void TLan_PhyPowerDown( struct net_device *dev )
1da177e4
LT
2567{
2568 TLanPrivateInfo *priv = netdev_priv(dev);
2569 u16 value;
2570
2571 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2572 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2573 TLan_MiiSync( dev->base_addr );
2574 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2575 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2576 TLan_MiiSync( dev->base_addr );
2577 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2578 }
2579
2580 /* Wait for 50 ms and powerup
2581 * This is abitrary. It is intended to make sure the
2582 * transceiver settles.
2583 */
2584 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2585
2586} /* TLan_PhyPowerDown */
2587
2588
2589
2590
98e0f521 2591static void TLan_PhyPowerUp( struct net_device *dev )
1da177e4
LT
2592{
2593 TLanPrivateInfo *priv = netdev_priv(dev);
2594 u16 value;
2595
2596 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2597 TLan_MiiSync( dev->base_addr );
2598 value = MII_GC_LOOPBK;
2599 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2600 TLan_MiiSync(dev->base_addr);
2601 /* Wait for 500 ms and reset the
2602 * transceiver. The TLAN docs say both 50 ms and
2603 * 500 ms, so do the longer, just in case.
2604 */
2605 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2606
2607} /* TLan_PhyPowerUp */
2608
2609
2610
2611
98e0f521 2612static void TLan_PhyReset( struct net_device *dev )
1da177e4
LT
2613{
2614 TLanPrivateInfo *priv = netdev_priv(dev);
2615 u16 phy;
2616 u16 value;
2617
2618 phy = priv->phy[priv->phyNum];
2619
2620 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2621 TLan_MiiSync( dev->base_addr );
2622 value = MII_GC_LOOPBK | MII_GC_RESET;
2623 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2624 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2625 while ( value & MII_GC_RESET ) {
2626 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2627 }
2628
2629 /* Wait for 500 ms and initialize.
2630 * I don't remember why I wait this long.
2631 * I've changed this to 50ms, as it seems long enough.
2632 */
2633 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2634
2635} /* TLan_PhyReset */
2636
2637
2638
2639
98e0f521 2640static void TLan_PhyStartLink( struct net_device *dev )
1da177e4
LT
2641{
2642 TLanPrivateInfo *priv = netdev_priv(dev);
2643 u16 ability;
2644 u16 control;
2645 u16 data;
2646 u16 phy;
2647 u16 status;
2648 u16 tctl;
2649
2650 phy = priv->phy[priv->phyNum];
2651 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2652 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2653 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2654
6aa20a22 2655 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT
2656 ( ! priv->aui ) ) {
2657 ability = status >> 11;
6aa20a22 2658 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT
2659 priv->duplex == TLAN_DUPLEX_HALF) {
2660 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2661 } else if ( priv->speed == TLAN_SPEED_10 &&
2662 priv->duplex == TLAN_DUPLEX_FULL) {
2663 priv->tlanFullDuplex = TRUE;
2664 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2665 } else if ( priv->speed == TLAN_SPEED_100 &&
2666 priv->duplex == TLAN_DUPLEX_HALF) {
2667 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2668 } else if ( priv->speed == TLAN_SPEED_100 &&
2669 priv->duplex == TLAN_DUPLEX_FULL) {
2670 priv->tlanFullDuplex = TRUE;
2671 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2672 } else {
6aa20a22 2673
1da177e4
LT
2674 /* Set Auto-Neg advertisement */
2675 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2676 /* Enablee Auto-Neg */
2677 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2678 /* Restart Auto-Neg */
2679 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2680 /* Wait for 4 sec for autonegotiation
2681 * to complete. The max spec time is less than this
2682 * but the card need additional time to start AN.
2683 * .5 sec should be plenty extra.
2684 */
2685 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2686 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2687 return;
2688 }
6aa20a22
JG
2689
2690 }
2691
1da177e4
LT
2692 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2693 priv->phyNum = 0;
2694 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2695 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2696 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2697 return;
2698 } else if ( priv->phyNum == 0 ) {
2699 control = 0;
2700 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2701 if ( priv->aui ) {
2702 tctl |= TLAN_TC_AUISEL;
6aa20a22 2703 } else {
1da177e4
LT
2704 tctl &= ~TLAN_TC_AUISEL;
2705 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2706 control |= MII_GC_DUPLEX;
2707 priv->tlanFullDuplex = TRUE;
2708 }
2709 if ( priv->speed == TLAN_SPEED_100 ) {
2710 control |= MII_GC_SPEEDSEL;
2711 }
2712 }
2713 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2714 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2715 }
2716
2717 /* Wait for 2 sec to give the transceiver time
2718 * to establish link.
2719 */
2720 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2721
2722} /* TLan_PhyStartLink */
2723
2724
2725
2726
98e0f521 2727static void TLan_PhyFinishAutoNeg( struct net_device *dev )
1da177e4
LT
2728{
2729 TLanPrivateInfo *priv = netdev_priv(dev);
2730 u16 an_adv;
2731 u16 an_lpa;
2732 u16 data;
2733 u16 mode;
2734 u16 phy;
2735 u16 status;
6aa20a22 2736
1da177e4
LT
2737 phy = priv->phy[priv->phyNum];
2738
2739 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2740 udelay( 1000 );
2741 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2742
2743 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2744 /* Wait for 8 sec to give the process
2745 * more time. Perhaps we should fail after a while.
2746 */
2747 if (!priv->neg_be_verbose++) {
2748 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n");
2749 printk(KERN_INFO "TLAN: Please check that your adapter has\n");
2750 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n");
2751 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n");
2752 }
2753 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2754 return;
2755 }
2756
2757 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2758 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2759 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2760 mode = an_adv & an_lpa & 0x03E0;
2761 if ( mode & 0x0100 ) {
2762 priv->tlanFullDuplex = TRUE;
2763 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2764 priv->tlanFullDuplex = TRUE;
2765 }
2766
2767 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2768 priv->phyNum = 0;
2769 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2770 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2771 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2772 return;
2773 }
2774
2775 if ( priv->phyNum == 0 ) {
2776 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2777 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2778 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2779 } else {
2780 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2781 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2782 }
2783 }
2784
2785 /* Wait for 100 ms. No reason in partiticular.
2786 */
2787 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2788
1da177e4
LT
2789} /* TLan_PhyFinishAutoNeg */
2790
2791#ifdef MONITOR
2792
2793 /*********************************************************************
2794 *
2795 * TLan_phyMonitor
2796 *
6aa20a22 2797 * Returns:
1da177e4
LT
2798 * None
2799 *
2800 * Params:
2801 * dev The device structure of this device.
2802 *
6aa20a22 2803 *
1da177e4
LT
2804 * This function monitors PHY condition by reading the status
2805 * register via the MII bus. This can be used to give info
2806 * about link changes (up/down), and possible switch to alternate
2807 * media.
2808 *
2809 * ******************************************************************/
2810
2811void TLan_PhyMonitor( struct net_device *dev )
2812{
2813 TLanPrivateInfo *priv = netdev_priv(dev);
2814 u16 phy;
2815 u16 phy_status;
2816
2817 phy = priv->phy[priv->phyNum];
2818
2819 /* Get PHY status register */
2820 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2821
2822 /* Check if link has been lost */
6aa20a22 2823 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT
2824 if (priv->link) {
2825 priv->link = 0;
2826 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2827 netif_carrier_off(dev);
1da177e4
LT
2828 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2829 return;
2830 }
2831 }
2832
2833 /* Link restablished? */
2834 if ((phy_status & MII_GS_LINK) && !priv->link) {
2835 priv->link = 1;
2836 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2837 netif_carrier_on(dev);
1da177e4
LT
2838 }
2839
2840 /* Setup a new monitor */
2841 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2842}
1da177e4
LT
2843
2844#endif /* MONITOR */
2845
2846
2847/*****************************************************************************
2848******************************************************************************
2849
2850 ThunderLAN Driver MII Routines
2851
2852 These routines are based on the information in Chap. 2 of the
2853 "ThunderLAN Programmer's Guide", pp. 15-24.
2854
2855******************************************************************************
2856*****************************************************************************/
2857
2858
2859 /***************************************************************
2860 * TLan_MiiReadReg
2861 *
2862 * Returns:
2863 * 0 if ack received ok
2864 * 1 otherwise.
2865 *
2866 * Parms:
2867 * dev The device structure containing
2868 * The io address and interrupt count
2869 * for this device.
2870 * phy The address of the PHY to be queried.
2871 * reg The register whose contents are to be
4a4efbde 2872 * retrieved.
1da177e4
LT
2873 * val A pointer to a variable to store the
2874 * retrieved value.
2875 *
4a4efbde 2876 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT
2877 * of a given register on a PHY. It sends the appropriate info
2878 * and then reads the 16-bit register value from the MII bus via
2879 * the TLAN SIO register.
2880 *
2881 **************************************************************/
2882
98e0f521 2883static int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
1da177e4
LT
2884{
2885 u8 nack;
2886 u16 sio, tmp;
2887 u32 i;
2888 int err;
2889 int minten;
2890 TLanPrivateInfo *priv = netdev_priv(dev);
2891 unsigned long flags = 0;
2892
2893 err = FALSE;
2894 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2895 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2896
1da177e4
LT
2897 if (!in_irq())
2898 spin_lock_irqsave(&priv->lock, flags);
2899
2900 TLan_MiiSync(dev->base_addr);
2901
2902 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2903 if ( minten )
2904 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2905
2906 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2907 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2908 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2909 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2910
2911
2912 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2913
2914 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2915 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2916 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2917
2918 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2919 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2920 if (nack) { /* No ACK, so fake it */
2921 for (i = 0; i < 16; i++) {
2922 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2923 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2924 }
2925 tmp = 0xffff;
2926 err = TRUE;
2927 } else { /* ACK, so read data */
2928 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2929 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2930 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2931 tmp |= i;
2932 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2933 }
2934 }
2935
2936
2937 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2938 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2939
2940 if ( minten )
2941 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2942
2943 *val = tmp;
6aa20a22 2944
1da177e4
LT
2945 if (!in_irq())
2946 spin_unlock_irqrestore(&priv->lock, flags);
2947
2948 return err;
2949
2950} /* TLan_MiiReadReg */
2951
2952
2953
2954
2955 /***************************************************************
2956 * TLan_MiiSendData
2957 *
2958 * Returns:
2959 * Nothing
2960 * Parms:
2961 * base_port The base IO port of the adapter in
2962 * question.
2963 * dev The address of the PHY to be queried.
2964 * data The value to be placed on the MII bus.
2965 * num_bits The number of bits in data that are to
2966 * be placed on the MII bus.
2967 *
2968 * This function sends on sequence of bits on the MII
2969 * configuration bus.
2970 *
2971 **************************************************************/
2972
98e0f521 2973static void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
1da177e4
LT
2974{
2975 u16 sio;
2976 u32 i;
2977
2978 if ( num_bits == 0 )
2979 return;
2980
2981 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2982 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2983 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2984
2985 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2986 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2987 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2988 if ( data & i )
2989 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
2990 else
2991 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
2992 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2993 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2994 }
2995
2996} /* TLan_MiiSendData */
2997
2998
2999
3000
3001 /***************************************************************
3002 * TLan_MiiSync
3003 *
3004 * Returns:
3005 * Nothing
3006 * Parms:
3007 * base_port The base IO port of the adapter in
3008 * question.
3009 *
3010 * This functions syncs all PHYs in terms of the MII configuration
3011 * bus.
3012 *
3013 **************************************************************/
3014
98e0f521 3015static void TLan_MiiSync( u16 base_port )
1da177e4
LT
3016{
3017 int i;
3018 u16 sio;
3019
3020 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3021 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3022
3023 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3024 for ( i = 0; i < 32; i++ ) {
3025 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3026 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3027 }
3028
3029} /* TLan_MiiSync */
3030
3031
3032
3033
3034 /***************************************************************
3035 * TLan_MiiWriteReg
3036 *
3037 * Returns:
3038 * Nothing
3039 * Parms:
3040 * dev The device structure for the device
3041 * to write to.
3042 * phy The address of the PHY to be written to.
3043 * reg The register whose contents are to be
3044 * written.
3045 * val The value to be written to the register.
3046 *
3047 * This function uses the TLAN's MII bus to write the contents of a
3048 * given register on a PHY. It sends the appropriate info and then
3049 * writes the 16-bit register value from the MII configuration bus
3050 * via the TLAN SIO register.
3051 *
3052 **************************************************************/
3053
98e0f521 3054static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
1da177e4
LT
3055{
3056 u16 sio;
3057 int minten;
3058 unsigned long flags = 0;
3059 TLanPrivateInfo *priv = netdev_priv(dev);
3060
3061 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3062 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3063
1da177e4
LT
3064 if (!in_irq())
3065 spin_lock_irqsave(&priv->lock, flags);
3066
3067 TLan_MiiSync( dev->base_addr );
3068
3069 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3070 if ( minten )
3071 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3072
3073 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3074 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3075 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3076 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3077
3078 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3079 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3080
3081 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3082 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3083
3084 if ( minten )
3085 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3086
1da177e4
LT
3087 if (!in_irq())
3088 spin_unlock_irqrestore(&priv->lock, flags);
3089
3090} /* TLan_MiiWriteReg */
3091
3092
3093
3094
3095/*****************************************************************************
3096******************************************************************************
3097
3098 ThunderLAN Driver Eeprom routines
3099
3100 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3101 EEPROM. These functions are based on information in Microchip's
3102 data sheet. I don't know how well this functions will work with
3103 other EEPROMs.
3104
3105******************************************************************************
3106*****************************************************************************/
3107
3108
3109 /***************************************************************
3110 * TLan_EeSendStart
3111 *
3112 * Returns:
3113 * Nothing
6aa20a22 3114 * Parms:
1da177e4
LT
3115 * io_base The IO port base address for the
3116 * TLAN device with the EEPROM to
3117 * use.
3118 *
3119 * This function sends a start cycle to an EEPROM attached
3120 * to a TLAN chip.
3121 *
3122 **************************************************************/
3123
98e0f521 3124static void TLan_EeSendStart( u16 io_base )
1da177e4
LT
3125{
3126 u16 sio;
3127
3128 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3129 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3130
3131 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3132 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3133 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3134 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3135 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3136
3137} /* TLan_EeSendStart */
3138
3139
3140
3141
3142 /***************************************************************
3143 * TLan_EeSendByte
3144 *
3145 * Returns:
3146 * If the correct ack was received, 0, otherwise 1
3147 * Parms: io_base The IO port base address for the
3148 * TLAN device with the EEPROM to
3149 * use.
3150 * data The 8 bits of information to
3151 * send to the EEPROM.
3152 * stop If TLAN_EEPROM_STOP is passed, a
3153 * stop cycle is sent after the
3154 * byte is sent after the ack is
3155 * read.
3156 *
3157 * This function sends a byte on the serial EEPROM line,
3158 * driving the clock to send each bit. The function then
3159 * reverses transmission direction and reads an acknowledge
3160 * bit.
3161 *
3162 **************************************************************/
3163
98e0f521 3164static int TLan_EeSendByte( u16 io_base, u8 data, int stop )
1da177e4
LT
3165{
3166 int err;
3167 u8 place;
3168 u16 sio;
3169
3170 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3171 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3172
3173 /* Assume clock is low, tx is enabled; */
3174 for ( place = 0x80; place != 0; place >>= 1 ) {
3175 if ( place & data )
3176 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3177 else
3178 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3179 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3180 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3181 }
3182 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3183 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3184 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3185 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3186 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3187
3188 if ( ( ! err ) && stop ) {
3189 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3190 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3191 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3192 }
3193
3194 return ( err );
3195
3196} /* TLan_EeSendByte */
3197
3198
3199
3200
3201 /***************************************************************
3202 * TLan_EeReceiveByte
3203 *
3204 * Returns:
3205 * Nothing
3206 * Parms:
3207 * io_base The IO port base address for the
3208 * TLAN device with the EEPROM to
3209 * use.
3210 * data An address to a char to hold the
3211 * data sent from the EEPROM.
3212 * stop If TLAN_EEPROM_STOP is passed, a
3213 * stop cycle is sent after the
3214 * byte is received, and no ack is
3215 * sent.
3216 *
3217 * This function receives 8 bits of data from the EEPROM
3218 * over the serial link. It then sends and ack bit, or no
3219 * ack and a stop bit. This function is used to retrieve
3220 * data after the address of a byte in the EEPROM has been
3221 * sent.
3222 *
3223 **************************************************************/
3224
98e0f521 3225static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
1da177e4
LT
3226{
3227 u8 place;
3228 u16 sio;
3229
3230 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3231 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3232 *data = 0;
3233
3234 /* Assume clock is low, tx is enabled; */
3235 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3236 for ( place = 0x80; place; place >>= 1 ) {
3237 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3238 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3239 *data |= place;
3240 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3241 }
3242
3243 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3244 if ( ! stop ) {
3245 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3246 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3247 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3248 } else {
3249 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3250 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3251 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3252 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3253 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3254 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3255 }
3256
3257} /* TLan_EeReceiveByte */
3258
3259
3260
3261
3262 /***************************************************************
3263 * TLan_EeReadByte
3264 *
3265 * Returns:
3266 * No error = 0, else, the stage at which the error
3267 * occurred.
3268 * Parms:
3269 * io_base The IO port base address for the
3270 * TLAN device with the EEPROM to
3271 * use.
3272 * ee_addr The address of the byte in the
3273 * EEPROM whose contents are to be
3274 * retrieved.
3275 * data An address to a char to hold the
3276 * data obtained from the EEPROM.
3277 *
3278 * This function reads a byte of information from an byte
3279 * cell in the EEPROM.
3280 *
3281 **************************************************************/
3282
98e0f521 3283static int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
1da177e4
LT
3284{
3285 int err;
3286 TLanPrivateInfo *priv = netdev_priv(dev);
3287 unsigned long flags = 0;
3288 int ret=0;
3289
3290 spin_lock_irqsave(&priv->lock, flags);
3291
3292 TLan_EeSendStart( dev->base_addr );
3293 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3294 if (err)
3295 {
3296 ret=1;
3297 goto fail;
3298 }
3299 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3300 if (err)
3301 {
3302 ret=2;
3303 goto fail;
3304 }
3305 TLan_EeSendStart( dev->base_addr );
3306 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3307 if (err)
3308 {
3309 ret=3;
3310 goto fail;
3311 }
3312 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3313fail:
3314 spin_unlock_irqrestore(&priv->lock, flags);
3315
3316 return ret;
3317
3318} /* TLan_EeReadByte */
3319
3320
3321
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