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[deliverable/linux.git] / drivers / net / tlan.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading:
19 *
20 * Texas Instruments, ThunderLAN Programmer's Guide,
21 * TI Literature Number SPWU013A
22 * available in PDF format from www.ti.com
23 * Level One, LXT901 and LXT970 Data Sheets
24 * available in PDF format from www.level1.com
25 * National Semiconductor, DP83840A Data Sheet
26 * available in PDF format from www.national.com
27 * Microchip Technology, 24C01A/02A/04A Data Sheet
28 * available in PDF format from www.microchip.com
29 *
30 * Change History
31 *
32 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
33 * new PCI BIOS interface.
34 * Alan Cox <alan@redhat.com>: Fixed the out of memory
35 * handling.
6aa20a22 36 *
1da177e4
LT		 37 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
38 *
39 * v1.1 Dec 20, 1999 - Removed linux version checking
6aa20a22 40 * Patch from Tigran Aivazian.
1da177e4
LT		 41 * - v1.1 includes Alan's SMP updates.
42 * - We still have problems on SMP though,
6aa20a22
JG		 43 * but I'm looking into that.
44 *
1da177e4
LT		 45 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
46 * - Removed dependency of HZ being 100.
6aa20a22 47 * - We now allow higher priority timers to
1da177e4
LT		 48 * overwrite timers like TLAN_TIMER_ACTIVITY
49 * Patch from John Cagle <john.cagle@compaq.com>.
50 * - Fixed a few compiler warnings.
51 *
52 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
6aa20a22 53 * - Removed call to pci_present().
1da177e4 54 * - Removed SA_INTERRUPT flag from irq handler.
6aa20a22 55 * - Added __init and __initdata to reduce resisdent
1da177e4
LT		 56 * code size.
57 * - Driver now uses module_init/module_exit.
58 * - Rewrote init_module and tlan_probe to
59 * share a lot more code. We now use tlan_probe
60 * with builtin and module driver.
6aa20a22
JG		 61 * - Driver ported to new net API.
62 * - tlan.txt has been reworked to reflect current
1da177e4
LT		 63 * driver (almost)
64 * - Other minor stuff
65 *
66 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
67 * network cleanup in 2.3.43pre7 (Tigran & myself)
68 * - Minor stuff.
69 *
70 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
71 * if no cable/link were present.
72 * - Cosmetic changes.
73 * - TODO: Port completely to new PCI/DMA API
74 * Auto-Neg fallback.
75 *
76 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
6aa20a22 77 * tested it though, as the kernel support is currently
1da177e4
LT		 78 * broken (2.3.99p4p3).
79 * - Updated tlan.txt accordingly.
80 * - Adjusted minimum/maximum frame length.
6aa20a22 81 * - There is now a TLAN website up at
1da177e4
LT		 82 * http://tlan.kernel.dk
83 *
84 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
85 * reports PHY information when used with Donald
86 * Beckers userspace MII diagnostics utility.
87 *
88 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
89 * - Added link information to Auto-Neg and forced
90 * modes. When NIC operates with auto-neg the driver
91 * will report Link speed & duplex modes as well as
92 * link partner abilities. When forced link is used,
93 * the driver will report status of the established
94 * link.
6aa20a22
JG		 95 * Please read tlan.txt for additional information.
96 * - Removed call to check_region(), and used
1da177e4 97 * return value of request_region() instead.
6aa20a22 98 *
1da177e4
LT		 99 * v1.8a May 28, 2000 - Minor updates.
100 *
101 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
102 * - Updated with timer fixes from Andrew Morton.
103 * - Fixed module race in TLan_Open.
104 * - Added routine to monitor PHY status.
105 * - Added activity led support for Proliant devices.
106 *
6aa20a22
JG		 107 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
108 * like the Compaq NetFlex3/E.
1da177e4
LT		 109 * - Rewrote tlan_probe to better handle multiple
110 * bus probes. Probing and device setup is now
111 * done through TLan_Probe and TLan_init_one. Actual
6aa20a22 112 * hardware probe is done with kernel API and
1da177e4
LT		 113 * TLan_EisaProbe.
114 * - Adjusted debug information for probing.
6aa20a22
JG		 115 * - Fixed bug that would cause general debug information
116 * to be printed after driver removal.
1da177e4 117 * - Added transmit timeout handling.
6aa20a22
JG		 118 * - Fixed OOM return values in tlan_probe.
119 * - Fixed possible mem leak in tlan_exit
1da177e4
LT		 120 * (now tlan_remove_one).
121 * - Fixed timer bug in TLan_phyMonitor.
122 * - This driver version is alpha quality, please
123 * send me any bug issues you may encounter.
124 *
6aa20a22 125 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
1da177e4
LT		 126 * set for EISA cards.
127 * - Added support for NetFlex3/E with nibble-rate
128 * 10Base-T PHY. This is untestet as I haven't got
129 * one of these cards.
130 * - Fixed timer being added twice.
131 * - Disabled PhyMonitoring by default as this is
132 * work in progress. Define MONITOR to enable it.
133 * - Now we don't display link info with PHYs that
134 * doesn't support it (level1).
135 * - Incresed tx_timeout beacuse of auto-neg.
136 * - Adjusted timers for forced speeds.
137 *
138 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
139 *
140 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
141 * when link can't be established.
142 * - Added the bbuf option as a kernel parameter.
143 * - Fixed ioaddr probe bug.
144 * - Fixed stupid deadlock with MII interrupts.
6aa20a22 145 * - Added support for speed/duplex selection with
1da177e4
LT		 146 * multiple nics.
147 * - Added partly fix for TX Channel lockup with
148 * TLAN v1.0 silicon. This needs to be investigated
149 * further.
150 *
151 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
152 * interrupt. Thanks goes to
153 * Adam Keys <adam@ti.com>
154 * Denis Beaudoin <dbeaudoin@ti.com>
155 * for providing the patch.
156 * - Fixed auto-neg output when using multiple
157 * adapters.
158 * - Converted to use new taskq interface.
159 *
160 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
161 *
162 * Samuel Chessman <chessman@tux.org> New Maintainer!
163 *
164 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
165 * 10T half duplex no loopback
166 * Thanks to Gunnar Eikman
167 *******************************************************************************/
168
169#include <linux/module.h>
170#include <linux/init.h>
171#include <linux/ioport.h>
172#include <linux/eisa.h>
173#include <linux/pci.h>
1e7f0bd8 174#include <linux/dma-mapping.h>
1da177e4
LT		 175#include <linux/netdevice.h>
176#include <linux/etherdevice.h>
177#include <linux/delay.h>
178#include <linux/spinlock.h>
179#include <linux/workqueue.h>
180#include <linux/mii.h>
181
182#include "tlan.h"
183
184typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
185
186
187/* For removing EISA devices */
188static struct net_device *TLan_Eisa_Devices;
189
190static int TLanDevicesInstalled;
191
192/* Set speed, duplex and aui settings */
193static int aui[MAX_TLAN_BOARDS];
194static int duplex[MAX_TLAN_BOARDS];
195static int speed[MAX_TLAN_BOARDS];
196static int boards_found;
15efa9bb
SH		 197module_param_array(aui, int, NULL, 0);
198module_param_array(duplex, int, NULL, 0);
199module_param_array(speed, int, NULL, 0);
200MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
201MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
202MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
1da177e4
LT		 203
204MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
205MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
206MODULE_LICENSE("GPL");
207
208
209/* Define this to enable Link beat monitoring */
210#undef MONITOR
211
212/* Turn on debugging. See Documentation/networking/tlan.txt for details */
213static int debug;
15efa9bb
SH		 214module_param(debug, int, 0);
215MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
1da177e4
LT		 216
217static int bbuf;
15efa9bb
SH		 218module_param(bbuf, int, 0);
219MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
220
1da177e4
LT		 221static u8 *TLanPadBuffer;
222static dma_addr_t TLanPadBufferDMA;
223static char TLanSignature[] = "TLAN";
224static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
225static int tlan_have_pci;
226static int tlan_have_eisa;
227
228static const char *media[] = {
6aa20a22 229 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
1da177e4
LT		 230 "100baseTx-FD", "100baseT4", NULL
231};
232
233static struct board {
234 const char *deviceLabel;
235 u32 flags;
236 u16 addrOfs;
237} board_info[] = {
238 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
239 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
240 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
242 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
6aa20a22 252 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
1da177e4
LT		 253 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
254};
255
256static struct pci_device_id tlan_pci_tbl[] = {
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
277 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
281 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
283 { 0,}
284};
6aa20a22 285MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
1da177e4
LT		 286
287static void TLan_EisaProbe( void );
288static void TLan_Eisa_Cleanup( void );
289static int TLan_Init( struct net_device * );
290static int TLan_Open( struct net_device *dev );
291static int TLan_StartTx( struct sk_buff *, struct net_device *);
7d12e780 292static irqreturn_t TLan_HandleInterrupt( int, void *);
1da177e4
LT		 293static int TLan_Close( struct net_device *);
294static struct net_device_stats *TLan_GetStats( struct net_device *);
295static void TLan_SetMulticastList( struct net_device *);
296static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
297static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent);
298static void TLan_tx_timeout( struct net_device *dev);
c4028958 299static void TLan_tx_timeout_work(struct work_struct *work);
1da177e4
LT		 300static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
301
302static u32 TLan_HandleInvalid( struct net_device *, u16 );
303static u32 TLan_HandleTxEOF( struct net_device *, u16 );
304static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
305static u32 TLan_HandleRxEOF( struct net_device *, u16 );
306static u32 TLan_HandleDummy( struct net_device *, u16 );
307static u32 TLan_HandleTxEOC( struct net_device *, u16 );
308static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
309static u32 TLan_HandleRxEOC( struct net_device *, u16 );
310
311static void TLan_Timer( unsigned long );
312
313static void TLan_ResetLists( struct net_device * );
314static void TLan_FreeLists( struct net_device * );
315static void TLan_PrintDio( u16 );
316static void TLan_PrintList( TLanList *, char *, int );
317static void TLan_ReadAndClearStats( struct net_device *, int );
318static void TLan_ResetAdapter( struct net_device * );
319static void TLan_FinishReset( struct net_device * );
320static void TLan_SetMac( struct net_device *, int areg, char *mac );
321
322static void TLan_PhyPrint( struct net_device * );
323static void TLan_PhyDetect( struct net_device * );
324static void TLan_PhyPowerDown( struct net_device * );
325static void TLan_PhyPowerUp( struct net_device * );
326static void TLan_PhyReset( struct net_device * );
327static void TLan_PhyStartLink( struct net_device * );
328static void TLan_PhyFinishAutoNeg( struct net_device * );
329#ifdef MONITOR
330static void TLan_PhyMonitor( struct net_device * );
331#endif
332
333/*
334static int TLan_PhyNop( struct net_device * );
335static int TLan_PhyInternalCheck( struct net_device * );
336static int TLan_PhyInternalService( struct net_device * );
337static int TLan_PhyDp83840aCheck( struct net_device * );
338*/
339
340static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
341static void TLan_MiiSendData( u16, u32, unsigned );
342static void TLan_MiiSync( u16 );
343static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
344
345static void TLan_EeSendStart( u16 );
346static int TLan_EeSendByte( u16, u8, int );
347static void TLan_EeReceiveByte( u16, u8 *, int );
348static int TLan_EeReadByte( struct net_device *, u8, u8 * );
349
350
6aa20a22 351static void
1da177e4
LT		 352TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
353{
354 unsigned long addr = (unsigned long)skb;
355 tag->buffer[9].address = (u32)addr;
356 addr >>= 31; /* >>= 32 is undefined for 32bit arch, stupid C */
357 addr >>= 1;
358 tag->buffer[8].address = (u32)addr;
359}
360
361static struct sk_buff *
362TLan_GetSKB( struct tlan_list_tag *tag)
363{
364 unsigned long addr = tag->buffer[8].address;
365 addr <<= 31;
366 addr <<= 1;
367 addr |= tag->buffer[9].address;
368 return (struct sk_buff *) addr;
369}
370
371
372static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
373 TLan_HandleInvalid,
374 TLan_HandleTxEOF,
375 TLan_HandleStatOverflow,
376 TLan_HandleRxEOF,
377 TLan_HandleDummy,
378 TLan_HandleTxEOC,
379 TLan_HandleStatusCheck,
380 TLan_HandleRxEOC
381};
382
383static inline void
384TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
385{
386 TLanPrivateInfo *priv = netdev_priv(dev);
387 unsigned long flags = 0;
6aa20a22 388
1da177e4
LT		 389 if (!in_irq())
390 spin_lock_irqsave(&priv->lock, flags);
391 if ( priv->timer.function != NULL &&
6aa20a22 392 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1da177e4
LT		 393 if (!in_irq())
394 spin_unlock_irqrestore(&priv->lock, flags);
395 return;
396 }
397 priv->timer.function = &TLan_Timer;
398 if (!in_irq())
399 spin_unlock_irqrestore(&priv->lock, flags);
400
401 priv->timer.data = (unsigned long) dev;
402 priv->timerSetAt = jiffies;
403 priv->timerType = type;
404 mod_timer(&priv->timer, jiffies + ticks);
6aa20a22 405
1da177e4
LT		 406} /* TLan_SetTimer */
407
408
409/*****************************************************************************
410******************************************************************************
411
412 ThunderLAN Driver Primary Functions
413
414 These functions are more or less common to all Linux network drivers.
415
416******************************************************************************
417*****************************************************************************/
418
419
420
421
422
423 /***************************************************************
424 * tlan_remove_one
425 *
426 * Returns:
427 * Nothing
428 * Parms:
429 * None
430 *
431 * Goes through the TLanDevices list and frees the device
432 * structs and memory associated with each device (lists
433 * and buffers). It also ureserves the IO port regions
434 * associated with this device.
435 *
436 **************************************************************/
437
438
439static void __devexit tlan_remove_one( struct pci_dev *pdev)
440{
441 struct net_device *dev = pci_get_drvdata( pdev );
442 TLanPrivateInfo *priv = netdev_priv(dev);
6aa20a22 443
1da177e4
LT		 444 unregister_netdev( dev );
445
446 if ( priv->dmaStorage ) {
447 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
448 }
449
450#ifdef CONFIG_PCI
451 pci_release_regions(pdev);
452#endif
6aa20a22 453
1da177e4 454 free_netdev( dev );
6aa20a22 455
1da177e4 456 pci_set_drvdata( pdev, NULL );
6aa20a22 457}
1da177e4
LT		 458
459static struct pci_driver tlan_driver = {
460 .name = "tlan",
461 .id_table = tlan_pci_tbl,
462 .probe = tlan_init_one,
6aa20a22 463 .remove = __devexit_p(tlan_remove_one),
1da177e4
LT		 464};
465
466static int __init tlan_probe(void)
467{
468 static int pad_allocated;
6aa20a22 469
1da177e4 470 printk(KERN_INFO "%s", tlan_banner);
6aa20a22 471
1da177e4
LT		 472 TLanPadBuffer = (u8 *) pci_alloc_consistent(NULL, TLAN_MIN_FRAME_SIZE, &TLanPadBufferDMA);
473
474 if (TLanPadBuffer == NULL) {
475 printk(KERN_ERR "TLAN: Could not allocate memory for pad buffer.\n");
476 return -ENOMEM;
477 }
478
479 memset(TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE);
480 pad_allocated = 1;
481
482 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
6aa20a22 483
1da177e4
LT		 484 /* Use new style PCI probing. Now the kernel will
485 do most of this for us */
486 pci_register_driver(&tlan_driver);
487
488 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
489 TLan_EisaProbe();
6aa20a22
JG		 490
491 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
1da177e4
LT		 492 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
493 tlan_have_pci, tlan_have_eisa);
494
495 if (TLanDevicesInstalled == 0) {
496 pci_unregister_driver(&tlan_driver);
497 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
498 return -ENODEV;
499 }
500 return 0;
501}
6aa20a22 502
1da177e4
LT		 503
504static int __devinit tlan_init_one( struct pci_dev *pdev,
505 const struct pci_device_id *ent)
506{
507 return TLan_probe1( pdev, -1, -1, 0, ent);
508}
509
510
511/*
512 ***************************************************************
513 * tlan_probe1
514 *
515 * Returns:
516 * 0 on success, error code on error
6aa20a22 517 * Parms:
1da177e4
LT		 518 * none
519 *
520 * The name is lower case to fit in with all the rest of
6aa20a22 521 * the netcard_probe names. This function looks for
1da177e4
LT		 522 * another TLan based adapter, setting it up with the
523 * allocated device struct if one is found.
524 * tlan_probe has been ported to the new net API and
525 * now allocates its own device structure. This function
526 * is also used by modules.
527 *
528 **************************************************************/
529
6aa20a22 530static int __devinit TLan_probe1(struct pci_dev *pdev,
1da177e4
LT		 531 long ioaddr, int irq, int rev, const struct pci_device_id *ent )
532{
533
534 struct net_device *dev;
535 TLanPrivateInfo *priv;
536 u8 pci_rev;
537 u16 device_id;
538 int reg, rc = -ENODEV;
539
ad9f6713 540#ifdef CONFIG_PCI
1da177e4
LT		 541 if (pdev) {
542 rc = pci_enable_device(pdev);
543 if (rc)
544 return rc;
545
546 rc = pci_request_regions(pdev, TLanSignature);
547 if (rc) {
548 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
549 goto err_out;
550 }
551 }
ad9f6713 552#endif /* CONFIG_PCI */
1da177e4
LT		 553
554 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
555 if (dev == NULL) {
556 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
557 rc = -ENOMEM;
558 goto err_out_regions;
559 }
560 SET_MODULE_OWNER(dev);
561 SET_NETDEV_DEV(dev, &pdev->dev);
6aa20a22 562
1da177e4
LT		 563 priv = netdev_priv(dev);
564
565 priv->pciDev = pdev;
c4028958 566 priv->dev = dev;
6aa20a22 567
1da177e4
LT		 568 /* Is this a PCI device? */
569 if (pdev) {
570 u32 pci_io_base = 0;
571
572 priv->adapter = &board_info[ent->driver_data];
573
1e7f0bd8 574 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1da177e4
LT		 575 if (rc) {
576 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
577 goto err_out_free_dev;
578 }
579
580 pci_read_config_byte ( pdev, PCI_REVISION_ID, &pci_rev);
581
582 for ( reg= 0; reg <= 5; reg ++ ) {
583 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
584 pci_io_base = pci_resource_start(pdev, reg);
585 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
586 pci_io_base);
587 break;
588 }
589 }
590 if (!pci_io_base) {
591 printk(KERN_ERR "TLAN: No IO mappings available\n");
592 rc = -EIO;
593 goto err_out_free_dev;
594 }
6aa20a22 595
1da177e4
LT		 596 dev->base_addr = pci_io_base;
597 dev->irq = pdev->irq;
6aa20a22 598 priv->adapterRev = pci_rev;
1da177e4
LT		 599 pci_set_master(pdev);
600 pci_set_drvdata(pdev, dev);
601
602 } else { /* EISA card */
603 /* This is a hack. We need to know which board structure
604 * is suited for this adapter */
605 device_id = inw(ioaddr + EISA_ID2);
606 priv->is_eisa = 1;
607 if (device_id == 0x20F1) {
608 priv->adapter = &board_info[13]; /* NetFlex-3/E */
609 priv->adapterRev = 23; /* TLAN 2.3 */
610 } else {
611 priv->adapter = &board_info[14];
612 priv->adapterRev = 10; /* TLAN 1.0 */
613 }
614 dev->base_addr = ioaddr;
615 dev->irq = irq;
616 }
617
618 /* Kernel parameters */
619 if (dev->mem_start) {
620 priv->aui = dev->mem_start & 0x01;
621 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
622 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
6aa20a22 623
1da177e4
LT		 624 if (priv->speed == 0x1) {
625 priv->speed = TLAN_SPEED_10;
626 } else if (priv->speed == 0x2) {
627 priv->speed = TLAN_SPEED_100;
628 }
629 debug = priv->debug = dev->mem_end;
630 } else {
631 priv->aui = aui[boards_found];
632 priv->speed = speed[boards_found];
633 priv->duplex = duplex[boards_found];
634 priv->debug = debug;
635 }
6aa20a22 636
1da177e4
LT		 637 /* This will be used when we get an adapter error from
638 * within our irq handler */
c4028958 639 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work);
1da177e4
LT		 640
641 spin_lock_init(&priv->lock);
6aa20a22 642
1da177e4
LT		 643 rc = TLan_Init(dev);
644 if (rc) {
645 printk(KERN_ERR "TLAN: Could not set up device.\n");
646 goto err_out_free_dev;
647 }
648
649 rc = register_netdev(dev);
650 if (rc) {
651 printk(KERN_ERR "TLAN: Could not register device.\n");
652 goto err_out_uninit;
653 }
654
6aa20a22 655
1da177e4
LT		 656 TLanDevicesInstalled++;
657 boards_found++;
6aa20a22 658
1da177e4
LT		 659 /* pdev is NULL if this is an EISA device */
660 if (pdev)
661 tlan_have_pci++;
662 else {
663 priv->nextDevice = TLan_Eisa_Devices;
664 TLan_Eisa_Devices = dev;
665 tlan_have_eisa++;
666 }
6aa20a22 667
1da177e4
LT		 668 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
669 dev->name,
670 (int) dev->irq,
671 (int) dev->base_addr,
672 priv->adapter->deviceLabel,
673 priv->adapterRev);
674 return 0;
675
676err_out_uninit:
677 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
678 priv->dmaStorageDMA );
679err_out_free_dev:
680 free_netdev(dev);
681err_out_regions:
682#ifdef CONFIG_PCI
683 if (pdev)
684 pci_release_regions(pdev);
685#endif
686err_out:
687 if (pdev)
688 pci_disable_device(pdev);
689 return rc;
690}
691
692
693static void TLan_Eisa_Cleanup(void)
694{
695 struct net_device *dev;
696 TLanPrivateInfo *priv;
6aa20a22 697
1da177e4
LT		 698 while( tlan_have_eisa ) {
699 dev = TLan_Eisa_Devices;
700 priv = netdev_priv(dev);
701 if (priv->dmaStorage) {
702 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
703 }
704 release_region( dev->base_addr, 0x10);
705 unregister_netdev( dev );
706 TLan_Eisa_Devices = priv->nextDevice;
707 free_netdev( dev );
708 tlan_have_eisa--;
709 }
710}
6aa20a22
JG		 711
712
1da177e4
LT		 713static void __exit tlan_exit(void)
714{
715 pci_unregister_driver(&tlan_driver);
716
717 if (tlan_have_eisa)
718 TLan_Eisa_Cleanup();
719
720 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
721
722}
723
724
725/* Module loading/unloading */
726module_init(tlan_probe);
727module_exit(tlan_exit);
728
729
730
731 /**************************************************************
732 * TLan_EisaProbe
733 *
734 * Returns: 0 on success, 1 otherwise
735 *
736 * Parms: None
737 *
738 *
6aa20a22
JG		 739 * This functions probes for EISA devices and calls
740 * TLan_probe1 when one is found.
1da177e4
LT		 741 *
742 *************************************************************/
743
6aa20a22 744static void __init TLan_EisaProbe (void)
1da177e4
LT		 745{
746 long ioaddr;
747 int rc = -ENODEV;
748 int irq;
749 u16 device_id;
750
6aa20a22 751 if (!EISA_bus) {
1da177e4
LT		 752 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
753 return;
754 }
6aa20a22 755
1da177e4
LT		 756 /* Loop through all slots of the EISA bus */
757 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
6aa20a22
JG		 758
759 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
1da177e4
LT		 760 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
761
762
763 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
764 (int) ioaddr);
6aa20a22 765 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
1da177e4
LT		 766 goto out;
767
6aa20a22 768 if (inw(ioaddr + EISA_ID) != 0x110E) {
1da177e4
LT		 769 release_region(ioaddr, 0x10);
770 goto out;
771 }
6aa20a22 772
1da177e4 773 device_id = inw(ioaddr + EISA_ID2);
6aa20a22 774 if (device_id != 0x20F1 && device_id != 0x40F1) {
1da177e4
LT		 775 release_region (ioaddr, 0x10);
776 goto out;
777 }
6aa20a22 778
1da177e4
LT		 779 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
780 release_region (ioaddr, 0x10);
781 goto out2;
782 }
6aa20a22
JG		 783
784 if (debug == 0x10)
1da177e4
LT		 785 printk("Found one\n");
786
787
788 /* Get irq from board */
789 switch (inb(ioaddr + 0xCC0)) {
790 case(0x10):
791 irq=5;
792 break;
793 case(0x20):
794 irq=9;
795 break;
796 case(0x40):
797 irq=10;
798 break;
799 case(0x80):
800 irq=11;
801 break;
802 default:
803 goto out;
6aa20a22
JG		 804 }
805
806
1da177e4
LT		 807 /* Setup the newly found eisa adapter */
808 rc = TLan_probe1( NULL, ioaddr, irq,
809 12, NULL);
810 continue;
6aa20a22 811
1da177e4
LT		 812 out:
813 if (debug == 0x10)
814 printk("None found\n");
815 continue;
816
817 out2: if (debug == 0x10)
818 printk("Card found but it is not enabled, skipping\n");
819 continue;
6aa20a22 820
1da177e4
LT		 821 }
822
823} /* TLan_EisaProbe */
824
825#ifdef CONFIG_NET_POLL_CONTROLLER
826static void TLan_Poll(struct net_device *dev)
827{
828 disable_irq(dev->irq);
7d12e780 829 TLan_HandleInterrupt(dev->irq, dev);
1da177e4
LT		 830 enable_irq(dev->irq);
831}
832#endif
833
6aa20a22 834
1da177e4
LT		 835
836
837 /***************************************************************
838 * TLan_Init
839 *
840 * Returns:
841 * 0 on success, error code otherwise.
842 * Parms:
843 * dev The structure of the device to be
844 * init'ed.
845 *
846 * This function completes the initialization of the
847 * device structure and driver. It reserves the IO
848 * addresses, allocates memory for the lists and bounce
849 * buffers, retrieves the MAC address from the eeprom
850 * and assignes the device's methods.
6aa20a22 851 *
1da177e4
LT		 852 **************************************************************/
853
854static int TLan_Init( struct net_device *dev )
855{
856 int dma_size;
857 int err;
858 int i;
859 TLanPrivateInfo *priv;
860
861 priv = netdev_priv(dev);
6aa20a22 862
1da177e4
LT		 863 if ( bbuf ) {
864 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
865 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
866 } else {
867 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
868 * ( sizeof(TLanList) );
869 }
870 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, dma_size, &priv->dmaStorageDMA);
871 priv->dmaSize = dma_size;
6aa20a22 872
1da177e4
LT		 873 if ( priv->dmaStorage == NULL ) {
874 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
875 dev->name );
876 return -ENOMEM;
877 }
878 memset( priv->dmaStorage, 0, dma_size );
6aa20a22 879 priv->rxList = (TLanList *)
1da177e4
LT		 880 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
881 priv->rxListDMA = ( ( ( (u32) priv->dmaStorageDMA ) + 7 ) & 0xFFFFFFF8 );
882 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
883 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
884 if ( bbuf ) {
885 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
886 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
887 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
888 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
889 }
890
891 err = 0;
892 for ( i = 0; i < 6 ; i++ )
893 err |= TLan_EeReadByte( dev,
894 (u8) priv->adapter->addrOfs + i,
895 (u8 *) &dev->dev_addr[i] );
896 if ( err ) {
897 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
898 dev->name,
899 err );
900 }
901 dev->addr_len = 6;
902
903 netif_carrier_off(dev);
904
905 /* Device methods */
906 dev->open = &TLan_Open;
907 dev->hard_start_xmit = &TLan_StartTx;
908 dev->stop = &TLan_Close;
909 dev->get_stats = &TLan_GetStats;
910 dev->set_multicast_list = &TLan_SetMulticastList;
911 dev->do_ioctl = &TLan_ioctl;
912#ifdef CONFIG_NET_POLL_CONTROLLER
913 dev->poll_controller = &TLan_Poll;
914#endif
915 dev->tx_timeout = &TLan_tx_timeout;
916 dev->watchdog_timeo = TX_TIMEOUT;
917
918 return 0;
919
920} /* TLan_Init */
921
922
923
924
925 /***************************************************************
926 * TLan_Open
927 *
928 * Returns:
929 * 0 on success, error code otherwise.
930 * Parms:
931 * dev Structure of device to be opened.
932 *
933 * This routine puts the driver and TLAN adapter in a
934 * state where it is ready to send and receive packets.
935 * It allocates the IRQ, resets and brings the adapter
936 * out of reset, and allows interrupts. It also delays
937 * the startup for autonegotiation or sends a Rx GO
938 * command to the adapter, as appropriate.
939 *
940 **************************************************************/
941
942static int TLan_Open( struct net_device *dev )
943{
944 TLanPrivateInfo *priv = netdev_priv(dev);
945 int err;
6aa20a22 946
1da177e4 947 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
1fb9df5d 948 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED, TLanSignature, dev );
6aa20a22 949
1da177e4
LT		 950 if ( err ) {
951 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
952 return err;
953 }
6aa20a22 954
1da177e4
LT		 955 init_timer(&priv->timer);
956 netif_start_queue(dev);
6aa20a22 957
1da177e4
LT		 958 /* NOTE: It might not be necessary to read the stats before a
959 reset if you don't care what the values are.
960 */
961 TLan_ResetLists( dev );
962 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
963 TLan_ResetAdapter( dev );
964
965 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
966
967 return 0;
968
969} /* TLan_Open */
970
971
972
973 /**************************************************************
974 * TLan_ioctl
6aa20a22 975 *
1da177e4
LT		 976 * Returns:
977 * 0 on success, error code otherwise
978 * Params:
979 * dev structure of device to receive ioctl.
6aa20a22 980 *
1da177e4
LT		 981 * rq ifreq structure to hold userspace data.
982 *
983 * cmd ioctl command.
984 *
985 *
986 *************************************************************/
987
988static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
989{
990 TLanPrivateInfo *priv = netdev_priv(dev);
991 struct mii_ioctl_data *data = if_mii(rq);
992 u32 phy = priv->phy[priv->phyNum];
6aa20a22 993
1da177e4
LT		 994 if (!priv->phyOnline)
995 return -EAGAIN;
996
997 switch(cmd) {
998 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
999 data->phy_id = phy;
1000
1001
1002 case SIOCGMIIREG: /* Read MII PHY register. */
1003 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out);
1004 return 0;
6aa20a22 1005
1da177e4
LT		 1006
1007 case SIOCSMIIREG: /* Write MII PHY register. */
1008 if (!capable(CAP_NET_ADMIN))
1009 return -EPERM;
1010 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1011 return 0;
1012 default:
1013 return -EOPNOTSUPP;
1014 }
1015} /* tlan_ioctl */
1016
1017
1018 /***************************************************************
1019 * TLan_tx_timeout
1020 *
1021 * Returns: nothing
1022 *
1023 * Params:
6aa20a22 1024 * dev structure of device which timed out
1da177e4
LT		 1025 * during transmit.
1026 *
1027 **************************************************************/
1028
1029static void TLan_tx_timeout(struct net_device *dev)
1030{
6aa20a22 1031
1da177e4 1032 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
6aa20a22 1033
1da177e4
LT		 1034 /* Ok so we timed out, lets see what we can do about it...*/
1035 TLan_FreeLists( dev );
6aa20a22 1036 TLan_ResetLists( dev );
1da177e4
LT		 1037 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1038 TLan_ResetAdapter( dev );
1039 dev->trans_start = jiffies;
6aa20a22 1040 netif_wake_queue( dev );
1da177e4
LT		 1041
1042}
6aa20a22 1043
1da177e4 1044
c4028958
DH		 1045 /***************************************************************
1046 * TLan_tx_timeout_work
1047 *
1048 * Returns: nothing
1049 *
1050 * Params:
1051 * work work item of device which timed out
1052 *
1053 **************************************************************/
1054
1055static void TLan_tx_timeout_work(struct work_struct *work)
1056{
1057 TLanPrivateInfo *priv =
1058 container_of(work, TLanPrivateInfo, tlan_tqueue);
1059
1060 TLan_tx_timeout(priv->dev);
1061}
1062
1063
1da177e4
LT		 1064
1065 /***************************************************************
1066 * TLan_StartTx
6aa20a22 1067 *
1da177e4
LT		 1068 * Returns:
1069 * 0 on success, non-zero on failure.
1070 * Parms:
1071 * skb A pointer to the sk_buff containing the
1072 * frame to be sent.
1073 * dev The device to send the data on.
1074 *
1075 * This function adds a frame to the Tx list to be sent
1076 * ASAP. First it verifies that the adapter is ready and
1077 * there is room in the queue. Then it sets up the next
1078 * available list, copies the frame to the corresponding
1079 * buffer. If the adapter Tx channel is idle, it gives
1080 * the adapter a Tx Go command on the list, otherwise it
1081 * sets the forward address of the previous list to point
1082 * to this one. Then it frees the sk_buff.
1083 *
1084 **************************************************************/
1085
1086static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1087{
1088 TLanPrivateInfo *priv = netdev_priv(dev);
1089 TLanList *tail_list;
1090 dma_addr_t tail_list_phys;
1091 u8 *tail_buffer;
1092 int pad;
1093 unsigned long flags;
1094
1095 if ( ! priv->phyOnline ) {
1096 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name );
1097 dev_kfree_skb_any(skb);
1098 return 0;
1099 }
1100
1101 tail_list = priv->txList + priv->txTail;
1102 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
6aa20a22 1103
1da177e4
LT		 1104 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1105 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
1106 netif_stop_queue(dev);
1107 priv->txBusyCount++;
1108 return 1;
1109 }
1110
1111 tail_list->forward = 0;
1112
1113 if ( bbuf ) {
1114 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
d626f62b 1115 skb_copy_from_linear_data(skb, tail_buffer, skb->len);
1da177e4
LT		 1116 } else {
1117 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE);
1118 TLan_StoreSKB(tail_list, skb);
1119 }
1120
1121 pad = TLAN_MIN_FRAME_SIZE - skb->len;
1122
1123 if ( pad > 0 ) {
1124 tail_list->frameSize = (u16) skb->len + pad;
1125 tail_list->buffer[0].count = (u32) skb->len;
1126 tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad;
1127 tail_list->buffer[1].address = TLanPadBufferDMA;
1128 } else {
1129 tail_list->frameSize = (u16) skb->len;
1130 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1131 tail_list->buffer[1].count = 0;
1132 tail_list->buffer[1].address = 0;
1133 }
1134
1135 spin_lock_irqsave(&priv->lock, flags);
1136 tail_list->cStat = TLAN_CSTAT_READY;
1137 if ( ! priv->txInProgress ) {
1138 priv->txInProgress = 1;
1139 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1140 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1141 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1142 } else {
1143 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
1144 if ( priv->txTail == 0 ) {
1145 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys;
1146 } else {
1147 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys;
1148 }
1149 }
1150 spin_unlock_irqrestore(&priv->lock, flags);
1151
1152 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1153
1154 if ( bbuf )
1155 dev_kfree_skb_any(skb);
6aa20a22 1156
1da177e4
LT		 1157 dev->trans_start = jiffies;
1158 return 0;
1159
1160} /* TLan_StartTx */
1161
1162
1163
1164
1165 /***************************************************************
1166 * TLan_HandleInterrupt
6aa20a22
JG		 1167 *
1168 * Returns:
1da177e4
LT		 1169 * Nothing
1170 * Parms:
1171 * irq The line on which the interrupt
1172 * occurred.
1173 * dev_id A pointer to the device assigned to
1174 * this irq line.
1da177e4
LT		 1175 *
1176 * This function handles an interrupt generated by its
1177 * assigned TLAN adapter. The function deactivates
1178 * interrupts on its adapter, records the type of
1179 * interrupt, executes the appropriate subhandler, and
1180 * acknowdges the interrupt to the adapter (thus
1181 * re-enabling adapter interrupts.
1182 *
1183 **************************************************************/
1184
7d12e780 1185static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id)
1da177e4
LT		 1186{
1187 u32 ack;
1188 struct net_device *dev;
1189 u32 host_cmd;
1190 u16 host_int;
1191 int type;
1192 TLanPrivateInfo *priv;
1193
1194 dev = dev_id;
1195 priv = netdev_priv(dev);
1196
1197 spin_lock(&priv->lock);
1198
1199 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1200 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1201
1202 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
1203
1204 ack = TLanIntVector[type]( dev, host_int );
1205
1206 if ( ack ) {
1207 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1208 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1209 }
1210
1211 spin_unlock(&priv->lock);
1212
1213 return IRQ_HANDLED;
1214} /* TLan_HandleInterrupts */
1215
1216
1217
1218
1219 /***************************************************************
1220 * TLan_Close
6aa20a22 1221 *
1da177e4
LT		 1222 * Returns:
1223 * An error code.
1224 * Parms:
1225 * dev The device structure of the device to
1226 * close.
1227 *
1228 * This function shuts down the adapter. It records any
1229 * stats, puts the adapter into reset state, deactivates
1230 * its time as needed, and frees the irq it is using.
1231 *
1232 **************************************************************/
1233
1234static int TLan_Close(struct net_device *dev)
1235{
1236 TLanPrivateInfo *priv = netdev_priv(dev);
1237
1238 netif_stop_queue(dev);
1239 priv->neg_be_verbose = 0;
1240
1241 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1242 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1243 if ( priv->timer.function != NULL ) {
1244 del_timer_sync( &priv->timer );
1245 priv->timer.function = NULL;
1246 }
6aa20a22 1247
1da177e4
LT		 1248 free_irq( dev->irq, dev );
1249 TLan_FreeLists( dev );
1250 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1251
1252 return 0;
1253
1254} /* TLan_Close */
1255
1256
1257
1258
1259 /***************************************************************
1260 * TLan_GetStats
6aa20a22 1261 *
1da177e4
LT		 1262 * Returns:
1263 * A pointer to the device's statistics structure.
1264 * Parms:
1265 * dev The device structure to return the
1266 * stats for.
1267 *
1268 * This function updates the devices statistics by reading
1269 * the TLAN chip's onboard registers. Then it returns the
1270 * address of the statistics structure.
1271 *
1272 **************************************************************/
1273
1274static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1275{
1276 TLanPrivateInfo *priv = netdev_priv(dev);
1277 int i;
1278
1279 /* Should only read stats if open ? */
1280 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1281
1282 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
1283 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
1284 if ( debug & TLAN_DEBUG_GNRL ) {
1285 TLan_PrintDio( dev->base_addr );
6aa20a22 1286 TLan_PhyPrint( dev );
1da177e4
LT		 1287 }
1288 if ( debug & TLAN_DEBUG_LIST ) {
1289 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1290 TLan_PrintList( priv->rxList + i, "RX", i );
1291 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1292 TLan_PrintList( priv->txList + i, "TX", i );
1293 }
6aa20a22 1294
1da177e4
LT		 1295 return ( &( (TLanPrivateInfo *) netdev_priv(dev) )->stats );
1296
1297} /* TLan_GetStats */
1298
1299
1300
1301
1302 /***************************************************************
1303 * TLan_SetMulticastList
6aa20a22 1304 *
1da177e4
LT		 1305 * Returns:
1306 * Nothing
1307 * Parms:
1308 * dev The device structure to set the
1309 * multicast list for.
1310 *
1311 * This function sets the TLAN adaptor to various receive
1312 * modes. If the IFF_PROMISC flag is set, promiscuous
1313 * mode is acitviated. Otherwise, promiscuous mode is
1314 * turned off. If the IFF_ALLMULTI flag is set, then
1315 * the hash table is set to receive all group addresses.
1316 * Otherwise, the first three multicast addresses are
1317 * stored in AREG_1-3, and the rest are selected via the
1318 * hash table, as necessary.
1319 *
1320 **************************************************************/
1321
1322static void TLan_SetMulticastList( struct net_device *dev )
6aa20a22 1323{
1da177e4
LT		 1324 struct dev_mc_list *dmi = dev->mc_list;
1325 u32 hash1 = 0;
1326 u32 hash2 = 0;
1327 int i;
1328 u32 offset;
1329 u8 tmp;
1330
1331 if ( dev->flags & IFF_PROMISC ) {
1332 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1333 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1334 } else {
1335 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1336 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1337 if ( dev->flags & IFF_ALLMULTI ) {
6aa20a22 1338 for ( i = 0; i < 3; i++ )
1da177e4
LT		 1339 TLan_SetMac( dev, i + 1, NULL );
1340 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1341 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1342 } else {
1343 for ( i = 0; i < dev->mc_count; i++ ) {
1344 if ( i < 3 ) {
1345 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1346 } else {
1347 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
6aa20a22 1348 if ( offset < 32 )
1da177e4
LT		 1349 hash1 |= ( 1 << offset );
1350 else
1351 hash2 |= ( 1 << ( offset - 32 ) );
1352 }
1353 dmi = dmi->next;
1354 }
6aa20a22 1355 for ( ; i < 3; i++ )
1da177e4
LT		 1356 TLan_SetMac( dev, i + 1, NULL );
1357 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1358 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1359 }
1360 }
1361
1362} /* TLan_SetMulticastList */
1363
1364
1365
1366/*****************************************************************************
1367******************************************************************************
1368
1369 ThunderLAN Driver Interrupt Vectors and Table
1370
1371 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1372 Programmer's Guide" for more informations on handling interrupts
6aa20a22 1373 generated by TLAN based adapters.
1da177e4
LT		 1374
1375******************************************************************************
1376*****************************************************************************/
1377
1378
1379 /***************************************************************
1380 * TLan_HandleInvalid
1381 *
1382 * Returns:
1383 * 0
1384 * Parms:
1385 * dev Device assigned the IRQ that was
1386 * raised.
1387 * host_int The contents of the HOST_INT
1388 * port.
1389 *
1390 * This function handles invalid interrupts. This should
1391 * never happen unless some other adapter is trying to use
1392 * the IRQ line assigned to the device.
1393 *
1394 **************************************************************/
1395
1396u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
1397{
1398 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1399 return 0;
1400
1401} /* TLan_HandleInvalid */
1402
1403
1404
1405
1406 /***************************************************************
1407 * TLan_HandleTxEOF
1408 *
1409 * Returns:
1410 * 1
1411 * Parms:
1412 * dev Device assigned the IRQ that was
1413 * raised.
1414 * host_int The contents of the HOST_INT
1415 * port.
1416 *
1417 * This function handles Tx EOF interrupts which are raised
1418 * by the adapter when it has completed sending the
1419 * contents of a buffer. If detemines which list/buffer
1420 * was completed and resets it. If the buffer was the last
1421 * in the channel (EOC), then the function checks to see if
1422 * another buffer is ready to send, and if so, sends a Tx
1423 * Go command. Finally, the driver activates/continues the
1424 * activity LED.
1425 *
1426 **************************************************************/
1427
1428u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1429{
1430 TLanPrivateInfo *priv = netdev_priv(dev);
1431 int eoc = 0;
1432 TLanList *head_list;
1433 dma_addr_t head_list_phys;
1434 u32 ack = 0;
1435 u16 tmpCStat;
6aa20a22 1436
1da177e4
LT		 1437 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1438 head_list = priv->txList + priv->txHead;
1439
1440 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1441 ack++;
1442 if ( ! bbuf ) {
1443 struct sk_buff *skb = TLan_GetSKB(head_list);
1444 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
1445 dev_kfree_skb_any(skb);
1446 head_list->buffer[8].address = 0;
1447 head_list->buffer[9].address = 0;
1448 }
6aa20a22 1449
1da177e4
LT		 1450 if ( tmpCStat & TLAN_CSTAT_EOC )
1451 eoc = 1;
6aa20a22 1452
1da177e4
LT		 1453 priv->stats.tx_bytes += head_list->frameSize;
1454
1455 head_list->cStat = TLAN_CSTAT_UNUSED;
6aa20a22
JG		 1456 netif_start_queue(dev);
1457 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1da177e4
LT		 1458 head_list = priv->txList + priv->txHead;
1459 }
1460
1461 if (!ack)
1462 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
6aa20a22 1463
1da177e4
LT		 1464 if ( eoc ) {
1465 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1466 head_list = priv->txList + priv->txHead;
1467 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1468 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1469 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1470 ack |= TLAN_HC_GO;
1471 } else {
1472 priv->txInProgress = 0;
1473 }
1474 }
6aa20a22 1475
1da177e4
LT		 1476 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1477 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1478 if ( priv->timer.function == NULL ) {
1479 priv->timer.function = &TLan_Timer;
1480 priv->timer.data = (unsigned long) dev;
1481 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1482 priv->timerSetAt = jiffies;
1483 priv->timerType = TLAN_TIMER_ACTIVITY;
1484 add_timer(&priv->timer);
1485 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1486 priv->timerSetAt = jiffies;
1487 }
1488 }
1489
1490 return ack;
1491
1492} /* TLan_HandleTxEOF */
1493
1494
1495
1496
1497 /***************************************************************
1498 * TLan_HandleStatOverflow
1499 *
1500 * Returns:
1501 * 1
1502 * Parms:
1503 * dev Device assigned the IRQ that was
1504 * raised.
1505 * host_int The contents of the HOST_INT
1506 * port.
1507 *
1508 * This function handles the Statistics Overflow interrupt
1509 * which means that one or more of the TLAN statistics
1510 * registers has reached 1/2 capacity and needs to be read.
1511 *
1512 **************************************************************/
1513
1514u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1515{
1516 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1517
1518 return 1;
1519
1520} /* TLan_HandleStatOverflow */
1521
1522
1523
1524
1525 /***************************************************************
1526 * TLan_HandleRxEOF
1527 *
1528 * Returns:
1529 * 1
1530 * Parms:
1531 * dev Device assigned the IRQ that was
1532 * raised.
1533 * host_int The contents of the HOST_INT
1534 * port.
1535 *
1536 * This function handles the Rx EOF interrupt which
1537 * indicates a frame has been received by the adapter from
1538 * the net and the frame has been transferred to memory.
1539 * The function determines the bounce buffer the frame has
1540 * been loaded into, creates a new sk_buff big enough to
1541 * hold the frame, and sends it to protocol stack. It
1542 * then resets the used buffer and appends it to the end
1543 * of the list. If the frame was the last in the Rx
1544 * channel (EOC), the function restarts the receive channel
1545 * by sending an Rx Go command to the adapter. Then it
1546 * activates/continues the activity LED.
1547 *
1548 **************************************************************/
1549
1550u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1551{
1552 TLanPrivateInfo *priv = netdev_priv(dev);
1553 u32 ack = 0;
1554 int eoc = 0;
1555 u8 *head_buffer;
1556 TLanList *head_list;
1557 struct sk_buff *skb;
1558 TLanList *tail_list;
1559 void *t;
1560 u32 frameSize;
1561 u16 tmpCStat;
1562 dma_addr_t head_list_phys;
1563
1564 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1565 head_list = priv->rxList + priv->rxHead;
1566 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
6aa20a22 1567
1da177e4
LT		 1568 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1569 frameSize = head_list->frameSize;
1570 ack++;
1571 if (tmpCStat & TLAN_CSTAT_EOC)
1572 eoc = 1;
6aa20a22 1573
1da177e4
LT		 1574 if (bbuf) {
1575 skb = dev_alloc_skb(frameSize + 7);
1576 if (skb == NULL)
1577 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n");
1578 else {
1579 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1da177e4
LT		 1580 skb_reserve(skb, 2);
1581 t = (void *) skb_put(skb, frameSize);
6aa20a22 1582
1da177e4
LT		 1583 priv->stats.rx_bytes += head_list->frameSize;
1584
1585 memcpy( t, head_buffer, frameSize );
1586 skb->protocol = eth_type_trans( skb, dev );
1587 netif_rx( skb );
1588 }
1589 } else {
1590 struct sk_buff *new_skb;
6aa20a22 1591
1da177e4
LT		 1592 /*
1593 * I changed the algorithm here. What we now do
1594 * is allocate the new frame. If this fails we
1595 * simply recycle the frame.
1596 */
6aa20a22 1597
1da177e4 1598 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
6aa20a22 1599
1da177e4
LT		 1600 if ( new_skb != NULL ) {
1601 skb = TLan_GetSKB(head_list);
1602 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1603 skb_trim( skb, frameSize );
1604
1605 priv->stats.rx_bytes += frameSize;
1606
1607 skb->protocol = eth_type_trans( skb, dev );
1608 netif_rx( skb );
6aa20a22 1609
1da177e4
LT		 1610 skb_reserve( new_skb, 2 );
1611 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE );
1612 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1613 head_list->buffer[8].address = (u32) t;
1614 TLan_StoreSKB(head_list, new_skb);
6aa20a22 1615 } else
1da177e4
LT		 1616 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" );
1617 }
1618
1619 head_list->forward = 0;
1620 head_list->cStat = 0;
1621 tail_list = priv->rxList + priv->rxTail;
1622 tail_list->forward = head_list_phys;
1623
1624 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1625 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1626 head_list = priv->rxList + priv->rxHead;
1627 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1628 }
1629
1630 if (!ack)
1631 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1da177e4
LT		 1632
1633
1634
6aa20a22
JG		 1635
1636 if ( eoc ) {
1da177e4
LT		 1637 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1638 head_list = priv->rxList + priv->rxHead;
1639 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1640 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1641 ack |= TLAN_HC_GO | TLAN_HC_RT;
1642 priv->rxEocCount++;
1643 }
1644
1645 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1646 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1647 if ( priv->timer.function == NULL ) {
1648 priv->timer.function = &TLan_Timer;
1649 priv->timer.data = (unsigned long) dev;
1650 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1651 priv->timerSetAt = jiffies;
1652 priv->timerType = TLAN_TIMER_ACTIVITY;
1653 add_timer(&priv->timer);
1654 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1655 priv->timerSetAt = jiffies;
1656 }
1657 }
1658
1659 dev->last_rx = jiffies;
6aa20a22 1660
1da177e4
LT		 1661 return ack;
1662
1663} /* TLan_HandleRxEOF */
1664
1665
1666
1667
1668 /***************************************************************
1669 * TLan_HandleDummy
1670 *
1671 * Returns:
1672 * 1
1673 * Parms:
1674 * dev Device assigned the IRQ that was
1675 * raised.
1676 * host_int The contents of the HOST_INT
1677 * port.
1678 *
1679 * This function handles the Dummy interrupt, which is
1680 * raised whenever a test interrupt is generated by setting
1681 * the Req_Int bit of HOST_CMD to 1.
1682 *
1683 **************************************************************/
1684
1685u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1686{
1687 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1688 return 1;
1689
1690} /* TLan_HandleDummy */
1691
1692
1693
1694
1695 /***************************************************************
1696 * TLan_HandleTxEOC
1697 *
1698 * Returns:
1699 * 1
1700 * Parms:
1701 * dev Device assigned the IRQ that was
1702 * raised.
1703 * host_int The contents of the HOST_INT
1704 * port.
1705 *
1706 * This driver is structured to determine EOC occurrences by
1707 * reading the CSTAT member of the list structure. Tx EOC
1708 * interrupts are disabled via the DIO INTDIS register.
1709 * However, TLAN chips before revision 3.0 didn't have this
1710 * functionality, so process EOC events if this is the
1711 * case.
1712 *
1713 **************************************************************/
1714
1715u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1716{
1717 TLanPrivateInfo *priv = netdev_priv(dev);
1718 TLanList *head_list;
1719 dma_addr_t head_list_phys;
1720 u32 ack = 1;
6aa20a22 1721
1da177e4
LT		 1722 host_int = 0;
1723 if ( priv->tlanRev < 0x30 ) {
1724 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1725 head_list = priv->txList + priv->txHead;
1726 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1727 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1728 netif_stop_queue(dev);
1729 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1730 ack |= TLAN_HC_GO;
1731 } else {
1732 priv->txInProgress = 0;
1733 }
1734 }
1735
1736 return ack;
1737
1738} /* TLan_HandleTxEOC */
1739
1740
1741
1742
1743 /***************************************************************
1744 * TLan_HandleStatusCheck
1745 *
1746 * Returns:
1747 * 0 if Adapter check, 1 if Network Status check.
1748 * Parms:
1749 * dev Device assigned the IRQ that was
1750 * raised.
1751 * host_int The contents of the HOST_INT
1752 * port.
1753 *
1754 * This function handles Adapter Check/Network Status
1755 * interrupts generated by the adapter. It checks the
1756 * vector in the HOST_INT register to determine if it is
1757 * an Adapter Check interrupt. If so, it resets the
1758 * adapter. Otherwise it clears the status registers
1759 * and services the PHY.
1760 *
1761 **************************************************************/
1762
1763u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
6aa20a22 1764{
1da177e4
LT		 1765 TLanPrivateInfo *priv = netdev_priv(dev);
1766 u32 ack;
1767 u32 error;
1768 u8 net_sts;
1769 u32 phy;
1770 u16 tlphy_ctl;
1771 u16 tlphy_sts;
6aa20a22 1772
1da177e4
LT		 1773 ack = 1;
1774 if ( host_int & TLAN_HI_IV_MASK ) {
1775 netif_stop_queue( dev );
1776 error = inl( dev->base_addr + TLAN_CH_PARM );
1777 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1778 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1779 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1780
1781 schedule_work(&priv->tlan_tqueue);
1782
1783 netif_wake_queue(dev);
1784 ack = 0;
1785 } else {
1786 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1787 phy = priv->phy[priv->phyNum];
1788
1789 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1790 if ( net_sts ) {
1791 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1792 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1793 }
1794 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1795 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1796 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1797 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1798 tlphy_ctl |= TLAN_TC_SWAPOL;
1799 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1800 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1801 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1802 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1803 }
1804
1805 if (debug) {
6aa20a22 1806 TLan_PhyPrint( dev );
1da177e4
LT		 1807 }
1808 }
1809 }
1810
1811 return ack;
1812
1813} /* TLan_HandleStatusCheck */
1814
1815
1816
1817
1818 /***************************************************************
1819 * TLan_HandleRxEOC
1820 *
1821 * Returns:
1822 * 1
1823 * Parms:
1824 * dev Device assigned the IRQ that was
1825 * raised.
1826 * host_int The contents of the HOST_INT
1827 * port.
1828 *
1829 * This driver is structured to determine EOC occurrences by
1830 * reading the CSTAT member of the list structure. Rx EOC
1831 * interrupts are disabled via the DIO INTDIS register.
1832 * However, TLAN chips before revision 3.0 didn't have this
1833 * CSTAT member or a INTDIS register, so if this chip is
1834 * pre-3.0, process EOC interrupts normally.
1835 *
1836 **************************************************************/
1837
1838u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1839{
1840 TLanPrivateInfo *priv = netdev_priv(dev);
1841 dma_addr_t head_list_phys;
1842 u32 ack = 1;
1843
1844 if ( priv->tlanRev < 0x30 ) {
1845 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1846 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1847 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1848 ack |= TLAN_HC_GO | TLAN_HC_RT;
1849 priv->rxEocCount++;
1850 }
1851
1852 return ack;
1853
1854} /* TLan_HandleRxEOC */
1855
1856
1857
1858
1859/*****************************************************************************
1860******************************************************************************
1861
1862 ThunderLAN Driver Timer Function
1863
1864******************************************************************************
1865*****************************************************************************/
1866
1867
1868 /***************************************************************
1869 * TLan_Timer
1870 *
1871 * Returns:
1872 * Nothing
1873 * Parms:
1874 * data A value given to add timer when
1875 * add_timer was called.
1876 *
1877 * This function handles timed functionality for the
1878 * TLAN driver. The two current timer uses are for
1879 * delaying for autonegotionation and driving the ACT LED.
1880 * - Autonegotiation requires being allowed about
1881 * 2 1/2 seconds before attempting to transmit a
1882 * packet. It would be a very bad thing to hang
1883 * the kernel this long, so the driver doesn't
1884 * allow transmission 'til after this time, for
1885 * certain PHYs. It would be much nicer if all
1886 * PHYs were interrupt-capable like the internal
1887 * PHY.
1888 * - The ACT LED, which shows adapter activity, is
1889 * driven by the driver, and so must be left on
1890 * for a short period to power up the LED so it
1891 * can be seen. This delay can be changed by
1892 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1893 * if desired. 100 ms produces a slightly
1894 * sluggish response.
1895 *
1896 **************************************************************/
1897
1898void TLan_Timer( unsigned long data )
1899{
1900 struct net_device *dev = (struct net_device *) data;
1901 TLanPrivateInfo *priv = netdev_priv(dev);
1902 u32 elapsed;
1903 unsigned long flags = 0;
1904
1905 priv->timer.function = NULL;
1906
1907 switch ( priv->timerType ) {
6aa20a22 1908#ifdef MONITOR
1da177e4
LT		 1909 case TLAN_TIMER_LINK_BEAT:
1910 TLan_PhyMonitor( dev );
1911 break;
1912#endif
1913 case TLAN_TIMER_PHY_PDOWN:
1914 TLan_PhyPowerDown( dev );
1915 break;
1916 case TLAN_TIMER_PHY_PUP:
1917 TLan_PhyPowerUp( dev );
1918 break;
1919 case TLAN_TIMER_PHY_RESET:
1920 TLan_PhyReset( dev );
1921 break;
1922 case TLAN_TIMER_PHY_START_LINK:
1923 TLan_PhyStartLink( dev );
1924 break;
1925 case TLAN_TIMER_PHY_FINISH_AN:
1926 TLan_PhyFinishAutoNeg( dev );
1927 break;
1928 case TLAN_TIMER_FINISH_RESET:
1929 TLan_FinishReset( dev );
1930 break;
1931 case TLAN_TIMER_ACTIVITY:
1932 spin_lock_irqsave(&priv->lock, flags);
1933 if ( priv->timer.function == NULL ) {
1934 elapsed = jiffies - priv->timerSetAt;
1935 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1936 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1937 } else {
1938 priv->timer.function = &TLan_Timer;
1939 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1940 spin_unlock_irqrestore(&priv->lock, flags);
1941 add_timer( &priv->timer );
1942 break;
1943 }
1944 }
1945 spin_unlock_irqrestore(&priv->lock, flags);
1946 break;
1947 default:
1948 break;
1949 }
1950
1951} /* TLan_Timer */
1952
1953
1954
1955
1956/*****************************************************************************
1957******************************************************************************
1958
1959 ThunderLAN Driver Adapter Related Routines
1960
1961******************************************************************************
1962*****************************************************************************/
1963
1964
1965 /***************************************************************
1966 * TLan_ResetLists
6aa20a22 1967 *
1da177e4
LT		 1968 * Returns:
1969 * Nothing
1970 * Parms:
1971 * dev The device structure with the list
1972 * stuctures to be reset.
1973 *
1974 * This routine sets the variables associated with managing
1975 * the TLAN lists to their initial values.
1976 *
1977 **************************************************************/
1978
1979void TLan_ResetLists( struct net_device *dev )
1980{
1981 TLanPrivateInfo *priv = netdev_priv(dev);
1982 int i;
1983 TLanList *list;
1984 dma_addr_t list_phys;
1985 struct sk_buff *skb;
1986 void *t = NULL;
1987
1988 priv->txHead = 0;
1989 priv->txTail = 0;
1990 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1991 list = priv->txList + i;
1992 list->cStat = TLAN_CSTAT_UNUSED;
1993 if ( bbuf ) {
1994 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1995 } else {
1996 list->buffer[0].address = 0;
1997 }
1998 list->buffer[2].count = 0;
1999 list->buffer[2].address = 0;
2000 list->buffer[8].address = 0;
2001 list->buffer[9].address = 0;
2002 }
2003
2004 priv->rxHead = 0;
2005 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
2006 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2007 list = priv->rxList + i;
2008 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
2009 list->cStat = TLAN_CSTAT_READY;
2010 list->frameSize = TLAN_MAX_FRAME_SIZE;
2011 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
2012 if ( bbuf ) {
2013 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
2014 } else {
2015 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
2016 if ( skb == NULL ) {
2017 printk( "TLAN: Couldn't allocate memory for received data.\n" );
2018 /* If this ever happened it would be a problem */
2019 } else {
2020 skb->dev = dev;
2021 skb_reserve( skb, 2 );
2022 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
2023 }
2024 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2025 list->buffer[8].address = (u32) t;
2026 TLan_StoreSKB(list, skb);
2027 }
2028 list->buffer[1].count = 0;
2029 list->buffer[1].address = 0;
2030 if ( i < TLAN_NUM_RX_LISTS - 1 )
2031 list->forward = list_phys + sizeof(TLanList);
2032 else
2033 list->forward = 0;
2034 }
2035
2036} /* TLan_ResetLists */
2037
2038
2039void TLan_FreeLists( struct net_device *dev )
2040{
2041 TLanPrivateInfo *priv = netdev_priv(dev);
2042 int i;
2043 TLanList *list;
2044 struct sk_buff *skb;
2045
2046 if ( ! bbuf ) {
2047 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2048 list = priv->txList + i;
2049 skb = TLan_GetSKB(list);
2050 if ( skb ) {
2051 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
2052 dev_kfree_skb_any( skb );
2053 list->buffer[8].address = 0;
2054 list->buffer[9].address = 0;
2055 }
2056 }
2057
2058 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2059 list = priv->rxList + i;
2060 skb = TLan_GetSKB(list);
2061 if ( skb ) {
2062 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2063 dev_kfree_skb_any( skb );
2064 list->buffer[8].address = 0;
2065 list->buffer[9].address = 0;
2066 }
2067 }
2068 }
2069} /* TLan_FreeLists */
2070
2071
2072
2073
2074 /***************************************************************
2075 * TLan_PrintDio
6aa20a22 2076 *
1da177e4
LT		 2077 * Returns:
2078 * Nothing
2079 * Parms:
2080 * io_base Base IO port of the device of
2081 * which to print DIO registers.
2082 *
2083 * This function prints out all the internal (DIO)
2084 * registers of a TLAN chip.
2085 *
2086 **************************************************************/
2087
2088void TLan_PrintDio( u16 io_base )
2089{
2090 u32 data0, data1;
2091 int i;
2092
2093 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
2094 printk( "TLAN: Off. +0 +4\n" );
2095 for ( i = 0; i < 0x4C; i+= 8 ) {
2096 data0 = TLan_DioRead32( io_base, i );
2097 data1 = TLan_DioRead32( io_base, i + 0x4 );
2098 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2099 }
2100
2101} /* TLan_PrintDio */
2102
2103
2104
2105
2106 /***************************************************************
2107 * TLan_PrintList
6aa20a22 2108 *
1da177e4
LT		 2109 * Returns:
2110 * Nothing
2111 * Parms:
2112 * list A pointer to the TLanList structure to
2113 * be printed.
2114 * type A string to designate type of list,
2115 * "Rx" or "Tx".
2116 * num The index of the list.
2117 *
2118 * This function prints out the contents of the list
2119 * pointed to by the list parameter.
2120 *
2121 **************************************************************/
2122
2123void TLan_PrintList( TLanList *list, char *type, int num)
2124{
2125 int i;
2126
2127 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
2128 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2129 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2130 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2131 /* for ( i = 0; i < 10; i++ ) { */
2132 for ( i = 0; i < 2; i++ ) {
2133 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
2134 }
2135
2136} /* TLan_PrintList */
2137
2138
2139
2140
2141 /***************************************************************
2142 * TLan_ReadAndClearStats
2143 *
2144 * Returns:
2145 * Nothing
2146 * Parms:
2147 * dev Pointer to device structure of adapter
2148 * to which to read stats.
6aa20a22 2149 * record Flag indicating whether to add
1da177e4
LT		 2150 *
2151 * This functions reads all the internal status registers
2152 * of the TLAN chip, which clears them as a side effect.
2153 * It then either adds the values to the device's status
2154 * struct, or discards them, depending on whether record
2155 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2156 *
2157 **************************************************************/
2158
2159void TLan_ReadAndClearStats( struct net_device *dev, int record )
2160{
2161 TLanPrivateInfo *priv = netdev_priv(dev);
2162 u32 tx_good, tx_under;
2163 u32 rx_good, rx_over;
2164 u32 def_tx, crc, code;
2165 u32 multi_col, single_col;
2166 u32 excess_col, late_col, loss;
2167
2168 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2169 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2170 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2171 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2172 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2173
2174 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2175 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2176 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2177 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2178 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2179
1da177e4
LT		 2180 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2181 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2182 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2183 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2184 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
6aa20a22 2185
1da177e4
LT		 2186 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2187 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2188 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2189 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2190 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2191
2192 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2193 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2194 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2195 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2196
2197 if ( record ) {
2198 priv->stats.rx_packets += rx_good;
2199 priv->stats.rx_errors += rx_over + crc + code;
2200 priv->stats.tx_packets += tx_good;
2201 priv->stats.tx_errors += tx_under + loss;
2202 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
2203
2204 priv->stats.rx_over_errors += rx_over;
2205 priv->stats.rx_crc_errors += crc;
2206 priv->stats.rx_frame_errors += code;
2207
2208 priv->stats.tx_aborted_errors += tx_under;
2209 priv->stats.tx_carrier_errors += loss;
2210 }
6aa20a22 2211
1da177e4
LT		 2212} /* TLan_ReadAndClearStats */
2213
2214
2215
2216
2217 /***************************************************************
2218 * TLan_Reset
2219 *
2220 * Returns:
2221 * 0
2222 * Parms:
2223 * dev Pointer to device structure of adapter
2224 * to be reset.
2225 *
2226 * This function resets the adapter and it's physical
2227 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2228 * Programmer's Guide" for details. The routine tries to
2229 * implement what is detailed there, though adjustments
2230 * have been made.
2231 *
2232 **************************************************************/
2233
2234void
2235TLan_ResetAdapter( struct net_device *dev )
2236{
2237 TLanPrivateInfo *priv = netdev_priv(dev);
2238 int i;
2239 u32 addr;
2240 u32 data;
2241 u8 data8;
2242
2243 priv->tlanFullDuplex = FALSE;
2244 priv->phyOnline=0;
2245 netif_carrier_off(dev);
2246
2247/* 1. Assert reset bit. */
2248
2249 data = inl(dev->base_addr + TLAN_HOST_CMD);
2250 data |= TLAN_HC_AD_RST;
2251 outl(data, dev->base_addr + TLAN_HOST_CMD);
6aa20a22 2252
1da177e4
LT		 2253 udelay(1000);
2254
2255/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2256
2257 data = inl(dev->base_addr + TLAN_HOST_CMD);
2258 data |= TLAN_HC_INT_OFF;
2259 outl(data, dev->base_addr + TLAN_HOST_CMD);
2260
2261/* 3. Clear AREGs and HASHs. */
2262
2263 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2264 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2265 }
2266
2267/* 4. Setup NetConfig register. */
2268
2269 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2270 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2271
2272/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2273
2274 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2275 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2276
2277/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2278
2279 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2280 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2281 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2282
2283/* 7. Setup the remaining registers. */
2284
2285 if ( priv->tlanRev >= 0x30 ) {
2286 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2287 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2288 }
2289 TLan_PhyDetect( dev );
2290 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
6aa20a22 2291
1da177e4
LT		 2292 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2293 data |= TLAN_NET_CFG_BIT;
2294 if ( priv->aui == 1 ) {
2295 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2296 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2297 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2298 priv->tlanFullDuplex = TRUE;
2299 } else {
2300 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2301 }
2302 }
2303
2304 if ( priv->phyNum == 0 ) {
2305 data |= TLAN_NET_CFG_PHY_EN;
2306 }
2307 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2308
2309 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2310 TLan_FinishReset( dev );
2311 } else {
2312 TLan_PhyPowerDown( dev );
2313 }
2314
2315} /* TLan_ResetAdapter */
2316
2317
2318
2319
2320void
2321TLan_FinishReset( struct net_device *dev )
2322{
2323 TLanPrivateInfo *priv = netdev_priv(dev);
2324 u8 data;
2325 u32 phy;
2326 u8 sio;
2327 u16 status;
2328 u16 partner;
2329 u16 tlphy_ctl;
2330 u16 tlphy_par;
2331 u16 tlphy_id1, tlphy_id2;
2332 int i;
2333
2334 phy = priv->phy[priv->phyNum];
2335
2336 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2337 if ( priv->tlanFullDuplex ) {
2338 data |= TLAN_NET_CMD_DUPLEX;
2339 }
2340 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
6aa20a22 2341 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
1da177e4 2342 if ( priv->phyNum == 0 ) {
6aa20a22 2343 data |= TLAN_NET_MASK_MASK7;
1da177e4
LT		 2344 }
2345 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2346 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2347 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2348 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
6aa20a22 2349
1da177e4
LT		 2350 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
2351 status = MII_GS_LINK;
2352 printk( "TLAN: %s: Link forced.\n", dev->name );
2353 } else {
2354 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2355 udelay( 1000 );
2356 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
6aa20a22 2357 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */
1da177e4
LT		 2358 (tlphy_id1 == NAT_SEM_ID1) &&
2359 (tlphy_id2 == NAT_SEM_ID2) ) {
2360 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2361 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
6aa20a22 2362
1da177e4
LT		 2363 printk( "TLAN: %s: Link active with ", dev->name );
2364 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
6aa20a22 2365 printk( "forced 10%sMbps %s-Duplex\n",
1da177e4
LT		 2366 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2367 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2368 } else {
2369 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2370 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2371 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2372 printk("TLAN: Partner capability: ");
2373 for (i = 5; i <= 10; i++)
2374 if (partner & (1<<i))
2375 printk("%s",media[i-5]);
2376 printk("\n");
2377 }
2378
2379 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
6aa20a22 2380#ifdef MONITOR
1da177e4
LT		 2381 /* We have link beat..for now anyway */
2382 priv->link = 1;
2383 /*Enabling link beat monitoring */
2384 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2385#endif
1da177e4
LT		 2386 } else if (status & MII_GS_LINK) {
2387 printk( "TLAN: %s: Link active\n", dev->name );
2388 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2389 }
2390 }
2391
2392 if ( priv->phyNum == 0 ) {
2393 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2394 tlphy_ctl |= TLAN_TC_INTEN;
2395 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2396 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2397 sio |= TLAN_NET_SIO_MINTEN;
2398 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2399 }
2400
2401 if ( status & MII_GS_LINK ) {
2402 TLan_SetMac( dev, 0, dev->dev_addr );
2403 priv->phyOnline = 1;
2404 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2405 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2406 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2407 }
2408 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2409 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2410 netif_carrier_on(dev);
2411 } else {
2412 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2413 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2414 return;
2415 }
562faf46 2416 TLan_SetMulticastList(dev);
1da177e4
LT		 2417
2418} /* TLan_FinishReset */
2419
2420
2421
2422
2423 /***************************************************************
2424 * TLan_SetMac
2425 *
2426 * Returns:
2427 * Nothing
2428 * Parms:
2429 * dev Pointer to device structure of adapter
2430 * on which to change the AREG.
2431 * areg The AREG to set the address in (0 - 3).
2432 * mac A pointer to an array of chars. Each
2433 * element stores one byte of the address.
2434 * IE, it isn't in ascii.
2435 *
2436 * This function transfers a MAC address to one of the
2437 * TLAN AREGs (address registers). The TLAN chip locks
2438 * the register on writing to offset 0 and unlocks the
2439 * register after writing to offset 5. If NULL is passed
2440 * in mac, then the AREG is filled with 0's.
2441 *
2442 **************************************************************/
2443
2444void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2445{
2446 int i;
6aa20a22 2447
1da177e4
LT		 2448 areg *= 6;
2449
2450 if ( mac != NULL ) {
2451 for ( i = 0; i < 6; i++ )
2452 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2453 } else {
2454 for ( i = 0; i < 6; i++ )
2455 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2456 }
2457
2458} /* TLan_SetMac */
2459
2460
2461
2462
2463/*****************************************************************************
2464******************************************************************************
2465
2466 ThunderLAN Driver PHY Layer Routines
2467
2468******************************************************************************
2469*****************************************************************************/
2470
2471
2472
2473 /*********************************************************************
2474 * TLan_PhyPrint
2475 *
2476 * Returns:
2477 * Nothing
2478 * Parms:
2479 * dev A pointer to the device structure of the
2480 * TLAN device having the PHYs to be detailed.
6aa20a22 2481 *
1da177e4
LT		 2482 * This function prints the registers a PHY (aka transceiver).
2483 *
2484 ********************************************************************/
2485
2486void TLan_PhyPrint( struct net_device *dev )
2487{
2488 TLanPrivateInfo *priv = netdev_priv(dev);
2489 u16 i, data0, data1, data2, data3, phy;
2490
2491 phy = priv->phy[priv->phyNum];
2492
2493 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2494 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2495 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2496 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2497 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2498 for ( i = 0; i < 0x20; i+= 4 ) {
2499 printk( "TLAN: 0x%02x", i );
2500 TLan_MiiReadReg( dev, phy, i, &data0 );
2501 printk( " 0x%04hx", data0 );
2502 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2503 printk( " 0x%04hx", data1 );
2504 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2505 printk( " 0x%04hx", data2 );
2506 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2507 printk( " 0x%04hx\n", data3 );
2508 }
2509 } else {
2510 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2511 }
2512
2513} /* TLan_PhyPrint */
2514
2515
2516
2517
2518 /*********************************************************************
2519 * TLan_PhyDetect
2520 *
2521 * Returns:
2522 * Nothing
2523 * Parms:
2524 * dev A pointer to the device structure of the adapter
2525 * for which the PHY needs determined.
2526 *
2527 * So far I've found that adapters which have external PHYs
2528 * may also use the internal PHY for part of the functionality.
2529 * (eg, AUI/Thinnet). This function finds out if this TLAN
2530 * chip has an internal PHY, and then finds the first external
2531 * PHY (starting from address 0) if it exists).
2532 *
2533 ********************************************************************/
2534
2535void TLan_PhyDetect( struct net_device *dev )
2536{
2537 TLanPrivateInfo *priv = netdev_priv(dev);
2538 u16 control;
2539 u16 hi;
2540 u16 lo;
2541 u32 phy;
2542
2543 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2544 priv->phyNum = 0xFFFF;
2545 return;
2546 }
2547
2548 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
6aa20a22 2549
1da177e4
LT		 2550 if ( hi != 0xFFFF ) {
2551 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2552 } else {
2553 priv->phy[0] = TLAN_PHY_NONE;
2554 }
2555
2556 priv->phy[1] = TLAN_PHY_NONE;
2557 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2558 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2559 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2560 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2561 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2562 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2563 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2564 priv->phy[1] = phy;
2565 }
2566 }
2567 }
2568
2569 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2570 priv->phyNum = 1;
2571 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2572 priv->phyNum = 0;
2573 } else {
2574 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2575 }
2576
2577} /* TLan_PhyDetect */
2578
2579
2580
2581
2582void TLan_PhyPowerDown( struct net_device *dev )
2583{
2584 TLanPrivateInfo *priv = netdev_priv(dev);
2585 u16 value;
2586
2587 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2588 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2589 TLan_MiiSync( dev->base_addr );
2590 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2591 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2592 TLan_MiiSync( dev->base_addr );
2593 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2594 }
2595
2596 /* Wait for 50 ms and powerup
2597 * This is abitrary. It is intended to make sure the
2598 * transceiver settles.
2599 */
2600 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2601
2602} /* TLan_PhyPowerDown */
2603
2604
2605
2606
2607void TLan_PhyPowerUp( struct net_device *dev )
2608{
2609 TLanPrivateInfo *priv = netdev_priv(dev);
2610 u16 value;
2611
2612 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2613 TLan_MiiSync( dev->base_addr );
2614 value = MII_GC_LOOPBK;
2615 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2616 TLan_MiiSync(dev->base_addr);
2617 /* Wait for 500 ms and reset the
2618 * transceiver. The TLAN docs say both 50 ms and
2619 * 500 ms, so do the longer, just in case.
2620 */
2621 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2622
2623} /* TLan_PhyPowerUp */
2624
2625
2626
2627
2628void TLan_PhyReset( struct net_device *dev )
2629{
2630 TLanPrivateInfo *priv = netdev_priv(dev);
2631 u16 phy;
2632 u16 value;
2633
2634 phy = priv->phy[priv->phyNum];
2635
2636 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2637 TLan_MiiSync( dev->base_addr );
2638 value = MII_GC_LOOPBK | MII_GC_RESET;
2639 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2640 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2641 while ( value & MII_GC_RESET ) {
2642 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2643 }
2644
2645 /* Wait for 500 ms and initialize.
2646 * I don't remember why I wait this long.
2647 * I've changed this to 50ms, as it seems long enough.
2648 */
2649 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2650
2651} /* TLan_PhyReset */
2652
2653
2654
2655
2656void TLan_PhyStartLink( struct net_device *dev )
2657{
2658 TLanPrivateInfo *priv = netdev_priv(dev);
2659 u16 ability;
2660 u16 control;
2661 u16 data;
2662 u16 phy;
2663 u16 status;
2664 u16 tctl;
2665
2666 phy = priv->phy[priv->phyNum];
2667 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2668 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2669 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2670
6aa20a22 2671 if ( ( status & MII_GS_AUTONEG ) &&
1da177e4
LT		 2672 ( ! priv->aui ) ) {
2673 ability = status >> 11;
6aa20a22 2674 if ( priv->speed == TLAN_SPEED_10 &&
1da177e4
LT		 2675 priv->duplex == TLAN_DUPLEX_HALF) {
2676 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2677 } else if ( priv->speed == TLAN_SPEED_10 &&
2678 priv->duplex == TLAN_DUPLEX_FULL) {
2679 priv->tlanFullDuplex = TRUE;
2680 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2681 } else if ( priv->speed == TLAN_SPEED_100 &&
2682 priv->duplex == TLAN_DUPLEX_HALF) {
2683 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2684 } else if ( priv->speed == TLAN_SPEED_100 &&
2685 priv->duplex == TLAN_DUPLEX_FULL) {
2686 priv->tlanFullDuplex = TRUE;
2687 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2688 } else {
6aa20a22 2689
1da177e4
LT		 2690 /* Set Auto-Neg advertisement */
2691 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2692 /* Enablee Auto-Neg */
2693 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2694 /* Restart Auto-Neg */
2695 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2696 /* Wait for 4 sec for autonegotiation
2697 * to complete. The max spec time is less than this
2698 * but the card need additional time to start AN.
2699 * .5 sec should be plenty extra.
2700 */
2701 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2702 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2703 return;
2704 }
6aa20a22
JG		 2705
2706 }
2707
1da177e4
LT		 2708 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2709 priv->phyNum = 0;
2710 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2711 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2712 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2713 return;
2714 } else if ( priv->phyNum == 0 ) {
2715 control = 0;
2716 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2717 if ( priv->aui ) {
2718 tctl |= TLAN_TC_AUISEL;
6aa20a22 2719 } else {
1da177e4
LT		 2720 tctl &= ~TLAN_TC_AUISEL;
2721 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2722 control |= MII_GC_DUPLEX;
2723 priv->tlanFullDuplex = TRUE;
2724 }
2725 if ( priv->speed == TLAN_SPEED_100 ) {
2726 control |= MII_GC_SPEEDSEL;
2727 }
2728 }
2729 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2730 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2731 }
2732
2733 /* Wait for 2 sec to give the transceiver time
2734 * to establish link.
2735 */
2736 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2737
2738} /* TLan_PhyStartLink */
2739
2740
2741
2742
2743void TLan_PhyFinishAutoNeg( struct net_device *dev )
2744{
2745 TLanPrivateInfo *priv = netdev_priv(dev);
2746 u16 an_adv;
2747 u16 an_lpa;
2748 u16 data;
2749 u16 mode;
2750 u16 phy;
2751 u16 status;
6aa20a22 2752
1da177e4
LT		 2753 phy = priv->phy[priv->phyNum];
2754
2755 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2756 udelay( 1000 );
2757 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2758
2759 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2760 /* Wait for 8 sec to give the process
2761 * more time. Perhaps we should fail after a while.
2762 */
2763 if (!priv->neg_be_verbose++) {
2764 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n");
2765 printk(KERN_INFO "TLAN: Please check that your adapter has\n");
2766 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n");
2767 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n");
2768 }
2769 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2770 return;
2771 }
2772
2773 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2774 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2775 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2776 mode = an_adv & an_lpa & 0x03E0;
2777 if ( mode & 0x0100 ) {
2778 priv->tlanFullDuplex = TRUE;
2779 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2780 priv->tlanFullDuplex = TRUE;
2781 }
2782
2783 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2784 priv->phyNum = 0;
2785 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2786 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2787 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2788 return;
2789 }
2790
2791 if ( priv->phyNum == 0 ) {
2792 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2793 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2794 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2795 } else {
2796 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2797 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2798 }
2799 }
2800
2801 /* Wait for 100 ms. No reason in partiticular.
2802 */
2803 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
6aa20a22 2804
1da177e4
LT		 2805} /* TLan_PhyFinishAutoNeg */
2806
2807#ifdef MONITOR
2808
2809 /*********************************************************************
2810 *
2811 * TLan_phyMonitor
2812 *
6aa20a22 2813 * Returns:
1da177e4
LT		 2814 * None
2815 *
2816 * Params:
2817 * dev The device structure of this device.
2818 *
6aa20a22 2819 *
1da177e4
LT		 2820 * This function monitors PHY condition by reading the status
2821 * register via the MII bus. This can be used to give info
2822 * about link changes (up/down), and possible switch to alternate
2823 * media.
2824 *
2825 * ******************************************************************/
2826
2827void TLan_PhyMonitor( struct net_device *dev )
2828{
2829 TLanPrivateInfo *priv = netdev_priv(dev);
2830 u16 phy;
2831 u16 phy_status;
2832
2833 phy = priv->phy[priv->phyNum];
2834
2835 /* Get PHY status register */
2836 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2837
2838 /* Check if link has been lost */
6aa20a22 2839 if (!(phy_status & MII_GS_LINK)) {
1da177e4
LT		 2840 if (priv->link) {
2841 priv->link = 0;
2842 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d6 2843 netif_carrier_off(dev);
1da177e4
LT		 2844 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2845 return;
2846 }
2847 }
2848
2849 /* Link restablished? */
2850 if ((phy_status & MII_GS_LINK) && !priv->link) {
2851 priv->link = 1;
2852 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d6 2853 netif_carrier_on(dev);
1da177e4
LT		 2854 }
2855
2856 /* Setup a new monitor */
2857 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
6aa20a22 2858}
1da177e4
LT		 2859
2860#endif /* MONITOR */
2861
2862
2863/*****************************************************************************
2864******************************************************************************
2865
2866 ThunderLAN Driver MII Routines
2867
2868 These routines are based on the information in Chap. 2 of the
2869 "ThunderLAN Programmer's Guide", pp. 15-24.
2870
2871******************************************************************************
2872*****************************************************************************/
2873
2874
2875 /***************************************************************
2876 * TLan_MiiReadReg
2877 *
2878 * Returns:
2879 * 0 if ack received ok
2880 * 1 otherwise.
2881 *
2882 * Parms:
2883 * dev The device structure containing
2884 * The io address and interrupt count
2885 * for this device.
2886 * phy The address of the PHY to be queried.
2887 * reg The register whose contents are to be
4a4efbde 2888 * retrieved.
1da177e4
LT		 2889 * val A pointer to a variable to store the
2890 * retrieved value.
2891 *
4a4efbde 2892 * This function uses the TLAN's MII bus to retrieve the contents
1da177e4
LT		 2893 * of a given register on a PHY. It sends the appropriate info
2894 * and then reads the 16-bit register value from the MII bus via
2895 * the TLAN SIO register.
2896 *
2897 **************************************************************/
2898
2899int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
2900{
2901 u8 nack;
2902 u16 sio, tmp;
2903 u32 i;
2904 int err;
2905 int minten;
2906 TLanPrivateInfo *priv = netdev_priv(dev);
2907 unsigned long flags = 0;
2908
2909 err = FALSE;
2910 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2911 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 2912
1da177e4
LT		 2913 if (!in_irq())
2914 spin_lock_irqsave(&priv->lock, flags);
2915
2916 TLan_MiiSync(dev->base_addr);
2917
2918 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2919 if ( minten )
2920 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2921
2922 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2923 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2924 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2925 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2926
2927
2928 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2929
2930 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2931 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2932 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2933
2934 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2935 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2936 if (nack) { /* No ACK, so fake it */
2937 for (i = 0; i < 16; i++) {
2938 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2939 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2940 }
2941 tmp = 0xffff;
2942 err = TRUE;
2943 } else { /* ACK, so read data */
2944 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2945 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2946 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2947 tmp |= i;
2948 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2949 }
2950 }
2951
2952
2953 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2954 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2955
2956 if ( minten )
2957 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2958
2959 *val = tmp;
6aa20a22 2960
1da177e4
LT		 2961 if (!in_irq())
2962 spin_unlock_irqrestore(&priv->lock, flags);
2963
2964 return err;
2965
2966} /* TLan_MiiReadReg */
2967
2968
2969
2970
2971 /***************************************************************
2972 * TLan_MiiSendData
2973 *
2974 * Returns:
2975 * Nothing
2976 * Parms:
2977 * base_port The base IO port of the adapter in
2978 * question.
2979 * dev The address of the PHY to be queried.
2980 * data The value to be placed on the MII bus.
2981 * num_bits The number of bits in data that are to
2982 * be placed on the MII bus.
2983 *
2984 * This function sends on sequence of bits on the MII
2985 * configuration bus.
2986 *
2987 **************************************************************/
2988
2989void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
2990{
2991 u16 sio;
2992 u32 i;
2993
2994 if ( num_bits == 0 )
2995 return;
2996
2997 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2998 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2999 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
3000
3001 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
3002 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3003 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3004 if ( data & i )
3005 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
3006 else
3007 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
3008 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3009 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
3010 }
3011
3012} /* TLan_MiiSendData */
3013
3014
3015
3016
3017 /***************************************************************
3018 * TLan_MiiSync
3019 *
3020 * Returns:
3021 * Nothing
3022 * Parms:
3023 * base_port The base IO port of the adapter in
3024 * question.
3025 *
3026 * This functions syncs all PHYs in terms of the MII configuration
3027 * bus.
3028 *
3029 **************************************************************/
3030
3031void TLan_MiiSync( u16 base_port )
3032{
3033 int i;
3034 u16 sio;
3035
3036 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3037 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3038
3039 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3040 for ( i = 0; i < 32; i++ ) {
3041 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3042 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3043 }
3044
3045} /* TLan_MiiSync */
3046
3047
3048
3049
3050 /***************************************************************
3051 * TLan_MiiWriteReg
3052 *
3053 * Returns:
3054 * Nothing
3055 * Parms:
3056 * dev The device structure for the device
3057 * to write to.
3058 * phy The address of the PHY to be written to.
3059 * reg The register whose contents are to be
3060 * written.
3061 * val The value to be written to the register.
3062 *
3063 * This function uses the TLAN's MII bus to write the contents of a
3064 * given register on a PHY. It sends the appropriate info and then
3065 * writes the 16-bit register value from the MII configuration bus
3066 * via the TLAN SIO register.
3067 *
3068 **************************************************************/
3069
3070void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
3071{
3072 u16 sio;
3073 int minten;
3074 unsigned long flags = 0;
3075 TLanPrivateInfo *priv = netdev_priv(dev);
3076
3077 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3078 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
6aa20a22 3079
1da177e4
LT		 3080 if (!in_irq())
3081 spin_lock_irqsave(&priv->lock, flags);
3082
3083 TLan_MiiSync( dev->base_addr );
3084
3085 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3086 if ( minten )
3087 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3088
3089 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3090 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3091 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3092 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3093
3094 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3095 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3096
3097 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3098 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3099
3100 if ( minten )
3101 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
6aa20a22 3102
1da177e4
LT		 3103 if (!in_irq())
3104 spin_unlock_irqrestore(&priv->lock, flags);
3105
3106} /* TLan_MiiWriteReg */
3107
3108
3109
3110
3111/*****************************************************************************
3112******************************************************************************
3113
3114 ThunderLAN Driver Eeprom routines
3115
3116 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3117 EEPROM. These functions are based on information in Microchip's
3118 data sheet. I don't know how well this functions will work with
3119 other EEPROMs.
3120
3121******************************************************************************
3122*****************************************************************************/
3123
3124
3125 /***************************************************************
3126 * TLan_EeSendStart
3127 *
3128 * Returns:
3129 * Nothing
6aa20a22 3130 * Parms:
1da177e4
LT		 3131 * io_base The IO port base address for the
3132 * TLAN device with the EEPROM to
3133 * use.
3134 *
3135 * This function sends a start cycle to an EEPROM attached
3136 * to a TLAN chip.
3137 *
3138 **************************************************************/
3139
3140void TLan_EeSendStart( u16 io_base )
3141{
3142 u16 sio;
3143
3144 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3145 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3146
3147 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3148 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3149 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3150 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3151 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3152
3153} /* TLan_EeSendStart */
3154
3155
3156
3157
3158 /***************************************************************
3159 * TLan_EeSendByte
3160 *
3161 * Returns:
3162 * If the correct ack was received, 0, otherwise 1
3163 * Parms: io_base The IO port base address for the
3164 * TLAN device with the EEPROM to
3165 * use.
3166 * data The 8 bits of information to
3167 * send to the EEPROM.
3168 * stop If TLAN_EEPROM_STOP is passed, a
3169 * stop cycle is sent after the
3170 * byte is sent after the ack is
3171 * read.
3172 *
3173 * This function sends a byte on the serial EEPROM line,
3174 * driving the clock to send each bit. The function then
3175 * reverses transmission direction and reads an acknowledge
3176 * bit.
3177 *
3178 **************************************************************/
3179
3180int TLan_EeSendByte( u16 io_base, u8 data, int stop )
3181{
3182 int err;
3183 u8 place;
3184 u16 sio;
3185
3186 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3187 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3188
3189 /* Assume clock is low, tx is enabled; */
3190 for ( place = 0x80; place != 0; place >>= 1 ) {
3191 if ( place & data )
3192 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3193 else
3194 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3195 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3196 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3197 }
3198 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3199 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3200 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3201 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3202 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3203
3204 if ( ( ! err ) && stop ) {
3205 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3206 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3207 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3208 }
3209
3210 return ( err );
3211
3212} /* TLan_EeSendByte */
3213
3214
3215
3216
3217 /***************************************************************
3218 * TLan_EeReceiveByte
3219 *
3220 * Returns:
3221 * Nothing
3222 * Parms:
3223 * io_base The IO port base address for the
3224 * TLAN device with the EEPROM to
3225 * use.
3226 * data An address to a char to hold the
3227 * data sent from the EEPROM.
3228 * stop If TLAN_EEPROM_STOP is passed, a
3229 * stop cycle is sent after the
3230 * byte is received, and no ack is
3231 * sent.
3232 *
3233 * This function receives 8 bits of data from the EEPROM
3234 * over the serial link. It then sends and ack bit, or no
3235 * ack and a stop bit. This function is used to retrieve
3236 * data after the address of a byte in the EEPROM has been
3237 * sent.
3238 *
3239 **************************************************************/
3240
3241void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
3242{
3243 u8 place;
3244 u16 sio;
3245
3246 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3247 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3248 *data = 0;
3249
3250 /* Assume clock is low, tx is enabled; */
3251 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3252 for ( place = 0x80; place; place >>= 1 ) {
3253 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3254 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3255 *data |= place;
3256 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3257 }
3258
3259 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3260 if ( ! stop ) {
3261 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3262 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3263 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3264 } else {
3265 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3266 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3267 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3268 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3269 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3270 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3271 }
3272
3273} /* TLan_EeReceiveByte */
3274
3275
3276
3277
3278 /***************************************************************
3279 * TLan_EeReadByte
3280 *
3281 * Returns:
3282 * No error = 0, else, the stage at which the error
3283 * occurred.
3284 * Parms:
3285 * io_base The IO port base address for the
3286 * TLAN device with the EEPROM to
3287 * use.
3288 * ee_addr The address of the byte in the
3289 * EEPROM whose contents are to be
3290 * retrieved.
3291 * data An address to a char to hold the
3292 * data obtained from the EEPROM.
3293 *
3294 * This function reads a byte of information from an byte
3295 * cell in the EEPROM.
3296 *
3297 **************************************************************/
3298
3299int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
3300{
3301 int err;
3302 TLanPrivateInfo *priv = netdev_priv(dev);
3303 unsigned long flags = 0;
3304 int ret=0;
3305
3306 spin_lock_irqsave(&priv->lock, flags);
3307
3308 TLan_EeSendStart( dev->base_addr );
3309 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3310 if (err)
3311 {
3312 ret=1;
3313 goto fail;
3314 }
3315 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3316 if (err)
3317 {
3318 ret=2;
3319 goto fail;
3320 }
3321 TLan_EeSendStart( dev->base_addr );
3322 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3323 if (err)
3324 {
3325 ret=3;
3326 goto fail;
3327 }
3328 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3329fail:
3330 spin_unlock_irqrestore(&priv->lock, flags);
3331
3332 return ret;
3333
3334} /* TLan_EeReadByte */
3335
3336
3337
Linux kernel - Deliverables
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