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5e123b84 ZR |
1 | /******************************************************************************* |
2 | ||
3 | Copyright(c) 2006 Tundra Semiconductor Corporation. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify it | |
6 | under the terms of the GNU General Public License as published by the Free | |
7 | Software Foundation; either version 2 of the License, or (at your option) | |
8 | any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
17 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | *******************************************************************************/ | |
20 | ||
21 | /* This driver is based on the driver code originally developed | |
22 | * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by | |
23 | * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation | |
24 | * | |
25 | * Currently changes from original version are: | |
26 | * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com) | |
27 | * - modifications to handle two ports independently and support for | |
28 | * additional PHY devices (alexandre.bounine@tundra.com) | |
29 | * - Get hardware information from platform device. (tie-fei.zang@freescale.com) | |
30 | * | |
31 | */ | |
32 | ||
33 | #include <linux/module.h> | |
34 | #include <linux/types.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/net.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/etherdevice.h> | |
9dde447a | 39 | #include <linux/ethtool.h> |
5e123b84 ZR |
40 | #include <linux/skbuff.h> |
41 | #include <linux/slab.h> | |
5e123b84 ZR |
42 | #include <linux/spinlock.h> |
43 | #include <linux/delay.h> | |
44 | #include <linux/crc32.h> | |
45 | #include <linux/mii.h> | |
46 | #include <linux/device.h> | |
47 | #include <linux/pci.h> | |
48 | #include <linux/rtnetlink.h> | |
49 | #include <linux/timer.h> | |
50 | #include <linux/platform_device.h> | |
5e123b84 ZR |
51 | |
52 | #include <asm/system.h> | |
53 | #include <asm/io.h> | |
54 | #include <asm/tsi108.h> | |
55 | ||
56 | #include "tsi108_eth.h" | |
57 | ||
58 | #define MII_READ_DELAY 10000 /* max link wait time in msec */ | |
59 | ||
60 | #define TSI108_RXRING_LEN 256 | |
61 | ||
62 | /* NOTE: The driver currently does not support receiving packets | |
63 | * larger than the buffer size, so don't decrease this (unless you | |
64 | * want to add such support). | |
65 | */ | |
66 | #define TSI108_RXBUF_SIZE 1536 | |
67 | ||
68 | #define TSI108_TXRING_LEN 256 | |
69 | ||
70 | #define TSI108_TX_INT_FREQ 64 | |
71 | ||
72 | /* Check the phy status every half a second. */ | |
73 | #define CHECK_PHY_INTERVAL (HZ/2) | |
74 | ||
75 | static int tsi108_init_one(struct platform_device *pdev); | |
76 | static int tsi108_ether_remove(struct platform_device *pdev); | |
77 | ||
78 | struct tsi108_prv_data { | |
79 | void __iomem *regs; /* Base of normal regs */ | |
80 | void __iomem *phyregs; /* Base of register bank used for PHY access */ | |
81 | ||
bea3348e SH |
82 | struct net_device *dev; |
83 | struct napi_struct napi; | |
84 | ||
5e123b84 ZR |
85 | unsigned int phy; /* Index of PHY for this interface */ |
86 | unsigned int irq_num; | |
87 | unsigned int id; | |
c1b78d05 | 88 | unsigned int phy_type; |
5e123b84 ZR |
89 | |
90 | struct timer_list timer;/* Timer that triggers the check phy function */ | |
91 | unsigned int rxtail; /* Next entry in rxring to read */ | |
92 | unsigned int rxhead; /* Next entry in rxring to give a new buffer */ | |
93 | unsigned int rxfree; /* Number of free, allocated RX buffers */ | |
94 | ||
95 | unsigned int rxpending; /* Non-zero if there are still descriptors | |
96 | * to be processed from a previous descriptor | |
97 | * interrupt condition that has been cleared */ | |
98 | ||
99 | unsigned int txtail; /* Next TX descriptor to check status on */ | |
100 | unsigned int txhead; /* Next TX descriptor to use */ | |
101 | ||
102 | /* Number of free TX descriptors. This could be calculated from | |
103 | * rxhead and rxtail if one descriptor were left unused to disambiguate | |
104 | * full and empty conditions, but it's simpler to just keep track | |
105 | * explicitly. */ | |
106 | ||
107 | unsigned int txfree; | |
108 | ||
109 | unsigned int phy_ok; /* The PHY is currently powered on. */ | |
110 | ||
111 | /* PHY status (duplex is 1 for half, 2 for full, | |
112 | * so that the default 0 indicates that neither has | |
113 | * yet been configured). */ | |
114 | ||
115 | unsigned int link_up; | |
116 | unsigned int speed; | |
117 | unsigned int duplex; | |
118 | ||
119 | tx_desc *txring; | |
120 | rx_desc *rxring; | |
121 | struct sk_buff *txskbs[TSI108_TXRING_LEN]; | |
122 | struct sk_buff *rxskbs[TSI108_RXRING_LEN]; | |
123 | ||
124 | dma_addr_t txdma, rxdma; | |
125 | ||
126 | /* txlock nests in misclock and phy_lock */ | |
127 | ||
128 | spinlock_t txlock, misclock; | |
129 | ||
130 | /* stats is used to hold the upper bits of each hardware counter, | |
131 | * and tmpstats is used to hold the full values for returning | |
132 | * to the caller of get_stats(). They must be separate in case | |
133 | * an overflow interrupt occurs before the stats are consumed. | |
134 | */ | |
135 | ||
136 | struct net_device_stats stats; | |
137 | struct net_device_stats tmpstats; | |
138 | ||
139 | /* These stats are kept separate in hardware, thus require individual | |
140 | * fields for handling carry. They are combined in get_stats. | |
141 | */ | |
142 | ||
143 | unsigned long rx_fcs; /* Add to rx_frame_errors */ | |
144 | unsigned long rx_short_fcs; /* Add to rx_frame_errors */ | |
145 | unsigned long rx_long_fcs; /* Add to rx_frame_errors */ | |
146 | unsigned long rx_underruns; /* Add to rx_length_errors */ | |
147 | unsigned long rx_overruns; /* Add to rx_length_errors */ | |
148 | ||
149 | unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */ | |
150 | unsigned long tx_pause_drop; /* Add to tx_aborted_errors */ | |
151 | ||
152 | unsigned long mc_hash[16]; | |
153 | u32 msg_enable; /* debug message level */ | |
154 | struct mii_if_info mii_if; | |
155 | unsigned int init_media; | |
156 | }; | |
157 | ||
158 | /* Structure for a device driver */ | |
159 | ||
160 | static struct platform_driver tsi_eth_driver = { | |
161 | .probe = tsi108_init_one, | |
162 | .remove = tsi108_ether_remove, | |
163 | .driver = { | |
164 | .name = "tsi-ethernet", | |
165 | }, | |
166 | }; | |
167 | ||
168 | static void tsi108_timed_checker(unsigned long dev_ptr); | |
169 | ||
170 | static void dump_eth_one(struct net_device *dev) | |
171 | { | |
172 | struct tsi108_prv_data *data = netdev_priv(dev); | |
173 | ||
174 | printk("Dumping %s...\n", dev->name); | |
175 | printk("intstat %x intmask %x phy_ok %d" | |
176 | " link %d speed %d duplex %d\n", | |
177 | TSI_READ(TSI108_EC_INTSTAT), | |
178 | TSI_READ(TSI108_EC_INTMASK), data->phy_ok, | |
179 | data->link_up, data->speed, data->duplex); | |
180 | ||
181 | printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n", | |
182 | data->txhead, data->txtail, data->txfree, | |
183 | TSI_READ(TSI108_EC_TXSTAT), | |
184 | TSI_READ(TSI108_EC_TXESTAT), | |
185 | TSI_READ(TSI108_EC_TXERR)); | |
186 | ||
187 | printk("RX: head %d, tail %d, free %d, stat %x," | |
188 | " estat %x, err %x, pending %d\n\n", | |
189 | data->rxhead, data->rxtail, data->rxfree, | |
190 | TSI_READ(TSI108_EC_RXSTAT), | |
191 | TSI_READ(TSI108_EC_RXESTAT), | |
192 | TSI_READ(TSI108_EC_RXERR), data->rxpending); | |
193 | } | |
194 | ||
195 | /* Synchronization is needed between the thread and up/down events. | |
196 | * Note that the PHY is accessed through the same registers for both | |
197 | * interfaces, so this can't be made interface-specific. | |
198 | */ | |
199 | ||
200 | static DEFINE_SPINLOCK(phy_lock); | |
201 | ||
202 | static int tsi108_read_mii(struct tsi108_prv_data *data, int reg) | |
203 | { | |
204 | unsigned i; | |
205 | ||
206 | TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, | |
207 | (data->phy << TSI108_MAC_MII_ADDR_PHY) | | |
208 | (reg << TSI108_MAC_MII_ADDR_REG)); | |
209 | TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0); | |
210 | TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ); | |
211 | for (i = 0; i < 100; i++) { | |
212 | if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) & | |
213 | (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY))) | |
214 | break; | |
215 | udelay(10); | |
216 | } | |
217 | ||
218 | if (i == 100) | |
219 | return 0xffff; | |
220 | else | |
221 | return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN)); | |
222 | } | |
223 | ||
224 | static void tsi108_write_mii(struct tsi108_prv_data *data, | |
225 | int reg, u16 val) | |
226 | { | |
227 | unsigned i = 100; | |
228 | TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, | |
229 | (data->phy << TSI108_MAC_MII_ADDR_PHY) | | |
230 | (reg << TSI108_MAC_MII_ADDR_REG)); | |
231 | TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val); | |
232 | while (i--) { | |
233 | if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) & | |
234 | TSI108_MAC_MII_IND_BUSY)) | |
235 | break; | |
236 | udelay(10); | |
237 | } | |
238 | } | |
239 | ||
240 | static int tsi108_mdio_read(struct net_device *dev, int addr, int reg) | |
241 | { | |
242 | struct tsi108_prv_data *data = netdev_priv(dev); | |
243 | return tsi108_read_mii(data, reg); | |
244 | } | |
245 | ||
246 | static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val) | |
247 | { | |
248 | struct tsi108_prv_data *data = netdev_priv(dev); | |
249 | tsi108_write_mii(data, reg, val); | |
250 | } | |
251 | ||
252 | static inline void tsi108_write_tbi(struct tsi108_prv_data *data, | |
253 | int reg, u16 val) | |
254 | { | |
255 | unsigned i = 1000; | |
256 | TSI_WRITE(TSI108_MAC_MII_ADDR, | |
257 | (0x1e << TSI108_MAC_MII_ADDR_PHY) | |
258 | | (reg << TSI108_MAC_MII_ADDR_REG)); | |
259 | TSI_WRITE(TSI108_MAC_MII_DATAOUT, val); | |
260 | while(i--) { | |
261 | if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY)) | |
262 | return; | |
263 | udelay(10); | |
264 | } | |
265 | printk(KERN_ERR "%s function time out \n", __FUNCTION__); | |
266 | } | |
267 | ||
268 | static int mii_speed(struct mii_if_info *mii) | |
269 | { | |
270 | int advert, lpa, val, media; | |
271 | int lpa2 = 0; | |
272 | int speed; | |
273 | ||
274 | if (!mii_link_ok(mii)) | |
275 | return 0; | |
276 | ||
277 | val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR); | |
278 | if ((val & BMSR_ANEGCOMPLETE) == 0) | |
279 | return 0; | |
280 | ||
281 | advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE); | |
282 | lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA); | |
283 | media = mii_nway_result(advert & lpa); | |
284 | ||
285 | if (mii->supports_gmii) | |
286 | lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000); | |
287 | ||
288 | speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 : | |
289 | (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10); | |
290 | return speed; | |
291 | } | |
292 | ||
293 | static void tsi108_check_phy(struct net_device *dev) | |
294 | { | |
295 | struct tsi108_prv_data *data = netdev_priv(dev); | |
296 | u32 mac_cfg2_reg, portctrl_reg; | |
297 | u32 duplex; | |
298 | u32 speed; | |
299 | unsigned long flags; | |
300 | ||
5e123b84 ZR |
301 | spin_lock_irqsave(&phy_lock, flags); |
302 | ||
303 | if (!data->phy_ok) | |
304 | goto out; | |
305 | ||
5e123b84 ZR |
306 | duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media); |
307 | data->init_media = 0; | |
308 | ||
309 | if (netif_carrier_ok(dev)) { | |
310 | ||
311 | speed = mii_speed(&data->mii_if); | |
312 | ||
313 | if ((speed != data->speed) || duplex) { | |
314 | ||
315 | mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2); | |
316 | portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL); | |
317 | ||
318 | mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK; | |
319 | ||
320 | if (speed == 1000) { | |
321 | mac_cfg2_reg |= TSI108_MAC_CFG2_GIG; | |
322 | portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG; | |
323 | } else { | |
324 | mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG; | |
325 | portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG; | |
326 | } | |
327 | ||
328 | data->speed = speed; | |
329 | ||
330 | if (data->mii_if.full_duplex) { | |
331 | mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX; | |
332 | portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX; | |
333 | data->duplex = 2; | |
334 | } else { | |
335 | mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX; | |
336 | portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX; | |
337 | data->duplex = 1; | |
338 | } | |
339 | ||
340 | TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg); | |
341 | TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg); | |
b1aefe58 | 342 | } |
5e123b84 | 343 | |
b1aefe58 AB |
344 | if (data->link_up == 0) { |
345 | /* The manual says it can take 3-4 usecs for the speed change | |
346 | * to take effect. | |
347 | */ | |
348 | udelay(5); | |
5e123b84 | 349 | |
b1aefe58 AB |
350 | spin_lock(&data->txlock); |
351 | if (is_valid_ether_addr(dev->dev_addr) && data->txfree) | |
352 | netif_wake_queue(dev); | |
5e123b84 | 353 | |
b1aefe58 AB |
354 | data->link_up = 1; |
355 | spin_unlock(&data->txlock); | |
5e123b84 | 356 | } |
5e123b84 ZR |
357 | } else { |
358 | if (data->link_up == 1) { | |
359 | netif_stop_queue(dev); | |
360 | data->link_up = 0; | |
361 | printk(KERN_NOTICE "%s : link is down\n", dev->name); | |
362 | } | |
363 | ||
364 | goto out; | |
365 | } | |
366 | ||
367 | ||
368 | out: | |
369 | spin_unlock_irqrestore(&phy_lock, flags); | |
370 | } | |
371 | ||
372 | static inline void | |
373 | tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift, | |
374 | unsigned long *upper) | |
375 | { | |
376 | if (carry & carry_bit) | |
377 | *upper += carry_shift; | |
378 | } | |
379 | ||
380 | static void tsi108_stat_carry(struct net_device *dev) | |
381 | { | |
382 | struct tsi108_prv_data *data = netdev_priv(dev); | |
383 | u32 carry1, carry2; | |
384 | ||
385 | spin_lock_irq(&data->misclock); | |
386 | ||
387 | carry1 = TSI_READ(TSI108_STAT_CARRY1); | |
388 | carry2 = TSI_READ(TSI108_STAT_CARRY2); | |
389 | ||
390 | TSI_WRITE(TSI108_STAT_CARRY1, carry1); | |
391 | TSI_WRITE(TSI108_STAT_CARRY2, carry2); | |
392 | ||
393 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES, | |
394 | TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); | |
395 | ||
396 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS, | |
397 | TSI108_STAT_RXPKTS_CARRY, | |
398 | &data->stats.rx_packets); | |
399 | ||
400 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS, | |
401 | TSI108_STAT_RXFCS_CARRY, &data->rx_fcs); | |
402 | ||
403 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST, | |
404 | TSI108_STAT_RXMCAST_CARRY, | |
405 | &data->stats.multicast); | |
406 | ||
407 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN, | |
408 | TSI108_STAT_RXALIGN_CARRY, | |
409 | &data->stats.rx_frame_errors); | |
410 | ||
411 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH, | |
412 | TSI108_STAT_RXLENGTH_CARRY, | |
413 | &data->stats.rx_length_errors); | |
414 | ||
415 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT, | |
416 | TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); | |
417 | ||
418 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO, | |
419 | TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); | |
420 | ||
421 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG, | |
422 | TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); | |
423 | ||
424 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER, | |
425 | TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs); | |
426 | ||
427 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP, | |
428 | TSI108_STAT_RXDROP_CARRY, | |
429 | &data->stats.rx_missed_errors); | |
430 | ||
431 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES, | |
432 | TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); | |
433 | ||
434 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS, | |
435 | TSI108_STAT_TXPKTS_CARRY, | |
436 | &data->stats.tx_packets); | |
437 | ||
438 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF, | |
439 | TSI108_STAT_TXEXDEF_CARRY, | |
440 | &data->stats.tx_aborted_errors); | |
441 | ||
442 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL, | |
443 | TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort); | |
444 | ||
445 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL, | |
446 | TSI108_STAT_TXTCOL_CARRY, | |
447 | &data->stats.collisions); | |
448 | ||
449 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE, | |
450 | TSI108_STAT_TXPAUSEDROP_CARRY, | |
451 | &data->tx_pause_drop); | |
452 | ||
453 | spin_unlock_irq(&data->misclock); | |
454 | } | |
455 | ||
456 | /* Read a stat counter atomically with respect to carries. | |
457 | * data->misclock must be held. | |
458 | */ | |
459 | static inline unsigned long | |
460 | tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit, | |
461 | int carry_shift, unsigned long *upper) | |
462 | { | |
463 | int carryreg; | |
464 | unsigned long val; | |
465 | ||
466 | if (reg < 0xb0) | |
467 | carryreg = TSI108_STAT_CARRY1; | |
468 | else | |
469 | carryreg = TSI108_STAT_CARRY2; | |
470 | ||
471 | again: | |
472 | val = TSI_READ(reg) | *upper; | |
473 | ||
474 | /* Check to see if it overflowed, but the interrupt hasn't | |
475 | * been serviced yet. If so, handle the carry here, and | |
476 | * try again. | |
477 | */ | |
478 | ||
479 | if (unlikely(TSI_READ(carryreg) & carry_bit)) { | |
480 | *upper += carry_shift; | |
481 | TSI_WRITE(carryreg, carry_bit); | |
482 | goto again; | |
483 | } | |
484 | ||
485 | return val; | |
486 | } | |
487 | ||
488 | static struct net_device_stats *tsi108_get_stats(struct net_device *dev) | |
489 | { | |
490 | unsigned long excol; | |
491 | ||
492 | struct tsi108_prv_data *data = netdev_priv(dev); | |
493 | spin_lock_irq(&data->misclock); | |
494 | ||
495 | data->tmpstats.rx_packets = | |
496 | tsi108_read_stat(data, TSI108_STAT_RXPKTS, | |
497 | TSI108_STAT_CARRY1_RXPKTS, | |
498 | TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets); | |
499 | ||
500 | data->tmpstats.tx_packets = | |
501 | tsi108_read_stat(data, TSI108_STAT_TXPKTS, | |
502 | TSI108_STAT_CARRY2_TXPKTS, | |
503 | TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets); | |
504 | ||
505 | data->tmpstats.rx_bytes = | |
506 | tsi108_read_stat(data, TSI108_STAT_RXBYTES, | |
507 | TSI108_STAT_CARRY1_RXBYTES, | |
508 | TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); | |
509 | ||
510 | data->tmpstats.tx_bytes = | |
511 | tsi108_read_stat(data, TSI108_STAT_TXBYTES, | |
512 | TSI108_STAT_CARRY2_TXBYTES, | |
513 | TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); | |
514 | ||
515 | data->tmpstats.multicast = | |
516 | tsi108_read_stat(data, TSI108_STAT_RXMCAST, | |
517 | TSI108_STAT_CARRY1_RXMCAST, | |
518 | TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast); | |
519 | ||
520 | excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL, | |
521 | TSI108_STAT_CARRY2_TXEXCOL, | |
522 | TSI108_STAT_TXEXCOL_CARRY, | |
523 | &data->tx_coll_abort); | |
524 | ||
525 | data->tmpstats.collisions = | |
526 | tsi108_read_stat(data, TSI108_STAT_TXTCOL, | |
527 | TSI108_STAT_CARRY2_TXTCOL, | |
528 | TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions); | |
529 | ||
530 | data->tmpstats.collisions += excol; | |
531 | ||
532 | data->tmpstats.rx_length_errors = | |
533 | tsi108_read_stat(data, TSI108_STAT_RXLENGTH, | |
534 | TSI108_STAT_CARRY1_RXLENGTH, | |
535 | TSI108_STAT_RXLENGTH_CARRY, | |
536 | &data->stats.rx_length_errors); | |
537 | ||
538 | data->tmpstats.rx_length_errors += | |
539 | tsi108_read_stat(data, TSI108_STAT_RXRUNT, | |
540 | TSI108_STAT_CARRY1_RXRUNT, | |
541 | TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); | |
542 | ||
543 | data->tmpstats.rx_length_errors += | |
544 | tsi108_read_stat(data, TSI108_STAT_RXJUMBO, | |
545 | TSI108_STAT_CARRY1_RXJUMBO, | |
546 | TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); | |
547 | ||
548 | data->tmpstats.rx_frame_errors = | |
549 | tsi108_read_stat(data, TSI108_STAT_RXALIGN, | |
550 | TSI108_STAT_CARRY1_RXALIGN, | |
551 | TSI108_STAT_RXALIGN_CARRY, | |
552 | &data->stats.rx_frame_errors); | |
553 | ||
554 | data->tmpstats.rx_frame_errors += | |
555 | tsi108_read_stat(data, TSI108_STAT_RXFCS, | |
556 | TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY, | |
557 | &data->rx_fcs); | |
558 | ||
559 | data->tmpstats.rx_frame_errors += | |
560 | tsi108_read_stat(data, TSI108_STAT_RXFRAG, | |
561 | TSI108_STAT_CARRY1_RXFRAG, | |
562 | TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); | |
563 | ||
564 | data->tmpstats.rx_missed_errors = | |
565 | tsi108_read_stat(data, TSI108_STAT_RXDROP, | |
566 | TSI108_STAT_CARRY1_RXDROP, | |
567 | TSI108_STAT_RXDROP_CARRY, | |
568 | &data->stats.rx_missed_errors); | |
569 | ||
570 | /* These three are maintained by software. */ | |
571 | data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors; | |
572 | data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors; | |
573 | ||
574 | data->tmpstats.tx_aborted_errors = | |
575 | tsi108_read_stat(data, TSI108_STAT_TXEXDEF, | |
576 | TSI108_STAT_CARRY2_TXEXDEF, | |
577 | TSI108_STAT_TXEXDEF_CARRY, | |
578 | &data->stats.tx_aborted_errors); | |
579 | ||
580 | data->tmpstats.tx_aborted_errors += | |
581 | tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP, | |
582 | TSI108_STAT_CARRY2_TXPAUSE, | |
583 | TSI108_STAT_TXPAUSEDROP_CARRY, | |
584 | &data->tx_pause_drop); | |
585 | ||
586 | data->tmpstats.tx_aborted_errors += excol; | |
587 | ||
588 | data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors; | |
589 | data->tmpstats.rx_errors = data->tmpstats.rx_length_errors + | |
590 | data->tmpstats.rx_crc_errors + | |
591 | data->tmpstats.rx_frame_errors + | |
592 | data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors; | |
593 | ||
594 | spin_unlock_irq(&data->misclock); | |
595 | return &data->tmpstats; | |
596 | } | |
597 | ||
598 | static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev) | |
599 | { | |
600 | TSI_WRITE(TSI108_EC_RXQ_PTRHIGH, | |
601 | TSI108_EC_RXQ_PTRHIGH_VALID); | |
602 | ||
603 | TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO | |
604 | | TSI108_EC_RXCTRL_QUEUE0); | |
605 | } | |
606 | ||
607 | static void tsi108_restart_tx(struct tsi108_prv_data * data) | |
608 | { | |
609 | TSI_WRITE(TSI108_EC_TXQ_PTRHIGH, | |
610 | TSI108_EC_TXQ_PTRHIGH_VALID); | |
611 | ||
612 | TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT | | |
613 | TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0); | |
614 | } | |
615 | ||
616 | /* txlock must be held by caller, with IRQs disabled, and | |
617 | * with permission to re-enable them when the lock is dropped. | |
618 | */ | |
619 | static void tsi108_complete_tx(struct net_device *dev) | |
620 | { | |
621 | struct tsi108_prv_data *data = netdev_priv(dev); | |
622 | int tx; | |
623 | struct sk_buff *skb; | |
624 | int release = 0; | |
625 | ||
626 | while (!data->txfree || data->txhead != data->txtail) { | |
627 | tx = data->txtail; | |
628 | ||
629 | if (data->txring[tx].misc & TSI108_TX_OWN) | |
630 | break; | |
631 | ||
632 | skb = data->txskbs[tx]; | |
633 | ||
634 | if (!(data->txring[tx].misc & TSI108_TX_OK)) | |
635 | printk("%s: bad tx packet, misc %x\n", | |
636 | dev->name, data->txring[tx].misc); | |
637 | ||
638 | data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; | |
639 | data->txfree++; | |
640 | ||
641 | if (data->txring[tx].misc & TSI108_TX_EOF) { | |
642 | dev_kfree_skb_any(skb); | |
643 | release++; | |
644 | } | |
645 | } | |
646 | ||
647 | if (release) { | |
648 | if (is_valid_ether_addr(dev->dev_addr) && data->link_up) | |
649 | netif_wake_queue(dev); | |
650 | } | |
651 | } | |
652 | ||
653 | static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev) | |
654 | { | |
655 | struct tsi108_prv_data *data = netdev_priv(dev); | |
656 | int frags = skb_shinfo(skb)->nr_frags + 1; | |
657 | int i; | |
658 | ||
659 | if (!data->phy_ok && net_ratelimit()) | |
660 | printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name); | |
661 | ||
662 | if (!data->link_up) { | |
663 | printk(KERN_ERR "%s: Transmit while link is down!\n", | |
664 | dev->name); | |
665 | netif_stop_queue(dev); | |
666 | return NETDEV_TX_BUSY; | |
667 | } | |
668 | ||
669 | if (data->txfree < MAX_SKB_FRAGS + 1) { | |
670 | netif_stop_queue(dev); | |
671 | ||
672 | if (net_ratelimit()) | |
673 | printk(KERN_ERR "%s: Transmit with full tx ring!\n", | |
674 | dev->name); | |
675 | return NETDEV_TX_BUSY; | |
676 | } | |
677 | ||
678 | if (data->txfree - frags < MAX_SKB_FRAGS + 1) { | |
679 | netif_stop_queue(dev); | |
680 | } | |
681 | ||
682 | spin_lock_irq(&data->txlock); | |
683 | ||
684 | for (i = 0; i < frags; i++) { | |
685 | int misc = 0; | |
686 | int tx = data->txhead; | |
687 | ||
688 | /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with | |
689 | * the interrupt bit. TX descriptor-complete interrupts are | |
690 | * enabled when the queue fills up, and masked when there is | |
691 | * still free space. This way, when saturating the outbound | |
692 | * link, the tx interrupts are kept to a reasonable level. | |
693 | * When the queue is not full, reclamation of skbs still occurs | |
694 | * as new packets are transmitted, or on a queue-empty | |
695 | * interrupt. | |
696 | */ | |
697 | ||
698 | if ((tx % TSI108_TX_INT_FREQ == 0) && | |
699 | ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ)) | |
700 | misc = TSI108_TX_INT; | |
701 | ||
702 | data->txskbs[tx] = skb; | |
703 | ||
704 | if (i == 0) { | |
705 | data->txring[tx].buf0 = dma_map_single(NULL, skb->data, | |
706 | skb->len - skb->data_len, DMA_TO_DEVICE); | |
707 | data->txring[tx].len = skb->len - skb->data_len; | |
708 | misc |= TSI108_TX_SOF; | |
709 | } else { | |
710 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; | |
711 | ||
712 | data->txring[tx].buf0 = | |
713 | dma_map_page(NULL, frag->page, frag->page_offset, | |
714 | frag->size, DMA_TO_DEVICE); | |
715 | data->txring[tx].len = frag->size; | |
716 | } | |
717 | ||
718 | if (i == frags - 1) | |
719 | misc |= TSI108_TX_EOF; | |
720 | ||
721 | if (netif_msg_pktdata(data)) { | |
722 | int i; | |
723 | printk("%s: Tx Frame contents (%d)\n", dev->name, | |
724 | skb->len); | |
725 | for (i = 0; i < skb->len; i++) | |
726 | printk(" %2.2x", skb->data[i]); | |
727 | printk(".\n"); | |
728 | } | |
729 | data->txring[tx].misc = misc | TSI108_TX_OWN; | |
730 | ||
731 | data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN; | |
732 | data->txfree--; | |
733 | } | |
734 | ||
735 | tsi108_complete_tx(dev); | |
736 | ||
737 | /* This must be done after the check for completed tx descriptors, | |
738 | * so that the tail pointer is correct. | |
739 | */ | |
740 | ||
741 | if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0)) | |
742 | tsi108_restart_tx(data); | |
743 | ||
744 | spin_unlock_irq(&data->txlock); | |
745 | return NETDEV_TX_OK; | |
746 | } | |
747 | ||
748 | static int tsi108_complete_rx(struct net_device *dev, int budget) | |
749 | { | |
750 | struct tsi108_prv_data *data = netdev_priv(dev); | |
751 | int done = 0; | |
752 | ||
753 | while (data->rxfree && done != budget) { | |
754 | int rx = data->rxtail; | |
755 | struct sk_buff *skb; | |
756 | ||
757 | if (data->rxring[rx].misc & TSI108_RX_OWN) | |
758 | break; | |
759 | ||
760 | skb = data->rxskbs[rx]; | |
761 | data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; | |
762 | data->rxfree--; | |
763 | done++; | |
764 | ||
765 | if (data->rxring[rx].misc & TSI108_RX_BAD) { | |
766 | spin_lock_irq(&data->misclock); | |
767 | ||
768 | if (data->rxring[rx].misc & TSI108_RX_CRC) | |
769 | data->stats.rx_crc_errors++; | |
770 | if (data->rxring[rx].misc & TSI108_RX_OVER) | |
771 | data->stats.rx_fifo_errors++; | |
772 | ||
773 | spin_unlock_irq(&data->misclock); | |
774 | ||
775 | dev_kfree_skb_any(skb); | |
776 | continue; | |
777 | } | |
778 | if (netif_msg_pktdata(data)) { | |
779 | int i; | |
780 | printk("%s: Rx Frame contents (%d)\n", | |
781 | dev->name, data->rxring[rx].len); | |
782 | for (i = 0; i < data->rxring[rx].len; i++) | |
783 | printk(" %2.2x", skb->data[i]); | |
784 | printk(".\n"); | |
785 | } | |
786 | ||
5e123b84 ZR |
787 | skb_put(skb, data->rxring[rx].len); |
788 | skb->protocol = eth_type_trans(skb, dev); | |
789 | netif_receive_skb(skb); | |
790 | dev->last_rx = jiffies; | |
791 | } | |
792 | ||
793 | return done; | |
794 | } | |
795 | ||
796 | static int tsi108_refill_rx(struct net_device *dev, int budget) | |
797 | { | |
798 | struct tsi108_prv_data *data = netdev_priv(dev); | |
799 | int done = 0; | |
800 | ||
801 | while (data->rxfree != TSI108_RXRING_LEN && done != budget) { | |
802 | int rx = data->rxhead; | |
803 | struct sk_buff *skb; | |
804 | ||
805 | data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2); | |
806 | if (!skb) | |
807 | break; | |
808 | ||
809 | skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */ | |
810 | ||
811 | data->rxring[rx].buf0 = dma_map_single(NULL, skb->data, | |
812 | TSI108_RX_SKB_SIZE, | |
813 | DMA_FROM_DEVICE); | |
814 | ||
815 | /* Sometimes the hardware sets blen to zero after packet | |
816 | * reception, even though the manual says that it's only ever | |
817 | * modified by the driver. | |
818 | */ | |
819 | ||
820 | data->rxring[rx].blen = TSI108_RX_SKB_SIZE; | |
821 | data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT; | |
822 | ||
823 | data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN; | |
824 | data->rxfree++; | |
825 | done++; | |
826 | } | |
827 | ||
828 | if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) & | |
829 | TSI108_EC_RXSTAT_QUEUE0)) | |
830 | tsi108_restart_rx(data, dev); | |
831 | ||
832 | return done; | |
833 | } | |
834 | ||
bea3348e | 835 | static int tsi108_poll(struct napi_struct *napi, int budget) |
5e123b84 | 836 | { |
bea3348e SH |
837 | struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi); |
838 | struct net_device *dev = data->dev; | |
5e123b84 ZR |
839 | u32 estat = TSI_READ(TSI108_EC_RXESTAT); |
840 | u32 intstat = TSI_READ(TSI108_EC_INTSTAT); | |
bea3348e | 841 | int num_received = 0, num_filled = 0; |
5e123b84 ZR |
842 | |
843 | intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | | |
844 | TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT; | |
845 | ||
846 | TSI_WRITE(TSI108_EC_RXESTAT, estat); | |
847 | TSI_WRITE(TSI108_EC_INTSTAT, intstat); | |
848 | ||
849 | if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT)) | |
bea3348e | 850 | num_received = tsi108_complete_rx(dev, budget); |
5e123b84 ZR |
851 | |
852 | /* This should normally fill no more slots than the number of | |
853 | * packets received in tsi108_complete_rx(). The exception | |
854 | * is when we previously ran out of memory for RX SKBs. In that | |
855 | * case, it's helpful to obey the budget, not only so that the | |
856 | * CPU isn't hogged, but so that memory (which may still be low) | |
857 | * is not hogged by one device. | |
858 | * | |
859 | * A work unit is considered to be two SKBs to allow us to catch | |
860 | * up when the ring has shrunk due to out-of-memory but we're | |
861 | * still removing the full budget's worth of packets each time. | |
862 | */ | |
863 | ||
864 | if (data->rxfree < TSI108_RXRING_LEN) | |
bea3348e | 865 | num_filled = tsi108_refill_rx(dev, budget * 2); |
5e123b84 ZR |
866 | |
867 | if (intstat & TSI108_INT_RXERROR) { | |
868 | u32 err = TSI_READ(TSI108_EC_RXERR); | |
869 | TSI_WRITE(TSI108_EC_RXERR, err); | |
870 | ||
871 | if (err) { | |
872 | if (net_ratelimit()) | |
873 | printk(KERN_DEBUG "%s: RX error %x\n", | |
874 | dev->name, err); | |
875 | ||
876 | if (!(TSI_READ(TSI108_EC_RXSTAT) & | |
877 | TSI108_EC_RXSTAT_QUEUE0)) | |
878 | tsi108_restart_rx(data, dev); | |
879 | } | |
880 | } | |
881 | ||
882 | if (intstat & TSI108_INT_RXOVERRUN) { | |
883 | spin_lock_irq(&data->misclock); | |
884 | data->stats.rx_fifo_errors++; | |
885 | spin_unlock_irq(&data->misclock); | |
886 | } | |
887 | ||
bea3348e | 888 | if (num_received < budget) { |
5e123b84 | 889 | data->rxpending = 0; |
bea3348e | 890 | netif_rx_complete(dev, napi); |
5e123b84 ZR |
891 | |
892 | TSI_WRITE(TSI108_EC_INTMASK, | |
893 | TSI_READ(TSI108_EC_INTMASK) | |
894 | & ~(TSI108_INT_RXQUEUE0 | |
895 | | TSI108_INT_RXTHRESH | | |
896 | TSI108_INT_RXOVERRUN | | |
897 | TSI108_INT_RXERROR | | |
898 | TSI108_INT_RXWAIT)); | |
5e123b84 ZR |
899 | } else { |
900 | data->rxpending = 1; | |
901 | } | |
902 | ||
bea3348e | 903 | return num_received; |
5e123b84 ZR |
904 | } |
905 | ||
906 | static void tsi108_rx_int(struct net_device *dev) | |
907 | { | |
908 | struct tsi108_prv_data *data = netdev_priv(dev); | |
909 | ||
910 | /* A race could cause dev to already be scheduled, so it's not an | |
911 | * error if that happens (and interrupts shouldn't be re-masked, | |
912 | * because that can cause harmful races, if poll has already | |
913 | * unmasked them but not cleared LINK_STATE_SCHED). | |
914 | * | |
915 | * This can happen if this code races with tsi108_poll(), which masks | |
916 | * the interrupts after tsi108_irq_one() read the mask, but before | |
917 | * netif_rx_schedule is called. It could also happen due to calls | |
918 | * from tsi108_check_rxring(). | |
919 | */ | |
920 | ||
bea3348e | 921 | if (netif_rx_schedule_prep(dev, &data->napi)) { |
5e123b84 ZR |
922 | /* Mask, rather than ack, the receive interrupts. The ack |
923 | * will happen in tsi108_poll(). | |
924 | */ | |
925 | ||
926 | TSI_WRITE(TSI108_EC_INTMASK, | |
927 | TSI_READ(TSI108_EC_INTMASK) | | |
928 | TSI108_INT_RXQUEUE0 | |
929 | | TSI108_INT_RXTHRESH | | |
930 | TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | | |
931 | TSI108_INT_RXWAIT); | |
bea3348e | 932 | __netif_rx_schedule(dev, &data->napi); |
5e123b84 ZR |
933 | } else { |
934 | if (!netif_running(dev)) { | |
935 | /* This can happen if an interrupt occurs while the | |
936 | * interface is being brought down, as the START | |
937 | * bit is cleared before the stop function is called. | |
938 | * | |
939 | * In this case, the interrupts must be masked, or | |
940 | * they will continue indefinitely. | |
941 | * | |
942 | * There's a race here if the interface is brought down | |
943 | * and then up in rapid succession, as the device could | |
944 | * be made running after the above check and before | |
945 | * the masking below. This will only happen if the IRQ | |
946 | * thread has a lower priority than the task brining | |
947 | * up the interface. Fixing this race would likely | |
948 | * require changes in generic code. | |
949 | */ | |
950 | ||
951 | TSI_WRITE(TSI108_EC_INTMASK, | |
952 | TSI_READ | |
953 | (TSI108_EC_INTMASK) | | |
954 | TSI108_INT_RXQUEUE0 | | |
955 | TSI108_INT_RXTHRESH | | |
956 | TSI108_INT_RXOVERRUN | | |
957 | TSI108_INT_RXERROR | | |
958 | TSI108_INT_RXWAIT); | |
959 | } | |
960 | } | |
961 | } | |
962 | ||
963 | /* If the RX ring has run out of memory, try periodically | |
964 | * to allocate some more, as otherwise poll would never | |
965 | * get called (apart from the initial end-of-queue condition). | |
966 | * | |
967 | * This is called once per second (by default) from the thread. | |
968 | */ | |
969 | ||
970 | static void tsi108_check_rxring(struct net_device *dev) | |
971 | { | |
972 | struct tsi108_prv_data *data = netdev_priv(dev); | |
973 | ||
974 | /* A poll is scheduled, as opposed to caling tsi108_refill_rx | |
975 | * directly, so as to keep the receive path single-threaded | |
976 | * (and thus not needing a lock). | |
977 | */ | |
978 | ||
979 | if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4) | |
980 | tsi108_rx_int(dev); | |
981 | } | |
982 | ||
983 | static void tsi108_tx_int(struct net_device *dev) | |
984 | { | |
985 | struct tsi108_prv_data *data = netdev_priv(dev); | |
986 | u32 estat = TSI_READ(TSI108_EC_TXESTAT); | |
987 | ||
988 | TSI_WRITE(TSI108_EC_TXESTAT, estat); | |
989 | TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 | | |
990 | TSI108_INT_TXIDLE | TSI108_INT_TXERROR); | |
991 | if (estat & TSI108_EC_TXESTAT_Q0_ERR) { | |
992 | u32 err = TSI_READ(TSI108_EC_TXERR); | |
993 | TSI_WRITE(TSI108_EC_TXERR, err); | |
994 | ||
995 | if (err && net_ratelimit()) | |
996 | printk(KERN_ERR "%s: TX error %x\n", dev->name, err); | |
997 | } | |
998 | ||
999 | if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) { | |
1000 | spin_lock(&data->txlock); | |
1001 | tsi108_complete_tx(dev); | |
1002 | spin_unlock(&data->txlock); | |
1003 | } | |
1004 | } | |
1005 | ||
1006 | ||
1007 | static irqreturn_t tsi108_irq(int irq, void *dev_id) | |
1008 | { | |
1009 | struct net_device *dev = dev_id; | |
1010 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1011 | u32 stat = TSI_READ(TSI108_EC_INTSTAT); | |
1012 | ||
1013 | if (!(stat & TSI108_INT_ANY)) | |
1014 | return IRQ_NONE; /* Not our interrupt */ | |
1015 | ||
1016 | stat &= ~TSI_READ(TSI108_EC_INTMASK); | |
1017 | ||
1018 | if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE | | |
1019 | TSI108_INT_TXERROR)) | |
1020 | tsi108_tx_int(dev); | |
1021 | if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | | |
1022 | TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN | | |
1023 | TSI108_INT_RXERROR)) | |
1024 | tsi108_rx_int(dev); | |
1025 | ||
1026 | if (stat & TSI108_INT_SFN) { | |
1027 | if (net_ratelimit()) | |
1028 | printk(KERN_DEBUG "%s: SFN error\n", dev->name); | |
1029 | TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN); | |
1030 | } | |
1031 | ||
1032 | if (stat & TSI108_INT_STATCARRY) { | |
1033 | tsi108_stat_carry(dev); | |
1034 | TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY); | |
1035 | } | |
1036 | ||
1037 | return IRQ_HANDLED; | |
1038 | } | |
1039 | ||
1040 | static void tsi108_stop_ethernet(struct net_device *dev) | |
1041 | { | |
1042 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1043 | int i = 1000; | |
1044 | /* Disable all TX and RX queues ... */ | |
1045 | TSI_WRITE(TSI108_EC_TXCTRL, 0); | |
1046 | TSI_WRITE(TSI108_EC_RXCTRL, 0); | |
1047 | ||
1048 | /* ...and wait for them to become idle */ | |
1049 | while(i--) { | |
1050 | if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE)) | |
1051 | break; | |
1052 | udelay(10); | |
1053 | } | |
1054 | i = 1000; | |
1055 | while(i--){ | |
1056 | if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE)) | |
1057 | return; | |
1058 | udelay(10); | |
1059 | } | |
1060 | printk(KERN_ERR "%s function time out \n", __FUNCTION__); | |
1061 | } | |
1062 | ||
1063 | static void tsi108_reset_ether(struct tsi108_prv_data * data) | |
1064 | { | |
1065 | TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST); | |
1066 | udelay(100); | |
1067 | TSI_WRITE(TSI108_MAC_CFG1, 0); | |
1068 | ||
1069 | TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST); | |
1070 | udelay(100); | |
1071 | TSI_WRITE(TSI108_EC_PORTCTRL, | |
1072 | TSI_READ(TSI108_EC_PORTCTRL) & | |
1073 | ~TSI108_EC_PORTCTRL_STATRST); | |
1074 | ||
1075 | TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST); | |
1076 | udelay(100); | |
1077 | TSI_WRITE(TSI108_EC_TXCFG, | |
1078 | TSI_READ(TSI108_EC_TXCFG) & | |
1079 | ~TSI108_EC_TXCFG_RST); | |
1080 | ||
1081 | TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST); | |
1082 | udelay(100); | |
1083 | TSI_WRITE(TSI108_EC_RXCFG, | |
1084 | TSI_READ(TSI108_EC_RXCFG) & | |
1085 | ~TSI108_EC_RXCFG_RST); | |
1086 | ||
1087 | TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, | |
1088 | TSI_READ(TSI108_MAC_MII_MGMT_CFG) | | |
1089 | TSI108_MAC_MII_MGMT_RST); | |
1090 | udelay(100); | |
1091 | TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, | |
1092 | (TSI_READ(TSI108_MAC_MII_MGMT_CFG) & | |
1093 | ~(TSI108_MAC_MII_MGMT_RST | | |
1094 | TSI108_MAC_MII_MGMT_CLK)) | 0x07); | |
1095 | } | |
1096 | ||
1097 | static int tsi108_get_mac(struct net_device *dev) | |
1098 | { | |
1099 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1100 | u32 word1 = TSI_READ(TSI108_MAC_ADDR1); | |
1101 | u32 word2 = TSI_READ(TSI108_MAC_ADDR2); | |
1102 | ||
1103 | /* Note that the octets are reversed from what the manual says, | |
1104 | * producing an even weirder ordering... | |
1105 | */ | |
1106 | if (word2 == 0 && word1 == 0) { | |
1107 | dev->dev_addr[0] = 0x00; | |
1108 | dev->dev_addr[1] = 0x06; | |
1109 | dev->dev_addr[2] = 0xd2; | |
1110 | dev->dev_addr[3] = 0x00; | |
1111 | dev->dev_addr[4] = 0x00; | |
1112 | if (0x8 == data->phy) | |
1113 | dev->dev_addr[5] = 0x01; | |
1114 | else | |
1115 | dev->dev_addr[5] = 0x02; | |
1116 | ||
1117 | word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); | |
1118 | ||
1119 | word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | | |
1120 | (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); | |
1121 | ||
1122 | TSI_WRITE(TSI108_MAC_ADDR1, word1); | |
1123 | TSI_WRITE(TSI108_MAC_ADDR2, word2); | |
1124 | } else { | |
1125 | dev->dev_addr[0] = (word2 >> 16) & 0xff; | |
1126 | dev->dev_addr[1] = (word2 >> 24) & 0xff; | |
1127 | dev->dev_addr[2] = (word1 >> 0) & 0xff; | |
1128 | dev->dev_addr[3] = (word1 >> 8) & 0xff; | |
1129 | dev->dev_addr[4] = (word1 >> 16) & 0xff; | |
1130 | dev->dev_addr[5] = (word1 >> 24) & 0xff; | |
1131 | } | |
1132 | ||
1133 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
1134 | printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2); | |
1135 | return -EINVAL; | |
1136 | } | |
1137 | ||
1138 | return 0; | |
1139 | } | |
1140 | ||
1141 | static int tsi108_set_mac(struct net_device *dev, void *addr) | |
1142 | { | |
1143 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1144 | u32 word1, word2; | |
1145 | int i; | |
1146 | ||
1147 | if (!is_valid_ether_addr(addr)) | |
1148 | return -EINVAL; | |
1149 | ||
1150 | for (i = 0; i < 6; i++) | |
1151 | /* +2 is for the offset of the HW addr type */ | |
1152 | dev->dev_addr[i] = ((unsigned char *)addr)[i + 2]; | |
1153 | ||
1154 | word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); | |
1155 | ||
1156 | word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | | |
1157 | (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); | |
1158 | ||
1159 | spin_lock_irq(&data->misclock); | |
1160 | TSI_WRITE(TSI108_MAC_ADDR1, word1); | |
1161 | TSI_WRITE(TSI108_MAC_ADDR2, word2); | |
1162 | spin_lock(&data->txlock); | |
1163 | ||
1164 | if (data->txfree && data->link_up) | |
1165 | netif_wake_queue(dev); | |
1166 | ||
1167 | spin_unlock(&data->txlock); | |
1168 | spin_unlock_irq(&data->misclock); | |
1169 | return 0; | |
1170 | } | |
1171 | ||
1172 | /* Protected by dev->xmit_lock. */ | |
1173 | static void tsi108_set_rx_mode(struct net_device *dev) | |
1174 | { | |
1175 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1176 | u32 rxcfg = TSI_READ(TSI108_EC_RXCFG); | |
1177 | ||
1178 | if (dev->flags & IFF_PROMISC) { | |
1179 | rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH); | |
1180 | rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE; | |
1181 | goto out; | |
1182 | } | |
1183 | ||
1184 | rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE); | |
1185 | ||
1186 | if (dev->flags & IFF_ALLMULTI || dev->mc_count) { | |
1187 | int i; | |
1188 | struct dev_mc_list *mc = dev->mc_list; | |
1189 | rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH; | |
1190 | ||
1191 | memset(data->mc_hash, 0, sizeof(data->mc_hash)); | |
1192 | ||
1193 | while (mc) { | |
1194 | u32 hash, crc; | |
1195 | ||
1196 | if (mc->dmi_addrlen == 6) { | |
1197 | crc = ether_crc(6, mc->dmi_addr); | |
1198 | hash = crc >> 23; | |
1199 | ||
1200 | __set_bit(hash, &data->mc_hash[0]); | |
1201 | } else { | |
1202 | printk(KERN_ERR | |
1203 | "%s: got multicast address of length %d " | |
1204 | "instead of 6.\n", dev->name, | |
1205 | mc->dmi_addrlen); | |
1206 | } | |
1207 | ||
1208 | mc = mc->next; | |
1209 | } | |
1210 | ||
1211 | TSI_WRITE(TSI108_EC_HASHADDR, | |
1212 | TSI108_EC_HASHADDR_AUTOINC | | |
1213 | TSI108_EC_HASHADDR_MCAST); | |
1214 | ||
1215 | for (i = 0; i < 16; i++) { | |
1216 | /* The manual says that the hardware may drop | |
1217 | * back-to-back writes to the data register. | |
1218 | */ | |
1219 | udelay(1); | |
1220 | TSI_WRITE(TSI108_EC_HASHDATA, | |
1221 | data->mc_hash[i]); | |
1222 | } | |
1223 | } | |
1224 | ||
1225 | out: | |
1226 | TSI_WRITE(TSI108_EC_RXCFG, rxcfg); | |
1227 | } | |
1228 | ||
1229 | static void tsi108_init_phy(struct net_device *dev) | |
1230 | { | |
1231 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1232 | u32 i = 0; | |
1233 | u16 phyval = 0; | |
1234 | unsigned long flags; | |
1235 | ||
1236 | spin_lock_irqsave(&phy_lock, flags); | |
1237 | ||
1238 | tsi108_write_mii(data, MII_BMCR, BMCR_RESET); | |
1239 | while (i--){ | |
1240 | if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET)) | |
1241 | break; | |
1242 | udelay(10); | |
1243 | } | |
1244 | if (i == 0) | |
1245 | printk(KERN_ERR "%s function time out \n", __FUNCTION__); | |
1246 | ||
c1b78d05 JB |
1247 | if (data->phy_type == TSI108_PHY_BCM54XX) { |
1248 | tsi108_write_mii(data, 0x09, 0x0300); | |
1249 | tsi108_write_mii(data, 0x10, 0x1020); | |
1250 | tsi108_write_mii(data, 0x1c, 0x8c00); | |
1251 | } | |
5e123b84 ZR |
1252 | |
1253 | tsi108_write_mii(data, | |
1254 | MII_BMCR, | |
1255 | BMCR_ANENABLE | BMCR_ANRESTART); | |
1256 | while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART) | |
1257 | cpu_relax(); | |
1258 | ||
1259 | /* Set G/MII mode and receive clock select in TBI control #2. The | |
1260 | * second port won't work if this isn't done, even though we don't | |
1261 | * use TBI mode. | |
1262 | */ | |
1263 | ||
1264 | tsi108_write_tbi(data, 0x11, 0x30); | |
1265 | ||
1266 | /* FIXME: It seems to take more than 2 back-to-back reads to the | |
1267 | * PHY_STAT register before the link up status bit is set. | |
1268 | */ | |
1269 | ||
b1aefe58 | 1270 | data->link_up = 0; |
5e123b84 ZR |
1271 | |
1272 | while (!((phyval = tsi108_read_mii(data, MII_BMSR)) & | |
1273 | BMSR_LSTATUS)) { | |
1274 | if (i++ > (MII_READ_DELAY / 10)) { | |
5e123b84 ZR |
1275 | break; |
1276 | } | |
1277 | spin_unlock_irqrestore(&phy_lock, flags); | |
1278 | msleep(10); | |
1279 | spin_lock_irqsave(&phy_lock, flags); | |
1280 | } | |
1281 | ||
6a87155a | 1282 | data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if); |
5e123b84 ZR |
1283 | printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval); |
1284 | data->phy_ok = 1; | |
1285 | data->init_media = 1; | |
1286 | spin_unlock_irqrestore(&phy_lock, flags); | |
1287 | } | |
1288 | ||
1289 | static void tsi108_kill_phy(struct net_device *dev) | |
1290 | { | |
1291 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1292 | unsigned long flags; | |
1293 | ||
1294 | spin_lock_irqsave(&phy_lock, flags); | |
1295 | tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN); | |
1296 | data->phy_ok = 0; | |
1297 | spin_unlock_irqrestore(&phy_lock, flags); | |
1298 | } | |
1299 | ||
1300 | static int tsi108_open(struct net_device *dev) | |
1301 | { | |
1302 | int i; | |
1303 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1304 | unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc); | |
1305 | unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc); | |
1306 | ||
1307 | i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev); | |
1308 | if (i != 0) { | |
1309 | printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n", | |
1310 | data->id, data->irq_num); | |
1311 | return i; | |
1312 | } else { | |
1313 | dev->irq = data->irq_num; | |
1314 | printk(KERN_NOTICE | |
1315 | "tsi108_open : Port %d Assigned IRQ %d to %s\n", | |
1316 | data->id, dev->irq, dev->name); | |
1317 | } | |
1318 | ||
1319 | data->rxring = dma_alloc_coherent(NULL, rxring_size, | |
1320 | &data->rxdma, GFP_KERNEL); | |
1321 | ||
1322 | if (!data->rxring) { | |
1323 | printk(KERN_DEBUG | |
1324 | "TSI108_ETH: failed to allocate memory for rxring!\n"); | |
1325 | return -ENOMEM; | |
1326 | } else { | |
1327 | memset(data->rxring, 0, rxring_size); | |
1328 | } | |
1329 | ||
1330 | data->txring = dma_alloc_coherent(NULL, txring_size, | |
1331 | &data->txdma, GFP_KERNEL); | |
1332 | ||
1333 | if (!data->txring) { | |
1334 | printk(KERN_DEBUG | |
1335 | "TSI108_ETH: failed to allocate memory for txring!\n"); | |
1336 | pci_free_consistent(0, rxring_size, data->rxring, data->rxdma); | |
1337 | return -ENOMEM; | |
1338 | } else { | |
1339 | memset(data->txring, 0, txring_size); | |
1340 | } | |
1341 | ||
1342 | for (i = 0; i < TSI108_RXRING_LEN; i++) { | |
1343 | data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc); | |
1344 | data->rxring[i].blen = TSI108_RXBUF_SIZE; | |
1345 | data->rxring[i].vlan = 0; | |
1346 | } | |
1347 | ||
1348 | data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma; | |
1349 | ||
1350 | data->rxtail = 0; | |
1351 | data->rxhead = 0; | |
1352 | ||
1353 | for (i = 0; i < TSI108_RXRING_LEN; i++) { | |
1354 | struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN); | |
1355 | ||
1356 | if (!skb) { | |
1357 | /* Bah. No memory for now, but maybe we'll get | |
1358 | * some more later. | |
1359 | * For now, we'll live with the smaller ring. | |
1360 | */ | |
1361 | printk(KERN_WARNING | |
1362 | "%s: Could only allocate %d receive skb(s).\n", | |
1363 | dev->name, i); | |
1364 | data->rxhead = i; | |
1365 | break; | |
1366 | } | |
1367 | ||
1368 | data->rxskbs[i] = skb; | |
1369 | /* Align the payload on a 4-byte boundary */ | |
1370 | skb_reserve(skb, 2); | |
1371 | data->rxskbs[i] = skb; | |
1372 | data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data); | |
1373 | data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT; | |
1374 | } | |
1375 | ||
1376 | data->rxfree = i; | |
1377 | TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma); | |
1378 | ||
1379 | for (i = 0; i < TSI108_TXRING_LEN; i++) { | |
1380 | data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc); | |
1381 | data->txring[i].misc = 0; | |
1382 | } | |
1383 | ||
1384 | data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma; | |
1385 | data->txtail = 0; | |
1386 | data->txhead = 0; | |
1387 | data->txfree = TSI108_TXRING_LEN; | |
1388 | TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma); | |
1389 | tsi108_init_phy(dev); | |
1390 | ||
bea3348e SH |
1391 | napi_enable(&data->napi); |
1392 | ||
5e123b84 ZR |
1393 | setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev); |
1394 | mod_timer(&data->timer, jiffies + 1); | |
1395 | ||
1396 | tsi108_restart_rx(data, dev); | |
1397 | ||
1398 | TSI_WRITE(TSI108_EC_INTSTAT, ~0); | |
1399 | ||
1400 | TSI_WRITE(TSI108_EC_INTMASK, | |
1401 | ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR | | |
1402 | TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 | | |
1403 | TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT | | |
1404 | TSI108_INT_SFN | TSI108_INT_STATCARRY)); | |
1405 | ||
1406 | TSI_WRITE(TSI108_MAC_CFG1, | |
1407 | TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN); | |
1408 | netif_start_queue(dev); | |
1409 | return 0; | |
1410 | } | |
1411 | ||
1412 | static int tsi108_close(struct net_device *dev) | |
1413 | { | |
1414 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1415 | ||
1416 | netif_stop_queue(dev); | |
bea3348e | 1417 | napi_disable(&data->napi); |
5e123b84 ZR |
1418 | |
1419 | del_timer_sync(&data->timer); | |
1420 | ||
1421 | tsi108_stop_ethernet(dev); | |
1422 | tsi108_kill_phy(dev); | |
1423 | TSI_WRITE(TSI108_EC_INTMASK, ~0); | |
1424 | TSI_WRITE(TSI108_MAC_CFG1, 0); | |
1425 | ||
1426 | /* Check for any pending TX packets, and drop them. */ | |
1427 | ||
1428 | while (!data->txfree || data->txhead != data->txtail) { | |
1429 | int tx = data->txtail; | |
1430 | struct sk_buff *skb; | |
1431 | skb = data->txskbs[tx]; | |
1432 | data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; | |
1433 | data->txfree++; | |
1434 | dev_kfree_skb(skb); | |
1435 | } | |
1436 | ||
1437 | synchronize_irq(data->irq_num); | |
1438 | free_irq(data->irq_num, dev); | |
1439 | ||
1440 | /* Discard the RX ring. */ | |
1441 | ||
1442 | while (data->rxfree) { | |
1443 | int rx = data->rxtail; | |
1444 | struct sk_buff *skb; | |
1445 | ||
1446 | skb = data->rxskbs[rx]; | |
1447 | data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; | |
1448 | data->rxfree--; | |
1449 | dev_kfree_skb(skb); | |
1450 | } | |
1451 | ||
1452 | dma_free_coherent(0, | |
1453 | TSI108_RXRING_LEN * sizeof(rx_desc), | |
1454 | data->rxring, data->rxdma); | |
1455 | dma_free_coherent(0, | |
1456 | TSI108_TXRING_LEN * sizeof(tx_desc), | |
1457 | data->txring, data->txdma); | |
1458 | ||
1459 | return 0; | |
1460 | } | |
1461 | ||
1462 | static void tsi108_init_mac(struct net_device *dev) | |
1463 | { | |
1464 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1465 | ||
1466 | TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE | | |
1467 | TSI108_MAC_CFG2_PADCRC); | |
1468 | ||
1469 | TSI_WRITE(TSI108_EC_TXTHRESH, | |
1470 | (192 << TSI108_EC_TXTHRESH_STARTFILL) | | |
1471 | (192 << TSI108_EC_TXTHRESH_STOPFILL)); | |
1472 | ||
1473 | TSI_WRITE(TSI108_STAT_CARRYMASK1, | |
1474 | ~(TSI108_STAT_CARRY1_RXBYTES | | |
1475 | TSI108_STAT_CARRY1_RXPKTS | | |
1476 | TSI108_STAT_CARRY1_RXFCS | | |
1477 | TSI108_STAT_CARRY1_RXMCAST | | |
1478 | TSI108_STAT_CARRY1_RXALIGN | | |
1479 | TSI108_STAT_CARRY1_RXLENGTH | | |
1480 | TSI108_STAT_CARRY1_RXRUNT | | |
1481 | TSI108_STAT_CARRY1_RXJUMBO | | |
1482 | TSI108_STAT_CARRY1_RXFRAG | | |
1483 | TSI108_STAT_CARRY1_RXJABBER | | |
1484 | TSI108_STAT_CARRY1_RXDROP)); | |
1485 | ||
1486 | TSI_WRITE(TSI108_STAT_CARRYMASK2, | |
1487 | ~(TSI108_STAT_CARRY2_TXBYTES | | |
1488 | TSI108_STAT_CARRY2_TXPKTS | | |
1489 | TSI108_STAT_CARRY2_TXEXDEF | | |
1490 | TSI108_STAT_CARRY2_TXEXCOL | | |
1491 | TSI108_STAT_CARRY2_TXTCOL | | |
1492 | TSI108_STAT_CARRY2_TXPAUSE)); | |
1493 | ||
1494 | TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN); | |
1495 | TSI_WRITE(TSI108_MAC_CFG1, 0); | |
1496 | ||
1497 | TSI_WRITE(TSI108_EC_RXCFG, | |
1498 | TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE); | |
1499 | ||
1500 | TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT | | |
1501 | TSI108_EC_TXQ_CFG_EOQ_OWN_INT | | |
1502 | TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT << | |
1503 | TSI108_EC_TXQ_CFG_SFNPORT)); | |
1504 | ||
1505 | TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT | | |
1506 | TSI108_EC_RXQ_CFG_EOQ_OWN_INT | | |
1507 | TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT << | |
1508 | TSI108_EC_RXQ_CFG_SFNPORT)); | |
1509 | ||
1510 | TSI_WRITE(TSI108_EC_TXQ_BUFCFG, | |
1511 | TSI108_EC_TXQ_BUFCFG_BURST256 | | |
1512 | TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << | |
1513 | TSI108_EC_TXQ_BUFCFG_SFNPORT)); | |
1514 | ||
1515 | TSI_WRITE(TSI108_EC_RXQ_BUFCFG, | |
1516 | TSI108_EC_RXQ_BUFCFG_BURST256 | | |
1517 | TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << | |
1518 | TSI108_EC_RXQ_BUFCFG_SFNPORT)); | |
1519 | ||
1520 | TSI_WRITE(TSI108_EC_INTMASK, ~0); | |
1521 | } | |
1522 | ||
9dde447a AB |
1523 | static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
1524 | { | |
1525 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1526 | unsigned long flags; | |
1527 | int rc; | |
1528 | ||
1529 | spin_lock_irqsave(&data->txlock, flags); | |
1530 | rc = mii_ethtool_gset(&data->mii_if, cmd); | |
1531 | spin_unlock_irqrestore(&data->txlock, flags); | |
1532 | ||
1533 | return rc; | |
1534 | } | |
1535 | ||
1536 | static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
1537 | { | |
1538 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1539 | unsigned long flags; | |
1540 | int rc; | |
1541 | ||
1542 | spin_lock_irqsave(&data->txlock, flags); | |
1543 | rc = mii_ethtool_sset(&data->mii_if, cmd); | |
1544 | spin_unlock_irqrestore(&data->txlock, flags); | |
1545 | ||
1546 | return rc; | |
1547 | } | |
1548 | ||
5e123b84 ZR |
1549 | static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
1550 | { | |
1551 | struct tsi108_prv_data *data = netdev_priv(dev); | |
9dde447a AB |
1552 | if (!netif_running(dev)) |
1553 | return -EINVAL; | |
5e123b84 ZR |
1554 | return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL); |
1555 | } | |
1556 | ||
9dde447a AB |
1557 | static const struct ethtool_ops tsi108_ethtool_ops = { |
1558 | .get_link = ethtool_op_get_link, | |
1559 | .get_settings = tsi108_get_settings, | |
1560 | .set_settings = tsi108_set_settings, | |
1561 | }; | |
1562 | ||
5e123b84 ZR |
1563 | static int |
1564 | tsi108_init_one(struct platform_device *pdev) | |
1565 | { | |
1566 | struct net_device *dev = NULL; | |
1567 | struct tsi108_prv_data *data = NULL; | |
1568 | hw_info *einfo; | |
1569 | int err = 0; | |
0795af57 | 1570 | DECLARE_MAC_BUF(mac); |
5e123b84 ZR |
1571 | |
1572 | einfo = pdev->dev.platform_data; | |
1573 | ||
1574 | if (NULL == einfo) { | |
1575 | printk(KERN_ERR "tsi-eth %d: Missing additional data!\n", | |
1576 | pdev->id); | |
1577 | return -ENODEV; | |
1578 | } | |
1579 | ||
1580 | /* Create an ethernet device instance */ | |
1581 | ||
1582 | dev = alloc_etherdev(sizeof(struct tsi108_prv_data)); | |
1583 | if (!dev) { | |
1584 | printk("tsi108_eth: Could not allocate a device structure\n"); | |
1585 | return -ENOMEM; | |
1586 | } | |
1587 | ||
1588 | printk("tsi108_eth%d: probe...\n", pdev->id); | |
1589 | data = netdev_priv(dev); | |
bea3348e | 1590 | data->dev = dev; |
5e123b84 ZR |
1591 | |
1592 | pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n", | |
1593 | pdev->id, einfo->regs, einfo->phyregs, | |
1594 | einfo->phy, einfo->irq_num); | |
1595 | ||
1596 | data->regs = ioremap(einfo->regs, 0x400); | |
1597 | if (NULL == data->regs) { | |
1598 | err = -ENOMEM; | |
1599 | goto regs_fail; | |
1600 | } | |
1601 | ||
1602 | data->phyregs = ioremap(einfo->phyregs, 0x400); | |
1603 | if (NULL == data->phyregs) { | |
1604 | err = -ENOMEM; | |
1605 | goto regs_fail; | |
1606 | } | |
1607 | /* MII setup */ | |
1608 | data->mii_if.dev = dev; | |
1609 | data->mii_if.mdio_read = tsi108_mdio_read; | |
1610 | data->mii_if.mdio_write = tsi108_mdio_write; | |
1611 | data->mii_if.phy_id = einfo->phy; | |
1612 | data->mii_if.phy_id_mask = 0x1f; | |
1613 | data->mii_if.reg_num_mask = 0x1f; | |
5e123b84 ZR |
1614 | |
1615 | data->phy = einfo->phy; | |
c1b78d05 | 1616 | data->phy_type = einfo->phy_type; |
5e123b84 ZR |
1617 | data->irq_num = einfo->irq_num; |
1618 | data->id = pdev->id; | |
1619 | dev->open = tsi108_open; | |
1620 | dev->stop = tsi108_close; | |
1621 | dev->hard_start_xmit = tsi108_send_packet; | |
1622 | dev->set_mac_address = tsi108_set_mac; | |
1623 | dev->set_multicast_list = tsi108_set_rx_mode; | |
1624 | dev->get_stats = tsi108_get_stats; | |
bea3348e | 1625 | netif_napi_add(dev, &data->napi, tsi108_poll, 64); |
5e123b84 | 1626 | dev->do_ioctl = tsi108_do_ioctl; |
9dde447a | 1627 | dev->ethtool_ops = &tsi108_ethtool_ops; |
5e123b84 ZR |
1628 | |
1629 | /* Apparently, the Linux networking code won't use scatter-gather | |
1630 | * if the hardware doesn't do checksums. However, it's faster | |
1631 | * to checksum in place and use SG, as (among other reasons) | |
1632 | * the cache won't be dirtied (which then has to be flushed | |
1633 | * before DMA). The checksumming is done by the driver (via | |
1634 | * a new function skb_csum_dev() in net/core/skbuff.c). | |
1635 | */ | |
1636 | ||
1637 | dev->features = NETIF_F_HIGHDMA; | |
5e123b84 ZR |
1638 | |
1639 | spin_lock_init(&data->txlock); | |
1640 | spin_lock_init(&data->misclock); | |
1641 | ||
1642 | tsi108_reset_ether(data); | |
1643 | tsi108_kill_phy(dev); | |
1644 | ||
1645 | if ((err = tsi108_get_mac(dev)) != 0) { | |
1646 | printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n", | |
1647 | dev->name); | |
1648 | goto register_fail; | |
1649 | } | |
1650 | ||
1651 | tsi108_init_mac(dev); | |
1652 | err = register_netdev(dev); | |
1653 | if (err) { | |
1654 | printk(KERN_ERR "%s: Cannot register net device, aborting.\n", | |
1655 | dev->name); | |
1656 | goto register_fail; | |
1657 | } | |
1658 | ||
a235ef2c | 1659 | platform_set_drvdata(pdev, dev); |
c9b2ca73 | 1660 | printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %s\n", |
0795af57 | 1661 | dev->name, print_mac(mac, dev->dev_addr)); |
5e123b84 ZR |
1662 | #ifdef DEBUG |
1663 | data->msg_enable = DEBUG; | |
1664 | dump_eth_one(dev); | |
1665 | #endif | |
1666 | ||
1667 | return 0; | |
1668 | ||
1669 | register_fail: | |
1670 | iounmap(data->regs); | |
1671 | iounmap(data->phyregs); | |
1672 | ||
1673 | regs_fail: | |
1674 | free_netdev(dev); | |
1675 | return err; | |
1676 | } | |
1677 | ||
1678 | /* There's no way to either get interrupts from the PHY when | |
1679 | * something changes, or to have the Tsi108 automatically communicate | |
1680 | * with the PHY to reconfigure itself. | |
1681 | * | |
1682 | * Thus, we have to do it using a timer. | |
1683 | */ | |
1684 | ||
1685 | static void tsi108_timed_checker(unsigned long dev_ptr) | |
1686 | { | |
1687 | struct net_device *dev = (struct net_device *)dev_ptr; | |
1688 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1689 | ||
1690 | tsi108_check_phy(dev); | |
1691 | tsi108_check_rxring(dev); | |
1692 | mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL); | |
1693 | } | |
1694 | ||
1695 | static int tsi108_ether_init(void) | |
1696 | { | |
1697 | int ret; | |
1698 | ret = platform_driver_register (&tsi_eth_driver); | |
1699 | if (ret < 0){ | |
1700 | printk("tsi108_ether_init: error initializing ethernet " | |
1701 | "device\n"); | |
1702 | return ret; | |
1703 | } | |
1704 | return 0; | |
1705 | } | |
1706 | ||
1707 | static int tsi108_ether_remove(struct platform_device *pdev) | |
1708 | { | |
1709 | struct net_device *dev = platform_get_drvdata(pdev); | |
1710 | struct tsi108_prv_data *priv = netdev_priv(dev); | |
1711 | ||
1712 | unregister_netdev(dev); | |
1713 | tsi108_stop_ethernet(dev); | |
1714 | platform_set_drvdata(pdev, NULL); | |
1715 | iounmap(priv->regs); | |
1716 | iounmap(priv->phyregs); | |
1717 | free_netdev(dev); | |
1718 | ||
1719 | return 0; | |
1720 | } | |
1721 | static void tsi108_ether_exit(void) | |
1722 | { | |
1723 | platform_driver_unregister(&tsi_eth_driver); | |
1724 | } | |
1725 | ||
1726 | module_init(tsi108_ether_init); | |
1727 | module_exit(tsi108_ether_exit); | |
1728 | ||
1729 | MODULE_AUTHOR("Tundra Semiconductor Corporation"); | |
1730 | MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver"); | |
1731 | MODULE_LICENSE("GPL"); |