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5e123b84 ZR |
1 | /******************************************************************************* |
2 | ||
3 | Copyright(c) 2006 Tundra Semiconductor Corporation. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify it | |
6 | under the terms of the GNU General Public License as published by the Free | |
7 | Software Foundation; either version 2 of the License, or (at your option) | |
8 | any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
17 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | *******************************************************************************/ | |
20 | ||
21 | /* This driver is based on the driver code originally developed | |
22 | * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by | |
23 | * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation | |
24 | * | |
25 | * Currently changes from original version are: | |
26 | * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com) | |
27 | * - modifications to handle two ports independently and support for | |
28 | * additional PHY devices (alexandre.bounine@tundra.com) | |
29 | * - Get hardware information from platform device. (tie-fei.zang@freescale.com) | |
30 | * | |
31 | */ | |
32 | ||
33 | #include <linux/module.h> | |
34 | #include <linux/types.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/net.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/etherdevice.h> | |
39 | #include <linux/skbuff.h> | |
40 | #include <linux/slab.h> | |
5e123b84 ZR |
41 | #include <linux/spinlock.h> |
42 | #include <linux/delay.h> | |
43 | #include <linux/crc32.h> | |
44 | #include <linux/mii.h> | |
45 | #include <linux/device.h> | |
46 | #include <linux/pci.h> | |
47 | #include <linux/rtnetlink.h> | |
48 | #include <linux/timer.h> | |
49 | #include <linux/platform_device.h> | |
50 | #include <linux/etherdevice.h> | |
51 | ||
52 | #include <asm/system.h> | |
53 | #include <asm/io.h> | |
54 | #include <asm/tsi108.h> | |
55 | ||
56 | #include "tsi108_eth.h" | |
57 | ||
58 | #define MII_READ_DELAY 10000 /* max link wait time in msec */ | |
59 | ||
60 | #define TSI108_RXRING_LEN 256 | |
61 | ||
62 | /* NOTE: The driver currently does not support receiving packets | |
63 | * larger than the buffer size, so don't decrease this (unless you | |
64 | * want to add such support). | |
65 | */ | |
66 | #define TSI108_RXBUF_SIZE 1536 | |
67 | ||
68 | #define TSI108_TXRING_LEN 256 | |
69 | ||
70 | #define TSI108_TX_INT_FREQ 64 | |
71 | ||
72 | /* Check the phy status every half a second. */ | |
73 | #define CHECK_PHY_INTERVAL (HZ/2) | |
74 | ||
75 | static int tsi108_init_one(struct platform_device *pdev); | |
76 | static int tsi108_ether_remove(struct platform_device *pdev); | |
77 | ||
78 | struct tsi108_prv_data { | |
79 | void __iomem *regs; /* Base of normal regs */ | |
80 | void __iomem *phyregs; /* Base of register bank used for PHY access */ | |
81 | ||
82 | unsigned int phy; /* Index of PHY for this interface */ | |
83 | unsigned int irq_num; | |
84 | unsigned int id; | |
85 | ||
86 | struct timer_list timer;/* Timer that triggers the check phy function */ | |
87 | unsigned int rxtail; /* Next entry in rxring to read */ | |
88 | unsigned int rxhead; /* Next entry in rxring to give a new buffer */ | |
89 | unsigned int rxfree; /* Number of free, allocated RX buffers */ | |
90 | ||
91 | unsigned int rxpending; /* Non-zero if there are still descriptors | |
92 | * to be processed from a previous descriptor | |
93 | * interrupt condition that has been cleared */ | |
94 | ||
95 | unsigned int txtail; /* Next TX descriptor to check status on */ | |
96 | unsigned int txhead; /* Next TX descriptor to use */ | |
97 | ||
98 | /* Number of free TX descriptors. This could be calculated from | |
99 | * rxhead and rxtail if one descriptor were left unused to disambiguate | |
100 | * full and empty conditions, but it's simpler to just keep track | |
101 | * explicitly. */ | |
102 | ||
103 | unsigned int txfree; | |
104 | ||
105 | unsigned int phy_ok; /* The PHY is currently powered on. */ | |
106 | ||
107 | /* PHY status (duplex is 1 for half, 2 for full, | |
108 | * so that the default 0 indicates that neither has | |
109 | * yet been configured). */ | |
110 | ||
111 | unsigned int link_up; | |
112 | unsigned int speed; | |
113 | unsigned int duplex; | |
114 | ||
115 | tx_desc *txring; | |
116 | rx_desc *rxring; | |
117 | struct sk_buff *txskbs[TSI108_TXRING_LEN]; | |
118 | struct sk_buff *rxskbs[TSI108_RXRING_LEN]; | |
119 | ||
120 | dma_addr_t txdma, rxdma; | |
121 | ||
122 | /* txlock nests in misclock and phy_lock */ | |
123 | ||
124 | spinlock_t txlock, misclock; | |
125 | ||
126 | /* stats is used to hold the upper bits of each hardware counter, | |
127 | * and tmpstats is used to hold the full values for returning | |
128 | * to the caller of get_stats(). They must be separate in case | |
129 | * an overflow interrupt occurs before the stats are consumed. | |
130 | */ | |
131 | ||
132 | struct net_device_stats stats; | |
133 | struct net_device_stats tmpstats; | |
134 | ||
135 | /* These stats are kept separate in hardware, thus require individual | |
136 | * fields for handling carry. They are combined in get_stats. | |
137 | */ | |
138 | ||
139 | unsigned long rx_fcs; /* Add to rx_frame_errors */ | |
140 | unsigned long rx_short_fcs; /* Add to rx_frame_errors */ | |
141 | unsigned long rx_long_fcs; /* Add to rx_frame_errors */ | |
142 | unsigned long rx_underruns; /* Add to rx_length_errors */ | |
143 | unsigned long rx_overruns; /* Add to rx_length_errors */ | |
144 | ||
145 | unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */ | |
146 | unsigned long tx_pause_drop; /* Add to tx_aborted_errors */ | |
147 | ||
148 | unsigned long mc_hash[16]; | |
149 | u32 msg_enable; /* debug message level */ | |
150 | struct mii_if_info mii_if; | |
151 | unsigned int init_media; | |
152 | }; | |
153 | ||
154 | /* Structure for a device driver */ | |
155 | ||
156 | static struct platform_driver tsi_eth_driver = { | |
157 | .probe = tsi108_init_one, | |
158 | .remove = tsi108_ether_remove, | |
159 | .driver = { | |
160 | .name = "tsi-ethernet", | |
161 | }, | |
162 | }; | |
163 | ||
164 | static void tsi108_timed_checker(unsigned long dev_ptr); | |
165 | ||
166 | static void dump_eth_one(struct net_device *dev) | |
167 | { | |
168 | struct tsi108_prv_data *data = netdev_priv(dev); | |
169 | ||
170 | printk("Dumping %s...\n", dev->name); | |
171 | printk("intstat %x intmask %x phy_ok %d" | |
172 | " link %d speed %d duplex %d\n", | |
173 | TSI_READ(TSI108_EC_INTSTAT), | |
174 | TSI_READ(TSI108_EC_INTMASK), data->phy_ok, | |
175 | data->link_up, data->speed, data->duplex); | |
176 | ||
177 | printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n", | |
178 | data->txhead, data->txtail, data->txfree, | |
179 | TSI_READ(TSI108_EC_TXSTAT), | |
180 | TSI_READ(TSI108_EC_TXESTAT), | |
181 | TSI_READ(TSI108_EC_TXERR)); | |
182 | ||
183 | printk("RX: head %d, tail %d, free %d, stat %x," | |
184 | " estat %x, err %x, pending %d\n\n", | |
185 | data->rxhead, data->rxtail, data->rxfree, | |
186 | TSI_READ(TSI108_EC_RXSTAT), | |
187 | TSI_READ(TSI108_EC_RXESTAT), | |
188 | TSI_READ(TSI108_EC_RXERR), data->rxpending); | |
189 | } | |
190 | ||
191 | /* Synchronization is needed between the thread and up/down events. | |
192 | * Note that the PHY is accessed through the same registers for both | |
193 | * interfaces, so this can't be made interface-specific. | |
194 | */ | |
195 | ||
196 | static DEFINE_SPINLOCK(phy_lock); | |
197 | ||
198 | static int tsi108_read_mii(struct tsi108_prv_data *data, int reg) | |
199 | { | |
200 | unsigned i; | |
201 | ||
202 | TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, | |
203 | (data->phy << TSI108_MAC_MII_ADDR_PHY) | | |
204 | (reg << TSI108_MAC_MII_ADDR_REG)); | |
205 | TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0); | |
206 | TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ); | |
207 | for (i = 0; i < 100; i++) { | |
208 | if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) & | |
209 | (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY))) | |
210 | break; | |
211 | udelay(10); | |
212 | } | |
213 | ||
214 | if (i == 100) | |
215 | return 0xffff; | |
216 | else | |
217 | return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN)); | |
218 | } | |
219 | ||
220 | static void tsi108_write_mii(struct tsi108_prv_data *data, | |
221 | int reg, u16 val) | |
222 | { | |
223 | unsigned i = 100; | |
224 | TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, | |
225 | (data->phy << TSI108_MAC_MII_ADDR_PHY) | | |
226 | (reg << TSI108_MAC_MII_ADDR_REG)); | |
227 | TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val); | |
228 | while (i--) { | |
229 | if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) & | |
230 | TSI108_MAC_MII_IND_BUSY)) | |
231 | break; | |
232 | udelay(10); | |
233 | } | |
234 | } | |
235 | ||
236 | static int tsi108_mdio_read(struct net_device *dev, int addr, int reg) | |
237 | { | |
238 | struct tsi108_prv_data *data = netdev_priv(dev); | |
239 | return tsi108_read_mii(data, reg); | |
240 | } | |
241 | ||
242 | static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val) | |
243 | { | |
244 | struct tsi108_prv_data *data = netdev_priv(dev); | |
245 | tsi108_write_mii(data, reg, val); | |
246 | } | |
247 | ||
248 | static inline void tsi108_write_tbi(struct tsi108_prv_data *data, | |
249 | int reg, u16 val) | |
250 | { | |
251 | unsigned i = 1000; | |
252 | TSI_WRITE(TSI108_MAC_MII_ADDR, | |
253 | (0x1e << TSI108_MAC_MII_ADDR_PHY) | |
254 | | (reg << TSI108_MAC_MII_ADDR_REG)); | |
255 | TSI_WRITE(TSI108_MAC_MII_DATAOUT, val); | |
256 | while(i--) { | |
257 | if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY)) | |
258 | return; | |
259 | udelay(10); | |
260 | } | |
261 | printk(KERN_ERR "%s function time out \n", __FUNCTION__); | |
262 | } | |
263 | ||
264 | static int mii_speed(struct mii_if_info *mii) | |
265 | { | |
266 | int advert, lpa, val, media; | |
267 | int lpa2 = 0; | |
268 | int speed; | |
269 | ||
270 | if (!mii_link_ok(mii)) | |
271 | return 0; | |
272 | ||
273 | val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR); | |
274 | if ((val & BMSR_ANEGCOMPLETE) == 0) | |
275 | return 0; | |
276 | ||
277 | advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE); | |
278 | lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA); | |
279 | media = mii_nway_result(advert & lpa); | |
280 | ||
281 | if (mii->supports_gmii) | |
282 | lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000); | |
283 | ||
284 | speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 : | |
285 | (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10); | |
286 | return speed; | |
287 | } | |
288 | ||
289 | static void tsi108_check_phy(struct net_device *dev) | |
290 | { | |
291 | struct tsi108_prv_data *data = netdev_priv(dev); | |
292 | u32 mac_cfg2_reg, portctrl_reg; | |
293 | u32 duplex; | |
294 | u32 speed; | |
295 | unsigned long flags; | |
296 | ||
297 | /* Do a dummy read, as for some reason the first read | |
298 | * after a link becomes up returns link down, even if | |
299 | * it's been a while since the link came up. | |
300 | */ | |
301 | ||
302 | spin_lock_irqsave(&phy_lock, flags); | |
303 | ||
304 | if (!data->phy_ok) | |
305 | goto out; | |
306 | ||
307 | tsi108_read_mii(data, MII_BMSR); | |
308 | ||
309 | duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media); | |
310 | data->init_media = 0; | |
311 | ||
312 | if (netif_carrier_ok(dev)) { | |
313 | ||
314 | speed = mii_speed(&data->mii_if); | |
315 | ||
316 | if ((speed != data->speed) || duplex) { | |
317 | ||
318 | mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2); | |
319 | portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL); | |
320 | ||
321 | mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK; | |
322 | ||
323 | if (speed == 1000) { | |
324 | mac_cfg2_reg |= TSI108_MAC_CFG2_GIG; | |
325 | portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG; | |
326 | } else { | |
327 | mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG; | |
328 | portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG; | |
329 | } | |
330 | ||
331 | data->speed = speed; | |
332 | ||
333 | if (data->mii_if.full_duplex) { | |
334 | mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX; | |
335 | portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX; | |
336 | data->duplex = 2; | |
337 | } else { | |
338 | mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX; | |
339 | portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX; | |
340 | data->duplex = 1; | |
341 | } | |
342 | ||
343 | TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg); | |
344 | TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg); | |
345 | ||
346 | if (data->link_up == 0) { | |
347 | /* The manual says it can take 3-4 usecs for the speed change | |
348 | * to take effect. | |
349 | */ | |
350 | udelay(5); | |
351 | ||
352 | spin_lock(&data->txlock); | |
353 | if (is_valid_ether_addr(dev->dev_addr) && data->txfree) | |
354 | netif_wake_queue(dev); | |
355 | ||
356 | data->link_up = 1; | |
357 | spin_unlock(&data->txlock); | |
358 | } | |
359 | } | |
360 | ||
361 | } else { | |
362 | if (data->link_up == 1) { | |
363 | netif_stop_queue(dev); | |
364 | data->link_up = 0; | |
365 | printk(KERN_NOTICE "%s : link is down\n", dev->name); | |
366 | } | |
367 | ||
368 | goto out; | |
369 | } | |
370 | ||
371 | ||
372 | out: | |
373 | spin_unlock_irqrestore(&phy_lock, flags); | |
374 | } | |
375 | ||
376 | static inline void | |
377 | tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift, | |
378 | unsigned long *upper) | |
379 | { | |
380 | if (carry & carry_bit) | |
381 | *upper += carry_shift; | |
382 | } | |
383 | ||
384 | static void tsi108_stat_carry(struct net_device *dev) | |
385 | { | |
386 | struct tsi108_prv_data *data = netdev_priv(dev); | |
387 | u32 carry1, carry2; | |
388 | ||
389 | spin_lock_irq(&data->misclock); | |
390 | ||
391 | carry1 = TSI_READ(TSI108_STAT_CARRY1); | |
392 | carry2 = TSI_READ(TSI108_STAT_CARRY2); | |
393 | ||
394 | TSI_WRITE(TSI108_STAT_CARRY1, carry1); | |
395 | TSI_WRITE(TSI108_STAT_CARRY2, carry2); | |
396 | ||
397 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES, | |
398 | TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); | |
399 | ||
400 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS, | |
401 | TSI108_STAT_RXPKTS_CARRY, | |
402 | &data->stats.rx_packets); | |
403 | ||
404 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS, | |
405 | TSI108_STAT_RXFCS_CARRY, &data->rx_fcs); | |
406 | ||
407 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST, | |
408 | TSI108_STAT_RXMCAST_CARRY, | |
409 | &data->stats.multicast); | |
410 | ||
411 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN, | |
412 | TSI108_STAT_RXALIGN_CARRY, | |
413 | &data->stats.rx_frame_errors); | |
414 | ||
415 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH, | |
416 | TSI108_STAT_RXLENGTH_CARRY, | |
417 | &data->stats.rx_length_errors); | |
418 | ||
419 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT, | |
420 | TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); | |
421 | ||
422 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO, | |
423 | TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); | |
424 | ||
425 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG, | |
426 | TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); | |
427 | ||
428 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER, | |
429 | TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs); | |
430 | ||
431 | tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP, | |
432 | TSI108_STAT_RXDROP_CARRY, | |
433 | &data->stats.rx_missed_errors); | |
434 | ||
435 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES, | |
436 | TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); | |
437 | ||
438 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS, | |
439 | TSI108_STAT_TXPKTS_CARRY, | |
440 | &data->stats.tx_packets); | |
441 | ||
442 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF, | |
443 | TSI108_STAT_TXEXDEF_CARRY, | |
444 | &data->stats.tx_aborted_errors); | |
445 | ||
446 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL, | |
447 | TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort); | |
448 | ||
449 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL, | |
450 | TSI108_STAT_TXTCOL_CARRY, | |
451 | &data->stats.collisions); | |
452 | ||
453 | tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE, | |
454 | TSI108_STAT_TXPAUSEDROP_CARRY, | |
455 | &data->tx_pause_drop); | |
456 | ||
457 | spin_unlock_irq(&data->misclock); | |
458 | } | |
459 | ||
460 | /* Read a stat counter atomically with respect to carries. | |
461 | * data->misclock must be held. | |
462 | */ | |
463 | static inline unsigned long | |
464 | tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit, | |
465 | int carry_shift, unsigned long *upper) | |
466 | { | |
467 | int carryreg; | |
468 | unsigned long val; | |
469 | ||
470 | if (reg < 0xb0) | |
471 | carryreg = TSI108_STAT_CARRY1; | |
472 | else | |
473 | carryreg = TSI108_STAT_CARRY2; | |
474 | ||
475 | again: | |
476 | val = TSI_READ(reg) | *upper; | |
477 | ||
478 | /* Check to see if it overflowed, but the interrupt hasn't | |
479 | * been serviced yet. If so, handle the carry here, and | |
480 | * try again. | |
481 | */ | |
482 | ||
483 | if (unlikely(TSI_READ(carryreg) & carry_bit)) { | |
484 | *upper += carry_shift; | |
485 | TSI_WRITE(carryreg, carry_bit); | |
486 | goto again; | |
487 | } | |
488 | ||
489 | return val; | |
490 | } | |
491 | ||
492 | static struct net_device_stats *tsi108_get_stats(struct net_device *dev) | |
493 | { | |
494 | unsigned long excol; | |
495 | ||
496 | struct tsi108_prv_data *data = netdev_priv(dev); | |
497 | spin_lock_irq(&data->misclock); | |
498 | ||
499 | data->tmpstats.rx_packets = | |
500 | tsi108_read_stat(data, TSI108_STAT_RXPKTS, | |
501 | TSI108_STAT_CARRY1_RXPKTS, | |
502 | TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets); | |
503 | ||
504 | data->tmpstats.tx_packets = | |
505 | tsi108_read_stat(data, TSI108_STAT_TXPKTS, | |
506 | TSI108_STAT_CARRY2_TXPKTS, | |
507 | TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets); | |
508 | ||
509 | data->tmpstats.rx_bytes = | |
510 | tsi108_read_stat(data, TSI108_STAT_RXBYTES, | |
511 | TSI108_STAT_CARRY1_RXBYTES, | |
512 | TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); | |
513 | ||
514 | data->tmpstats.tx_bytes = | |
515 | tsi108_read_stat(data, TSI108_STAT_TXBYTES, | |
516 | TSI108_STAT_CARRY2_TXBYTES, | |
517 | TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); | |
518 | ||
519 | data->tmpstats.multicast = | |
520 | tsi108_read_stat(data, TSI108_STAT_RXMCAST, | |
521 | TSI108_STAT_CARRY1_RXMCAST, | |
522 | TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast); | |
523 | ||
524 | excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL, | |
525 | TSI108_STAT_CARRY2_TXEXCOL, | |
526 | TSI108_STAT_TXEXCOL_CARRY, | |
527 | &data->tx_coll_abort); | |
528 | ||
529 | data->tmpstats.collisions = | |
530 | tsi108_read_stat(data, TSI108_STAT_TXTCOL, | |
531 | TSI108_STAT_CARRY2_TXTCOL, | |
532 | TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions); | |
533 | ||
534 | data->tmpstats.collisions += excol; | |
535 | ||
536 | data->tmpstats.rx_length_errors = | |
537 | tsi108_read_stat(data, TSI108_STAT_RXLENGTH, | |
538 | TSI108_STAT_CARRY1_RXLENGTH, | |
539 | TSI108_STAT_RXLENGTH_CARRY, | |
540 | &data->stats.rx_length_errors); | |
541 | ||
542 | data->tmpstats.rx_length_errors += | |
543 | tsi108_read_stat(data, TSI108_STAT_RXRUNT, | |
544 | TSI108_STAT_CARRY1_RXRUNT, | |
545 | TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); | |
546 | ||
547 | data->tmpstats.rx_length_errors += | |
548 | tsi108_read_stat(data, TSI108_STAT_RXJUMBO, | |
549 | TSI108_STAT_CARRY1_RXJUMBO, | |
550 | TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); | |
551 | ||
552 | data->tmpstats.rx_frame_errors = | |
553 | tsi108_read_stat(data, TSI108_STAT_RXALIGN, | |
554 | TSI108_STAT_CARRY1_RXALIGN, | |
555 | TSI108_STAT_RXALIGN_CARRY, | |
556 | &data->stats.rx_frame_errors); | |
557 | ||
558 | data->tmpstats.rx_frame_errors += | |
559 | tsi108_read_stat(data, TSI108_STAT_RXFCS, | |
560 | TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY, | |
561 | &data->rx_fcs); | |
562 | ||
563 | data->tmpstats.rx_frame_errors += | |
564 | tsi108_read_stat(data, TSI108_STAT_RXFRAG, | |
565 | TSI108_STAT_CARRY1_RXFRAG, | |
566 | TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); | |
567 | ||
568 | data->tmpstats.rx_missed_errors = | |
569 | tsi108_read_stat(data, TSI108_STAT_RXDROP, | |
570 | TSI108_STAT_CARRY1_RXDROP, | |
571 | TSI108_STAT_RXDROP_CARRY, | |
572 | &data->stats.rx_missed_errors); | |
573 | ||
574 | /* These three are maintained by software. */ | |
575 | data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors; | |
576 | data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors; | |
577 | ||
578 | data->tmpstats.tx_aborted_errors = | |
579 | tsi108_read_stat(data, TSI108_STAT_TXEXDEF, | |
580 | TSI108_STAT_CARRY2_TXEXDEF, | |
581 | TSI108_STAT_TXEXDEF_CARRY, | |
582 | &data->stats.tx_aborted_errors); | |
583 | ||
584 | data->tmpstats.tx_aborted_errors += | |
585 | tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP, | |
586 | TSI108_STAT_CARRY2_TXPAUSE, | |
587 | TSI108_STAT_TXPAUSEDROP_CARRY, | |
588 | &data->tx_pause_drop); | |
589 | ||
590 | data->tmpstats.tx_aborted_errors += excol; | |
591 | ||
592 | data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors; | |
593 | data->tmpstats.rx_errors = data->tmpstats.rx_length_errors + | |
594 | data->tmpstats.rx_crc_errors + | |
595 | data->tmpstats.rx_frame_errors + | |
596 | data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors; | |
597 | ||
598 | spin_unlock_irq(&data->misclock); | |
599 | return &data->tmpstats; | |
600 | } | |
601 | ||
602 | static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev) | |
603 | { | |
604 | TSI_WRITE(TSI108_EC_RXQ_PTRHIGH, | |
605 | TSI108_EC_RXQ_PTRHIGH_VALID); | |
606 | ||
607 | TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO | |
608 | | TSI108_EC_RXCTRL_QUEUE0); | |
609 | } | |
610 | ||
611 | static void tsi108_restart_tx(struct tsi108_prv_data * data) | |
612 | { | |
613 | TSI_WRITE(TSI108_EC_TXQ_PTRHIGH, | |
614 | TSI108_EC_TXQ_PTRHIGH_VALID); | |
615 | ||
616 | TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT | | |
617 | TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0); | |
618 | } | |
619 | ||
620 | /* txlock must be held by caller, with IRQs disabled, and | |
621 | * with permission to re-enable them when the lock is dropped. | |
622 | */ | |
623 | static void tsi108_complete_tx(struct net_device *dev) | |
624 | { | |
625 | struct tsi108_prv_data *data = netdev_priv(dev); | |
626 | int tx; | |
627 | struct sk_buff *skb; | |
628 | int release = 0; | |
629 | ||
630 | while (!data->txfree || data->txhead != data->txtail) { | |
631 | tx = data->txtail; | |
632 | ||
633 | if (data->txring[tx].misc & TSI108_TX_OWN) | |
634 | break; | |
635 | ||
636 | skb = data->txskbs[tx]; | |
637 | ||
638 | if (!(data->txring[tx].misc & TSI108_TX_OK)) | |
639 | printk("%s: bad tx packet, misc %x\n", | |
640 | dev->name, data->txring[tx].misc); | |
641 | ||
642 | data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; | |
643 | data->txfree++; | |
644 | ||
645 | if (data->txring[tx].misc & TSI108_TX_EOF) { | |
646 | dev_kfree_skb_any(skb); | |
647 | release++; | |
648 | } | |
649 | } | |
650 | ||
651 | if (release) { | |
652 | if (is_valid_ether_addr(dev->dev_addr) && data->link_up) | |
653 | netif_wake_queue(dev); | |
654 | } | |
655 | } | |
656 | ||
657 | static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev) | |
658 | { | |
659 | struct tsi108_prv_data *data = netdev_priv(dev); | |
660 | int frags = skb_shinfo(skb)->nr_frags + 1; | |
661 | int i; | |
662 | ||
663 | if (!data->phy_ok && net_ratelimit()) | |
664 | printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name); | |
665 | ||
666 | if (!data->link_up) { | |
667 | printk(KERN_ERR "%s: Transmit while link is down!\n", | |
668 | dev->name); | |
669 | netif_stop_queue(dev); | |
670 | return NETDEV_TX_BUSY; | |
671 | } | |
672 | ||
673 | if (data->txfree < MAX_SKB_FRAGS + 1) { | |
674 | netif_stop_queue(dev); | |
675 | ||
676 | if (net_ratelimit()) | |
677 | printk(KERN_ERR "%s: Transmit with full tx ring!\n", | |
678 | dev->name); | |
679 | return NETDEV_TX_BUSY; | |
680 | } | |
681 | ||
682 | if (data->txfree - frags < MAX_SKB_FRAGS + 1) { | |
683 | netif_stop_queue(dev); | |
684 | } | |
685 | ||
686 | spin_lock_irq(&data->txlock); | |
687 | ||
688 | for (i = 0; i < frags; i++) { | |
689 | int misc = 0; | |
690 | int tx = data->txhead; | |
691 | ||
692 | /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with | |
693 | * the interrupt bit. TX descriptor-complete interrupts are | |
694 | * enabled when the queue fills up, and masked when there is | |
695 | * still free space. This way, when saturating the outbound | |
696 | * link, the tx interrupts are kept to a reasonable level. | |
697 | * When the queue is not full, reclamation of skbs still occurs | |
698 | * as new packets are transmitted, or on a queue-empty | |
699 | * interrupt. | |
700 | */ | |
701 | ||
702 | if ((tx % TSI108_TX_INT_FREQ == 0) && | |
703 | ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ)) | |
704 | misc = TSI108_TX_INT; | |
705 | ||
706 | data->txskbs[tx] = skb; | |
707 | ||
708 | if (i == 0) { | |
709 | data->txring[tx].buf0 = dma_map_single(NULL, skb->data, | |
710 | skb->len - skb->data_len, DMA_TO_DEVICE); | |
711 | data->txring[tx].len = skb->len - skb->data_len; | |
712 | misc |= TSI108_TX_SOF; | |
713 | } else { | |
714 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; | |
715 | ||
716 | data->txring[tx].buf0 = | |
717 | dma_map_page(NULL, frag->page, frag->page_offset, | |
718 | frag->size, DMA_TO_DEVICE); | |
719 | data->txring[tx].len = frag->size; | |
720 | } | |
721 | ||
722 | if (i == frags - 1) | |
723 | misc |= TSI108_TX_EOF; | |
724 | ||
725 | if (netif_msg_pktdata(data)) { | |
726 | int i; | |
727 | printk("%s: Tx Frame contents (%d)\n", dev->name, | |
728 | skb->len); | |
729 | for (i = 0; i < skb->len; i++) | |
730 | printk(" %2.2x", skb->data[i]); | |
731 | printk(".\n"); | |
732 | } | |
733 | data->txring[tx].misc = misc | TSI108_TX_OWN; | |
734 | ||
735 | data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN; | |
736 | data->txfree--; | |
737 | } | |
738 | ||
739 | tsi108_complete_tx(dev); | |
740 | ||
741 | /* This must be done after the check for completed tx descriptors, | |
742 | * so that the tail pointer is correct. | |
743 | */ | |
744 | ||
745 | if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0)) | |
746 | tsi108_restart_tx(data); | |
747 | ||
748 | spin_unlock_irq(&data->txlock); | |
749 | return NETDEV_TX_OK; | |
750 | } | |
751 | ||
752 | static int tsi108_complete_rx(struct net_device *dev, int budget) | |
753 | { | |
754 | struct tsi108_prv_data *data = netdev_priv(dev); | |
755 | int done = 0; | |
756 | ||
757 | while (data->rxfree && done != budget) { | |
758 | int rx = data->rxtail; | |
759 | struct sk_buff *skb; | |
760 | ||
761 | if (data->rxring[rx].misc & TSI108_RX_OWN) | |
762 | break; | |
763 | ||
764 | skb = data->rxskbs[rx]; | |
765 | data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; | |
766 | data->rxfree--; | |
767 | done++; | |
768 | ||
769 | if (data->rxring[rx].misc & TSI108_RX_BAD) { | |
770 | spin_lock_irq(&data->misclock); | |
771 | ||
772 | if (data->rxring[rx].misc & TSI108_RX_CRC) | |
773 | data->stats.rx_crc_errors++; | |
774 | if (data->rxring[rx].misc & TSI108_RX_OVER) | |
775 | data->stats.rx_fifo_errors++; | |
776 | ||
777 | spin_unlock_irq(&data->misclock); | |
778 | ||
779 | dev_kfree_skb_any(skb); | |
780 | continue; | |
781 | } | |
782 | if (netif_msg_pktdata(data)) { | |
783 | int i; | |
784 | printk("%s: Rx Frame contents (%d)\n", | |
785 | dev->name, data->rxring[rx].len); | |
786 | for (i = 0; i < data->rxring[rx].len; i++) | |
787 | printk(" %2.2x", skb->data[i]); | |
788 | printk(".\n"); | |
789 | } | |
790 | ||
791 | skb->dev = dev; | |
792 | skb_put(skb, data->rxring[rx].len); | |
793 | skb->protocol = eth_type_trans(skb, dev); | |
794 | netif_receive_skb(skb); | |
795 | dev->last_rx = jiffies; | |
796 | } | |
797 | ||
798 | return done; | |
799 | } | |
800 | ||
801 | static int tsi108_refill_rx(struct net_device *dev, int budget) | |
802 | { | |
803 | struct tsi108_prv_data *data = netdev_priv(dev); | |
804 | int done = 0; | |
805 | ||
806 | while (data->rxfree != TSI108_RXRING_LEN && done != budget) { | |
807 | int rx = data->rxhead; | |
808 | struct sk_buff *skb; | |
809 | ||
810 | data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2); | |
811 | if (!skb) | |
812 | break; | |
813 | ||
814 | skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */ | |
815 | ||
816 | data->rxring[rx].buf0 = dma_map_single(NULL, skb->data, | |
817 | TSI108_RX_SKB_SIZE, | |
818 | DMA_FROM_DEVICE); | |
819 | ||
820 | /* Sometimes the hardware sets blen to zero after packet | |
821 | * reception, even though the manual says that it's only ever | |
822 | * modified by the driver. | |
823 | */ | |
824 | ||
825 | data->rxring[rx].blen = TSI108_RX_SKB_SIZE; | |
826 | data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT; | |
827 | ||
828 | data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN; | |
829 | data->rxfree++; | |
830 | done++; | |
831 | } | |
832 | ||
833 | if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) & | |
834 | TSI108_EC_RXSTAT_QUEUE0)) | |
835 | tsi108_restart_rx(data, dev); | |
836 | ||
837 | return done; | |
838 | } | |
839 | ||
840 | static int tsi108_poll(struct net_device *dev, int *budget) | |
841 | { | |
842 | struct tsi108_prv_data *data = netdev_priv(dev); | |
843 | u32 estat = TSI_READ(TSI108_EC_RXESTAT); | |
844 | u32 intstat = TSI_READ(TSI108_EC_INTSTAT); | |
845 | int total_budget = min(*budget, dev->quota); | |
846 | int num_received = 0, num_filled = 0, budget_used; | |
847 | ||
848 | intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | | |
849 | TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT; | |
850 | ||
851 | TSI_WRITE(TSI108_EC_RXESTAT, estat); | |
852 | TSI_WRITE(TSI108_EC_INTSTAT, intstat); | |
853 | ||
854 | if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT)) | |
855 | num_received = tsi108_complete_rx(dev, total_budget); | |
856 | ||
857 | /* This should normally fill no more slots than the number of | |
858 | * packets received in tsi108_complete_rx(). The exception | |
859 | * is when we previously ran out of memory for RX SKBs. In that | |
860 | * case, it's helpful to obey the budget, not only so that the | |
861 | * CPU isn't hogged, but so that memory (which may still be low) | |
862 | * is not hogged by one device. | |
863 | * | |
864 | * A work unit is considered to be two SKBs to allow us to catch | |
865 | * up when the ring has shrunk due to out-of-memory but we're | |
866 | * still removing the full budget's worth of packets each time. | |
867 | */ | |
868 | ||
869 | if (data->rxfree < TSI108_RXRING_LEN) | |
870 | num_filled = tsi108_refill_rx(dev, total_budget * 2); | |
871 | ||
872 | if (intstat & TSI108_INT_RXERROR) { | |
873 | u32 err = TSI_READ(TSI108_EC_RXERR); | |
874 | TSI_WRITE(TSI108_EC_RXERR, err); | |
875 | ||
876 | if (err) { | |
877 | if (net_ratelimit()) | |
878 | printk(KERN_DEBUG "%s: RX error %x\n", | |
879 | dev->name, err); | |
880 | ||
881 | if (!(TSI_READ(TSI108_EC_RXSTAT) & | |
882 | TSI108_EC_RXSTAT_QUEUE0)) | |
883 | tsi108_restart_rx(data, dev); | |
884 | } | |
885 | } | |
886 | ||
887 | if (intstat & TSI108_INT_RXOVERRUN) { | |
888 | spin_lock_irq(&data->misclock); | |
889 | data->stats.rx_fifo_errors++; | |
890 | spin_unlock_irq(&data->misclock); | |
891 | } | |
892 | ||
893 | budget_used = max(num_received, num_filled / 2); | |
894 | ||
895 | *budget -= budget_used; | |
896 | dev->quota -= budget_used; | |
897 | ||
898 | if (budget_used != total_budget) { | |
899 | data->rxpending = 0; | |
900 | netif_rx_complete(dev); | |
901 | ||
902 | TSI_WRITE(TSI108_EC_INTMASK, | |
903 | TSI_READ(TSI108_EC_INTMASK) | |
904 | & ~(TSI108_INT_RXQUEUE0 | |
905 | | TSI108_INT_RXTHRESH | | |
906 | TSI108_INT_RXOVERRUN | | |
907 | TSI108_INT_RXERROR | | |
908 | TSI108_INT_RXWAIT)); | |
909 | ||
910 | /* IRQs are level-triggered, so no need to re-check */ | |
911 | return 0; | |
912 | } else { | |
913 | data->rxpending = 1; | |
914 | } | |
915 | ||
916 | return 1; | |
917 | } | |
918 | ||
919 | static void tsi108_rx_int(struct net_device *dev) | |
920 | { | |
921 | struct tsi108_prv_data *data = netdev_priv(dev); | |
922 | ||
923 | /* A race could cause dev to already be scheduled, so it's not an | |
924 | * error if that happens (and interrupts shouldn't be re-masked, | |
925 | * because that can cause harmful races, if poll has already | |
926 | * unmasked them but not cleared LINK_STATE_SCHED). | |
927 | * | |
928 | * This can happen if this code races with tsi108_poll(), which masks | |
929 | * the interrupts after tsi108_irq_one() read the mask, but before | |
930 | * netif_rx_schedule is called. It could also happen due to calls | |
931 | * from tsi108_check_rxring(). | |
932 | */ | |
933 | ||
934 | if (netif_rx_schedule_prep(dev)) { | |
935 | /* Mask, rather than ack, the receive interrupts. The ack | |
936 | * will happen in tsi108_poll(). | |
937 | */ | |
938 | ||
939 | TSI_WRITE(TSI108_EC_INTMASK, | |
940 | TSI_READ(TSI108_EC_INTMASK) | | |
941 | TSI108_INT_RXQUEUE0 | |
942 | | TSI108_INT_RXTHRESH | | |
943 | TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | | |
944 | TSI108_INT_RXWAIT); | |
945 | __netif_rx_schedule(dev); | |
946 | } else { | |
947 | if (!netif_running(dev)) { | |
948 | /* This can happen if an interrupt occurs while the | |
949 | * interface is being brought down, as the START | |
950 | * bit is cleared before the stop function is called. | |
951 | * | |
952 | * In this case, the interrupts must be masked, or | |
953 | * they will continue indefinitely. | |
954 | * | |
955 | * There's a race here if the interface is brought down | |
956 | * and then up in rapid succession, as the device could | |
957 | * be made running after the above check and before | |
958 | * the masking below. This will only happen if the IRQ | |
959 | * thread has a lower priority than the task brining | |
960 | * up the interface. Fixing this race would likely | |
961 | * require changes in generic code. | |
962 | */ | |
963 | ||
964 | TSI_WRITE(TSI108_EC_INTMASK, | |
965 | TSI_READ | |
966 | (TSI108_EC_INTMASK) | | |
967 | TSI108_INT_RXQUEUE0 | | |
968 | TSI108_INT_RXTHRESH | | |
969 | TSI108_INT_RXOVERRUN | | |
970 | TSI108_INT_RXERROR | | |
971 | TSI108_INT_RXWAIT); | |
972 | } | |
973 | } | |
974 | } | |
975 | ||
976 | /* If the RX ring has run out of memory, try periodically | |
977 | * to allocate some more, as otherwise poll would never | |
978 | * get called (apart from the initial end-of-queue condition). | |
979 | * | |
980 | * This is called once per second (by default) from the thread. | |
981 | */ | |
982 | ||
983 | static void tsi108_check_rxring(struct net_device *dev) | |
984 | { | |
985 | struct tsi108_prv_data *data = netdev_priv(dev); | |
986 | ||
987 | /* A poll is scheduled, as opposed to caling tsi108_refill_rx | |
988 | * directly, so as to keep the receive path single-threaded | |
989 | * (and thus not needing a lock). | |
990 | */ | |
991 | ||
992 | if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4) | |
993 | tsi108_rx_int(dev); | |
994 | } | |
995 | ||
996 | static void tsi108_tx_int(struct net_device *dev) | |
997 | { | |
998 | struct tsi108_prv_data *data = netdev_priv(dev); | |
999 | u32 estat = TSI_READ(TSI108_EC_TXESTAT); | |
1000 | ||
1001 | TSI_WRITE(TSI108_EC_TXESTAT, estat); | |
1002 | TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 | | |
1003 | TSI108_INT_TXIDLE | TSI108_INT_TXERROR); | |
1004 | if (estat & TSI108_EC_TXESTAT_Q0_ERR) { | |
1005 | u32 err = TSI_READ(TSI108_EC_TXERR); | |
1006 | TSI_WRITE(TSI108_EC_TXERR, err); | |
1007 | ||
1008 | if (err && net_ratelimit()) | |
1009 | printk(KERN_ERR "%s: TX error %x\n", dev->name, err); | |
1010 | } | |
1011 | ||
1012 | if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) { | |
1013 | spin_lock(&data->txlock); | |
1014 | tsi108_complete_tx(dev); | |
1015 | spin_unlock(&data->txlock); | |
1016 | } | |
1017 | } | |
1018 | ||
1019 | ||
1020 | static irqreturn_t tsi108_irq(int irq, void *dev_id) | |
1021 | { | |
1022 | struct net_device *dev = dev_id; | |
1023 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1024 | u32 stat = TSI_READ(TSI108_EC_INTSTAT); | |
1025 | ||
1026 | if (!(stat & TSI108_INT_ANY)) | |
1027 | return IRQ_NONE; /* Not our interrupt */ | |
1028 | ||
1029 | stat &= ~TSI_READ(TSI108_EC_INTMASK); | |
1030 | ||
1031 | if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE | | |
1032 | TSI108_INT_TXERROR)) | |
1033 | tsi108_tx_int(dev); | |
1034 | if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | | |
1035 | TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN | | |
1036 | TSI108_INT_RXERROR)) | |
1037 | tsi108_rx_int(dev); | |
1038 | ||
1039 | if (stat & TSI108_INT_SFN) { | |
1040 | if (net_ratelimit()) | |
1041 | printk(KERN_DEBUG "%s: SFN error\n", dev->name); | |
1042 | TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN); | |
1043 | } | |
1044 | ||
1045 | if (stat & TSI108_INT_STATCARRY) { | |
1046 | tsi108_stat_carry(dev); | |
1047 | TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY); | |
1048 | } | |
1049 | ||
1050 | return IRQ_HANDLED; | |
1051 | } | |
1052 | ||
1053 | static void tsi108_stop_ethernet(struct net_device *dev) | |
1054 | { | |
1055 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1056 | int i = 1000; | |
1057 | /* Disable all TX and RX queues ... */ | |
1058 | TSI_WRITE(TSI108_EC_TXCTRL, 0); | |
1059 | TSI_WRITE(TSI108_EC_RXCTRL, 0); | |
1060 | ||
1061 | /* ...and wait for them to become idle */ | |
1062 | while(i--) { | |
1063 | if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE)) | |
1064 | break; | |
1065 | udelay(10); | |
1066 | } | |
1067 | i = 1000; | |
1068 | while(i--){ | |
1069 | if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE)) | |
1070 | return; | |
1071 | udelay(10); | |
1072 | } | |
1073 | printk(KERN_ERR "%s function time out \n", __FUNCTION__); | |
1074 | } | |
1075 | ||
1076 | static void tsi108_reset_ether(struct tsi108_prv_data * data) | |
1077 | { | |
1078 | TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST); | |
1079 | udelay(100); | |
1080 | TSI_WRITE(TSI108_MAC_CFG1, 0); | |
1081 | ||
1082 | TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST); | |
1083 | udelay(100); | |
1084 | TSI_WRITE(TSI108_EC_PORTCTRL, | |
1085 | TSI_READ(TSI108_EC_PORTCTRL) & | |
1086 | ~TSI108_EC_PORTCTRL_STATRST); | |
1087 | ||
1088 | TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST); | |
1089 | udelay(100); | |
1090 | TSI_WRITE(TSI108_EC_TXCFG, | |
1091 | TSI_READ(TSI108_EC_TXCFG) & | |
1092 | ~TSI108_EC_TXCFG_RST); | |
1093 | ||
1094 | TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST); | |
1095 | udelay(100); | |
1096 | TSI_WRITE(TSI108_EC_RXCFG, | |
1097 | TSI_READ(TSI108_EC_RXCFG) & | |
1098 | ~TSI108_EC_RXCFG_RST); | |
1099 | ||
1100 | TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, | |
1101 | TSI_READ(TSI108_MAC_MII_MGMT_CFG) | | |
1102 | TSI108_MAC_MII_MGMT_RST); | |
1103 | udelay(100); | |
1104 | TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, | |
1105 | (TSI_READ(TSI108_MAC_MII_MGMT_CFG) & | |
1106 | ~(TSI108_MAC_MII_MGMT_RST | | |
1107 | TSI108_MAC_MII_MGMT_CLK)) | 0x07); | |
1108 | } | |
1109 | ||
1110 | static int tsi108_get_mac(struct net_device *dev) | |
1111 | { | |
1112 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1113 | u32 word1 = TSI_READ(TSI108_MAC_ADDR1); | |
1114 | u32 word2 = TSI_READ(TSI108_MAC_ADDR2); | |
1115 | ||
1116 | /* Note that the octets are reversed from what the manual says, | |
1117 | * producing an even weirder ordering... | |
1118 | */ | |
1119 | if (word2 == 0 && word1 == 0) { | |
1120 | dev->dev_addr[0] = 0x00; | |
1121 | dev->dev_addr[1] = 0x06; | |
1122 | dev->dev_addr[2] = 0xd2; | |
1123 | dev->dev_addr[3] = 0x00; | |
1124 | dev->dev_addr[4] = 0x00; | |
1125 | if (0x8 == data->phy) | |
1126 | dev->dev_addr[5] = 0x01; | |
1127 | else | |
1128 | dev->dev_addr[5] = 0x02; | |
1129 | ||
1130 | word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); | |
1131 | ||
1132 | word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | | |
1133 | (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); | |
1134 | ||
1135 | TSI_WRITE(TSI108_MAC_ADDR1, word1); | |
1136 | TSI_WRITE(TSI108_MAC_ADDR2, word2); | |
1137 | } else { | |
1138 | dev->dev_addr[0] = (word2 >> 16) & 0xff; | |
1139 | dev->dev_addr[1] = (word2 >> 24) & 0xff; | |
1140 | dev->dev_addr[2] = (word1 >> 0) & 0xff; | |
1141 | dev->dev_addr[3] = (word1 >> 8) & 0xff; | |
1142 | dev->dev_addr[4] = (word1 >> 16) & 0xff; | |
1143 | dev->dev_addr[5] = (word1 >> 24) & 0xff; | |
1144 | } | |
1145 | ||
1146 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
1147 | printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2); | |
1148 | return -EINVAL; | |
1149 | } | |
1150 | ||
1151 | return 0; | |
1152 | } | |
1153 | ||
1154 | static int tsi108_set_mac(struct net_device *dev, void *addr) | |
1155 | { | |
1156 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1157 | u32 word1, word2; | |
1158 | int i; | |
1159 | ||
1160 | if (!is_valid_ether_addr(addr)) | |
1161 | return -EINVAL; | |
1162 | ||
1163 | for (i = 0; i < 6; i++) | |
1164 | /* +2 is for the offset of the HW addr type */ | |
1165 | dev->dev_addr[i] = ((unsigned char *)addr)[i + 2]; | |
1166 | ||
1167 | word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); | |
1168 | ||
1169 | word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | | |
1170 | (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); | |
1171 | ||
1172 | spin_lock_irq(&data->misclock); | |
1173 | TSI_WRITE(TSI108_MAC_ADDR1, word1); | |
1174 | TSI_WRITE(TSI108_MAC_ADDR2, word2); | |
1175 | spin_lock(&data->txlock); | |
1176 | ||
1177 | if (data->txfree && data->link_up) | |
1178 | netif_wake_queue(dev); | |
1179 | ||
1180 | spin_unlock(&data->txlock); | |
1181 | spin_unlock_irq(&data->misclock); | |
1182 | return 0; | |
1183 | } | |
1184 | ||
1185 | /* Protected by dev->xmit_lock. */ | |
1186 | static void tsi108_set_rx_mode(struct net_device *dev) | |
1187 | { | |
1188 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1189 | u32 rxcfg = TSI_READ(TSI108_EC_RXCFG); | |
1190 | ||
1191 | if (dev->flags & IFF_PROMISC) { | |
1192 | rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH); | |
1193 | rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE; | |
1194 | goto out; | |
1195 | } | |
1196 | ||
1197 | rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE); | |
1198 | ||
1199 | if (dev->flags & IFF_ALLMULTI || dev->mc_count) { | |
1200 | int i; | |
1201 | struct dev_mc_list *mc = dev->mc_list; | |
1202 | rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH; | |
1203 | ||
1204 | memset(data->mc_hash, 0, sizeof(data->mc_hash)); | |
1205 | ||
1206 | while (mc) { | |
1207 | u32 hash, crc; | |
1208 | ||
1209 | if (mc->dmi_addrlen == 6) { | |
1210 | crc = ether_crc(6, mc->dmi_addr); | |
1211 | hash = crc >> 23; | |
1212 | ||
1213 | __set_bit(hash, &data->mc_hash[0]); | |
1214 | } else { | |
1215 | printk(KERN_ERR | |
1216 | "%s: got multicast address of length %d " | |
1217 | "instead of 6.\n", dev->name, | |
1218 | mc->dmi_addrlen); | |
1219 | } | |
1220 | ||
1221 | mc = mc->next; | |
1222 | } | |
1223 | ||
1224 | TSI_WRITE(TSI108_EC_HASHADDR, | |
1225 | TSI108_EC_HASHADDR_AUTOINC | | |
1226 | TSI108_EC_HASHADDR_MCAST); | |
1227 | ||
1228 | for (i = 0; i < 16; i++) { | |
1229 | /* The manual says that the hardware may drop | |
1230 | * back-to-back writes to the data register. | |
1231 | */ | |
1232 | udelay(1); | |
1233 | TSI_WRITE(TSI108_EC_HASHDATA, | |
1234 | data->mc_hash[i]); | |
1235 | } | |
1236 | } | |
1237 | ||
1238 | out: | |
1239 | TSI_WRITE(TSI108_EC_RXCFG, rxcfg); | |
1240 | } | |
1241 | ||
1242 | static void tsi108_init_phy(struct net_device *dev) | |
1243 | { | |
1244 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1245 | u32 i = 0; | |
1246 | u16 phyval = 0; | |
1247 | unsigned long flags; | |
1248 | ||
1249 | spin_lock_irqsave(&phy_lock, flags); | |
1250 | ||
1251 | tsi108_write_mii(data, MII_BMCR, BMCR_RESET); | |
1252 | while (i--){ | |
1253 | if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET)) | |
1254 | break; | |
1255 | udelay(10); | |
1256 | } | |
1257 | if (i == 0) | |
1258 | printk(KERN_ERR "%s function time out \n", __FUNCTION__); | |
1259 | ||
1260 | #if (TSI108_PHY_TYPE == PHY_BCM54XX) /* Broadcom BCM54xx PHY */ | |
1261 | tsi108_write_mii(data, 0x09, 0x0300); | |
1262 | tsi108_write_mii(data, 0x10, 0x1020); | |
1263 | tsi108_write_mii(data, 0x1c, 0x8c00); | |
1264 | #endif | |
1265 | ||
1266 | tsi108_write_mii(data, | |
1267 | MII_BMCR, | |
1268 | BMCR_ANENABLE | BMCR_ANRESTART); | |
1269 | while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART) | |
1270 | cpu_relax(); | |
1271 | ||
1272 | /* Set G/MII mode and receive clock select in TBI control #2. The | |
1273 | * second port won't work if this isn't done, even though we don't | |
1274 | * use TBI mode. | |
1275 | */ | |
1276 | ||
1277 | tsi108_write_tbi(data, 0x11, 0x30); | |
1278 | ||
1279 | /* FIXME: It seems to take more than 2 back-to-back reads to the | |
1280 | * PHY_STAT register before the link up status bit is set. | |
1281 | */ | |
1282 | ||
1283 | data->link_up = 1; | |
1284 | ||
1285 | while (!((phyval = tsi108_read_mii(data, MII_BMSR)) & | |
1286 | BMSR_LSTATUS)) { | |
1287 | if (i++ > (MII_READ_DELAY / 10)) { | |
1288 | data->link_up = 0; | |
1289 | break; | |
1290 | } | |
1291 | spin_unlock_irqrestore(&phy_lock, flags); | |
1292 | msleep(10); | |
1293 | spin_lock_irqsave(&phy_lock, flags); | |
1294 | } | |
1295 | ||
1296 | printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval); | |
1297 | data->phy_ok = 1; | |
1298 | data->init_media = 1; | |
1299 | spin_unlock_irqrestore(&phy_lock, flags); | |
1300 | } | |
1301 | ||
1302 | static void tsi108_kill_phy(struct net_device *dev) | |
1303 | { | |
1304 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1305 | unsigned long flags; | |
1306 | ||
1307 | spin_lock_irqsave(&phy_lock, flags); | |
1308 | tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN); | |
1309 | data->phy_ok = 0; | |
1310 | spin_unlock_irqrestore(&phy_lock, flags); | |
1311 | } | |
1312 | ||
1313 | static int tsi108_open(struct net_device *dev) | |
1314 | { | |
1315 | int i; | |
1316 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1317 | unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc); | |
1318 | unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc); | |
1319 | ||
1320 | i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev); | |
1321 | if (i != 0) { | |
1322 | printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n", | |
1323 | data->id, data->irq_num); | |
1324 | return i; | |
1325 | } else { | |
1326 | dev->irq = data->irq_num; | |
1327 | printk(KERN_NOTICE | |
1328 | "tsi108_open : Port %d Assigned IRQ %d to %s\n", | |
1329 | data->id, dev->irq, dev->name); | |
1330 | } | |
1331 | ||
1332 | data->rxring = dma_alloc_coherent(NULL, rxring_size, | |
1333 | &data->rxdma, GFP_KERNEL); | |
1334 | ||
1335 | if (!data->rxring) { | |
1336 | printk(KERN_DEBUG | |
1337 | "TSI108_ETH: failed to allocate memory for rxring!\n"); | |
1338 | return -ENOMEM; | |
1339 | } else { | |
1340 | memset(data->rxring, 0, rxring_size); | |
1341 | } | |
1342 | ||
1343 | data->txring = dma_alloc_coherent(NULL, txring_size, | |
1344 | &data->txdma, GFP_KERNEL); | |
1345 | ||
1346 | if (!data->txring) { | |
1347 | printk(KERN_DEBUG | |
1348 | "TSI108_ETH: failed to allocate memory for txring!\n"); | |
1349 | pci_free_consistent(0, rxring_size, data->rxring, data->rxdma); | |
1350 | return -ENOMEM; | |
1351 | } else { | |
1352 | memset(data->txring, 0, txring_size); | |
1353 | } | |
1354 | ||
1355 | for (i = 0; i < TSI108_RXRING_LEN; i++) { | |
1356 | data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc); | |
1357 | data->rxring[i].blen = TSI108_RXBUF_SIZE; | |
1358 | data->rxring[i].vlan = 0; | |
1359 | } | |
1360 | ||
1361 | data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma; | |
1362 | ||
1363 | data->rxtail = 0; | |
1364 | data->rxhead = 0; | |
1365 | ||
1366 | for (i = 0; i < TSI108_RXRING_LEN; i++) { | |
1367 | struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN); | |
1368 | ||
1369 | if (!skb) { | |
1370 | /* Bah. No memory for now, but maybe we'll get | |
1371 | * some more later. | |
1372 | * For now, we'll live with the smaller ring. | |
1373 | */ | |
1374 | printk(KERN_WARNING | |
1375 | "%s: Could only allocate %d receive skb(s).\n", | |
1376 | dev->name, i); | |
1377 | data->rxhead = i; | |
1378 | break; | |
1379 | } | |
1380 | ||
1381 | data->rxskbs[i] = skb; | |
1382 | /* Align the payload on a 4-byte boundary */ | |
1383 | skb_reserve(skb, 2); | |
1384 | data->rxskbs[i] = skb; | |
1385 | data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data); | |
1386 | data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT; | |
1387 | } | |
1388 | ||
1389 | data->rxfree = i; | |
1390 | TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma); | |
1391 | ||
1392 | for (i = 0; i < TSI108_TXRING_LEN; i++) { | |
1393 | data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc); | |
1394 | data->txring[i].misc = 0; | |
1395 | } | |
1396 | ||
1397 | data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma; | |
1398 | data->txtail = 0; | |
1399 | data->txhead = 0; | |
1400 | data->txfree = TSI108_TXRING_LEN; | |
1401 | TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma); | |
1402 | tsi108_init_phy(dev); | |
1403 | ||
1404 | setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev); | |
1405 | mod_timer(&data->timer, jiffies + 1); | |
1406 | ||
1407 | tsi108_restart_rx(data, dev); | |
1408 | ||
1409 | TSI_WRITE(TSI108_EC_INTSTAT, ~0); | |
1410 | ||
1411 | TSI_WRITE(TSI108_EC_INTMASK, | |
1412 | ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR | | |
1413 | TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 | | |
1414 | TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT | | |
1415 | TSI108_INT_SFN | TSI108_INT_STATCARRY)); | |
1416 | ||
1417 | TSI_WRITE(TSI108_MAC_CFG1, | |
1418 | TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN); | |
1419 | netif_start_queue(dev); | |
1420 | return 0; | |
1421 | } | |
1422 | ||
1423 | static int tsi108_close(struct net_device *dev) | |
1424 | { | |
1425 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1426 | ||
1427 | netif_stop_queue(dev); | |
1428 | ||
1429 | del_timer_sync(&data->timer); | |
1430 | ||
1431 | tsi108_stop_ethernet(dev); | |
1432 | tsi108_kill_phy(dev); | |
1433 | TSI_WRITE(TSI108_EC_INTMASK, ~0); | |
1434 | TSI_WRITE(TSI108_MAC_CFG1, 0); | |
1435 | ||
1436 | /* Check for any pending TX packets, and drop them. */ | |
1437 | ||
1438 | while (!data->txfree || data->txhead != data->txtail) { | |
1439 | int tx = data->txtail; | |
1440 | struct sk_buff *skb; | |
1441 | skb = data->txskbs[tx]; | |
1442 | data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; | |
1443 | data->txfree++; | |
1444 | dev_kfree_skb(skb); | |
1445 | } | |
1446 | ||
1447 | synchronize_irq(data->irq_num); | |
1448 | free_irq(data->irq_num, dev); | |
1449 | ||
1450 | /* Discard the RX ring. */ | |
1451 | ||
1452 | while (data->rxfree) { | |
1453 | int rx = data->rxtail; | |
1454 | struct sk_buff *skb; | |
1455 | ||
1456 | skb = data->rxskbs[rx]; | |
1457 | data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; | |
1458 | data->rxfree--; | |
1459 | dev_kfree_skb(skb); | |
1460 | } | |
1461 | ||
1462 | dma_free_coherent(0, | |
1463 | TSI108_RXRING_LEN * sizeof(rx_desc), | |
1464 | data->rxring, data->rxdma); | |
1465 | dma_free_coherent(0, | |
1466 | TSI108_TXRING_LEN * sizeof(tx_desc), | |
1467 | data->txring, data->txdma); | |
1468 | ||
1469 | return 0; | |
1470 | } | |
1471 | ||
1472 | static void tsi108_init_mac(struct net_device *dev) | |
1473 | { | |
1474 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1475 | ||
1476 | TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE | | |
1477 | TSI108_MAC_CFG2_PADCRC); | |
1478 | ||
1479 | TSI_WRITE(TSI108_EC_TXTHRESH, | |
1480 | (192 << TSI108_EC_TXTHRESH_STARTFILL) | | |
1481 | (192 << TSI108_EC_TXTHRESH_STOPFILL)); | |
1482 | ||
1483 | TSI_WRITE(TSI108_STAT_CARRYMASK1, | |
1484 | ~(TSI108_STAT_CARRY1_RXBYTES | | |
1485 | TSI108_STAT_CARRY1_RXPKTS | | |
1486 | TSI108_STAT_CARRY1_RXFCS | | |
1487 | TSI108_STAT_CARRY1_RXMCAST | | |
1488 | TSI108_STAT_CARRY1_RXALIGN | | |
1489 | TSI108_STAT_CARRY1_RXLENGTH | | |
1490 | TSI108_STAT_CARRY1_RXRUNT | | |
1491 | TSI108_STAT_CARRY1_RXJUMBO | | |
1492 | TSI108_STAT_CARRY1_RXFRAG | | |
1493 | TSI108_STAT_CARRY1_RXJABBER | | |
1494 | TSI108_STAT_CARRY1_RXDROP)); | |
1495 | ||
1496 | TSI_WRITE(TSI108_STAT_CARRYMASK2, | |
1497 | ~(TSI108_STAT_CARRY2_TXBYTES | | |
1498 | TSI108_STAT_CARRY2_TXPKTS | | |
1499 | TSI108_STAT_CARRY2_TXEXDEF | | |
1500 | TSI108_STAT_CARRY2_TXEXCOL | | |
1501 | TSI108_STAT_CARRY2_TXTCOL | | |
1502 | TSI108_STAT_CARRY2_TXPAUSE)); | |
1503 | ||
1504 | TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN); | |
1505 | TSI_WRITE(TSI108_MAC_CFG1, 0); | |
1506 | ||
1507 | TSI_WRITE(TSI108_EC_RXCFG, | |
1508 | TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE); | |
1509 | ||
1510 | TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT | | |
1511 | TSI108_EC_TXQ_CFG_EOQ_OWN_INT | | |
1512 | TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT << | |
1513 | TSI108_EC_TXQ_CFG_SFNPORT)); | |
1514 | ||
1515 | TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT | | |
1516 | TSI108_EC_RXQ_CFG_EOQ_OWN_INT | | |
1517 | TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT << | |
1518 | TSI108_EC_RXQ_CFG_SFNPORT)); | |
1519 | ||
1520 | TSI_WRITE(TSI108_EC_TXQ_BUFCFG, | |
1521 | TSI108_EC_TXQ_BUFCFG_BURST256 | | |
1522 | TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << | |
1523 | TSI108_EC_TXQ_BUFCFG_SFNPORT)); | |
1524 | ||
1525 | TSI_WRITE(TSI108_EC_RXQ_BUFCFG, | |
1526 | TSI108_EC_RXQ_BUFCFG_BURST256 | | |
1527 | TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << | |
1528 | TSI108_EC_RXQ_BUFCFG_SFNPORT)); | |
1529 | ||
1530 | TSI_WRITE(TSI108_EC_INTMASK, ~0); | |
1531 | } | |
1532 | ||
1533 | static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
1534 | { | |
1535 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1536 | return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL); | |
1537 | } | |
1538 | ||
1539 | static int | |
1540 | tsi108_init_one(struct platform_device *pdev) | |
1541 | { | |
1542 | struct net_device *dev = NULL; | |
1543 | struct tsi108_prv_data *data = NULL; | |
1544 | hw_info *einfo; | |
1545 | int err = 0; | |
1546 | ||
1547 | einfo = pdev->dev.platform_data; | |
1548 | ||
1549 | if (NULL == einfo) { | |
1550 | printk(KERN_ERR "tsi-eth %d: Missing additional data!\n", | |
1551 | pdev->id); | |
1552 | return -ENODEV; | |
1553 | } | |
1554 | ||
1555 | /* Create an ethernet device instance */ | |
1556 | ||
1557 | dev = alloc_etherdev(sizeof(struct tsi108_prv_data)); | |
1558 | if (!dev) { | |
1559 | printk("tsi108_eth: Could not allocate a device structure\n"); | |
1560 | return -ENOMEM; | |
1561 | } | |
1562 | ||
1563 | printk("tsi108_eth%d: probe...\n", pdev->id); | |
1564 | data = netdev_priv(dev); | |
1565 | ||
1566 | pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n", | |
1567 | pdev->id, einfo->regs, einfo->phyregs, | |
1568 | einfo->phy, einfo->irq_num); | |
1569 | ||
1570 | data->regs = ioremap(einfo->regs, 0x400); | |
1571 | if (NULL == data->regs) { | |
1572 | err = -ENOMEM; | |
1573 | goto regs_fail; | |
1574 | } | |
1575 | ||
1576 | data->phyregs = ioremap(einfo->phyregs, 0x400); | |
1577 | if (NULL == data->phyregs) { | |
1578 | err = -ENOMEM; | |
1579 | goto regs_fail; | |
1580 | } | |
1581 | /* MII setup */ | |
1582 | data->mii_if.dev = dev; | |
1583 | data->mii_if.mdio_read = tsi108_mdio_read; | |
1584 | data->mii_if.mdio_write = tsi108_mdio_write; | |
1585 | data->mii_if.phy_id = einfo->phy; | |
1586 | data->mii_if.phy_id_mask = 0x1f; | |
1587 | data->mii_if.reg_num_mask = 0x1f; | |
1588 | data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if); | |
1589 | ||
1590 | data->phy = einfo->phy; | |
1591 | data->irq_num = einfo->irq_num; | |
1592 | data->id = pdev->id; | |
1593 | dev->open = tsi108_open; | |
1594 | dev->stop = tsi108_close; | |
1595 | dev->hard_start_xmit = tsi108_send_packet; | |
1596 | dev->set_mac_address = tsi108_set_mac; | |
1597 | dev->set_multicast_list = tsi108_set_rx_mode; | |
1598 | dev->get_stats = tsi108_get_stats; | |
1599 | dev->poll = tsi108_poll; | |
1600 | dev->do_ioctl = tsi108_do_ioctl; | |
1601 | dev->weight = 64; /* 64 is more suitable for GigE interface - klai */ | |
1602 | ||
1603 | /* Apparently, the Linux networking code won't use scatter-gather | |
1604 | * if the hardware doesn't do checksums. However, it's faster | |
1605 | * to checksum in place and use SG, as (among other reasons) | |
1606 | * the cache won't be dirtied (which then has to be flushed | |
1607 | * before DMA). The checksumming is done by the driver (via | |
1608 | * a new function skb_csum_dev() in net/core/skbuff.c). | |
1609 | */ | |
1610 | ||
1611 | dev->features = NETIF_F_HIGHDMA; | |
1612 | SET_MODULE_OWNER(dev); | |
1613 | ||
1614 | spin_lock_init(&data->txlock); | |
1615 | spin_lock_init(&data->misclock); | |
1616 | ||
1617 | tsi108_reset_ether(data); | |
1618 | tsi108_kill_phy(dev); | |
1619 | ||
1620 | if ((err = tsi108_get_mac(dev)) != 0) { | |
1621 | printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n", | |
1622 | dev->name); | |
1623 | goto register_fail; | |
1624 | } | |
1625 | ||
1626 | tsi108_init_mac(dev); | |
1627 | err = register_netdev(dev); | |
1628 | if (err) { | |
1629 | printk(KERN_ERR "%s: Cannot register net device, aborting.\n", | |
1630 | dev->name); | |
1631 | goto register_fail; | |
1632 | } | |
1633 | ||
1634 | printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: " | |
1635 | "%02x:%02x:%02x:%02x:%02x:%02x\n", dev->name, | |
1636 | dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], | |
1637 | dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); | |
1638 | #ifdef DEBUG | |
1639 | data->msg_enable = DEBUG; | |
1640 | dump_eth_one(dev); | |
1641 | #endif | |
1642 | ||
1643 | return 0; | |
1644 | ||
1645 | register_fail: | |
1646 | iounmap(data->regs); | |
1647 | iounmap(data->phyregs); | |
1648 | ||
1649 | regs_fail: | |
1650 | free_netdev(dev); | |
1651 | return err; | |
1652 | } | |
1653 | ||
1654 | /* There's no way to either get interrupts from the PHY when | |
1655 | * something changes, or to have the Tsi108 automatically communicate | |
1656 | * with the PHY to reconfigure itself. | |
1657 | * | |
1658 | * Thus, we have to do it using a timer. | |
1659 | */ | |
1660 | ||
1661 | static void tsi108_timed_checker(unsigned long dev_ptr) | |
1662 | { | |
1663 | struct net_device *dev = (struct net_device *)dev_ptr; | |
1664 | struct tsi108_prv_data *data = netdev_priv(dev); | |
1665 | ||
1666 | tsi108_check_phy(dev); | |
1667 | tsi108_check_rxring(dev); | |
1668 | mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL); | |
1669 | } | |
1670 | ||
1671 | static int tsi108_ether_init(void) | |
1672 | { | |
1673 | int ret; | |
1674 | ret = platform_driver_register (&tsi_eth_driver); | |
1675 | if (ret < 0){ | |
1676 | printk("tsi108_ether_init: error initializing ethernet " | |
1677 | "device\n"); | |
1678 | return ret; | |
1679 | } | |
1680 | return 0; | |
1681 | } | |
1682 | ||
1683 | static int tsi108_ether_remove(struct platform_device *pdev) | |
1684 | { | |
1685 | struct net_device *dev = platform_get_drvdata(pdev); | |
1686 | struct tsi108_prv_data *priv = netdev_priv(dev); | |
1687 | ||
1688 | unregister_netdev(dev); | |
1689 | tsi108_stop_ethernet(dev); | |
1690 | platform_set_drvdata(pdev, NULL); | |
1691 | iounmap(priv->regs); | |
1692 | iounmap(priv->phyregs); | |
1693 | free_netdev(dev); | |
1694 | ||
1695 | return 0; | |
1696 | } | |
1697 | static void tsi108_ether_exit(void) | |
1698 | { | |
1699 | platform_driver_unregister(&tsi_eth_driver); | |
1700 | } | |
1701 | ||
1702 | module_init(tsi108_ether_init); | |
1703 | module_exit(tsi108_ether_exit); | |
1704 | ||
1705 | MODULE_AUTHOR("Tundra Semiconductor Corporation"); | |
1706 | MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver"); | |
1707 | MODULE_LICENSE("GPL"); |