Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
f3b197ac | 2 | * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards |
1da177e4 LT |
3 | * |
4 | * This software is (C) by the respective authors, and licensed under the GPL | |
5 | * License. | |
6 | * | |
7 | * Written by Arjan van de Ven for Red Hat, Inc. | |
f3b197ac | 8 | * Based on work by Jeff Garzik, Doug Ledford and Donald Becker |
1da177e4 LT |
9 | * |
10 | * This software may be used and distributed according to the terms | |
11 | * of the GNU General Public License, incorporated herein by reference. | |
12 | * | |
13 | * | |
14 | * $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $ | |
15 | */ | |
16 | ||
44298ec0 JP |
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
18 | ||
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/kernel.h> | |
21 | #include <linux/string.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/netdevice.h> | |
28 | #include <linux/etherdevice.h> | |
29 | #include <linux/skbuff.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/init.h> | |
1da177e4 LT |
32 | #include <linux/bitops.h> |
33 | ||
34 | #include <asm/uaccess.h> | |
35 | #include <asm/io.h> | |
82729971 AV |
36 | #ifdef CONFIG_NET_POLL_CONTROLLER |
37 | #include <asm/irq.h> | |
38 | #endif | |
1da177e4 LT |
39 | |
40 | #ifdef DEBUG | |
41 | #define enter(x) printk("Enter: %s, %s line %i\n",x,__FILE__,__LINE__) | |
42 | #define leave(x) printk("Leave: %s, %s line %i\n",x,__FILE__,__LINE__) | |
43 | #else | |
44 | #define enter(x) do {} while (0) | |
45 | #define leave(x) do {} while (0) | |
46 | #endif | |
47 | ||
48 | ||
49 | MODULE_DESCRIPTION("Xircom Cardbus ethernet driver"); | |
50 | MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>"); | |
51 | MODULE_LICENSE("GPL"); | |
52 | ||
53 | ||
54 | ||
55 | /* IO registers on the card, offsets */ | |
56 | #define CSR0 0x00 | |
57 | #define CSR1 0x08 | |
58 | #define CSR2 0x10 | |
59 | #define CSR3 0x18 | |
60 | #define CSR4 0x20 | |
61 | #define CSR5 0x28 | |
62 | #define CSR6 0x30 | |
63 | #define CSR7 0x38 | |
64 | #define CSR8 0x40 | |
65 | #define CSR9 0x48 | |
66 | #define CSR10 0x50 | |
67 | #define CSR11 0x58 | |
68 | #define CSR12 0x60 | |
69 | #define CSR13 0x68 | |
70 | #define CSR14 0x70 | |
71 | #define CSR15 0x78 | |
72 | #define CSR16 0x80 | |
73 | ||
74 | /* PCI registers */ | |
75 | #define PCI_POWERMGMT 0x40 | |
76 | ||
77 | /* Offsets of the buffers within the descriptor pages, in bytes */ | |
78 | ||
79 | #define NUMDESCRIPTORS 4 | |
80 | ||
81 | static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144}; | |
82 | ||
83 | ||
84 | struct xircom_private { | |
85 | /* Send and receive buffers, kernel-addressable and dma addressable forms */ | |
86 | ||
6f35d5d5 AV |
87 | __le32 *rx_buffer; |
88 | __le32 *tx_buffer; | |
1da177e4 LT |
89 | |
90 | dma_addr_t rx_dma_handle; | |
91 | dma_addr_t tx_dma_handle; | |
92 | ||
93 | struct sk_buff *tx_skb[4]; | |
94 | ||
95 | unsigned long io_port; | |
96 | int open; | |
f3b197ac | 97 | |
1da177e4 LT |
98 | /* transmit_used is the rotating counter that indicates which transmit |
99 | descriptor has to be used next */ | |
100 | int transmit_used; | |
101 | ||
102 | /* Spinlock to serialize register operations. | |
103 | It must be helt while manipulating the following registers: | |
104 | CSR0, CSR6, CSR7, CSR9, CSR10, CSR15 | |
105 | */ | |
106 | spinlock_t lock; | |
107 | ||
1da177e4 LT |
108 | struct pci_dev *pdev; |
109 | struct net_device *dev; | |
1da177e4 LT |
110 | }; |
111 | ||
112 | ||
113 | /* Function prototypes */ | |
114 | static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id); | |
115 | static void xircom_remove(struct pci_dev *pdev); | |
7d12e780 | 116 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance); |
ad096463 SH |
117 | static netdev_tx_t xircom_start_xmit(struct sk_buff *skb, |
118 | struct net_device *dev); | |
1da177e4 LT |
119 | static int xircom_open(struct net_device *dev); |
120 | static int xircom_close(struct net_device *dev); | |
121 | static void xircom_up(struct xircom_private *card); | |
3be034b6 | 122 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1da177e4 LT |
123 | static void xircom_poll_controller(struct net_device *dev); |
124 | #endif | |
125 | ||
126 | static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset); | |
127 | static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset); | |
128 | static void read_mac_address(struct xircom_private *card); | |
129 | static void transceiver_voodoo(struct xircom_private *card); | |
130 | static void initialize_card(struct xircom_private *card); | |
131 | static void trigger_transmit(struct xircom_private *card); | |
132 | static void trigger_receive(struct xircom_private *card); | |
133 | static void setup_descriptors(struct xircom_private *card); | |
134 | static void remove_descriptors(struct xircom_private *card); | |
135 | static int link_status_changed(struct xircom_private *card); | |
136 | static void activate_receiver(struct xircom_private *card); | |
137 | static void deactivate_receiver(struct xircom_private *card); | |
138 | static void activate_transmitter(struct xircom_private *card); | |
139 | static void deactivate_transmitter(struct xircom_private *card); | |
140 | static void enable_transmit_interrupt(struct xircom_private *card); | |
141 | static void enable_receive_interrupt(struct xircom_private *card); | |
142 | static void enable_link_interrupt(struct xircom_private *card); | |
143 | static void disable_all_interrupts(struct xircom_private *card); | |
144 | static int link_status(struct xircom_private *card); | |
145 | ||
146 | ||
147 | ||
a3aa1884 | 148 | static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = { |
1da177e4 LT |
149 | {0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID,}, |
150 | {0,}, | |
151 | }; | |
152 | MODULE_DEVICE_TABLE(pci, xircom_pci_table); | |
153 | ||
154 | static struct pci_driver xircom_ops = { | |
f3b197ac JG |
155 | .name = "xircom_cb", |
156 | .id_table = xircom_pci_table, | |
157 | .probe = xircom_probe, | |
158 | .remove = xircom_remove, | |
1da177e4 LT |
159 | .suspend =NULL, |
160 | .resume =NULL | |
161 | }; | |
162 | ||
163 | ||
164 | #ifdef DEBUG | |
165 | static void print_binary(unsigned int number) | |
166 | { | |
167 | int i,i2; | |
168 | char buffer[64]; | |
169 | memset(buffer,0,64); | |
170 | i2=0; | |
171 | for (i=31;i>=0;i--) { | |
172 | if (number & (1<<i)) | |
173 | buffer[i2++]='1'; | |
174 | else | |
175 | buffer[i2++]='0'; | |
f3b197ac | 176 | if ((i&3)==0) |
1da177e4 LT |
177 | buffer[i2++]=' '; |
178 | } | |
179 | printk("%s\n",buffer); | |
180 | } | |
181 | #endif | |
182 | ||
1034c9f6 SH |
183 | static const struct net_device_ops netdev_ops = { |
184 | .ndo_open = xircom_open, | |
185 | .ndo_stop = xircom_close, | |
186 | .ndo_start_xmit = xircom_start_xmit, | |
187 | .ndo_change_mtu = eth_change_mtu, | |
188 | .ndo_set_mac_address = eth_mac_addr, | |
189 | .ndo_validate_addr = eth_validate_addr, | |
190 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
191 | .ndo_poll_controller = xircom_poll_controller, | |
192 | #endif | |
193 | }; | |
194 | ||
1da177e4 LT |
195 | /* xircom_probe is the code that gets called on device insertion. |
196 | it sets up the hardware and registers the device to the networklayer. | |
f3b197ac | 197 | |
1da177e4 LT |
198 | TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the |
199 | first two packets that get send, and pump hates that. | |
f3b197ac | 200 | |
1da177e4 LT |
201 | */ |
202 | static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |
203 | { | |
204 | struct net_device *dev = NULL; | |
205 | struct xircom_private *private; | |
1da177e4 LT |
206 | unsigned long flags; |
207 | unsigned short tmp16; | |
208 | enter("xircom_probe"); | |
f3b197ac | 209 | |
1da177e4 LT |
210 | /* First do the PCI initialisation */ |
211 | ||
212 | if (pci_enable_device(pdev)) | |
213 | return -ENODEV; | |
214 | ||
215 | /* disable all powermanagement */ | |
216 | pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000); | |
f3b197ac | 217 | |
1da177e4 LT |
218 | pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/ |
219 | ||
f3b197ac JG |
220 | /* clear PCI status, if any */ |
221 | pci_read_config_word (pdev,PCI_STATUS, &tmp16); | |
1da177e4 | 222 | pci_write_config_word (pdev, PCI_STATUS,tmp16); |
f3b197ac | 223 | |
1da177e4 | 224 | if (!request_region(pci_resource_start(pdev, 0), 128, "xircom_cb")) { |
44298ec0 | 225 | pr_err("%s: failed to allocate io-region\n", __func__); |
1da177e4 LT |
226 | return -ENODEV; |
227 | } | |
228 | ||
f3b197ac | 229 | /* |
1da177e4 LT |
230 | Before changing the hardware, allocate the memory. |
231 | This way, we can fail gracefully if not enough memory | |
f3b197ac | 232 | is available. |
1da177e4 LT |
233 | */ |
234 | dev = alloc_etherdev(sizeof(struct xircom_private)); | |
235 | if (!dev) { | |
44298ec0 | 236 | pr_err("%s: failed to allocate etherdev\n", __func__); |
1da177e4 LT |
237 | goto device_fail; |
238 | } | |
239 | private = netdev_priv(dev); | |
f3b197ac | 240 | |
1da177e4 LT |
241 | /* Allocate the send/receive buffers */ |
242 | private->rx_buffer = pci_alloc_consistent(pdev,8192,&private->rx_dma_handle); | |
243 | if (private->rx_buffer == NULL) { | |
44298ec0 | 244 | pr_err("%s: no memory for rx buffer\n", __func__); |
1da177e4 | 245 | goto rx_buf_fail; |
f3b197ac | 246 | } |
1da177e4 LT |
247 | private->tx_buffer = pci_alloc_consistent(pdev,8192,&private->tx_dma_handle); |
248 | if (private->tx_buffer == NULL) { | |
44298ec0 | 249 | pr_err("%s: no memory for tx buffer\n", __func__); |
1da177e4 LT |
250 | goto tx_buf_fail; |
251 | } | |
252 | ||
1da177e4 LT |
253 | SET_NETDEV_DEV(dev, &pdev->dev); |
254 | ||
255 | ||
256 | private->dev = dev; | |
257 | private->pdev = pdev; | |
258 | private->io_port = pci_resource_start(pdev, 0); | |
259 | spin_lock_init(&private->lock); | |
260 | dev->irq = pdev->irq; | |
261 | dev->base_addr = private->io_port; | |
f3b197ac | 262 | |
1da177e4 LT |
263 | initialize_card(private); |
264 | read_mac_address(private); | |
265 | setup_descriptors(private); | |
f3b197ac | 266 | |
1034c9f6 | 267 | dev->netdev_ops = &netdev_ops; |
1da177e4 LT |
268 | pci_set_drvdata(pdev, dev); |
269 | ||
270 | if (register_netdev(dev)) { | |
44298ec0 | 271 | pr_err("%s: netdevice registration failed\n", __func__); |
1da177e4 LT |
272 | goto reg_fail; |
273 | } | |
f3b197ac | 274 | |
44298ec0 JP |
275 | dev_info(&dev->dev, "Xircom cardbus revision %i at irq %i\n", |
276 | pdev->revision, pdev->irq); | |
1da177e4 LT |
277 | /* start the transmitter to get a heartbeat */ |
278 | /* TODO: send 2 dummy packets here */ | |
279 | transceiver_voodoo(private); | |
f3b197ac | 280 | |
1da177e4 LT |
281 | spin_lock_irqsave(&private->lock,flags); |
282 | activate_transmitter(private); | |
283 | activate_receiver(private); | |
284 | spin_unlock_irqrestore(&private->lock,flags); | |
f3b197ac | 285 | |
1da177e4 | 286 | trigger_receive(private); |
f3b197ac | 287 | |
1da177e4 LT |
288 | leave("xircom_probe"); |
289 | return 0; | |
290 | ||
291 | reg_fail: | |
292 | kfree(private->tx_buffer); | |
293 | tx_buf_fail: | |
294 | kfree(private->rx_buffer); | |
295 | rx_buf_fail: | |
296 | free_netdev(dev); | |
297 | device_fail: | |
298 | return -ENODEV; | |
299 | } | |
300 | ||
301 | ||
302 | /* | |
303 | xircom_remove is called on module-unload or on device-eject. | |
304 | it unregisters the irq, io-region and network device. | |
305 | Interrupts and such are already stopped in the "ifconfig ethX down" | |
306 | code. | |
307 | */ | |
308 | static void __devexit xircom_remove(struct pci_dev *pdev) | |
309 | { | |
310 | struct net_device *dev = pci_get_drvdata(pdev); | |
311 | struct xircom_private *card = netdev_priv(dev); | |
312 | ||
313 | enter("xircom_remove"); | |
314 | pci_free_consistent(pdev,8192,card->rx_buffer,card->rx_dma_handle); | |
315 | pci_free_consistent(pdev,8192,card->tx_buffer,card->tx_dma_handle); | |
316 | ||
317 | release_region(dev->base_addr, 128); | |
318 | unregister_netdev(dev); | |
319 | free_netdev(dev); | |
320 | pci_set_drvdata(pdev, NULL); | |
321 | leave("xircom_remove"); | |
f3b197ac | 322 | } |
1da177e4 | 323 | |
7d12e780 | 324 | static irqreturn_t xircom_interrupt(int irq, void *dev_instance) |
1da177e4 LT |
325 | { |
326 | struct net_device *dev = (struct net_device *) dev_instance; | |
327 | struct xircom_private *card = netdev_priv(dev); | |
328 | unsigned int status; | |
329 | int i; | |
330 | ||
331 | enter("xircom_interrupt\n"); | |
332 | ||
333 | spin_lock(&card->lock); | |
334 | status = inl(card->io_port+CSR5); | |
335 | ||
f3b197ac | 336 | #ifdef DEBUG |
1da177e4 | 337 | print_binary(status); |
c2bb1b9c | 338 | printk("tx status 0x%08x 0x%08x\n", |
44298ec0 | 339 | card->tx_buffer[0], card->tx_buffer[4]); |
c2bb1b9c | 340 | printk("rx status 0x%08x 0x%08x\n", |
44298ec0 | 341 | card->rx_buffer[0], card->rx_buffer[4]); |
f3b197ac | 342 | #endif |
1da177e4 LT |
343 | /* Handle shared irq and hotplug */ |
344 | if (status == 0 || status == 0xffffffff) { | |
345 | spin_unlock(&card->lock); | |
346 | return IRQ_NONE; | |
347 | } | |
348 | ||
349 | if (link_status_changed(card)) { | |
350 | int newlink; | |
44298ec0 | 351 | printk(KERN_DEBUG "xircom_cb: Link status has changed\n"); |
1da177e4 | 352 | newlink = link_status(card); |
44298ec0 | 353 | dev_info(&dev->dev, "Link is %i mbit\n", newlink); |
1da177e4 LT |
354 | if (newlink) |
355 | netif_carrier_on(dev); | |
356 | else | |
357 | netif_carrier_off(dev); | |
f3b197ac | 358 | |
1da177e4 LT |
359 | } |
360 | ||
f3b197ac | 361 | /* Clear all remaining interrupts */ |
1da177e4 LT |
362 | status |= 0xffffffff; /* FIXME: make this clear only the |
363 | real existing bits */ | |
364 | outl(status,card->io_port+CSR5); | |
1da177e4 | 365 | |
f3b197ac JG |
366 | |
367 | for (i=0;i<NUMDESCRIPTORS;i++) | |
1da177e4 | 368 | investigate_write_descriptor(dev,card,i,bufferoffsets[i]); |
f3b197ac | 369 | for (i=0;i<NUMDESCRIPTORS;i++) |
1da177e4 LT |
370 | investigate_read_descriptor(dev,card,i,bufferoffsets[i]); |
371 | ||
f3b197ac | 372 | |
1da177e4 LT |
373 | spin_unlock(&card->lock); |
374 | leave("xircom_interrupt"); | |
375 | return IRQ_HANDLED; | |
376 | } | |
377 | ||
ad096463 SH |
378 | static netdev_tx_t xircom_start_xmit(struct sk_buff *skb, |
379 | struct net_device *dev) | |
1da177e4 LT |
380 | { |
381 | struct xircom_private *card; | |
382 | unsigned long flags; | |
383 | int nextdescriptor; | |
384 | int desc; | |
385 | enter("xircom_start_xmit"); | |
f3b197ac | 386 | |
1da177e4 LT |
387 | card = netdev_priv(dev); |
388 | spin_lock_irqsave(&card->lock,flags); | |
f3b197ac | 389 | |
1da177e4 | 390 | /* First see if we can free some descriptors */ |
f3b197ac | 391 | for (desc=0;desc<NUMDESCRIPTORS;desc++) |
1da177e4 | 392 | investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]); |
f3b197ac JG |
393 | |
394 | ||
1da177e4 LT |
395 | nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS); |
396 | desc = card->transmit_used; | |
f3b197ac | 397 | |
1da177e4 LT |
398 | /* only send the packet if the descriptor is free */ |
399 | if (card->tx_buffer[4*desc]==0) { | |
400 | /* Copy the packet data; zero the memory first as the card | |
401 | sometimes sends more than you ask it to. */ | |
f3b197ac | 402 | |
1da177e4 | 403 | memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536); |
d626f62b ACM |
404 | skb_copy_from_linear_data(skb, |
405 | &(card->tx_buffer[bufferoffsets[desc] / 4]), | |
406 | skb->len); | |
1da177e4 LT |
407 | /* FIXME: The specification tells us that the length we send HAS to be a multiple of |
408 | 4 bytes. */ | |
f3b197ac | 409 | |
6f35d5d5 AV |
410 | card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len); |
411 | if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */ | |
412 | card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25); | |
1da177e4 | 413 | |
6f35d5d5 | 414 | card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000); |
f3b197ac | 415 | /* 0xF0... means want interrupts*/ |
1da177e4 | 416 | card->tx_skb[desc] = skb; |
f3b197ac | 417 | |
1da177e4 LT |
418 | wmb(); |
419 | /* This gives the descriptor to the card */ | |
6f35d5d5 | 420 | card->tx_buffer[4*desc] = cpu_to_le32(0x80000000); |
1da177e4 | 421 | trigger_transmit(card); |
6f35d5d5 AV |
422 | if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) { |
423 | /* next descriptor is occupied... */ | |
1da177e4 LT |
424 | netif_stop_queue(dev); |
425 | } | |
426 | card->transmit_used = nextdescriptor; | |
f3b197ac | 427 | leave("xircom-start_xmit - sent"); |
1da177e4 | 428 | spin_unlock_irqrestore(&card->lock,flags); |
6ed10654 | 429 | return NETDEV_TX_OK; |
1da177e4 | 430 | } |
f3b197ac | 431 | |
1da177e4 LT |
432 | |
433 | ||
434 | /* Uh oh... no free descriptor... drop the packet */ | |
435 | netif_stop_queue(dev); | |
436 | spin_unlock_irqrestore(&card->lock,flags); | |
437 | trigger_transmit(card); | |
f3b197ac | 438 | |
06f7525b | 439 | return NETDEV_TX_BUSY; |
1da177e4 LT |
440 | } |
441 | ||
442 | ||
443 | ||
444 | ||
445 | static int xircom_open(struct net_device *dev) | |
446 | { | |
447 | struct xircom_private *xp = netdev_priv(dev); | |
448 | int retval; | |
449 | enter("xircom_open"); | |
c2bb1b9c | 450 | pr_info("xircom cardbus adaptor found, registering as %s, using irq %i\n", |
44298ec0 | 451 | dev->name, dev->irq); |
a0607fd3 | 452 | retval = request_irq(dev->irq, xircom_interrupt, IRQF_SHARED, dev->name, dev); |
1da177e4 LT |
453 | if (retval) { |
454 | leave("xircom_open - No IRQ"); | |
455 | return retval; | |
456 | } | |
f3b197ac | 457 | |
1da177e4 LT |
458 | xircom_up(xp); |
459 | xp->open = 1; | |
460 | leave("xircom_open"); | |
461 | return 0; | |
462 | } | |
463 | ||
464 | static int xircom_close(struct net_device *dev) | |
465 | { | |
466 | struct xircom_private *card; | |
467 | unsigned long flags; | |
f3b197ac | 468 | |
1da177e4 LT |
469 | enter("xircom_close"); |
470 | card = netdev_priv(dev); | |
471 | netif_stop_queue(dev); /* we don't want new packets */ | |
472 | ||
f3b197ac | 473 | |
1da177e4 | 474 | spin_lock_irqsave(&card->lock,flags); |
f3b197ac | 475 | |
1da177e4 | 476 | disable_all_interrupts(card); |
f3b197ac | 477 | #if 0 |
1da177e4 LT |
478 | /* We can enable this again once we send dummy packets on ifconfig ethX up */ |
479 | deactivate_receiver(card); | |
480 | deactivate_transmitter(card); | |
f3b197ac | 481 | #endif |
1da177e4 | 482 | remove_descriptors(card); |
f3b197ac | 483 | |
1da177e4 | 484 | spin_unlock_irqrestore(&card->lock,flags); |
f3b197ac | 485 | |
1da177e4 LT |
486 | card->open = 0; |
487 | free_irq(dev->irq,dev); | |
f3b197ac | 488 | |
1da177e4 | 489 | leave("xircom_close"); |
f3b197ac | 490 | |
1da177e4 | 491 | return 0; |
f3b197ac | 492 | |
1da177e4 LT |
493 | } |
494 | ||
495 | ||
1da177e4 LT |
496 | #ifdef CONFIG_NET_POLL_CONTROLLER |
497 | static void xircom_poll_controller(struct net_device *dev) | |
498 | { | |
499 | disable_irq(dev->irq); | |
7d12e780 | 500 | xircom_interrupt(dev->irq, dev); |
1da177e4 LT |
501 | enable_irq(dev->irq); |
502 | } | |
503 | #endif | |
504 | ||
505 | ||
506 | static void initialize_card(struct xircom_private *card) | |
507 | { | |
508 | unsigned int val; | |
509 | unsigned long flags; | |
510 | enter("initialize_card"); | |
511 | ||
512 | ||
513 | spin_lock_irqsave(&card->lock, flags); | |
514 | ||
515 | /* First: reset the card */ | |
516 | val = inl(card->io_port + CSR0); | |
517 | val |= 0x01; /* Software reset */ | |
518 | outl(val, card->io_port + CSR0); | |
519 | ||
520 | udelay(100); /* give the card some time to reset */ | |
521 | ||
522 | val = inl(card->io_port + CSR0); | |
523 | val &= ~0x01; /* disable Software reset */ | |
524 | outl(val, card->io_port + CSR0); | |
525 | ||
526 | ||
f3b197ac | 527 | val = 0; /* Value 0x00 is a safe and conservative value |
1da177e4 LT |
528 | for the PCI configuration settings */ |
529 | outl(val, card->io_port + CSR0); | |
530 | ||
531 | ||
532 | disable_all_interrupts(card); | |
533 | deactivate_receiver(card); | |
534 | deactivate_transmitter(card); | |
535 | ||
536 | spin_unlock_irqrestore(&card->lock, flags); | |
537 | ||
538 | leave("initialize_card"); | |
539 | } | |
540 | ||
541 | /* | |
542 | trigger_transmit causes the card to check for frames to be transmitted. | |
543 | This is accomplished by writing to the CSR1 port. The documentation | |
544 | claims that the act of writing is sufficient and that the value is | |
545 | ignored; I chose zero. | |
546 | */ | |
547 | static void trigger_transmit(struct xircom_private *card) | |
548 | { | |
549 | unsigned int val; | |
550 | enter("trigger_transmit"); | |
551 | ||
552 | val = 0; | |
553 | outl(val, card->io_port + CSR1); | |
554 | ||
555 | leave("trigger_transmit"); | |
556 | } | |
557 | ||
558 | /* | |
559 | trigger_receive causes the card to check for empty frames in the | |
560 | descriptor list in which packets can be received. | |
561 | This is accomplished by writing to the CSR2 port. The documentation | |
562 | claims that the act of writing is sufficient and that the value is | |
563 | ignored; I chose zero. | |
564 | */ | |
565 | static void trigger_receive(struct xircom_private *card) | |
566 | { | |
567 | unsigned int val; | |
568 | enter("trigger_receive"); | |
569 | ||
570 | val = 0; | |
571 | outl(val, card->io_port + CSR2); | |
572 | ||
573 | leave("trigger_receive"); | |
574 | } | |
575 | ||
576 | /* | |
577 | setup_descriptors initializes the send and receive buffers to be valid | |
578 | descriptors and programs the addresses into the card. | |
579 | */ | |
580 | static void setup_descriptors(struct xircom_private *card) | |
581 | { | |
6f35d5d5 | 582 | u32 address; |
1da177e4 LT |
583 | int i; |
584 | enter("setup_descriptors"); | |
585 | ||
586 | ||
a707cd6e ES |
587 | BUG_ON(card->rx_buffer == NULL); |
588 | BUG_ON(card->tx_buffer == NULL); | |
1da177e4 LT |
589 | |
590 | /* Receive descriptors */ | |
591 | memset(card->rx_buffer, 0, 128); /* clear the descriptors */ | |
592 | for (i=0;i<NUMDESCRIPTORS;i++ ) { | |
593 | ||
594 | /* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */ | |
6f35d5d5 | 595 | card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000); |
1da177e4 | 596 | /* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ |
6f35d5d5 AV |
597 | card->rx_buffer[i*4 + 1] = cpu_to_le32(1536); |
598 | if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ | |
599 | card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); | |
1da177e4 LT |
600 | |
601 | /* Rx Descr2: address of the buffer | |
602 | we store the buffer at the 2nd half of the page */ | |
f3b197ac | 603 | |
6f35d5d5 | 604 | address = card->rx_dma_handle; |
1da177e4 LT |
605 | card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
606 | /* Rx Desc3: address of 2nd buffer -> 0 */ | |
607 | card->rx_buffer[i*4 + 3] = 0; | |
608 | } | |
f3b197ac | 609 | |
1da177e4 LT |
610 | wmb(); |
611 | /* Write the receive descriptor ring address to the card */ | |
6f35d5d5 AV |
612 | address = card->rx_dma_handle; |
613 | outl(address, card->io_port + CSR3); /* Receive descr list address */ | |
1da177e4 LT |
614 | |
615 | ||
616 | /* transmit descriptors */ | |
617 | memset(card->tx_buffer, 0, 128); /* clear the descriptors */ | |
f3b197ac | 618 | |
1da177e4 LT |
619 | for (i=0;i<NUMDESCRIPTORS;i++ ) { |
620 | /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */ | |
621 | card->tx_buffer[i*4 + 0] = 0x00000000; | |
622 | /* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */ | |
6f35d5d5 AV |
623 | card->tx_buffer[i*4 + 1] = cpu_to_le32(1536); |
624 | if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */ | |
625 | card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25); | |
f3b197ac | 626 | |
1da177e4 LT |
627 | /* Tx Descr2: address of the buffer |
628 | we store the buffer at the 2nd half of the page */ | |
6f35d5d5 | 629 | address = card->tx_dma_handle; |
1da177e4 LT |
630 | card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]); |
631 | /* Tx Desc3: address of 2nd buffer -> 0 */ | |
632 | card->tx_buffer[i*4 + 3] = 0; | |
633 | } | |
634 | ||
635 | wmb(); | |
636 | /* wite the transmit descriptor ring to the card */ | |
6f35d5d5 AV |
637 | address = card->tx_dma_handle; |
638 | outl(address, card->io_port + CSR4); /* xmit descr list address */ | |
1da177e4 LT |
639 | |
640 | leave("setup_descriptors"); | |
641 | } | |
642 | ||
643 | /* | |
644 | remove_descriptors informs the card the descriptors are no longer | |
645 | valid by setting the address in the card to 0x00. | |
646 | */ | |
647 | static void remove_descriptors(struct xircom_private *card) | |
648 | { | |
649 | unsigned int val; | |
650 | enter("remove_descriptors"); | |
651 | ||
652 | val = 0; | |
653 | outl(val, card->io_port + CSR3); /* Receive descriptor address */ | |
654 | outl(val, card->io_port + CSR4); /* Send descriptor address */ | |
655 | ||
656 | leave("remove_descriptors"); | |
657 | } | |
658 | ||
659 | /* | |
660 | link_status_changed returns 1 if the card has indicated that | |
661 | the link status has changed. The new link status has to be read from CSR12. | |
662 | ||
663 | This function also clears the status-bit. | |
664 | */ | |
665 | static int link_status_changed(struct xircom_private *card) | |
666 | { | |
667 | unsigned int val; | |
668 | enter("link_status_changed"); | |
669 | ||
670 | val = inl(card->io_port + CSR5); /* Status register */ | |
671 | ||
672 | if ((val & (1 << 27)) == 0) { /* no change */ | |
673 | leave("link_status_changed - nochange"); | |
674 | return 0; | |
675 | } | |
676 | ||
677 | /* clear the event by writing a 1 to the bit in the | |
678 | status register. */ | |
679 | val = (1 << 27); | |
680 | outl(val, card->io_port + CSR5); | |
681 | ||
682 | leave("link_status_changed - changed"); | |
683 | return 1; | |
684 | } | |
685 | ||
686 | ||
687 | /* | |
688 | transmit_active returns 1 if the transmitter on the card is | |
689 | in a non-stopped state. | |
690 | */ | |
691 | static int transmit_active(struct xircom_private *card) | |
692 | { | |
693 | unsigned int val; | |
694 | enter("transmit_active"); | |
695 | ||
696 | val = inl(card->io_port + CSR5); /* Status register */ | |
697 | ||
698 | if ((val & (7 << 20)) == 0) { /* transmitter disabled */ | |
699 | leave("transmit_active - inactive"); | |
700 | return 0; | |
701 | } | |
702 | ||
703 | leave("transmit_active - active"); | |
704 | return 1; | |
705 | } | |
706 | ||
707 | /* | |
708 | receive_active returns 1 if the receiver on the card is | |
709 | in a non-stopped state. | |
710 | */ | |
711 | static int receive_active(struct xircom_private *card) | |
712 | { | |
713 | unsigned int val; | |
714 | enter("receive_active"); | |
715 | ||
716 | ||
717 | val = inl(card->io_port + CSR5); /* Status register */ | |
718 | ||
719 | if ((val & (7 << 17)) == 0) { /* receiver disabled */ | |
720 | leave("receive_active - inactive"); | |
721 | return 0; | |
722 | } | |
723 | ||
724 | leave("receive_active - active"); | |
725 | return 1; | |
726 | } | |
727 | ||
728 | /* | |
729 | activate_receiver enables the receiver on the card. | |
730 | Before being allowed to active the receiver, the receiver | |
731 | must be completely de-activated. To achieve this, | |
f3b197ac | 732 | this code actually disables the receiver first; then it waits for the |
1da177e4 LT |
733 | receiver to become inactive, then it activates the receiver and then |
734 | it waits for the receiver to be active. | |
735 | ||
736 | must be called with the lock held and interrupts disabled. | |
737 | */ | |
738 | static void activate_receiver(struct xircom_private *card) | |
739 | { | |
740 | unsigned int val; | |
741 | int counter; | |
742 | enter("activate_receiver"); | |
743 | ||
744 | ||
745 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
f3b197ac | 746 | |
1da177e4 LT |
747 | /* If the "active" bit is set and the receiver is already |
748 | active, no need to do the expensive thing */ | |
749 | if ((val&2) && (receive_active(card))) | |
750 | return; | |
f3b197ac JG |
751 | |
752 | ||
1da177e4 LT |
753 | val = val & ~2; /* disable the receiver */ |
754 | outl(val, card->io_port + CSR6); | |
755 | ||
756 | counter = 10; | |
757 | while (counter > 0) { | |
758 | if (!receive_active(card)) | |
759 | break; | |
760 | /* wait a while */ | |
761 | udelay(50); | |
762 | counter--; | |
763 | if (counter <= 0) | |
44298ec0 | 764 | pr_err("Receiver failed to deactivate\n"); |
1da177e4 LT |
765 | } |
766 | ||
767 | /* enable the receiver */ | |
768 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
769 | val = val | 2; /* enable the receiver */ | |
770 | outl(val, card->io_port + CSR6); | |
771 | ||
772 | /* now wait for the card to activate again */ | |
773 | counter = 10; | |
774 | while (counter > 0) { | |
775 | if (receive_active(card)) | |
776 | break; | |
777 | /* wait a while */ | |
778 | udelay(50); | |
779 | counter--; | |
780 | if (counter <= 0) | |
44298ec0 | 781 | pr_err("Receiver failed to re-activate\n"); |
1da177e4 LT |
782 | } |
783 | ||
784 | leave("activate_receiver"); | |
785 | } | |
786 | ||
787 | /* | |
788 | deactivate_receiver disables the receiver on the card. | |
f3b197ac | 789 | To achieve this this code disables the receiver first; |
1da177e4 LT |
790 | then it waits for the receiver to become inactive. |
791 | ||
792 | must be called with the lock held and interrupts disabled. | |
793 | */ | |
794 | static void deactivate_receiver(struct xircom_private *card) | |
795 | { | |
796 | unsigned int val; | |
797 | int counter; | |
798 | enter("deactivate_receiver"); | |
799 | ||
800 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
801 | val = val & ~2; /* disable the receiver */ | |
802 | outl(val, card->io_port + CSR6); | |
803 | ||
804 | counter = 10; | |
805 | while (counter > 0) { | |
806 | if (!receive_active(card)) | |
807 | break; | |
808 | /* wait a while */ | |
809 | udelay(50); | |
810 | counter--; | |
811 | if (counter <= 0) | |
44298ec0 | 812 | pr_err("Receiver failed to deactivate\n"); |
1da177e4 LT |
813 | } |
814 | ||
815 | ||
816 | leave("deactivate_receiver"); | |
817 | } | |
818 | ||
819 | ||
820 | /* | |
821 | activate_transmitter enables the transmitter on the card. | |
822 | Before being allowed to active the transmitter, the transmitter | |
823 | must be completely de-activated. To achieve this, | |
f3b197ac | 824 | this code actually disables the transmitter first; then it waits for the |
1da177e4 LT |
825 | transmitter to become inactive, then it activates the transmitter and then |
826 | it waits for the transmitter to be active again. | |
827 | ||
828 | must be called with the lock held and interrupts disabled. | |
829 | */ | |
830 | static void activate_transmitter(struct xircom_private *card) | |
831 | { | |
832 | unsigned int val; | |
833 | int counter; | |
834 | enter("activate_transmitter"); | |
835 | ||
836 | ||
837 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
838 | ||
839 | /* If the "active" bit is set and the receiver is already | |
f3b197ac | 840 | active, no need to do the expensive thing */ |
1da177e4 LT |
841 | if ((val&(1<<13)) && (transmit_active(card))) |
842 | return; | |
843 | ||
844 | val = val & ~(1 << 13); /* disable the transmitter */ | |
845 | outl(val, card->io_port + CSR6); | |
846 | ||
847 | counter = 10; | |
848 | while (counter > 0) { | |
849 | if (!transmit_active(card)) | |
850 | break; | |
851 | /* wait a while */ | |
852 | udelay(50); | |
853 | counter--; | |
854 | if (counter <= 0) | |
44298ec0 | 855 | pr_err("Transmitter failed to deactivate\n"); |
1da177e4 LT |
856 | } |
857 | ||
858 | /* enable the transmitter */ | |
859 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
860 | val = val | (1 << 13); /* enable the transmitter */ | |
861 | outl(val, card->io_port + CSR6); | |
862 | ||
863 | /* now wait for the card to activate again */ | |
864 | counter = 10; | |
865 | while (counter > 0) { | |
866 | if (transmit_active(card)) | |
867 | break; | |
868 | /* wait a while */ | |
869 | udelay(50); | |
870 | counter--; | |
871 | if (counter <= 0) | |
44298ec0 | 872 | pr_err("Transmitter failed to re-activate\n"); |
1da177e4 LT |
873 | } |
874 | ||
875 | leave("activate_transmitter"); | |
876 | } | |
877 | ||
878 | /* | |
879 | deactivate_transmitter disables the transmitter on the card. | |
f3b197ac | 880 | To achieve this this code disables the transmitter first; |
1da177e4 LT |
881 | then it waits for the transmitter to become inactive. |
882 | ||
883 | must be called with the lock held and interrupts disabled. | |
884 | */ | |
885 | static void deactivate_transmitter(struct xircom_private *card) | |
886 | { | |
887 | unsigned int val; | |
888 | int counter; | |
889 | enter("deactivate_transmitter"); | |
890 | ||
891 | val = inl(card->io_port + CSR6); /* Operation mode */ | |
892 | val = val & ~2; /* disable the transmitter */ | |
893 | outl(val, card->io_port + CSR6); | |
894 | ||
895 | counter = 20; | |
896 | while (counter > 0) { | |
897 | if (!transmit_active(card)) | |
898 | break; | |
899 | /* wait a while */ | |
900 | udelay(50); | |
901 | counter--; | |
902 | if (counter <= 0) | |
44298ec0 | 903 | pr_err("Transmitter failed to deactivate\n"); |
1da177e4 LT |
904 | } |
905 | ||
906 | ||
907 | leave("deactivate_transmitter"); | |
908 | } | |
909 | ||
910 | ||
911 | /* | |
912 | enable_transmit_interrupt enables the transmit interrupt | |
913 | ||
914 | must be called with the lock held and interrupts disabled. | |
915 | */ | |
916 | static void enable_transmit_interrupt(struct xircom_private *card) | |
917 | { | |
918 | unsigned int val; | |
919 | enter("enable_transmit_interrupt"); | |
920 | ||
921 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
922 | val |= 1; /* enable the transmit interrupt */ | |
923 | outl(val, card->io_port + CSR7); | |
924 | ||
925 | leave("enable_transmit_interrupt"); | |
926 | } | |
927 | ||
928 | ||
929 | /* | |
930 | enable_receive_interrupt enables the receive interrupt | |
931 | ||
932 | must be called with the lock held and interrupts disabled. | |
933 | */ | |
934 | static void enable_receive_interrupt(struct xircom_private *card) | |
935 | { | |
936 | unsigned int val; | |
937 | enter("enable_receive_interrupt"); | |
938 | ||
939 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
940 | val = val | (1 << 6); /* enable the receive interrupt */ | |
941 | outl(val, card->io_port + CSR7); | |
942 | ||
943 | leave("enable_receive_interrupt"); | |
944 | } | |
945 | ||
946 | /* | |
947 | enable_link_interrupt enables the link status change interrupt | |
948 | ||
949 | must be called with the lock held and interrupts disabled. | |
950 | */ | |
951 | static void enable_link_interrupt(struct xircom_private *card) | |
952 | { | |
953 | unsigned int val; | |
954 | enter("enable_link_interrupt"); | |
955 | ||
956 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
957 | val = val | (1 << 27); /* enable the link status chage interrupt */ | |
958 | outl(val, card->io_port + CSR7); | |
959 | ||
960 | leave("enable_link_interrupt"); | |
961 | } | |
962 | ||
963 | ||
964 | ||
965 | /* | |
966 | disable_all_interrupts disables all interrupts | |
967 | ||
968 | must be called with the lock held and interrupts disabled. | |
969 | */ | |
970 | static void disable_all_interrupts(struct xircom_private *card) | |
971 | { | |
972 | unsigned int val; | |
973 | enter("enable_all_interrupts"); | |
f3b197ac | 974 | |
1da177e4 LT |
975 | val = 0; /* disable all interrupts */ |
976 | outl(val, card->io_port + CSR7); | |
977 | ||
978 | leave("disable_all_interrupts"); | |
979 | } | |
980 | ||
981 | /* | |
982 | enable_common_interrupts enables several weird interrupts | |
983 | ||
984 | must be called with the lock held and interrupts disabled. | |
985 | */ | |
986 | static void enable_common_interrupts(struct xircom_private *card) | |
987 | { | |
988 | unsigned int val; | |
989 | enter("enable_link_interrupt"); | |
990 | ||
991 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | |
992 | val |= (1<<16); /* Normal Interrupt Summary */ | |
993 | val |= (1<<15); /* Abnormal Interrupt Summary */ | |
994 | val |= (1<<13); /* Fatal bus error */ | |
995 | val |= (1<<8); /* Receive Process Stopped */ | |
996 | val |= (1<<7); /* Receive Buffer Unavailable */ | |
997 | val |= (1<<5); /* Transmit Underflow */ | |
998 | val |= (1<<2); /* Transmit Buffer Unavailable */ | |
999 | val |= (1<<1); /* Transmit Process Stopped */ | |
1000 | outl(val, card->io_port + CSR7); | |
1001 | ||
1002 | leave("enable_link_interrupt"); | |
1003 | } | |
1004 | ||
1005 | /* | |
1006 | enable_promisc starts promisc mode | |
1007 | ||
1008 | must be called with the lock held and interrupts disabled. | |
1009 | */ | |
1010 | static int enable_promisc(struct xircom_private *card) | |
1011 | { | |
1012 | unsigned int val; | |
1013 | enter("enable_promisc"); | |
1014 | ||
f3b197ac JG |
1015 | val = inl(card->io_port + CSR6); |
1016 | val = val | (1 << 6); | |
1da177e4 LT |
1017 | outl(val, card->io_port + CSR6); |
1018 | ||
1019 | leave("enable_promisc"); | |
1020 | return 1; | |
1021 | } | |
1022 | ||
1023 | ||
1024 | ||
1025 | ||
f3b197ac | 1026 | /* |
59c51591 | 1027 | link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what. |
1da177e4 LT |
1028 | |
1029 | Must be called in locked state with interrupts disabled | |
1030 | */ | |
1031 | static int link_status(struct xircom_private *card) | |
1032 | { | |
1033 | unsigned int val; | |
1034 | enter("link_status"); | |
f3b197ac | 1035 | |
1da177e4 | 1036 | val = inb(card->io_port + CSR12); |
f3b197ac | 1037 | |
1da177e4 LT |
1038 | if (!(val&(1<<2))) /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ |
1039 | return 10; | |
1040 | if (!(val&(1<<1))) /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ | |
1041 | return 100; | |
f3b197ac JG |
1042 | |
1043 | /* If we get here -> no link at all */ | |
1da177e4 LT |
1044 | |
1045 | leave("link_status"); | |
1046 | return 0; | |
1047 | } | |
1048 | ||
1049 | ||
1050 | ||
1051 | ||
1052 | ||
1053 | /* | |
1054 | read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure. | |
f3b197ac | 1055 | |
1da177e4 LT |
1056 | This function will take the spinlock itself and can, as a result, not be called with the lock helt. |
1057 | */ | |
1058 | static void read_mac_address(struct xircom_private *card) | |
1059 | { | |
1060 | unsigned char j, tuple, link, data_id, data_count; | |
1061 | unsigned long flags; | |
1062 | int i; | |
1063 | ||
1064 | enter("read_mac_address"); | |
f3b197ac | 1065 | |
1da177e4 LT |
1066 | spin_lock_irqsave(&card->lock, flags); |
1067 | ||
1068 | outl(1 << 12, card->io_port + CSR9); /* enable boot rom access */ | |
1069 | for (i = 0x100; i < 0x1f7; i += link + 2) { | |
1070 | outl(i, card->io_port + CSR10); | |
1071 | tuple = inl(card->io_port + CSR9) & 0xff; | |
1072 | outl(i + 1, card->io_port + CSR10); | |
1073 | link = inl(card->io_port + CSR9) & 0xff; | |
1074 | outl(i + 2, card->io_port + CSR10); | |
1075 | data_id = inl(card->io_port + CSR9) & 0xff; | |
1076 | outl(i + 3, card->io_port + CSR10); | |
1077 | data_count = inl(card->io_port + CSR9) & 0xff; | |
1078 | if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { | |
f3b197ac | 1079 | /* |
1da177e4 LT |
1080 | * This is it. We have the data we want. |
1081 | */ | |
1082 | for (j = 0; j < 6; j++) { | |
1083 | outl(i + j + 4, card->io_port + CSR10); | |
1084 | card->dev->dev_addr[j] = inl(card->io_port + CSR9) & 0xff; | |
1085 | } | |
1086 | break; | |
1087 | } else if (link == 0) { | |
1088 | break; | |
1089 | } | |
1090 | } | |
1091 | spin_unlock_irqrestore(&card->lock, flags); | |
e174961c | 1092 | pr_debug(" %pM\n", card->dev->dev_addr); |
1da177e4 LT |
1093 | leave("read_mac_address"); |
1094 | } | |
1095 | ||
1096 | ||
1097 | /* | |
1098 | transceiver_voodoo() enables the external UTP plug thingy. | |
1099 | it's called voodoo as I stole this code and cannot cross-reference | |
1100 | it with the specification. | |
1101 | */ | |
1102 | static void transceiver_voodoo(struct xircom_private *card) | |
1103 | { | |
1104 | unsigned long flags; | |
1105 | ||
1106 | enter("transceiver_voodoo"); | |
1107 | ||
1108 | /* disable all powermanagement */ | |
1109 | pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); | |
1110 | ||
1111 | setup_descriptors(card); | |
1112 | ||
1113 | spin_lock_irqsave(&card->lock, flags); | |
1114 | ||
1115 | outl(0x0008, card->io_port + CSR15); | |
f3b197ac | 1116 | udelay(25); |
1da177e4 LT |
1117 | outl(0xa8050000, card->io_port + CSR15); |
1118 | udelay(25); | |
1119 | outl(0xa00f0000, card->io_port + CSR15); | |
1120 | udelay(25); | |
f3b197ac | 1121 | |
1da177e4 LT |
1122 | spin_unlock_irqrestore(&card->lock, flags); |
1123 | ||
1124 | netif_start_queue(card->dev); | |
1125 | leave("transceiver_voodoo"); | |
1126 | } | |
1127 | ||
1128 | ||
1129 | static void xircom_up(struct xircom_private *card) | |
1130 | { | |
1131 | unsigned long flags; | |
1132 | int i; | |
1133 | ||
1134 | enter("xircom_up"); | |
1135 | ||
1136 | /* disable all powermanagement */ | |
1137 | pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000); | |
1138 | ||
1139 | setup_descriptors(card); | |
1140 | ||
1141 | spin_lock_irqsave(&card->lock, flags); | |
1142 | ||
f3b197ac | 1143 | |
1da177e4 LT |
1144 | enable_link_interrupt(card); |
1145 | enable_transmit_interrupt(card); | |
1146 | enable_receive_interrupt(card); | |
1147 | enable_common_interrupts(card); | |
1148 | enable_promisc(card); | |
f3b197ac | 1149 | |
1da177e4 | 1150 | /* The card can have received packets already, read them away now */ |
f3b197ac | 1151 | for (i=0;i<NUMDESCRIPTORS;i++) |
1da177e4 LT |
1152 | investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]); |
1153 | ||
1154 | ||
1155 | spin_unlock_irqrestore(&card->lock, flags); | |
1156 | trigger_receive(card); | |
1157 | trigger_transmit(card); | |
1158 | netif_start_queue(card->dev); | |
1159 | leave("xircom_up"); | |
1160 | } | |
1161 | ||
1162 | /* Bufferoffset is in BYTES */ | |
1163 | static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset) | |
1164 | { | |
f3b197ac JG |
1165 | int status; |
1166 | ||
1da177e4 | 1167 | enter("investigate_read_descriptor"); |
6f35d5d5 | 1168 | status = le32_to_cpu(card->rx_buffer[4*descnr]); |
f3b197ac | 1169 | |
1da177e4 | 1170 | if ((status > 0)) { /* packet received */ |
f3b197ac | 1171 | |
1da177e4 | 1172 | /* TODO: discard error packets */ |
f3b197ac | 1173 | |
1da177e4 LT |
1174 | short pkt_len = ((status >> 16) & 0x7ff) - 4; /* minus 4, we don't want the CRC */ |
1175 | struct sk_buff *skb; | |
1176 | ||
1177 | if (pkt_len > 1518) { | |
44298ec0 | 1178 | pr_err("Packet length %i is bogus\n", pkt_len); |
1da177e4 LT |
1179 | pkt_len = 1518; |
1180 | } | |
1181 | ||
1182 | skb = dev_alloc_skb(pkt_len + 2); | |
1183 | if (skb == NULL) { | |
1034c9f6 | 1184 | dev->stats.rx_dropped++; |
1da177e4 LT |
1185 | goto out; |
1186 | } | |
1da177e4 | 1187 | skb_reserve(skb, 2); |
8c7b7faa | 1188 | skb_copy_to_linear_data(skb, (unsigned char*)&card->rx_buffer[bufferoffset / 4], pkt_len); |
1da177e4 LT |
1189 | skb_put(skb, pkt_len); |
1190 | skb->protocol = eth_type_trans(skb, dev); | |
1191 | netif_rx(skb); | |
1034c9f6 SH |
1192 | dev->stats.rx_packets++; |
1193 | dev->stats.rx_bytes += pkt_len; | |
f3b197ac | 1194 | |
1da177e4 LT |
1195 | out: |
1196 | /* give the buffer back to the card */ | |
6f35d5d5 | 1197 | card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000); |
1da177e4 LT |
1198 | trigger_receive(card); |
1199 | } | |
1200 | ||
1201 | leave("investigate_read_descriptor"); | |
1202 | ||
1203 | } | |
1204 | ||
1205 | ||
1206 | /* Bufferoffset is in BYTES */ | |
1207 | static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset) | |
1208 | { | |
1209 | int status; | |
1210 | ||
1211 | enter("investigate_write_descriptor"); | |
f3b197ac | 1212 | |
6f35d5d5 | 1213 | status = le32_to_cpu(card->tx_buffer[4*descnr]); |
f3b197ac | 1214 | #if 0 |
1da177e4 | 1215 | if (status & 0x8000) { /* Major error */ |
44298ec0 | 1216 | pr_err("Major transmit error status %x\n", status); |
1da177e4 LT |
1217 | card->tx_buffer[4*descnr] = 0; |
1218 | netif_wake_queue (dev); | |
1219 | } | |
1220 | #endif | |
1221 | if (status > 0) { /* bit 31 is 0 when done */ | |
1222 | if (card->tx_skb[descnr]!=NULL) { | |
1034c9f6 | 1223 | dev->stats.tx_bytes += card->tx_skb[descnr]->len; |
1da177e4 LT |
1224 | dev_kfree_skb_irq(card->tx_skb[descnr]); |
1225 | } | |
1226 | card->tx_skb[descnr] = NULL; | |
1227 | /* Bit 8 in the status field is 1 if there was a collision */ | |
1228 | if (status&(1<<8)) | |
1034c9f6 | 1229 | dev->stats.collisions++; |
1da177e4 LT |
1230 | card->tx_buffer[4*descnr] = 0; /* descriptor is free again */ |
1231 | netif_wake_queue (dev); | |
1034c9f6 | 1232 | dev->stats.tx_packets++; |
1da177e4 LT |
1233 | } |
1234 | ||
1235 | leave("investigate_write_descriptor"); | |
f3b197ac | 1236 | |
1da177e4 LT |
1237 | } |
1238 | ||
1239 | ||
1240 | static int __init xircom_init(void) | |
1241 | { | |
ec42cdb6 | 1242 | return pci_register_driver(&xircom_ops); |
1da177e4 LT |
1243 | } |
1244 | ||
1245 | static void __exit xircom_exit(void) | |
1246 | { | |
1247 | pci_unregister_driver(&xircom_ops); | |
f3b197ac | 1248 | } |
1da177e4 | 1249 | |
f3b197ac | 1250 | module_init(xircom_init) |
1da177e4 LT |
1251 | module_exit(xircom_exit) |
1252 |