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2e55cc72 DB |
1 | /* |
2 | * ASIX AX8817X based USB 2.0 Ethernet Devices | |
933a27d3 | 3 | * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> |
2e55cc72 | 4 | * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> |
933a27d3 | 5 | * Copyright (C) 2006 James Painter <jamie.painter@iname.com> |
2e55cc72 DB |
6 | * Copyright (c) 2002-2003 TiVo Inc. |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
607740bc | 23 | #include "asix.h" |
933a27d3 DH |
24 | |
25 | #define PHY_MODE_MARVELL 0x0000 | |
26 | #define MII_MARVELL_LED_CTRL 0x0018 | |
27 | #define MII_MARVELL_STATUS 0x001b | |
28 | #define MII_MARVELL_CTRL 0x0014 | |
29 | ||
30 | #define MARVELL_LED_MANUAL 0x0019 | |
31 | ||
32 | #define MARVELL_STATUS_HWCFG 0x0004 | |
33 | ||
34 | #define MARVELL_CTRL_TXDELAY 0x0002 | |
35 | #define MARVELL_CTRL_RXDELAY 0x0080 | |
2e55cc72 | 36 | |
3486140e | 37 | #define PHY_MODE_RTL8211CL 0x000C |
610d885d | 38 | |
2e55cc72 | 39 | struct ax88172_int_data { |
51bf2976 | 40 | __le16 res1; |
2e55cc72 | 41 | u8 link; |
51bf2976 | 42 | __le16 res2; |
2e55cc72 | 43 | u8 status; |
51bf2976 | 44 | __le16 res3; |
ba2d3587 | 45 | } __packed; |
2e55cc72 | 46 | |
933a27d3 DH |
47 | static void asix_status(struct usbnet *dev, struct urb *urb) |
48 | { | |
49 | struct ax88172_int_data *event; | |
50 | int link; | |
51 | ||
52 | if (urb->actual_length < 8) | |
53 | return; | |
54 | ||
55 | event = urb->transfer_buffer; | |
56 | link = event->link & 0x01; | |
57 | if (netif_carrier_ok(dev->net) != link) { | |
eae65919 | 58 | usbnet_link_change(dev, link, 1); |
60b86755 | 59 | netdev_dbg(dev->net, "Link Status is: %d\n", link); |
933a27d3 DH |
60 | } |
61 | } | |
62 | ||
452b5ecd JCPV |
63 | static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr) |
64 | { | |
65 | if (is_valid_ether_addr(addr)) { | |
66 | memcpy(dev->net->dev_addr, addr, ETH_ALEN); | |
67 | } else { | |
68 | netdev_info(dev->net, "invalid hw address, using random\n"); | |
69 | eth_hw_addr_random(dev->net); | |
70 | } | |
71 | } | |
72 | ||
933a27d3 DH |
73 | /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ |
74 | static u32 asix_get_phyid(struct usbnet *dev) | |
2e55cc72 | 75 | { |
933a27d3 DH |
76 | int phy_reg; |
77 | u32 phy_id; | |
a77929a2 | 78 | int i; |
2e55cc72 | 79 | |
a77929a2 GG |
80 | /* Poll for the rare case the FW or phy isn't ready yet. */ |
81 | for (i = 0; i < 100; i++) { | |
82 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); | |
83 | if (phy_reg != 0 && phy_reg != 0xFFFF) | |
84 | break; | |
85 | mdelay(1); | |
86 | } | |
87 | ||
88 | if (phy_reg <= 0 || phy_reg == 0xFFFF) | |
933a27d3 | 89 | return 0; |
2e55cc72 | 90 | |
933a27d3 | 91 | phy_id = (phy_reg & 0xffff) << 16; |
2e55cc72 | 92 | |
933a27d3 DH |
93 | phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); |
94 | if (phy_reg < 0) | |
95 | return 0; | |
96 | ||
97 | phy_id |= (phy_reg & 0xffff); | |
98 | ||
99 | return phy_id; | |
2e55cc72 DB |
100 | } |
101 | ||
933a27d3 DH |
102 | static u32 asix_get_link(struct net_device *net) |
103 | { | |
104 | struct usbnet *dev = netdev_priv(net); | |
105 | ||
106 | return mii_link_ok(&dev->mii); | |
107 | } | |
108 | ||
109 | static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) | |
110 | { | |
111 | struct usbnet *dev = netdev_priv(net); | |
112 | ||
113 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
114 | } | |
115 | ||
116 | /* We need to override some ethtool_ops so we require our | |
117 | own structure so we don't interfere with other usbnet | |
118 | devices that may be connected at the same time. */ | |
0fc0b732 | 119 | static const struct ethtool_ops ax88172_ethtool_ops = { |
933a27d3 DH |
120 | .get_drvinfo = asix_get_drvinfo, |
121 | .get_link = asix_get_link, | |
933a27d3 | 122 | .get_msglevel = usbnet_get_msglevel, |
2e55cc72 | 123 | .set_msglevel = usbnet_set_msglevel, |
48b1be6a DH |
124 | .get_wol = asix_get_wol, |
125 | .set_wol = asix_set_wol, | |
126 | .get_eeprom_len = asix_get_eeprom_len, | |
127 | .get_eeprom = asix_get_eeprom, | |
cb7b24cd | 128 | .set_eeprom = asix_set_eeprom, |
c41286fd AB |
129 | .get_settings = usbnet_get_settings, |
130 | .set_settings = usbnet_set_settings, | |
131 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
132 | }; |
133 | ||
933a27d3 | 134 | static void ax88172_set_multicast(struct net_device *net) |
2e55cc72 DB |
135 | { |
136 | struct usbnet *dev = netdev_priv(net); | |
933a27d3 DH |
137 | struct asix_data *data = (struct asix_data *)&dev->data; |
138 | u8 rx_ctl = 0x8c; | |
2e55cc72 | 139 | |
933a27d3 DH |
140 | if (net->flags & IFF_PROMISC) { |
141 | rx_ctl |= 0x01; | |
8e95a202 | 142 | } else if (net->flags & IFF_ALLMULTI || |
4cd24eaf | 143 | netdev_mc_count(net) > AX_MAX_MCAST) { |
933a27d3 | 144 | rx_ctl |= 0x02; |
4cd24eaf | 145 | } else if (netdev_mc_empty(net)) { |
933a27d3 DH |
146 | /* just broadcast and directed */ |
147 | } else { | |
148 | /* We use the 20 byte dev->data | |
149 | * for our 8 byte filter buffer | |
150 | * to avoid allocating memory that | |
151 | * is tricky to free later */ | |
22bedad3 | 152 | struct netdev_hw_addr *ha; |
933a27d3 | 153 | u32 crc_bits; |
933a27d3 DH |
154 | |
155 | memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); | |
156 | ||
157 | /* Build the multicast hash filter. */ | |
22bedad3 JP |
158 | netdev_for_each_mc_addr(ha, net) { |
159 | crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; | |
933a27d3 DH |
160 | data->multi_filter[crc_bits >> 3] |= |
161 | 1 << (crc_bits & 7); | |
933a27d3 DH |
162 | } |
163 | ||
164 | asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, | |
165 | AX_MCAST_FILTER_SIZE, data->multi_filter); | |
166 | ||
167 | rx_ctl |= 0x10; | |
168 | } | |
169 | ||
170 | asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); | |
171 | } | |
172 | ||
173 | static int ax88172_link_reset(struct usbnet *dev) | |
174 | { | |
175 | u8 mode; | |
8ae6daca | 176 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
177 | |
178 | mii_check_media(&dev->mii, 1, 1); | |
179 | mii_ethtool_gset(&dev->mii, &ecmd); | |
180 | mode = AX88172_MEDIUM_DEFAULT; | |
181 | ||
182 | if (ecmd.duplex != DUPLEX_FULL) | |
183 | mode |= ~AX88172_MEDIUM_FD; | |
184 | ||
8ae6daca DD |
185 | netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
186 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
187 | |
188 | asix_write_medium_mode(dev, mode); | |
189 | ||
190 | return 0; | |
2e55cc72 DB |
191 | } |
192 | ||
1703338c SH |
193 | static const struct net_device_ops ax88172_netdev_ops = { |
194 | .ndo_open = usbnet_open, | |
195 | .ndo_stop = usbnet_stop, | |
196 | .ndo_start_xmit = usbnet_start_xmit, | |
197 | .ndo_tx_timeout = usbnet_tx_timeout, | |
198 | .ndo_change_mtu = usbnet_change_mtu, | |
199 | .ndo_set_mac_address = eth_mac_addr, | |
200 | .ndo_validate_addr = eth_validate_addr, | |
201 | .ndo_do_ioctl = asix_ioctl, | |
afc4b13d | 202 | .ndo_set_rx_mode = ax88172_set_multicast, |
1703338c SH |
203 | }; |
204 | ||
48b1be6a | 205 | static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) |
2e55cc72 DB |
206 | { |
207 | int ret = 0; | |
51bf2976 | 208 | u8 buf[ETH_ALEN]; |
2e55cc72 DB |
209 | int i; |
210 | unsigned long gpio_bits = dev->driver_info->data; | |
211 | ||
212 | usbnet_get_endpoints(dev,intf); | |
213 | ||
2e55cc72 DB |
214 | /* Toggle the GPIOs in a manufacturer/model specific way */ |
215 | for (i = 2; i >= 0; i--) { | |
83e1b918 GG |
216 | ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, |
217 | (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL); | |
218 | if (ret < 0) | |
51bf2976 | 219 | goto out; |
2e55cc72 DB |
220 | msleep(5); |
221 | } | |
222 | ||
83e1b918 GG |
223 | ret = asix_write_rx_ctl(dev, 0x80); |
224 | if (ret < 0) | |
51bf2976 | 225 | goto out; |
2e55cc72 DB |
226 | |
227 | /* Get the MAC address */ | |
83e1b918 GG |
228 | ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
229 | if (ret < 0) { | |
49ae25b0 GKH |
230 | netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n", |
231 | ret); | |
51bf2976 | 232 | goto out; |
2e55cc72 | 233 | } |
452b5ecd JCPV |
234 | |
235 | asix_set_netdev_dev_addr(dev, buf); | |
2e55cc72 | 236 | |
2e55cc72 DB |
237 | /* Initialize MII structure */ |
238 | dev->mii.dev = dev->net; | |
48b1be6a DH |
239 | dev->mii.mdio_read = asix_mdio_read; |
240 | dev->mii.mdio_write = asix_mdio_write; | |
2e55cc72 DB |
241 | dev->mii.phy_id_mask = 0x3f; |
242 | dev->mii.reg_num_mask = 0x1f; | |
933a27d3 | 243 | dev->mii.phy_id = asix_get_phy_addr(dev); |
2e55cc72 | 244 | |
1703338c | 245 | dev->net->netdev_ops = &ax88172_netdev_ops; |
48b1be6a | 246 | dev->net->ethtool_ops = &ax88172_ethtool_ops; |
95162d65 ED |
247 | dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ |
248 | dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ | |
2e55cc72 | 249 | |
933a27d3 DH |
250 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
251 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
252 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); |
253 | mii_nway_restart(&dev->mii); | |
254 | ||
255 | return 0; | |
51bf2976 AV |
256 | |
257 | out: | |
2e55cc72 DB |
258 | return ret; |
259 | } | |
260 | ||
0fc0b732 | 261 | static const struct ethtool_ops ax88772_ethtool_ops = { |
48b1be6a | 262 | .get_drvinfo = asix_get_drvinfo, |
933a27d3 | 263 | .get_link = asix_get_link, |
2e55cc72 DB |
264 | .get_msglevel = usbnet_get_msglevel, |
265 | .set_msglevel = usbnet_set_msglevel, | |
48b1be6a DH |
266 | .get_wol = asix_get_wol, |
267 | .set_wol = asix_set_wol, | |
268 | .get_eeprom_len = asix_get_eeprom_len, | |
269 | .get_eeprom = asix_get_eeprom, | |
cb7b24cd | 270 | .set_eeprom = asix_set_eeprom, |
c41286fd AB |
271 | .get_settings = usbnet_get_settings, |
272 | .set_settings = usbnet_set_settings, | |
273 | .nway_reset = usbnet_nway_reset, | |
2e55cc72 DB |
274 | }; |
275 | ||
933a27d3 DH |
276 | static int ax88772_link_reset(struct usbnet *dev) |
277 | { | |
278 | u16 mode; | |
8ae6daca | 279 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 DH |
280 | |
281 | mii_check_media(&dev->mii, 1, 1); | |
282 | mii_ethtool_gset(&dev->mii, &ecmd); | |
283 | mode = AX88772_MEDIUM_DEFAULT; | |
284 | ||
8ae6daca | 285 | if (ethtool_cmd_speed(&ecmd) != SPEED_100) |
933a27d3 DH |
286 | mode &= ~AX_MEDIUM_PS; |
287 | ||
288 | if (ecmd.duplex != DUPLEX_FULL) | |
289 | mode &= ~AX_MEDIUM_FD; | |
290 | ||
8ae6daca DD |
291 | netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
292 | ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); | |
933a27d3 DH |
293 | |
294 | asix_write_medium_mode(dev, mode); | |
295 | ||
296 | return 0; | |
297 | } | |
298 | ||
4ad1438f | 299 | static int ax88772_reset(struct usbnet *dev) |
2e55cc72 | 300 | { |
8ef66bdc | 301 | struct asix_data *data = (struct asix_data *)&dev->data; |
d0ffff8f | 302 | int ret, embd_phy; |
933a27d3 | 303 | u16 rx_ctl; |
2e55cc72 | 304 | |
83e1b918 GG |
305 | ret = asix_write_gpio(dev, |
306 | AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5); | |
307 | if (ret < 0) | |
51bf2976 | 308 | goto out; |
2e55cc72 | 309 | |
d0ffff8f | 310 | embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); |
4ad1438f | 311 | |
83e1b918 GG |
312 | ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); |
313 | if (ret < 0) { | |
49ae25b0 | 314 | netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); |
51bf2976 | 315 | goto out; |
2e55cc72 DB |
316 | } |
317 | ||
83e1b918 GG |
318 | ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); |
319 | if (ret < 0) | |
51bf2976 | 320 | goto out; |
2e55cc72 DB |
321 | |
322 | msleep(150); | |
83e1b918 GG |
323 | |
324 | ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); | |
325 | if (ret < 0) | |
51bf2976 | 326 | goto out; |
2e55cc72 DB |
327 | |
328 | msleep(150); | |
4ad1438f | 329 | |
d0ffff8f | 330 | if (embd_phy) { |
83e1b918 GG |
331 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL); |
332 | if (ret < 0) | |
51bf2976 | 333 | goto out; |
83e1b918 GG |
334 | } else { |
335 | ret = asix_sw_reset(dev, AX_SWRESET_PRTE); | |
336 | if (ret < 0) | |
51bf2976 | 337 | goto out; |
d0ffff8f | 338 | } |
2e55cc72 DB |
339 | |
340 | msleep(150); | |
933a27d3 | 341 | rx_ctl = asix_read_rx_ctl(dev); |
49ae25b0 | 342 | netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl); |
83e1b918 GG |
343 | ret = asix_write_rx_ctl(dev, 0x0000); |
344 | if (ret < 0) | |
51bf2976 | 345 | goto out; |
2e55cc72 | 346 | |
933a27d3 | 347 | rx_ctl = asix_read_rx_ctl(dev); |
49ae25b0 | 348 | netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); |
933a27d3 | 349 | |
83e1b918 GG |
350 | ret = asix_sw_reset(dev, AX_SWRESET_PRL); |
351 | if (ret < 0) | |
51bf2976 | 352 | goto out; |
2e55cc72 | 353 | |
2e55cc72 | 354 | msleep(150); |
48b1be6a | 355 | |
83e1b918 GG |
356 | ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL); |
357 | if (ret < 0) | |
51bf2976 | 358 | goto out; |
2e55cc72 | 359 | |
48b1be6a | 360 | msleep(150); |
2e55cc72 | 361 | |
933a27d3 DH |
362 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
363 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
2e55cc72 DB |
364 | ADVERTISE_ALL | ADVERTISE_CSMA); |
365 | mii_nway_restart(&dev->mii); | |
366 | ||
83e1b918 GG |
367 | ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT); |
368 | if (ret < 0) | |
51bf2976 | 369 | goto out; |
2e55cc72 | 370 | |
83e1b918 | 371 | ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, |
2e55cc72 | 372 | AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, |
83e1b918 GG |
373 | AX88772_IPG2_DEFAULT, 0, NULL); |
374 | if (ret < 0) { | |
49ae25b0 | 375 | netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret); |
51bf2976 | 376 | goto out; |
2e55cc72 | 377 | } |
2e55cc72 | 378 | |
8ef66bdc JK |
379 | /* Rewrite MAC address */ |
380 | memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); | |
381 | ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
382 | data->mac_addr); | |
383 | if (ret < 0) | |
384 | goto out; | |
385 | ||
2e55cc72 | 386 | /* Set RX_CTL to default values with 2k buffer, and enable cactus */ |
83e1b918 GG |
387 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
388 | if (ret < 0) | |
51bf2976 | 389 | goto out; |
2e55cc72 | 390 | |
933a27d3 | 391 | rx_ctl = asix_read_rx_ctl(dev); |
49ae25b0 GKH |
392 | netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n", |
393 | rx_ctl); | |
933a27d3 DH |
394 | |
395 | rx_ctl = asix_read_medium_status(dev); | |
49ae25b0 GKH |
396 | netdev_dbg(dev->net, |
397 | "Medium Status is 0x%04x after all initializations\n", | |
398 | rx_ctl); | |
933a27d3 | 399 | |
4ad1438f GG |
400 | return 0; |
401 | ||
402 | out: | |
403 | return ret; | |
404 | ||
405 | } | |
406 | ||
407 | static const struct net_device_ops ax88772_netdev_ops = { | |
408 | .ndo_open = usbnet_open, | |
409 | .ndo_stop = usbnet_stop, | |
410 | .ndo_start_xmit = usbnet_start_xmit, | |
411 | .ndo_tx_timeout = usbnet_tx_timeout, | |
412 | .ndo_change_mtu = usbnet_change_mtu, | |
413 | .ndo_set_mac_address = asix_set_mac_address, | |
414 | .ndo_validate_addr = eth_validate_addr, | |
415 | .ndo_do_ioctl = asix_ioctl, | |
416 | .ndo_set_rx_mode = asix_set_multicast, | |
417 | }; | |
418 | ||
419 | static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) | |
420 | { | |
5620df65 | 421 | int ret, embd_phy, i; |
4ad1438f GG |
422 | u8 buf[ETH_ALEN]; |
423 | u32 phyid; | |
424 | ||
4ad1438f GG |
425 | usbnet_get_endpoints(dev,intf); |
426 | ||
427 | /* Get the MAC address */ | |
5620df65 LS |
428 | if (dev->driver_info->data & FLAG_EEPROM_MAC) { |
429 | for (i = 0; i < (ETH_ALEN >> 1); i++) { | |
430 | ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i, | |
431 | 0, 2, buf + i * 2); | |
432 | if (ret < 0) | |
433 | break; | |
434 | } | |
435 | } else { | |
436 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, | |
437 | 0, 0, ETH_ALEN, buf); | |
438 | } | |
439 | ||
83e1b918 | 440 | if (ret < 0) { |
49ae25b0 | 441 | netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); |
83e1b918 | 442 | return ret; |
4ad1438f | 443 | } |
452b5ecd JCPV |
444 | |
445 | asix_set_netdev_dev_addr(dev, buf); | |
4ad1438f GG |
446 | |
447 | /* Initialize MII structure */ | |
448 | dev->mii.dev = dev->net; | |
449 | dev->mii.mdio_read = asix_mdio_read; | |
450 | dev->mii.mdio_write = asix_mdio_write; | |
451 | dev->mii.phy_id_mask = 0x1f; | |
452 | dev->mii.reg_num_mask = 0x1f; | |
453 | dev->mii.phy_id = asix_get_phy_addr(dev); | |
454 | ||
4ad1438f GG |
455 | dev->net->netdev_ops = &ax88772_netdev_ops; |
456 | dev->net->ethtool_ops = &ax88772_ethtool_ops; | |
95162d65 ED |
457 | dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */ |
458 | dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */ | |
4ad1438f | 459 | |
d3665188 GG |
460 | embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0); |
461 | ||
462 | /* Reset the PHY to normal operation mode */ | |
463 | ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL); | |
464 | if (ret < 0) { | |
49ae25b0 | 465 | netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret); |
d3665188 GG |
466 | return ret; |
467 | } | |
468 | ||
469 | ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL); | |
83e1b918 GG |
470 | if (ret < 0) |
471 | return ret; | |
4ad1438f | 472 | |
d3665188 GG |
473 | msleep(150); |
474 | ||
475 | ret = asix_sw_reset(dev, AX_SWRESET_CLEAR); | |
476 | if (ret < 0) | |
477 | return ret; | |
478 | ||
479 | msleep(150); | |
480 | ||
481 | ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE); | |
482 | ||
483 | /* Read PHYID register *AFTER* the PHY was reset properly */ | |
484 | phyid = asix_get_phyid(dev); | |
49ae25b0 | 485 | netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); |
d3665188 | 486 | |
2e55cc72 DB |
487 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ |
488 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
489 | /* hard_mtu is still the default - the device does not support | |
490 | jumbo eth frames */ | |
491 | dev->rx_urb_size = 2048; | |
492 | } | |
83e1b918 | 493 | |
8b5b6f54 LS |
494 | dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL); |
495 | if (!dev->driver_priv) | |
496 | return -ENOMEM; | |
497 | ||
2e55cc72 | 498 | return 0; |
2e55cc72 DB |
499 | } |
500 | ||
ad327910 | 501 | static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf) |
8b5b6f54 LS |
502 | { |
503 | if (dev->driver_priv) | |
504 | kfree(dev->driver_priv); | |
505 | } | |
506 | ||
bc689c97 | 507 | static const struct ethtool_ops ax88178_ethtool_ops = { |
933a27d3 DH |
508 | .get_drvinfo = asix_get_drvinfo, |
509 | .get_link = asix_get_link, | |
933a27d3 DH |
510 | .get_msglevel = usbnet_get_msglevel, |
511 | .set_msglevel = usbnet_set_msglevel, | |
512 | .get_wol = asix_get_wol, | |
513 | .set_wol = asix_set_wol, | |
514 | .get_eeprom_len = asix_get_eeprom_len, | |
515 | .get_eeprom = asix_get_eeprom, | |
cb7b24cd | 516 | .set_eeprom = asix_set_eeprom, |
c41286fd AB |
517 | .get_settings = usbnet_get_settings, |
518 | .set_settings = usbnet_set_settings, | |
519 | .nway_reset = usbnet_nway_reset, | |
933a27d3 DH |
520 | }; |
521 | ||
522 | static int marvell_phy_init(struct usbnet *dev) | |
2e55cc72 | 523 | { |
933a27d3 DH |
524 | struct asix_data *data = (struct asix_data *)&dev->data; |
525 | u16 reg; | |
2e55cc72 | 526 | |
60b86755 | 527 | netdev_dbg(dev->net, "marvell_phy_init()\n"); |
2e55cc72 | 528 | |
933a27d3 | 529 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); |
60b86755 | 530 | netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); |
2e55cc72 | 531 | |
933a27d3 DH |
532 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, |
533 | MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY); | |
2e55cc72 | 534 | |
933a27d3 DH |
535 | if (data->ledmode) { |
536 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, | |
537 | MII_MARVELL_LED_CTRL); | |
60b86755 | 538 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); |
2e55cc72 | 539 | |
933a27d3 DH |
540 | reg &= 0xf8ff; |
541 | reg |= (1 + 0x0100); | |
542 | asix_mdio_write(dev->net, dev->mii.phy_id, | |
543 | MII_MARVELL_LED_CTRL, reg); | |
2e55cc72 | 544 | |
933a27d3 DH |
545 | reg = asix_mdio_read(dev->net, dev->mii.phy_id, |
546 | MII_MARVELL_LED_CTRL); | |
60b86755 | 547 | netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); |
933a27d3 DH |
548 | reg &= 0xfc0f; |
549 | } | |
2e55cc72 | 550 | |
933a27d3 DH |
551 | return 0; |
552 | } | |
553 | ||
610d885d GG |
554 | static int rtl8211cl_phy_init(struct usbnet *dev) |
555 | { | |
556 | struct asix_data *data = (struct asix_data *)&dev->data; | |
557 | ||
558 | netdev_dbg(dev->net, "rtl8211cl_phy_init()\n"); | |
559 | ||
560 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005); | |
561 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0); | |
562 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x01, | |
563 | asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080); | |
564 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
565 | ||
566 | if (data->ledmode == 12) { | |
567 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002); | |
568 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb); | |
569 | asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0); | |
570 | } | |
571 | ||
572 | return 0; | |
573 | } | |
574 | ||
933a27d3 DH |
575 | static int marvell_led_status(struct usbnet *dev, u16 speed) |
576 | { | |
577 | u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); | |
578 | ||
60b86755 | 579 | netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); |
933a27d3 DH |
580 | |
581 | /* Clear out the center LED bits - 0x03F0 */ | |
582 | reg &= 0xfc0f; | |
583 | ||
584 | switch (speed) { | |
585 | case SPEED_1000: | |
586 | reg |= 0x03e0; | |
587 | break; | |
588 | case SPEED_100: | |
589 | reg |= 0x03b0; | |
590 | break; | |
591 | default: | |
592 | reg |= 0x02f0; | |
2e55cc72 DB |
593 | } |
594 | ||
60b86755 | 595 | netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); |
933a27d3 DH |
596 | asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); |
597 | ||
598 | return 0; | |
599 | } | |
600 | ||
610d885d GG |
601 | static int ax88178_reset(struct usbnet *dev) |
602 | { | |
603 | struct asix_data *data = (struct asix_data *)&dev->data; | |
604 | int ret; | |
605 | __le16 eeprom; | |
606 | u8 status; | |
607 | int gpio0 = 0; | |
b2d3ad29 | 608 | u32 phyid; |
610d885d GG |
609 | |
610 | asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status); | |
49ae25b0 | 611 | netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status); |
610d885d GG |
612 | |
613 | asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL); | |
614 | asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom); | |
615 | asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL); | |
616 | ||
49ae25b0 | 617 | netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom); |
610d885d GG |
618 | |
619 | if (eeprom == cpu_to_le16(0xffff)) { | |
620 | data->phymode = PHY_MODE_MARVELL; | |
621 | data->ledmode = 0; | |
622 | gpio0 = 1; | |
623 | } else { | |
b2d3ad29 | 624 | data->phymode = le16_to_cpu(eeprom) & 0x7F; |
610d885d GG |
625 | data->ledmode = le16_to_cpu(eeprom) >> 8; |
626 | gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1; | |
627 | } | |
49ae25b0 | 628 | netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode); |
610d885d | 629 | |
b2d3ad29 | 630 | /* Power up external GigaPHY through AX88178 GPIO pin */ |
610d885d GG |
631 | asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40); |
632 | if ((le16_to_cpu(eeprom) >> 8) != 1) { | |
633 | asix_write_gpio(dev, 0x003c, 30); | |
634 | asix_write_gpio(dev, 0x001c, 300); | |
635 | asix_write_gpio(dev, 0x003c, 30); | |
636 | } else { | |
49ae25b0 | 637 | netdev_dbg(dev->net, "gpio phymode == 1 path\n"); |
610d885d GG |
638 | asix_write_gpio(dev, AX_GPIO_GPO1EN, 30); |
639 | asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30); | |
640 | } | |
641 | ||
b2d3ad29 GG |
642 | /* Read PHYID register *AFTER* powering up PHY */ |
643 | phyid = asix_get_phyid(dev); | |
49ae25b0 | 644 | netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid); |
b2d3ad29 GG |
645 | |
646 | /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */ | |
647 | asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL); | |
648 | ||
610d885d GG |
649 | asix_sw_reset(dev, 0); |
650 | msleep(150); | |
651 | ||
652 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); | |
653 | msleep(150); | |
654 | ||
655 | asix_write_rx_ctl(dev, 0); | |
656 | ||
657 | if (data->phymode == PHY_MODE_MARVELL) { | |
658 | marvell_phy_init(dev); | |
659 | msleep(60); | |
660 | } else if (data->phymode == PHY_MODE_RTL8211CL) | |
661 | rtl8211cl_phy_init(dev); | |
662 | ||
663 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, | |
664 | BMCR_RESET | BMCR_ANENABLE); | |
665 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
666 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); | |
667 | asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, | |
668 | ADVERTISE_1000FULL); | |
669 | ||
670 | mii_nway_restart(&dev->mii); | |
671 | ||
83e1b918 GG |
672 | ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT); |
673 | if (ret < 0) | |
674 | return ret; | |
610d885d | 675 | |
71bc5d94 JK |
676 | /* Rewrite MAC address */ |
677 | memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN); | |
678 | ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, | |
679 | data->mac_addr); | |
680 | if (ret < 0) | |
681 | return ret; | |
682 | ||
83e1b918 GG |
683 | ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL); |
684 | if (ret < 0) | |
685 | return ret; | |
610d885d GG |
686 | |
687 | return 0; | |
610d885d GG |
688 | } |
689 | ||
933a27d3 DH |
690 | static int ax88178_link_reset(struct usbnet *dev) |
691 | { | |
692 | u16 mode; | |
8ae6daca | 693 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
933a27d3 | 694 | struct asix_data *data = (struct asix_data *)&dev->data; |
8ae6daca | 695 | u32 speed; |
933a27d3 | 696 | |
60b86755 | 697 | netdev_dbg(dev->net, "ax88178_link_reset()\n"); |
933a27d3 DH |
698 | |
699 | mii_check_media(&dev->mii, 1, 1); | |
700 | mii_ethtool_gset(&dev->mii, &ecmd); | |
701 | mode = AX88178_MEDIUM_DEFAULT; | |
8ae6daca | 702 | speed = ethtool_cmd_speed(&ecmd); |
933a27d3 | 703 | |
8ae6daca | 704 | if (speed == SPEED_1000) |
a7f75c0c | 705 | mode |= AX_MEDIUM_GM; |
8ae6daca | 706 | else if (speed == SPEED_100) |
933a27d3 DH |
707 | mode |= AX_MEDIUM_PS; |
708 | else | |
709 | mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM); | |
710 | ||
a7f75c0c PK |
711 | mode |= AX_MEDIUM_ENCK; |
712 | ||
933a27d3 DH |
713 | if (ecmd.duplex == DUPLEX_FULL) |
714 | mode |= AX_MEDIUM_FD; | |
715 | else | |
716 | mode &= ~AX_MEDIUM_FD; | |
717 | ||
8ae6daca DD |
718 | netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", |
719 | speed, ecmd.duplex, mode); | |
933a27d3 DH |
720 | |
721 | asix_write_medium_mode(dev, mode); | |
722 | ||
723 | if (data->phymode == PHY_MODE_MARVELL && data->ledmode) | |
8ae6daca | 724 | marvell_led_status(dev, speed); |
933a27d3 DH |
725 | |
726 | return 0; | |
727 | } | |
728 | ||
729 | static void ax88178_set_mfb(struct usbnet *dev) | |
730 | { | |
731 | u16 mfb = AX_RX_CTL_MFB_16384; | |
732 | u16 rxctl; | |
733 | u16 medium; | |
734 | int old_rx_urb_size = dev->rx_urb_size; | |
735 | ||
736 | if (dev->hard_mtu < 2048) { | |
737 | dev->rx_urb_size = 2048; | |
738 | mfb = AX_RX_CTL_MFB_2048; | |
739 | } else if (dev->hard_mtu < 4096) { | |
740 | dev->rx_urb_size = 4096; | |
741 | mfb = AX_RX_CTL_MFB_4096; | |
742 | } else if (dev->hard_mtu < 8192) { | |
743 | dev->rx_urb_size = 8192; | |
744 | mfb = AX_RX_CTL_MFB_8192; | |
745 | } else if (dev->hard_mtu < 16384) { | |
746 | dev->rx_urb_size = 16384; | |
747 | mfb = AX_RX_CTL_MFB_16384; | |
2e55cc72 | 748 | } |
933a27d3 DH |
749 | |
750 | rxctl = asix_read_rx_ctl(dev); | |
751 | asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb); | |
752 | ||
753 | medium = asix_read_medium_status(dev); | |
754 | if (dev->net->mtu > 1500) | |
755 | medium |= AX_MEDIUM_JFE; | |
756 | else | |
757 | medium &= ~AX_MEDIUM_JFE; | |
758 | asix_write_medium_mode(dev, medium); | |
759 | ||
760 | if (dev->rx_urb_size > old_rx_urb_size) | |
761 | usbnet_unlink_rx_urbs(dev); | |
2e55cc72 DB |
762 | } |
763 | ||
933a27d3 | 764 | static int ax88178_change_mtu(struct net_device *net, int new_mtu) |
2e55cc72 | 765 | { |
933a27d3 DH |
766 | struct usbnet *dev = netdev_priv(net); |
767 | int ll_mtu = new_mtu + net->hard_header_len + 4; | |
2e55cc72 | 768 | |
60b86755 | 769 | netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); |
2e55cc72 | 770 | |
933a27d3 DH |
771 | if (new_mtu <= 0 || ll_mtu > 16384) |
772 | return -EINVAL; | |
773 | ||
774 | if ((ll_mtu % dev->maxpacket) == 0) | |
775 | return -EDOM; | |
776 | ||
777 | net->mtu = new_mtu; | |
778 | dev->hard_mtu = net->mtu + net->hard_header_len; | |
779 | ax88178_set_mfb(dev); | |
780 | ||
781 | return 0; | |
782 | } | |
783 | ||
1703338c SH |
784 | static const struct net_device_ops ax88178_netdev_ops = { |
785 | .ndo_open = usbnet_open, | |
786 | .ndo_stop = usbnet_stop, | |
787 | .ndo_start_xmit = usbnet_start_xmit, | |
788 | .ndo_tx_timeout = usbnet_tx_timeout, | |
7f29a3ba | 789 | .ndo_set_mac_address = asix_set_mac_address, |
1703338c | 790 | .ndo_validate_addr = eth_validate_addr, |
afc4b13d | 791 | .ndo_set_rx_mode = asix_set_multicast, |
1703338c SH |
792 | .ndo_do_ioctl = asix_ioctl, |
793 | .ndo_change_mtu = ax88178_change_mtu, | |
794 | }; | |
795 | ||
933a27d3 DH |
796 | static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) |
797 | { | |
933a27d3 | 798 | int ret; |
51bf2976 | 799 | u8 buf[ETH_ALEN]; |
933a27d3 DH |
800 | |
801 | usbnet_get_endpoints(dev,intf); | |
802 | ||
933a27d3 | 803 | /* Get the MAC address */ |
83e1b918 GG |
804 | ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf); |
805 | if (ret < 0) { | |
49ae25b0 | 806 | netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret); |
83e1b918 | 807 | return ret; |
2e55cc72 | 808 | } |
452b5ecd JCPV |
809 | |
810 | asix_set_netdev_dev_addr(dev, buf); | |
2e55cc72 | 811 | |
933a27d3 DH |
812 | /* Initialize MII structure */ |
813 | dev->mii.dev = dev->net; | |
814 | dev->mii.mdio_read = asix_mdio_read; | |
815 | dev->mii.mdio_write = asix_mdio_write; | |
816 | dev->mii.phy_id_mask = 0x1f; | |
817 | dev->mii.reg_num_mask = 0xff; | |
818 | dev->mii.supports_gmii = 1; | |
933a27d3 | 819 | dev->mii.phy_id = asix_get_phy_addr(dev); |
1703338c SH |
820 | |
821 | dev->net->netdev_ops = &ax88178_netdev_ops; | |
933a27d3 | 822 | dev->net->ethtool_ops = &ax88178_ethtool_ops; |
2e55cc72 | 823 | |
b2d3ad29 GG |
824 | /* Blink LEDS so users know driver saw dongle */ |
825 | asix_sw_reset(dev, 0); | |
826 | msleep(150); | |
2e55cc72 | 827 | |
b2d3ad29 GG |
828 | asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); |
829 | msleep(150); | |
933a27d3 DH |
830 | |
831 | /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ | |
832 | if (dev->driver_info->flags & FLAG_FRAMING_AX) { | |
833 | /* hard_mtu is still the default - the device does not support | |
834 | jumbo eth frames */ | |
835 | dev->rx_urb_size = 2048; | |
836 | } | |
933a27d3 | 837 | |
8b5b6f54 LS |
838 | dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL); |
839 | if (!dev->driver_priv) | |
840 | return -ENOMEM; | |
841 | ||
83e1b918 | 842 | return 0; |
2e55cc72 DB |
843 | } |
844 | ||
845 | static const struct driver_info ax8817x_info = { | |
846 | .description = "ASIX AX8817x USB 2.0 Ethernet", | |
48b1be6a DH |
847 | .bind = ax88172_bind, |
848 | .status = asix_status, | |
2e55cc72 DB |
849 | .link_reset = ax88172_link_reset, |
850 | .reset = ax88172_link_reset, | |
37e8273c | 851 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
852 | .data = 0x00130103, |
853 | }; | |
854 | ||
855 | static const struct driver_info dlink_dub_e100_info = { | |
856 | .description = "DLink DUB-E100 USB Ethernet", | |
48b1be6a DH |
857 | .bind = ax88172_bind, |
858 | .status = asix_status, | |
2e55cc72 DB |
859 | .link_reset = ax88172_link_reset, |
860 | .reset = ax88172_link_reset, | |
37e8273c | 861 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
862 | .data = 0x009f9d9f, |
863 | }; | |
864 | ||
865 | static const struct driver_info netgear_fa120_info = { | |
866 | .description = "Netgear FA-120 USB Ethernet", | |
48b1be6a DH |
867 | .bind = ax88172_bind, |
868 | .status = asix_status, | |
2e55cc72 DB |
869 | .link_reset = ax88172_link_reset, |
870 | .reset = ax88172_link_reset, | |
37e8273c | 871 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
872 | .data = 0x00130103, |
873 | }; | |
874 | ||
875 | static const struct driver_info hawking_uf200_info = { | |
876 | .description = "Hawking UF200 USB Ethernet", | |
48b1be6a DH |
877 | .bind = ax88172_bind, |
878 | .status = asix_status, | |
2e55cc72 DB |
879 | .link_reset = ax88172_link_reset, |
880 | .reset = ax88172_link_reset, | |
37e8273c | 881 | .flags = FLAG_ETHER | FLAG_LINK_INTR, |
2e55cc72 DB |
882 | .data = 0x001f1d1f, |
883 | }; | |
884 | ||
885 | static const struct driver_info ax88772_info = { | |
886 | .description = "ASIX AX88772 USB 2.0 Ethernet", | |
887 | .bind = ax88772_bind, | |
8b5b6f54 | 888 | .unbind = ax88772_unbind, |
48b1be6a | 889 | .status = asix_status, |
2e55cc72 | 890 | .link_reset = ax88772_link_reset, |
4ad1438f | 891 | .reset = ax88772_reset, |
a9e0aca4 | 892 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET, |
8b5b6f54 | 893 | .rx_fixup = asix_rx_fixup_common, |
933a27d3 DH |
894 | .tx_fixup = asix_tx_fixup, |
895 | }; | |
896 | ||
5620df65 LS |
897 | static const struct driver_info ax88772b_info = { |
898 | .description = "ASIX AX88772B USB 2.0 Ethernet", | |
899 | .bind = ax88772_bind, | |
8b5b6f54 | 900 | .unbind = ax88772_unbind, |
5620df65 LS |
901 | .status = asix_status, |
902 | .link_reset = ax88772_link_reset, | |
903 | .reset = ax88772_reset, | |
904 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | | |
905 | FLAG_MULTI_PACKET, | |
8b5b6f54 | 906 | .rx_fixup = asix_rx_fixup_common, |
5620df65 LS |
907 | .tx_fixup = asix_tx_fixup, |
908 | .data = FLAG_EEPROM_MAC, | |
909 | }; | |
910 | ||
933a27d3 DH |
911 | static const struct driver_info ax88178_info = { |
912 | .description = "ASIX AX88178 USB 2.0 Ethernet", | |
913 | .bind = ax88178_bind, | |
8b5b6f54 | 914 | .unbind = ax88772_unbind, |
933a27d3 DH |
915 | .status = asix_status, |
916 | .link_reset = ax88178_link_reset, | |
610d885d | 917 | .reset = ax88178_reset, |
37e8273c | 918 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, |
8b5b6f54 | 919 | .rx_fixup = asix_rx_fixup_common, |
933a27d3 | 920 | .tx_fixup = asix_tx_fixup, |
2e55cc72 DB |
921 | }; |
922 | ||
45af3fb4 GT |
923 | /* |
924 | * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in | |
925 | * no-name packaging. | |
926 | * USB device strings are: | |
927 | * 1: Manufacturer: USBLINK | |
928 | * 2: Product: HG20F9 USB2.0 | |
929 | * 3: Serial: 000003 | |
930 | * Appears to be compatible with Asix 88772B. | |
931 | */ | |
932 | static const struct driver_info hg20f9_info = { | |
933 | .description = "HG20F9 USB 2.0 Ethernet", | |
934 | .bind = ax88772_bind, | |
935 | .unbind = ax88772_unbind, | |
936 | .status = asix_status, | |
937 | .link_reset = ax88772_link_reset, | |
938 | .reset = ax88772_reset, | |
939 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | | |
940 | FLAG_MULTI_PACKET, | |
941 | .rx_fixup = asix_rx_fixup_common, | |
942 | .tx_fixup = asix_tx_fixup, | |
943 | .data = FLAG_EEPROM_MAC, | |
944 | }; | |
945 | ||
16626b0c CR |
946 | extern const struct driver_info ax88172a_info; |
947 | ||
2e55cc72 DB |
948 | static const struct usb_device_id products [] = { |
949 | { | |
950 | // Linksys USB200M | |
951 | USB_DEVICE (0x077b, 0x2226), | |
952 | .driver_info = (unsigned long) &ax8817x_info, | |
953 | }, { | |
954 | // Netgear FA120 | |
955 | USB_DEVICE (0x0846, 0x1040), | |
956 | .driver_info = (unsigned long) &netgear_fa120_info, | |
957 | }, { | |
958 | // DLink DUB-E100 | |
959 | USB_DEVICE (0x2001, 0x1a00), | |
960 | .driver_info = (unsigned long) &dlink_dub_e100_info, | |
961 | }, { | |
962 | // Intellinet, ST Lab USB Ethernet | |
963 | USB_DEVICE (0x0b95, 0x1720), | |
964 | .driver_info = (unsigned long) &ax8817x_info, | |
965 | }, { | |
966 | // Hawking UF200, TrendNet TU2-ET100 | |
967 | USB_DEVICE (0x07b8, 0x420a), | |
968 | .driver_info = (unsigned long) &hawking_uf200_info, | |
969 | }, { | |
39c4b38c DH |
970 | // Billionton Systems, USB2AR |
971 | USB_DEVICE (0x08dd, 0x90ff), | |
972 | .driver_info = (unsigned long) &ax8817x_info, | |
2e55cc72 DB |
973 | }, { |
974 | // ATEN UC210T | |
975 | USB_DEVICE (0x0557, 0x2009), | |
976 | .driver_info = (unsigned long) &ax8817x_info, | |
977 | }, { | |
978 | // Buffalo LUA-U2-KTX | |
979 | USB_DEVICE (0x0411, 0x003d), | |
980 | .driver_info = (unsigned long) &ax8817x_info, | |
ac7b77f1 MD |
981 | }, { |
982 | // Buffalo LUA-U2-GT 10/100/1000 | |
983 | USB_DEVICE (0x0411, 0x006e), | |
984 | .driver_info = (unsigned long) &ax88178_info, | |
2e55cc72 DB |
985 | }, { |
986 | // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter" | |
987 | USB_DEVICE (0x6189, 0x182d), | |
988 | .driver_info = (unsigned long) &ax8817x_info, | |
4e503919 JN |
989 | }, { |
990 | // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter" | |
991 | USB_DEVICE (0x0df6, 0x0056), | |
992 | .driver_info = (unsigned long) &ax88178_info, | |
2e55cc72 DB |
993 | }, { |
994 | // corega FEther USB2-TX | |
995 | USB_DEVICE (0x07aa, 0x0017), | |
996 | .driver_info = (unsigned long) &ax8817x_info, | |
997 | }, { | |
998 | // Surecom EP-1427X-2 | |
999 | USB_DEVICE (0x1189, 0x0893), | |
1000 | .driver_info = (unsigned long) &ax8817x_info, | |
1001 | }, { | |
1002 | // goodway corp usb gwusb2e | |
1003 | USB_DEVICE (0x1631, 0x6200), | |
1004 | .driver_info = (unsigned long) &ax8817x_info, | |
39c4b38c DH |
1005 | }, { |
1006 | // JVC MP-PRX1 Port Replicator | |
1007 | USB_DEVICE (0x04f1, 0x3008), | |
1008 | .driver_info = (unsigned long) &ax8817x_info, | |
66dc81ec QP |
1009 | }, { |
1010 | // Lenovo U2L100P 10/100 | |
1011 | USB_DEVICE (0x17ef, 0x7203), | |
1012 | .driver_info = (unsigned long) &ax88772_info, | |
30885909 MV |
1013 | }, { |
1014 | // ASIX AX88772B 10/100 | |
1015 | USB_DEVICE (0x0b95, 0x772b), | |
5620df65 | 1016 | .driver_info = (unsigned long) &ax88772b_info, |
2e55cc72 DB |
1017 | }, { |
1018 | // ASIX AX88772 10/100 | |
39c4b38c DH |
1019 | USB_DEVICE (0x0b95, 0x7720), |
1020 | .driver_info = (unsigned long) &ax88772_info, | |
7327413c EW |
1021 | }, { |
1022 | // ASIX AX88178 10/100/1000 | |
1023 | USB_DEVICE (0x0b95, 0x1780), | |
933a27d3 | 1024 | .driver_info = (unsigned long) &ax88178_info, |
f4680d3d AE |
1025 | }, { |
1026 | // Logitec LAN-GTJ/U2A | |
1027 | USB_DEVICE (0x0789, 0x0160), | |
1028 | .driver_info = (unsigned long) &ax88178_info, | |
5e0f76c6 DH |
1029 | }, { |
1030 | // Linksys USB200M Rev 2 | |
1031 | USB_DEVICE (0x13b1, 0x0018), | |
1032 | .driver_info = (unsigned long) &ax88772_info, | |
5732ce84 DH |
1033 | }, { |
1034 | // 0Q0 cable ethernet | |
1035 | USB_DEVICE (0x1557, 0x7720), | |
1036 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1037 | }, { |
1038 | // DLink DUB-E100 H/W Ver B1 | |
1039 | USB_DEVICE (0x07d1, 0x3c05), | |
1040 | .driver_info = (unsigned long) &ax88772_info, | |
b923e7fc DH |
1041 | }, { |
1042 | // DLink DUB-E100 H/W Ver B1 Alternate | |
1043 | USB_DEVICE (0x2001, 0x3c05), | |
1044 | .driver_info = (unsigned long) &ax88772_info, | |
ed3770a9 S |
1045 | }, { |
1046 | // DLink DUB-E100 H/W Ver C1 | |
1047 | USB_DEVICE (0x2001, 0x1a02), | |
1048 | .driver_info = (unsigned long) &ax88772_info, | |
933a27d3 DH |
1049 | }, { |
1050 | // Linksys USB1000 | |
1051 | USB_DEVICE (0x1737, 0x0039), | |
1052 | .driver_info = (unsigned long) &ax88178_info, | |
b29cf31d YH |
1053 | }, { |
1054 | // IO-DATA ETG-US2 | |
1055 | USB_DEVICE (0x04bb, 0x0930), | |
1056 | .driver_info = (unsigned long) &ax88178_info, | |
2ed22bc2 DH |
1057 | }, { |
1058 | // Belkin F5D5055 | |
1059 | USB_DEVICE(0x050d, 0x5055), | |
1060 | .driver_info = (unsigned long) &ax88178_info, | |
3d60efb5 AN |
1061 | }, { |
1062 | // Apple USB Ethernet Adapter | |
1063 | USB_DEVICE(0x05ac, 0x1402), | |
1064 | .driver_info = (unsigned long) &ax88772_info, | |
ccf95402 JC |
1065 | }, { |
1066 | // Cables-to-Go USB Ethernet Adapter | |
1067 | USB_DEVICE(0x0b95, 0x772a), | |
1068 | .driver_info = (unsigned long) &ax88772_info, | |
fef7cc08 GKH |
1069 | }, { |
1070 | // ABOCOM for pci | |
1071 | USB_DEVICE(0x14ea, 0xab11), | |
1072 | .driver_info = (unsigned long) &ax88178_info, | |
1073 | }, { | |
1074 | // ASIX 88772a | |
1075 | USB_DEVICE(0x0db0, 0xa877), | |
1076 | .driver_info = (unsigned long) &ax88772_info, | |
e8303a3b AJ |
1077 | }, { |
1078 | // Asus USB Ethernet Adapter | |
1079 | USB_DEVICE (0x0b95, 0x7e2b), | |
1080 | .driver_info = (unsigned long) &ax88772_info, | |
16626b0c CR |
1081 | }, { |
1082 | /* ASIX 88172a demo board */ | |
1083 | USB_DEVICE(0x0b95, 0x172a), | |
1084 | .driver_info = (unsigned long) &ax88172a_info, | |
45af3fb4 GT |
1085 | }, { |
1086 | /* | |
1087 | * USBLINK HG20F9 "USB 2.0 LAN" | |
1088 | * Appears to have gazumped Linksys's manufacturer ID but | |
1089 | * doesn't (yet) conflict with any known Linksys product. | |
1090 | */ | |
1091 | USB_DEVICE(0x066b, 0x20f9), | |
1092 | .driver_info = (unsigned long) &hg20f9_info, | |
2e55cc72 DB |
1093 | }, |
1094 | { }, // END | |
1095 | }; | |
1096 | MODULE_DEVICE_TABLE(usb, products); | |
1097 | ||
1098 | static struct usb_driver asix_driver = { | |
83e1b918 | 1099 | .name = DRIVER_NAME, |
2e55cc72 DB |
1100 | .id_table = products, |
1101 | .probe = usbnet_probe, | |
1102 | .suspend = usbnet_suspend, | |
1103 | .resume = usbnet_resume, | |
1104 | .disconnect = usbnet_disconnect, | |
a11a6544 | 1105 | .supports_autosuspend = 1, |
e1f12eb6 | 1106 | .disable_hub_initiated_lpm = 1, |
2e55cc72 DB |
1107 | }; |
1108 | ||
d632eb1b | 1109 | module_usb_driver(asix_driver); |
2e55cc72 DB |
1110 | |
1111 | MODULE_AUTHOR("David Hollis"); | |
4ad1438f | 1112 | MODULE_VERSION(DRIVER_VERSION); |
2e55cc72 DB |
1113 | MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices"); |
1114 | MODULE_LICENSE("GPL"); | |
1115 |