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d0cad871 SG |
1 | /*************************************************************************** |
2 | * | |
3 | * Copyright (C) 2007-2010 SMSC | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
9cb00073 | 16 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
d0cad871 SG |
17 | * |
18 | *****************************************************************************/ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kmod.h> | |
d0cad871 SG |
22 | #include <linux/netdevice.h> |
23 | #include <linux/etherdevice.h> | |
24 | #include <linux/ethtool.h> | |
25 | #include <linux/mii.h> | |
26 | #include <linux/usb.h> | |
899a391b SG |
27 | #include <linux/bitrev.h> |
28 | #include <linux/crc16.h> | |
d0cad871 SG |
29 | #include <linux/crc32.h> |
30 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
d0cad871 SG |
32 | #include "smsc75xx.h" |
33 | ||
34 | #define SMSC_CHIPNAME "smsc75xx" | |
35 | #define SMSC_DRIVER_VERSION "1.0.0" | |
36 | #define HS_USB_PKT_SIZE (512) | |
37 | #define FS_USB_PKT_SIZE (64) | |
38 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
39 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
40 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
41 | #define MAX_SINGLE_PACKET_SIZE (9000) | |
42 | #define LAN75XX_EEPROM_MAGIC (0x7500) | |
43 | #define EEPROM_MAC_OFFSET (0x01) | |
44 | #define DEFAULT_TX_CSUM_ENABLE (true) | |
45 | #define DEFAULT_RX_CSUM_ENABLE (true) | |
d0cad871 SG |
46 | #define SMSC75XX_INTERNAL_PHY_ID (1) |
47 | #define SMSC75XX_TX_OVERHEAD (8) | |
48 | #define MAX_RX_FIFO_SIZE (20 * 1024) | |
49 | #define MAX_TX_FIFO_SIZE (12 * 1024) | |
50 | #define USB_VENDOR_ID_SMSC (0x0424) | |
51 | #define USB_PRODUCT_ID_LAN7500 (0x7500) | |
52 | #define USB_PRODUCT_ID_LAN7505 (0x7505) | |
ea1649de | 53 | #define RXW_PADDING 2 |
f329ccdc | 54 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
899a391b | 55 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
d0cad871 | 56 | |
b4cdea9c SG |
57 | #define SUSPEND_SUSPEND0 (0x01) |
58 | #define SUSPEND_SUSPEND1 (0x02) | |
59 | #define SUSPEND_SUSPEND2 (0x04) | |
60 | #define SUSPEND_SUSPEND3 (0x08) | |
b4cdea9c SG |
61 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ |
62 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
63 | ||
d0cad871 SG |
64 | struct smsc75xx_priv { |
65 | struct usbnet *dev; | |
66 | u32 rfe_ctl; | |
6c636503 | 67 | u32 wolopts; |
d0cad871 | 68 | u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN]; |
d0cad871 SG |
69 | struct mutex dataport_mutex; |
70 | spinlock_t rfe_ctl_lock; | |
71 | struct work_struct set_multicast; | |
b4cdea9c | 72 | u8 suspend_flags; |
d0cad871 SG |
73 | }; |
74 | ||
75 | struct usb_context { | |
76 | struct usb_ctrlrequest req; | |
77 | struct usbnet *dev; | |
78 | }; | |
79 | ||
eb939922 | 80 | static bool turbo_mode = true; |
d0cad871 SG |
81 | module_param(turbo_mode, bool, 0644); |
82 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
83 | ||
47bbea41 ML |
84 | static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index, |
85 | u32 *data, int in_pm) | |
d0cad871 | 86 | { |
2b2e41e3 | 87 | u32 buf; |
d0cad871 | 88 | int ret; |
47bbea41 | 89 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
d0cad871 SG |
90 | |
91 | BUG_ON(!dev); | |
92 | ||
47bbea41 ML |
93 | if (!in_pm) |
94 | fn = usbnet_read_cmd; | |
95 | else | |
96 | fn = usbnet_read_cmd_nopm; | |
97 | ||
98 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
99 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
100 | 0, index, &buf, 4); | |
d0cad871 | 101 | if (unlikely(ret < 0)) |
1e1d7412 JP |
102 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", |
103 | index, ret); | |
d0cad871 | 104 | |
2b2e41e3 ML |
105 | le32_to_cpus(&buf); |
106 | *data = buf; | |
d0cad871 SG |
107 | |
108 | return ret; | |
109 | } | |
110 | ||
47bbea41 ML |
111 | static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index, |
112 | u32 data, int in_pm) | |
d0cad871 | 113 | { |
2b2e41e3 | 114 | u32 buf; |
d0cad871 | 115 | int ret; |
47bbea41 | 116 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
d0cad871 SG |
117 | |
118 | BUG_ON(!dev); | |
119 | ||
47bbea41 ML |
120 | if (!in_pm) |
121 | fn = usbnet_write_cmd; | |
122 | else | |
123 | fn = usbnet_write_cmd_nopm; | |
124 | ||
2b2e41e3 ML |
125 | buf = data; |
126 | cpu_to_le32s(&buf); | |
d0cad871 | 127 | |
47bbea41 ML |
128 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
129 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
130 | 0, index, &buf, 4); | |
d0cad871 | 131 | if (unlikely(ret < 0)) |
1e1d7412 JP |
132 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
133 | index, ret); | |
d0cad871 | 134 | |
d0cad871 SG |
135 | return ret; |
136 | } | |
137 | ||
47bbea41 ML |
138 | static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index, |
139 | u32 *data) | |
140 | { | |
141 | return __smsc75xx_read_reg(dev, index, data, 1); | |
142 | } | |
143 | ||
144 | static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index, | |
145 | u32 data) | |
146 | { | |
147 | return __smsc75xx_write_reg(dev, index, data, 1); | |
148 | } | |
149 | ||
150 | static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index, | |
151 | u32 *data) | |
152 | { | |
153 | return __smsc75xx_read_reg(dev, index, data, 0); | |
154 | } | |
155 | ||
156 | static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index, | |
157 | u32 data) | |
158 | { | |
159 | return __smsc75xx_write_reg(dev, index, data, 0); | |
160 | } | |
161 | ||
d0cad871 SG |
162 | /* Loop until the read is completed with timeout |
163 | * called with phy_mutex held */ | |
f329ccdc SG |
164 | static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev, |
165 | int in_pm) | |
d0cad871 SG |
166 | { |
167 | unsigned long start_time = jiffies; | |
168 | u32 val; | |
169 | int ret; | |
170 | ||
171 | do { | |
f329ccdc | 172 | ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm); |
e3c678e6 SG |
173 | if (ret < 0) { |
174 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); | |
175 | return ret; | |
176 | } | |
d0cad871 SG |
177 | |
178 | if (!(val & MII_ACCESS_BUSY)) | |
179 | return 0; | |
180 | } while (!time_after(jiffies, start_time + HZ)); | |
181 | ||
182 | return -EIO; | |
183 | } | |
184 | ||
f329ccdc SG |
185 | static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx, |
186 | int in_pm) | |
d0cad871 SG |
187 | { |
188 | struct usbnet *dev = netdev_priv(netdev); | |
189 | u32 val, addr; | |
190 | int ret; | |
191 | ||
192 | mutex_lock(&dev->phy_mutex); | |
193 | ||
194 | /* confirm MII not busy */ | |
f329ccdc | 195 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
196 | if (ret < 0) { |
197 | netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n"); | |
198 | goto done; | |
199 | } | |
d0cad871 SG |
200 | |
201 | /* set the address, index & direction (read from PHY) */ | |
202 | phy_id &= dev->mii.phy_id_mask; | |
203 | idx &= dev->mii.reg_num_mask; | |
204 | addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) | |
205 | | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) | |
cb8722d3 | 206 | | MII_ACCESS_READ | MII_ACCESS_BUSY; |
f329ccdc | 207 | ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); |
e3c678e6 SG |
208 | if (ret < 0) { |
209 | netdev_warn(dev->net, "Error writing MII_ACCESS\n"); | |
210 | goto done; | |
211 | } | |
d0cad871 | 212 | |
f329ccdc | 213 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
214 | if (ret < 0) { |
215 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
216 | goto done; | |
217 | } | |
d0cad871 | 218 | |
f329ccdc | 219 | ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm); |
e3c678e6 SG |
220 | if (ret < 0) { |
221 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
222 | goto done; | |
223 | } | |
d0cad871 SG |
224 | |
225 | ret = (u16)(val & 0xFFFF); | |
226 | ||
227 | done: | |
228 | mutex_unlock(&dev->phy_mutex); | |
229 | return ret; | |
230 | } | |
231 | ||
f329ccdc SG |
232 | static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id, |
233 | int idx, int regval, int in_pm) | |
d0cad871 SG |
234 | { |
235 | struct usbnet *dev = netdev_priv(netdev); | |
236 | u32 val, addr; | |
237 | int ret; | |
238 | ||
239 | mutex_lock(&dev->phy_mutex); | |
240 | ||
241 | /* confirm MII not busy */ | |
f329ccdc | 242 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
243 | if (ret < 0) { |
244 | netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n"); | |
245 | goto done; | |
246 | } | |
d0cad871 SG |
247 | |
248 | val = regval; | |
f329ccdc | 249 | ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm); |
e3c678e6 SG |
250 | if (ret < 0) { |
251 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
252 | goto done; | |
253 | } | |
d0cad871 SG |
254 | |
255 | /* set the address, index & direction (write to PHY) */ | |
256 | phy_id &= dev->mii.phy_id_mask; | |
257 | idx &= dev->mii.reg_num_mask; | |
258 | addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) | |
259 | | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) | |
cb8722d3 | 260 | | MII_ACCESS_WRITE | MII_ACCESS_BUSY; |
f329ccdc | 261 | ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); |
e3c678e6 SG |
262 | if (ret < 0) { |
263 | netdev_warn(dev->net, "Error writing MII_ACCESS\n"); | |
264 | goto done; | |
265 | } | |
d0cad871 | 266 | |
f329ccdc | 267 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
268 | if (ret < 0) { |
269 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
270 | goto done; | |
271 | } | |
d0cad871 SG |
272 | |
273 | done: | |
274 | mutex_unlock(&dev->phy_mutex); | |
275 | } | |
276 | ||
f329ccdc SG |
277 | static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id, |
278 | int idx) | |
279 | { | |
280 | return __smsc75xx_mdio_read(netdev, phy_id, idx, 1); | |
281 | } | |
282 | ||
283 | static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id, | |
284 | int idx, int regval) | |
285 | { | |
286 | __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1); | |
287 | } | |
288 | ||
289 | static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
290 | { | |
291 | return __smsc75xx_mdio_read(netdev, phy_id, idx, 0); | |
292 | } | |
293 | ||
294 | static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
295 | int regval) | |
296 | { | |
297 | __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0); | |
298 | } | |
299 | ||
d0cad871 SG |
300 | static int smsc75xx_wait_eeprom(struct usbnet *dev) |
301 | { | |
302 | unsigned long start_time = jiffies; | |
303 | u32 val; | |
304 | int ret; | |
305 | ||
306 | do { | |
307 | ret = smsc75xx_read_reg(dev, E2P_CMD, &val); | |
e3c678e6 SG |
308 | if (ret < 0) { |
309 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
310 | return ret; | |
311 | } | |
d0cad871 SG |
312 | |
313 | if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT)) | |
314 | break; | |
315 | udelay(40); | |
316 | } while (!time_after(jiffies, start_time + HZ)); | |
317 | ||
318 | if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) { | |
1e1d7412 | 319 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
d0cad871 SG |
320 | return -EIO; |
321 | } | |
322 | ||
323 | return 0; | |
324 | } | |
325 | ||
326 | static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev) | |
327 | { | |
328 | unsigned long start_time = jiffies; | |
329 | u32 val; | |
330 | int ret; | |
331 | ||
332 | do { | |
333 | ret = smsc75xx_read_reg(dev, E2P_CMD, &val); | |
e3c678e6 SG |
334 | if (ret < 0) { |
335 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
336 | return ret; | |
337 | } | |
d0cad871 SG |
338 | |
339 | if (!(val & E2P_CMD_BUSY)) | |
340 | return 0; | |
341 | ||
342 | udelay(40); | |
343 | } while (!time_after(jiffies, start_time + HZ)); | |
344 | ||
1e1d7412 | 345 | netdev_warn(dev->net, "EEPROM is busy\n"); |
d0cad871 SG |
346 | return -EIO; |
347 | } | |
348 | ||
349 | static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
350 | u8 *data) | |
351 | { | |
352 | u32 val; | |
353 | int i, ret; | |
354 | ||
355 | BUG_ON(!dev); | |
356 | BUG_ON(!data); | |
357 | ||
358 | ret = smsc75xx_eeprom_confirm_not_busy(dev); | |
359 | if (ret) | |
360 | return ret; | |
361 | ||
362 | for (i = 0; i < length; i++) { | |
363 | val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR); | |
364 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
e3c678e6 SG |
365 | if (ret < 0) { |
366 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
367 | return ret; | |
368 | } | |
d0cad871 SG |
369 | |
370 | ret = smsc75xx_wait_eeprom(dev); | |
371 | if (ret < 0) | |
372 | return ret; | |
373 | ||
374 | ret = smsc75xx_read_reg(dev, E2P_DATA, &val); | |
e3c678e6 SG |
375 | if (ret < 0) { |
376 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
377 | return ret; | |
378 | } | |
d0cad871 SG |
379 | |
380 | data[i] = val & 0xFF; | |
381 | offset++; | |
382 | } | |
383 | ||
384 | return 0; | |
385 | } | |
386 | ||
387 | static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
388 | u8 *data) | |
389 | { | |
390 | u32 val; | |
391 | int i, ret; | |
392 | ||
393 | BUG_ON(!dev); | |
394 | BUG_ON(!data); | |
395 | ||
396 | ret = smsc75xx_eeprom_confirm_not_busy(dev); | |
397 | if (ret) | |
398 | return ret; | |
399 | ||
400 | /* Issue write/erase enable command */ | |
401 | val = E2P_CMD_BUSY | E2P_CMD_EWEN; | |
402 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
e3c678e6 SG |
403 | if (ret < 0) { |
404 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
405 | return ret; | |
406 | } | |
d0cad871 SG |
407 | |
408 | ret = smsc75xx_wait_eeprom(dev); | |
409 | if (ret < 0) | |
410 | return ret; | |
411 | ||
412 | for (i = 0; i < length; i++) { | |
413 | ||
414 | /* Fill data register */ | |
415 | val = data[i]; | |
416 | ret = smsc75xx_write_reg(dev, E2P_DATA, val); | |
e3c678e6 SG |
417 | if (ret < 0) { |
418 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
419 | return ret; | |
420 | } | |
d0cad871 SG |
421 | |
422 | /* Send "write" command */ | |
423 | val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR); | |
424 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
e3c678e6 SG |
425 | if (ret < 0) { |
426 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
427 | return ret; | |
428 | } | |
d0cad871 SG |
429 | |
430 | ret = smsc75xx_wait_eeprom(dev); | |
431 | if (ret < 0) | |
432 | return ret; | |
433 | ||
434 | offset++; | |
435 | } | |
436 | ||
437 | return 0; | |
438 | } | |
439 | ||
440 | static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev) | |
441 | { | |
442 | int i, ret; | |
443 | ||
444 | for (i = 0; i < 100; i++) { | |
445 | u32 dp_sel; | |
446 | ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); | |
e3c678e6 SG |
447 | if (ret < 0) { |
448 | netdev_warn(dev->net, "Error reading DP_SEL\n"); | |
449 | return ret; | |
450 | } | |
d0cad871 SG |
451 | |
452 | if (dp_sel & DP_SEL_DPRDY) | |
453 | return 0; | |
454 | ||
455 | udelay(40); | |
456 | } | |
457 | ||
1e1d7412 | 458 | netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n"); |
d0cad871 SG |
459 | |
460 | return -EIO; | |
461 | } | |
462 | ||
463 | static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr, | |
464 | u32 length, u32 *buf) | |
465 | { | |
466 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
467 | u32 dp_sel; | |
468 | int i, ret; | |
469 | ||
470 | mutex_lock(&pdata->dataport_mutex); | |
471 | ||
472 | ret = smsc75xx_dataport_wait_not_busy(dev); | |
e3c678e6 SG |
473 | if (ret < 0) { |
474 | netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n"); | |
475 | goto done; | |
476 | } | |
d0cad871 SG |
477 | |
478 | ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); | |
e3c678e6 SG |
479 | if (ret < 0) { |
480 | netdev_warn(dev->net, "Error reading DP_SEL\n"); | |
481 | goto done; | |
482 | } | |
d0cad871 SG |
483 | |
484 | dp_sel &= ~DP_SEL_RSEL; | |
485 | dp_sel |= ram_select; | |
486 | ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); | |
e3c678e6 SG |
487 | if (ret < 0) { |
488 | netdev_warn(dev->net, "Error writing DP_SEL\n"); | |
489 | goto done; | |
490 | } | |
d0cad871 SG |
491 | |
492 | for (i = 0; i < length; i++) { | |
493 | ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); | |
e3c678e6 SG |
494 | if (ret < 0) { |
495 | netdev_warn(dev->net, "Error writing DP_ADDR\n"); | |
496 | goto done; | |
497 | } | |
d0cad871 SG |
498 | |
499 | ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); | |
e3c678e6 SG |
500 | if (ret < 0) { |
501 | netdev_warn(dev->net, "Error writing DP_DATA\n"); | |
502 | goto done; | |
503 | } | |
d0cad871 SG |
504 | |
505 | ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); | |
e3c678e6 SG |
506 | if (ret < 0) { |
507 | netdev_warn(dev->net, "Error writing DP_CMD\n"); | |
508 | goto done; | |
509 | } | |
d0cad871 SG |
510 | |
511 | ret = smsc75xx_dataport_wait_not_busy(dev); | |
e3c678e6 SG |
512 | if (ret < 0) { |
513 | netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n"); | |
514 | goto done; | |
515 | } | |
d0cad871 SG |
516 | } |
517 | ||
518 | done: | |
519 | mutex_unlock(&pdata->dataport_mutex); | |
520 | return ret; | |
521 | } | |
522 | ||
523 | /* returns hash bit number for given MAC address */ | |
524 | static u32 smsc75xx_hash(char addr[ETH_ALEN]) | |
525 | { | |
526 | return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; | |
527 | } | |
528 | ||
529 | static void smsc75xx_deferred_multicast_write(struct work_struct *param) | |
530 | { | |
531 | struct smsc75xx_priv *pdata = | |
532 | container_of(param, struct smsc75xx_priv, set_multicast); | |
533 | struct usbnet *dev = pdata->dev; | |
534 | int ret; | |
535 | ||
1e1d7412 JP |
536 | netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", |
537 | pdata->rfe_ctl); | |
d0cad871 SG |
538 | |
539 | smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, | |
540 | DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table); | |
541 | ||
542 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
e3c678e6 SG |
543 | if (ret < 0) |
544 | netdev_warn(dev->net, "Error writing RFE_CRL\n"); | |
d0cad871 SG |
545 | } |
546 | ||
547 | static void smsc75xx_set_multicast(struct net_device *netdev) | |
548 | { | |
549 | struct usbnet *dev = netdev_priv(netdev); | |
550 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
551 | unsigned long flags; | |
552 | int i; | |
553 | ||
554 | spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); | |
555 | ||
556 | pdata->rfe_ctl &= | |
557 | ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF); | |
558 | pdata->rfe_ctl |= RFE_CTL_AB; | |
559 | ||
560 | for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) | |
561 | pdata->multicast_hash_table[i] = 0; | |
562 | ||
563 | if (dev->net->flags & IFF_PROMISC) { | |
1e1d7412 | 564 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
d0cad871 SG |
565 | pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU; |
566 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
1e1d7412 | 567 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
d0cad871 SG |
568 | pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF; |
569 | } else if (!netdev_mc_empty(dev->net)) { | |
22bedad3 | 570 | struct netdev_hw_addr *ha; |
d0cad871 | 571 | |
1e1d7412 | 572 | netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n"); |
d0cad871 SG |
573 | |
574 | pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF; | |
575 | ||
22bedad3 JP |
576 | netdev_for_each_mc_addr(ha, netdev) { |
577 | u32 bitnum = smsc75xx_hash(ha->addr); | |
d0cad871 SG |
578 | pdata->multicast_hash_table[bitnum / 32] |= |
579 | (1 << (bitnum % 32)); | |
580 | } | |
581 | } else { | |
1e1d7412 | 582 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
d0cad871 SG |
583 | pdata->rfe_ctl |= RFE_CTL_DPF; |
584 | } | |
585 | ||
586 | spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); | |
587 | ||
588 | /* defer register writes to a sleepable context */ | |
589 | schedule_work(&pdata->set_multicast); | |
590 | } | |
591 | ||
592 | static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex, | |
593 | u16 lcladv, u16 rmtadv) | |
594 | { | |
595 | u32 flow = 0, fct_flow = 0; | |
596 | int ret; | |
597 | ||
598 | if (duplex == DUPLEX_FULL) { | |
599 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); | |
600 | ||
601 | if (cap & FLOW_CTRL_TX) { | |
602 | flow = (FLOW_TX_FCEN | 0xFFFF); | |
603 | /* set fct_flow thresholds to 20% and 80% */ | |
604 | fct_flow = (8 << 8) | 32; | |
605 | } | |
606 | ||
607 | if (cap & FLOW_CTRL_RX) | |
608 | flow |= FLOW_RX_FCEN; | |
609 | ||
1e1d7412 JP |
610 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
611 | (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), | |
612 | (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); | |
d0cad871 | 613 | } else { |
1e1d7412 | 614 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
d0cad871 SG |
615 | } |
616 | ||
617 | ret = smsc75xx_write_reg(dev, FLOW, flow); | |
e3c678e6 SG |
618 | if (ret < 0) { |
619 | netdev_warn(dev->net, "Error writing FLOW\n"); | |
620 | return ret; | |
621 | } | |
d0cad871 SG |
622 | |
623 | ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); | |
e3c678e6 SG |
624 | if (ret < 0) { |
625 | netdev_warn(dev->net, "Error writing FCT_FLOW\n"); | |
626 | return ret; | |
627 | } | |
d0cad871 SG |
628 | |
629 | return 0; | |
630 | } | |
631 | ||
632 | static int smsc75xx_link_reset(struct usbnet *dev) | |
633 | { | |
634 | struct mii_if_info *mii = &dev->mii; | |
8ae6daca | 635 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
d0cad871 SG |
636 | u16 lcladv, rmtadv; |
637 | int ret; | |
638 | ||
4f94a929 | 639 | /* write to clear phy interrupt status */ |
7749622d SG |
640 | smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC, |
641 | PHY_INT_SRC_CLEAR_ALL); | |
d0cad871 SG |
642 | |
643 | ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); | |
e3c678e6 SG |
644 | if (ret < 0) { |
645 | netdev_warn(dev->net, "Error writing INT_STS\n"); | |
646 | return ret; | |
647 | } | |
d0cad871 SG |
648 | |
649 | mii_check_media(mii, 1, 1); | |
650 | mii_ethtool_gset(&dev->mii, &ecmd); | |
651 | lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
652 | rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
653 | ||
1e1d7412 JP |
654 | netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", |
655 | ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); | |
d0cad871 SG |
656 | |
657 | return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); | |
658 | } | |
659 | ||
660 | static void smsc75xx_status(struct usbnet *dev, struct urb *urb) | |
661 | { | |
662 | u32 intdata; | |
663 | ||
664 | if (urb->actual_length != 4) { | |
1e1d7412 JP |
665 | netdev_warn(dev->net, "unexpected urb length %d\n", |
666 | urb->actual_length); | |
d0cad871 SG |
667 | return; |
668 | } | |
669 | ||
670 | memcpy(&intdata, urb->transfer_buffer, 4); | |
671 | le32_to_cpus(&intdata); | |
672 | ||
1e1d7412 | 673 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
d0cad871 SG |
674 | |
675 | if (intdata & INT_ENP_PHY_INT) | |
676 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
677 | else | |
1e1d7412 JP |
678 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
679 | intdata); | |
d0cad871 SG |
680 | } |
681 | ||
d0cad871 SG |
682 | static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net) |
683 | { | |
684 | return MAX_EEPROM_SIZE; | |
685 | } | |
686 | ||
687 | static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev, | |
688 | struct ethtool_eeprom *ee, u8 *data) | |
689 | { | |
690 | struct usbnet *dev = netdev_priv(netdev); | |
691 | ||
692 | ee->magic = LAN75XX_EEPROM_MAGIC; | |
693 | ||
694 | return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); | |
695 | } | |
696 | ||
697 | static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev, | |
698 | struct ethtool_eeprom *ee, u8 *data) | |
699 | { | |
700 | struct usbnet *dev = netdev_priv(netdev); | |
701 | ||
702 | if (ee->magic != LAN75XX_EEPROM_MAGIC) { | |
1e1d7412 JP |
703 | netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n", |
704 | ee->magic); | |
d0cad871 SG |
705 | return -EINVAL; |
706 | } | |
707 | ||
708 | return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); | |
709 | } | |
710 | ||
6c636503 SG |
711 | static void smsc75xx_ethtool_get_wol(struct net_device *net, |
712 | struct ethtool_wolinfo *wolinfo) | |
713 | { | |
714 | struct usbnet *dev = netdev_priv(net); | |
715 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
716 | ||
717 | wolinfo->supported = SUPPORTED_WAKE; | |
718 | wolinfo->wolopts = pdata->wolopts; | |
719 | } | |
720 | ||
721 | static int smsc75xx_ethtool_set_wol(struct net_device *net, | |
722 | struct ethtool_wolinfo *wolinfo) | |
723 | { | |
724 | struct usbnet *dev = netdev_priv(net); | |
725 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
351f33d9 | 726 | int ret; |
6c636503 SG |
727 | |
728 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; | |
351f33d9 SG |
729 | |
730 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
e3c678e6 SG |
731 | if (ret < 0) |
732 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
351f33d9 | 733 | |
e3c678e6 | 734 | return ret; |
6c636503 SG |
735 | } |
736 | ||
d0cad871 SG |
737 | static const struct ethtool_ops smsc75xx_ethtool_ops = { |
738 | .get_link = usbnet_get_link, | |
739 | .nway_reset = usbnet_nway_reset, | |
740 | .get_drvinfo = usbnet_get_drvinfo, | |
741 | .get_msglevel = usbnet_get_msglevel, | |
742 | .set_msglevel = usbnet_set_msglevel, | |
743 | .get_settings = usbnet_get_settings, | |
744 | .set_settings = usbnet_set_settings, | |
745 | .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len, | |
746 | .get_eeprom = smsc75xx_ethtool_get_eeprom, | |
747 | .set_eeprom = smsc75xx_ethtool_set_eeprom, | |
6c636503 SG |
748 | .get_wol = smsc75xx_ethtool_get_wol, |
749 | .set_wol = smsc75xx_ethtool_set_wol, | |
d0cad871 SG |
750 | }; |
751 | ||
752 | static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
753 | { | |
754 | struct usbnet *dev = netdev_priv(netdev); | |
755 | ||
756 | if (!netif_running(netdev)) | |
757 | return -EINVAL; | |
758 | ||
759 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
760 | } | |
761 | ||
762 | static void smsc75xx_init_mac_address(struct usbnet *dev) | |
763 | { | |
764 | /* try reading mac address from EEPROM */ | |
765 | if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
766 | dev->net->dev_addr) == 0) { | |
767 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
768 | /* eeprom values are valid so use them */ | |
769 | netif_dbg(dev, ifup, dev->net, | |
1e1d7412 | 770 | "MAC address read from EEPROM\n"); |
d0cad871 SG |
771 | return; |
772 | } | |
773 | } | |
774 | ||
775 | /* no eeprom, or eeprom values are invalid. generate random MAC */ | |
f2cedb63 | 776 | eth_hw_addr_random(dev->net); |
1e1d7412 | 777 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
d0cad871 SG |
778 | } |
779 | ||
780 | static int smsc75xx_set_mac_address(struct usbnet *dev) | |
781 | { | |
782 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
783 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
784 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
785 | ||
786 | int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); | |
e3c678e6 SG |
787 | if (ret < 0) { |
788 | netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret); | |
789 | return ret; | |
790 | } | |
d0cad871 SG |
791 | |
792 | ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); | |
e3c678e6 SG |
793 | if (ret < 0) { |
794 | netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret); | |
795 | return ret; | |
796 | } | |
d0cad871 SG |
797 | |
798 | addr_hi |= ADDR_FILTX_FB_VALID; | |
799 | ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); | |
e3c678e6 SG |
800 | if (ret < 0) { |
801 | netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret); | |
802 | return ret; | |
803 | } | |
d0cad871 SG |
804 | |
805 | ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); | |
e3c678e6 SG |
806 | if (ret < 0) |
807 | netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret); | |
d0cad871 | 808 | |
e3c678e6 | 809 | return ret; |
d0cad871 SG |
810 | } |
811 | ||
812 | static int smsc75xx_phy_initialize(struct usbnet *dev) | |
813 | { | |
b140504a | 814 | int bmcr, ret, timeout = 0; |
d0cad871 SG |
815 | |
816 | /* Initialize MII structure */ | |
817 | dev->mii.dev = dev->net; | |
818 | dev->mii.mdio_read = smsc75xx_mdio_read; | |
819 | dev->mii.mdio_write = smsc75xx_mdio_write; | |
820 | dev->mii.phy_id_mask = 0x1f; | |
821 | dev->mii.reg_num_mask = 0x1f; | |
c0b92e4d | 822 | dev->mii.supports_gmii = 1; |
d0cad871 SG |
823 | dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; |
824 | ||
825 | /* reset phy and wait for reset to complete */ | |
826 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); | |
827 | ||
828 | do { | |
829 | msleep(10); | |
830 | bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
e3c678e6 SG |
831 | if (bmcr < 0) { |
832 | netdev_warn(dev->net, "Error reading MII_BMCR\n"); | |
833 | return bmcr; | |
834 | } | |
d0cad871 | 835 | timeout++; |
8a1d59d7 | 836 | } while ((bmcr & BMCR_RESET) && (timeout < 100)); |
d0cad871 SG |
837 | |
838 | if (timeout >= 100) { | |
1e1d7412 | 839 | netdev_warn(dev->net, "timeout on PHY Reset\n"); |
d0cad871 SG |
840 | return -EIO; |
841 | } | |
842 | ||
843 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, | |
844 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
845 | ADVERTISE_PAUSE_ASYM); | |
c0b92e4d SG |
846 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, |
847 | ADVERTISE_1000FULL); | |
d0cad871 | 848 | |
b140504a SG |
849 | /* read and write to clear phy interrupt status */ |
850 | ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); | |
e3c678e6 SG |
851 | if (ret < 0) { |
852 | netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); | |
853 | return ret; | |
854 | } | |
855 | ||
b140504a | 856 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff); |
d0cad871 SG |
857 | |
858 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
859 | PHY_INT_MASK_DEFAULT); | |
860 | mii_nway_restart(&dev->mii); | |
861 | ||
1e1d7412 | 862 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); |
d0cad871 SG |
863 | return 0; |
864 | } | |
865 | ||
866 | static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size) | |
867 | { | |
868 | int ret = 0; | |
869 | u32 buf; | |
870 | bool rxenabled; | |
871 | ||
872 | ret = smsc75xx_read_reg(dev, MAC_RX, &buf); | |
e3c678e6 SG |
873 | if (ret < 0) { |
874 | netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); | |
875 | return ret; | |
876 | } | |
d0cad871 SG |
877 | |
878 | rxenabled = ((buf & MAC_RX_RXEN) != 0); | |
879 | ||
880 | if (rxenabled) { | |
881 | buf &= ~MAC_RX_RXEN; | |
882 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
883 | if (ret < 0) { |
884 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
885 | return ret; | |
886 | } | |
d0cad871 SG |
887 | } |
888 | ||
889 | /* add 4 to size for FCS */ | |
890 | buf &= ~MAC_RX_MAX_SIZE; | |
891 | buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE); | |
892 | ||
893 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
894 | if (ret < 0) { |
895 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
896 | return ret; | |
897 | } | |
d0cad871 SG |
898 | |
899 | if (rxenabled) { | |
900 | buf |= MAC_RX_RXEN; | |
901 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
902 | if (ret < 0) { |
903 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
904 | return ret; | |
905 | } | |
d0cad871 SG |
906 | } |
907 | ||
908 | return 0; | |
909 | } | |
910 | ||
911 | static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu) | |
912 | { | |
913 | struct usbnet *dev = netdev_priv(netdev); | |
4c51e536 SG |
914 | int ret; |
915 | ||
916 | if (new_mtu > MAX_SINGLE_PACKET_SIZE) | |
917 | return -EINVAL; | |
d0cad871 | 918 | |
4c51e536 | 919 | ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN); |
e3c678e6 SG |
920 | if (ret < 0) { |
921 | netdev_warn(dev->net, "Failed to set mac rx frame length\n"); | |
922 | return ret; | |
923 | } | |
d0cad871 SG |
924 | |
925 | return usbnet_change_mtu(netdev, new_mtu); | |
926 | } | |
927 | ||
78e47fe4 | 928 | /* Enable or disable Rx checksum offload engine */ |
c8f44aff MM |
929 | static int smsc75xx_set_features(struct net_device *netdev, |
930 | netdev_features_t features) | |
78e47fe4 MM |
931 | { |
932 | struct usbnet *dev = netdev_priv(netdev); | |
933 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
934 | unsigned long flags; | |
935 | int ret; | |
936 | ||
937 | spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); | |
938 | ||
939 | if (features & NETIF_F_RXCSUM) | |
940 | pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM; | |
941 | else | |
942 | pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM); | |
943 | ||
944 | spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); | |
945 | /* it's racing here! */ | |
946 | ||
947 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
e3c678e6 SG |
948 | if (ret < 0) |
949 | netdev_warn(dev->net, "Error writing RFE_CTL\n"); | |
78e47fe4 | 950 | |
e3c678e6 | 951 | return ret; |
78e47fe4 MM |
952 | } |
953 | ||
47bbea41 | 954 | static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm) |
8762cec8 SG |
955 | { |
956 | int timeout = 0; | |
957 | ||
958 | do { | |
959 | u32 buf; | |
47bbea41 ML |
960 | int ret; |
961 | ||
962 | ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm); | |
963 | ||
e3c678e6 SG |
964 | if (ret < 0) { |
965 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); | |
966 | return ret; | |
967 | } | |
8762cec8 SG |
968 | |
969 | if (buf & PMT_CTL_DEV_RDY) | |
970 | return 0; | |
971 | ||
972 | msleep(10); | |
973 | timeout++; | |
974 | } while (timeout < 100); | |
975 | ||
1e1d7412 | 976 | netdev_warn(dev->net, "timeout waiting for device ready\n"); |
8762cec8 SG |
977 | return -EIO; |
978 | } | |
979 | ||
d0cad871 SG |
980 | static int smsc75xx_reset(struct usbnet *dev) |
981 | { | |
982 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
983 | u32 buf; | |
984 | int ret = 0, timeout; | |
985 | ||
1e1d7412 | 986 | netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n"); |
d0cad871 | 987 | |
47bbea41 | 988 | ret = smsc75xx_wait_ready(dev, 0); |
e3c678e6 SG |
989 | if (ret < 0) { |
990 | netdev_warn(dev->net, "device not ready in smsc75xx_reset\n"); | |
991 | return ret; | |
992 | } | |
8762cec8 | 993 | |
d0cad871 | 994 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); |
e3c678e6 SG |
995 | if (ret < 0) { |
996 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
997 | return ret; | |
998 | } | |
d0cad871 SG |
999 | |
1000 | buf |= HW_CFG_LRST; | |
1001 | ||
1002 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
e3c678e6 SG |
1003 | if (ret < 0) { |
1004 | netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); | |
1005 | return ret; | |
1006 | } | |
d0cad871 SG |
1007 | |
1008 | timeout = 0; | |
1009 | do { | |
1010 | msleep(10); | |
1011 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1012 | if (ret < 0) { |
1013 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1014 | return ret; | |
1015 | } | |
d0cad871 SG |
1016 | timeout++; |
1017 | } while ((buf & HW_CFG_LRST) && (timeout < 100)); | |
1018 | ||
1019 | if (timeout >= 100) { | |
1e1d7412 | 1020 | netdev_warn(dev->net, "timeout on completion of Lite Reset\n"); |
d0cad871 SG |
1021 | return -EIO; |
1022 | } | |
1023 | ||
1e1d7412 | 1024 | netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n"); |
d0cad871 SG |
1025 | |
1026 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
e3c678e6 SG |
1027 | if (ret < 0) { |
1028 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); | |
1029 | return ret; | |
1030 | } | |
d0cad871 SG |
1031 | |
1032 | buf |= PMT_CTL_PHY_RST; | |
1033 | ||
1034 | ret = smsc75xx_write_reg(dev, PMT_CTL, buf); | |
e3c678e6 SG |
1035 | if (ret < 0) { |
1036 | netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret); | |
1037 | return ret; | |
1038 | } | |
d0cad871 SG |
1039 | |
1040 | timeout = 0; | |
1041 | do { | |
1042 | msleep(10); | |
1043 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
e3c678e6 SG |
1044 | if (ret < 0) { |
1045 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); | |
1046 | return ret; | |
1047 | } | |
d0cad871 SG |
1048 | timeout++; |
1049 | } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); | |
1050 | ||
1051 | if (timeout >= 100) { | |
1e1d7412 | 1052 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); |
d0cad871 SG |
1053 | return -EIO; |
1054 | } | |
1055 | ||
1e1d7412 | 1056 | netif_dbg(dev, ifup, dev->net, "PHY reset complete\n"); |
d0cad871 | 1057 | |
d0cad871 | 1058 | ret = smsc75xx_set_mac_address(dev); |
e3c678e6 SG |
1059 | if (ret < 0) { |
1060 | netdev_warn(dev->net, "Failed to set mac address\n"); | |
1061 | return ret; | |
1062 | } | |
d0cad871 | 1063 | |
1e1d7412 JP |
1064 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
1065 | dev->net->dev_addr); | |
d0cad871 SG |
1066 | |
1067 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1068 | if (ret < 0) { |
1069 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1070 | return ret; | |
1071 | } | |
d0cad871 | 1072 | |
1e1d7412 JP |
1073 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
1074 | buf); | |
d0cad871 SG |
1075 | |
1076 | buf |= HW_CFG_BIR; | |
1077 | ||
1078 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
e3c678e6 SG |
1079 | if (ret < 0) { |
1080 | netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); | |
1081 | return ret; | |
1082 | } | |
d0cad871 SG |
1083 | |
1084 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1085 | if (ret < 0) { |
1086 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1087 | return ret; | |
1088 | } | |
d0cad871 | 1089 | |
1e1d7412 JP |
1090 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n", |
1091 | buf); | |
d0cad871 SG |
1092 | |
1093 | if (!turbo_mode) { | |
1094 | buf = 0; | |
1095 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
1096 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
1097 | buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
1098 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
1099 | } else { | |
1100 | buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
1101 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
1102 | } | |
1103 | ||
1e1d7412 JP |
1104 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
1105 | (ulong)dev->rx_urb_size); | |
d0cad871 SG |
1106 | |
1107 | ret = smsc75xx_write_reg(dev, BURST_CAP, buf); | |
e3c678e6 SG |
1108 | if (ret < 0) { |
1109 | netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); | |
1110 | return ret; | |
1111 | } | |
d0cad871 SG |
1112 | |
1113 | ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); | |
e3c678e6 SG |
1114 | if (ret < 0) { |
1115 | netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); | |
1116 | return ret; | |
1117 | } | |
d0cad871 SG |
1118 | |
1119 | netif_dbg(dev, ifup, dev->net, | |
1e1d7412 | 1120 | "Read Value from BURST_CAP after writing: 0x%08x\n", buf); |
d0cad871 SG |
1121 | |
1122 | ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); | |
e3c678e6 SG |
1123 | if (ret < 0) { |
1124 | netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret); | |
1125 | return ret; | |
1126 | } | |
d0cad871 SG |
1127 | |
1128 | ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); | |
e3c678e6 SG |
1129 | if (ret < 0) { |
1130 | netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); | |
1131 | return ret; | |
1132 | } | |
d0cad871 SG |
1133 | |
1134 | netif_dbg(dev, ifup, dev->net, | |
1e1d7412 | 1135 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf); |
d0cad871 SG |
1136 | |
1137 | if (turbo_mode) { | |
1138 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1139 | if (ret < 0) { |
1140 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1141 | return ret; | |
1142 | } | |
d0cad871 | 1143 | |
1e1d7412 | 1144 | netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); |
d0cad871 SG |
1145 | |
1146 | buf |= (HW_CFG_MEF | HW_CFG_BCE); | |
1147 | ||
1148 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
e3c678e6 SG |
1149 | if (ret < 0) { |
1150 | netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); | |
1151 | return ret; | |
1152 | } | |
d0cad871 SG |
1153 | |
1154 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1155 | if (ret < 0) { |
1156 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1157 | return ret; | |
1158 | } | |
d0cad871 | 1159 | |
1e1d7412 | 1160 | netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); |
d0cad871 SG |
1161 | } |
1162 | ||
1163 | /* set FIFO sizes */ | |
1164 | buf = (MAX_RX_FIFO_SIZE - 512) / 512; | |
1165 | ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); | |
e3c678e6 SG |
1166 | if (ret < 0) { |
1167 | netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret); | |
1168 | return ret; | |
1169 | } | |
d0cad871 | 1170 | |
1e1d7412 | 1171 | netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf); |
d0cad871 SG |
1172 | |
1173 | buf = (MAX_TX_FIFO_SIZE - 512) / 512; | |
1174 | ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); | |
e3c678e6 SG |
1175 | if (ret < 0) { |
1176 | netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret); | |
1177 | return ret; | |
1178 | } | |
d0cad871 | 1179 | |
1e1d7412 | 1180 | netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf); |
d0cad871 SG |
1181 | |
1182 | ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); | |
e3c678e6 SG |
1183 | if (ret < 0) { |
1184 | netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret); | |
1185 | return ret; | |
1186 | } | |
d0cad871 SG |
1187 | |
1188 | ret = smsc75xx_read_reg(dev, ID_REV, &buf); | |
e3c678e6 SG |
1189 | if (ret < 0) { |
1190 | netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); | |
1191 | return ret; | |
1192 | } | |
d0cad871 | 1193 | |
1e1d7412 | 1194 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf); |
d0cad871 | 1195 | |
97138a1c | 1196 | ret = smsc75xx_read_reg(dev, E2P_CMD, &buf); |
e3c678e6 SG |
1197 | if (ret < 0) { |
1198 | netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret); | |
1199 | return ret; | |
1200 | } | |
d0cad871 | 1201 | |
97138a1c SG |
1202 | /* only set default GPIO/LED settings if no EEPROM is detected */ |
1203 | if (!(buf & E2P_CMD_LOADED)) { | |
1204 | ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); | |
e3c678e6 SG |
1205 | if (ret < 0) { |
1206 | netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret); | |
1207 | return ret; | |
1208 | } | |
d0cad871 | 1209 | |
97138a1c SG |
1210 | buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL); |
1211 | buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL; | |
1212 | ||
1213 | ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); | |
e3c678e6 SG |
1214 | if (ret < 0) { |
1215 | netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret); | |
1216 | return ret; | |
1217 | } | |
97138a1c | 1218 | } |
d0cad871 SG |
1219 | |
1220 | ret = smsc75xx_write_reg(dev, FLOW, 0); | |
e3c678e6 SG |
1221 | if (ret < 0) { |
1222 | netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); | |
1223 | return ret; | |
1224 | } | |
d0cad871 SG |
1225 | |
1226 | ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); | |
e3c678e6 SG |
1227 | if (ret < 0) { |
1228 | netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret); | |
1229 | return ret; | |
1230 | } | |
d0cad871 SG |
1231 | |
1232 | /* Don't need rfe_ctl_lock during initialisation */ | |
1233 | ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); | |
e3c678e6 SG |
1234 | if (ret < 0) { |
1235 | netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); | |
1236 | return ret; | |
1237 | } | |
d0cad871 SG |
1238 | |
1239 | pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF; | |
1240 | ||
1241 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
e3c678e6 SG |
1242 | if (ret < 0) { |
1243 | netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret); | |
1244 | return ret; | |
1245 | } | |
d0cad871 SG |
1246 | |
1247 | ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); | |
e3c678e6 SG |
1248 | if (ret < 0) { |
1249 | netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); | |
1250 | return ret; | |
1251 | } | |
d0cad871 | 1252 | |
1e1d7412 JP |
1253 | netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n", |
1254 | pdata->rfe_ctl); | |
d0cad871 SG |
1255 | |
1256 | /* Enable or disable checksum offload engines */ | |
78e47fe4 | 1257 | smsc75xx_set_features(dev->net, dev->net->features); |
d0cad871 SG |
1258 | |
1259 | smsc75xx_set_multicast(dev->net); | |
1260 | ||
1261 | ret = smsc75xx_phy_initialize(dev); | |
e3c678e6 SG |
1262 | if (ret < 0) { |
1263 | netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret); | |
1264 | return ret; | |
1265 | } | |
d0cad871 SG |
1266 | |
1267 | ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); | |
e3c678e6 SG |
1268 | if (ret < 0) { |
1269 | netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); | |
1270 | return ret; | |
1271 | } | |
d0cad871 SG |
1272 | |
1273 | /* enable PHY interrupts */ | |
1274 | buf |= INT_ENP_PHY_INT; | |
1275 | ||
1276 | ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); | |
e3c678e6 SG |
1277 | if (ret < 0) { |
1278 | netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); | |
1279 | return ret; | |
1280 | } | |
d0cad871 | 1281 | |
2f3a081e SG |
1282 | /* allow mac to detect speed and duplex from phy */ |
1283 | ret = smsc75xx_read_reg(dev, MAC_CR, &buf); | |
e3c678e6 SG |
1284 | if (ret < 0) { |
1285 | netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); | |
1286 | return ret; | |
1287 | } | |
2f3a081e SG |
1288 | |
1289 | buf |= (MAC_CR_ADD | MAC_CR_ASD); | |
1290 | ret = smsc75xx_write_reg(dev, MAC_CR, buf); | |
e3c678e6 SG |
1291 | if (ret < 0) { |
1292 | netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret); | |
1293 | return ret; | |
1294 | } | |
2f3a081e | 1295 | |
d0cad871 | 1296 | ret = smsc75xx_read_reg(dev, MAC_TX, &buf); |
e3c678e6 SG |
1297 | if (ret < 0) { |
1298 | netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret); | |
1299 | return ret; | |
1300 | } | |
d0cad871 SG |
1301 | |
1302 | buf |= MAC_TX_TXEN; | |
1303 | ||
1304 | ret = smsc75xx_write_reg(dev, MAC_TX, buf); | |
e3c678e6 SG |
1305 | if (ret < 0) { |
1306 | netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret); | |
1307 | return ret; | |
1308 | } | |
d0cad871 | 1309 | |
1e1d7412 | 1310 | netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf); |
d0cad871 SG |
1311 | |
1312 | ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); | |
e3c678e6 SG |
1313 | if (ret < 0) { |
1314 | netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret); | |
1315 | return ret; | |
1316 | } | |
d0cad871 SG |
1317 | |
1318 | buf |= FCT_TX_CTL_EN; | |
1319 | ||
1320 | ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); | |
e3c678e6 SG |
1321 | if (ret < 0) { |
1322 | netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret); | |
1323 | return ret; | |
1324 | } | |
d0cad871 | 1325 | |
1e1d7412 | 1326 | netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf); |
d0cad871 | 1327 | |
4c51e536 | 1328 | ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN); |
e3c678e6 SG |
1329 | if (ret < 0) { |
1330 | netdev_warn(dev->net, "Failed to set max rx frame length\n"); | |
1331 | return ret; | |
1332 | } | |
d0cad871 SG |
1333 | |
1334 | ret = smsc75xx_read_reg(dev, MAC_RX, &buf); | |
e3c678e6 SG |
1335 | if (ret < 0) { |
1336 | netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); | |
1337 | return ret; | |
1338 | } | |
d0cad871 SG |
1339 | |
1340 | buf |= MAC_RX_RXEN; | |
1341 | ||
1342 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
1343 | if (ret < 0) { |
1344 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
1345 | return ret; | |
1346 | } | |
d0cad871 | 1347 | |
1e1d7412 | 1348 | netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf); |
d0cad871 SG |
1349 | |
1350 | ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); | |
e3c678e6 SG |
1351 | if (ret < 0) { |
1352 | netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret); | |
1353 | return ret; | |
1354 | } | |
d0cad871 SG |
1355 | |
1356 | buf |= FCT_RX_CTL_EN; | |
1357 | ||
1358 | ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); | |
e3c678e6 SG |
1359 | if (ret < 0) { |
1360 | netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret); | |
1361 | return ret; | |
1362 | } | |
d0cad871 | 1363 | |
1e1d7412 | 1364 | netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf); |
d0cad871 | 1365 | |
1e1d7412 | 1366 | netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n"); |
d0cad871 SG |
1367 | return 0; |
1368 | } | |
1369 | ||
1370 | static const struct net_device_ops smsc75xx_netdev_ops = { | |
1371 | .ndo_open = usbnet_open, | |
1372 | .ndo_stop = usbnet_stop, | |
1373 | .ndo_start_xmit = usbnet_start_xmit, | |
1374 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1375 | .ndo_change_mtu = smsc75xx_change_mtu, | |
1376 | .ndo_set_mac_address = eth_mac_addr, | |
1377 | .ndo_validate_addr = eth_validate_addr, | |
1378 | .ndo_do_ioctl = smsc75xx_ioctl, | |
afc4b13d | 1379 | .ndo_set_rx_mode = smsc75xx_set_multicast, |
78e47fe4 | 1380 | .ndo_set_features = smsc75xx_set_features, |
d0cad871 SG |
1381 | }; |
1382 | ||
1383 | static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf) | |
1384 | { | |
1385 | struct smsc75xx_priv *pdata = NULL; | |
1386 | int ret; | |
1387 | ||
1388 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1389 | ||
1390 | ret = usbnet_get_endpoints(dev, intf); | |
e3c678e6 SG |
1391 | if (ret < 0) { |
1392 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1393 | return ret; | |
1394 | } | |
d0cad871 SG |
1395 | |
1396 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), | |
38673c82 | 1397 | GFP_KERNEL); |
d0cad871 SG |
1398 | |
1399 | pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
38673c82 | 1400 | if (!pdata) |
d0cad871 | 1401 | return -ENOMEM; |
d0cad871 SG |
1402 | |
1403 | pdata->dev = dev; | |
1404 | ||
1405 | spin_lock_init(&pdata->rfe_ctl_lock); | |
1406 | mutex_init(&pdata->dataport_mutex); | |
1407 | ||
1408 | INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write); | |
1409 | ||
20f01703 | 1410 | if (DEFAULT_TX_CSUM_ENABLE) |
78e47fe4 | 1411 | dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
20f01703 | 1412 | |
78e47fe4 MM |
1413 | if (DEFAULT_RX_CSUM_ENABLE) |
1414 | dev->net->features |= NETIF_F_RXCSUM; | |
d0cad871 | 1415 | |
78e47fe4 | 1416 | dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
20f01703 | 1417 | NETIF_F_RXCSUM; |
d0cad871 | 1418 | |
481705a1 SG |
1419 | ret = smsc75xx_wait_ready(dev, 0); |
1420 | if (ret < 0) { | |
1421 | netdev_warn(dev->net, "device not ready in smsc75xx_bind\n"); | |
1422 | return ret; | |
1423 | } | |
1424 | ||
1425 | smsc75xx_init_mac_address(dev); | |
1426 | ||
d0cad871 SG |
1427 | /* Init all registers */ |
1428 | ret = smsc75xx_reset(dev); | |
e3c678e6 SG |
1429 | if (ret < 0) { |
1430 | netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret); | |
1431 | return ret; | |
1432 | } | |
d0cad871 SG |
1433 | |
1434 | dev->net->netdev_ops = &smsc75xx_netdev_ops; | |
1435 | dev->net->ethtool_ops = &smsc75xx_ethtool_ops; | |
1436 | dev->net->flags |= IFF_MULTICAST; | |
1437 | dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; | |
a99ff7d0 | 1438 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
d0cad871 SG |
1439 | return 0; |
1440 | } | |
1441 | ||
1442 | static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1443 | { | |
1444 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1445 | if (pdata) { | |
1e1d7412 | 1446 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
d0cad871 SG |
1447 | kfree(pdata); |
1448 | pdata = NULL; | |
1449 | dev->data[0] = 0; | |
1450 | } | |
1451 | } | |
1452 | ||
899a391b SG |
1453 | static u16 smsc_crc(const u8 *buffer, size_t len) |
1454 | { | |
1455 | return bitrev16(crc16(0xFFFF, buffer, len)); | |
1456 | } | |
1457 | ||
1458 | static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg, | |
1459 | u32 wuf_mask1) | |
1460 | { | |
1461 | int cfg_base = WUF_CFGX + filter * 4; | |
1462 | int mask_base = WUF_MASKX + filter * 16; | |
1463 | int ret; | |
1464 | ||
1465 | ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg); | |
e3c678e6 SG |
1466 | if (ret < 0) { |
1467 | netdev_warn(dev->net, "Error writing WUF_CFGX\n"); | |
1468 | return ret; | |
1469 | } | |
899a391b SG |
1470 | |
1471 | ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1); | |
e3c678e6 SG |
1472 | if (ret < 0) { |
1473 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1474 | return ret; | |
1475 | } | |
899a391b SG |
1476 | |
1477 | ret = smsc75xx_write_reg(dev, mask_base + 4, 0); | |
e3c678e6 SG |
1478 | if (ret < 0) { |
1479 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1480 | return ret; | |
1481 | } | |
899a391b SG |
1482 | |
1483 | ret = smsc75xx_write_reg(dev, mask_base + 8, 0); | |
e3c678e6 SG |
1484 | if (ret < 0) { |
1485 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1486 | return ret; | |
1487 | } | |
899a391b SG |
1488 | |
1489 | ret = smsc75xx_write_reg(dev, mask_base + 12, 0); | |
e3c678e6 SG |
1490 | if (ret < 0) { |
1491 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1492 | return ret; | |
1493 | } | |
899a391b SG |
1494 | |
1495 | return 0; | |
1496 | } | |
1497 | ||
9deb2757 SG |
1498 | static int smsc75xx_enter_suspend0(struct usbnet *dev) |
1499 | { | |
b4cdea9c | 1500 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
9deb2757 SG |
1501 | u32 val; |
1502 | int ret; | |
1503 | ||
1504 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1505 | if (ret < 0) { |
1506 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1507 | return ret; | |
1508 | } | |
9deb2757 SG |
1509 | |
1510 | val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST)); | |
1511 | val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS; | |
1512 | ||
1513 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1514 | if (ret < 0) { |
1515 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1516 | return ret; | |
1517 | } | |
9deb2757 | 1518 | |
351f33d9 | 1519 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
b4cdea9c | 1520 | |
9deb2757 SG |
1521 | return 0; |
1522 | } | |
1523 | ||
f329ccdc SG |
1524 | static int smsc75xx_enter_suspend1(struct usbnet *dev) |
1525 | { | |
b4cdea9c | 1526 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
f329ccdc SG |
1527 | u32 val; |
1528 | int ret; | |
1529 | ||
1530 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1531 | if (ret < 0) { |
1532 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1533 | return ret; | |
1534 | } | |
f329ccdc SG |
1535 | |
1536 | val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); | |
1537 | val |= PMT_CTL_SUS_MODE_1; | |
1538 | ||
1539 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1540 | if (ret < 0) { |
1541 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1542 | return ret; | |
1543 | } | |
f329ccdc SG |
1544 | |
1545 | /* clear wol status, enable energy detection */ | |
1546 | val &= ~PMT_CTL_WUPS; | |
1547 | val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN); | |
1548 | ||
1549 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1550 | if (ret < 0) { |
1551 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1552 | return ret; | |
1553 | } | |
f329ccdc | 1554 | |
351f33d9 | 1555 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
b4cdea9c | 1556 | |
f329ccdc SG |
1557 | return 0; |
1558 | } | |
1559 | ||
9deb2757 SG |
1560 | static int smsc75xx_enter_suspend2(struct usbnet *dev) |
1561 | { | |
b4cdea9c | 1562 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
9deb2757 SG |
1563 | u32 val; |
1564 | int ret; | |
1565 | ||
1566 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1567 | if (ret < 0) { |
1568 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1569 | return ret; | |
1570 | } | |
9deb2757 SG |
1571 | |
1572 | val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); | |
1573 | val |= PMT_CTL_SUS_MODE_2; | |
1574 | ||
1575 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1576 | if (ret < 0) { |
1577 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1578 | return ret; | |
1579 | } | |
9deb2757 | 1580 | |
b4cdea9c SG |
1581 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1582 | ||
1583 | return 0; | |
1584 | } | |
1585 | ||
1586 | static int smsc75xx_enter_suspend3(struct usbnet *dev) | |
1587 | { | |
1588 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1589 | u32 val; | |
1590 | int ret; | |
1591 | ||
1592 | ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val); | |
e3c678e6 SG |
1593 | if (ret < 0) { |
1594 | netdev_warn(dev->net, "Error reading FCT_RX_CTL\n"); | |
1595 | return ret; | |
1596 | } | |
b4cdea9c SG |
1597 | |
1598 | if (val & FCT_RX_CTL_RXUSED) { | |
1599 | netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n"); | |
1600 | return -EBUSY; | |
1601 | } | |
1602 | ||
1603 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1604 | if (ret < 0) { |
1605 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1606 | return ret; | |
1607 | } | |
b4cdea9c SG |
1608 | |
1609 | val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); | |
1610 | val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN; | |
1611 | ||
1612 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1613 | if (ret < 0) { |
1614 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1615 | return ret; | |
1616 | } | |
b4cdea9c SG |
1617 | |
1618 | /* clear wol status */ | |
1619 | val &= ~PMT_CTL_WUPS; | |
1620 | val |= PMT_CTL_WUPS_WOL; | |
1621 | ||
1622 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1623 | if (ret < 0) { |
1624 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1625 | return ret; | |
1626 | } | |
b4cdea9c | 1627 | |
351f33d9 | 1628 | pdata->suspend_flags |= SUSPEND_SUSPEND3; |
b4cdea9c | 1629 | |
9deb2757 SG |
1630 | return 0; |
1631 | } | |
1632 | ||
f329ccdc SG |
1633 | static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) |
1634 | { | |
1635 | struct mii_if_info *mii = &dev->mii; | |
1636 | int ret; | |
1637 | ||
1638 | netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); | |
1639 | ||
1640 | /* read to clear */ | |
1641 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); | |
e3c678e6 SG |
1642 | if (ret < 0) { |
1643 | netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); | |
1644 | return ret; | |
1645 | } | |
f329ccdc SG |
1646 | |
1647 | /* enable interrupt source */ | |
1648 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); | |
e3c678e6 SG |
1649 | if (ret < 0) { |
1650 | netdev_warn(dev->net, "Error reading PHY_INT_MASK\n"); | |
1651 | return ret; | |
1652 | } | |
f329ccdc SG |
1653 | |
1654 | ret |= mask; | |
1655 | ||
1656 | smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); | |
1657 | ||
1658 | return 0; | |
1659 | } | |
1660 | ||
1661 | static int smsc75xx_link_ok_nopm(struct usbnet *dev) | |
1662 | { | |
1663 | struct mii_if_info *mii = &dev->mii; | |
1664 | int ret; | |
1665 | ||
1666 | /* first, a dummy read, needed to latch some MII phys */ | |
1667 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e3c678e6 SG |
1668 | if (ret < 0) { |
1669 | netdev_warn(dev->net, "Error reading MII_BMSR\n"); | |
1670 | return ret; | |
1671 | } | |
f329ccdc SG |
1672 | |
1673 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e3c678e6 SG |
1674 | if (ret < 0) { |
1675 | netdev_warn(dev->net, "Error reading MII_BMSR\n"); | |
1676 | return ret; | |
1677 | } | |
f329ccdc SG |
1678 | |
1679 | return !!(ret & BMSR_LSTATUS); | |
1680 | } | |
1681 | ||
b4cdea9c SG |
1682 | static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up) |
1683 | { | |
1684 | int ret; | |
1685 | ||
1686 | if (!netif_running(dev->net)) { | |
1687 | /* interface is ifconfig down so fully power down hw */ | |
1688 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1689 | return smsc75xx_enter_suspend2(dev); | |
1690 | } | |
1691 | ||
1692 | if (!link_up) { | |
1693 | /* link is down so enter EDPD mode */ | |
1694 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
1695 | ||
1696 | /* enable PHY wakeup events for if cable is attached */ | |
1697 | ret = smsc75xx_enable_phy_wakeup_interrupts(dev, | |
1698 | PHY_INT_MASK_ANEG_COMP); | |
e3c678e6 SG |
1699 | if (ret < 0) { |
1700 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1701 | return ret; | |
1702 | } | |
b4cdea9c SG |
1703 | |
1704 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1705 | return smsc75xx_enter_suspend1(dev); | |
1706 | } | |
1707 | ||
1708 | /* enable PHY wakeup events so we remote wakeup if cable is pulled */ | |
1709 | ret = smsc75xx_enable_phy_wakeup_interrupts(dev, | |
1710 | PHY_INT_MASK_LINK_DOWN); | |
e3c678e6 SG |
1711 | if (ret < 0) { |
1712 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1713 | return ret; | |
1714 | } | |
b4cdea9c SG |
1715 | |
1716 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); | |
1717 | return smsc75xx_enter_suspend3(dev); | |
1718 | } | |
1719 | ||
16c79a04 SG |
1720 | static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message) |
1721 | { | |
1722 | struct usbnet *dev = usb_get_intfdata(intf); | |
6c636503 | 1723 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
f329ccdc | 1724 | u32 val, link_up; |
16c79a04 | 1725 | int ret; |
16c79a04 | 1726 | |
16c79a04 | 1727 | ret = usbnet_suspend(intf, message); |
e3c678e6 SG |
1728 | if (ret < 0) { |
1729 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
1730 | return ret; | |
1731 | } | |
16c79a04 | 1732 | |
b4cdea9c SG |
1733 | if (pdata->suspend_flags) { |
1734 | netdev_warn(dev->net, "error during last resume\n"); | |
1735 | pdata->suspend_flags = 0; | |
1736 | } | |
1737 | ||
f329ccdc SG |
1738 | /* determine if link is up using only _nopm functions */ |
1739 | link_up = smsc75xx_link_ok_nopm(dev); | |
1740 | ||
b4cdea9c SG |
1741 | if (message.event == PM_EVENT_AUTO_SUSPEND) { |
1742 | ret = smsc75xx_autosuspend(dev, link_up); | |
1743 | goto done; | |
1744 | } | |
1745 | ||
1746 | /* if we get this far we're not autosuspending */ | |
f329ccdc SG |
1747 | /* if no wol options set, or if link is down and we're not waking on |
1748 | * PHY activity, enter lowest power SUSPEND2 mode | |
1749 | */ | |
1750 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1751 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1752 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
6c636503 SG |
1753 | |
1754 | /* disable energy detect (link up) & wake up events */ | |
47bbea41 | 1755 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1756 | if (ret < 0) { |
1757 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1758 | goto done; | |
1759 | } | |
6c636503 SG |
1760 | |
1761 | val &= ~(WUCSR_MPEN | WUCSR_WUEN); | |
1762 | ||
47bbea41 | 1763 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1764 | if (ret < 0) { |
1765 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1766 | goto done; | |
1767 | } | |
6c636503 | 1768 | |
47bbea41 | 1769 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); |
e3c678e6 SG |
1770 | if (ret < 0) { |
1771 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1772 | goto done; | |
1773 | } | |
6c636503 SG |
1774 | |
1775 | val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN); | |
1776 | ||
47bbea41 | 1777 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); |
e3c678e6 SG |
1778 | if (ret < 0) { |
1779 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1780 | goto done; | |
1781 | } | |
6c636503 | 1782 | |
eacdd6c2 SG |
1783 | ret = smsc75xx_enter_suspend2(dev); |
1784 | goto done; | |
6c636503 SG |
1785 | } |
1786 | ||
f329ccdc SG |
1787 | if (pdata->wolopts & WAKE_PHY) { |
1788 | ret = smsc75xx_enable_phy_wakeup_interrupts(dev, | |
1789 | (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN)); | |
e3c678e6 SG |
1790 | if (ret < 0) { |
1791 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1792 | goto done; | |
1793 | } | |
f329ccdc SG |
1794 | |
1795 | /* if link is down then configure EDPD and enter SUSPEND1, | |
1796 | * otherwise enter SUSPEND0 below | |
1797 | */ | |
1798 | if (!link_up) { | |
1799 | struct mii_if_info *mii = &dev->mii; | |
1800 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1801 | ||
1802 | /* enable energy detect power-down mode */ | |
1803 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, | |
1804 | PHY_MODE_CTRL_STS); | |
e3c678e6 SG |
1805 | if (ret < 0) { |
1806 | netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n"); | |
1807 | goto done; | |
1808 | } | |
f329ccdc SG |
1809 | |
1810 | ret |= MODE_CTRL_STS_EDPWRDOWN; | |
1811 | ||
1812 | smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, | |
1813 | PHY_MODE_CTRL_STS, ret); | |
1814 | ||
1815 | /* enter SUSPEND1 mode */ | |
eacdd6c2 SG |
1816 | ret = smsc75xx_enter_suspend1(dev); |
1817 | goto done; | |
f329ccdc SG |
1818 | } |
1819 | } | |
1820 | ||
899a391b SG |
1821 | if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) { |
1822 | int i, filter = 0; | |
1823 | ||
1824 | /* disable all filters */ | |
1825 | for (i = 0; i < WUF_NUM; i++) { | |
47bbea41 | 1826 | ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0); |
e3c678e6 SG |
1827 | if (ret < 0) { |
1828 | netdev_warn(dev->net, "Error writing WUF_CFGX\n"); | |
1829 | goto done; | |
1830 | } | |
899a391b SG |
1831 | } |
1832 | ||
1833 | if (pdata->wolopts & WAKE_MCAST) { | |
1834 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1835 | netdev_info(dev->net, "enabling multicast detection\n"); |
899a391b SG |
1836 | |
1837 | val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST | |
1838 | | smsc_crc(mcast, 3); | |
1839 | ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007); | |
e3c678e6 SG |
1840 | if (ret < 0) { |
1841 | netdev_warn(dev->net, "Error writing wakeup filter\n"); | |
1842 | goto done; | |
1843 | } | |
899a391b SG |
1844 | } |
1845 | ||
1846 | if (pdata->wolopts & WAKE_ARP) { | |
1847 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1848 | netdev_info(dev->net, "enabling ARP detection\n"); |
899a391b SG |
1849 | |
1850 | val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16) | |
1851 | | smsc_crc(arp, 2); | |
1852 | ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003); | |
e3c678e6 SG |
1853 | if (ret < 0) { |
1854 | netdev_warn(dev->net, "Error writing wakeup filter\n"); | |
1855 | goto done; | |
1856 | } | |
899a391b SG |
1857 | } |
1858 | ||
1859 | /* clear any pending pattern match packet status */ | |
47bbea41 | 1860 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1861 | if (ret < 0) { |
1862 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1863 | goto done; | |
1864 | } | |
899a391b SG |
1865 | |
1866 | val |= WUCSR_WUFR; | |
1867 | ||
47bbea41 | 1868 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1869 | if (ret < 0) { |
1870 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1871 | goto done; | |
1872 | } | |
899a391b | 1873 | |
1e1d7412 | 1874 | netdev_info(dev->net, "enabling packet match detection\n"); |
47bbea41 | 1875 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1876 | if (ret < 0) { |
1877 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1878 | goto done; | |
1879 | } | |
899a391b SG |
1880 | |
1881 | val |= WUCSR_WUEN; | |
1882 | ||
47bbea41 | 1883 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1884 | if (ret < 0) { |
1885 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1886 | goto done; | |
1887 | } | |
899a391b | 1888 | } else { |
1e1d7412 | 1889 | netdev_info(dev->net, "disabling packet match detection\n"); |
47bbea41 | 1890 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1891 | if (ret < 0) { |
1892 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1893 | goto done; | |
1894 | } | |
6c636503 | 1895 | |
899a391b | 1896 | val &= ~WUCSR_WUEN; |
16c79a04 | 1897 | |
47bbea41 | 1898 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1899 | if (ret < 0) { |
1900 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1901 | goto done; | |
1902 | } | |
6c636503 SG |
1903 | } |
1904 | ||
899a391b | 1905 | /* disable magic, bcast & unicast wakeup sources */ |
47bbea41 | 1906 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1907 | if (ret < 0) { |
1908 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1909 | goto done; | |
1910 | } | |
6c636503 | 1911 | |
899a391b SG |
1912 | val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN); |
1913 | ||
47bbea41 | 1914 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1915 | if (ret < 0) { |
1916 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1917 | goto done; | |
1918 | } | |
899a391b | 1919 | |
f329ccdc SG |
1920 | if (pdata->wolopts & WAKE_PHY) { |
1921 | netdev_info(dev->net, "enabling PHY wakeup\n"); | |
1922 | ||
1923 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1924 | if (ret < 0) { |
1925 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1926 | goto done; | |
1927 | } | |
f329ccdc SG |
1928 | |
1929 | /* clear wol status, enable energy detection */ | |
1930 | val &= ~PMT_CTL_WUPS; | |
1931 | val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN); | |
1932 | ||
1933 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1934 | if (ret < 0) { |
1935 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1936 | goto done; | |
1937 | } | |
f329ccdc SG |
1938 | } |
1939 | ||
6c636503 | 1940 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 1941 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
47bbea41 | 1942 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1943 | if (ret < 0) { |
1944 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1945 | goto done; | |
1946 | } | |
899a391b SG |
1947 | |
1948 | /* clear any pending magic packet status */ | |
1949 | val |= WUCSR_MPR | WUCSR_MPEN; | |
1950 | ||
47bbea41 | 1951 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1952 | if (ret < 0) { |
1953 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1954 | goto done; | |
1955 | } | |
6c636503 SG |
1956 | } |
1957 | ||
899a391b | 1958 | if (pdata->wolopts & WAKE_BCAST) { |
1e1d7412 | 1959 | netdev_info(dev->net, "enabling broadcast detection\n"); |
47bbea41 | 1960 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1961 | if (ret < 0) { |
1962 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1963 | goto done; | |
1964 | } | |
6c636503 | 1965 | |
899a391b | 1966 | val |= WUCSR_BCAST_FR | WUCSR_BCST_EN; |
16c79a04 | 1967 | |
47bbea41 | 1968 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1969 | if (ret < 0) { |
1970 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1971 | goto done; | |
1972 | } | |
899a391b | 1973 | } |
6c636503 | 1974 | |
899a391b | 1975 | if (pdata->wolopts & WAKE_UCAST) { |
1e1d7412 | 1976 | netdev_info(dev->net, "enabling unicast detection\n"); |
47bbea41 | 1977 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1978 | if (ret < 0) { |
1979 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1980 | goto done; | |
1981 | } | |
899a391b SG |
1982 | |
1983 | val |= WUCSR_WUFR | WUCSR_PFDA_EN; | |
6c636503 | 1984 | |
47bbea41 | 1985 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1986 | if (ret < 0) { |
1987 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1988 | goto done; | |
1989 | } | |
899a391b SG |
1990 | } |
1991 | ||
1992 | /* enable receiver to enable frame reception */ | |
47bbea41 | 1993 | ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val); |
e3c678e6 SG |
1994 | if (ret < 0) { |
1995 | netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); | |
1996 | goto done; | |
1997 | } | |
6c636503 SG |
1998 | |
1999 | val |= MAC_RX_RXEN; | |
2000 | ||
47bbea41 | 2001 | ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val); |
e3c678e6 SG |
2002 | if (ret < 0) { |
2003 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
2004 | goto done; | |
2005 | } | |
6c636503 SG |
2006 | |
2007 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 2008 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
eacdd6c2 SG |
2009 | ret = smsc75xx_enter_suspend0(dev); |
2010 | ||
2011 | done: | |
5410a473 ML |
2012 | /* |
2013 | * TODO: resume() might need to handle the suspend failure | |
2014 | * in system sleep | |
2015 | */ | |
2016 | if (ret && PMSG_IS_AUTO(message)) | |
eacdd6c2 SG |
2017 | usbnet_resume(intf); |
2018 | return ret; | |
16c79a04 SG |
2019 | } |
2020 | ||
2021 | static int smsc75xx_resume(struct usb_interface *intf) | |
2022 | { | |
2023 | struct usbnet *dev = usb_get_intfdata(intf); | |
6c636503 | 2024 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
b4cdea9c | 2025 | u8 suspend_flags = pdata->suspend_flags; |
16c79a04 SG |
2026 | int ret; |
2027 | u32 val; | |
2028 | ||
b4cdea9c | 2029 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
16c79a04 | 2030 | |
b4cdea9c SG |
2031 | /* do this first to ensure it's cleared even in error case */ |
2032 | pdata->suspend_flags = 0; | |
2033 | ||
b4cdea9c | 2034 | if (suspend_flags & SUSPEND_ALLMODES) { |
899a391b | 2035 | /* Disable wakeup sources */ |
47bbea41 | 2036 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
2037 | if (ret < 0) { |
2038 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
2039 | return ret; | |
2040 | } | |
16c79a04 | 2041 | |
899a391b SG |
2042 | val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN |
2043 | | WUCSR_BCST_EN); | |
16c79a04 | 2044 | |
47bbea41 | 2045 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
2046 | if (ret < 0) { |
2047 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
2048 | return ret; | |
2049 | } | |
6c636503 SG |
2050 | |
2051 | /* clear wake-up status */ | |
47bbea41 | 2052 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); |
e3c678e6 SG |
2053 | if (ret < 0) { |
2054 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
2055 | return ret; | |
2056 | } | |
6c636503 SG |
2057 | |
2058 | val &= ~PMT_CTL_WOL_EN; | |
2059 | val |= PMT_CTL_WUPS; | |
2060 | ||
47bbea41 | 2061 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); |
e3c678e6 SG |
2062 | if (ret < 0) { |
2063 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
2064 | return ret; | |
2065 | } | |
b4cdea9c SG |
2066 | } |
2067 | ||
2068 | if (suspend_flags & SUSPEND_SUSPEND2) { | |
1e1d7412 | 2069 | netdev_info(dev->net, "resuming from SUSPEND2\n"); |
6c636503 | 2070 | |
47bbea41 | 2071 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); |
e3c678e6 SG |
2072 | if (ret < 0) { |
2073 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
2074 | return ret; | |
2075 | } | |
6c636503 SG |
2076 | |
2077 | val |= PMT_CTL_PHY_PWRUP; | |
2078 | ||
47bbea41 | 2079 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); |
e3c678e6 SG |
2080 | if (ret < 0) { |
2081 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
2082 | return ret; | |
2083 | } | |
6c636503 | 2084 | } |
16c79a04 | 2085 | |
47bbea41 | 2086 | ret = smsc75xx_wait_ready(dev, 1); |
e3c678e6 SG |
2087 | if (ret < 0) { |
2088 | netdev_warn(dev->net, "device not ready in smsc75xx_resume\n"); | |
2089 | return ret; | |
2090 | } | |
16c79a04 SG |
2091 | |
2092 | return usbnet_resume(intf); | |
2093 | } | |
2094 | ||
78e47fe4 MM |
2095 | static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb, |
2096 | u32 rx_cmd_a, u32 rx_cmd_b) | |
d0cad871 | 2097 | { |
78e47fe4 MM |
2098 | if (!(dev->net->features & NETIF_F_RXCSUM) || |
2099 | unlikely(rx_cmd_a & RX_CMD_A_LCSM)) { | |
d0cad871 SG |
2100 | skb->ip_summed = CHECKSUM_NONE; |
2101 | } else { | |
2102 | skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT)); | |
2103 | skb->ip_summed = CHECKSUM_COMPLETE; | |
2104 | } | |
2105 | } | |
2106 | ||
2107 | static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
2108 | { | |
eb85569f EG |
2109 | /* This check is no longer done by usbnet */ |
2110 | if (skb->len < dev->net->hard_header_len) | |
2111 | return 0; | |
2112 | ||
d0cad871 SG |
2113 | while (skb->len > 0) { |
2114 | u32 rx_cmd_a, rx_cmd_b, align_count, size; | |
2115 | struct sk_buff *ax_skb; | |
2116 | unsigned char *packet; | |
2117 | ||
2118 | memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a)); | |
2119 | le32_to_cpus(&rx_cmd_a); | |
2120 | skb_pull(skb, 4); | |
2121 | ||
2122 | memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b)); | |
2123 | le32_to_cpus(&rx_cmd_b); | |
ea1649de | 2124 | skb_pull(skb, 4 + RXW_PADDING); |
d0cad871 SG |
2125 | |
2126 | packet = skb->data; | |
2127 | ||
2128 | /* get the packet length */ | |
ea1649de NE |
2129 | size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING; |
2130 | align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; | |
d0cad871 SG |
2131 | |
2132 | if (unlikely(rx_cmd_a & RX_CMD_A_RED)) { | |
2133 | netif_dbg(dev, rx_err, dev->net, | |
1e1d7412 | 2134 | "Error rx_cmd_a=0x%08x\n", rx_cmd_a); |
d0cad871 SG |
2135 | dev->net->stats.rx_errors++; |
2136 | dev->net->stats.rx_dropped++; | |
2137 | ||
2138 | if (rx_cmd_a & RX_CMD_A_FCS) | |
2139 | dev->net->stats.rx_crc_errors++; | |
2140 | else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT)) | |
2141 | dev->net->stats.rx_frame_errors++; | |
2142 | } else { | |
4c51e536 SG |
2143 | /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */ |
2144 | if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) { | |
d0cad871 | 2145 | netif_dbg(dev, rx_err, dev->net, |
1e1d7412 JP |
2146 | "size err rx_cmd_a=0x%08x\n", |
2147 | rx_cmd_a); | |
d0cad871 SG |
2148 | return 0; |
2149 | } | |
2150 | ||
2151 | /* last frame in this batch */ | |
2152 | if (skb->len == size) { | |
78e47fe4 MM |
2153 | smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a, |
2154 | rx_cmd_b); | |
d0cad871 SG |
2155 | |
2156 | skb_trim(skb, skb->len - 4); /* remove fcs */ | |
2157 | skb->truesize = size + sizeof(struct sk_buff); | |
2158 | ||
2159 | return 1; | |
2160 | } | |
2161 | ||
2162 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
2163 | if (unlikely(!ax_skb)) { | |
1e1d7412 | 2164 | netdev_warn(dev->net, "Error allocating skb\n"); |
d0cad871 SG |
2165 | return 0; |
2166 | } | |
2167 | ||
2168 | ax_skb->len = size; | |
2169 | ax_skb->data = packet; | |
2170 | skb_set_tail_pointer(ax_skb, size); | |
2171 | ||
78e47fe4 MM |
2172 | smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a, |
2173 | rx_cmd_b); | |
d0cad871 SG |
2174 | |
2175 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ | |
2176 | ax_skb->truesize = size + sizeof(struct sk_buff); | |
2177 | ||
2178 | usbnet_skb_return(dev, ax_skb); | |
2179 | } | |
2180 | ||
2181 | skb_pull(skb, size); | |
2182 | ||
2183 | /* padding bytes before the next frame starts */ | |
2184 | if (skb->len) | |
2185 | skb_pull(skb, align_count); | |
2186 | } | |
2187 | ||
2188 | if (unlikely(skb->len < 0)) { | |
1e1d7412 | 2189 | netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); |
d0cad871 SG |
2190 | return 0; |
2191 | } | |
2192 | ||
2193 | return 1; | |
2194 | } | |
2195 | ||
2196 | static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev, | |
2197 | struct sk_buff *skb, gfp_t flags) | |
2198 | { | |
2199 | u32 tx_cmd_a, tx_cmd_b; | |
2200 | ||
d0cad871 SG |
2201 | if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) { |
2202 | struct sk_buff *skb2 = | |
2203 | skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags); | |
2204 | dev_kfree_skb_any(skb); | |
2205 | skb = skb2; | |
2206 | if (!skb) | |
2207 | return NULL; | |
2208 | } | |
2209 | ||
2210 | tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS; | |
2211 | ||
2212 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
2213 | tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE; | |
2214 | ||
2215 | if (skb_is_gso(skb)) { | |
2216 | u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN); | |
2217 | tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS; | |
2218 | ||
2219 | tx_cmd_a |= TX_CMD_A_LSO; | |
2220 | } else { | |
2221 | tx_cmd_b = 0; | |
2222 | } | |
2223 | ||
2224 | skb_push(skb, 4); | |
2225 | cpu_to_le32s(&tx_cmd_b); | |
2226 | memcpy(skb->data, &tx_cmd_b, 4); | |
2227 | ||
2228 | skb_push(skb, 4); | |
2229 | cpu_to_le32s(&tx_cmd_a); | |
2230 | memcpy(skb->data, &tx_cmd_a, 4); | |
2231 | ||
2232 | return skb; | |
2233 | } | |
2234 | ||
b4cdea9c SG |
2235 | static int smsc75xx_manage_power(struct usbnet *dev, int on) |
2236 | { | |
2237 | dev->intf->needs_remote_wakeup = on; | |
2238 | return 0; | |
2239 | } | |
2240 | ||
d0cad871 SG |
2241 | static const struct driver_info smsc75xx_info = { |
2242 | .description = "smsc75xx USB 2.0 Gigabit Ethernet", | |
2243 | .bind = smsc75xx_bind, | |
2244 | .unbind = smsc75xx_unbind, | |
2245 | .link_reset = smsc75xx_link_reset, | |
2246 | .reset = smsc75xx_reset, | |
2247 | .rx_fixup = smsc75xx_rx_fixup, | |
2248 | .tx_fixup = smsc75xx_tx_fixup, | |
2249 | .status = smsc75xx_status, | |
b4cdea9c | 2250 | .manage_power = smsc75xx_manage_power, |
7bdd305e | 2251 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
d0cad871 SG |
2252 | }; |
2253 | ||
2254 | static const struct usb_device_id products[] = { | |
2255 | { | |
2256 | /* SMSC7500 USB Gigabit Ethernet Device */ | |
2257 | USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500), | |
2258 | .driver_info = (unsigned long) &smsc75xx_info, | |
2259 | }, | |
2260 | { | |
2261 | /* SMSC7500 USB Gigabit Ethernet Device */ | |
2262 | USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505), | |
2263 | .driver_info = (unsigned long) &smsc75xx_info, | |
2264 | }, | |
2265 | { }, /* END */ | |
2266 | }; | |
2267 | MODULE_DEVICE_TABLE(usb, products); | |
2268 | ||
2269 | static struct usb_driver smsc75xx_driver = { | |
2270 | .name = SMSC_CHIPNAME, | |
2271 | .id_table = products, | |
2272 | .probe = usbnet_probe, | |
16c79a04 SG |
2273 | .suspend = smsc75xx_suspend, |
2274 | .resume = smsc75xx_resume, | |
2275 | .reset_resume = smsc75xx_resume, | |
d0cad871 | 2276 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2277 | .disable_hub_initiated_lpm = 1, |
b4cdea9c | 2278 | .supports_autosuspend = 1, |
d0cad871 SG |
2279 | }; |
2280 | ||
d632eb1b | 2281 | module_usb_driver(smsc75xx_driver); |
d0cad871 SG |
2282 | |
2283 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2284 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
d0cad871 SG |
2285 | MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices"); |
2286 | MODULE_LICENSE("GPL"); |