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2f7ca802 SG |
1 | /*************************************************************************** |
2 | * | |
3 | * Copyright (C) 2007-2008 SMSC | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
9cb00073 | 16 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
2f7ca802 SG |
17 | * |
18 | *****************************************************************************/ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kmod.h> | |
2f7ca802 SG |
22 | #include <linux/netdevice.h> |
23 | #include <linux/etherdevice.h> | |
24 | #include <linux/ethtool.h> | |
25 | #include <linux/mii.h> | |
26 | #include <linux/usb.h> | |
bbd9f9ee SG |
27 | #include <linux/bitrev.h> |
28 | #include <linux/crc16.h> | |
2f7ca802 SG |
29 | #include <linux/crc32.h> |
30 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
2f7ca802 SG |
32 | #include "smsc95xx.h" |
33 | ||
34 | #define SMSC_CHIPNAME "smsc95xx" | |
f7b29271 | 35 | #define SMSC_DRIVER_VERSION "1.0.4" |
2f7ca802 SG |
36 | #define HS_USB_PKT_SIZE (512) |
37 | #define FS_USB_PKT_SIZE (64) | |
38 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
39 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
40 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
41 | #define MAX_SINGLE_PACKET_SIZE (2048) | |
42 | #define LAN95XX_EEPROM_MAGIC (0x9500) | |
43 | #define EEPROM_MAC_OFFSET (0x01) | |
f7b29271 | 44 | #define DEFAULT_TX_CSUM_ENABLE (true) |
2f7ca802 SG |
45 | #define DEFAULT_RX_CSUM_ENABLE (true) |
46 | #define SMSC95XX_INTERNAL_PHY_ID (1) | |
47 | #define SMSC95XX_TX_OVERHEAD (8) | |
f7b29271 | 48 | #define SMSC95XX_TX_OVERHEAD_CSUM (12) |
e5e3af83 | 49 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
bbd9f9ee | 50 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
2f7ca802 | 51 | |
9ebca507 SG |
52 | #define FEATURE_8_WAKEUP_FILTERS (0x01) |
53 | #define FEATURE_PHY_NLP_CROSSOVER (0x02) | |
eb970ff0 | 54 | #define FEATURE_REMOTE_WAKEUP (0x04) |
9ebca507 | 55 | |
b2d4b150 SG |
56 | #define SUSPEND_SUSPEND0 (0x01) |
57 | #define SUSPEND_SUSPEND1 (0x02) | |
58 | #define SUSPEND_SUSPEND2 (0x04) | |
59 | #define SUSPEND_SUSPEND3 (0x08) | |
60 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ | |
61 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
62 | ||
2f7ca802 SG |
63 | struct smsc95xx_priv { |
64 | u32 mac_cr; | |
3c0f3c60 MZ |
65 | u32 hash_hi; |
66 | u32 hash_lo; | |
e0e474a8 | 67 | u32 wolopts; |
2f7ca802 | 68 | spinlock_t mac_cr_lock; |
9ebca507 | 69 | u8 features; |
b2d4b150 | 70 | u8 suspend_flags; |
2f7ca802 SG |
71 | }; |
72 | ||
eb939922 | 73 | static bool turbo_mode = true; |
2f7ca802 SG |
74 | module_param(turbo_mode, bool, 0644); |
75 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
76 | ||
ec32115d ML |
77 | static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, |
78 | u32 *data, int in_pm) | |
2f7ca802 | 79 | { |
72108fd2 | 80 | u32 buf; |
2f7ca802 | 81 | int ret; |
ec32115d | 82 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
2f7ca802 SG |
83 | |
84 | BUG_ON(!dev); | |
85 | ||
ec32115d ML |
86 | if (!in_pm) |
87 | fn = usbnet_read_cmd; | |
88 | else | |
89 | fn = usbnet_read_cmd_nopm; | |
90 | ||
91 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
92 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
93 | 0, index, &buf, 4); | |
2f7ca802 | 94 | if (unlikely(ret < 0)) |
1e1d7412 JP |
95 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", |
96 | index, ret); | |
2f7ca802 | 97 | |
72108fd2 ML |
98 | le32_to_cpus(&buf); |
99 | *data = buf; | |
2f7ca802 SG |
100 | |
101 | return ret; | |
102 | } | |
103 | ||
ec32115d ML |
104 | static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index, |
105 | u32 data, int in_pm) | |
2f7ca802 | 106 | { |
72108fd2 | 107 | u32 buf; |
2f7ca802 | 108 | int ret; |
ec32115d | 109 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
2f7ca802 SG |
110 | |
111 | BUG_ON(!dev); | |
112 | ||
ec32115d ML |
113 | if (!in_pm) |
114 | fn = usbnet_write_cmd; | |
115 | else | |
116 | fn = usbnet_write_cmd_nopm; | |
117 | ||
72108fd2 ML |
118 | buf = data; |
119 | cpu_to_le32s(&buf); | |
2f7ca802 | 120 | |
ec32115d ML |
121 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
122 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
123 | 0, index, &buf, 4); | |
2f7ca802 | 124 | if (unlikely(ret < 0)) |
1e1d7412 JP |
125 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
126 | index, ret); | |
2f7ca802 | 127 | |
2f7ca802 SG |
128 | return ret; |
129 | } | |
130 | ||
ec32115d ML |
131 | static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index, |
132 | u32 *data) | |
133 | { | |
134 | return __smsc95xx_read_reg(dev, index, data, 1); | |
135 | } | |
136 | ||
137 | static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index, | |
138 | u32 data) | |
139 | { | |
140 | return __smsc95xx_write_reg(dev, index, data, 1); | |
141 | } | |
142 | ||
143 | static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, | |
144 | u32 *data) | |
145 | { | |
146 | return __smsc95xx_read_reg(dev, index, data, 0); | |
147 | } | |
148 | ||
149 | static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, | |
150 | u32 data) | |
151 | { | |
152 | return __smsc95xx_write_reg(dev, index, data, 0); | |
153 | } | |
e0e474a8 | 154 | |
2f7ca802 SG |
155 | /* Loop until the read is completed with timeout |
156 | * called with phy_mutex held */ | |
e5e3af83 SG |
157 | static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev, |
158 | int in_pm) | |
2f7ca802 SG |
159 | { |
160 | unsigned long start_time = jiffies; | |
161 | u32 val; | |
769ea6d8 | 162 | int ret; |
2f7ca802 SG |
163 | |
164 | do { | |
e5e3af83 | 165 | ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); |
b052e073 SG |
166 | if (ret < 0) { |
167 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); | |
168 | return ret; | |
169 | } | |
170 | ||
2f7ca802 SG |
171 | if (!(val & MII_BUSY_)) |
172 | return 0; | |
173 | } while (!time_after(jiffies, start_time + HZ)); | |
174 | ||
175 | return -EIO; | |
176 | } | |
177 | ||
e5e3af83 SG |
178 | static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx, |
179 | int in_pm) | |
2f7ca802 SG |
180 | { |
181 | struct usbnet *dev = netdev_priv(netdev); | |
182 | u32 val, addr; | |
769ea6d8 | 183 | int ret; |
2f7ca802 SG |
184 | |
185 | mutex_lock(&dev->phy_mutex); | |
186 | ||
187 | /* confirm MII not busy */ | |
e5e3af83 | 188 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
189 | if (ret < 0) { |
190 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); | |
191 | goto done; | |
192 | } | |
2f7ca802 SG |
193 | |
194 | /* set the address, index & direction (read from PHY) */ | |
195 | phy_id &= dev->mii.phy_id_mask; | |
196 | idx &= dev->mii.reg_num_mask; | |
80928805 | 197 | addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; |
e5e3af83 | 198 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
199 | if (ret < 0) { |
200 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
201 | goto done; | |
202 | } | |
2f7ca802 | 203 | |
e5e3af83 | 204 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
205 | if (ret < 0) { |
206 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
207 | goto done; | |
208 | } | |
2f7ca802 | 209 | |
e5e3af83 | 210 | ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); |
b052e073 SG |
211 | if (ret < 0) { |
212 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
213 | goto done; | |
214 | } | |
2f7ca802 | 215 | |
769ea6d8 | 216 | ret = (u16)(val & 0xFFFF); |
2f7ca802 | 217 | |
769ea6d8 SG |
218 | done: |
219 | mutex_unlock(&dev->phy_mutex); | |
220 | return ret; | |
2f7ca802 SG |
221 | } |
222 | ||
e5e3af83 SG |
223 | static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id, |
224 | int idx, int regval, int in_pm) | |
2f7ca802 SG |
225 | { |
226 | struct usbnet *dev = netdev_priv(netdev); | |
227 | u32 val, addr; | |
769ea6d8 | 228 | int ret; |
2f7ca802 SG |
229 | |
230 | mutex_lock(&dev->phy_mutex); | |
231 | ||
232 | /* confirm MII not busy */ | |
e5e3af83 | 233 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
234 | if (ret < 0) { |
235 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); | |
236 | goto done; | |
237 | } | |
2f7ca802 SG |
238 | |
239 | val = regval; | |
e5e3af83 | 240 | ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); |
b052e073 SG |
241 | if (ret < 0) { |
242 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
243 | goto done; | |
244 | } | |
2f7ca802 SG |
245 | |
246 | /* set the address, index & direction (write to PHY) */ | |
247 | phy_id &= dev->mii.phy_id_mask; | |
248 | idx &= dev->mii.reg_num_mask; | |
80928805 | 249 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; |
e5e3af83 | 250 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
251 | if (ret < 0) { |
252 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
253 | goto done; | |
254 | } | |
2f7ca802 | 255 | |
e5e3af83 | 256 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
257 | if (ret < 0) { |
258 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
259 | goto done; | |
260 | } | |
2f7ca802 | 261 | |
769ea6d8 | 262 | done: |
2f7ca802 SG |
263 | mutex_unlock(&dev->phy_mutex); |
264 | } | |
265 | ||
e5e3af83 SG |
266 | static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id, |
267 | int idx) | |
268 | { | |
269 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 1); | |
270 | } | |
271 | ||
272 | static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id, | |
273 | int idx, int regval) | |
274 | { | |
275 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); | |
276 | } | |
277 | ||
278 | static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
279 | { | |
280 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 0); | |
281 | } | |
282 | ||
283 | static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
284 | int regval) | |
285 | { | |
286 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); | |
287 | } | |
288 | ||
769ea6d8 | 289 | static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) |
2f7ca802 SG |
290 | { |
291 | unsigned long start_time = jiffies; | |
292 | u32 val; | |
769ea6d8 | 293 | int ret; |
2f7ca802 SG |
294 | |
295 | do { | |
769ea6d8 | 296 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
297 | if (ret < 0) { |
298 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
299 | return ret; | |
300 | } | |
301 | ||
2f7ca802 SG |
302 | if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
303 | break; | |
304 | udelay(40); | |
305 | } while (!time_after(jiffies, start_time + HZ)); | |
306 | ||
307 | if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { | |
60b86755 | 308 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
2f7ca802 SG |
309 | return -EIO; |
310 | } | |
311 | ||
312 | return 0; | |
313 | } | |
314 | ||
769ea6d8 | 315 | static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) |
2f7ca802 SG |
316 | { |
317 | unsigned long start_time = jiffies; | |
318 | u32 val; | |
769ea6d8 | 319 | int ret; |
2f7ca802 SG |
320 | |
321 | do { | |
769ea6d8 | 322 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
323 | if (ret < 0) { |
324 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
325 | return ret; | |
326 | } | |
2f7ca802 | 327 | |
2f7ca802 SG |
328 | if (!(val & E2P_CMD_BUSY_)) |
329 | return 0; | |
330 | ||
331 | udelay(40); | |
332 | } while (!time_after(jiffies, start_time + HZ)); | |
333 | ||
60b86755 | 334 | netdev_warn(dev->net, "EEPROM is busy\n"); |
2f7ca802 SG |
335 | return -EIO; |
336 | } | |
337 | ||
338 | static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
339 | u8 *data) | |
340 | { | |
341 | u32 val; | |
342 | int i, ret; | |
343 | ||
344 | BUG_ON(!dev); | |
345 | BUG_ON(!data); | |
346 | ||
347 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
348 | if (ret) | |
349 | return ret; | |
350 | ||
351 | for (i = 0; i < length; i++) { | |
352 | val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 353 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
354 | if (ret < 0) { |
355 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
356 | return ret; | |
357 | } | |
2f7ca802 SG |
358 | |
359 | ret = smsc95xx_wait_eeprom(dev); | |
360 | if (ret < 0) | |
361 | return ret; | |
362 | ||
769ea6d8 | 363 | ret = smsc95xx_read_reg(dev, E2P_DATA, &val); |
b052e073 SG |
364 | if (ret < 0) { |
365 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
366 | return ret; | |
367 | } | |
2f7ca802 SG |
368 | |
369 | data[i] = val & 0xFF; | |
370 | offset++; | |
371 | } | |
372 | ||
373 | return 0; | |
374 | } | |
375 | ||
376 | static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
377 | u8 *data) | |
378 | { | |
379 | u32 val; | |
380 | int i, ret; | |
381 | ||
382 | BUG_ON(!dev); | |
383 | BUG_ON(!data); | |
384 | ||
385 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
386 | if (ret) | |
387 | return ret; | |
388 | ||
389 | /* Issue write/erase enable command */ | |
390 | val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; | |
769ea6d8 | 391 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
392 | if (ret < 0) { |
393 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
394 | return ret; | |
395 | } | |
2f7ca802 SG |
396 | |
397 | ret = smsc95xx_wait_eeprom(dev); | |
398 | if (ret < 0) | |
399 | return ret; | |
400 | ||
401 | for (i = 0; i < length; i++) { | |
402 | ||
403 | /* Fill data register */ | |
404 | val = data[i]; | |
769ea6d8 | 405 | ret = smsc95xx_write_reg(dev, E2P_DATA, val); |
b052e073 SG |
406 | if (ret < 0) { |
407 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
408 | return ret; | |
409 | } | |
2f7ca802 SG |
410 | |
411 | /* Send "write" command */ | |
412 | val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 413 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
414 | if (ret < 0) { |
415 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
416 | return ret; | |
417 | } | |
2f7ca802 SG |
418 | |
419 | ret = smsc95xx_wait_eeprom(dev); | |
420 | if (ret < 0) | |
421 | return ret; | |
422 | ||
423 | offset++; | |
424 | } | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
769ea6d8 | 429 | static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, |
7b9e7580 | 430 | u32 data) |
2f7ca802 | 431 | { |
1d74a6bd | 432 | const u16 size = 4; |
7b9e7580 | 433 | u32 buf; |
72108fd2 | 434 | int ret; |
2f7ca802 | 435 | |
7b9e7580 SG |
436 | buf = data; |
437 | cpu_to_le32s(&buf); | |
438 | ||
72108fd2 ML |
439 | ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, |
440 | USB_DIR_OUT | USB_TYPE_VENDOR | | |
441 | USB_RECIP_DEVICE, | |
7b9e7580 | 442 | 0, index, &buf, size); |
72108fd2 ML |
443 | if (ret < 0) |
444 | netdev_warn(dev->net, "Error write async cmd, sts=%d\n", | |
445 | ret); | |
446 | return ret; | |
2f7ca802 SG |
447 | } |
448 | ||
449 | /* returns hash bit number for given MAC address | |
450 | * example: | |
451 | * 01 00 5E 00 00 01 -> returns bit number 31 */ | |
452 | static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) | |
453 | { | |
454 | return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; | |
455 | } | |
456 | ||
457 | static void smsc95xx_set_multicast(struct net_device *netdev) | |
458 | { | |
459 | struct usbnet *dev = netdev_priv(netdev); | |
460 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
2f7ca802 | 461 | unsigned long flags; |
769ea6d8 | 462 | int ret; |
2f7ca802 | 463 | |
3c0f3c60 MZ |
464 | pdata->hash_hi = 0; |
465 | pdata->hash_lo = 0; | |
466 | ||
2f7ca802 SG |
467 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); |
468 | ||
469 | if (dev->net->flags & IFF_PROMISC) { | |
a475f603 | 470 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
2f7ca802 SG |
471 | pdata->mac_cr |= MAC_CR_PRMS_; |
472 | pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
473 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
a475f603 | 474 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
2f7ca802 SG |
475 | pdata->mac_cr |= MAC_CR_MCPAS_; |
476 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); | |
4cd24eaf | 477 | } else if (!netdev_mc_empty(dev->net)) { |
22bedad3 | 478 | struct netdev_hw_addr *ha; |
2f7ca802 SG |
479 | |
480 | pdata->mac_cr |= MAC_CR_HPFILT_; | |
481 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
482 | ||
22bedad3 JP |
483 | netdev_for_each_mc_addr(ha, netdev) { |
484 | u32 bitnum = smsc95xx_hash(ha->addr); | |
a92635dc JP |
485 | u32 mask = 0x01 << (bitnum & 0x1F); |
486 | if (bitnum & 0x20) | |
3c0f3c60 | 487 | pdata->hash_hi |= mask; |
a92635dc | 488 | else |
3c0f3c60 | 489 | pdata->hash_lo |= mask; |
2f7ca802 SG |
490 | } |
491 | ||
a475f603 | 492 | netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", |
3c0f3c60 | 493 | pdata->hash_hi, pdata->hash_lo); |
2f7ca802 | 494 | } else { |
a475f603 | 495 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
2f7ca802 SG |
496 | pdata->mac_cr &= |
497 | ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
498 | } | |
499 | ||
500 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
501 | ||
502 | /* Initiate async writes, as we can't wait for completion here */ | |
7b9e7580 | 503 | ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); |
b052e073 SG |
504 | if (ret < 0) |
505 | netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); | |
769ea6d8 | 506 | |
7b9e7580 | 507 | ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); |
b052e073 SG |
508 | if (ret < 0) |
509 | netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); | |
769ea6d8 | 510 | |
7b9e7580 | 511 | ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); |
b052e073 SG |
512 | if (ret < 0) |
513 | netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); | |
2f7ca802 SG |
514 | } |
515 | ||
769ea6d8 SG |
516 | static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, |
517 | u16 lcladv, u16 rmtadv) | |
2f7ca802 SG |
518 | { |
519 | u32 flow, afc_cfg = 0; | |
520 | ||
521 | int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); | |
e360a8b4 | 522 | if (ret < 0) |
b052e073 | 523 | return ret; |
2f7ca802 SG |
524 | |
525 | if (duplex == DUPLEX_FULL) { | |
bc02ff95 | 526 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); |
2f7ca802 SG |
527 | |
528 | if (cap & FLOW_CTRL_RX) | |
529 | flow = 0xFFFF0002; | |
530 | else | |
531 | flow = 0; | |
532 | ||
533 | if (cap & FLOW_CTRL_TX) | |
534 | afc_cfg |= 0xF; | |
535 | else | |
536 | afc_cfg &= ~0xF; | |
537 | ||
a475f603 | 538 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
60b86755 JP |
539 | cap & FLOW_CTRL_RX ? "enabled" : "disabled", |
540 | cap & FLOW_CTRL_TX ? "enabled" : "disabled"); | |
2f7ca802 | 541 | } else { |
a475f603 | 542 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
2f7ca802 SG |
543 | flow = 0; |
544 | afc_cfg |= 0xF; | |
545 | } | |
546 | ||
769ea6d8 | 547 | ret = smsc95xx_write_reg(dev, FLOW, flow); |
b052e073 | 548 | if (ret < 0) |
e360a8b4 | 549 | return ret; |
769ea6d8 | 550 | |
e360a8b4 | 551 | return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); |
2f7ca802 SG |
552 | } |
553 | ||
554 | static int smsc95xx_link_reset(struct usbnet *dev) | |
555 | { | |
556 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
557 | struct mii_if_info *mii = &dev->mii; | |
8ae6daca | 558 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
2f7ca802 SG |
559 | unsigned long flags; |
560 | u16 lcladv, rmtadv; | |
769ea6d8 | 561 | int ret; |
2f7ca802 SG |
562 | |
563 | /* clear interrupt status */ | |
769ea6d8 | 564 | ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); |
e360a8b4 | 565 | if (ret < 0) |
b052e073 | 566 | return ret; |
769ea6d8 SG |
567 | |
568 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); | |
e360a8b4 | 569 | if (ret < 0) |
b052e073 | 570 | return ret; |
2f7ca802 SG |
571 | |
572 | mii_check_media(mii, 1, 1); | |
573 | mii_ethtool_gset(&dev->mii, &ecmd); | |
574 | lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
575 | rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
576 | ||
8ae6daca DD |
577 | netif_dbg(dev, link, dev->net, |
578 | "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", | |
579 | ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); | |
2f7ca802 SG |
580 | |
581 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
582 | if (ecmd.duplex != DUPLEX_FULL) { | |
583 | pdata->mac_cr &= ~MAC_CR_FDPX_; | |
584 | pdata->mac_cr |= MAC_CR_RCVOWN_; | |
585 | } else { | |
586 | pdata->mac_cr &= ~MAC_CR_RCVOWN_; | |
587 | pdata->mac_cr |= MAC_CR_FDPX_; | |
588 | } | |
589 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
590 | ||
769ea6d8 | 591 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 592 | if (ret < 0) |
b052e073 | 593 | return ret; |
2f7ca802 | 594 | |
769ea6d8 | 595 | ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); |
b052e073 SG |
596 | if (ret < 0) |
597 | netdev_warn(dev->net, "Error updating PHY flow control\n"); | |
2f7ca802 | 598 | |
b052e073 | 599 | return ret; |
2f7ca802 SG |
600 | } |
601 | ||
602 | static void smsc95xx_status(struct usbnet *dev, struct urb *urb) | |
603 | { | |
604 | u32 intdata; | |
605 | ||
606 | if (urb->actual_length != 4) { | |
60b86755 JP |
607 | netdev_warn(dev->net, "unexpected urb length %d\n", |
608 | urb->actual_length); | |
2f7ca802 SG |
609 | return; |
610 | } | |
611 | ||
612 | memcpy(&intdata, urb->transfer_buffer, 4); | |
1d74a6bd | 613 | le32_to_cpus(&intdata); |
2f7ca802 | 614 | |
a475f603 | 615 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
2f7ca802 SG |
616 | |
617 | if (intdata & INT_ENP_PHY_INT_) | |
618 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
619 | else | |
60b86755 JP |
620 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
621 | intdata); | |
2f7ca802 SG |
622 | } |
623 | ||
f7b29271 | 624 | /* Enable or disable Tx & Rx checksum offload engines */ |
c8f44aff MM |
625 | static int smsc95xx_set_features(struct net_device *netdev, |
626 | netdev_features_t features) | |
2f7ca802 | 627 | { |
78e47fe4 | 628 | struct usbnet *dev = netdev_priv(netdev); |
2f7ca802 | 629 | u32 read_buf; |
78e47fe4 MM |
630 | int ret; |
631 | ||
632 | ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); | |
e360a8b4 | 633 | if (ret < 0) |
b052e073 | 634 | return ret; |
2f7ca802 | 635 | |
78e47fe4 | 636 | if (features & NETIF_F_HW_CSUM) |
f7b29271 SG |
637 | read_buf |= Tx_COE_EN_; |
638 | else | |
639 | read_buf &= ~Tx_COE_EN_; | |
640 | ||
78e47fe4 | 641 | if (features & NETIF_F_RXCSUM) |
2f7ca802 SG |
642 | read_buf |= Rx_COE_EN_; |
643 | else | |
644 | read_buf &= ~Rx_COE_EN_; | |
645 | ||
646 | ret = smsc95xx_write_reg(dev, COE_CR, read_buf); | |
e360a8b4 | 647 | if (ret < 0) |
b052e073 | 648 | return ret; |
2f7ca802 | 649 | |
a475f603 | 650 | netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); |
2f7ca802 SG |
651 | return 0; |
652 | } | |
653 | ||
654 | static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) | |
655 | { | |
656 | return MAX_EEPROM_SIZE; | |
657 | } | |
658 | ||
659 | static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, | |
660 | struct ethtool_eeprom *ee, u8 *data) | |
661 | { | |
662 | struct usbnet *dev = netdev_priv(netdev); | |
663 | ||
664 | ee->magic = LAN95XX_EEPROM_MAGIC; | |
665 | ||
666 | return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); | |
667 | } | |
668 | ||
669 | static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, | |
670 | struct ethtool_eeprom *ee, u8 *data) | |
671 | { | |
672 | struct usbnet *dev = netdev_priv(netdev); | |
673 | ||
674 | if (ee->magic != LAN95XX_EEPROM_MAGIC) { | |
60b86755 JP |
675 | netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", |
676 | ee->magic); | |
2f7ca802 SG |
677 | return -EINVAL; |
678 | } | |
679 | ||
680 | return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); | |
681 | } | |
682 | ||
9fa32e94 EV |
683 | static int smsc95xx_ethtool_getregslen(struct net_device *netdev) |
684 | { | |
685 | /* all smsc95xx registers */ | |
96245317 | 686 | return COE_CR - ID_REV + sizeof(u32); |
9fa32e94 EV |
687 | } |
688 | ||
689 | static void | |
690 | smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, | |
691 | void *buf) | |
692 | { | |
693 | struct usbnet *dev = netdev_priv(netdev); | |
d348446b DC |
694 | unsigned int i, j; |
695 | int retval; | |
9fa32e94 EV |
696 | u32 *data = buf; |
697 | ||
698 | retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); | |
699 | if (retval < 0) { | |
700 | netdev_warn(netdev, "REGS: cannot read ID_REV\n"); | |
701 | return; | |
702 | } | |
703 | ||
704 | for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { | |
705 | retval = smsc95xx_read_reg(dev, i, &data[j]); | |
706 | if (retval < 0) { | |
707 | netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); | |
708 | return; | |
709 | } | |
710 | } | |
711 | } | |
712 | ||
e0e474a8 SG |
713 | static void smsc95xx_ethtool_get_wol(struct net_device *net, |
714 | struct ethtool_wolinfo *wolinfo) | |
715 | { | |
716 | struct usbnet *dev = netdev_priv(net); | |
717 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
718 | ||
719 | wolinfo->supported = SUPPORTED_WAKE; | |
720 | wolinfo->wolopts = pdata->wolopts; | |
721 | } | |
722 | ||
723 | static int smsc95xx_ethtool_set_wol(struct net_device *net, | |
724 | struct ethtool_wolinfo *wolinfo) | |
725 | { | |
726 | struct usbnet *dev = netdev_priv(net); | |
727 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
3b14692c | 728 | int ret; |
e0e474a8 SG |
729 | |
730 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; | |
3b14692c SG |
731 | |
732 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
b052e073 SG |
733 | if (ret < 0) |
734 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
3b14692c | 735 | |
b052e073 | 736 | return ret; |
e0e474a8 SG |
737 | } |
738 | ||
0fc0b732 | 739 | static const struct ethtool_ops smsc95xx_ethtool_ops = { |
2f7ca802 SG |
740 | .get_link = usbnet_get_link, |
741 | .nway_reset = usbnet_nway_reset, | |
742 | .get_drvinfo = usbnet_get_drvinfo, | |
743 | .get_msglevel = usbnet_get_msglevel, | |
744 | .set_msglevel = usbnet_set_msglevel, | |
745 | .get_settings = usbnet_get_settings, | |
746 | .set_settings = usbnet_set_settings, | |
747 | .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, | |
748 | .get_eeprom = smsc95xx_ethtool_get_eeprom, | |
749 | .set_eeprom = smsc95xx_ethtool_set_eeprom, | |
9fa32e94 EV |
750 | .get_regs_len = smsc95xx_ethtool_getregslen, |
751 | .get_regs = smsc95xx_ethtool_getregs, | |
e0e474a8 SG |
752 | .get_wol = smsc95xx_ethtool_get_wol, |
753 | .set_wol = smsc95xx_ethtool_set_wol, | |
2f7ca802 SG |
754 | }; |
755 | ||
756 | static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
757 | { | |
758 | struct usbnet *dev = netdev_priv(netdev); | |
759 | ||
760 | if (!netif_running(netdev)) | |
761 | return -EINVAL; | |
762 | ||
763 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
764 | } | |
765 | ||
766 | static void smsc95xx_init_mac_address(struct usbnet *dev) | |
767 | { | |
768 | /* try reading mac address from EEPROM */ | |
769 | if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
770 | dev->net->dev_addr) == 0) { | |
771 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
772 | /* eeprom values are valid so use them */ | |
a475f603 | 773 | netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); |
2f7ca802 SG |
774 | return; |
775 | } | |
776 | } | |
777 | ||
778 | /* no eeprom, or eeprom values are invalid. generate random MAC */ | |
f2cedb63 | 779 | eth_hw_addr_random(dev->net); |
c7e12ead | 780 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
2f7ca802 SG |
781 | } |
782 | ||
783 | static int smsc95xx_set_mac_address(struct usbnet *dev) | |
784 | { | |
785 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
786 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
787 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
788 | int ret; | |
789 | ||
790 | ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); | |
b052e073 | 791 | if (ret < 0) |
e360a8b4 | 792 | return ret; |
2f7ca802 | 793 | |
e360a8b4 | 794 | return smsc95xx_write_reg(dev, ADDRH, addr_hi); |
2f7ca802 SG |
795 | } |
796 | ||
797 | /* starts the TX path */ | |
769ea6d8 | 798 | static int smsc95xx_start_tx_path(struct usbnet *dev) |
2f7ca802 SG |
799 | { |
800 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
801 | unsigned long flags; | |
769ea6d8 | 802 | int ret; |
2f7ca802 SG |
803 | |
804 | /* Enable Tx at MAC */ | |
805 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
806 | pdata->mac_cr |= MAC_CR_TXEN_; | |
807 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
808 | ||
769ea6d8 | 809 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 810 | if (ret < 0) |
b052e073 | 811 | return ret; |
2f7ca802 SG |
812 | |
813 | /* Enable Tx at SCSRs */ | |
e360a8b4 | 814 | return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); |
2f7ca802 SG |
815 | } |
816 | ||
817 | /* Starts the Receive path */ | |
ec32115d | 818 | static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm) |
2f7ca802 SG |
819 | { |
820 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
821 | unsigned long flags; | |
822 | ||
823 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
824 | pdata->mac_cr |= MAC_CR_RXEN_; | |
825 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
826 | ||
e360a8b4 | 827 | return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); |
2f7ca802 SG |
828 | } |
829 | ||
830 | static int smsc95xx_phy_initialize(struct usbnet *dev) | |
831 | { | |
769ea6d8 | 832 | int bmcr, ret, timeout = 0; |
db443c44 | 833 | |
2f7ca802 SG |
834 | /* Initialize MII structure */ |
835 | dev->mii.dev = dev->net; | |
836 | dev->mii.mdio_read = smsc95xx_mdio_read; | |
837 | dev->mii.mdio_write = smsc95xx_mdio_write; | |
838 | dev->mii.phy_id_mask = 0x1f; | |
839 | dev->mii.reg_num_mask = 0x1f; | |
840 | dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; | |
841 | ||
db443c44 | 842 | /* reset phy and wait for reset to complete */ |
2f7ca802 | 843 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
db443c44 SG |
844 | |
845 | do { | |
846 | msleep(10); | |
847 | bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
848 | timeout++; | |
d9460920 | 849 | } while ((bmcr & BMCR_RESET) && (timeout < 100)); |
db443c44 SG |
850 | |
851 | if (timeout >= 100) { | |
852 | netdev_warn(dev->net, "timeout on PHY Reset"); | |
853 | return -EIO; | |
854 | } | |
855 | ||
2f7ca802 SG |
856 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
857 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
858 | ADVERTISE_PAUSE_ASYM); | |
859 | ||
860 | /* read to clear */ | |
769ea6d8 | 861 | ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); |
b052e073 SG |
862 | if (ret < 0) { |
863 | netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); | |
864 | return ret; | |
865 | } | |
2f7ca802 SG |
866 | |
867 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
868 | PHY_INT_MASK_DEFAULT_); | |
869 | mii_nway_restart(&dev->mii); | |
870 | ||
a475f603 | 871 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); |
2f7ca802 SG |
872 | return 0; |
873 | } | |
874 | ||
875 | static int smsc95xx_reset(struct usbnet *dev) | |
876 | { | |
877 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
878 | u32 read_buf, write_buf, burst_cap; | |
879 | int ret = 0, timeout; | |
2f7ca802 | 880 | |
a475f603 | 881 | netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); |
2f7ca802 | 882 | |
4436761b | 883 | ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); |
e360a8b4 | 884 | if (ret < 0) |
b052e073 | 885 | return ret; |
2f7ca802 SG |
886 | |
887 | timeout = 0; | |
888 | do { | |
cf2acec2 | 889 | msleep(10); |
2f7ca802 | 890 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); |
e360a8b4 | 891 | if (ret < 0) |
b052e073 | 892 | return ret; |
2f7ca802 SG |
893 | timeout++; |
894 | } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); | |
895 | ||
896 | if (timeout >= 100) { | |
60b86755 | 897 | netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); |
2f7ca802 SG |
898 | return ret; |
899 | } | |
900 | ||
4436761b | 901 | ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); |
e360a8b4 | 902 | if (ret < 0) |
b052e073 | 903 | return ret; |
2f7ca802 SG |
904 | |
905 | timeout = 0; | |
906 | do { | |
cf2acec2 | 907 | msleep(10); |
2f7ca802 | 908 | ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); |
e360a8b4 | 909 | if (ret < 0) |
b052e073 | 910 | return ret; |
2f7ca802 SG |
911 | timeout++; |
912 | } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); | |
913 | ||
914 | if (timeout >= 100) { | |
60b86755 | 915 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); |
2f7ca802 SG |
916 | return ret; |
917 | } | |
918 | ||
2f7ca802 SG |
919 | ret = smsc95xx_set_mac_address(dev); |
920 | if (ret < 0) | |
921 | return ret; | |
922 | ||
1e1d7412 JP |
923 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
924 | dev->net->dev_addr); | |
2f7ca802 SG |
925 | |
926 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 927 | if (ret < 0) |
b052e073 | 928 | return ret; |
2f7ca802 | 929 | |
1e1d7412 JP |
930 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
931 | read_buf); | |
2f7ca802 SG |
932 | |
933 | read_buf |= HW_CFG_BIR_; | |
934 | ||
935 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 936 | if (ret < 0) |
b052e073 | 937 | return ret; |
2f7ca802 SG |
938 | |
939 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 940 | if (ret < 0) |
b052e073 | 941 | return ret; |
b052e073 | 942 | |
a475f603 JP |
943 | netif_dbg(dev, ifup, dev->net, |
944 | "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", | |
945 | read_buf); | |
2f7ca802 SG |
946 | |
947 | if (!turbo_mode) { | |
948 | burst_cap = 0; | |
949 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
950 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
951 | burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
952 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
953 | } else { | |
954 | burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
955 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
956 | } | |
957 | ||
1e1d7412 JP |
958 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
959 | (ulong)dev->rx_urb_size); | |
2f7ca802 SG |
960 | |
961 | ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); | |
e360a8b4 | 962 | if (ret < 0) |
b052e073 | 963 | return ret; |
2f7ca802 SG |
964 | |
965 | ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); | |
e360a8b4 | 966 | if (ret < 0) |
b052e073 | 967 | return ret; |
769ea6d8 | 968 | |
a475f603 JP |
969 | netif_dbg(dev, ifup, dev->net, |
970 | "Read Value from BURST_CAP after writing: 0x%08x\n", | |
971 | read_buf); | |
2f7ca802 | 972 | |
4436761b | 973 | ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); |
e360a8b4 | 974 | if (ret < 0) |
b052e073 | 975 | return ret; |
2f7ca802 SG |
976 | |
977 | ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); | |
e360a8b4 | 978 | if (ret < 0) |
b052e073 | 979 | return ret; |
769ea6d8 | 980 | |
a475f603 JP |
981 | netif_dbg(dev, ifup, dev->net, |
982 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", | |
983 | read_buf); | |
2f7ca802 SG |
984 | |
985 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 986 | if (ret < 0) |
b052e073 | 987 | return ret; |
769ea6d8 | 988 | |
1e1d7412 JP |
989 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", |
990 | read_buf); | |
2f7ca802 SG |
991 | |
992 | if (turbo_mode) | |
993 | read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); | |
994 | ||
995 | read_buf &= ~HW_CFG_RXDOFF_; | |
996 | ||
997 | /* set Rx data offset=2, Make IP header aligns on word boundary. */ | |
998 | read_buf |= NET_IP_ALIGN << 9; | |
999 | ||
1000 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 1001 | if (ret < 0) |
b052e073 | 1002 | return ret; |
2f7ca802 SG |
1003 | |
1004 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1005 | if (ret < 0) |
b052e073 | 1006 | return ret; |
769ea6d8 | 1007 | |
a475f603 JP |
1008 | netif_dbg(dev, ifup, dev->net, |
1009 | "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); | |
2f7ca802 | 1010 | |
4436761b | 1011 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); |
e360a8b4 | 1012 | if (ret < 0) |
b052e073 | 1013 | return ret; |
2f7ca802 SG |
1014 | |
1015 | ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); | |
e360a8b4 | 1016 | if (ret < 0) |
b052e073 | 1017 | return ret; |
a475f603 | 1018 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); |
2f7ca802 | 1019 | |
f293501c SG |
1020 | /* Configure GPIO pins as LED outputs */ |
1021 | write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | | |
1022 | LED_GPIO_CFG_FDX_LED; | |
1023 | ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); | |
e360a8b4 | 1024 | if (ret < 0) |
b052e073 | 1025 | return ret; |
f293501c | 1026 | |
2f7ca802 | 1027 | /* Init Tx */ |
4436761b | 1028 | ret = smsc95xx_write_reg(dev, FLOW, 0); |
e360a8b4 | 1029 | if (ret < 0) |
b052e073 | 1030 | return ret; |
2f7ca802 | 1031 | |
4436761b | 1032 | ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); |
e360a8b4 | 1033 | if (ret < 0) |
b052e073 | 1034 | return ret; |
2f7ca802 SG |
1035 | |
1036 | /* Don't need mac_cr_lock during initialisation */ | |
1037 | ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); | |
e360a8b4 | 1038 | if (ret < 0) |
b052e073 | 1039 | return ret; |
2f7ca802 SG |
1040 | |
1041 | /* Init Rx */ | |
1042 | /* Set Vlan */ | |
4436761b | 1043 | ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); |
e360a8b4 | 1044 | if (ret < 0) |
b052e073 | 1045 | return ret; |
2f7ca802 | 1046 | |
f7b29271 | 1047 | /* Enable or disable checksum offload engines */ |
769ea6d8 | 1048 | ret = smsc95xx_set_features(dev->net, dev->net->features); |
b052e073 SG |
1049 | if (ret < 0) { |
1050 | netdev_warn(dev->net, "Failed to set checksum offload features\n"); | |
1051 | return ret; | |
1052 | } | |
2f7ca802 SG |
1053 | |
1054 | smsc95xx_set_multicast(dev->net); | |
1055 | ||
769ea6d8 | 1056 | ret = smsc95xx_phy_initialize(dev); |
b052e073 SG |
1057 | if (ret < 0) { |
1058 | netdev_warn(dev->net, "Failed to init PHY\n"); | |
1059 | return ret; | |
1060 | } | |
2f7ca802 SG |
1061 | |
1062 | ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); | |
e360a8b4 | 1063 | if (ret < 0) |
b052e073 | 1064 | return ret; |
2f7ca802 SG |
1065 | |
1066 | /* enable PHY interrupts */ | |
1067 | read_buf |= INT_EP_CTL_PHY_INT_; | |
1068 | ||
1069 | ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); | |
e360a8b4 | 1070 | if (ret < 0) |
b052e073 | 1071 | return ret; |
2f7ca802 | 1072 | |
769ea6d8 | 1073 | ret = smsc95xx_start_tx_path(dev); |
b052e073 SG |
1074 | if (ret < 0) { |
1075 | netdev_warn(dev->net, "Failed to start TX path\n"); | |
1076 | return ret; | |
1077 | } | |
769ea6d8 | 1078 | |
ec32115d | 1079 | ret = smsc95xx_start_rx_path(dev, 0); |
b052e073 SG |
1080 | if (ret < 0) { |
1081 | netdev_warn(dev->net, "Failed to start RX path\n"); | |
1082 | return ret; | |
1083 | } | |
2f7ca802 | 1084 | |
a475f603 | 1085 | netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); |
2f7ca802 SG |
1086 | return 0; |
1087 | } | |
1088 | ||
63e77b39 SH |
1089 | static const struct net_device_ops smsc95xx_netdev_ops = { |
1090 | .ndo_open = usbnet_open, | |
1091 | .ndo_stop = usbnet_stop, | |
1092 | .ndo_start_xmit = usbnet_start_xmit, | |
1093 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1094 | .ndo_change_mtu = usbnet_change_mtu, | |
1095 | .ndo_set_mac_address = eth_mac_addr, | |
1096 | .ndo_validate_addr = eth_validate_addr, | |
1097 | .ndo_do_ioctl = smsc95xx_ioctl, | |
afc4b13d | 1098 | .ndo_set_rx_mode = smsc95xx_set_multicast, |
78e47fe4 | 1099 | .ndo_set_features = smsc95xx_set_features, |
63e77b39 SH |
1100 | }; |
1101 | ||
2f7ca802 SG |
1102 | static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) |
1103 | { | |
1104 | struct smsc95xx_priv *pdata = NULL; | |
bbd9f9ee | 1105 | u32 val; |
2f7ca802 SG |
1106 | int ret; |
1107 | ||
1108 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1109 | ||
1110 | ret = usbnet_get_endpoints(dev, intf); | |
b052e073 SG |
1111 | if (ret < 0) { |
1112 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1113 | return ret; | |
1114 | } | |
2f7ca802 SG |
1115 | |
1116 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), | |
38673c82 | 1117 | GFP_KERNEL); |
2f7ca802 SG |
1118 | |
1119 | pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
38673c82 | 1120 | if (!pdata) |
2f7ca802 | 1121 | return -ENOMEM; |
2f7ca802 SG |
1122 | |
1123 | spin_lock_init(&pdata->mac_cr_lock); | |
1124 | ||
78e47fe4 MM |
1125 | if (DEFAULT_TX_CSUM_ENABLE) |
1126 | dev->net->features |= NETIF_F_HW_CSUM; | |
1127 | if (DEFAULT_RX_CSUM_ENABLE) | |
1128 | dev->net->features |= NETIF_F_RXCSUM; | |
1129 | ||
1130 | dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; | |
2f7ca802 | 1131 | |
f4e8ab7c BB |
1132 | smsc95xx_init_mac_address(dev); |
1133 | ||
2f7ca802 SG |
1134 | /* Init all registers */ |
1135 | ret = smsc95xx_reset(dev); | |
1136 | ||
bbd9f9ee SG |
1137 | /* detect device revision as different features may be available */ |
1138 | ret = smsc95xx_read_reg(dev, ID_REV, &val); | |
e360a8b4 | 1139 | if (ret < 0) |
b052e073 | 1140 | return ret; |
bbd9f9ee | 1141 | val >>= 16; |
9ebca507 SG |
1142 | |
1143 | if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || | |
1144 | (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) | |
1145 | pdata->features = (FEATURE_8_WAKEUP_FILTERS | | |
1146 | FEATURE_PHY_NLP_CROSSOVER | | |
eb970ff0 | 1147 | FEATURE_REMOTE_WAKEUP); |
9ebca507 SG |
1148 | else if (val == ID_REV_CHIP_ID_9512_) |
1149 | pdata->features = FEATURE_8_WAKEUP_FILTERS; | |
bbd9f9ee | 1150 | |
63e77b39 | 1151 | dev->net->netdev_ops = &smsc95xx_netdev_ops; |
2f7ca802 | 1152 | dev->net->ethtool_ops = &smsc95xx_ethtool_ops; |
2f7ca802 | 1153 | dev->net->flags |= IFF_MULTICAST; |
78e47fe4 | 1154 | dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; |
9bbf5660 | 1155 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
2f7ca802 SG |
1156 | return 0; |
1157 | } | |
1158 | ||
1159 | static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1160 | { | |
1161 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1162 | if (pdata) { | |
a475f603 | 1163 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
2f7ca802 SG |
1164 | kfree(pdata); |
1165 | pdata = NULL; | |
1166 | dev->data[0] = 0; | |
1167 | } | |
1168 | } | |
1169 | ||
068bb1a7 | 1170 | static u32 smsc_crc(const u8 *buffer, size_t len, int filter) |
bbd9f9ee | 1171 | { |
068bb1a7 SG |
1172 | u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); |
1173 | return crc << ((filter % 2) * 16); | |
bbd9f9ee SG |
1174 | } |
1175 | ||
e5e3af83 SG |
1176 | static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) |
1177 | { | |
1178 | struct mii_if_info *mii = &dev->mii; | |
1179 | int ret; | |
1180 | ||
1e1d7412 | 1181 | netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); |
e5e3af83 SG |
1182 | |
1183 | /* read to clear */ | |
1184 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); | |
e360a8b4 | 1185 | if (ret < 0) |
b052e073 | 1186 | return ret; |
e5e3af83 SG |
1187 | |
1188 | /* enable interrupt source */ | |
1189 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); | |
e360a8b4 | 1190 | if (ret < 0) |
b052e073 | 1191 | return ret; |
e5e3af83 SG |
1192 | |
1193 | ret |= mask; | |
1194 | ||
1195 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); | |
1196 | ||
1197 | return 0; | |
1198 | } | |
1199 | ||
1200 | static int smsc95xx_link_ok_nopm(struct usbnet *dev) | |
1201 | { | |
1202 | struct mii_if_info *mii = &dev->mii; | |
1203 | int ret; | |
1204 | ||
1205 | /* first, a dummy read, needed to latch some MII phys */ | |
1206 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1207 | if (ret < 0) |
b052e073 | 1208 | return ret; |
e5e3af83 SG |
1209 | |
1210 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1211 | if (ret < 0) |
b052e073 | 1212 | return ret; |
e5e3af83 SG |
1213 | |
1214 | return !!(ret & BMSR_LSTATUS); | |
1215 | } | |
1216 | ||
319b95b5 SG |
1217 | static int smsc95xx_enter_suspend0(struct usbnet *dev) |
1218 | { | |
1219 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1220 | u32 val; | |
1221 | int ret; | |
1222 | ||
1223 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1224 | if (ret < 0) |
b052e073 | 1225 | return ret; |
319b95b5 SG |
1226 | |
1227 | val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); | |
1228 | val |= PM_CTL_SUS_MODE_0; | |
1229 | ||
1230 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1231 | if (ret < 0) |
b052e073 | 1232 | return ret; |
319b95b5 SG |
1233 | |
1234 | /* clear wol status */ | |
1235 | val &= ~PM_CTL_WUPS_; | |
1236 | val |= PM_CTL_WUPS_WOL_; | |
1237 | ||
1238 | /* enable energy detection */ | |
1239 | if (pdata->wolopts & WAKE_PHY) | |
1240 | val |= PM_CTL_WUPS_ED_; | |
1241 | ||
1242 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1243 | if (ret < 0) |
b052e073 | 1244 | return ret; |
319b95b5 SG |
1245 | |
1246 | /* read back PM_CTRL */ | |
1247 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
76437214 ML |
1248 | if (ret < 0) |
1249 | return ret; | |
319b95b5 | 1250 | |
b2d4b150 SG |
1251 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
1252 | ||
76437214 | 1253 | return 0; |
319b95b5 SG |
1254 | } |
1255 | ||
1256 | static int smsc95xx_enter_suspend1(struct usbnet *dev) | |
1257 | { | |
1258 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1259 | struct mii_if_info *mii = &dev->mii; | |
1260 | u32 val; | |
1261 | int ret; | |
1262 | ||
1263 | /* reconfigure link pulse detection timing for | |
1264 | * compatibility with non-standard link partners | |
1265 | */ | |
1266 | if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) | |
1267 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, | |
1268 | PHY_EDPD_CONFIG_DEFAULT); | |
1269 | ||
1270 | /* enable energy detect power-down mode */ | |
1271 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); | |
e360a8b4 | 1272 | if (ret < 0) |
b052e073 | 1273 | return ret; |
319b95b5 SG |
1274 | |
1275 | ret |= MODE_CTRL_STS_EDPWRDOWN_; | |
1276 | ||
1277 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); | |
1278 | ||
1279 | /* enter SUSPEND1 mode */ | |
1280 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1281 | if (ret < 0) |
b052e073 | 1282 | return ret; |
319b95b5 SG |
1283 | |
1284 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1285 | val |= PM_CTL_SUS_MODE_1; | |
1286 | ||
1287 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1288 | if (ret < 0) |
b052e073 | 1289 | return ret; |
319b95b5 SG |
1290 | |
1291 | /* clear wol status, enable energy detection */ | |
1292 | val &= ~PM_CTL_WUPS_; | |
1293 | val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); | |
1294 | ||
1295 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1296 | if (ret < 0) |
1297 | return ret; | |
319b95b5 | 1298 | |
b2d4b150 SG |
1299 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
1300 | ||
76437214 | 1301 | return 0; |
319b95b5 SG |
1302 | } |
1303 | ||
1304 | static int smsc95xx_enter_suspend2(struct usbnet *dev) | |
1305 | { | |
b2d4b150 | 1306 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
319b95b5 SG |
1307 | u32 val; |
1308 | int ret; | |
1309 | ||
1310 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1311 | if (ret < 0) |
b052e073 | 1312 | return ret; |
319b95b5 SG |
1313 | |
1314 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1315 | val |= PM_CTL_SUS_MODE_2; | |
1316 | ||
1317 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1318 | if (ret < 0) |
1319 | return ret; | |
319b95b5 | 1320 | |
b2d4b150 SG |
1321 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1322 | ||
76437214 | 1323 | return 0; |
319b95b5 SG |
1324 | } |
1325 | ||
b2d4b150 SG |
1326 | static int smsc95xx_enter_suspend3(struct usbnet *dev) |
1327 | { | |
1328 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1329 | u32 val; | |
1330 | int ret; | |
1331 | ||
1332 | ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val); | |
1333 | if (ret < 0) | |
1334 | return ret; | |
1335 | ||
1336 | if (val & 0xFFFF) { | |
1337 | netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); | |
1338 | return -EBUSY; | |
1339 | } | |
1340 | ||
1341 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
1342 | if (ret < 0) | |
1343 | return ret; | |
1344 | ||
1345 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1346 | val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS; | |
1347 | ||
1348 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1349 | if (ret < 0) | |
1350 | return ret; | |
1351 | ||
1352 | /* clear wol status */ | |
1353 | val &= ~PM_CTL_WUPS_; | |
1354 | val |= PM_CTL_WUPS_WOL_; | |
1355 | ||
1356 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1357 | if (ret < 0) | |
1358 | return ret; | |
1359 | ||
1360 | pdata->suspend_flags |= SUSPEND_SUSPEND3; | |
1361 | ||
1362 | return 0; | |
1363 | } | |
1364 | ||
1365 | static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up) | |
1366 | { | |
1367 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1368 | int ret; | |
1369 | ||
1370 | if (!netif_running(dev->net)) { | |
1371 | /* interface is ifconfig down so fully power down hw */ | |
1372 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1373 | return smsc95xx_enter_suspend2(dev); | |
1374 | } | |
1375 | ||
1376 | if (!link_up) { | |
1377 | /* link is down so enter EDPD mode, but only if device can | |
1378 | * reliably resume from it. This check should be redundant | |
eb970ff0 | 1379 | * as current FEATURE_REMOTE_WAKEUP parts also support |
b2d4b150 SG |
1380 | * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */ |
1381 | if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) { | |
1382 | netdev_warn(dev->net, "EDPD not supported\n"); | |
1383 | return -EBUSY; | |
1384 | } | |
1385 | ||
1386 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
1387 | ||
1388 | /* enable PHY wakeup events for if cable is attached */ | |
1389 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1390 | PHY_INT_MASK_ANEG_COMP_); | |
1391 | if (ret < 0) { | |
1392 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1393 | return ret; | |
1394 | } | |
1395 | ||
1396 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1397 | return smsc95xx_enter_suspend1(dev); | |
1398 | } | |
1399 | ||
1400 | /* enable PHY wakeup events so we remote wakeup if cable is pulled */ | |
1401 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1402 | PHY_INT_MASK_LINK_DOWN_); | |
1403 | if (ret < 0) { | |
1404 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1405 | return ret; | |
1406 | } | |
1407 | ||
1408 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); | |
1409 | return smsc95xx_enter_suspend3(dev); | |
1410 | } | |
1411 | ||
b5a04475 SG |
1412 | static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) |
1413 | { | |
1414 | struct usbnet *dev = usb_get_intfdata(intf); | |
e0e474a8 | 1415 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
e5e3af83 | 1416 | u32 val, link_up; |
b5a04475 | 1417 | int ret; |
b5a04475 | 1418 | |
b5a04475 | 1419 | ret = usbnet_suspend(intf, message); |
b052e073 SG |
1420 | if (ret < 0) { |
1421 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
1422 | return ret; | |
1423 | } | |
b5a04475 | 1424 | |
b2d4b150 SG |
1425 | if (pdata->suspend_flags) { |
1426 | netdev_warn(dev->net, "error during last resume\n"); | |
1427 | pdata->suspend_flags = 0; | |
1428 | } | |
1429 | ||
e5e3af83 SG |
1430 | /* determine if link is up using only _nopm functions */ |
1431 | link_up = smsc95xx_link_ok_nopm(dev); | |
1432 | ||
42e21c01 | 1433 | if (message.event == PM_EVENT_AUTO_SUSPEND && |
eb970ff0 | 1434 | (pdata->features & FEATURE_REMOTE_WAKEUP)) { |
b2d4b150 SG |
1435 | ret = smsc95xx_autosuspend(dev, link_up); |
1436 | goto done; | |
1437 | } | |
1438 | ||
1439 | /* if we get this far we're not autosuspending */ | |
e5e3af83 SG |
1440 | /* if no wol options set, or if link is down and we're not waking on |
1441 | * PHY activity, enter lowest power SUSPEND2 mode | |
1442 | */ | |
1443 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1444 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1445 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
e0e474a8 SG |
1446 | |
1447 | /* disable energy detect (link up) & wake up events */ | |
ec32115d | 1448 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1449 | if (ret < 0) |
b052e073 | 1450 | goto done; |
e0e474a8 SG |
1451 | |
1452 | val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); | |
1453 | ||
ec32115d | 1454 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1455 | if (ret < 0) |
b052e073 | 1456 | goto done; |
e0e474a8 | 1457 | |
ec32115d | 1458 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1459 | if (ret < 0) |
b052e073 | 1460 | goto done; |
e0e474a8 SG |
1461 | |
1462 | val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); | |
1463 | ||
ec32115d | 1464 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1465 | if (ret < 0) |
b052e073 | 1466 | goto done; |
e0e474a8 | 1467 | |
3b9f7d8c SG |
1468 | ret = smsc95xx_enter_suspend2(dev); |
1469 | goto done; | |
e0e474a8 SG |
1470 | } |
1471 | ||
e5e3af83 SG |
1472 | if (pdata->wolopts & WAKE_PHY) { |
1473 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1474 | (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_)); | |
b052e073 SG |
1475 | if (ret < 0) { |
1476 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1477 | goto done; | |
1478 | } | |
e5e3af83 SG |
1479 | |
1480 | /* if link is down then configure EDPD and enter SUSPEND1, | |
1481 | * otherwise enter SUSPEND0 below | |
1482 | */ | |
1483 | if (!link_up) { | |
1e1d7412 | 1484 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); |
3b9f7d8c SG |
1485 | ret = smsc95xx_enter_suspend1(dev); |
1486 | goto done; | |
e5e3af83 SG |
1487 | } |
1488 | } | |
1489 | ||
bbd9f9ee | 1490 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
eed9a729 | 1491 | u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL); |
06a221be ML |
1492 | u32 command[2]; |
1493 | u32 offset[2]; | |
1494 | u32 crc[4]; | |
9ebca507 SG |
1495 | int wuff_filter_count = |
1496 | (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? | |
1497 | LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; | |
bbd9f9ee SG |
1498 | int i, filter = 0; |
1499 | ||
eed9a729 SG |
1500 | if (!filter_mask) { |
1501 | netdev_warn(dev->net, "Unable to allocate filter_mask\n"); | |
3b9f7d8c SG |
1502 | ret = -ENOMEM; |
1503 | goto done; | |
eed9a729 SG |
1504 | } |
1505 | ||
06a221be ML |
1506 | memset(command, 0, sizeof(command)); |
1507 | memset(offset, 0, sizeof(offset)); | |
1508 | memset(crc, 0, sizeof(crc)); | |
1509 | ||
bbd9f9ee SG |
1510 | if (pdata->wolopts & WAKE_BCAST) { |
1511 | const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; | |
1e1d7412 | 1512 | netdev_info(dev->net, "enabling broadcast detection\n"); |
bbd9f9ee SG |
1513 | filter_mask[filter * 4] = 0x003F; |
1514 | filter_mask[filter * 4 + 1] = 0x00; | |
1515 | filter_mask[filter * 4 + 2] = 0x00; | |
1516 | filter_mask[filter * 4 + 3] = 0x00; | |
1517 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1518 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1519 | crc[filter/2] |= smsc_crc(bcast, 6, filter); | |
1520 | filter++; | |
1521 | } | |
1522 | ||
1523 | if (pdata->wolopts & WAKE_MCAST) { | |
1524 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1525 | netdev_info(dev->net, "enabling multicast detection\n"); |
bbd9f9ee SG |
1526 | filter_mask[filter * 4] = 0x0007; |
1527 | filter_mask[filter * 4 + 1] = 0x00; | |
1528 | filter_mask[filter * 4 + 2] = 0x00; | |
1529 | filter_mask[filter * 4 + 3] = 0x00; | |
1530 | command[filter/4] |= 0x09UL << ((filter % 4) * 8); | |
1531 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1532 | crc[filter/2] |= smsc_crc(mcast, 3, filter); | |
1533 | filter++; | |
1534 | } | |
1535 | ||
1536 | if (pdata->wolopts & WAKE_ARP) { | |
1537 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1538 | netdev_info(dev->net, "enabling ARP detection\n"); |
bbd9f9ee SG |
1539 | filter_mask[filter * 4] = 0x0003; |
1540 | filter_mask[filter * 4 + 1] = 0x00; | |
1541 | filter_mask[filter * 4 + 2] = 0x00; | |
1542 | filter_mask[filter * 4 + 3] = 0x00; | |
1543 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1544 | offset[filter/4] |= 0x0C << ((filter % 4) * 8); | |
1545 | crc[filter/2] |= smsc_crc(arp, 2, filter); | |
1546 | filter++; | |
1547 | } | |
1548 | ||
1549 | if (pdata->wolopts & WAKE_UCAST) { | |
1e1d7412 | 1550 | netdev_info(dev->net, "enabling unicast detection\n"); |
bbd9f9ee SG |
1551 | filter_mask[filter * 4] = 0x003F; |
1552 | filter_mask[filter * 4 + 1] = 0x00; | |
1553 | filter_mask[filter * 4 + 2] = 0x00; | |
1554 | filter_mask[filter * 4 + 3] = 0x00; | |
1555 | command[filter/4] |= 0x01UL << ((filter % 4) * 8); | |
1556 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1557 | crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); | |
1558 | filter++; | |
1559 | } | |
1560 | ||
9ebca507 | 1561 | for (i = 0; i < (wuff_filter_count * 4); i++) { |
ec32115d | 1562 | ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); |
b052e073 | 1563 | if (ret < 0) { |
06a221be | 1564 | kfree(filter_mask); |
b052e073 SG |
1565 | goto done; |
1566 | } | |
bbd9f9ee | 1567 | } |
06a221be | 1568 | kfree(filter_mask); |
bbd9f9ee | 1569 | |
9ebca507 | 1570 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1571 | ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); |
e360a8b4 | 1572 | if (ret < 0) |
b052e073 | 1573 | goto done; |
bbd9f9ee SG |
1574 | } |
1575 | ||
9ebca507 | 1576 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1577 | ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); |
e360a8b4 | 1578 | if (ret < 0) |
b052e073 | 1579 | goto done; |
bbd9f9ee SG |
1580 | } |
1581 | ||
9ebca507 | 1582 | for (i = 0; i < (wuff_filter_count / 2); i++) { |
ec32115d | 1583 | ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); |
e360a8b4 | 1584 | if (ret < 0) |
b052e073 | 1585 | goto done; |
bbd9f9ee SG |
1586 | } |
1587 | ||
1588 | /* clear any pending pattern match packet status */ | |
ec32115d | 1589 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1590 | if (ret < 0) |
b052e073 | 1591 | goto done; |
bbd9f9ee SG |
1592 | |
1593 | val |= WUCSR_WUFR_; | |
1594 | ||
ec32115d | 1595 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1596 | if (ret < 0) |
b052e073 | 1597 | goto done; |
bbd9f9ee SG |
1598 | } |
1599 | ||
e0e474a8 SG |
1600 | if (pdata->wolopts & WAKE_MAGIC) { |
1601 | /* clear any pending magic packet status */ | |
ec32115d | 1602 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1603 | if (ret < 0) |
b052e073 | 1604 | goto done; |
e0e474a8 SG |
1605 | |
1606 | val |= WUCSR_MPR_; | |
1607 | ||
ec32115d | 1608 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1609 | if (ret < 0) |
b052e073 | 1610 | goto done; |
e0e474a8 SG |
1611 | } |
1612 | ||
bbd9f9ee | 1613 | /* enable/disable wakeup sources */ |
ec32115d | 1614 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1615 | if (ret < 0) |
b052e073 | 1616 | goto done; |
e0e474a8 | 1617 | |
bbd9f9ee | 1618 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
1e1d7412 | 1619 | netdev_info(dev->net, "enabling pattern match wakeup\n"); |
bbd9f9ee SG |
1620 | val |= WUCSR_WAKE_EN_; |
1621 | } else { | |
1e1d7412 | 1622 | netdev_info(dev->net, "disabling pattern match wakeup\n"); |
bbd9f9ee SG |
1623 | val &= ~WUCSR_WAKE_EN_; |
1624 | } | |
1625 | ||
e0e474a8 | 1626 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 1627 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
e0e474a8 SG |
1628 | val |= WUCSR_MPEN_; |
1629 | } else { | |
1e1d7412 | 1630 | netdev_info(dev->net, "disabling magic packet wakeup\n"); |
e0e474a8 SG |
1631 | val &= ~WUCSR_MPEN_; |
1632 | } | |
1633 | ||
ec32115d | 1634 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1635 | if (ret < 0) |
b052e073 | 1636 | goto done; |
e0e474a8 SG |
1637 | |
1638 | /* enable wol wakeup source */ | |
ec32115d | 1639 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1640 | if (ret < 0) |
b052e073 | 1641 | goto done; |
e0e474a8 SG |
1642 | |
1643 | val |= PM_CTL_WOL_EN_; | |
1644 | ||
e5e3af83 SG |
1645 | /* phy energy detect wakeup source */ |
1646 | if (pdata->wolopts & WAKE_PHY) | |
1647 | val |= PM_CTL_ED_EN_; | |
1648 | ||
ec32115d | 1649 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1650 | if (ret < 0) |
b052e073 | 1651 | goto done; |
e0e474a8 | 1652 | |
bbd9f9ee | 1653 | /* enable receiver to enable frame reception */ |
ec32115d | 1654 | smsc95xx_start_rx_path(dev, 1); |
e0e474a8 SG |
1655 | |
1656 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 1657 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
3b9f7d8c SG |
1658 | ret = smsc95xx_enter_suspend0(dev); |
1659 | ||
1660 | done: | |
0d41be53 ML |
1661 | /* |
1662 | * TODO: resume() might need to handle the suspend failure | |
1663 | * in system sleep | |
1664 | */ | |
1665 | if (ret && PMSG_IS_AUTO(message)) | |
3b9f7d8c SG |
1666 | usbnet_resume(intf); |
1667 | return ret; | |
e0e474a8 SG |
1668 | } |
1669 | ||
1670 | static int smsc95xx_resume(struct usb_interface *intf) | |
1671 | { | |
1672 | struct usbnet *dev = usb_get_intfdata(intf); | |
1673 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
b2d4b150 | 1674 | u8 suspend_flags = pdata->suspend_flags; |
e0e474a8 SG |
1675 | int ret; |
1676 | u32 val; | |
1677 | ||
1678 | BUG_ON(!dev); | |
1679 | ||
b2d4b150 SG |
1680 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
1681 | ||
1682 | /* do this first to ensure it's cleared even in error case */ | |
1683 | pdata->suspend_flags = 0; | |
1684 | ||
1685 | if (suspend_flags & SUSPEND_ALLMODES) { | |
bbd9f9ee | 1686 | /* clear wake-up sources */ |
ec32115d | 1687 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1688 | if (ret < 0) |
b052e073 | 1689 | return ret; |
e0e474a8 | 1690 | |
bbd9f9ee | 1691 | val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); |
e0e474a8 | 1692 | |
ec32115d | 1693 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1694 | if (ret < 0) |
b052e073 | 1695 | return ret; |
e0e474a8 SG |
1696 | |
1697 | /* clear wake-up status */ | |
ec32115d | 1698 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1699 | if (ret < 0) |
b052e073 | 1700 | return ret; |
e0e474a8 SG |
1701 | |
1702 | val &= ~PM_CTL_WOL_EN_; | |
1703 | val |= PM_CTL_WUPS_; | |
1704 | ||
ec32115d | 1705 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1706 | if (ret < 0) |
b052e073 | 1707 | return ret; |
e0e474a8 SG |
1708 | } |
1709 | ||
af3d7c1e | 1710 | ret = usbnet_resume(intf); |
b052e073 SG |
1711 | if (ret < 0) |
1712 | netdev_warn(dev->net, "usbnet_resume error\n"); | |
e0e474a8 | 1713 | |
b052e073 | 1714 | return ret; |
b5a04475 SG |
1715 | } |
1716 | ||
2f7ca802 SG |
1717 | static void smsc95xx_rx_csum_offload(struct sk_buff *skb) |
1718 | { | |
1719 | skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); | |
1720 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1721 | skb_trim(skb, skb->len - 2); | |
1722 | } | |
1723 | ||
1724 | static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
1725 | { | |
2f7ca802 SG |
1726 | while (skb->len > 0) { |
1727 | u32 header, align_count; | |
1728 | struct sk_buff *ax_skb; | |
1729 | unsigned char *packet; | |
1730 | u16 size; | |
1731 | ||
1732 | memcpy(&header, skb->data, sizeof(header)); | |
1733 | le32_to_cpus(&header); | |
1734 | skb_pull(skb, 4 + NET_IP_ALIGN); | |
1735 | packet = skb->data; | |
1736 | ||
1737 | /* get the packet length */ | |
1738 | size = (u16)((header & RX_STS_FL_) >> 16); | |
1739 | align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; | |
1740 | ||
1741 | if (unlikely(header & RX_STS_ES_)) { | |
a475f603 JP |
1742 | netif_dbg(dev, rx_err, dev->net, |
1743 | "Error header=0x%08x\n", header); | |
80667ac1 HX |
1744 | dev->net->stats.rx_errors++; |
1745 | dev->net->stats.rx_dropped++; | |
2f7ca802 SG |
1746 | |
1747 | if (header & RX_STS_CRC_) { | |
80667ac1 | 1748 | dev->net->stats.rx_crc_errors++; |
2f7ca802 SG |
1749 | } else { |
1750 | if (header & (RX_STS_TL_ | RX_STS_RF_)) | |
80667ac1 | 1751 | dev->net->stats.rx_frame_errors++; |
2f7ca802 SG |
1752 | |
1753 | if ((header & RX_STS_LE_) && | |
1754 | (!(header & RX_STS_FT_))) | |
80667ac1 | 1755 | dev->net->stats.rx_length_errors++; |
2f7ca802 SG |
1756 | } |
1757 | } else { | |
1758 | /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ | |
1759 | if (unlikely(size > (ETH_FRAME_LEN + 12))) { | |
a475f603 JP |
1760 | netif_dbg(dev, rx_err, dev->net, |
1761 | "size err header=0x%08x\n", header); | |
2f7ca802 SG |
1762 | return 0; |
1763 | } | |
1764 | ||
1765 | /* last frame in this batch */ | |
1766 | if (skb->len == size) { | |
78e47fe4 | 1767 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1768 | smsc95xx_rx_csum_offload(skb); |
df18acca | 1769 | skb_trim(skb, skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1770 | skb->truesize = size + sizeof(struct sk_buff); |
1771 | ||
1772 | return 1; | |
1773 | } | |
1774 | ||
1775 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
1776 | if (unlikely(!ax_skb)) { | |
60b86755 | 1777 | netdev_warn(dev->net, "Error allocating skb\n"); |
2f7ca802 SG |
1778 | return 0; |
1779 | } | |
1780 | ||
1781 | ax_skb->len = size; | |
1782 | ax_skb->data = packet; | |
1783 | skb_set_tail_pointer(ax_skb, size); | |
1784 | ||
78e47fe4 | 1785 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1786 | smsc95xx_rx_csum_offload(ax_skb); |
df18acca | 1787 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1788 | ax_skb->truesize = size + sizeof(struct sk_buff); |
1789 | ||
1790 | usbnet_skb_return(dev, ax_skb); | |
1791 | } | |
1792 | ||
1793 | skb_pull(skb, size); | |
1794 | ||
1795 | /* padding bytes before the next frame starts */ | |
1796 | if (skb->len) | |
1797 | skb_pull(skb, align_count); | |
1798 | } | |
1799 | ||
1800 | if (unlikely(skb->len < 0)) { | |
60b86755 | 1801 | netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); |
2f7ca802 SG |
1802 | return 0; |
1803 | } | |
1804 | ||
1805 | return 1; | |
1806 | } | |
1807 | ||
f7b29271 SG |
1808 | static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) |
1809 | { | |
55508d60 MM |
1810 | u16 low_16 = (u16)skb_checksum_start_offset(skb); |
1811 | u16 high_16 = low_16 + skb->csum_offset; | |
f7b29271 SG |
1812 | return (high_16 << 16) | low_16; |
1813 | } | |
1814 | ||
2f7ca802 SG |
1815 | static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, |
1816 | struct sk_buff *skb, gfp_t flags) | |
1817 | { | |
78e47fe4 | 1818 | bool csum = skb->ip_summed == CHECKSUM_PARTIAL; |
f7b29271 | 1819 | int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; |
2f7ca802 SG |
1820 | u32 tx_cmd_a, tx_cmd_b; |
1821 | ||
f7b29271 SG |
1822 | /* We do not advertise SG, so skbs should be already linearized */ |
1823 | BUG_ON(skb_shinfo(skb)->nr_frags); | |
1824 | ||
1825 | if (skb_headroom(skb) < overhead) { | |
2f7ca802 | 1826 | struct sk_buff *skb2 = skb_copy_expand(skb, |
f7b29271 | 1827 | overhead, 0, flags); |
2f7ca802 SG |
1828 | dev_kfree_skb_any(skb); |
1829 | skb = skb2; | |
1830 | if (!skb) | |
1831 | return NULL; | |
1832 | } | |
1833 | ||
f7b29271 | 1834 | if (csum) { |
11bc3088 SG |
1835 | if (skb->len <= 45) { |
1836 | /* workaround - hardware tx checksum does not work | |
1837 | * properly with extremely small packets */ | |
55508d60 | 1838 | long csstart = skb_checksum_start_offset(skb); |
11bc3088 SG |
1839 | __wsum calc = csum_partial(skb->data + csstart, |
1840 | skb->len - csstart, 0); | |
1841 | *((__sum16 *)(skb->data + csstart | |
1842 | + skb->csum_offset)) = csum_fold(calc); | |
1843 | ||
1844 | csum = false; | |
1845 | } else { | |
1846 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | |
1847 | skb_push(skb, 4); | |
00acda68 | 1848 | cpu_to_le32s(&csum_preamble); |
11bc3088 SG |
1849 | memcpy(skb->data, &csum_preamble, 4); |
1850 | } | |
f7b29271 SG |
1851 | } |
1852 | ||
2f7ca802 SG |
1853 | skb_push(skb, 4); |
1854 | tx_cmd_b = (u32)(skb->len - 4); | |
f7b29271 SG |
1855 | if (csum) |
1856 | tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; | |
2f7ca802 SG |
1857 | cpu_to_le32s(&tx_cmd_b); |
1858 | memcpy(skb->data, &tx_cmd_b, 4); | |
1859 | ||
1860 | skb_push(skb, 4); | |
1861 | tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | | |
1862 | TX_CMD_A_LAST_SEG_; | |
1863 | cpu_to_le32s(&tx_cmd_a); | |
1864 | memcpy(skb->data, &tx_cmd_a, 4); | |
1865 | ||
1866 | return skb; | |
1867 | } | |
1868 | ||
b2d4b150 SG |
1869 | static int smsc95xx_manage_power(struct usbnet *dev, int on) |
1870 | { | |
1871 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1872 | ||
1873 | dev->intf->needs_remote_wakeup = on; | |
1874 | ||
eb970ff0 | 1875 | if (pdata->features & FEATURE_REMOTE_WAKEUP) |
b2d4b150 SG |
1876 | return 0; |
1877 | ||
eb970ff0 ML |
1878 | /* this chip revision isn't capable of remote wakeup */ |
1879 | netdev_info(dev->net, "hardware isn't capable of remote wakeup\n"); | |
b2d4b150 SG |
1880 | |
1881 | if (on) | |
1882 | usb_autopm_get_interface_no_resume(dev->intf); | |
1883 | else | |
1884 | usb_autopm_put_interface(dev->intf); | |
1885 | ||
1886 | return 0; | |
1887 | } | |
1888 | ||
2f7ca802 SG |
1889 | static const struct driver_info smsc95xx_info = { |
1890 | .description = "smsc95xx USB 2.0 Ethernet", | |
1891 | .bind = smsc95xx_bind, | |
1892 | .unbind = smsc95xx_unbind, | |
1893 | .link_reset = smsc95xx_link_reset, | |
1894 | .reset = smsc95xx_reset, | |
1895 | .rx_fixup = smsc95xx_rx_fixup, | |
1896 | .tx_fixup = smsc95xx_tx_fixup, | |
1897 | .status = smsc95xx_status, | |
b2d4b150 | 1898 | .manage_power = smsc95xx_manage_power, |
07d69d42 | 1899 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
2f7ca802 SG |
1900 | }; |
1901 | ||
1902 | static const struct usb_device_id products[] = { | |
1903 | { | |
1904 | /* SMSC9500 USB Ethernet Device */ | |
1905 | USB_DEVICE(0x0424, 0x9500), | |
1906 | .driver_info = (unsigned long) &smsc95xx_info, | |
1907 | }, | |
6f41d12b SG |
1908 | { |
1909 | /* SMSC9505 USB Ethernet Device */ | |
1910 | USB_DEVICE(0x0424, 0x9505), | |
1911 | .driver_info = (unsigned long) &smsc95xx_info, | |
1912 | }, | |
1913 | { | |
1914 | /* SMSC9500A USB Ethernet Device */ | |
1915 | USB_DEVICE(0x0424, 0x9E00), | |
1916 | .driver_info = (unsigned long) &smsc95xx_info, | |
1917 | }, | |
1918 | { | |
1919 | /* SMSC9505A USB Ethernet Device */ | |
1920 | USB_DEVICE(0x0424, 0x9E01), | |
1921 | .driver_info = (unsigned long) &smsc95xx_info, | |
1922 | }, | |
726474b8 SG |
1923 | { |
1924 | /* SMSC9512/9514 USB Hub & Ethernet Device */ | |
1925 | USB_DEVICE(0x0424, 0xec00), | |
1926 | .driver_info = (unsigned long) &smsc95xx_info, | |
1927 | }, | |
6f41d12b SG |
1928 | { |
1929 | /* SMSC9500 USB Ethernet Device (SAL10) */ | |
1930 | USB_DEVICE(0x0424, 0x9900), | |
1931 | .driver_info = (unsigned long) &smsc95xx_info, | |
1932 | }, | |
1933 | { | |
1934 | /* SMSC9505 USB Ethernet Device (SAL10) */ | |
1935 | USB_DEVICE(0x0424, 0x9901), | |
1936 | .driver_info = (unsigned long) &smsc95xx_info, | |
1937 | }, | |
1938 | { | |
1939 | /* SMSC9500A USB Ethernet Device (SAL10) */ | |
1940 | USB_DEVICE(0x0424, 0x9902), | |
1941 | .driver_info = (unsigned long) &smsc95xx_info, | |
1942 | }, | |
1943 | { | |
1944 | /* SMSC9505A USB Ethernet Device (SAL10) */ | |
1945 | USB_DEVICE(0x0424, 0x9903), | |
1946 | .driver_info = (unsigned long) &smsc95xx_info, | |
1947 | }, | |
1948 | { | |
1949 | /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ | |
1950 | USB_DEVICE(0x0424, 0x9904), | |
1951 | .driver_info = (unsigned long) &smsc95xx_info, | |
1952 | }, | |
1953 | { | |
1954 | /* SMSC9500A USB Ethernet Device (HAL) */ | |
1955 | USB_DEVICE(0x0424, 0x9905), | |
1956 | .driver_info = (unsigned long) &smsc95xx_info, | |
1957 | }, | |
1958 | { | |
1959 | /* SMSC9505A USB Ethernet Device (HAL) */ | |
1960 | USB_DEVICE(0x0424, 0x9906), | |
1961 | .driver_info = (unsigned long) &smsc95xx_info, | |
1962 | }, | |
1963 | { | |
1964 | /* SMSC9500 USB Ethernet Device (Alternate ID) */ | |
1965 | USB_DEVICE(0x0424, 0x9907), | |
1966 | .driver_info = (unsigned long) &smsc95xx_info, | |
1967 | }, | |
1968 | { | |
1969 | /* SMSC9500A USB Ethernet Device (Alternate ID) */ | |
1970 | USB_DEVICE(0x0424, 0x9908), | |
1971 | .driver_info = (unsigned long) &smsc95xx_info, | |
1972 | }, | |
1973 | { | |
1974 | /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ | |
1975 | USB_DEVICE(0x0424, 0x9909), | |
1976 | .driver_info = (unsigned long) &smsc95xx_info, | |
1977 | }, | |
88edaa41 SG |
1978 | { |
1979 | /* SMSC LAN9530 USB Ethernet Device */ | |
1980 | USB_DEVICE(0x0424, 0x9530), | |
1981 | .driver_info = (unsigned long) &smsc95xx_info, | |
1982 | }, | |
1983 | { | |
1984 | /* SMSC LAN9730 USB Ethernet Device */ | |
1985 | USB_DEVICE(0x0424, 0x9730), | |
1986 | .driver_info = (unsigned long) &smsc95xx_info, | |
1987 | }, | |
1988 | { | |
1989 | /* SMSC LAN89530 USB Ethernet Device */ | |
1990 | USB_DEVICE(0x0424, 0x9E08), | |
1991 | .driver_info = (unsigned long) &smsc95xx_info, | |
1992 | }, | |
2f7ca802 SG |
1993 | { }, /* END */ |
1994 | }; | |
1995 | MODULE_DEVICE_TABLE(usb, products); | |
1996 | ||
1997 | static struct usb_driver smsc95xx_driver = { | |
1998 | .name = "smsc95xx", | |
1999 | .id_table = products, | |
2000 | .probe = usbnet_probe, | |
b5a04475 | 2001 | .suspend = smsc95xx_suspend, |
e0e474a8 SG |
2002 | .resume = smsc95xx_resume, |
2003 | .reset_resume = smsc95xx_resume, | |
2f7ca802 | 2004 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2005 | .disable_hub_initiated_lpm = 1, |
b2d4b150 | 2006 | .supports_autosuspend = 1, |
2f7ca802 SG |
2007 | }; |
2008 | ||
d632eb1b | 2009 | module_usb_driver(smsc95xx_driver); |
2f7ca802 SG |
2010 | |
2011 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2012 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
2f7ca802 SG |
2013 | MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); |
2014 | MODULE_LICENSE("GPL"); |