Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This code is derived from the VIA reference driver (copyright message | |
3 | * below) provided to Red Hat by VIA Networking Technologies, Inc. for | |
4 | * addition to the Linux kernel. | |
5 | * | |
6 | * The code has been merged into one source file, cleaned up to follow | |
7 | * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned | |
8 | * for 64bit hardware platforms. | |
9 | * | |
10 | * TODO | |
1da177e4 LT |
11 | * rx_copybreak/alignment |
12 | * Scatter gather | |
13 | * More testing | |
14 | * | |
113aa838 | 15 | * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk> |
1da177e4 LT |
16 | * Additional fixes and clean up: Francois Romieu |
17 | * | |
18 | * This source has not been verified for use in safety critical systems. | |
19 | * | |
20 | * Please direct queries about the revamped driver to the linux-kernel | |
21 | * list not VIA. | |
22 | * | |
23 | * Original code: | |
24 | * | |
25 | * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. | |
26 | * All rights reserved. | |
27 | * | |
28 | * This software may be redistributed and/or modified under | |
29 | * the terms of the GNU General Public License as published by the Free | |
30 | * Software Foundation; either version 2 of the License, or | |
31 | * any later version. | |
32 | * | |
33 | * This program is distributed in the hope that it will be useful, but | |
34 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
35 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
36 | * for more details. | |
37 | * | |
38 | * Author: Chuang Liang-Shing, AJ Jiang | |
39 | * | |
40 | * Date: Jan 24, 2003 | |
41 | * | |
42 | * MODULE_LICENSE("GPL"); | |
43 | * | |
44 | */ | |
45 | ||
46 | ||
47 | #include <linux/module.h> | |
48 | #include <linux/types.h> | |
1da177e4 LT |
49 | #include <linux/init.h> |
50 | #include <linux/mm.h> | |
51 | #include <linux/errno.h> | |
52 | #include <linux/ioport.h> | |
53 | #include <linux/pci.h> | |
54 | #include <linux/kernel.h> | |
55 | #include <linux/netdevice.h> | |
56 | #include <linux/etherdevice.h> | |
57 | #include <linux/skbuff.h> | |
58 | #include <linux/delay.h> | |
59 | #include <linux/timer.h> | |
60 | #include <linux/slab.h> | |
61 | #include <linux/interrupt.h> | |
1da177e4 LT |
62 | #include <linux/string.h> |
63 | #include <linux/wait.h> | |
64 | #include <asm/io.h> | |
65 | #include <linux/if.h> | |
1da177e4 LT |
66 | #include <asm/uaccess.h> |
67 | #include <linux/proc_fs.h> | |
68 | #include <linux/inetdevice.h> | |
69 | #include <linux/reboot.h> | |
70 | #include <linux/ethtool.h> | |
71 | #include <linux/mii.h> | |
72 | #include <linux/in.h> | |
73 | #include <linux/if_arp.h> | |
501e4d24 | 74 | #include <linux/if_vlan.h> |
1da177e4 LT |
75 | #include <linux/ip.h> |
76 | #include <linux/tcp.h> | |
77 | #include <linux/udp.h> | |
78 | #include <linux/crc-ccitt.h> | |
79 | #include <linux/crc32.h> | |
80 | ||
81 | #include "via-velocity.h" | |
82 | ||
83 | ||
84 | static int velocity_nics = 0; | |
85 | static int msglevel = MSG_LEVEL_INFO; | |
86 | ||
01faccbf SH |
87 | /** |
88 | * mac_get_cam_mask - Read a CAM mask | |
89 | * @regs: register block for this velocity | |
90 | * @mask: buffer to store mask | |
91 | * | |
92 | * Fetch the mask bits of the selected CAM and store them into the | |
93 | * provided mask buffer. | |
94 | */ | |
95 | ||
96 | static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask) | |
97 | { | |
98 | int i; | |
99 | ||
100 | /* Select CAM mask */ | |
101 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
102 | ||
103 | writeb(0, ®s->CAMADDR); | |
104 | ||
105 | /* read mask */ | |
106 | for (i = 0; i < 8; i++) | |
107 | *mask++ = readb(&(regs->MARCAM[i])); | |
108 | ||
109 | /* disable CAMEN */ | |
110 | writeb(0, ®s->CAMADDR); | |
111 | ||
112 | /* Select mar */ | |
113 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
114 | ||
115 | } | |
116 | ||
117 | ||
118 | /** | |
119 | * mac_set_cam_mask - Set a CAM mask | |
120 | * @regs: register block for this velocity | |
121 | * @mask: CAM mask to load | |
122 | * | |
123 | * Store a new mask into a CAM | |
124 | */ | |
125 | ||
126 | static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask) | |
127 | { | |
128 | int i; | |
129 | /* Select CAM mask */ | |
130 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
131 | ||
132 | writeb(CAMADDR_CAMEN, ®s->CAMADDR); | |
133 | ||
134 | for (i = 0; i < 8; i++) { | |
135 | writeb(*mask++, &(regs->MARCAM[i])); | |
136 | } | |
137 | /* disable CAMEN */ | |
138 | writeb(0, ®s->CAMADDR); | |
139 | ||
140 | /* Select mar */ | |
141 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
142 | } | |
143 | ||
144 | static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask) | |
145 | { | |
146 | int i; | |
147 | /* Select CAM mask */ | |
148 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
149 | ||
150 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); | |
151 | ||
152 | for (i = 0; i < 8; i++) { | |
153 | writeb(*mask++, &(regs->MARCAM[i])); | |
154 | } | |
155 | /* disable CAMEN */ | |
156 | writeb(0, ®s->CAMADDR); | |
157 | ||
158 | /* Select mar */ | |
159 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
160 | } | |
161 | ||
162 | /** | |
163 | * mac_set_cam - set CAM data | |
164 | * @regs: register block of this velocity | |
165 | * @idx: Cam index | |
166 | * @addr: 2 or 6 bytes of CAM data | |
167 | * | |
168 | * Load an address or vlan tag into a CAM | |
169 | */ | |
170 | ||
171 | static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr) | |
172 | { | |
173 | int i; | |
174 | ||
175 | /* Select CAM mask */ | |
176 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
177 | ||
178 | idx &= (64 - 1); | |
179 | ||
180 | writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); | |
181 | ||
182 | for (i = 0; i < 6; i++) { | |
183 | writeb(*addr++, &(regs->MARCAM[i])); | |
184 | } | |
185 | BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); | |
186 | ||
187 | udelay(10); | |
188 | ||
189 | writeb(0, ®s->CAMADDR); | |
190 | ||
191 | /* Select mar */ | |
192 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
193 | } | |
194 | ||
195 | static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx, | |
196 | const u8 *addr) | |
197 | { | |
198 | ||
199 | /* Select CAM mask */ | |
200 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
201 | ||
202 | idx &= (64 - 1); | |
203 | ||
204 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, ®s->CAMADDR); | |
205 | writew(*((u16 *) addr), ®s->MARCAM[0]); | |
206 | ||
207 | BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); | |
208 | ||
209 | udelay(10); | |
210 | ||
211 | writeb(0, ®s->CAMADDR); | |
212 | ||
213 | /* Select mar */ | |
214 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
215 | } | |
216 | ||
217 | ||
218 | /** | |
219 | * mac_wol_reset - reset WOL after exiting low power | |
220 | * @regs: register block of this velocity | |
221 | * | |
222 | * Called after we drop out of wake on lan mode in order to | |
223 | * reset the Wake on lan features. This function doesn't restore | |
224 | * the rest of the logic from the result of sleep/wakeup | |
225 | */ | |
226 | ||
227 | static void mac_wol_reset(struct mac_regs __iomem * regs) | |
228 | { | |
229 | ||
230 | /* Turn off SWPTAG right after leaving power mode */ | |
231 | BYTE_REG_BITS_OFF(STICKHW_SWPTAG, ®s->STICKHW); | |
232 | /* clear sticky bits */ | |
233 | BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), ®s->STICKHW); | |
234 | ||
235 | BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, ®s->CHIPGCR); | |
236 | BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, ®s->CHIPGCR); | |
237 | /* disable force PME-enable */ | |
238 | writeb(WOLCFG_PMEOVR, ®s->WOLCFGClr); | |
239 | /* disable power-event config bit */ | |
240 | writew(0xFFFF, ®s->WOLCRClr); | |
241 | /* clear power status */ | |
242 | writew(0xFFFF, ®s->WOLSRClr); | |
243 | } | |
1da177e4 LT |
244 | |
245 | static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); | |
7282d491 | 246 | static const struct ethtool_ops velocity_ethtool_ops; |
1da177e4 LT |
247 | |
248 | /* | |
249 | Define module options | |
250 | */ | |
251 | ||
252 | MODULE_AUTHOR("VIA Networking Technologies, Inc."); | |
253 | MODULE_LICENSE("GPL"); | |
254 | MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"); | |
255 | ||
256 | #define VELOCITY_PARAM(N,D) \ | |
257 | static int N[MAX_UNITS]=OPTION_DEFAULT;\ | |
258 | module_param_array(N, int, NULL, 0); \ | |
259 | MODULE_PARM_DESC(N, D); | |
260 | ||
261 | #define RX_DESC_MIN 64 | |
262 | #define RX_DESC_MAX 255 | |
263 | #define RX_DESC_DEF 64 | |
264 | VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors"); | |
265 | ||
266 | #define TX_DESC_MIN 16 | |
267 | #define TX_DESC_MAX 256 | |
268 | #define TX_DESC_DEF 64 | |
269 | VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors"); | |
270 | ||
1da177e4 LT |
271 | #define RX_THRESH_MIN 0 |
272 | #define RX_THRESH_MAX 3 | |
273 | #define RX_THRESH_DEF 0 | |
274 | /* rx_thresh[] is used for controlling the receive fifo threshold. | |
275 | 0: indicate the rxfifo threshold is 128 bytes. | |
276 | 1: indicate the rxfifo threshold is 512 bytes. | |
277 | 2: indicate the rxfifo threshold is 1024 bytes. | |
278 | 3: indicate the rxfifo threshold is store & forward. | |
279 | */ | |
280 | VELOCITY_PARAM(rx_thresh, "Receive fifo threshold"); | |
281 | ||
282 | #define DMA_LENGTH_MIN 0 | |
283 | #define DMA_LENGTH_MAX 7 | |
284 | #define DMA_LENGTH_DEF 0 | |
285 | ||
286 | /* DMA_length[] is used for controlling the DMA length | |
287 | 0: 8 DWORDs | |
288 | 1: 16 DWORDs | |
289 | 2: 32 DWORDs | |
290 | 3: 64 DWORDs | |
291 | 4: 128 DWORDs | |
292 | 5: 256 DWORDs | |
293 | 6: SF(flush till emply) | |
294 | 7: SF(flush till emply) | |
295 | */ | |
296 | VELOCITY_PARAM(DMA_length, "DMA length"); | |
297 | ||
1da177e4 LT |
298 | #define IP_ALIG_DEF 0 |
299 | /* IP_byte_align[] is used for IP header DWORD byte aligned | |
300 | 0: indicate the IP header won't be DWORD byte aligned.(Default) . | |
301 | 1: indicate the IP header will be DWORD byte aligned. | |
302 | In some enviroment, the IP header should be DWORD byte aligned, | |
303 | or the packet will be droped when we receive it. (eg: IPVS) | |
304 | */ | |
305 | VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned"); | |
306 | ||
307 | #define TX_CSUM_DEF 1 | |
308 | /* txcsum_offload[] is used for setting the checksum offload ability of NIC. | |
309 | (We only support RX checksum offload now) | |
310 | 0: disable csum_offload[checksum offload | |
311 | 1: enable checksum offload. (Default) | |
312 | */ | |
313 | VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload"); | |
314 | ||
315 | #define FLOW_CNTL_DEF 1 | |
316 | #define FLOW_CNTL_MIN 1 | |
317 | #define FLOW_CNTL_MAX 5 | |
318 | ||
319 | /* flow_control[] is used for setting the flow control ability of NIC. | |
320 | 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR. | |
321 | 2: enable TX flow control. | |
322 | 3: enable RX flow control. | |
323 | 4: enable RX/TX flow control. | |
324 | 5: disable | |
325 | */ | |
326 | VELOCITY_PARAM(flow_control, "Enable flow control ability"); | |
327 | ||
328 | #define MED_LNK_DEF 0 | |
329 | #define MED_LNK_MIN 0 | |
330 | #define MED_LNK_MAX 4 | |
331 | /* speed_duplex[] is used for setting the speed and duplex mode of NIC. | |
332 | 0: indicate autonegotiation for both speed and duplex mode | |
333 | 1: indicate 100Mbps half duplex mode | |
334 | 2: indicate 100Mbps full duplex mode | |
335 | 3: indicate 10Mbps half duplex mode | |
336 | 4: indicate 10Mbps full duplex mode | |
337 | ||
338 | Note: | |
339 | if EEPROM have been set to the force mode, this option is ignored | |
340 | by driver. | |
341 | */ | |
342 | VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode"); | |
343 | ||
344 | #define VAL_PKT_LEN_DEF 0 | |
345 | /* ValPktLen[] is used for setting the checksum offload ability of NIC. | |
346 | 0: Receive frame with invalid layer 2 length (Default) | |
347 | 1: Drop frame with invalid layer 2 length | |
348 | */ | |
349 | VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame"); | |
350 | ||
351 | #define WOL_OPT_DEF 0 | |
352 | #define WOL_OPT_MIN 0 | |
353 | #define WOL_OPT_MAX 7 | |
354 | /* wol_opts[] is used for controlling wake on lan behavior. | |
355 | 0: Wake up if recevied a magic packet. (Default) | |
356 | 1: Wake up if link status is on/off. | |
357 | 2: Wake up if recevied an arp packet. | |
358 | 4: Wake up if recevied any unicast packet. | |
359 | Those value can be sumed up to support more than one option. | |
360 | */ | |
361 | VELOCITY_PARAM(wol_opts, "Wake On Lan options"); | |
362 | ||
363 | #define INT_WORKS_DEF 20 | |
364 | #define INT_WORKS_MIN 10 | |
365 | #define INT_WORKS_MAX 64 | |
366 | ||
367 | VELOCITY_PARAM(int_works, "Number of packets per interrupt services"); | |
368 | ||
369 | static int rx_copybreak = 200; | |
370 | module_param(rx_copybreak, int, 0644); | |
371 | MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames"); | |
372 | ||
cabb7667 JG |
373 | static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr, |
374 | const struct velocity_info_tbl *info); | |
1da177e4 LT |
375 | static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev); |
376 | static void velocity_print_info(struct velocity_info *vptr); | |
377 | static int velocity_open(struct net_device *dev); | |
378 | static int velocity_change_mtu(struct net_device *dev, int mtu); | |
379 | static int velocity_xmit(struct sk_buff *skb, struct net_device *dev); | |
3ca17dfb | 380 | static irqreturn_t velocity_intr(int irq, void *dev_instance); |
1da177e4 LT |
381 | static void velocity_set_multi(struct net_device *dev); |
382 | static struct net_device_stats *velocity_get_stats(struct net_device *dev); | |
383 | static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
384 | static int velocity_close(struct net_device *dev); | |
385 | static int velocity_receive_frame(struct velocity_info *, int idx); | |
386 | static int velocity_alloc_rx_buf(struct velocity_info *, int idx); | |
387 | static void velocity_free_rd_ring(struct velocity_info *vptr); | |
388 | static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *); | |
389 | static int velocity_soft_reset(struct velocity_info *vptr); | |
390 | static void mii_init(struct velocity_info *vptr, u32 mii_status); | |
8a22dddb | 391 | static u32 velocity_get_link(struct net_device *dev); |
1da177e4 LT |
392 | static u32 velocity_get_opt_media_mode(struct velocity_info *vptr); |
393 | static void velocity_print_link_status(struct velocity_info *vptr); | |
394 | static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs); | |
395 | static void velocity_shutdown(struct velocity_info *vptr); | |
396 | static void enable_flow_control_ability(struct velocity_info *vptr); | |
397 | static void enable_mii_autopoll(struct mac_regs __iomem * regs); | |
398 | static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata); | |
399 | static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data); | |
400 | static u32 mii_check_media_mode(struct mac_regs __iomem * regs); | |
401 | static u32 check_connection_type(struct mac_regs __iomem * regs); | |
402 | static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status); | |
403 | ||
404 | #ifdef CONFIG_PM | |
405 | ||
406 | static int velocity_suspend(struct pci_dev *pdev, pm_message_t state); | |
407 | static int velocity_resume(struct pci_dev *pdev); | |
408 | ||
ce9f7fe3 RD |
409 | static DEFINE_SPINLOCK(velocity_dev_list_lock); |
410 | static LIST_HEAD(velocity_dev_list); | |
411 | ||
412 | #endif | |
413 | ||
414 | #if defined(CONFIG_PM) && defined(CONFIG_INET) | |
415 | ||
1da177e4 LT |
416 | static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr); |
417 | ||
418 | static struct notifier_block velocity_inetaddr_notifier = { | |
419 | .notifier_call = velocity_netdev_event, | |
420 | }; | |
421 | ||
1da177e4 LT |
422 | static void velocity_register_notifier(void) |
423 | { | |
424 | register_inetaddr_notifier(&velocity_inetaddr_notifier); | |
425 | } | |
426 | ||
427 | static void velocity_unregister_notifier(void) | |
428 | { | |
429 | unregister_inetaddr_notifier(&velocity_inetaddr_notifier); | |
430 | } | |
431 | ||
ce9f7fe3 | 432 | #else |
1da177e4 LT |
433 | |
434 | #define velocity_register_notifier() do {} while (0) | |
435 | #define velocity_unregister_notifier() do {} while (0) | |
436 | ||
ce9f7fe3 | 437 | #endif |
1da177e4 LT |
438 | |
439 | /* | |
440 | * Internal board variants. At the moment we have only one | |
441 | */ | |
442 | ||
4f14b92f | 443 | static struct velocity_info_tbl chip_info_table[] = { |
cabb7667 JG |
444 | {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL}, |
445 | { } | |
1da177e4 LT |
446 | }; |
447 | ||
448 | /* | |
449 | * Describe the PCI device identifiers that we support in this | |
450 | * device driver. Used for hotplug autoloading. | |
451 | */ | |
452 | ||
e54f4893 JG |
453 | static const struct pci_device_id velocity_id_table[] __devinitdata = { |
454 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) }, | |
455 | { } | |
1da177e4 LT |
456 | }; |
457 | ||
458 | MODULE_DEVICE_TABLE(pci, velocity_id_table); | |
459 | ||
460 | /** | |
461 | * get_chip_name - identifier to name | |
462 | * @id: chip identifier | |
463 | * | |
464 | * Given a chip identifier return a suitable description. Returns | |
465 | * a pointer a static string valid while the driver is loaded. | |
466 | */ | |
467 | ||
01faccbf | 468 | static const char __devinit *get_chip_name(enum chip_type chip_id) |
1da177e4 LT |
469 | { |
470 | int i; | |
471 | for (i = 0; chip_info_table[i].name != NULL; i++) | |
472 | if (chip_info_table[i].chip_id == chip_id) | |
473 | break; | |
474 | return chip_info_table[i].name; | |
475 | } | |
476 | ||
477 | /** | |
478 | * velocity_remove1 - device unplug | |
479 | * @pdev: PCI device being removed | |
480 | * | |
481 | * Device unload callback. Called on an unplug or on module | |
482 | * unload for each active device that is present. Disconnects | |
483 | * the device from the network layer and frees all the resources | |
484 | */ | |
485 | ||
486 | static void __devexit velocity_remove1(struct pci_dev *pdev) | |
487 | { | |
488 | struct net_device *dev = pci_get_drvdata(pdev); | |
8ab6f3f7 | 489 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
490 | |
491 | #ifdef CONFIG_PM | |
492 | unsigned long flags; | |
493 | ||
494 | spin_lock_irqsave(&velocity_dev_list_lock, flags); | |
495 | if (!list_empty(&velocity_dev_list)) | |
496 | list_del(&vptr->list); | |
497 | spin_unlock_irqrestore(&velocity_dev_list_lock, flags); | |
498 | #endif | |
499 | unregister_netdev(dev); | |
500 | iounmap(vptr->mac_regs); | |
501 | pci_release_regions(pdev); | |
502 | pci_disable_device(pdev); | |
503 | pci_set_drvdata(pdev, NULL); | |
504 | free_netdev(dev); | |
505 | ||
506 | velocity_nics--; | |
507 | } | |
508 | ||
509 | /** | |
510 | * velocity_set_int_opt - parser for integer options | |
511 | * @opt: pointer to option value | |
512 | * @val: value the user requested (or -1 for default) | |
513 | * @min: lowest value allowed | |
514 | * @max: highest value allowed | |
515 | * @def: default value | |
516 | * @name: property name | |
517 | * @dev: device name | |
518 | * | |
519 | * Set an integer property in the module options. This function does | |
520 | * all the verification and checking as well as reporting so that | |
521 | * we don't duplicate code for each option. | |
522 | */ | |
523 | ||
07b5f6a6 | 524 | static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname) |
1da177e4 LT |
525 | { |
526 | if (val == -1) | |
527 | *opt = def; | |
528 | else if (val < min || val > max) { | |
529 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n", | |
530 | devname, name, min, max); | |
531 | *opt = def; | |
532 | } else { | |
533 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n", | |
534 | devname, name, val); | |
535 | *opt = val; | |
536 | } | |
537 | } | |
538 | ||
539 | /** | |
540 | * velocity_set_bool_opt - parser for boolean options | |
541 | * @opt: pointer to option value | |
542 | * @val: value the user requested (or -1 for default) | |
543 | * @def: default value (yes/no) | |
544 | * @flag: numeric value to set for true. | |
545 | * @name: property name | |
546 | * @dev: device name | |
547 | * | |
548 | * Set a boolean property in the module options. This function does | |
549 | * all the verification and checking as well as reporting so that | |
550 | * we don't duplicate code for each option. | |
551 | */ | |
552 | ||
07b5f6a6 | 553 | static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, const char *devname) |
1da177e4 LT |
554 | { |
555 | (*opt) &= (~flag); | |
556 | if (val == -1) | |
557 | *opt |= (def ? flag : 0); | |
558 | else if (val < 0 || val > 1) { | |
6aa20a22 | 559 | printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n", |
1da177e4 LT |
560 | devname, name); |
561 | *opt |= (def ? flag : 0); | |
562 | } else { | |
6aa20a22 | 563 | printk(KERN_INFO "%s: set parameter %s to %s\n", |
1da177e4 LT |
564 | devname, name, val ? "TRUE" : "FALSE"); |
565 | *opt |= (val ? flag : 0); | |
566 | } | |
567 | } | |
568 | ||
569 | /** | |
570 | * velocity_get_options - set options on device | |
571 | * @opts: option structure for the device | |
572 | * @index: index of option to use in module options array | |
573 | * @devname: device name | |
574 | * | |
575 | * Turn the module and command options into a single structure | |
576 | * for the current device | |
577 | */ | |
578 | ||
07b5f6a6 | 579 | static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname) |
1da177e4 LT |
580 | { |
581 | ||
582 | velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname); | |
583 | velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname); | |
584 | velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname); | |
585 | velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname); | |
501e4d24 | 586 | |
1da177e4 LT |
587 | velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname); |
588 | velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname); | |
589 | velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname); | |
590 | velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname); | |
591 | velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname); | |
592 | velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname); | |
593 | velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname); | |
594 | opts->numrx = (opts->numrx & ~3); | |
595 | } | |
596 | ||
597 | /** | |
598 | * velocity_init_cam_filter - initialise CAM | |
599 | * @vptr: velocity to program | |
600 | * | |
601 | * Initialize the content addressable memory used for filters. Load | |
602 | * appropriately according to the presence of VLAN | |
603 | */ | |
604 | ||
605 | static void velocity_init_cam_filter(struct velocity_info *vptr) | |
606 | { | |
607 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
608 | ||
609 | /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */ | |
610 | WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, ®s->MCFG); | |
611 | WORD_REG_BITS_ON(MCFG_VIDFR, ®s->MCFG); | |
612 | ||
613 | /* Disable all CAMs */ | |
614 | memset(vptr->vCAMmask, 0, sizeof(u8) * 8); | |
615 | memset(vptr->mCAMmask, 0, sizeof(u8) * 8); | |
01faccbf SH |
616 | mac_set_vlan_cam_mask(regs, vptr->vCAMmask); |
617 | mac_set_cam_mask(regs, vptr->mCAMmask); | |
1da177e4 | 618 | |
d4f73c8e | 619 | /* Enable VCAMs */ |
501e4d24 | 620 | if (vptr->vlgrp) { |
d4f73c8e FR |
621 | unsigned int vid, i = 0; |
622 | ||
623 | if (!vlan_group_get_device(vptr->vlgrp, 0)) | |
624 | WORD_REG_BITS_ON(MCFG_RTGOPT, ®s->MCFG); | |
501e4d24 | 625 | |
d4f73c8e FR |
626 | for (vid = 1; (vid < VLAN_VID_MASK); vid++) { |
627 | if (vlan_group_get_device(vptr->vlgrp, vid)) { | |
628 | mac_set_vlan_cam(regs, i, (u8 *) &vid); | |
629 | vptr->vCAMmask[i / 8] |= 0x1 << (i % 8); | |
630 | if (++i >= VCAM_SIZE) | |
631 | break; | |
501e4d24 SH |
632 | } |
633 | } | |
01faccbf | 634 | mac_set_vlan_cam_mask(regs, vptr->vCAMmask); |
1da177e4 LT |
635 | } |
636 | } | |
637 | ||
d4f73c8e FR |
638 | static void velocity_vlan_rx_register(struct net_device *dev, |
639 | struct vlan_group *grp) | |
640 | { | |
641 | struct velocity_info *vptr = netdev_priv(dev); | |
642 | ||
643 | vptr->vlgrp = grp; | |
644 | } | |
645 | ||
501e4d24 SH |
646 | static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) |
647 | { | |
648 | struct velocity_info *vptr = netdev_priv(dev); | |
649 | ||
650 | spin_lock_irq(&vptr->lock); | |
651 | velocity_init_cam_filter(vptr); | |
652 | spin_unlock_irq(&vptr->lock); | |
653 | } | |
654 | ||
655 | static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | |
656 | { | |
657 | struct velocity_info *vptr = netdev_priv(dev); | |
658 | ||
659 | spin_lock_irq(&vptr->lock); | |
660 | vlan_group_set_device(vptr->vlgrp, vid, NULL); | |
661 | velocity_init_cam_filter(vptr); | |
662 | spin_unlock_irq(&vptr->lock); | |
663 | } | |
664 | ||
3c4dc711 FR |
665 | static void velocity_init_rx_ring_indexes(struct velocity_info *vptr) |
666 | { | |
667 | vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0; | |
668 | } | |
501e4d24 | 669 | |
1da177e4 LT |
670 | /** |
671 | * velocity_rx_reset - handle a receive reset | |
672 | * @vptr: velocity we are resetting | |
673 | * | |
674 | * Reset the ownership and status for the receive ring side. | |
675 | * Hand all the receive queue to the NIC. | |
676 | */ | |
677 | ||
678 | static void velocity_rx_reset(struct velocity_info *vptr) | |
679 | { | |
680 | ||
681 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
682 | int i; | |
683 | ||
3c4dc711 | 684 | velocity_init_rx_ring_indexes(vptr); |
1da177e4 LT |
685 | |
686 | /* | |
687 | * Init state, all RD entries belong to the NIC | |
688 | */ | |
689 | for (i = 0; i < vptr->options.numrx; ++i) | |
0fe9f15e | 690 | vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC; |
1da177e4 LT |
691 | |
692 | writew(vptr->options.numrx, ®s->RBRDU); | |
0fe9f15e | 693 | writel(vptr->rx.pool_dma, ®s->RDBaseLo); |
1da177e4 LT |
694 | writew(0, ®s->RDIdx); |
695 | writew(vptr->options.numrx - 1, ®s->RDCSize); | |
696 | } | |
697 | ||
698 | /** | |
699 | * velocity_init_registers - initialise MAC registers | |
700 | * @vptr: velocity to init | |
701 | * @type: type of initialisation (hot or cold) | |
702 | * | |
703 | * Initialise the MAC on a reset or on first set up on the | |
704 | * hardware. | |
705 | */ | |
706 | ||
6aa20a22 | 707 | static void velocity_init_registers(struct velocity_info *vptr, |
1da177e4 LT |
708 | enum velocity_init_type type) |
709 | { | |
710 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
711 | int i, mii_status; | |
712 | ||
713 | mac_wol_reset(regs); | |
714 | ||
715 | switch (type) { | |
716 | case VELOCITY_INIT_RESET: | |
717 | case VELOCITY_INIT_WOL: | |
718 | ||
719 | netif_stop_queue(vptr->dev); | |
720 | ||
721 | /* | |
722 | * Reset RX to prevent RX pointer not on the 4X location | |
723 | */ | |
724 | velocity_rx_reset(vptr); | |
725 | mac_rx_queue_run(regs); | |
726 | mac_rx_queue_wake(regs); | |
727 | ||
728 | mii_status = velocity_get_opt_media_mode(vptr); | |
729 | if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) { | |
730 | velocity_print_link_status(vptr); | |
731 | if (!(vptr->mii_status & VELOCITY_LINK_FAIL)) | |
732 | netif_wake_queue(vptr->dev); | |
733 | } | |
734 | ||
735 | enable_flow_control_ability(vptr); | |
736 | ||
737 | mac_clear_isr(regs); | |
738 | writel(CR0_STOP, ®s->CR0Clr); | |
6aa20a22 | 739 | writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), |
1da177e4 LT |
740 | ®s->CR0Set); |
741 | ||
742 | break; | |
743 | ||
744 | case VELOCITY_INIT_COLD: | |
745 | default: | |
746 | /* | |
747 | * Do reset | |
748 | */ | |
749 | velocity_soft_reset(vptr); | |
750 | mdelay(5); | |
751 | ||
752 | mac_eeprom_reload(regs); | |
753 | for (i = 0; i < 6; i++) { | |
754 | writeb(vptr->dev->dev_addr[i], &(regs->PAR[i])); | |
755 | } | |
756 | /* | |
757 | * clear Pre_ACPI bit. | |
758 | */ | |
759 | BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA)); | |
760 | mac_set_rx_thresh(regs, vptr->options.rx_thresh); | |
761 | mac_set_dma_length(regs, vptr->options.DMA_length); | |
762 | ||
763 | writeb(WOLCFG_SAM | WOLCFG_SAB, ®s->WOLCFGSet); | |
764 | /* | |
765 | * Back off algorithm use original IEEE standard | |
766 | */ | |
767 | BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), ®s->CFGB); | |
768 | ||
769 | /* | |
770 | * Init CAM filter | |
771 | */ | |
772 | velocity_init_cam_filter(vptr); | |
773 | ||
774 | /* | |
775 | * Set packet filter: Receive directed and broadcast address | |
776 | */ | |
777 | velocity_set_multi(vptr->dev); | |
778 | ||
779 | /* | |
780 | * Enable MII auto-polling | |
781 | */ | |
782 | enable_mii_autopoll(regs); | |
783 | ||
784 | vptr->int_mask = INT_MASK_DEF; | |
785 | ||
0fe9f15e | 786 | writel(vptr->rx.pool_dma, ®s->RDBaseLo); |
1da177e4 LT |
787 | writew(vptr->options.numrx - 1, ®s->RDCSize); |
788 | mac_rx_queue_run(regs); | |
789 | mac_rx_queue_wake(regs); | |
790 | ||
791 | writew(vptr->options.numtx - 1, ®s->TDCSize); | |
792 | ||
0fe9f15e FR |
793 | for (i = 0; i < vptr->tx.numq; i++) { |
794 | writel(vptr->tx.pool_dma[i], ®s->TDBaseLo[i]); | |
1da177e4 LT |
795 | mac_tx_queue_run(regs, i); |
796 | } | |
797 | ||
798 | init_flow_control_register(vptr); | |
799 | ||
800 | writel(CR0_STOP, ®s->CR0Clr); | |
801 | writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), ®s->CR0Set); | |
802 | ||
803 | mii_status = velocity_get_opt_media_mode(vptr); | |
804 | netif_stop_queue(vptr->dev); | |
805 | ||
806 | mii_init(vptr, mii_status); | |
807 | ||
808 | if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) { | |
809 | velocity_print_link_status(vptr); | |
810 | if (!(vptr->mii_status & VELOCITY_LINK_FAIL)) | |
811 | netif_wake_queue(vptr->dev); | |
812 | } | |
813 | ||
814 | enable_flow_control_ability(vptr); | |
815 | mac_hw_mibs_init(regs); | |
816 | mac_write_int_mask(vptr->int_mask, regs); | |
817 | mac_clear_isr(regs); | |
818 | ||
819 | } | |
820 | } | |
821 | ||
822 | /** | |
823 | * velocity_soft_reset - soft reset | |
824 | * @vptr: velocity to reset | |
825 | * | |
826 | * Kick off a soft reset of the velocity adapter and then poll | |
827 | * until the reset sequence has completed before returning. | |
828 | */ | |
829 | ||
830 | static int velocity_soft_reset(struct velocity_info *vptr) | |
831 | { | |
832 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
833 | int i = 0; | |
834 | ||
835 | writel(CR0_SFRST, ®s->CR0Set); | |
836 | ||
837 | for (i = 0; i < W_MAX_TIMEOUT; i++) { | |
838 | udelay(5); | |
839 | if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, ®s->CR0Set)) | |
840 | break; | |
841 | } | |
842 | ||
843 | if (i == W_MAX_TIMEOUT) { | |
844 | writel(CR0_FORSRST, ®s->CR0Set); | |
845 | /* FIXME: PCI POSTING */ | |
846 | /* delay 2ms */ | |
847 | mdelay(2); | |
848 | } | |
849 | return 0; | |
850 | } | |
851 | ||
39a11bd9 SH |
852 | static const struct net_device_ops velocity_netdev_ops = { |
853 | .ndo_open = velocity_open, | |
854 | .ndo_stop = velocity_close, | |
00829823 | 855 | .ndo_start_xmit = velocity_xmit, |
39a11bd9 SH |
856 | .ndo_get_stats = velocity_get_stats, |
857 | .ndo_validate_addr = eth_validate_addr, | |
fe96aaa1 | 858 | .ndo_set_mac_address = eth_mac_addr, |
39a11bd9 SH |
859 | .ndo_set_multicast_list = velocity_set_multi, |
860 | .ndo_change_mtu = velocity_change_mtu, | |
861 | .ndo_do_ioctl = velocity_ioctl, | |
862 | .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid, | |
863 | .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid, | |
864 | .ndo_vlan_rx_register = velocity_vlan_rx_register, | |
865 | }; | |
866 | ||
1da177e4 LT |
867 | /** |
868 | * velocity_found1 - set up discovered velocity card | |
869 | * @pdev: PCI device | |
870 | * @ent: PCI device table entry that matched | |
871 | * | |
872 | * Configure a discovered adapter from scratch. Return a negative | |
873 | * errno error code on failure paths. | |
874 | */ | |
875 | ||
876 | static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent) | |
877 | { | |
878 | static int first = 1; | |
879 | struct net_device *dev; | |
880 | int i; | |
07b5f6a6 | 881 | const char *drv_string; |
cabb7667 | 882 | const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data]; |
1da177e4 LT |
883 | struct velocity_info *vptr; |
884 | struct mac_regs __iomem * regs; | |
885 | int ret = -ENOMEM; | |
886 | ||
e54f4893 JG |
887 | /* FIXME: this driver, like almost all other ethernet drivers, |
888 | * can support more than MAX_UNITS. | |
889 | */ | |
1da177e4 | 890 | if (velocity_nics >= MAX_UNITS) { |
6aa20a22 | 891 | dev_notice(&pdev->dev, "already found %d NICs.\n", |
e54f4893 | 892 | velocity_nics); |
1da177e4 LT |
893 | return -ENODEV; |
894 | } | |
895 | ||
896 | dev = alloc_etherdev(sizeof(struct velocity_info)); | |
e54f4893 | 897 | if (!dev) { |
9b91cf9d | 898 | dev_err(&pdev->dev, "allocate net device failed.\n"); |
1da177e4 LT |
899 | goto out; |
900 | } | |
6aa20a22 | 901 | |
1da177e4 | 902 | /* Chain it all together */ |
6aa20a22 | 903 | |
1da177e4 | 904 | SET_NETDEV_DEV(dev, &pdev->dev); |
8ab6f3f7 | 905 | vptr = netdev_priv(dev); |
1da177e4 LT |
906 | |
907 | ||
908 | if (first) { | |
6aa20a22 | 909 | printk(KERN_INFO "%s Ver. %s\n", |
1da177e4 LT |
910 | VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION); |
911 | printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n"); | |
912 | printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n"); | |
913 | first = 0; | |
914 | } | |
915 | ||
916 | velocity_init_info(pdev, vptr, info); | |
917 | ||
918 | vptr->dev = dev; | |
919 | ||
920 | dev->irq = pdev->irq; | |
921 | ||
922 | ret = pci_enable_device(pdev); | |
6aa20a22 | 923 | if (ret < 0) |
1da177e4 LT |
924 | goto err_free_dev; |
925 | ||
926 | ret = velocity_get_pci_info(vptr, pdev); | |
927 | if (ret < 0) { | |
e54f4893 | 928 | /* error message already printed */ |
1da177e4 LT |
929 | goto err_disable; |
930 | } | |
931 | ||
932 | ret = pci_request_regions(pdev, VELOCITY_NAME); | |
933 | if (ret < 0) { | |
9b91cf9d | 934 | dev_err(&pdev->dev, "No PCI resources.\n"); |
1da177e4 LT |
935 | goto err_disable; |
936 | } | |
937 | ||
cabb7667 | 938 | regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE); |
1da177e4 LT |
939 | if (regs == NULL) { |
940 | ret = -EIO; | |
941 | goto err_release_res; | |
942 | } | |
943 | ||
944 | vptr->mac_regs = regs; | |
945 | ||
946 | mac_wol_reset(regs); | |
947 | ||
948 | dev->base_addr = vptr->ioaddr; | |
949 | ||
950 | for (i = 0; i < 6; i++) | |
951 | dev->dev_addr[i] = readb(®s->PAR[i]); | |
952 | ||
953 | ||
07b5f6a6 SH |
954 | drv_string = dev_driver_string(&pdev->dev); |
955 | ||
956 | velocity_get_options(&vptr->options, velocity_nics, drv_string); | |
1da177e4 | 957 | |
6aa20a22 | 958 | /* |
1da177e4 LT |
959 | * Mask out the options cannot be set to the chip |
960 | */ | |
6aa20a22 | 961 | |
1da177e4 LT |
962 | vptr->options.flags &= info->flags; |
963 | ||
964 | /* | |
965 | * Enable the chip specified capbilities | |
966 | */ | |
6aa20a22 | 967 | |
1da177e4 LT |
968 | vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL); |
969 | ||
970 | vptr->wol_opts = vptr->options.wol_opts; | |
971 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
972 | ||
973 | vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs); | |
974 | ||
975 | dev->irq = pdev->irq; | |
39a11bd9 | 976 | dev->netdev_ops = &velocity_netdev_ops; |
1da177e4 | 977 | dev->ethtool_ops = &velocity_ethtool_ops; |
501e4d24 | 978 | |
1da177e4 LT |
979 | #ifdef VELOCITY_ZERO_COPY_SUPPORT |
980 | dev->features |= NETIF_F_SG; | |
981 | #endif | |
d4f73c8e FR |
982 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | |
983 | NETIF_F_HW_VLAN_RX; | |
1da177e4 | 984 | |
501e4d24 | 985 | if (vptr->flags & VELOCITY_FLAGS_TX_CSUM) |
9f3f46b5 | 986 | dev->features |= NETIF_F_IP_CSUM; |
1da177e4 LT |
987 | |
988 | ret = register_netdev(dev); | |
989 | if (ret < 0) | |
990 | goto err_iounmap; | |
991 | ||
d3b238a0 | 992 | if (!velocity_get_link(dev)) { |
8a22dddb | 993 | netif_carrier_off(dev); |
d3b238a0 SR |
994 | vptr->mii_status |= VELOCITY_LINK_FAIL; |
995 | } | |
8a22dddb | 996 | |
1da177e4 LT |
997 | velocity_print_info(vptr); |
998 | pci_set_drvdata(pdev, dev); | |
6aa20a22 | 999 | |
1da177e4 | 1000 | /* and leave the chip powered down */ |
6aa20a22 | 1001 | |
1da177e4 LT |
1002 | pci_set_power_state(pdev, PCI_D3hot); |
1003 | #ifdef CONFIG_PM | |
1004 | { | |
1005 | unsigned long flags; | |
1006 | ||
1007 | spin_lock_irqsave(&velocity_dev_list_lock, flags); | |
1008 | list_add(&vptr->list, &velocity_dev_list); | |
1009 | spin_unlock_irqrestore(&velocity_dev_list_lock, flags); | |
1010 | } | |
1011 | #endif | |
1012 | velocity_nics++; | |
1013 | out: | |
1014 | return ret; | |
1015 | ||
1016 | err_iounmap: | |
1017 | iounmap(regs); | |
1018 | err_release_res: | |
1019 | pci_release_regions(pdev); | |
1020 | err_disable: | |
1021 | pci_disable_device(pdev); | |
1022 | err_free_dev: | |
1023 | free_netdev(dev); | |
1024 | goto out; | |
1025 | } | |
1026 | ||
1027 | /** | |
1028 | * velocity_print_info - per driver data | |
1029 | * @vptr: velocity | |
1030 | * | |
1031 | * Print per driver data as the kernel driver finds Velocity | |
1032 | * hardware | |
1033 | */ | |
1034 | ||
1035 | static void __devinit velocity_print_info(struct velocity_info *vptr) | |
1036 | { | |
1037 | struct net_device *dev = vptr->dev; | |
1038 | ||
1039 | printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id)); | |
6aa20a22 JG |
1040 | printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
1041 | dev->name, | |
1042 | dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], | |
1da177e4 LT |
1043 | dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); |
1044 | } | |
1045 | ||
1046 | /** | |
1047 | * velocity_init_info - init private data | |
1048 | * @pdev: PCI device | |
1049 | * @vptr: Velocity info | |
1050 | * @info: Board type | |
1051 | * | |
1052 | * Set up the initial velocity_info struct for the device that has been | |
1053 | * discovered. | |
1054 | */ | |
1055 | ||
cabb7667 JG |
1056 | static void __devinit velocity_init_info(struct pci_dev *pdev, |
1057 | struct velocity_info *vptr, | |
1058 | const struct velocity_info_tbl *info) | |
1da177e4 LT |
1059 | { |
1060 | memset(vptr, 0, sizeof(struct velocity_info)); | |
1061 | ||
1062 | vptr->pdev = pdev; | |
1063 | vptr->chip_id = info->chip_id; | |
0fe9f15e | 1064 | vptr->tx.numq = info->txqueue; |
1da177e4 LT |
1065 | vptr->multicast_limit = MCAM_SIZE; |
1066 | spin_lock_init(&vptr->lock); | |
1067 | INIT_LIST_HEAD(&vptr->list); | |
1068 | } | |
1069 | ||
1070 | /** | |
1071 | * velocity_get_pci_info - retrieve PCI info for device | |
1072 | * @vptr: velocity device | |
1073 | * @pdev: PCI device it matches | |
1074 | * | |
1075 | * Retrieve the PCI configuration space data that interests us from | |
1076 | * the kernel PCI layer | |
1077 | */ | |
1078 | ||
1079 | static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev) | |
1080 | { | |
44c10138 | 1081 | vptr->rev_id = pdev->revision; |
6aa20a22 | 1082 | |
1da177e4 LT |
1083 | pci_set_master(pdev); |
1084 | ||
1085 | vptr->ioaddr = pci_resource_start(pdev, 0); | |
1086 | vptr->memaddr = pci_resource_start(pdev, 1); | |
6aa20a22 | 1087 | |
e54f4893 | 1088 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) { |
9b91cf9d | 1089 | dev_err(&pdev->dev, |
e54f4893 | 1090 | "region #0 is not an I/O resource, aborting.\n"); |
1da177e4 LT |
1091 | return -EINVAL; |
1092 | } | |
1093 | ||
e54f4893 | 1094 | if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) { |
9b91cf9d | 1095 | dev_err(&pdev->dev, |
e54f4893 | 1096 | "region #1 is an I/O resource, aborting.\n"); |
1da177e4 LT |
1097 | return -EINVAL; |
1098 | } | |
1099 | ||
cabb7667 | 1100 | if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) { |
9b91cf9d | 1101 | dev_err(&pdev->dev, "region #1 is too small.\n"); |
1da177e4 LT |
1102 | return -EINVAL; |
1103 | } | |
1104 | vptr->pdev = pdev; | |
1105 | ||
1106 | return 0; | |
1107 | } | |
1108 | ||
1109 | /** | |
3c4dc711 | 1110 | * velocity_init_dma_rings - set up DMA rings |
1da177e4 LT |
1111 | * @vptr: Velocity to set up |
1112 | * | |
1113 | * Allocate PCI mapped DMA rings for the receive and transmit layer | |
1114 | * to use. | |
1115 | */ | |
1116 | ||
3c4dc711 | 1117 | static int velocity_init_dma_rings(struct velocity_info *vptr) |
1da177e4 | 1118 | { |
8ac53afc FR |
1119 | struct velocity_opt *opt = &vptr->options; |
1120 | const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc); | |
1121 | const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc); | |
1122 | struct pci_dev *pdev = vptr->pdev; | |
1da177e4 | 1123 | dma_addr_t pool_dma; |
8ac53afc FR |
1124 | void *pool; |
1125 | unsigned int i; | |
1da177e4 LT |
1126 | |
1127 | /* | |
8ac53afc FR |
1128 | * Allocate all RD/TD rings a single pool. |
1129 | * | |
1da177e4 LT |
1130 | * pci_alloc_consistent() fulfills the requirement for 64 bytes |
1131 | * alignment | |
1132 | */ | |
0fe9f15e | 1133 | pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq + |
8ac53afc FR |
1134 | rx_ring_size, &pool_dma); |
1135 | if (!pool) { | |
1136 | dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n", | |
1137 | vptr->dev->name); | |
1da177e4 LT |
1138 | return -ENOMEM; |
1139 | } | |
1140 | ||
0fe9f15e FR |
1141 | vptr->rx.ring = pool; |
1142 | vptr->rx.pool_dma = pool_dma; | |
1da177e4 | 1143 | |
8ac53afc FR |
1144 | pool += rx_ring_size; |
1145 | pool_dma += rx_ring_size; | |
1da177e4 | 1146 | |
0fe9f15e FR |
1147 | for (i = 0; i < vptr->tx.numq; i++) { |
1148 | vptr->tx.rings[i] = pool; | |
1149 | vptr->tx.pool_dma[i] = pool_dma; | |
8ac53afc FR |
1150 | pool += tx_ring_size; |
1151 | pool_dma += tx_ring_size; | |
1da177e4 | 1152 | } |
8ac53afc | 1153 | |
1da177e4 LT |
1154 | return 0; |
1155 | } | |
1156 | ||
1157 | /** | |
3c4dc711 | 1158 | * velocity_free_dma_rings - free PCI ring pointers |
1da177e4 LT |
1159 | * @vptr: Velocity to free from |
1160 | * | |
1161 | * Clean up the PCI ring buffers allocated to this velocity. | |
1162 | */ | |
1163 | ||
3c4dc711 | 1164 | static void velocity_free_dma_rings(struct velocity_info *vptr) |
1da177e4 | 1165 | { |
580a6902 | 1166 | const int size = vptr->options.numrx * sizeof(struct rx_desc) + |
0fe9f15e | 1167 | vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq; |
1da177e4 | 1168 | |
0fe9f15e | 1169 | pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma); |
1da177e4 LT |
1170 | } |
1171 | ||
28133176 | 1172 | static void velocity_give_many_rx_descs(struct velocity_info *vptr) |
1da177e4 LT |
1173 | { |
1174 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
1175 | int avail, dirty, unusable; | |
1176 | ||
1177 | /* | |
1178 | * RD number must be equal to 4X per hardware spec | |
1179 | * (programming guide rev 1.20, p.13) | |
1180 | */ | |
0fe9f15e | 1181 | if (vptr->rx.filled < 4) |
1da177e4 LT |
1182 | return; |
1183 | ||
1184 | wmb(); | |
1185 | ||
0fe9f15e FR |
1186 | unusable = vptr->rx.filled & 0x0003; |
1187 | dirty = vptr->rx.dirty - unusable; | |
1188 | for (avail = vptr->rx.filled & 0xfffc; avail; avail--) { | |
1da177e4 | 1189 | dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1; |
0fe9f15e | 1190 | vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC; |
1da177e4 LT |
1191 | } |
1192 | ||
0fe9f15e FR |
1193 | writew(vptr->rx.filled & 0xfffc, ®s->RBRDU); |
1194 | vptr->rx.filled = unusable; | |
1da177e4 LT |
1195 | } |
1196 | ||
1197 | static int velocity_rx_refill(struct velocity_info *vptr) | |
1198 | { | |
0fe9f15e | 1199 | int dirty = vptr->rx.dirty, done = 0; |
1da177e4 LT |
1200 | |
1201 | do { | |
0fe9f15e | 1202 | struct rx_desc *rd = vptr->rx.ring + dirty; |
1da177e4 LT |
1203 | |
1204 | /* Fine for an all zero Rx desc at init time as well */ | |
4a51c0d0 | 1205 | if (rd->rdesc0.len & OWNED_BY_NIC) |
1da177e4 LT |
1206 | break; |
1207 | ||
0fe9f15e | 1208 | if (!vptr->rx.info[dirty].skb) { |
28133176 | 1209 | if (velocity_alloc_rx_buf(vptr, dirty) < 0) |
1da177e4 LT |
1210 | break; |
1211 | } | |
1212 | done++; | |
6aa20a22 | 1213 | dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0; |
0fe9f15e | 1214 | } while (dirty != vptr->rx.curr); |
1da177e4 LT |
1215 | |
1216 | if (done) { | |
0fe9f15e FR |
1217 | vptr->rx.dirty = dirty; |
1218 | vptr->rx.filled += done; | |
1da177e4 LT |
1219 | } |
1220 | ||
28133176 | 1221 | return done; |
1da177e4 LT |
1222 | } |
1223 | ||
9088d9a4 FR |
1224 | static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu) |
1225 | { | |
0fe9f15e | 1226 | vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32; |
9088d9a4 FR |
1227 | } |
1228 | ||
1da177e4 LT |
1229 | /** |
1230 | * velocity_init_rd_ring - set up receive ring | |
1231 | * @vptr: velocity to configure | |
1232 | * | |
1233 | * Allocate and set up the receive buffers for each ring slot and | |
1234 | * assign them to the network adapter. | |
1235 | */ | |
1236 | ||
1237 | static int velocity_init_rd_ring(struct velocity_info *vptr) | |
1238 | { | |
28133176 | 1239 | int ret = -ENOMEM; |
48f6b053 | 1240 | |
0fe9f15e | 1241 | vptr->rx.info = kcalloc(vptr->options.numrx, |
ae94607d | 1242 | sizeof(struct velocity_rd_info), GFP_KERNEL); |
0fe9f15e | 1243 | if (!vptr->rx.info) |
28133176 | 1244 | goto out; |
1da177e4 | 1245 | |
3c4dc711 | 1246 | velocity_init_rx_ring_indexes(vptr); |
1da177e4 | 1247 | |
28133176 | 1248 | if (velocity_rx_refill(vptr) != vptr->options.numrx) { |
1da177e4 LT |
1249 | VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR |
1250 | "%s: failed to allocate RX buffer.\n", vptr->dev->name); | |
1251 | velocity_free_rd_ring(vptr); | |
28133176 | 1252 | goto out; |
1da177e4 | 1253 | } |
ae94607d | 1254 | |
28133176 FR |
1255 | ret = 0; |
1256 | out: | |
1da177e4 LT |
1257 | return ret; |
1258 | } | |
1259 | ||
1260 | /** | |
1261 | * velocity_free_rd_ring - free receive ring | |
1262 | * @vptr: velocity to clean up | |
1263 | * | |
1264 | * Free the receive buffers for each ring slot and any | |
1265 | * attached socket buffers that need to go away. | |
1266 | */ | |
1267 | ||
1268 | static void velocity_free_rd_ring(struct velocity_info *vptr) | |
1269 | { | |
1270 | int i; | |
1271 | ||
0fe9f15e | 1272 | if (vptr->rx.info == NULL) |
1da177e4 LT |
1273 | return; |
1274 | ||
1275 | for (i = 0; i < vptr->options.numrx; i++) { | |
0fe9f15e FR |
1276 | struct velocity_rd_info *rd_info = &(vptr->rx.info[i]); |
1277 | struct rx_desc *rd = vptr->rx.ring + i; | |
b3c3e7d7 FR |
1278 | |
1279 | memset(rd, 0, sizeof(*rd)); | |
1da177e4 LT |
1280 | |
1281 | if (!rd_info->skb) | |
1282 | continue; | |
0fe9f15e | 1283 | pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz, |
1da177e4 | 1284 | PCI_DMA_FROMDEVICE); |
822f1a57 | 1285 | rd_info->skb_dma = 0; |
1da177e4 LT |
1286 | |
1287 | dev_kfree_skb(rd_info->skb); | |
1288 | rd_info->skb = NULL; | |
1289 | } | |
1290 | ||
0fe9f15e FR |
1291 | kfree(vptr->rx.info); |
1292 | vptr->rx.info = NULL; | |
1da177e4 LT |
1293 | } |
1294 | ||
1295 | /** | |
1296 | * velocity_init_td_ring - set up transmit ring | |
1297 | * @vptr: velocity | |
1298 | * | |
1299 | * Set up the transmit ring and chain the ring pointers together. | |
1300 | * Returns zero on success or a negative posix errno code for | |
1301 | * failure. | |
1302 | */ | |
6aa20a22 | 1303 | |
1da177e4 LT |
1304 | static int velocity_init_td_ring(struct velocity_info *vptr) |
1305 | { | |
1da177e4 | 1306 | dma_addr_t curr; |
0d1cfd20 | 1307 | int j; |
1da177e4 LT |
1308 | |
1309 | /* Init the TD ring entries */ | |
0fe9f15e FR |
1310 | for (j = 0; j < vptr->tx.numq; j++) { |
1311 | curr = vptr->tx.pool_dma[j]; | |
1da177e4 | 1312 | |
0fe9f15e | 1313 | vptr->tx.infos[j] = kcalloc(vptr->options.numtx, |
ae94607d MK |
1314 | sizeof(struct velocity_td_info), |
1315 | GFP_KERNEL); | |
0fe9f15e | 1316 | if (!vptr->tx.infos[j]) { |
1da177e4 | 1317 | while(--j >= 0) |
0fe9f15e | 1318 | kfree(vptr->tx.infos[j]); |
1da177e4 LT |
1319 | return -ENOMEM; |
1320 | } | |
1da177e4 | 1321 | |
0fe9f15e | 1322 | vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0; |
1da177e4 LT |
1323 | } |
1324 | return 0; | |
1325 | } | |
1326 | ||
1327 | /* | |
1328 | * FIXME: could we merge this with velocity_free_tx_buf ? | |
1329 | */ | |
1330 | ||
1331 | static void velocity_free_td_ring_entry(struct velocity_info *vptr, | |
1332 | int q, int n) | |
1333 | { | |
0fe9f15e | 1334 | struct velocity_td_info * td_info = &(vptr->tx.infos[q][n]); |
1da177e4 | 1335 | int i; |
6aa20a22 | 1336 | |
1da177e4 LT |
1337 | if (td_info == NULL) |
1338 | return; | |
6aa20a22 | 1339 | |
1da177e4 LT |
1340 | if (td_info->skb) { |
1341 | for (i = 0; i < td_info->nskb_dma; i++) | |
1342 | { | |
1343 | if (td_info->skb_dma[i]) { | |
6aa20a22 | 1344 | pci_unmap_single(vptr->pdev, td_info->skb_dma[i], |
1da177e4 | 1345 | td_info->skb->len, PCI_DMA_TODEVICE); |
822f1a57 | 1346 | td_info->skb_dma[i] = 0; |
1da177e4 LT |
1347 | } |
1348 | } | |
1349 | dev_kfree_skb(td_info->skb); | |
1350 | td_info->skb = NULL; | |
1351 | } | |
1352 | } | |
1353 | ||
1354 | /** | |
1355 | * velocity_free_td_ring - free td ring | |
1356 | * @vptr: velocity | |
1357 | * | |
1358 | * Free up the transmit ring for this particular velocity adapter. | |
1359 | * We free the ring contents but not the ring itself. | |
1360 | */ | |
6aa20a22 | 1361 | |
1da177e4 LT |
1362 | static void velocity_free_td_ring(struct velocity_info *vptr) |
1363 | { | |
1364 | int i, j; | |
1365 | ||
0fe9f15e FR |
1366 | for (j = 0; j < vptr->tx.numq; j++) { |
1367 | if (vptr->tx.infos[j] == NULL) | |
1da177e4 LT |
1368 | continue; |
1369 | for (i = 0; i < vptr->options.numtx; i++) { | |
1370 | velocity_free_td_ring_entry(vptr, j, i); | |
1371 | ||
1372 | } | |
0fe9f15e FR |
1373 | kfree(vptr->tx.infos[j]); |
1374 | vptr->tx.infos[j] = NULL; | |
1da177e4 LT |
1375 | } |
1376 | } | |
1377 | ||
1378 | /** | |
1379 | * velocity_rx_srv - service RX interrupt | |
1380 | * @vptr: velocity | |
1381 | * @status: adapter status (unused) | |
1382 | * | |
1383 | * Walk the receive ring of the velocity adapter and remove | |
1384 | * any received packets from the receive queue. Hand the ring | |
1385 | * slots back to the adapter for reuse. | |
1386 | */ | |
6aa20a22 | 1387 | |
1da177e4 LT |
1388 | static int velocity_rx_srv(struct velocity_info *vptr, int status) |
1389 | { | |
553e2335 | 1390 | struct net_device_stats *stats = &vptr->dev->stats; |
0fe9f15e | 1391 | int rd_curr = vptr->rx.curr; |
1da177e4 LT |
1392 | int works = 0; |
1393 | ||
1394 | do { | |
0fe9f15e | 1395 | struct rx_desc *rd = vptr->rx.ring + rd_curr; |
1da177e4 | 1396 | |
0fe9f15e | 1397 | if (!vptr->rx.info[rd_curr].skb) |
1da177e4 LT |
1398 | break; |
1399 | ||
4a51c0d0 | 1400 | if (rd->rdesc0.len & OWNED_BY_NIC) |
1da177e4 LT |
1401 | break; |
1402 | ||
1403 | rmb(); | |
1404 | ||
1405 | /* | |
1406 | * Don't drop CE or RL error frame although RXOK is off | |
1407 | */ | |
4a51c0d0 | 1408 | if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) { |
1da177e4 LT |
1409 | if (velocity_receive_frame(vptr, rd_curr) < 0) |
1410 | stats->rx_dropped++; | |
1411 | } else { | |
1412 | if (rd->rdesc0.RSR & RSR_CRC) | |
1413 | stats->rx_crc_errors++; | |
1414 | if (rd->rdesc0.RSR & RSR_FAE) | |
1415 | stats->rx_frame_errors++; | |
1416 | ||
1417 | stats->rx_dropped++; | |
1418 | } | |
1419 | ||
4a51c0d0 | 1420 | rd->size |= RX_INTEN; |
1da177e4 | 1421 | |
1da177e4 LT |
1422 | rd_curr++; |
1423 | if (rd_curr >= vptr->options.numrx) | |
1424 | rd_curr = 0; | |
1425 | } while (++works <= 15); | |
1426 | ||
0fe9f15e | 1427 | vptr->rx.curr = rd_curr; |
1da177e4 | 1428 | |
28133176 FR |
1429 | if ((works > 0) && (velocity_rx_refill(vptr) > 0)) |
1430 | velocity_give_many_rx_descs(vptr); | |
1da177e4 LT |
1431 | |
1432 | VAR_USED(stats); | |
1433 | return works; | |
1434 | } | |
1435 | ||
1436 | /** | |
1437 | * velocity_rx_csum - checksum process | |
1438 | * @rd: receive packet descriptor | |
1439 | * @skb: network layer packet buffer | |
1440 | * | |
1441 | * Process the status bits for the received packet and determine | |
1442 | * if the checksum was computed and verified by the hardware | |
1443 | */ | |
6aa20a22 | 1444 | |
1da177e4 LT |
1445 | static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb) |
1446 | { | |
1447 | skb->ip_summed = CHECKSUM_NONE; | |
1448 | ||
1449 | if (rd->rdesc1.CSM & CSM_IPKT) { | |
1450 | if (rd->rdesc1.CSM & CSM_IPOK) { | |
6aa20a22 | 1451 | if ((rd->rdesc1.CSM & CSM_TCPKT) || |
1da177e4 LT |
1452 | (rd->rdesc1.CSM & CSM_UDPKT)) { |
1453 | if (!(rd->rdesc1.CSM & CSM_TUPOK)) { | |
1454 | return; | |
1455 | } | |
1456 | } | |
1457 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1458 | } | |
1459 | } | |
1460 | } | |
1461 | ||
1462 | /** | |
1463 | * velocity_rx_copy - in place Rx copy for small packets | |
1464 | * @rx_skb: network layer packet buffer candidate | |
1465 | * @pkt_size: received data size | |
1466 | * @rd: receive packet descriptor | |
1467 | * @dev: network device | |
1468 | * | |
1469 | * Replace the current skb that is scheduled for Rx processing by a | |
1470 | * shorter, immediatly allocated skb, if the received packet is small | |
1471 | * enough. This function returns a negative value if the received | |
1472 | * packet is too big or if memory is exhausted. | |
1473 | */ | |
c73d2589 SH |
1474 | static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size, |
1475 | struct velocity_info *vptr) | |
1da177e4 LT |
1476 | { |
1477 | int ret = -1; | |
1da177e4 LT |
1478 | if (pkt_size < rx_copybreak) { |
1479 | struct sk_buff *new_skb; | |
1480 | ||
c73d2589 | 1481 | new_skb = netdev_alloc_skb(vptr->dev, pkt_size + 2); |
1da177e4 | 1482 | if (new_skb) { |
1da177e4 | 1483 | new_skb->ip_summed = rx_skb[0]->ip_summed; |
c73d2589 SH |
1484 | skb_reserve(new_skb, 2); |
1485 | skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size); | |
1da177e4 LT |
1486 | *rx_skb = new_skb; |
1487 | ret = 0; | |
1488 | } | |
6aa20a22 | 1489 | |
1da177e4 LT |
1490 | } |
1491 | return ret; | |
1492 | } | |
1493 | ||
1494 | /** | |
1495 | * velocity_iph_realign - IP header alignment | |
1496 | * @vptr: velocity we are handling | |
1497 | * @skb: network layer packet buffer | |
1498 | * @pkt_size: received data size | |
1499 | * | |
1500 | * Align IP header on a 2 bytes boundary. This behavior can be | |
1501 | * configured by the user. | |
1502 | */ | |
1503 | static inline void velocity_iph_realign(struct velocity_info *vptr, | |
1504 | struct sk_buff *skb, int pkt_size) | |
1505 | { | |
1da177e4 | 1506 | if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) { |
c03571a3 | 1507 | memmove(skb->data + 2, skb->data, pkt_size); |
1da177e4 LT |
1508 | skb_reserve(skb, 2); |
1509 | } | |
1510 | } | |
1511 | ||
1512 | /** | |
1513 | * velocity_receive_frame - received packet processor | |
1514 | * @vptr: velocity we are handling | |
1515 | * @idx: ring index | |
6aa20a22 | 1516 | * |
1da177e4 LT |
1517 | * A packet has arrived. We process the packet and if appropriate |
1518 | * pass the frame up the network stack | |
1519 | */ | |
6aa20a22 | 1520 | |
1da177e4 LT |
1521 | static int velocity_receive_frame(struct velocity_info *vptr, int idx) |
1522 | { | |
1523 | void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int); | |
553e2335 | 1524 | struct net_device_stats *stats = &vptr->dev->stats; |
0fe9f15e FR |
1525 | struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]); |
1526 | struct rx_desc *rd = &(vptr->rx.ring[idx]); | |
4a51c0d0 | 1527 | int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff; |
1da177e4 LT |
1528 | struct sk_buff *skb; |
1529 | ||
1530 | if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) { | |
1531 | VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name); | |
1532 | stats->rx_length_errors++; | |
1533 | return -EINVAL; | |
1534 | } | |
1535 | ||
1536 | if (rd->rdesc0.RSR & RSR_MAR) | |
553e2335 | 1537 | stats->multicast++; |
1da177e4 LT |
1538 | |
1539 | skb = rd_info->skb; | |
1da177e4 LT |
1540 | |
1541 | pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma, | |
0fe9f15e | 1542 | vptr->rx.buf_sz, PCI_DMA_FROMDEVICE); |
1da177e4 LT |
1543 | |
1544 | /* | |
1545 | * Drop frame not meeting IEEE 802.3 | |
1546 | */ | |
6aa20a22 | 1547 | |
1da177e4 LT |
1548 | if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) { |
1549 | if (rd->rdesc0.RSR & RSR_RL) { | |
1550 | stats->rx_length_errors++; | |
1551 | return -EINVAL; | |
1552 | } | |
1553 | } | |
1554 | ||
1555 | pci_action = pci_dma_sync_single_for_device; | |
1556 | ||
1557 | velocity_rx_csum(rd, skb); | |
1558 | ||
1559 | if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) { | |
1560 | velocity_iph_realign(vptr, skb, pkt_len); | |
1561 | pci_action = pci_unmap_single; | |
1562 | rd_info->skb = NULL; | |
1563 | } | |
1564 | ||
0fe9f15e | 1565 | pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz, |
1da177e4 LT |
1566 | PCI_DMA_FROMDEVICE); |
1567 | ||
1568 | skb_put(skb, pkt_len - 4); | |
4c13eb66 | 1569 | skb->protocol = eth_type_trans(skb, vptr->dev); |
1da177e4 | 1570 | |
d4f73c8e FR |
1571 | if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) { |
1572 | vlan_hwaccel_rx(skb, vptr->vlgrp, | |
1573 | swab16(le16_to_cpu(rd->rdesc1.PQTAG))); | |
1574 | } else | |
1575 | netif_rx(skb); | |
1576 | ||
1da177e4 | 1577 | stats->rx_bytes += pkt_len; |
1da177e4 LT |
1578 | |
1579 | return 0; | |
1580 | } | |
1581 | ||
1582 | /** | |
1583 | * velocity_alloc_rx_buf - allocate aligned receive buffer | |
1584 | * @vptr: velocity | |
1585 | * @idx: ring index | |
1586 | * | |
1587 | * Allocate a new full sized buffer for the reception of a frame and | |
1588 | * map it into PCI space for the hardware to use. The hardware | |
1589 | * requires *64* byte alignment of the buffer which makes life | |
1590 | * less fun than would be ideal. | |
1591 | */ | |
6aa20a22 | 1592 | |
1da177e4 LT |
1593 | static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx) |
1594 | { | |
0fe9f15e FR |
1595 | struct rx_desc *rd = &(vptr->rx.ring[idx]); |
1596 | struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]); | |
1da177e4 | 1597 | |
0fe9f15e | 1598 | rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64); |
1da177e4 LT |
1599 | if (rd_info->skb == NULL) |
1600 | return -ENOMEM; | |
1601 | ||
1602 | /* | |
1603 | * Do the gymnastics to get the buffer head for data at | |
1604 | * 64byte alignment. | |
1605 | */ | |
689be439 | 1606 | skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63); |
0fe9f15e FR |
1607 | rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, |
1608 | vptr->rx.buf_sz, PCI_DMA_FROMDEVICE); | |
6aa20a22 | 1609 | |
1da177e4 LT |
1610 | /* |
1611 | * Fill in the descriptor to match | |
0fe9f15e | 1612 | */ |
6aa20a22 | 1613 | |
1da177e4 | 1614 | *((u32 *) & (rd->rdesc0)) = 0; |
0fe9f15e | 1615 | rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN; |
1da177e4 LT |
1616 | rd->pa_low = cpu_to_le32(rd_info->skb_dma); |
1617 | rd->pa_high = 0; | |
1618 | return 0; | |
1619 | } | |
1620 | ||
1621 | /** | |
1622 | * tx_srv - transmit interrupt service | |
1623 | * @vptr; Velocity | |
1624 | * @status: | |
1625 | * | |
1626 | * Scan the queues looking for transmitted packets that | |
1627 | * we can complete and clean up. Update any statistics as | |
3a4fa0a2 | 1628 | * necessary/ |
1da177e4 | 1629 | */ |
6aa20a22 | 1630 | |
1da177e4 LT |
1631 | static int velocity_tx_srv(struct velocity_info *vptr, u32 status) |
1632 | { | |
1633 | struct tx_desc *td; | |
1634 | int qnum; | |
1635 | int full = 0; | |
1636 | int idx; | |
1637 | int works = 0; | |
1638 | struct velocity_td_info *tdinfo; | |
553e2335 | 1639 | struct net_device_stats *stats = &vptr->dev->stats; |
1da177e4 | 1640 | |
0fe9f15e FR |
1641 | for (qnum = 0; qnum < vptr->tx.numq; qnum++) { |
1642 | for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0; | |
1da177e4 LT |
1643 | idx = (idx + 1) % vptr->options.numtx) { |
1644 | ||
1645 | /* | |
1646 | * Get Tx Descriptor | |
1647 | */ | |
0fe9f15e FR |
1648 | td = &(vptr->tx.rings[qnum][idx]); |
1649 | tdinfo = &(vptr->tx.infos[qnum][idx]); | |
1da177e4 | 1650 | |
4a51c0d0 | 1651 | if (td->tdesc0.len & OWNED_BY_NIC) |
1da177e4 LT |
1652 | break; |
1653 | ||
1654 | if ((works++ > 15)) | |
1655 | break; | |
1656 | ||
1657 | if (td->tdesc0.TSR & TSR0_TERR) { | |
1658 | stats->tx_errors++; | |
1659 | stats->tx_dropped++; | |
1660 | if (td->tdesc0.TSR & TSR0_CDH) | |
1661 | stats->tx_heartbeat_errors++; | |
1662 | if (td->tdesc0.TSR & TSR0_CRS) | |
1663 | stats->tx_carrier_errors++; | |
1664 | if (td->tdesc0.TSR & TSR0_ABT) | |
1665 | stats->tx_aborted_errors++; | |
1666 | if (td->tdesc0.TSR & TSR0_OWC) | |
1667 | stats->tx_window_errors++; | |
1668 | } else { | |
1669 | stats->tx_packets++; | |
1670 | stats->tx_bytes += tdinfo->skb->len; | |
1671 | } | |
1672 | velocity_free_tx_buf(vptr, tdinfo); | |
0fe9f15e | 1673 | vptr->tx.used[qnum]--; |
1da177e4 | 1674 | } |
0fe9f15e | 1675 | vptr->tx.tail[qnum] = idx; |
1da177e4 LT |
1676 | |
1677 | if (AVAIL_TD(vptr, qnum) < 1) { | |
1678 | full = 1; | |
1679 | } | |
1680 | } | |
1681 | /* | |
1682 | * Look to see if we should kick the transmit network | |
1683 | * layer for more work. | |
1684 | */ | |
1685 | if (netif_queue_stopped(vptr->dev) && (full == 0) | |
1686 | && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) { | |
1687 | netif_wake_queue(vptr->dev); | |
1688 | } | |
1689 | return works; | |
1690 | } | |
1691 | ||
1692 | /** | |
1693 | * velocity_print_link_status - link status reporting | |
1694 | * @vptr: velocity to report on | |
1695 | * | |
1696 | * Turn the link status of the velocity card into a kernel log | |
1697 | * description of the new link state, detailing speed and duplex | |
1698 | * status | |
1699 | */ | |
1700 | ||
1701 | static void velocity_print_link_status(struct velocity_info *vptr) | |
1702 | { | |
1703 | ||
1704 | if (vptr->mii_status & VELOCITY_LINK_FAIL) { | |
1705 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name); | |
1706 | } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) { | |
b4fea61a | 1707 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name); |
1da177e4 LT |
1708 | |
1709 | if (vptr->mii_status & VELOCITY_SPEED_1000) | |
1710 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps"); | |
1711 | else if (vptr->mii_status & VELOCITY_SPEED_100) | |
1712 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps"); | |
1713 | else | |
1714 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps"); | |
1715 | ||
1716 | if (vptr->mii_status & VELOCITY_DUPLEX_FULL) | |
1717 | VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n"); | |
1718 | else | |
1719 | VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n"); | |
1720 | } else { | |
1721 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name); | |
1722 | switch (vptr->options.spd_dpx) { | |
1723 | case SPD_DPX_100_HALF: | |
1724 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n"); | |
1725 | break; | |
1726 | case SPD_DPX_100_FULL: | |
1727 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n"); | |
1728 | break; | |
1729 | case SPD_DPX_10_HALF: | |
1730 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n"); | |
1731 | break; | |
1732 | case SPD_DPX_10_FULL: | |
1733 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n"); | |
1734 | break; | |
1735 | default: | |
1736 | break; | |
1737 | } | |
1738 | } | |
1739 | } | |
1740 | ||
1741 | /** | |
1742 | * velocity_error - handle error from controller | |
1743 | * @vptr: velocity | |
1744 | * @status: card status | |
1745 | * | |
1746 | * Process an error report from the hardware and attempt to recover | |
6aa20a22 | 1747 | * the card itself. At the moment we cannot recover from some |
1da177e4 LT |
1748 | * theoretically impossible errors but this could be fixed using |
1749 | * the pci_device_failed logic to bounce the hardware | |
1750 | * | |
1751 | */ | |
6aa20a22 | 1752 | |
1da177e4 LT |
1753 | static void velocity_error(struct velocity_info *vptr, int status) |
1754 | { | |
1755 | ||
1756 | if (status & ISR_TXSTLI) { | |
1757 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
1758 | ||
0e6ff158 | 1759 | printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(®s->TDIdx[0])); |
1da177e4 LT |
1760 | BYTE_REG_BITS_ON(TXESR_TDSTR, ®s->TXESR); |
1761 | writew(TRDCSR_RUN, ®s->TDCSRClr); | |
1762 | netif_stop_queue(vptr->dev); | |
6aa20a22 | 1763 | |
1da177e4 LT |
1764 | /* FIXME: port over the pci_device_failed code and use it |
1765 | here */ | |
1766 | } | |
1767 | ||
1768 | if (status & ISR_SRCI) { | |
1769 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
1770 | int linked; | |
1771 | ||
1772 | if (vptr->options.spd_dpx == SPD_DPX_AUTO) { | |
1773 | vptr->mii_status = check_connection_type(regs); | |
1774 | ||
1775 | /* | |
6aa20a22 | 1776 | * If it is a 3119, disable frame bursting in |
1da177e4 LT |
1777 | * halfduplex mode and enable it in fullduplex |
1778 | * mode | |
1779 | */ | |
1780 | if (vptr->rev_id < REV_ID_VT3216_A0) { | |
1781 | if (vptr->mii_status | VELOCITY_DUPLEX_FULL) | |
1782 | BYTE_REG_BITS_ON(TCR_TB2BDIS, ®s->TCR); | |
1783 | else | |
1784 | BYTE_REG_BITS_OFF(TCR_TB2BDIS, ®s->TCR); | |
1785 | } | |
1786 | /* | |
1787 | * Only enable CD heart beat counter in 10HD mode | |
1788 | */ | |
1789 | if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) { | |
1790 | BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); | |
1791 | } else { | |
1792 | BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); | |
1793 | } | |
1794 | } | |
1795 | /* | |
1796 | * Get link status from PHYSR0 | |
1797 | */ | |
1798 | linked = readb(®s->PHYSR0) & PHYSR0_LINKGD; | |
1799 | ||
1800 | if (linked) { | |
1801 | vptr->mii_status &= ~VELOCITY_LINK_FAIL; | |
8a22dddb | 1802 | netif_carrier_on(vptr->dev); |
1da177e4 LT |
1803 | } else { |
1804 | vptr->mii_status |= VELOCITY_LINK_FAIL; | |
8a22dddb | 1805 | netif_carrier_off(vptr->dev); |
1da177e4 LT |
1806 | } |
1807 | ||
1808 | velocity_print_link_status(vptr); | |
1809 | enable_flow_control_ability(vptr); | |
1810 | ||
1811 | /* | |
6aa20a22 | 1812 | * Re-enable auto-polling because SRCI will disable |
1da177e4 LT |
1813 | * auto-polling |
1814 | */ | |
6aa20a22 | 1815 | |
1da177e4 LT |
1816 | enable_mii_autopoll(regs); |
1817 | ||
1818 | if (vptr->mii_status & VELOCITY_LINK_FAIL) | |
1819 | netif_stop_queue(vptr->dev); | |
1820 | else | |
1821 | netif_wake_queue(vptr->dev); | |
1822 | ||
1823 | }; | |
1824 | if (status & ISR_MIBFI) | |
1825 | velocity_update_hw_mibs(vptr); | |
1826 | if (status & ISR_LSTEI) | |
1827 | mac_rx_queue_wake(vptr->mac_regs); | |
1828 | } | |
1829 | ||
1830 | /** | |
1831 | * velocity_free_tx_buf - free transmit buffer | |
1832 | * @vptr: velocity | |
1833 | * @tdinfo: buffer | |
1834 | * | |
1835 | * Release an transmit buffer. If the buffer was preallocated then | |
1836 | * recycle it, if not then unmap the buffer. | |
1837 | */ | |
6aa20a22 | 1838 | |
1da177e4 LT |
1839 | static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo) |
1840 | { | |
1841 | struct sk_buff *skb = tdinfo->skb; | |
1842 | int i; | |
59f8e169 | 1843 | int pktlen; |
1da177e4 LT |
1844 | |
1845 | /* | |
1846 | * Don't unmap the pre-allocated tx_bufs | |
1847 | */ | |
580a6902 | 1848 | if (tdinfo->skb_dma) { |
1da177e4 | 1849 | |
f6b24caa | 1850 | pktlen = max_t(unsigned int, skb->len, ETH_ZLEN); |
1da177e4 LT |
1851 | for (i = 0; i < tdinfo->nskb_dma; i++) { |
1852 | #ifdef VELOCITY_ZERO_COPY_SUPPORT | |
4a51c0d0 | 1853 | pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE); |
1da177e4 | 1854 | #else |
59f8e169 | 1855 | pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], pktlen, PCI_DMA_TODEVICE); |
1da177e4 LT |
1856 | #endif |
1857 | tdinfo->skb_dma[i] = 0; | |
1858 | } | |
1859 | } | |
1860 | dev_kfree_skb_irq(skb); | |
1861 | tdinfo->skb = NULL; | |
1862 | } | |
1863 | ||
3c4dc711 FR |
1864 | static int velocity_init_rings(struct velocity_info *vptr, int mtu) |
1865 | { | |
1866 | int ret; | |
1867 | ||
1868 | velocity_set_rxbufsize(vptr, mtu); | |
1869 | ||
1870 | ret = velocity_init_dma_rings(vptr); | |
1871 | if (ret < 0) | |
1872 | goto out; | |
1873 | ||
1874 | ret = velocity_init_rd_ring(vptr); | |
1875 | if (ret < 0) | |
1876 | goto err_free_dma_rings_0; | |
1877 | ||
1878 | ret = velocity_init_td_ring(vptr); | |
1879 | if (ret < 0) | |
1880 | goto err_free_rd_ring_1; | |
1881 | out: | |
1882 | return ret; | |
1883 | ||
1884 | err_free_rd_ring_1: | |
1885 | velocity_free_rd_ring(vptr); | |
1886 | err_free_dma_rings_0: | |
1887 | velocity_free_dma_rings(vptr); | |
1888 | goto out; | |
1889 | } | |
1890 | ||
1891 | static void velocity_free_rings(struct velocity_info *vptr) | |
1892 | { | |
1893 | velocity_free_td_ring(vptr); | |
1894 | velocity_free_rd_ring(vptr); | |
1895 | velocity_free_dma_rings(vptr); | |
1896 | } | |
1897 | ||
1da177e4 LT |
1898 | /** |
1899 | * velocity_open - interface activation callback | |
1900 | * @dev: network layer device to open | |
1901 | * | |
1902 | * Called when the network layer brings the interface up. Returns | |
1903 | * a negative posix error code on failure, or zero on success. | |
1904 | * | |
1905 | * All the ring allocation and set up is done on open for this | |
1906 | * adapter to minimise memory usage when inactive | |
1907 | */ | |
6aa20a22 | 1908 | |
1da177e4 LT |
1909 | static int velocity_open(struct net_device *dev) |
1910 | { | |
8ab6f3f7 | 1911 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
1912 | int ret; |
1913 | ||
3c4dc711 | 1914 | ret = velocity_init_rings(vptr, dev->mtu); |
1da177e4 LT |
1915 | if (ret < 0) |
1916 | goto out; | |
1917 | ||
6aa20a22 | 1918 | /* Ensure chip is running */ |
1da177e4 | 1919 | pci_set_power_state(vptr->pdev, PCI_D0); |
6aa20a22 | 1920 | |
28133176 FR |
1921 | velocity_give_many_rx_descs(vptr); |
1922 | ||
1da177e4 LT |
1923 | velocity_init_registers(vptr, VELOCITY_INIT_COLD); |
1924 | ||
1fb9df5d | 1925 | ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED, |
1da177e4 LT |
1926 | dev->name, dev); |
1927 | if (ret < 0) { | |
1928 | /* Power down the chip */ | |
1929 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
3c4dc711 FR |
1930 | velocity_free_rings(vptr); |
1931 | goto out; | |
1da177e4 LT |
1932 | } |
1933 | ||
1934 | mac_enable_int(vptr->mac_regs); | |
1935 | netif_start_queue(dev); | |
1936 | vptr->flags |= VELOCITY_FLAGS_OPENED; | |
1937 | out: | |
1938 | return ret; | |
1da177e4 LT |
1939 | } |
1940 | ||
6aa20a22 | 1941 | /** |
1da177e4 LT |
1942 | * velocity_change_mtu - MTU change callback |
1943 | * @dev: network device | |
1944 | * @new_mtu: desired MTU | |
1945 | * | |
1946 | * Handle requests from the networking layer for MTU change on | |
1947 | * this interface. It gets called on a change by the network layer. | |
1948 | * Return zero for success or negative posix error code. | |
1949 | */ | |
6aa20a22 | 1950 | |
1da177e4 LT |
1951 | static int velocity_change_mtu(struct net_device *dev, int new_mtu) |
1952 | { | |
8ab6f3f7 | 1953 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
1954 | int ret = 0; |
1955 | ||
1956 | if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) { | |
6aa20a22 | 1957 | VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n", |
1da177e4 | 1958 | vptr->dev->name); |
3c4dc711 FR |
1959 | ret = -EINVAL; |
1960 | goto out_0; | |
1da177e4 LT |
1961 | } |
1962 | ||
bd7b3f34 SH |
1963 | if (!netif_running(dev)) { |
1964 | dev->mtu = new_mtu; | |
3c4dc711 | 1965 | goto out_0; |
bd7b3f34 SH |
1966 | } |
1967 | ||
3c4dc711 FR |
1968 | if (dev->mtu != new_mtu) { |
1969 | struct velocity_info *tmp_vptr; | |
1970 | unsigned long flags; | |
1971 | struct rx_info rx; | |
1972 | struct tx_info tx; | |
1973 | ||
1974 | tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL); | |
1975 | if (!tmp_vptr) { | |
1976 | ret = -ENOMEM; | |
1977 | goto out_0; | |
1978 | } | |
1979 | ||
1980 | tmp_vptr->dev = dev; | |
1981 | tmp_vptr->pdev = vptr->pdev; | |
1982 | tmp_vptr->options = vptr->options; | |
1983 | tmp_vptr->tx.numq = vptr->tx.numq; | |
1984 | ||
1985 | ret = velocity_init_rings(tmp_vptr, new_mtu); | |
1986 | if (ret < 0) | |
1987 | goto out_free_tmp_vptr_1; | |
1988 | ||
1da177e4 LT |
1989 | spin_lock_irqsave(&vptr->lock, flags); |
1990 | ||
1991 | netif_stop_queue(dev); | |
1992 | velocity_shutdown(vptr); | |
1993 | ||
3c4dc711 FR |
1994 | rx = vptr->rx; |
1995 | tx = vptr->tx; | |
1da177e4 | 1996 | |
3c4dc711 FR |
1997 | vptr->rx = tmp_vptr->rx; |
1998 | vptr->tx = tmp_vptr->tx; | |
1da177e4 | 1999 | |
3c4dc711 FR |
2000 | tmp_vptr->rx = rx; |
2001 | tmp_vptr->tx = tx; | |
9088d9a4 | 2002 | |
3c4dc711 | 2003 | dev->mtu = new_mtu; |
1da177e4 | 2004 | |
3c4dc711 | 2005 | velocity_give_many_rx_descs(vptr); |
1da177e4 LT |
2006 | |
2007 | velocity_init_registers(vptr, VELOCITY_INIT_COLD); | |
2008 | ||
2009 | mac_enable_int(vptr->mac_regs); | |
2010 | netif_start_queue(dev); | |
3c4dc711 | 2011 | |
1da177e4 | 2012 | spin_unlock_irqrestore(&vptr->lock, flags); |
1da177e4 | 2013 | |
3c4dc711 FR |
2014 | velocity_free_rings(tmp_vptr); |
2015 | ||
2016 | out_free_tmp_vptr_1: | |
2017 | kfree(tmp_vptr); | |
2018 | } | |
2019 | out_0: | |
1da177e4 LT |
2020 | return ret; |
2021 | } | |
2022 | ||
2023 | /** | |
2024 | * velocity_shutdown - shut down the chip | |
2025 | * @vptr: velocity to deactivate | |
2026 | * | |
2027 | * Shuts down the internal operations of the velocity and | |
2028 | * disables interrupts, autopolling, transmit and receive | |
2029 | */ | |
6aa20a22 | 2030 | |
1da177e4 LT |
2031 | static void velocity_shutdown(struct velocity_info *vptr) |
2032 | { | |
2033 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
2034 | mac_disable_int(regs); | |
2035 | writel(CR0_STOP, ®s->CR0Set); | |
2036 | writew(0xFFFF, ®s->TDCSRClr); | |
2037 | writeb(0xFF, ®s->RDCSRClr); | |
2038 | safe_disable_mii_autopoll(regs); | |
2039 | mac_clear_isr(regs); | |
2040 | } | |
2041 | ||
2042 | /** | |
2043 | * velocity_close - close adapter callback | |
2044 | * @dev: network device | |
2045 | * | |
2046 | * Callback from the network layer when the velocity is being | |
2047 | * deactivated by the network layer | |
2048 | */ | |
2049 | ||
2050 | static int velocity_close(struct net_device *dev) | |
2051 | { | |
8ab6f3f7 | 2052 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
2053 | |
2054 | netif_stop_queue(dev); | |
2055 | velocity_shutdown(vptr); | |
2056 | ||
2057 | if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) | |
2058 | velocity_get_ip(vptr); | |
2059 | if (dev->irq != 0) | |
2060 | free_irq(dev->irq, dev); | |
6aa20a22 | 2061 | |
1da177e4 LT |
2062 | /* Power down the chip */ |
2063 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
6aa20a22 | 2064 | |
1da177e4 LT |
2065 | velocity_free_rings(vptr); |
2066 | ||
2067 | vptr->flags &= (~VELOCITY_FLAGS_OPENED); | |
2068 | return 0; | |
2069 | } | |
2070 | ||
2071 | /** | |
2072 | * velocity_xmit - transmit packet callback | |
2073 | * @skb: buffer to transmit | |
2074 | * @dev: network device | |
2075 | * | |
2076 | * Called by the networ layer to request a packet is queued to | |
2077 | * the velocity. Returns zero on success. | |
2078 | */ | |
6aa20a22 | 2079 | |
1da177e4 LT |
2080 | static int velocity_xmit(struct sk_buff *skb, struct net_device *dev) |
2081 | { | |
8ab6f3f7 | 2082 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
2083 | int qnum = 0; |
2084 | struct tx_desc *td_ptr; | |
2085 | struct velocity_td_info *tdinfo; | |
2086 | unsigned long flags; | |
59f8e169 | 2087 | int pktlen; |
580a6902 FR |
2088 | __le16 len; |
2089 | int index; | |
2090 | ||
2091 | ||
59f8e169 DJ |
2092 | if (skb_padto(skb, ETH_ZLEN)) |
2093 | goto out; | |
2094 | pktlen = max_t(unsigned int, skb->len, ETH_ZLEN); | |
580a6902 FR |
2095 | |
2096 | len = cpu_to_le16(pktlen); | |
1da177e4 | 2097 | |
364c6bad HX |
2098 | #ifdef VELOCITY_ZERO_COPY_SUPPORT |
2099 | if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) { | |
2100 | kfree_skb(skb); | |
2101 | return 0; | |
2102 | } | |
2103 | #endif | |
2104 | ||
1da177e4 LT |
2105 | spin_lock_irqsave(&vptr->lock, flags); |
2106 | ||
0fe9f15e FR |
2107 | index = vptr->tx.curr[qnum]; |
2108 | td_ptr = &(vptr->tx.rings[qnum][index]); | |
2109 | tdinfo = &(vptr->tx.infos[qnum][index]); | |
1da177e4 | 2110 | |
1da177e4 | 2111 | td_ptr->tdesc1.TCR = TCR0_TIC; |
4a51c0d0 | 2112 | td_ptr->td_buf[0].size &= ~TD_QUEUE; |
1da177e4 | 2113 | |
1da177e4 LT |
2114 | #ifdef VELOCITY_ZERO_COPY_SUPPORT |
2115 | if (skb_shinfo(skb)->nr_frags > 0) { | |
2116 | int nfrags = skb_shinfo(skb)->nr_frags; | |
2117 | tdinfo->skb = skb; | |
2118 | if (nfrags > 6) { | |
d626f62b | 2119 | skb_copy_from_linear_data(skb, tdinfo->buf, skb->len); |
1da177e4 | 2120 | tdinfo->skb_dma[0] = tdinfo->buf_dma; |
4a51c0d0 | 2121 | td_ptr->tdesc0.len = len; |
0fe9f15e FR |
2122 | td_ptr->tx.buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]); |
2123 | td_ptr->tx.buf[0].pa_high = 0; | |
2124 | td_ptr->tx.buf[0].size = len; /* queue is 0 anyway */ | |
1da177e4 | 2125 | tdinfo->nskb_dma = 1; |
1da177e4 LT |
2126 | } else { |
2127 | int i = 0; | |
2128 | tdinfo->nskb_dma = 0; | |
4a51c0d0 AV |
2129 | tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data, |
2130 | skb_headlen(skb), PCI_DMA_TODEVICE); | |
1da177e4 | 2131 | |
4a51c0d0 | 2132 | td_ptr->tdesc0.len = len; |
1da177e4 LT |
2133 | |
2134 | /* FIXME: support 48bit DMA later */ | |
0fe9f15e FR |
2135 | td_ptr->tx.buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma); |
2136 | td_ptr->tx.buf[i].pa_high = 0; | |
2137 | td_ptr->tx.buf[i].size = cpu_to_le16(skb_headlen(skb)); | |
1da177e4 LT |
2138 | |
2139 | for (i = 0; i < nfrags; i++) { | |
2140 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; | |
4a51c0d0 | 2141 | void *addr = (void *)page_address(frag->page) + frag->page_offset; |
1da177e4 LT |
2142 | |
2143 | tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE); | |
2144 | ||
0fe9f15e FR |
2145 | td_ptr->tx.buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]); |
2146 | td_ptr->tx.buf[i + 1].pa_high = 0; | |
2147 | td_ptr->tx.buf[i + 1].size = cpu_to_le16(frag->size); | |
1da177e4 LT |
2148 | } |
2149 | tdinfo->nskb_dma = i - 1; | |
1da177e4 LT |
2150 | } |
2151 | ||
2152 | } else | |
2153 | #endif | |
2154 | { | |
2155 | /* | |
2156 | * Map the linear network buffer into PCI space and | |
2157 | * add it to the transmit ring. | |
2158 | */ | |
2159 | tdinfo->skb = skb; | |
2160 | tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE); | |
4a51c0d0 | 2161 | td_ptr->tdesc0.len = len; |
1da177e4 LT |
2162 | td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]); |
2163 | td_ptr->td_buf[0].pa_high = 0; | |
4a51c0d0 | 2164 | td_ptr->td_buf[0].size = len; |
1da177e4 | 2165 | tdinfo->nskb_dma = 1; |
1da177e4 | 2166 | } |
4a51c0d0 | 2167 | td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16; |
1da177e4 | 2168 | |
501e4d24 | 2169 | if (vptr->vlgrp && vlan_tx_tag_present(skb)) { |
4a51c0d0 | 2170 | td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
1da177e4 LT |
2171 | td_ptr->tdesc1.TCR |= TCR0_VETAG; |
2172 | } | |
2173 | ||
2174 | /* | |
2175 | * Handle hardware checksum | |
2176 | */ | |
2177 | if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM) | |
84fa7933 | 2178 | && (skb->ip_summed == CHECKSUM_PARTIAL)) { |
eddc9ec5 | 2179 | const struct iphdr *ip = ip_hdr(skb); |
1da177e4 LT |
2180 | if (ip->protocol == IPPROTO_TCP) |
2181 | td_ptr->tdesc1.TCR |= TCR0_TCPCK; | |
2182 | else if (ip->protocol == IPPROTO_UDP) | |
2183 | td_ptr->tdesc1.TCR |= (TCR0_UDPCK); | |
2184 | td_ptr->tdesc1.TCR |= TCR0_IPCK; | |
2185 | } | |
2186 | { | |
2187 | ||
2188 | int prev = index - 1; | |
2189 | ||
2190 | if (prev < 0) | |
2191 | prev = vptr->options.numtx - 1; | |
4a51c0d0 | 2192 | td_ptr->tdesc0.len |= OWNED_BY_NIC; |
0fe9f15e FR |
2193 | vptr->tx.used[qnum]++; |
2194 | vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx; | |
1da177e4 LT |
2195 | |
2196 | if (AVAIL_TD(vptr, qnum) < 1) | |
2197 | netif_stop_queue(dev); | |
2198 | ||
0fe9f15e | 2199 | td_ptr = &(vptr->tx.rings[qnum][prev]); |
4a51c0d0 | 2200 | td_ptr->td_buf[0].size |= TD_QUEUE; |
1da177e4 LT |
2201 | mac_tx_queue_wake(vptr->mac_regs, qnum); |
2202 | } | |
2203 | dev->trans_start = jiffies; | |
2204 | spin_unlock_irqrestore(&vptr->lock, flags); | |
580a6902 FR |
2205 | out: |
2206 | return NETDEV_TX_OK; | |
1da177e4 LT |
2207 | } |
2208 | ||
2209 | /** | |
2210 | * velocity_intr - interrupt callback | |
2211 | * @irq: interrupt number | |
2212 | * @dev_instance: interrupting device | |
1da177e4 LT |
2213 | * |
2214 | * Called whenever an interrupt is generated by the velocity | |
2215 | * adapter IRQ line. We may not be the source of the interrupt | |
2216 | * and need to identify initially if we are, and if not exit as | |
2217 | * efficiently as possible. | |
2218 | */ | |
6aa20a22 | 2219 | |
3ca17dfb | 2220 | static irqreturn_t velocity_intr(int irq, void *dev_instance) |
1da177e4 LT |
2221 | { |
2222 | struct net_device *dev = dev_instance; | |
8ab6f3f7 | 2223 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
2224 | u32 isr_status; |
2225 | int max_count = 0; | |
2226 | ||
2227 | ||
2228 | spin_lock(&vptr->lock); | |
2229 | isr_status = mac_read_isr(vptr->mac_regs); | |
2230 | ||
2231 | /* Not us ? */ | |
2232 | if (isr_status == 0) { | |
2233 | spin_unlock(&vptr->lock); | |
2234 | return IRQ_NONE; | |
2235 | } | |
2236 | ||
2237 | mac_disable_int(vptr->mac_regs); | |
2238 | ||
2239 | /* | |
2240 | * Keep processing the ISR until we have completed | |
2241 | * processing and the isr_status becomes zero | |
2242 | */ | |
6aa20a22 | 2243 | |
1da177e4 LT |
2244 | while (isr_status != 0) { |
2245 | mac_write_isr(vptr->mac_regs, isr_status); | |
2246 | if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI))) | |
2247 | velocity_error(vptr, isr_status); | |
2248 | if (isr_status & (ISR_PRXI | ISR_PPRXI)) | |
2249 | max_count += velocity_rx_srv(vptr, isr_status); | |
2250 | if (isr_status & (ISR_PTXI | ISR_PPTXI)) | |
2251 | max_count += velocity_tx_srv(vptr, isr_status); | |
2252 | isr_status = mac_read_isr(vptr->mac_regs); | |
2253 | if (max_count > vptr->options.int_works) | |
2254 | { | |
6aa20a22 | 2255 | printk(KERN_WARNING "%s: excessive work at interrupt.\n", |
1da177e4 LT |
2256 | dev->name); |
2257 | max_count = 0; | |
2258 | } | |
2259 | } | |
2260 | spin_unlock(&vptr->lock); | |
2261 | mac_enable_int(vptr->mac_regs); | |
2262 | return IRQ_HANDLED; | |
2263 | ||
2264 | } | |
2265 | ||
2266 | ||
2267 | /** | |
2268 | * velocity_set_multi - filter list change callback | |
2269 | * @dev: network device | |
2270 | * | |
2271 | * Called by the network layer when the filter lists need to change | |
2272 | * for a velocity adapter. Reload the CAMs with the new address | |
2273 | * filter ruleset. | |
2274 | */ | |
6aa20a22 | 2275 | |
1da177e4 LT |
2276 | static void velocity_set_multi(struct net_device *dev) |
2277 | { | |
8ab6f3f7 | 2278 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
2279 | struct mac_regs __iomem * regs = vptr->mac_regs; |
2280 | u8 rx_mode; | |
2281 | int i; | |
2282 | struct dev_mc_list *mclist; | |
2283 | ||
2284 | if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ | |
1da177e4 LT |
2285 | writel(0xffffffff, ®s->MARCAM[0]); |
2286 | writel(0xffffffff, ®s->MARCAM[4]); | |
2287 | rx_mode = (RCR_AM | RCR_AB | RCR_PROM); | |
2288 | } else if ((dev->mc_count > vptr->multicast_limit) | |
2289 | || (dev->flags & IFF_ALLMULTI)) { | |
2290 | writel(0xffffffff, ®s->MARCAM[0]); | |
2291 | writel(0xffffffff, ®s->MARCAM[4]); | |
2292 | rx_mode = (RCR_AM | RCR_AB); | |
2293 | } else { | |
2294 | int offset = MCAM_SIZE - vptr->multicast_limit; | |
01faccbf | 2295 | mac_get_cam_mask(regs, vptr->mCAMmask); |
1da177e4 LT |
2296 | |
2297 | for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) { | |
01faccbf | 2298 | mac_set_cam(regs, i + offset, mclist->dmi_addr); |
1da177e4 LT |
2299 | vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7); |
2300 | } | |
2301 | ||
01faccbf | 2302 | mac_set_cam_mask(regs, vptr->mCAMmask); |
5f5c4bdb | 2303 | rx_mode = RCR_AM | RCR_AB | RCR_AP; |
1da177e4 LT |
2304 | } |
2305 | if (dev->mtu > 1500) | |
2306 | rx_mode |= RCR_AL; | |
2307 | ||
2308 | BYTE_REG_BITS_ON(rx_mode, ®s->RCR); | |
2309 | ||
2310 | } | |
2311 | ||
2312 | /** | |
2313 | * velocity_get_status - statistics callback | |
2314 | * @dev: network device | |
2315 | * | |
2316 | * Callback from the network layer to allow driver statistics | |
2317 | * to be resynchronized with hardware collected state. In the | |
2318 | * case of the velocity we need to pull the MIB counters from | |
2319 | * the hardware into the counters before letting the network | |
2320 | * layer display them. | |
2321 | */ | |
6aa20a22 | 2322 | |
1da177e4 LT |
2323 | static struct net_device_stats *velocity_get_stats(struct net_device *dev) |
2324 | { | |
8ab6f3f7 | 2325 | struct velocity_info *vptr = netdev_priv(dev); |
6aa20a22 | 2326 | |
1da177e4 LT |
2327 | /* If the hardware is down, don't touch MII */ |
2328 | if(!netif_running(dev)) | |
553e2335 | 2329 | return &dev->stats; |
1da177e4 LT |
2330 | |
2331 | spin_lock_irq(&vptr->lock); | |
2332 | velocity_update_hw_mibs(vptr); | |
2333 | spin_unlock_irq(&vptr->lock); | |
2334 | ||
553e2335 ED |
2335 | dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts]; |
2336 | dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts]; | |
2337 | dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors]; | |
1da177e4 LT |
2338 | |
2339 | // unsigned long rx_dropped; /* no space in linux buffers */ | |
553e2335 | 2340 | dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions]; |
1da177e4 LT |
2341 | /* detailed rx_errors: */ |
2342 | // unsigned long rx_length_errors; | |
2343 | // unsigned long rx_over_errors; /* receiver ring buff overflow */ | |
553e2335 | 2344 | dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE]; |
1da177e4 LT |
2345 | // unsigned long rx_frame_errors; /* recv'd frame alignment error */ |
2346 | // unsigned long rx_fifo_errors; /* recv'r fifo overrun */ | |
2347 | // unsigned long rx_missed_errors; /* receiver missed packet */ | |
2348 | ||
2349 | /* detailed tx_errors */ | |
2350 | // unsigned long tx_fifo_errors; | |
2351 | ||
553e2335 | 2352 | return &dev->stats; |
1da177e4 LT |
2353 | } |
2354 | ||
2355 | ||
2356 | /** | |
2357 | * velocity_ioctl - ioctl entry point | |
2358 | * @dev: network device | |
2359 | * @rq: interface request ioctl | |
2360 | * @cmd: command code | |
2361 | * | |
2362 | * Called when the user issues an ioctl request to the network | |
2363 | * device in question. The velocity interface supports MII. | |
2364 | */ | |
6aa20a22 | 2365 | |
1da177e4 LT |
2366 | static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
2367 | { | |
8ab6f3f7 | 2368 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
2369 | int ret; |
2370 | ||
2371 | /* If we are asked for information and the device is power | |
2372 | saving then we need to bring the device back up to talk to it */ | |
6aa20a22 | 2373 | |
1da177e4 LT |
2374 | if (!netif_running(dev)) |
2375 | pci_set_power_state(vptr->pdev, PCI_D0); | |
6aa20a22 | 2376 | |
1da177e4 LT |
2377 | switch (cmd) { |
2378 | case SIOCGMIIPHY: /* Get address of MII PHY in use. */ | |
2379 | case SIOCGMIIREG: /* Read MII PHY register. */ | |
2380 | case SIOCSMIIREG: /* Write to MII PHY register. */ | |
2381 | ret = velocity_mii_ioctl(dev, rq, cmd); | |
2382 | break; | |
2383 | ||
2384 | default: | |
2385 | ret = -EOPNOTSUPP; | |
2386 | } | |
2387 | if (!netif_running(dev)) | |
2388 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
6aa20a22 JG |
2389 | |
2390 | ||
1da177e4 LT |
2391 | return ret; |
2392 | } | |
2393 | ||
2394 | /* | |
2395 | * Definition for our device driver. The PCI layer interface | |
2396 | * uses this to handle all our card discover and plugging | |
2397 | */ | |
6aa20a22 | 2398 | |
1da177e4 LT |
2399 | static struct pci_driver velocity_driver = { |
2400 | .name = VELOCITY_NAME, | |
2401 | .id_table = velocity_id_table, | |
2402 | .probe = velocity_found1, | |
2403 | .remove = __devexit_p(velocity_remove1), | |
2404 | #ifdef CONFIG_PM | |
2405 | .suspend = velocity_suspend, | |
2406 | .resume = velocity_resume, | |
2407 | #endif | |
2408 | }; | |
2409 | ||
2410 | /** | |
2411 | * velocity_init_module - load time function | |
2412 | * | |
2413 | * Called when the velocity module is loaded. The PCI driver | |
2414 | * is registered with the PCI layer, and in turn will call | |
2415 | * the probe functions for each velocity adapter installed | |
2416 | * in the system. | |
2417 | */ | |
6aa20a22 | 2418 | |
1da177e4 LT |
2419 | static int __init velocity_init_module(void) |
2420 | { | |
2421 | int ret; | |
2422 | ||
2423 | velocity_register_notifier(); | |
29917620 | 2424 | ret = pci_register_driver(&velocity_driver); |
1da177e4 LT |
2425 | if (ret < 0) |
2426 | velocity_unregister_notifier(); | |
2427 | return ret; | |
2428 | } | |
2429 | ||
2430 | /** | |
2431 | * velocity_cleanup - module unload | |
2432 | * | |
2433 | * When the velocity hardware is unloaded this function is called. | |
6aa20a22 | 2434 | * It will clean up the notifiers and the unregister the PCI |
1da177e4 LT |
2435 | * driver interface for this hardware. This in turn cleans up |
2436 | * all discovered interfaces before returning from the function | |
2437 | */ | |
6aa20a22 | 2438 | |
1da177e4 LT |
2439 | static void __exit velocity_cleanup_module(void) |
2440 | { | |
2441 | velocity_unregister_notifier(); | |
2442 | pci_unregister_driver(&velocity_driver); | |
2443 | } | |
2444 | ||
2445 | module_init(velocity_init_module); | |
2446 | module_exit(velocity_cleanup_module); | |
2447 | ||
2448 | ||
2449 | /* | |
2450 | * MII access , media link mode setting functions | |
2451 | */ | |
6aa20a22 JG |
2452 | |
2453 | ||
1da177e4 LT |
2454 | /** |
2455 | * mii_init - set up MII | |
2456 | * @vptr: velocity adapter | |
2457 | * @mii_status: links tatus | |
2458 | * | |
2459 | * Set up the PHY for the current link state. | |
2460 | */ | |
6aa20a22 | 2461 | |
1da177e4 LT |
2462 | static void mii_init(struct velocity_info *vptr, u32 mii_status) |
2463 | { | |
2464 | u16 BMCR; | |
2465 | ||
2466 | switch (PHYID_GET_PHY_ID(vptr->phy_id)) { | |
2467 | case PHYID_CICADA_CS8201: | |
2468 | /* | |
2469 | * Reset to hardware default | |
2470 | */ | |
2471 | MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs); | |
2472 | /* | |
2473 | * Turn on ECHODIS bit in NWay-forced full mode and turn it | |
6aa20a22 | 2474 | * off it in NWay-forced half mode for NWay-forced v.s. |
1da177e4 LT |
2475 | * legacy-forced issue. |
2476 | */ | |
2477 | if (vptr->mii_status & VELOCITY_DUPLEX_FULL) | |
2478 | MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs); | |
2479 | else | |
2480 | MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs); | |
2481 | /* | |
2482 | * Turn on Link/Activity LED enable bit for CIS8201 | |
2483 | */ | |
2484 | MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs); | |
2485 | break; | |
2486 | case PHYID_VT3216_32BIT: | |
2487 | case PHYID_VT3216_64BIT: | |
2488 | /* | |
2489 | * Reset to hardware default | |
2490 | */ | |
2491 | MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs); | |
2492 | /* | |
2493 | * Turn on ECHODIS bit in NWay-forced full mode and turn it | |
6aa20a22 | 2494 | * off it in NWay-forced half mode for NWay-forced v.s. |
1da177e4 LT |
2495 | * legacy-forced issue |
2496 | */ | |
2497 | if (vptr->mii_status & VELOCITY_DUPLEX_FULL) | |
2498 | MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs); | |
2499 | else | |
2500 | MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs); | |
2501 | break; | |
2502 | ||
2503 | case PHYID_MARVELL_1000: | |
2504 | case PHYID_MARVELL_1000S: | |
2505 | /* | |
6aa20a22 | 2506 | * Assert CRS on Transmit |
1da177e4 LT |
2507 | */ |
2508 | MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs); | |
2509 | /* | |
6aa20a22 | 2510 | * Reset to hardware default |
1da177e4 LT |
2511 | */ |
2512 | MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs); | |
2513 | break; | |
2514 | default: | |
2515 | ; | |
2516 | } | |
2517 | velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR); | |
2518 | if (BMCR & BMCR_ISO) { | |
2519 | BMCR &= ~BMCR_ISO; | |
2520 | velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR); | |
2521 | } | |
2522 | } | |
2523 | ||
2524 | /** | |
2525 | * safe_disable_mii_autopoll - autopoll off | |
2526 | * @regs: velocity registers | |
2527 | * | |
2528 | * Turn off the autopoll and wait for it to disable on the chip | |
2529 | */ | |
6aa20a22 | 2530 | |
1da177e4 LT |
2531 | static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs) |
2532 | { | |
2533 | u16 ww; | |
2534 | ||
2535 | /* turn off MAUTO */ | |
2536 | writeb(0, ®s->MIICR); | |
2537 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
2538 | udelay(1); | |
2539 | if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, ®s->MIISR)) | |
2540 | break; | |
2541 | } | |
2542 | } | |
2543 | ||
2544 | /** | |
2545 | * enable_mii_autopoll - turn on autopolling | |
2546 | * @regs: velocity registers | |
2547 | * | |
2548 | * Enable the MII link status autopoll feature on the Velocity | |
2549 | * hardware. Wait for it to enable. | |
2550 | */ | |
2551 | ||
2552 | static void enable_mii_autopoll(struct mac_regs __iomem * regs) | |
2553 | { | |
2554 | int ii; | |
2555 | ||
2556 | writeb(0, &(regs->MIICR)); | |
2557 | writeb(MIIADR_SWMPL, ®s->MIIADR); | |
2558 | ||
2559 | for (ii = 0; ii < W_MAX_TIMEOUT; ii++) { | |
2560 | udelay(1); | |
2561 | if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, ®s->MIISR)) | |
2562 | break; | |
2563 | } | |
2564 | ||
2565 | writeb(MIICR_MAUTO, ®s->MIICR); | |
2566 | ||
2567 | for (ii = 0; ii < W_MAX_TIMEOUT; ii++) { | |
2568 | udelay(1); | |
2569 | if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, ®s->MIISR)) | |
2570 | break; | |
2571 | } | |
2572 | ||
2573 | } | |
2574 | ||
2575 | /** | |
2576 | * velocity_mii_read - read MII data | |
2577 | * @regs: velocity registers | |
2578 | * @index: MII register index | |
2579 | * @data: buffer for received data | |
2580 | * | |
2581 | * Perform a single read of an MII 16bit register. Returns zero | |
2582 | * on success or -ETIMEDOUT if the PHY did not respond. | |
2583 | */ | |
6aa20a22 | 2584 | |
1da177e4 LT |
2585 | static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data) |
2586 | { | |
2587 | u16 ww; | |
2588 | ||
2589 | /* | |
2590 | * Disable MIICR_MAUTO, so that mii addr can be set normally | |
2591 | */ | |
2592 | safe_disable_mii_autopoll(regs); | |
2593 | ||
2594 | writeb(index, ®s->MIIADR); | |
2595 | ||
2596 | BYTE_REG_BITS_ON(MIICR_RCMD, ®s->MIICR); | |
2597 | ||
2598 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
2599 | if (!(readb(®s->MIICR) & MIICR_RCMD)) | |
2600 | break; | |
2601 | } | |
2602 | ||
2603 | *data = readw(®s->MIIDATA); | |
2604 | ||
2605 | enable_mii_autopoll(regs); | |
2606 | if (ww == W_MAX_TIMEOUT) | |
2607 | return -ETIMEDOUT; | |
2608 | return 0; | |
2609 | } | |
2610 | ||
2611 | /** | |
2612 | * velocity_mii_write - write MII data | |
2613 | * @regs: velocity registers | |
2614 | * @index: MII register index | |
2615 | * @data: 16bit data for the MII register | |
2616 | * | |
2617 | * Perform a single write to an MII 16bit register. Returns zero | |
2618 | * on success or -ETIMEDOUT if the PHY did not respond. | |
2619 | */ | |
6aa20a22 | 2620 | |
1da177e4 LT |
2621 | static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data) |
2622 | { | |
2623 | u16 ww; | |
2624 | ||
2625 | /* | |
2626 | * Disable MIICR_MAUTO, so that mii addr can be set normally | |
2627 | */ | |
2628 | safe_disable_mii_autopoll(regs); | |
2629 | ||
2630 | /* MII reg offset */ | |
2631 | writeb(mii_addr, ®s->MIIADR); | |
2632 | /* set MII data */ | |
2633 | writew(data, ®s->MIIDATA); | |
2634 | ||
2635 | /* turn on MIICR_WCMD */ | |
2636 | BYTE_REG_BITS_ON(MIICR_WCMD, ®s->MIICR); | |
2637 | ||
2638 | /* W_MAX_TIMEOUT is the timeout period */ | |
2639 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
2640 | udelay(5); | |
2641 | if (!(readb(®s->MIICR) & MIICR_WCMD)) | |
2642 | break; | |
2643 | } | |
2644 | enable_mii_autopoll(regs); | |
2645 | ||
2646 | if (ww == W_MAX_TIMEOUT) | |
2647 | return -ETIMEDOUT; | |
2648 | return 0; | |
2649 | } | |
2650 | ||
2651 | /** | |
2652 | * velocity_get_opt_media_mode - get media selection | |
2653 | * @vptr: velocity adapter | |
2654 | * | |
2655 | * Get the media mode stored in EEPROM or module options and load | |
2656 | * mii_status accordingly. The requested link state information | |
2657 | * is also returned. | |
2658 | */ | |
6aa20a22 | 2659 | |
1da177e4 LT |
2660 | static u32 velocity_get_opt_media_mode(struct velocity_info *vptr) |
2661 | { | |
2662 | u32 status = 0; | |
2663 | ||
2664 | switch (vptr->options.spd_dpx) { | |
2665 | case SPD_DPX_AUTO: | |
2666 | status = VELOCITY_AUTONEG_ENABLE; | |
2667 | break; | |
2668 | case SPD_DPX_100_FULL: | |
2669 | status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL; | |
2670 | break; | |
2671 | case SPD_DPX_10_FULL: | |
2672 | status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL; | |
2673 | break; | |
2674 | case SPD_DPX_100_HALF: | |
2675 | status = VELOCITY_SPEED_100; | |
2676 | break; | |
2677 | case SPD_DPX_10_HALF: | |
2678 | status = VELOCITY_SPEED_10; | |
2679 | break; | |
2680 | } | |
2681 | vptr->mii_status = status; | |
2682 | return status; | |
2683 | } | |
2684 | ||
2685 | /** | |
2686 | * mii_set_auto_on - autonegotiate on | |
2687 | * @vptr: velocity | |
2688 | * | |
2689 | * Enable autonegotation on this interface | |
2690 | */ | |
6aa20a22 | 2691 | |
1da177e4 LT |
2692 | static void mii_set_auto_on(struct velocity_info *vptr) |
2693 | { | |
2694 | if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs)) | |
2695 | MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs); | |
2696 | else | |
2697 | MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); | |
2698 | } | |
2699 | ||
2700 | ||
2701 | /* | |
2702 | static void mii_set_auto_off(struct velocity_info * vptr) | |
2703 | { | |
2704 | MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); | |
2705 | } | |
2706 | */ | |
2707 | ||
2708 | /** | |
2709 | * set_mii_flow_control - flow control setup | |
2710 | * @vptr: velocity interface | |
2711 | * | |
2712 | * Set up the flow control on this interface according to | |
2713 | * the supplied user/eeprom options. | |
2714 | */ | |
6aa20a22 | 2715 | |
1da177e4 LT |
2716 | static void set_mii_flow_control(struct velocity_info *vptr) |
2717 | { | |
2718 | /*Enable or Disable PAUSE in ANAR */ | |
2719 | switch (vptr->options.flow_cntl) { | |
2720 | case FLOW_CNTL_TX: | |
2721 | MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs); | |
2722 | MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs); | |
2723 | break; | |
2724 | ||
2725 | case FLOW_CNTL_RX: | |
2726 | MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs); | |
2727 | MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs); | |
2728 | break; | |
2729 | ||
2730 | case FLOW_CNTL_TX_RX: | |
2731 | MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs); | |
2732 | MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs); | |
2733 | break; | |
2734 | ||
2735 | case FLOW_CNTL_DISABLE: | |
2736 | MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs); | |
2737 | MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs); | |
2738 | break; | |
2739 | default: | |
2740 | break; | |
2741 | } | |
2742 | } | |
2743 | ||
2744 | /** | |
2745 | * velocity_set_media_mode - set media mode | |
2746 | * @mii_status: old MII link state | |
2747 | * | |
2748 | * Check the media link state and configure the flow control | |
2749 | * PHY and also velocity hardware setup accordingly. In particular | |
2750 | * we need to set up CD polling and frame bursting. | |
2751 | */ | |
6aa20a22 | 2752 | |
1da177e4 LT |
2753 | static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status) |
2754 | { | |
2755 | u32 curr_status; | |
2756 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
2757 | ||
2758 | vptr->mii_status = mii_check_media_mode(vptr->mac_regs); | |
2759 | curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL); | |
2760 | ||
2761 | /* Set mii link status */ | |
2762 | set_mii_flow_control(vptr); | |
2763 | ||
2764 | /* | |
2765 | Check if new status is consisent with current status | |
2766 | if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE) | |
2767 | || (mii_status==curr_status)) { | |
2768 | vptr->mii_status=mii_check_media_mode(vptr->mac_regs); | |
2769 | vptr->mii_status=check_connection_type(vptr->mac_regs); | |
2770 | VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n"); | |
2771 | return 0; | |
2772 | } | |
2773 | */ | |
2774 | ||
2775 | if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) { | |
2776 | MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs); | |
2777 | } | |
2778 | ||
2779 | /* | |
2780 | * If connection type is AUTO | |
2781 | */ | |
2782 | if (mii_status & VELOCITY_AUTONEG_ENABLE) { | |
2783 | VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n"); | |
2784 | /* clear force MAC mode bit */ | |
2785 | BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, ®s->CHIPGCR); | |
2786 | /* set duplex mode of MAC according to duplex mode of MII */ | |
2787 | MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs); | |
2788 | MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs); | |
2789 | MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); | |
2790 | ||
2791 | /* enable AUTO-NEGO mode */ | |
2792 | mii_set_auto_on(vptr); | |
2793 | } else { | |
2794 | u16 ANAR; | |
2795 | u8 CHIPGCR; | |
2796 | ||
2797 | /* | |
2798 | * 1. if it's 3119, disable frame bursting in halfduplex mode | |
2799 | * and enable it in fullduplex mode | |
2800 | * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR | |
2801 | * 3. only enable CD heart beat counter in 10HD mode | |
2802 | */ | |
2803 | ||
2804 | /* set force MAC mode bit */ | |
2805 | BYTE_REG_BITS_ON(CHIPGCR_FCMODE, ®s->CHIPGCR); | |
2806 | ||
2807 | CHIPGCR = readb(®s->CHIPGCR); | |
2808 | CHIPGCR &= ~CHIPGCR_FCGMII; | |
2809 | ||
2810 | if (mii_status & VELOCITY_DUPLEX_FULL) { | |
2811 | CHIPGCR |= CHIPGCR_FCFDX; | |
2812 | writeb(CHIPGCR, ®s->CHIPGCR); | |
2813 | VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n"); | |
2814 | if (vptr->rev_id < REV_ID_VT3216_A0) | |
2815 | BYTE_REG_BITS_OFF(TCR_TB2BDIS, ®s->TCR); | |
2816 | } else { | |
2817 | CHIPGCR &= ~CHIPGCR_FCFDX; | |
2818 | VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n"); | |
2819 | writeb(CHIPGCR, ®s->CHIPGCR); | |
2820 | if (vptr->rev_id < REV_ID_VT3216_A0) | |
2821 | BYTE_REG_BITS_ON(TCR_TB2BDIS, ®s->TCR); | |
2822 | } | |
2823 | ||
2824 | MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs); | |
2825 | ||
2826 | if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) { | |
2827 | BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); | |
2828 | } else { | |
2829 | BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); | |
2830 | } | |
2831 | /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */ | |
2832 | velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR); | |
2833 | ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)); | |
2834 | if (mii_status & VELOCITY_SPEED_100) { | |
2835 | if (mii_status & VELOCITY_DUPLEX_FULL) | |
2836 | ANAR |= ANAR_TXFD; | |
2837 | else | |
2838 | ANAR |= ANAR_TX; | |
2839 | } else { | |
2840 | if (mii_status & VELOCITY_DUPLEX_FULL) | |
2841 | ANAR |= ANAR_10FD; | |
2842 | else | |
2843 | ANAR |= ANAR_10; | |
2844 | } | |
2845 | velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR); | |
2846 | /* enable AUTO-NEGO mode */ | |
2847 | mii_set_auto_on(vptr); | |
2848 | /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */ | |
2849 | } | |
2850 | /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */ | |
2851 | /* vptr->mii_status=check_connection_type(vptr->mac_regs); */ | |
2852 | return VELOCITY_LINK_CHANGE; | |
2853 | } | |
2854 | ||
2855 | /** | |
2856 | * mii_check_media_mode - check media state | |
2857 | * @regs: velocity registers | |
2858 | * | |
2859 | * Check the current MII status and determine the link status | |
2860 | * accordingly | |
2861 | */ | |
6aa20a22 | 2862 | |
1da177e4 LT |
2863 | static u32 mii_check_media_mode(struct mac_regs __iomem * regs) |
2864 | { | |
2865 | u32 status = 0; | |
2866 | u16 ANAR; | |
2867 | ||
2868 | if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs)) | |
2869 | status |= VELOCITY_LINK_FAIL; | |
2870 | ||
2871 | if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs)) | |
2872 | status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL; | |
2873 | else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs)) | |
2874 | status |= (VELOCITY_SPEED_1000); | |
2875 | else { | |
2876 | velocity_mii_read(regs, MII_REG_ANAR, &ANAR); | |
2877 | if (ANAR & ANAR_TXFD) | |
2878 | status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL); | |
2879 | else if (ANAR & ANAR_TX) | |
2880 | status |= VELOCITY_SPEED_100; | |
2881 | else if (ANAR & ANAR_10FD) | |
2882 | status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL); | |
2883 | else | |
2884 | status |= (VELOCITY_SPEED_10); | |
2885 | } | |
2886 | ||
2887 | if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) { | |
2888 | velocity_mii_read(regs, MII_REG_ANAR, &ANAR); | |
2889 | if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) | |
2890 | == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) { | |
2891 | if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs)) | |
2892 | status |= VELOCITY_AUTONEG_ENABLE; | |
2893 | } | |
2894 | } | |
2895 | ||
2896 | return status; | |
2897 | } | |
2898 | ||
2899 | static u32 check_connection_type(struct mac_regs __iomem * regs) | |
2900 | { | |
2901 | u32 status = 0; | |
2902 | u8 PHYSR0; | |
2903 | u16 ANAR; | |
2904 | PHYSR0 = readb(®s->PHYSR0); | |
2905 | ||
2906 | /* | |
2907 | if (!(PHYSR0 & PHYSR0_LINKGD)) | |
2908 | status|=VELOCITY_LINK_FAIL; | |
2909 | */ | |
2910 | ||
2911 | if (PHYSR0 & PHYSR0_FDPX) | |
2912 | status |= VELOCITY_DUPLEX_FULL; | |
2913 | ||
2914 | if (PHYSR0 & PHYSR0_SPDG) | |
2915 | status |= VELOCITY_SPEED_1000; | |
59b693fb | 2916 | else if (PHYSR0 & PHYSR0_SPD10) |
1da177e4 LT |
2917 | status |= VELOCITY_SPEED_10; |
2918 | else | |
2919 | status |= VELOCITY_SPEED_100; | |
2920 | ||
2921 | if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) { | |
2922 | velocity_mii_read(regs, MII_REG_ANAR, &ANAR); | |
2923 | if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) | |
2924 | == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) { | |
2925 | if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs)) | |
2926 | status |= VELOCITY_AUTONEG_ENABLE; | |
2927 | } | |
2928 | } | |
2929 | ||
2930 | return status; | |
2931 | } | |
2932 | ||
2933 | /** | |
2934 | * enable_flow_control_ability - flow control | |
2935 | * @vptr: veloity to configure | |
2936 | * | |
2937 | * Set up flow control according to the flow control options | |
2938 | * determined by the eeprom/configuration. | |
2939 | */ | |
2940 | ||
2941 | static void enable_flow_control_ability(struct velocity_info *vptr) | |
2942 | { | |
2943 | ||
2944 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
2945 | ||
2946 | switch (vptr->options.flow_cntl) { | |
2947 | ||
2948 | case FLOW_CNTL_DEFAULT: | |
2949 | if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, ®s->PHYSR0)) | |
2950 | writel(CR0_FDXRFCEN, ®s->CR0Set); | |
2951 | else | |
2952 | writel(CR0_FDXRFCEN, ®s->CR0Clr); | |
2953 | ||
2954 | if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, ®s->PHYSR0)) | |
2955 | writel(CR0_FDXTFCEN, ®s->CR0Set); | |
2956 | else | |
2957 | writel(CR0_FDXTFCEN, ®s->CR0Clr); | |
2958 | break; | |
2959 | ||
2960 | case FLOW_CNTL_TX: | |
2961 | writel(CR0_FDXTFCEN, ®s->CR0Set); | |
2962 | writel(CR0_FDXRFCEN, ®s->CR0Clr); | |
2963 | break; | |
2964 | ||
2965 | case FLOW_CNTL_RX: | |
2966 | writel(CR0_FDXRFCEN, ®s->CR0Set); | |
2967 | writel(CR0_FDXTFCEN, ®s->CR0Clr); | |
2968 | break; | |
2969 | ||
2970 | case FLOW_CNTL_TX_RX: | |
2971 | writel(CR0_FDXTFCEN, ®s->CR0Set); | |
2972 | writel(CR0_FDXRFCEN, ®s->CR0Set); | |
2973 | break; | |
2974 | ||
2975 | case FLOW_CNTL_DISABLE: | |
2976 | writel(CR0_FDXRFCEN, ®s->CR0Clr); | |
2977 | writel(CR0_FDXTFCEN, ®s->CR0Clr); | |
2978 | break; | |
2979 | ||
2980 | default: | |
2981 | break; | |
2982 | } | |
2983 | ||
2984 | } | |
2985 | ||
2986 | ||
2987 | /** | |
2988 | * velocity_ethtool_up - pre hook for ethtool | |
2989 | * @dev: network device | |
2990 | * | |
2991 | * Called before an ethtool operation. We need to make sure the | |
2992 | * chip is out of D3 state before we poke at it. | |
2993 | */ | |
6aa20a22 | 2994 | |
1da177e4 LT |
2995 | static int velocity_ethtool_up(struct net_device *dev) |
2996 | { | |
8ab6f3f7 | 2997 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
2998 | if (!netif_running(dev)) |
2999 | pci_set_power_state(vptr->pdev, PCI_D0); | |
3000 | return 0; | |
6aa20a22 | 3001 | } |
1da177e4 LT |
3002 | |
3003 | /** | |
3004 | * velocity_ethtool_down - post hook for ethtool | |
3005 | * @dev: network device | |
3006 | * | |
3007 | * Called after an ethtool operation. Restore the chip back to D3 | |
3008 | * state if it isn't running. | |
3009 | */ | |
6aa20a22 | 3010 | |
1da177e4 LT |
3011 | static void velocity_ethtool_down(struct net_device *dev) |
3012 | { | |
8ab6f3f7 | 3013 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
3014 | if (!netif_running(dev)) |
3015 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
3016 | } | |
3017 | ||
3018 | static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
3019 | { | |
8ab6f3f7 | 3020 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
3021 | struct mac_regs __iomem * regs = vptr->mac_regs; |
3022 | u32 status; | |
3023 | status = check_connection_type(vptr->mac_regs); | |
3024 | ||
59b693fb JC |
3025 | cmd->supported = SUPPORTED_TP | |
3026 | SUPPORTED_Autoneg | | |
3027 | SUPPORTED_10baseT_Half | | |
3028 | SUPPORTED_10baseT_Full | | |
3029 | SUPPORTED_100baseT_Half | | |
3030 | SUPPORTED_100baseT_Full | | |
3031 | SUPPORTED_1000baseT_Half | | |
3032 | SUPPORTED_1000baseT_Full; | |
3033 | if (status & VELOCITY_SPEED_1000) | |
3034 | cmd->speed = SPEED_1000; | |
3035 | else if (status & VELOCITY_SPEED_100) | |
1da177e4 LT |
3036 | cmd->speed = SPEED_100; |
3037 | else | |
3038 | cmd->speed = SPEED_10; | |
3039 | cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE; | |
3040 | cmd->port = PORT_TP; | |
3041 | cmd->transceiver = XCVR_INTERNAL; | |
3042 | cmd->phy_address = readb(®s->MIIADR) & 0x1F; | |
3043 | ||
3044 | if (status & VELOCITY_DUPLEX_FULL) | |
3045 | cmd->duplex = DUPLEX_FULL; | |
3046 | else | |
3047 | cmd->duplex = DUPLEX_HALF; | |
6aa20a22 | 3048 | |
1da177e4 LT |
3049 | return 0; |
3050 | } | |
3051 | ||
3052 | static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
3053 | { | |
8ab6f3f7 | 3054 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
3055 | u32 curr_status; |
3056 | u32 new_status = 0; | |
3057 | int ret = 0; | |
6aa20a22 | 3058 | |
1da177e4 LT |
3059 | curr_status = check_connection_type(vptr->mac_regs); |
3060 | curr_status &= (~VELOCITY_LINK_FAIL); | |
3061 | ||
3062 | new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0); | |
3063 | new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0); | |
3064 | new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0); | |
3065 | new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0); | |
3066 | ||
3067 | if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE))) | |
3068 | ret = -EINVAL; | |
3069 | else | |
3070 | velocity_set_media_mode(vptr, new_status); | |
3071 | ||
3072 | return ret; | |
3073 | } | |
3074 | ||
3075 | static u32 velocity_get_link(struct net_device *dev) | |
3076 | { | |
8ab6f3f7 | 3077 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 | 3078 | struct mac_regs __iomem * regs = vptr->mac_regs; |
59b693fb | 3079 | return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, ®s->PHYSR0) ? 1 : 0; |
1da177e4 LT |
3080 | } |
3081 | ||
3082 | static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
3083 | { | |
8ab6f3f7 | 3084 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
3085 | strcpy(info->driver, VELOCITY_NAME); |
3086 | strcpy(info->version, VELOCITY_VERSION); | |
3087 | strcpy(info->bus_info, pci_name(vptr->pdev)); | |
3088 | } | |
3089 | ||
3090 | static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |
3091 | { | |
8ab6f3f7 | 3092 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
3093 | wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP; |
3094 | wol->wolopts |= WAKE_MAGIC; | |
3095 | /* | |
3096 | if (vptr->wol_opts & VELOCITY_WOL_PHY) | |
3097 | wol.wolopts|=WAKE_PHY; | |
3098 | */ | |
3099 | if (vptr->wol_opts & VELOCITY_WOL_UCAST) | |
3100 | wol->wolopts |= WAKE_UCAST; | |
3101 | if (vptr->wol_opts & VELOCITY_WOL_ARP) | |
3102 | wol->wolopts |= WAKE_ARP; | |
3103 | memcpy(&wol->sopass, vptr->wol_passwd, 6); | |
3104 | } | |
3105 | ||
3106 | static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |
3107 | { | |
8ab6f3f7 | 3108 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
3109 | |
3110 | if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP))) | |
3111 | return -EFAULT; | |
3112 | vptr->wol_opts = VELOCITY_WOL_MAGIC; | |
3113 | ||
3114 | /* | |
3115 | if (wol.wolopts & WAKE_PHY) { | |
3116 | vptr->wol_opts|=VELOCITY_WOL_PHY; | |
3117 | vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED; | |
3118 | } | |
3119 | */ | |
3120 | ||
3121 | if (wol->wolopts & WAKE_MAGIC) { | |
3122 | vptr->wol_opts |= VELOCITY_WOL_MAGIC; | |
3123 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
3124 | } | |
3125 | if (wol->wolopts & WAKE_UCAST) { | |
3126 | vptr->wol_opts |= VELOCITY_WOL_UCAST; | |
3127 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
3128 | } | |
3129 | if (wol->wolopts & WAKE_ARP) { | |
3130 | vptr->wol_opts |= VELOCITY_WOL_ARP; | |
3131 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
3132 | } | |
3133 | memcpy(vptr->wol_passwd, wol->sopass, 6); | |
3134 | return 0; | |
3135 | } | |
3136 | ||
3137 | static u32 velocity_get_msglevel(struct net_device *dev) | |
3138 | { | |
3139 | return msglevel; | |
3140 | } | |
3141 | ||
3142 | static void velocity_set_msglevel(struct net_device *dev, u32 value) | |
3143 | { | |
3144 | msglevel = value; | |
3145 | } | |
3146 | ||
7282d491 | 3147 | static const struct ethtool_ops velocity_ethtool_ops = { |
1da177e4 LT |
3148 | .get_settings = velocity_get_settings, |
3149 | .set_settings = velocity_set_settings, | |
3150 | .get_drvinfo = velocity_get_drvinfo, | |
3151 | .get_wol = velocity_ethtool_get_wol, | |
3152 | .set_wol = velocity_ethtool_set_wol, | |
3153 | .get_msglevel = velocity_get_msglevel, | |
3154 | .set_msglevel = velocity_set_msglevel, | |
3155 | .get_link = velocity_get_link, | |
3156 | .begin = velocity_ethtool_up, | |
3157 | .complete = velocity_ethtool_down | |
3158 | }; | |
3159 | ||
3160 | /** | |
3161 | * velocity_mii_ioctl - MII ioctl handler | |
3162 | * @dev: network device | |
3163 | * @ifr: the ifreq block for the ioctl | |
3164 | * @cmd: the command | |
3165 | * | |
3166 | * Process MII requests made via ioctl from the network layer. These | |
3167 | * are used by tools like kudzu to interrogate the link state of the | |
3168 | * hardware | |
3169 | */ | |
6aa20a22 | 3170 | |
1da177e4 LT |
3171 | static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) |
3172 | { | |
8ab6f3f7 | 3173 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 LT |
3174 | struct mac_regs __iomem * regs = vptr->mac_regs; |
3175 | unsigned long flags; | |
3176 | struct mii_ioctl_data *miidata = if_mii(ifr); | |
3177 | int err; | |
6aa20a22 | 3178 | |
1da177e4 LT |
3179 | switch (cmd) { |
3180 | case SIOCGMIIPHY: | |
3181 | miidata->phy_id = readb(®s->MIIADR) & 0x1f; | |
3182 | break; | |
3183 | case SIOCGMIIREG: | |
3184 | if (!capable(CAP_NET_ADMIN)) | |
3185 | return -EPERM; | |
3186 | if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0) | |
3187 | return -ETIMEDOUT; | |
3188 | break; | |
3189 | case SIOCSMIIREG: | |
3190 | if (!capable(CAP_NET_ADMIN)) | |
3191 | return -EPERM; | |
3192 | spin_lock_irqsave(&vptr->lock, flags); | |
3193 | err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in); | |
3194 | spin_unlock_irqrestore(&vptr->lock, flags); | |
3195 | check_connection_type(vptr->mac_regs); | |
3196 | if(err) | |
3197 | return err; | |
3198 | break; | |
3199 | default: | |
3200 | return -EOPNOTSUPP; | |
3201 | } | |
3202 | return 0; | |
3203 | } | |
3204 | ||
3205 | #ifdef CONFIG_PM | |
3206 | ||
3207 | /** | |
3208 | * velocity_save_context - save registers | |
6aa20a22 | 3209 | * @vptr: velocity |
1da177e4 LT |
3210 | * @context: buffer for stored context |
3211 | * | |
3212 | * Retrieve the current configuration from the velocity hardware | |
3213 | * and stash it in the context structure, for use by the context | |
3214 | * restore functions. This allows us to save things we need across | |
3215 | * power down states | |
3216 | */ | |
6aa20a22 | 3217 | |
1da177e4 LT |
3218 | static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context) |
3219 | { | |
3220 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
3221 | u16 i; | |
3222 | u8 __iomem *ptr = (u8 __iomem *)regs; | |
3223 | ||
3224 | for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4) | |
3225 | *((u32 *) (context->mac_reg + i)) = readl(ptr + i); | |
3226 | ||
3227 | for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4) | |
3228 | *((u32 *) (context->mac_reg + i)) = readl(ptr + i); | |
3229 | ||
3230 | for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) | |
3231 | *((u32 *) (context->mac_reg + i)) = readl(ptr + i); | |
3232 | ||
3233 | } | |
3234 | ||
3235 | /** | |
3236 | * velocity_restore_context - restore registers | |
6aa20a22 | 3237 | * @vptr: velocity |
1da177e4 LT |
3238 | * @context: buffer for stored context |
3239 | * | |
6aa20a22 | 3240 | * Reload the register configuration from the velocity context |
1da177e4 LT |
3241 | * created by velocity_save_context. |
3242 | */ | |
6aa20a22 | 3243 | |
1da177e4 LT |
3244 | static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context) |
3245 | { | |
3246 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
3247 | int i; | |
3248 | u8 __iomem *ptr = (u8 __iomem *)regs; | |
3249 | ||
3250 | for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) { | |
3251 | writel(*((u32 *) (context->mac_reg + i)), ptr + i); | |
3252 | } | |
3253 | ||
3254 | /* Just skip cr0 */ | |
3255 | for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) { | |
3256 | /* Clear */ | |
3257 | writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4); | |
3258 | /* Set */ | |
3259 | writeb(*((u8 *) (context->mac_reg + i)), ptr + i); | |
3260 | } | |
3261 | ||
3262 | for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) { | |
3263 | writel(*((u32 *) (context->mac_reg + i)), ptr + i); | |
3264 | } | |
3265 | ||
3266 | for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) { | |
3267 | writel(*((u32 *) (context->mac_reg + i)), ptr + i); | |
3268 | } | |
3269 | ||
3270 | for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) { | |
3271 | writeb(*((u8 *) (context->mac_reg + i)), ptr + i); | |
3272 | } | |
3273 | ||
3274 | } | |
3275 | ||
3276 | /** | |
3277 | * wol_calc_crc - WOL CRC | |
3278 | * @pattern: data pattern | |
3279 | * @mask_pattern: mask | |
3280 | * | |
3281 | * Compute the wake on lan crc hashes for the packet header | |
3282 | * we are interested in. | |
3283 | */ | |
3284 | ||
3285 | static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern) | |
3286 | { | |
3287 | u16 crc = 0xFFFF; | |
3288 | u8 mask; | |
3289 | int i, j; | |
3290 | ||
3291 | for (i = 0; i < size; i++) { | |
3292 | mask = mask_pattern[i]; | |
3293 | ||
3294 | /* Skip this loop if the mask equals to zero */ | |
3295 | if (mask == 0x00) | |
3296 | continue; | |
3297 | ||
3298 | for (j = 0; j < 8; j++) { | |
3299 | if ((mask & 0x01) == 0) { | |
3300 | mask >>= 1; | |
3301 | continue; | |
3302 | } | |
3303 | mask >>= 1; | |
3304 | crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1); | |
3305 | } | |
3306 | } | |
3307 | /* Finally, invert the result once to get the correct data */ | |
3308 | crc = ~crc; | |
906d66df | 3309 | return bitrev32(crc) >> 16; |
1da177e4 LT |
3310 | } |
3311 | ||
3312 | /** | |
3313 | * velocity_set_wol - set up for wake on lan | |
3314 | * @vptr: velocity to set WOL status on | |
3315 | * | |
3316 | * Set a card up for wake on lan either by unicast or by | |
3317 | * ARP packet. | |
3318 | * | |
3319 | * FIXME: check static buffer is safe here | |
3320 | */ | |
3321 | ||
3322 | static int velocity_set_wol(struct velocity_info *vptr) | |
3323 | { | |
3324 | struct mac_regs __iomem * regs = vptr->mac_regs; | |
3325 | static u8 buf[256]; | |
3326 | int i; | |
3327 | ||
3328 | static u32 mask_pattern[2][4] = { | |
3329 | {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */ | |
3330 | {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */ | |
3331 | }; | |
3332 | ||
3333 | writew(0xFFFF, ®s->WOLCRClr); | |
3334 | writeb(WOLCFG_SAB | WOLCFG_SAM, ®s->WOLCFGSet); | |
3335 | writew(WOLCR_MAGIC_EN, ®s->WOLCRSet); | |
3336 | ||
3337 | /* | |
3338 | if (vptr->wol_opts & VELOCITY_WOL_PHY) | |
3339 | writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), ®s->WOLCRSet); | |
3340 | */ | |
3341 | ||
3342 | if (vptr->wol_opts & VELOCITY_WOL_UCAST) { | |
3343 | writew(WOLCR_UNICAST_EN, ®s->WOLCRSet); | |
3344 | } | |
3345 | ||
3346 | if (vptr->wol_opts & VELOCITY_WOL_ARP) { | |
3347 | struct arp_packet *arp = (struct arp_packet *) buf; | |
3348 | u16 crc; | |
3349 | memset(buf, 0, sizeof(struct arp_packet) + 7); | |
3350 | ||
3351 | for (i = 0; i < 4; i++) | |
3352 | writel(mask_pattern[0][i], ®s->ByteMask[0][i]); | |
3353 | ||
3354 | arp->type = htons(ETH_P_ARP); | |
3355 | arp->ar_op = htons(1); | |
3356 | ||
3357 | memcpy(arp->ar_tip, vptr->ip_addr, 4); | |
3358 | ||
3359 | crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf, | |
3360 | (u8 *) & mask_pattern[0][0]); | |
3361 | ||
3362 | writew(crc, ®s->PatternCRC[0]); | |
3363 | writew(WOLCR_ARP_EN, ®s->WOLCRSet); | |
3364 | } | |
3365 | ||
3366 | BYTE_REG_BITS_ON(PWCFG_WOLTYPE, ®s->PWCFGSet); | |
3367 | BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, ®s->PWCFGSet); | |
3368 | ||
3369 | writew(0x0FFF, ®s->WOLSRClr); | |
3370 | ||
3371 | if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) { | |
3372 | if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) | |
3373 | MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs); | |
3374 | ||
3375 | MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs); | |
3376 | } | |
3377 | ||
3378 | if (vptr->mii_status & VELOCITY_SPEED_1000) | |
3379 | MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs); | |
3380 | ||
3381 | BYTE_REG_BITS_ON(CHIPGCR_FCMODE, ®s->CHIPGCR); | |
3382 | ||
3383 | { | |
3384 | u8 GCR; | |
3385 | GCR = readb(®s->CHIPGCR); | |
3386 | GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX; | |
3387 | writeb(GCR, ®s->CHIPGCR); | |
3388 | } | |
3389 | ||
3390 | BYTE_REG_BITS_OFF(ISR_PWEI, ®s->ISR); | |
3391 | /* Turn on SWPTAG just before entering power mode */ | |
3392 | BYTE_REG_BITS_ON(STICKHW_SWPTAG, ®s->STICKHW); | |
3393 | /* Go to bed ..... */ | |
3394 | BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), ®s->STICKHW); | |
3395 | ||
3396 | return 0; | |
3397 | } | |
3398 | ||
3399 | static int velocity_suspend(struct pci_dev *pdev, pm_message_t state) | |
3400 | { | |
3401 | struct net_device *dev = pci_get_drvdata(pdev); | |
3402 | struct velocity_info *vptr = netdev_priv(dev); | |
3403 | unsigned long flags; | |
3404 | ||
3405 | if(!netif_running(vptr->dev)) | |
3406 | return 0; | |
3407 | ||
3408 | netif_device_detach(vptr->dev); | |
3409 | ||
3410 | spin_lock_irqsave(&vptr->lock, flags); | |
3411 | pci_save_state(pdev); | |
3412 | #ifdef ETHTOOL_GWOL | |
3413 | if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) { | |
3414 | velocity_get_ip(vptr); | |
3415 | velocity_save_context(vptr, &vptr->context); | |
3416 | velocity_shutdown(vptr); | |
3417 | velocity_set_wol(vptr); | |
4a51c0d0 | 3418 | pci_enable_wake(pdev, PCI_D3hot, 1); |
1da177e4 LT |
3419 | pci_set_power_state(pdev, PCI_D3hot); |
3420 | } else { | |
3421 | velocity_save_context(vptr, &vptr->context); | |
3422 | velocity_shutdown(vptr); | |
3423 | pci_disable_device(pdev); | |
3424 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
3425 | } | |
3426 | #else | |
3427 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
3428 | #endif | |
3429 | spin_unlock_irqrestore(&vptr->lock, flags); | |
3430 | return 0; | |
3431 | } | |
3432 | ||
3433 | static int velocity_resume(struct pci_dev *pdev) | |
3434 | { | |
3435 | struct net_device *dev = pci_get_drvdata(pdev); | |
3436 | struct velocity_info *vptr = netdev_priv(dev); | |
3437 | unsigned long flags; | |
3438 | int i; | |
3439 | ||
3440 | if(!netif_running(vptr->dev)) | |
3441 | return 0; | |
3442 | ||
3443 | pci_set_power_state(pdev, PCI_D0); | |
3444 | pci_enable_wake(pdev, 0, 0); | |
3445 | pci_restore_state(pdev); | |
3446 | ||
3447 | mac_wol_reset(vptr->mac_regs); | |
3448 | ||
3449 | spin_lock_irqsave(&vptr->lock, flags); | |
3450 | velocity_restore_context(vptr, &vptr->context); | |
3451 | velocity_init_registers(vptr, VELOCITY_INIT_WOL); | |
3452 | mac_disable_int(vptr->mac_regs); | |
3453 | ||
3454 | velocity_tx_srv(vptr, 0); | |
3455 | ||
0fe9f15e FR |
3456 | for (i = 0; i < vptr->tx.numq; i++) { |
3457 | if (vptr->tx.used[i]) { | |
1da177e4 LT |
3458 | mac_tx_queue_wake(vptr->mac_regs, i); |
3459 | } | |
3460 | } | |
3461 | ||
3462 | mac_enable_int(vptr->mac_regs); | |
3463 | spin_unlock_irqrestore(&vptr->lock, flags); | |
3464 | netif_device_attach(vptr->dev); | |
3465 | ||
3466 | return 0; | |
3467 | } | |
3468 | ||
ce9f7fe3 RD |
3469 | #ifdef CONFIG_INET |
3470 | ||
1da177e4 LT |
3471 | static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr) |
3472 | { | |
3473 | struct in_ifaddr *ifa = (struct in_ifaddr *) ptr; | |
a337499f DL |
3474 | struct net_device *dev = ifa->ifa_dev->dev; |
3475 | struct velocity_info *vptr; | |
3476 | unsigned long flags; | |
1da177e4 | 3477 | |
c346dca1 | 3478 | if (dev_net(dev) != &init_net) |
6133fb1a DL |
3479 | return NOTIFY_DONE; |
3480 | ||
a337499f DL |
3481 | spin_lock_irqsave(&velocity_dev_list_lock, flags); |
3482 | list_for_each_entry(vptr, &velocity_dev_list, list) { | |
3483 | if (vptr->dev == dev) { | |
3484 | velocity_get_ip(vptr); | |
3485 | break; | |
1da177e4 | 3486 | } |
1da177e4 | 3487 | } |
a337499f DL |
3488 | spin_unlock_irqrestore(&velocity_dev_list_lock, flags); |
3489 | ||
1da177e4 LT |
3490 | return NOTIFY_DONE; |
3491 | } | |
ce9f7fe3 RD |
3492 | |
3493 | #endif | |
1da177e4 | 3494 | #endif |