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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
20 | ||
21 | #include "core.h" | |
22 | #include "mac.h" | |
23 | #include "htc.h" | |
24 | #include "hif.h" | |
25 | #include "wmi.h" | |
26 | #include "bmi.h" | |
27 | #include "debug.h" | |
28 | #include "htt.h" | |
43d2a30f | 29 | #include "testmode.h" |
5e3dd157 KV |
30 | |
31 | unsigned int ath10k_debug_mask; | |
32 | static bool uart_print; | |
33 | static unsigned int ath10k_p2p; | |
34 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); | |
35 | module_param(uart_print, bool, 0644); | |
36 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
37 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); | |
38 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
39 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
40 | ||
41 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
42 | { |
43 | .id = QCA988X_HW_2_0_VERSION, | |
44 | .name = "qca988x hw2.0", | |
45 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
46 | .fw = { | |
47 | .dir = QCA988X_HW_2_0_FW_DIR, | |
48 | .fw = QCA988X_HW_2_0_FW_FILE, | |
49 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
50 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
51 | }, | |
52 | }, | |
53 | }; | |
54 | ||
55 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
56 | { | |
7aa7a72a | 57 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 58 | |
9042e17d | 59 | complete(&ar->target_suspend); |
5e3dd157 KV |
60 | } |
61 | ||
5e3dd157 KV |
62 | static int ath10k_init_configure_target(struct ath10k *ar) |
63 | { | |
64 | u32 param_host; | |
65 | int ret; | |
66 | ||
67 | /* tell target which HTC version it is used*/ | |
68 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
69 | HTC_PROTOCOL_VERSION); | |
70 | if (ret) { | |
7aa7a72a | 71 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
72 | return ret; |
73 | } | |
74 | ||
75 | /* set the firmware mode to STA/IBSS/AP */ | |
76 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
77 | if (ret) { | |
7aa7a72a | 78 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
79 | return ret; |
80 | } | |
81 | ||
82 | /* TODO following parameters need to be re-visited. */ | |
83 | /* num_device */ | |
84 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
85 | /* Firmware mode */ | |
86 | /* FIXME: Why FW_MODE_AP ??.*/ | |
87 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
88 | /* mac_addr_method */ | |
89 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
90 | /* firmware_bridge */ | |
91 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
92 | /* fwsubmode */ | |
93 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
94 | ||
95 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
96 | if (ret) { | |
7aa7a72a | 97 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
98 | return ret; |
99 | } | |
100 | ||
101 | /* We do all byte-swapping on the host */ | |
102 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
103 | if (ret) { | |
7aa7a72a | 104 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
105 | return ret; |
106 | } | |
107 | ||
108 | /* FW descriptor/Data swap flags */ | |
109 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
110 | ||
111 | if (ret) { | |
7aa7a72a | 112 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
113 | return ret; |
114 | } | |
115 | ||
116 | return 0; | |
117 | } | |
118 | ||
119 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
120 | const char *dir, | |
121 | const char *file) | |
122 | { | |
123 | char filename[100]; | |
124 | const struct firmware *fw; | |
125 | int ret; | |
126 | ||
127 | if (file == NULL) | |
128 | return ERR_PTR(-ENOENT); | |
129 | ||
130 | if (dir == NULL) | |
131 | dir = "."; | |
132 | ||
133 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
134 | ret = request_firmware(&fw, filename, ar->dev); | |
135 | if (ret) | |
136 | return ERR_PTR(ret); | |
137 | ||
138 | return fw; | |
139 | } | |
140 | ||
958df3a0 | 141 | static int ath10k_push_board_ext_data(struct ath10k *ar) |
5e3dd157 KV |
142 | { |
143 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
144 | u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ; | |
145 | u32 board_ext_data_addr; | |
146 | int ret; | |
147 | ||
148 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
149 | if (ret) { | |
7aa7a72a MK |
150 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
151 | ret); | |
5e3dd157 KV |
152 | return ret; |
153 | } | |
154 | ||
7aa7a72a | 155 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 156 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
157 | board_ext_data_addr); |
158 | ||
159 | if (board_ext_data_addr == 0) | |
160 | return 0; | |
161 | ||
958df3a0 | 162 | if (ar->board_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 163 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
958df3a0 | 164 | ar->board_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
165 | return -EINVAL; |
166 | } | |
167 | ||
168 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
958df3a0 | 169 | ar->board_data + board_data_size, |
5e3dd157 KV |
170 | board_ext_data_size); |
171 | if (ret) { | |
7aa7a72a | 172 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
173 | return ret; |
174 | } | |
175 | ||
176 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
177 | (board_ext_data_size << 16) | 1); | |
178 | if (ret) { | |
7aa7a72a MK |
179 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
180 | ret); | |
5e3dd157 KV |
181 | return ret; |
182 | } | |
183 | ||
184 | return 0; | |
185 | } | |
186 | ||
187 | static int ath10k_download_board_data(struct ath10k *ar) | |
188 | { | |
189 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
190 | u32 address; | |
5e3dd157 KV |
191 | int ret; |
192 | ||
958df3a0 | 193 | ret = ath10k_push_board_ext_data(ar); |
5e3dd157 | 194 | if (ret) { |
7aa7a72a | 195 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
196 | goto exit; |
197 | } | |
198 | ||
199 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
200 | if (ret) { | |
7aa7a72a | 201 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
202 | goto exit; |
203 | } | |
204 | ||
958df3a0 KV |
205 | ret = ath10k_bmi_write_memory(ar, address, ar->board_data, |
206 | min_t(u32, board_data_size, | |
207 | ar->board_len)); | |
5e3dd157 | 208 | if (ret) { |
7aa7a72a | 209 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
210 | goto exit; |
211 | } | |
212 | ||
213 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
214 | if (ret) { | |
7aa7a72a | 215 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
216 | goto exit; |
217 | } | |
218 | ||
219 | exit: | |
5e3dd157 KV |
220 | return ret; |
221 | } | |
222 | ||
223 | static int ath10k_download_and_run_otp(struct ath10k *ar) | |
224 | { | |
d6d4a58d | 225 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
226 | int ret; |
227 | ||
228 | /* OTP is optional */ | |
229 | ||
7f06ea1e | 230 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 231 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 232 | ar->otp_data, ar->otp_len); |
5e3dd157 | 233 | return 0; |
7f06ea1e KV |
234 | } |
235 | ||
7aa7a72a | 236 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 237 | address, ar->otp_len); |
5e3dd157 | 238 | |
958df3a0 | 239 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 240 | if (ret) { |
7aa7a72a | 241 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 242 | return ret; |
5e3dd157 KV |
243 | } |
244 | ||
d6d4a58d | 245 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 246 | if (ret) { |
7aa7a72a | 247 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 248 | return ret; |
5e3dd157 KV |
249 | } |
250 | ||
7aa7a72a | 251 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e KV |
252 | |
253 | if (result != 0) { | |
7aa7a72a | 254 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
255 | return -EINVAL; |
256 | } | |
257 | ||
258 | return 0; | |
5e3dd157 KV |
259 | } |
260 | ||
43d2a30f | 261 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 262 | { |
43d2a30f KV |
263 | u32 address, data_len; |
264 | const char *mode_name; | |
265 | const void *data; | |
5e3dd157 KV |
266 | int ret; |
267 | ||
5e3dd157 KV |
268 | address = ar->hw_params.patch_load_addr; |
269 | ||
43d2a30f KV |
270 | switch (mode) { |
271 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
272 | data = ar->firmware_data; | |
273 | data_len = ar->firmware_len; | |
274 | mode_name = "normal"; | |
275 | break; | |
276 | case ATH10K_FIRMWARE_MODE_UTF: | |
277 | data = ar->testmode.utf->data; | |
278 | data_len = ar->testmode.utf->size; | |
279 | mode_name = "utf"; | |
280 | break; | |
281 | default: | |
282 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
283 | return -EINVAL; | |
284 | } | |
285 | ||
286 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
287 | "boot uploading firmware image %p len %d mode %s\n", | |
288 | data, data_len, mode_name); | |
289 | ||
290 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 291 | if (ret) { |
43d2a30f KV |
292 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
293 | mode_name, ret); | |
294 | return ret; | |
5e3dd157 KV |
295 | } |
296 | ||
29385057 MK |
297 | return ret; |
298 | } | |
299 | ||
300 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
301 | { | |
36527916 KV |
302 | if (ar->board && !IS_ERR(ar->board)) |
303 | release_firmware(ar->board); | |
29385057 MK |
304 | |
305 | if (ar->otp && !IS_ERR(ar->otp)) | |
306 | release_firmware(ar->otp); | |
307 | ||
308 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
309 | release_firmware(ar->firmware); | |
310 | ||
36527916 | 311 | ar->board = NULL; |
958df3a0 KV |
312 | ar->board_data = NULL; |
313 | ar->board_len = 0; | |
314 | ||
29385057 | 315 | ar->otp = NULL; |
958df3a0 KV |
316 | ar->otp_data = NULL; |
317 | ar->otp_len = 0; | |
318 | ||
29385057 | 319 | ar->firmware = NULL; |
958df3a0 KV |
320 | ar->firmware_data = NULL; |
321 | ar->firmware_len = 0; | |
29385057 MK |
322 | } |
323 | ||
1a222435 | 324 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
325 | { |
326 | int ret = 0; | |
327 | ||
328 | if (ar->hw_params.fw.fw == NULL) { | |
7aa7a72a | 329 | ath10k_err(ar, "firmware file not defined\n"); |
29385057 MK |
330 | return -EINVAL; |
331 | } | |
332 | ||
333 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 334 | ath10k_err(ar, "board data file not defined"); |
29385057 MK |
335 | return -EINVAL; |
336 | } | |
337 | ||
36527916 KV |
338 | ar->board = ath10k_fetch_fw_file(ar, |
339 | ar->hw_params.fw.dir, | |
340 | ar->hw_params.fw.board); | |
341 | if (IS_ERR(ar->board)) { | |
342 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 343 | ath10k_err(ar, "could not fetch board data (%d)\n", ret); |
29385057 MK |
344 | goto err; |
345 | } | |
346 | ||
958df3a0 KV |
347 | ar->board_data = ar->board->data; |
348 | ar->board_len = ar->board->size; | |
349 | ||
29385057 MK |
350 | ar->firmware = ath10k_fetch_fw_file(ar, |
351 | ar->hw_params.fw.dir, | |
352 | ar->hw_params.fw.fw); | |
353 | if (IS_ERR(ar->firmware)) { | |
354 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 355 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
356 | goto err; |
357 | } | |
358 | ||
958df3a0 KV |
359 | ar->firmware_data = ar->firmware->data; |
360 | ar->firmware_len = ar->firmware->size; | |
361 | ||
29385057 MK |
362 | /* OTP may be undefined. If so, don't fetch it at all */ |
363 | if (ar->hw_params.fw.otp == NULL) | |
364 | return 0; | |
365 | ||
366 | ar->otp = ath10k_fetch_fw_file(ar, | |
367 | ar->hw_params.fw.dir, | |
368 | ar->hw_params.fw.otp); | |
369 | if (IS_ERR(ar->otp)) { | |
370 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 371 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
372 | goto err; |
373 | } | |
374 | ||
958df3a0 KV |
375 | ar->otp_data = ar->otp->data; |
376 | ar->otp_len = ar->otp->size; | |
377 | ||
29385057 MK |
378 | return 0; |
379 | ||
380 | err: | |
381 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
382 | return ret; |
383 | } | |
384 | ||
1a222435 KV |
385 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
386 | { | |
387 | size_t magic_len, len, ie_len; | |
388 | int ie_id, i, index, bit, ret; | |
389 | struct ath10k_fw_ie *hdr; | |
390 | const u8 *data; | |
391 | __le32 *timestamp; | |
392 | ||
393 | /* first fetch the firmware file (firmware-*.bin) */ | |
394 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
395 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 396 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 397 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
398 | return PTR_ERR(ar->firmware); |
399 | } | |
400 | ||
401 | data = ar->firmware->data; | |
402 | len = ar->firmware->size; | |
403 | ||
404 | /* magic also includes the null byte, check that as well */ | |
405 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
406 | ||
407 | if (len < magic_len) { | |
7aa7a72a | 408 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 409 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
410 | ret = -EINVAL; |
411 | goto err; | |
1a222435 KV |
412 | } |
413 | ||
414 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 415 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
416 | ret = -EINVAL; |
417 | goto err; | |
1a222435 KV |
418 | } |
419 | ||
420 | /* jump over the padding */ | |
421 | magic_len = ALIGN(magic_len, 4); | |
422 | ||
423 | len -= magic_len; | |
424 | data += magic_len; | |
425 | ||
426 | /* loop elements */ | |
427 | while (len > sizeof(struct ath10k_fw_ie)) { | |
428 | hdr = (struct ath10k_fw_ie *)data; | |
429 | ||
430 | ie_id = le32_to_cpu(hdr->id); | |
431 | ie_len = le32_to_cpu(hdr->len); | |
432 | ||
433 | len -= sizeof(*hdr); | |
434 | data += sizeof(*hdr); | |
435 | ||
436 | if (len < ie_len) { | |
7aa7a72a | 437 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 438 | ie_id, len, ie_len); |
9bab1cc0 MK |
439 | ret = -EINVAL; |
440 | goto err; | |
1a222435 KV |
441 | } |
442 | ||
443 | switch (ie_id) { | |
444 | case ATH10K_FW_IE_FW_VERSION: | |
445 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
446 | break; | |
447 | ||
448 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
449 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
450 | ||
7aa7a72a | 451 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
452 | "found fw version %s\n", |
453 | ar->hw->wiphy->fw_version); | |
454 | break; | |
455 | case ATH10K_FW_IE_TIMESTAMP: | |
456 | if (ie_len != sizeof(u32)) | |
457 | break; | |
458 | ||
459 | timestamp = (__le32 *)data; | |
460 | ||
7aa7a72a | 461 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
462 | le32_to_cpup(timestamp)); |
463 | break; | |
464 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 465 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
466 | "found firmware features ie (%zd B)\n", |
467 | ie_len); | |
468 | ||
469 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
470 | index = i / 8; | |
471 | bit = i % 8; | |
472 | ||
473 | if (index == ie_len) | |
474 | break; | |
475 | ||
f591a1a5 | 476 | if (data[index] & (1 << bit)) { |
7aa7a72a | 477 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
478 | "Enabling feature bit: %i\n", |
479 | i); | |
1a222435 | 480 | __set_bit(i, ar->fw_features); |
f591a1a5 | 481 | } |
1a222435 KV |
482 | } |
483 | ||
7aa7a72a | 484 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
485 | ar->fw_features, |
486 | sizeof(ar->fw_features)); | |
487 | break; | |
488 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 489 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
490 | "found fw image ie (%zd B)\n", |
491 | ie_len); | |
492 | ||
493 | ar->firmware_data = data; | |
494 | ar->firmware_len = ie_len; | |
495 | ||
496 | break; | |
497 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 498 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
499 | "found otp image ie (%zd B)\n", |
500 | ie_len); | |
501 | ||
502 | ar->otp_data = data; | |
503 | ar->otp_len = ie_len; | |
504 | ||
505 | break; | |
506 | default: | |
7aa7a72a | 507 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
508 | le32_to_cpu(hdr->id)); |
509 | break; | |
510 | } | |
511 | ||
512 | /* jump over the padding */ | |
513 | ie_len = ALIGN(ie_len, 4); | |
514 | ||
515 | len -= ie_len; | |
516 | data += ie_len; | |
e05634ee | 517 | } |
1a222435 KV |
518 | |
519 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 520 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 521 | ar->hw_params.fw.dir, name); |
1a222435 KV |
522 | ret = -ENOMEDIUM; |
523 | goto err; | |
524 | } | |
525 | ||
24c88f78 MK |
526 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
527 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
7aa7a72a | 528 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); |
24c88f78 MK |
529 | ret = -EINVAL; |
530 | goto err; | |
531 | } | |
532 | ||
1a222435 KV |
533 | /* now fetch the board file */ |
534 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 535 | ath10k_err(ar, "board data file not defined"); |
1a222435 KV |
536 | ret = -EINVAL; |
537 | goto err; | |
538 | } | |
539 | ||
540 | ar->board = ath10k_fetch_fw_file(ar, | |
541 | ar->hw_params.fw.dir, | |
542 | ar->hw_params.fw.board); | |
543 | if (IS_ERR(ar->board)) { | |
544 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 545 | ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n", |
53c02284 BG |
546 | ar->hw_params.fw.dir, ar->hw_params.fw.board, |
547 | ret); | |
1a222435 KV |
548 | goto err; |
549 | } | |
550 | ||
551 | ar->board_data = ar->board->data; | |
552 | ar->board_len = ar->board->size; | |
553 | ||
554 | return 0; | |
555 | ||
556 | err: | |
557 | ath10k_core_free_firmware_files(ar); | |
558 | return ret; | |
559 | } | |
560 | ||
561 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
562 | { | |
563 | int ret; | |
564 | ||
24c88f78 | 565 | ar->fw_api = 3; |
7aa7a72a | 566 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
567 | |
568 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
569 | if (ret == 0) | |
570 | goto success; | |
571 | ||
53c02284 | 572 | ar->fw_api = 2; |
7aa7a72a | 573 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 574 | |
1a222435 | 575 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
576 | if (ret == 0) |
577 | goto success; | |
578 | ||
579 | ar->fw_api = 1; | |
7aa7a72a | 580 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
581 | |
582 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
583 | if (ret) | |
584 | return ret; | |
585 | ||
53c02284 | 586 | success: |
7aa7a72a | 587 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
588 | |
589 | return 0; | |
590 | } | |
591 | ||
43d2a30f KV |
592 | static int ath10k_init_download_firmware(struct ath10k *ar, |
593 | enum ath10k_firmware_mode mode) | |
5e3dd157 KV |
594 | { |
595 | int ret; | |
596 | ||
597 | ret = ath10k_download_board_data(ar); | |
36a8f413 | 598 | if (ret) { |
7aa7a72a | 599 | ath10k_err(ar, "failed to download board data: %d\n", ret); |
5e3dd157 | 600 | return ret; |
36a8f413 | 601 | } |
5e3dd157 KV |
602 | |
603 | ret = ath10k_download_and_run_otp(ar); | |
36a8f413 | 604 | if (ret) { |
7aa7a72a | 605 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 606 | return ret; |
36a8f413 | 607 | } |
5e3dd157 | 608 | |
43d2a30f | 609 | ret = ath10k_download_fw(ar, mode); |
36a8f413 | 610 | if (ret) { |
7aa7a72a | 611 | ath10k_err(ar, "failed to download firmware: %d\n", ret); |
5e3dd157 | 612 | return ret; |
36a8f413 | 613 | } |
5e3dd157 KV |
614 | |
615 | return ret; | |
616 | } | |
617 | ||
618 | static int ath10k_init_uart(struct ath10k *ar) | |
619 | { | |
620 | int ret; | |
621 | ||
622 | /* | |
623 | * Explicitly setting UART prints to zero as target turns it on | |
624 | * based on scratch registers. | |
625 | */ | |
626 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
627 | if (ret) { | |
7aa7a72a | 628 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
629 | return ret; |
630 | } | |
631 | ||
c8c39afe | 632 | if (!uart_print) |
5e3dd157 | 633 | return 0; |
5e3dd157 KV |
634 | |
635 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); | |
636 | if (ret) { | |
7aa7a72a | 637 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
638 | return ret; |
639 | } | |
640 | ||
641 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
642 | if (ret) { | |
7aa7a72a | 643 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
644 | return ret; |
645 | } | |
646 | ||
03fc137b BM |
647 | /* Set the UART baud rate to 19200. */ |
648 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
649 | if (ret) { | |
7aa7a72a | 650 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
651 | return ret; |
652 | } | |
653 | ||
7aa7a72a | 654 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
655 | return 0; |
656 | } | |
657 | ||
658 | static int ath10k_init_hw_params(struct ath10k *ar) | |
659 | { | |
660 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
661 | int i; | |
662 | ||
663 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
664 | hw_params = &ath10k_hw_params_list[i]; | |
665 | ||
666 | if (hw_params->id == ar->target_version) | |
667 | break; | |
668 | } | |
669 | ||
670 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 671 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
672 | ar->target_version); |
673 | return -EINVAL; | |
674 | } | |
675 | ||
676 | ar->hw_params = *hw_params; | |
677 | ||
7aa7a72a | 678 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 679 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
680 | |
681 | return 0; | |
682 | } | |
683 | ||
affd3217 MK |
684 | static void ath10k_core_restart(struct work_struct *work) |
685 | { | |
686 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
687 | ||
688 | mutex_lock(&ar->conf_mutex); | |
689 | ||
690 | switch (ar->state) { | |
691 | case ATH10K_STATE_ON: | |
affd3217 | 692 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 693 | ath10k_hif_stop(ar); |
5c81c7fd | 694 | ath10k_scan_finish(ar); |
affd3217 MK |
695 | ieee80211_restart_hw(ar->hw); |
696 | break; | |
697 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
698 | /* this can happen if driver is being unloaded |
699 | * or if the crash happens during FW probing */ | |
7aa7a72a | 700 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
701 | break; |
702 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
703 | /* hw restart might be requested from multiple places */ |
704 | break; | |
affd3217 MK |
705 | case ATH10K_STATE_RESTARTED: |
706 | ar->state = ATH10K_STATE_WEDGED; | |
707 | /* fall through */ | |
708 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 709 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 710 | break; |
43d2a30f KV |
711 | case ATH10K_STATE_UTF: |
712 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
713 | break; | |
affd3217 MK |
714 | } |
715 | ||
716 | mutex_unlock(&ar->conf_mutex); | |
717 | } | |
718 | ||
43d2a30f | 719 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 720 | { |
5e3dd157 KV |
721 | int status; |
722 | ||
60631c5c KV |
723 | lockdep_assert_held(&ar->conf_mutex); |
724 | ||
64d151d4 MK |
725 | ath10k_bmi_start(ar); |
726 | ||
5e3dd157 KV |
727 | if (ath10k_init_configure_target(ar)) { |
728 | status = -EINVAL; | |
729 | goto err; | |
730 | } | |
731 | ||
43d2a30f | 732 | status = ath10k_init_download_firmware(ar, mode); |
5e3dd157 KV |
733 | if (status) |
734 | goto err; | |
735 | ||
736 | status = ath10k_init_uart(ar); | |
737 | if (status) | |
738 | goto err; | |
739 | ||
cd003fad MK |
740 | ar->htc.htc_ops.target_send_suspend_complete = |
741 | ath10k_send_suspend_complete; | |
5e3dd157 | 742 | |
cd003fad MK |
743 | status = ath10k_htc_init(ar); |
744 | if (status) { | |
7aa7a72a | 745 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
746 | goto err; |
747 | } | |
748 | ||
749 | status = ath10k_bmi_done(ar); | |
750 | if (status) | |
cd003fad | 751 | goto err; |
5e3dd157 KV |
752 | |
753 | status = ath10k_wmi_attach(ar); | |
754 | if (status) { | |
7aa7a72a | 755 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 756 | goto err; |
5e3dd157 KV |
757 | } |
758 | ||
95bf21f9 MK |
759 | status = ath10k_htt_init(ar); |
760 | if (status) { | |
7aa7a72a | 761 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
762 | goto err_wmi_detach; |
763 | } | |
764 | ||
765 | status = ath10k_htt_tx_alloc(&ar->htt); | |
766 | if (status) { | |
7aa7a72a | 767 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
768 | goto err_wmi_detach; |
769 | } | |
770 | ||
771 | status = ath10k_htt_rx_alloc(&ar->htt); | |
772 | if (status) { | |
7aa7a72a | 773 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
774 | goto err_htt_tx_detach; |
775 | } | |
776 | ||
67e3c63f MK |
777 | status = ath10k_hif_start(ar); |
778 | if (status) { | |
7aa7a72a | 779 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 780 | goto err_htt_rx_detach; |
67e3c63f MK |
781 | } |
782 | ||
783 | status = ath10k_htc_wait_target(&ar->htc); | |
784 | if (status) { | |
7aa7a72a | 785 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
786 | goto err_hif_stop; |
787 | } | |
5e3dd157 | 788 | |
43d2a30f KV |
789 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
790 | status = ath10k_htt_connect(&ar->htt); | |
791 | if (status) { | |
792 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
793 | goto err_hif_stop; | |
794 | } | |
5e3dd157 KV |
795 | } |
796 | ||
95bf21f9 MK |
797 | status = ath10k_wmi_connect(ar); |
798 | if (status) { | |
7aa7a72a | 799 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
800 | goto err_hif_stop; |
801 | } | |
802 | ||
803 | status = ath10k_htc_start(&ar->htc); | |
804 | if (status) { | |
7aa7a72a | 805 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
806 | goto err_hif_stop; |
807 | } | |
808 | ||
43d2a30f KV |
809 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
810 | status = ath10k_wmi_wait_for_service_ready(ar); | |
811 | if (status <= 0) { | |
812 | ath10k_warn(ar, "wmi service ready event not received"); | |
813 | status = -ETIMEDOUT; | |
814 | goto err_hif_stop; | |
815 | } | |
95bf21f9 | 816 | } |
5e3dd157 | 817 | |
7aa7a72a | 818 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 819 | ar->hw->wiphy->fw_version); |
5e3dd157 | 820 | |
5e3dd157 KV |
821 | status = ath10k_wmi_cmd_init(ar); |
822 | if (status) { | |
7aa7a72a MK |
823 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
824 | status); | |
b7967dc7 | 825 | goto err_hif_stop; |
5e3dd157 KV |
826 | } |
827 | ||
828 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
829 | if (status <= 0) { | |
7aa7a72a | 830 | ath10k_err(ar, "wmi unified ready event not received\n"); |
5e3dd157 | 831 | status = -ETIMEDOUT; |
b7967dc7 | 832 | goto err_hif_stop; |
5e3dd157 KV |
833 | } |
834 | ||
43d2a30f KV |
835 | /* we don't care about HTT in UTF mode */ |
836 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
837 | status = ath10k_htt_setup(&ar->htt); | |
838 | if (status) { | |
839 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
840 | goto err_hif_stop; | |
841 | } | |
95bf21f9 | 842 | } |
5e3dd157 | 843 | |
db66ea04 KV |
844 | status = ath10k_debug_start(ar); |
845 | if (status) | |
b7967dc7 | 846 | goto err_hif_stop; |
db66ea04 | 847 | |
dfa413de BM |
848 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) |
849 | ar->free_vdev_map = (1 << TARGET_10X_NUM_VDEVS) - 1; | |
850 | else | |
851 | ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1; | |
852 | ||
0579119f | 853 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 854 | |
dd30a36e MK |
855 | return 0; |
856 | ||
67e3c63f MK |
857 | err_hif_stop: |
858 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
859 | err_htt_rx_detach: |
860 | ath10k_htt_rx_free(&ar->htt); | |
861 | err_htt_tx_detach: | |
862 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
863 | err_wmi_detach: |
864 | ath10k_wmi_detach(ar); | |
865 | err: | |
866 | return status; | |
867 | } | |
818bdd16 | 868 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 869 | |
00f5482b MP |
870 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
871 | { | |
872 | int ret; | |
873 | ||
874 | reinit_completion(&ar->target_suspend); | |
875 | ||
876 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
877 | if (ret) { | |
7aa7a72a | 878 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
879 | return ret; |
880 | } | |
881 | ||
882 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
883 | ||
884 | if (ret == 0) { | |
7aa7a72a | 885 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
886 | return -ETIMEDOUT; |
887 | } | |
888 | ||
889 | return 0; | |
890 | } | |
891 | ||
dd30a36e MK |
892 | void ath10k_core_stop(struct ath10k *ar) |
893 | { | |
60631c5c KV |
894 | lockdep_assert_held(&ar->conf_mutex); |
895 | ||
00f5482b | 896 | /* try to suspend target */ |
43d2a30f KV |
897 | if (ar->state != ATH10K_STATE_RESTARTING && |
898 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
899 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
900 | ||
db66ea04 | 901 | ath10k_debug_stop(ar); |
95bf21f9 MK |
902 | ath10k_hif_stop(ar); |
903 | ath10k_htt_tx_free(&ar->htt); | |
904 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
905 | ath10k_wmi_detach(ar); |
906 | } | |
818bdd16 MK |
907 | EXPORT_SYMBOL(ath10k_core_stop); |
908 | ||
909 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
910 | * order to know what hw capabilities should be advertised to mac80211 it is | |
911 | * necessary to load the firmware (and tear it down immediately since start | |
912 | * hook will try to init it again) before registering */ | |
913 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
914 | { | |
29385057 MK |
915 | struct bmi_target_info target_info; |
916 | int ret = 0; | |
818bdd16 MK |
917 | |
918 | ret = ath10k_hif_power_up(ar); | |
919 | if (ret) { | |
7aa7a72a | 920 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
921 | return ret; |
922 | } | |
923 | ||
29385057 MK |
924 | memset(&target_info, 0, sizeof(target_info)); |
925 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
926 | if (ret) { | |
7aa7a72a | 927 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
29385057 MK |
928 | ath10k_hif_power_down(ar); |
929 | return ret; | |
930 | } | |
931 | ||
932 | ar->target_version = target_info.version; | |
933 | ar->hw->wiphy->hw_version = target_info.version; | |
934 | ||
935 | ret = ath10k_init_hw_params(ar); | |
936 | if (ret) { | |
7aa7a72a | 937 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
29385057 MK |
938 | ath10k_hif_power_down(ar); |
939 | return ret; | |
940 | } | |
941 | ||
942 | ret = ath10k_core_fetch_firmware_files(ar); | |
943 | if (ret) { | |
7aa7a72a | 944 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
29385057 MK |
945 | ath10k_hif_power_down(ar); |
946 | return ret; | |
947 | } | |
948 | ||
60631c5c KV |
949 | mutex_lock(&ar->conf_mutex); |
950 | ||
43d2a30f | 951 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 952 | if (ret) { |
7aa7a72a | 953 | ath10k_err(ar, "could not init core (%d)\n", ret); |
29385057 | 954 | ath10k_core_free_firmware_files(ar); |
818bdd16 | 955 | ath10k_hif_power_down(ar); |
60631c5c | 956 | mutex_unlock(&ar->conf_mutex); |
818bdd16 MK |
957 | return ret; |
958 | } | |
959 | ||
8079de0d | 960 | ath10k_print_driver_info(ar); |
818bdd16 | 961 | ath10k_core_stop(ar); |
60631c5c KV |
962 | |
963 | mutex_unlock(&ar->conf_mutex); | |
964 | ||
818bdd16 MK |
965 | ath10k_hif_power_down(ar); |
966 | return 0; | |
967 | } | |
dd30a36e | 968 | |
e01ae68c KV |
969 | static int ath10k_core_check_chip_id(struct ath10k *ar) |
970 | { | |
971 | u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV); | |
972 | ||
7aa7a72a | 973 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n", |
effea968 KV |
974 | ar->chip_id, hw_revision); |
975 | ||
e01ae68c KV |
976 | /* Check that we are not using hw1.0 (some of them have same pci id |
977 | * as hw2.0) before doing anything else as ath10k crashes horribly | |
978 | * due to missing hw1.0 workarounds. */ | |
979 | switch (hw_revision) { | |
980 | case QCA988X_HW_1_0_CHIP_ID_REV: | |
7aa7a72a | 981 | ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n"); |
e01ae68c KV |
982 | return -EOPNOTSUPP; |
983 | ||
984 | case QCA988X_HW_2_0_CHIP_ID_REV: | |
985 | /* known hardware revision, continue normally */ | |
986 | return 0; | |
987 | ||
988 | default: | |
7aa7a72a | 989 | ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n", |
e01ae68c KV |
990 | ar->chip_id); |
991 | return 0; | |
992 | } | |
993 | ||
994 | return 0; | |
995 | } | |
996 | ||
6782cb69 | 997 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 998 | { |
6782cb69 | 999 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1000 | int status; |
1001 | ||
818bdd16 MK |
1002 | status = ath10k_core_probe_fw(ar); |
1003 | if (status) { | |
7aa7a72a | 1004 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1005 | goto err; |
818bdd16 | 1006 | } |
dd30a36e | 1007 | |
5e3dd157 | 1008 | status = ath10k_mac_register(ar); |
818bdd16 | 1009 | if (status) { |
7aa7a72a | 1010 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1011 | goto err_release_fw; |
818bdd16 | 1012 | } |
5e3dd157 | 1013 | |
e13cf7a3 | 1014 | status = ath10k_debug_register(ar); |
5e3dd157 | 1015 | if (status) { |
7aa7a72a | 1016 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1017 | goto err_unregister_mac; |
1018 | } | |
1019 | ||
855aed12 SW |
1020 | status = ath10k_spectral_create(ar); |
1021 | if (status) { | |
7aa7a72a | 1022 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1023 | goto err_debug_destroy; |
1024 | } | |
1025 | ||
6782cb69 MK |
1026 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1027 | return; | |
5e3dd157 | 1028 | |
855aed12 SW |
1029 | err_debug_destroy: |
1030 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1031 | err_unregister_mac: |
1032 | ath10k_mac_unregister(ar); | |
29385057 MK |
1033 | err_release_fw: |
1034 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1035 | err: |
a491a920 MK |
1036 | /* TODO: It's probably a good idea to release device from the driver |
1037 | * but calling device_release_driver() here will cause a deadlock. | |
1038 | */ | |
6782cb69 MK |
1039 | return; |
1040 | } | |
1041 | ||
1042 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1043 | { | |
1044 | int status; | |
1045 | ||
1046 | ar->chip_id = chip_id; | |
1047 | ||
1048 | status = ath10k_core_check_chip_id(ar); | |
1049 | if (status) { | |
7aa7a72a | 1050 | ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id); |
6782cb69 MK |
1051 | return status; |
1052 | } | |
1053 | ||
1054 | queue_work(ar->workqueue, &ar->register_work); | |
1055 | ||
1056 | return 0; | |
5e3dd157 KV |
1057 | } |
1058 | EXPORT_SYMBOL(ath10k_core_register); | |
1059 | ||
1060 | void ath10k_core_unregister(struct ath10k *ar) | |
1061 | { | |
6782cb69 MK |
1062 | cancel_work_sync(&ar->register_work); |
1063 | ||
1064 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1065 | return; | |
1066 | ||
804eef14 SW |
1067 | /* Stop spectral before unregistering from mac80211 to remove the |
1068 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1069 | * would be already be free'd recursively, leading to a double free. | |
1070 | */ | |
1071 | ath10k_spectral_destroy(ar); | |
1072 | ||
5e3dd157 KV |
1073 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1074 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1075 | * unhappy about callback failures. */ | |
1076 | ath10k_mac_unregister(ar); | |
db66ea04 | 1077 | |
43d2a30f KV |
1078 | ath10k_testmode_destroy(ar); |
1079 | ||
29385057 | 1080 | ath10k_core_free_firmware_files(ar); |
6f1f56ea | 1081 | |
e13cf7a3 | 1082 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1083 | } |
1084 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1085 | ||
e7b54194 | 1086 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
0d0a6939 MK |
1087 | const struct ath10k_hif_ops *hif_ops) |
1088 | { | |
1089 | struct ath10k *ar; | |
e13cf7a3 | 1090 | int ret; |
0d0a6939 | 1091 | |
e7b54194 | 1092 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1093 | if (!ar) |
1094 | return NULL; | |
1095 | ||
1096 | ar->ath_common.priv = ar; | |
1097 | ar->ath_common.hw = ar->hw; | |
1098 | ||
1099 | ar->p2p = !!ath10k_p2p; | |
1100 | ar->dev = dev; | |
1101 | ||
0d0a6939 MK |
1102 | ar->hif.ops = hif_ops; |
1103 | ||
1104 | init_completion(&ar->scan.started); | |
1105 | init_completion(&ar->scan.completed); | |
1106 | init_completion(&ar->scan.on_channel); | |
1107 | init_completion(&ar->target_suspend); | |
1108 | ||
1109 | init_completion(&ar->install_key_done); | |
1110 | init_completion(&ar->vdev_setup_done); | |
1111 | ||
5c81c7fd | 1112 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1113 | |
1114 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1115 | if (!ar->workqueue) | |
e13cf7a3 | 1116 | goto err_free_mac; |
0d0a6939 MK |
1117 | |
1118 | mutex_init(&ar->conf_mutex); | |
1119 | spin_lock_init(&ar->data_lock); | |
1120 | ||
1121 | INIT_LIST_HEAD(&ar->peers); | |
1122 | init_waitqueue_head(&ar->peer_mapping_wq); | |
1123 | ||
1124 | init_completion(&ar->offchan_tx_completed); | |
1125 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1126 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1127 | ||
1128 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1129 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1130 | ||
6782cb69 | 1131 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1132 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1133 | ||
e13cf7a3 MK |
1134 | ret = ath10k_debug_create(ar); |
1135 | if (ret) | |
1136 | goto err_free_wq; | |
1137 | ||
0d0a6939 MK |
1138 | return ar; |
1139 | ||
e13cf7a3 MK |
1140 | err_free_wq: |
1141 | destroy_workqueue(ar->workqueue); | |
1142 | ||
1143 | err_free_mac: | |
0d0a6939 | 1144 | ath10k_mac_destroy(ar); |
e13cf7a3 | 1145 | |
0d0a6939 MK |
1146 | return NULL; |
1147 | } | |
1148 | EXPORT_SYMBOL(ath10k_core_create); | |
1149 | ||
1150 | void ath10k_core_destroy(struct ath10k *ar) | |
1151 | { | |
1152 | flush_workqueue(ar->workqueue); | |
1153 | destroy_workqueue(ar->workqueue); | |
1154 | ||
e13cf7a3 | 1155 | ath10k_debug_destroy(ar); |
0d0a6939 MK |
1156 | ath10k_mac_destroy(ar); |
1157 | } | |
1158 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1159 | ||
5e3dd157 KV |
1160 | MODULE_AUTHOR("Qualcomm Atheros"); |
1161 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1162 | MODULE_LICENSE("Dual BSD/GPL"); |