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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
20 | ||
21 | #include "core.h" | |
22 | #include "mac.h" | |
23 | #include "htc.h" | |
24 | #include "hif.h" | |
25 | #include "wmi.h" | |
26 | #include "bmi.h" | |
27 | #include "debug.h" | |
28 | #include "htt.h" | |
29 | ||
30 | unsigned int ath10k_debug_mask; | |
31 | static bool uart_print; | |
32 | static unsigned int ath10k_p2p; | |
33 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); | |
34 | module_param(uart_print, bool, 0644); | |
35 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
36 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); | |
37 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
38 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
39 | ||
40 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
41 | { |
42 | .id = QCA988X_HW_2_0_VERSION, | |
43 | .name = "qca988x hw2.0", | |
44 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
45 | .fw = { | |
46 | .dir = QCA988X_HW_2_0_FW_DIR, | |
47 | .fw = QCA988X_HW_2_0_FW_FILE, | |
48 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
49 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
50 | }, | |
51 | }, | |
52 | }; | |
53 | ||
54 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
55 | { | |
7aa7a72a | 56 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 57 | |
9042e17d | 58 | complete(&ar->target_suspend); |
5e3dd157 KV |
59 | } |
60 | ||
5e3dd157 KV |
61 | static int ath10k_init_configure_target(struct ath10k *ar) |
62 | { | |
63 | u32 param_host; | |
64 | int ret; | |
65 | ||
66 | /* tell target which HTC version it is used*/ | |
67 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
68 | HTC_PROTOCOL_VERSION); | |
69 | if (ret) { | |
7aa7a72a | 70 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
71 | return ret; |
72 | } | |
73 | ||
74 | /* set the firmware mode to STA/IBSS/AP */ | |
75 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
76 | if (ret) { | |
7aa7a72a | 77 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
78 | return ret; |
79 | } | |
80 | ||
81 | /* TODO following parameters need to be re-visited. */ | |
82 | /* num_device */ | |
83 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
84 | /* Firmware mode */ | |
85 | /* FIXME: Why FW_MODE_AP ??.*/ | |
86 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
87 | /* mac_addr_method */ | |
88 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
89 | /* firmware_bridge */ | |
90 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
91 | /* fwsubmode */ | |
92 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
93 | ||
94 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
95 | if (ret) { | |
7aa7a72a | 96 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
97 | return ret; |
98 | } | |
99 | ||
100 | /* We do all byte-swapping on the host */ | |
101 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
102 | if (ret) { | |
7aa7a72a | 103 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
104 | return ret; |
105 | } | |
106 | ||
107 | /* FW descriptor/Data swap flags */ | |
108 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
109 | ||
110 | if (ret) { | |
7aa7a72a | 111 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
112 | return ret; |
113 | } | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
118 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
119 | const char *dir, | |
120 | const char *file) | |
121 | { | |
122 | char filename[100]; | |
123 | const struct firmware *fw; | |
124 | int ret; | |
125 | ||
126 | if (file == NULL) | |
127 | return ERR_PTR(-ENOENT); | |
128 | ||
129 | if (dir == NULL) | |
130 | dir = "."; | |
131 | ||
132 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
133 | ret = request_firmware(&fw, filename, ar->dev); | |
134 | if (ret) | |
135 | return ERR_PTR(ret); | |
136 | ||
137 | return fw; | |
138 | } | |
139 | ||
958df3a0 | 140 | static int ath10k_push_board_ext_data(struct ath10k *ar) |
5e3dd157 KV |
141 | { |
142 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
143 | u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ; | |
144 | u32 board_ext_data_addr; | |
145 | int ret; | |
146 | ||
147 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
148 | if (ret) { | |
7aa7a72a MK |
149 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
150 | ret); | |
5e3dd157 KV |
151 | return ret; |
152 | } | |
153 | ||
7aa7a72a | 154 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 155 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
156 | board_ext_data_addr); |
157 | ||
158 | if (board_ext_data_addr == 0) | |
159 | return 0; | |
160 | ||
958df3a0 | 161 | if (ar->board_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 162 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
958df3a0 | 163 | ar->board_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
164 | return -EINVAL; |
165 | } | |
166 | ||
167 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
958df3a0 | 168 | ar->board_data + board_data_size, |
5e3dd157 KV |
169 | board_ext_data_size); |
170 | if (ret) { | |
7aa7a72a | 171 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
172 | return ret; |
173 | } | |
174 | ||
175 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
176 | (board_ext_data_size << 16) | 1); | |
177 | if (ret) { | |
7aa7a72a MK |
178 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
179 | ret); | |
5e3dd157 KV |
180 | return ret; |
181 | } | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
186 | static int ath10k_download_board_data(struct ath10k *ar) | |
187 | { | |
188 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
189 | u32 address; | |
5e3dd157 KV |
190 | int ret; |
191 | ||
958df3a0 | 192 | ret = ath10k_push_board_ext_data(ar); |
5e3dd157 | 193 | if (ret) { |
7aa7a72a | 194 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
195 | goto exit; |
196 | } | |
197 | ||
198 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
199 | if (ret) { | |
7aa7a72a | 200 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
201 | goto exit; |
202 | } | |
203 | ||
958df3a0 KV |
204 | ret = ath10k_bmi_write_memory(ar, address, ar->board_data, |
205 | min_t(u32, board_data_size, | |
206 | ar->board_len)); | |
5e3dd157 | 207 | if (ret) { |
7aa7a72a | 208 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
209 | goto exit; |
210 | } | |
211 | ||
212 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
213 | if (ret) { | |
7aa7a72a | 214 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
215 | goto exit; |
216 | } | |
217 | ||
218 | exit: | |
5e3dd157 KV |
219 | return ret; |
220 | } | |
221 | ||
222 | static int ath10k_download_and_run_otp(struct ath10k *ar) | |
223 | { | |
d6d4a58d | 224 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
225 | int ret; |
226 | ||
227 | /* OTP is optional */ | |
228 | ||
7f06ea1e | 229 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 230 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 231 | ar->otp_data, ar->otp_len); |
5e3dd157 | 232 | return 0; |
7f06ea1e KV |
233 | } |
234 | ||
7aa7a72a | 235 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 236 | address, ar->otp_len); |
5e3dd157 | 237 | |
958df3a0 | 238 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 239 | if (ret) { |
7aa7a72a | 240 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 241 | return ret; |
5e3dd157 KV |
242 | } |
243 | ||
d6d4a58d | 244 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 245 | if (ret) { |
7aa7a72a | 246 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 247 | return ret; |
5e3dd157 KV |
248 | } |
249 | ||
7aa7a72a | 250 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e KV |
251 | |
252 | if (result != 0) { | |
7aa7a72a | 253 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
254 | return -EINVAL; |
255 | } | |
256 | ||
257 | return 0; | |
5e3dd157 KV |
258 | } |
259 | ||
260 | static int ath10k_download_fw(struct ath10k *ar) | |
261 | { | |
5e3dd157 KV |
262 | u32 address; |
263 | int ret; | |
264 | ||
5e3dd157 KV |
265 | address = ar->hw_params.patch_load_addr; |
266 | ||
958df3a0 KV |
267 | ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data, |
268 | ar->firmware_len); | |
5e3dd157 | 269 | if (ret) { |
7aa7a72a | 270 | ath10k_err(ar, "could not write fw (%d)\n", ret); |
5e3dd157 KV |
271 | goto exit; |
272 | } | |
273 | ||
274 | exit: | |
29385057 MK |
275 | return ret; |
276 | } | |
277 | ||
278 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
279 | { | |
36527916 KV |
280 | if (ar->board && !IS_ERR(ar->board)) |
281 | release_firmware(ar->board); | |
29385057 MK |
282 | |
283 | if (ar->otp && !IS_ERR(ar->otp)) | |
284 | release_firmware(ar->otp); | |
285 | ||
286 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
287 | release_firmware(ar->firmware); | |
288 | ||
36527916 | 289 | ar->board = NULL; |
958df3a0 KV |
290 | ar->board_data = NULL; |
291 | ar->board_len = 0; | |
292 | ||
29385057 | 293 | ar->otp = NULL; |
958df3a0 KV |
294 | ar->otp_data = NULL; |
295 | ar->otp_len = 0; | |
296 | ||
29385057 | 297 | ar->firmware = NULL; |
958df3a0 KV |
298 | ar->firmware_data = NULL; |
299 | ar->firmware_len = 0; | |
29385057 MK |
300 | } |
301 | ||
1a222435 | 302 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
303 | { |
304 | int ret = 0; | |
305 | ||
306 | if (ar->hw_params.fw.fw == NULL) { | |
7aa7a72a | 307 | ath10k_err(ar, "firmware file not defined\n"); |
29385057 MK |
308 | return -EINVAL; |
309 | } | |
310 | ||
311 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 312 | ath10k_err(ar, "board data file not defined"); |
29385057 MK |
313 | return -EINVAL; |
314 | } | |
315 | ||
36527916 KV |
316 | ar->board = ath10k_fetch_fw_file(ar, |
317 | ar->hw_params.fw.dir, | |
318 | ar->hw_params.fw.board); | |
319 | if (IS_ERR(ar->board)) { | |
320 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 321 | ath10k_err(ar, "could not fetch board data (%d)\n", ret); |
29385057 MK |
322 | goto err; |
323 | } | |
324 | ||
958df3a0 KV |
325 | ar->board_data = ar->board->data; |
326 | ar->board_len = ar->board->size; | |
327 | ||
29385057 MK |
328 | ar->firmware = ath10k_fetch_fw_file(ar, |
329 | ar->hw_params.fw.dir, | |
330 | ar->hw_params.fw.fw); | |
331 | if (IS_ERR(ar->firmware)) { | |
332 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 333 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
334 | goto err; |
335 | } | |
336 | ||
958df3a0 KV |
337 | ar->firmware_data = ar->firmware->data; |
338 | ar->firmware_len = ar->firmware->size; | |
339 | ||
29385057 MK |
340 | /* OTP may be undefined. If so, don't fetch it at all */ |
341 | if (ar->hw_params.fw.otp == NULL) | |
342 | return 0; | |
343 | ||
344 | ar->otp = ath10k_fetch_fw_file(ar, | |
345 | ar->hw_params.fw.dir, | |
346 | ar->hw_params.fw.otp); | |
347 | if (IS_ERR(ar->otp)) { | |
348 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 349 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
350 | goto err; |
351 | } | |
352 | ||
958df3a0 KV |
353 | ar->otp_data = ar->otp->data; |
354 | ar->otp_len = ar->otp->size; | |
355 | ||
29385057 MK |
356 | return 0; |
357 | ||
358 | err: | |
359 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
360 | return ret; |
361 | } | |
362 | ||
1a222435 KV |
363 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
364 | { | |
365 | size_t magic_len, len, ie_len; | |
366 | int ie_id, i, index, bit, ret; | |
367 | struct ath10k_fw_ie *hdr; | |
368 | const u8 *data; | |
369 | __le32 *timestamp; | |
370 | ||
371 | /* first fetch the firmware file (firmware-*.bin) */ | |
372 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
373 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 374 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 375 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
376 | return PTR_ERR(ar->firmware); |
377 | } | |
378 | ||
379 | data = ar->firmware->data; | |
380 | len = ar->firmware->size; | |
381 | ||
382 | /* magic also includes the null byte, check that as well */ | |
383 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
384 | ||
385 | if (len < magic_len) { | |
7aa7a72a | 386 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 387 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
388 | ret = -EINVAL; |
389 | goto err; | |
1a222435 KV |
390 | } |
391 | ||
392 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 393 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
394 | ret = -EINVAL; |
395 | goto err; | |
1a222435 KV |
396 | } |
397 | ||
398 | /* jump over the padding */ | |
399 | magic_len = ALIGN(magic_len, 4); | |
400 | ||
401 | len -= magic_len; | |
402 | data += magic_len; | |
403 | ||
404 | /* loop elements */ | |
405 | while (len > sizeof(struct ath10k_fw_ie)) { | |
406 | hdr = (struct ath10k_fw_ie *)data; | |
407 | ||
408 | ie_id = le32_to_cpu(hdr->id); | |
409 | ie_len = le32_to_cpu(hdr->len); | |
410 | ||
411 | len -= sizeof(*hdr); | |
412 | data += sizeof(*hdr); | |
413 | ||
414 | if (len < ie_len) { | |
7aa7a72a | 415 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 416 | ie_id, len, ie_len); |
9bab1cc0 MK |
417 | ret = -EINVAL; |
418 | goto err; | |
1a222435 KV |
419 | } |
420 | ||
421 | switch (ie_id) { | |
422 | case ATH10K_FW_IE_FW_VERSION: | |
423 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
424 | break; | |
425 | ||
426 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
427 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
428 | ||
7aa7a72a | 429 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
430 | "found fw version %s\n", |
431 | ar->hw->wiphy->fw_version); | |
432 | break; | |
433 | case ATH10K_FW_IE_TIMESTAMP: | |
434 | if (ie_len != sizeof(u32)) | |
435 | break; | |
436 | ||
437 | timestamp = (__le32 *)data; | |
438 | ||
7aa7a72a | 439 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
440 | le32_to_cpup(timestamp)); |
441 | break; | |
442 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 443 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
444 | "found firmware features ie (%zd B)\n", |
445 | ie_len); | |
446 | ||
447 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
448 | index = i / 8; | |
449 | bit = i % 8; | |
450 | ||
451 | if (index == ie_len) | |
452 | break; | |
453 | ||
f591a1a5 | 454 | if (data[index] & (1 << bit)) { |
7aa7a72a | 455 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
456 | "Enabling feature bit: %i\n", |
457 | i); | |
1a222435 | 458 | __set_bit(i, ar->fw_features); |
f591a1a5 | 459 | } |
1a222435 KV |
460 | } |
461 | ||
7aa7a72a | 462 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
463 | ar->fw_features, |
464 | sizeof(ar->fw_features)); | |
465 | break; | |
466 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 467 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
468 | "found fw image ie (%zd B)\n", |
469 | ie_len); | |
470 | ||
471 | ar->firmware_data = data; | |
472 | ar->firmware_len = ie_len; | |
473 | ||
474 | break; | |
475 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 476 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
477 | "found otp image ie (%zd B)\n", |
478 | ie_len); | |
479 | ||
480 | ar->otp_data = data; | |
481 | ar->otp_len = ie_len; | |
482 | ||
483 | break; | |
484 | default: | |
7aa7a72a | 485 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
486 | le32_to_cpu(hdr->id)); |
487 | break; | |
488 | } | |
489 | ||
490 | /* jump over the padding */ | |
491 | ie_len = ALIGN(ie_len, 4); | |
492 | ||
493 | len -= ie_len; | |
494 | data += ie_len; | |
e05634ee | 495 | } |
1a222435 KV |
496 | |
497 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 498 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 499 | ar->hw_params.fw.dir, name); |
1a222435 KV |
500 | ret = -ENOMEDIUM; |
501 | goto err; | |
502 | } | |
503 | ||
24c88f78 MK |
504 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
505 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
7aa7a72a | 506 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); |
24c88f78 MK |
507 | ret = -EINVAL; |
508 | goto err; | |
509 | } | |
510 | ||
1a222435 KV |
511 | /* now fetch the board file */ |
512 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 513 | ath10k_err(ar, "board data file not defined"); |
1a222435 KV |
514 | ret = -EINVAL; |
515 | goto err; | |
516 | } | |
517 | ||
518 | ar->board = ath10k_fetch_fw_file(ar, | |
519 | ar->hw_params.fw.dir, | |
520 | ar->hw_params.fw.board); | |
521 | if (IS_ERR(ar->board)) { | |
522 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 523 | ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n", |
53c02284 BG |
524 | ar->hw_params.fw.dir, ar->hw_params.fw.board, |
525 | ret); | |
1a222435 KV |
526 | goto err; |
527 | } | |
528 | ||
529 | ar->board_data = ar->board->data; | |
530 | ar->board_len = ar->board->size; | |
531 | ||
532 | return 0; | |
533 | ||
534 | err: | |
535 | ath10k_core_free_firmware_files(ar); | |
536 | return ret; | |
537 | } | |
538 | ||
539 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
540 | { | |
541 | int ret; | |
542 | ||
24c88f78 | 543 | ar->fw_api = 3; |
7aa7a72a | 544 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
545 | |
546 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
547 | if (ret == 0) | |
548 | goto success; | |
549 | ||
53c02284 | 550 | ar->fw_api = 2; |
7aa7a72a | 551 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 552 | |
1a222435 | 553 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
554 | if (ret == 0) |
555 | goto success; | |
556 | ||
557 | ar->fw_api = 1; | |
7aa7a72a | 558 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
559 | |
560 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
561 | if (ret) | |
562 | return ret; | |
563 | ||
53c02284 | 564 | success: |
7aa7a72a | 565 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
566 | |
567 | return 0; | |
568 | } | |
569 | ||
5e3dd157 KV |
570 | static int ath10k_init_download_firmware(struct ath10k *ar) |
571 | { | |
572 | int ret; | |
573 | ||
574 | ret = ath10k_download_board_data(ar); | |
36a8f413 | 575 | if (ret) { |
7aa7a72a | 576 | ath10k_err(ar, "failed to download board data: %d\n", ret); |
5e3dd157 | 577 | return ret; |
36a8f413 | 578 | } |
5e3dd157 KV |
579 | |
580 | ret = ath10k_download_and_run_otp(ar); | |
36a8f413 | 581 | if (ret) { |
7aa7a72a | 582 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 583 | return ret; |
36a8f413 | 584 | } |
5e3dd157 KV |
585 | |
586 | ret = ath10k_download_fw(ar); | |
36a8f413 | 587 | if (ret) { |
7aa7a72a | 588 | ath10k_err(ar, "failed to download firmware: %d\n", ret); |
5e3dd157 | 589 | return ret; |
36a8f413 | 590 | } |
5e3dd157 KV |
591 | |
592 | return ret; | |
593 | } | |
594 | ||
595 | static int ath10k_init_uart(struct ath10k *ar) | |
596 | { | |
597 | int ret; | |
598 | ||
599 | /* | |
600 | * Explicitly setting UART prints to zero as target turns it on | |
601 | * based on scratch registers. | |
602 | */ | |
603 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
604 | if (ret) { | |
7aa7a72a | 605 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
606 | return ret; |
607 | } | |
608 | ||
c8c39afe | 609 | if (!uart_print) |
5e3dd157 | 610 | return 0; |
5e3dd157 KV |
611 | |
612 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); | |
613 | if (ret) { | |
7aa7a72a | 614 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
615 | return ret; |
616 | } | |
617 | ||
618 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
619 | if (ret) { | |
7aa7a72a | 620 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
621 | return ret; |
622 | } | |
623 | ||
03fc137b BM |
624 | /* Set the UART baud rate to 19200. */ |
625 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
626 | if (ret) { | |
7aa7a72a | 627 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
628 | return ret; |
629 | } | |
630 | ||
7aa7a72a | 631 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
632 | return 0; |
633 | } | |
634 | ||
635 | static int ath10k_init_hw_params(struct ath10k *ar) | |
636 | { | |
637 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
638 | int i; | |
639 | ||
640 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
641 | hw_params = &ath10k_hw_params_list[i]; | |
642 | ||
643 | if (hw_params->id == ar->target_version) | |
644 | break; | |
645 | } | |
646 | ||
647 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 648 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
649 | ar->target_version); |
650 | return -EINVAL; | |
651 | } | |
652 | ||
653 | ar->hw_params = *hw_params; | |
654 | ||
7aa7a72a | 655 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 656 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
657 | |
658 | return 0; | |
659 | } | |
660 | ||
affd3217 MK |
661 | static void ath10k_core_restart(struct work_struct *work) |
662 | { | |
663 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
664 | ||
665 | mutex_lock(&ar->conf_mutex); | |
666 | ||
667 | switch (ar->state) { | |
668 | case ATH10K_STATE_ON: | |
affd3217 | 669 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 670 | ath10k_hif_stop(ar); |
5c81c7fd | 671 | ath10k_scan_finish(ar); |
affd3217 MK |
672 | ieee80211_restart_hw(ar->hw); |
673 | break; | |
674 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
675 | /* this can happen if driver is being unloaded |
676 | * or if the crash happens during FW probing */ | |
7aa7a72a | 677 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
678 | break; |
679 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
680 | /* hw restart might be requested from multiple places */ |
681 | break; | |
affd3217 MK |
682 | case ATH10K_STATE_RESTARTED: |
683 | ar->state = ATH10K_STATE_WEDGED; | |
684 | /* fall through */ | |
685 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 686 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 MK |
687 | break; |
688 | } | |
689 | ||
690 | mutex_unlock(&ar->conf_mutex); | |
691 | } | |
692 | ||
dd30a36e | 693 | int ath10k_core_start(struct ath10k *ar) |
5e3dd157 | 694 | { |
5e3dd157 KV |
695 | int status; |
696 | ||
60631c5c KV |
697 | lockdep_assert_held(&ar->conf_mutex); |
698 | ||
64d151d4 MK |
699 | ath10k_bmi_start(ar); |
700 | ||
5e3dd157 KV |
701 | if (ath10k_init_configure_target(ar)) { |
702 | status = -EINVAL; | |
703 | goto err; | |
704 | } | |
705 | ||
706 | status = ath10k_init_download_firmware(ar); | |
707 | if (status) | |
708 | goto err; | |
709 | ||
710 | status = ath10k_init_uart(ar); | |
711 | if (status) | |
712 | goto err; | |
713 | ||
cd003fad MK |
714 | ar->htc.htc_ops.target_send_suspend_complete = |
715 | ath10k_send_suspend_complete; | |
5e3dd157 | 716 | |
cd003fad MK |
717 | status = ath10k_htc_init(ar); |
718 | if (status) { | |
7aa7a72a | 719 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
720 | goto err; |
721 | } | |
722 | ||
723 | status = ath10k_bmi_done(ar); | |
724 | if (status) | |
cd003fad | 725 | goto err; |
5e3dd157 KV |
726 | |
727 | status = ath10k_wmi_attach(ar); | |
728 | if (status) { | |
7aa7a72a | 729 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 730 | goto err; |
5e3dd157 KV |
731 | } |
732 | ||
95bf21f9 MK |
733 | status = ath10k_htt_init(ar); |
734 | if (status) { | |
7aa7a72a | 735 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
736 | goto err_wmi_detach; |
737 | } | |
738 | ||
739 | status = ath10k_htt_tx_alloc(&ar->htt); | |
740 | if (status) { | |
7aa7a72a | 741 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
742 | goto err_wmi_detach; |
743 | } | |
744 | ||
745 | status = ath10k_htt_rx_alloc(&ar->htt); | |
746 | if (status) { | |
7aa7a72a | 747 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
748 | goto err_htt_tx_detach; |
749 | } | |
750 | ||
67e3c63f MK |
751 | status = ath10k_hif_start(ar); |
752 | if (status) { | |
7aa7a72a | 753 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 754 | goto err_htt_rx_detach; |
67e3c63f MK |
755 | } |
756 | ||
757 | status = ath10k_htc_wait_target(&ar->htc); | |
758 | if (status) { | |
7aa7a72a | 759 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
760 | goto err_hif_stop; |
761 | } | |
5e3dd157 | 762 | |
95bf21f9 | 763 | status = ath10k_htt_connect(&ar->htt); |
edb8236d | 764 | if (status) { |
7aa7a72a | 765 | ath10k_err(ar, "failed to connect htt (%d)\n", status); |
67e3c63f | 766 | goto err_hif_stop; |
5e3dd157 KV |
767 | } |
768 | ||
95bf21f9 MK |
769 | status = ath10k_wmi_connect(ar); |
770 | if (status) { | |
7aa7a72a | 771 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
772 | goto err_hif_stop; |
773 | } | |
774 | ||
775 | status = ath10k_htc_start(&ar->htc); | |
776 | if (status) { | |
7aa7a72a | 777 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
778 | goto err_hif_stop; |
779 | } | |
780 | ||
781 | status = ath10k_wmi_wait_for_service_ready(ar); | |
782 | if (status <= 0) { | |
7aa7a72a | 783 | ath10k_warn(ar, "wmi service ready event not received"); |
95bf21f9 | 784 | status = -ETIMEDOUT; |
b7967dc7 | 785 | goto err_hif_stop; |
95bf21f9 | 786 | } |
5e3dd157 | 787 | |
7aa7a72a | 788 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 789 | ar->hw->wiphy->fw_version); |
5e3dd157 | 790 | |
5e3dd157 KV |
791 | status = ath10k_wmi_cmd_init(ar); |
792 | if (status) { | |
7aa7a72a MK |
793 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
794 | status); | |
b7967dc7 | 795 | goto err_hif_stop; |
5e3dd157 KV |
796 | } |
797 | ||
798 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
799 | if (status <= 0) { | |
7aa7a72a | 800 | ath10k_err(ar, "wmi unified ready event not received\n"); |
5e3dd157 | 801 | status = -ETIMEDOUT; |
b7967dc7 | 802 | goto err_hif_stop; |
5e3dd157 KV |
803 | } |
804 | ||
95bf21f9 MK |
805 | status = ath10k_htt_setup(&ar->htt); |
806 | if (status) { | |
7aa7a72a | 807 | ath10k_err(ar, "failed to setup htt: %d\n", status); |
b7967dc7 | 808 | goto err_hif_stop; |
95bf21f9 | 809 | } |
5e3dd157 | 810 | |
db66ea04 KV |
811 | status = ath10k_debug_start(ar); |
812 | if (status) | |
b7967dc7 | 813 | goto err_hif_stop; |
db66ea04 | 814 | |
dfa413de BM |
815 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) |
816 | ar->free_vdev_map = (1 << TARGET_10X_NUM_VDEVS) - 1; | |
817 | else | |
818 | ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1; | |
819 | ||
0579119f | 820 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 821 | |
dd30a36e MK |
822 | return 0; |
823 | ||
67e3c63f MK |
824 | err_hif_stop: |
825 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
826 | err_htt_rx_detach: |
827 | ath10k_htt_rx_free(&ar->htt); | |
828 | err_htt_tx_detach: | |
829 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
830 | err_wmi_detach: |
831 | ath10k_wmi_detach(ar); | |
832 | err: | |
833 | return status; | |
834 | } | |
818bdd16 | 835 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 836 | |
00f5482b MP |
837 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
838 | { | |
839 | int ret; | |
840 | ||
841 | reinit_completion(&ar->target_suspend); | |
842 | ||
843 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
844 | if (ret) { | |
7aa7a72a | 845 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
846 | return ret; |
847 | } | |
848 | ||
849 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
850 | ||
851 | if (ret == 0) { | |
7aa7a72a | 852 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
853 | return -ETIMEDOUT; |
854 | } | |
855 | ||
856 | return 0; | |
857 | } | |
858 | ||
dd30a36e MK |
859 | void ath10k_core_stop(struct ath10k *ar) |
860 | { | |
60631c5c KV |
861 | lockdep_assert_held(&ar->conf_mutex); |
862 | ||
00f5482b | 863 | /* try to suspend target */ |
216a1836 MK |
864 | if (ar->state != ATH10K_STATE_RESTARTING) |
865 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); | |
866 | ||
db66ea04 | 867 | ath10k_debug_stop(ar); |
95bf21f9 MK |
868 | ath10k_hif_stop(ar); |
869 | ath10k_htt_tx_free(&ar->htt); | |
870 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
871 | ath10k_wmi_detach(ar); |
872 | } | |
818bdd16 MK |
873 | EXPORT_SYMBOL(ath10k_core_stop); |
874 | ||
875 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
876 | * order to know what hw capabilities should be advertised to mac80211 it is | |
877 | * necessary to load the firmware (and tear it down immediately since start | |
878 | * hook will try to init it again) before registering */ | |
879 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
880 | { | |
29385057 MK |
881 | struct bmi_target_info target_info; |
882 | int ret = 0; | |
818bdd16 MK |
883 | |
884 | ret = ath10k_hif_power_up(ar); | |
885 | if (ret) { | |
7aa7a72a | 886 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
887 | return ret; |
888 | } | |
889 | ||
29385057 MK |
890 | memset(&target_info, 0, sizeof(target_info)); |
891 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
892 | if (ret) { | |
7aa7a72a | 893 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
29385057 MK |
894 | ath10k_hif_power_down(ar); |
895 | return ret; | |
896 | } | |
897 | ||
898 | ar->target_version = target_info.version; | |
899 | ar->hw->wiphy->hw_version = target_info.version; | |
900 | ||
901 | ret = ath10k_init_hw_params(ar); | |
902 | if (ret) { | |
7aa7a72a | 903 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
29385057 MK |
904 | ath10k_hif_power_down(ar); |
905 | return ret; | |
906 | } | |
907 | ||
908 | ret = ath10k_core_fetch_firmware_files(ar); | |
909 | if (ret) { | |
7aa7a72a | 910 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
29385057 MK |
911 | ath10k_hif_power_down(ar); |
912 | return ret; | |
913 | } | |
914 | ||
60631c5c KV |
915 | mutex_lock(&ar->conf_mutex); |
916 | ||
818bdd16 MK |
917 | ret = ath10k_core_start(ar); |
918 | if (ret) { | |
7aa7a72a | 919 | ath10k_err(ar, "could not init core (%d)\n", ret); |
29385057 | 920 | ath10k_core_free_firmware_files(ar); |
818bdd16 | 921 | ath10k_hif_power_down(ar); |
60631c5c | 922 | mutex_unlock(&ar->conf_mutex); |
818bdd16 MK |
923 | return ret; |
924 | } | |
925 | ||
8079de0d | 926 | ath10k_print_driver_info(ar); |
818bdd16 | 927 | ath10k_core_stop(ar); |
60631c5c KV |
928 | |
929 | mutex_unlock(&ar->conf_mutex); | |
930 | ||
818bdd16 MK |
931 | ath10k_hif_power_down(ar); |
932 | return 0; | |
933 | } | |
dd30a36e | 934 | |
e01ae68c KV |
935 | static int ath10k_core_check_chip_id(struct ath10k *ar) |
936 | { | |
937 | u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV); | |
938 | ||
7aa7a72a | 939 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n", |
effea968 KV |
940 | ar->chip_id, hw_revision); |
941 | ||
e01ae68c KV |
942 | /* Check that we are not using hw1.0 (some of them have same pci id |
943 | * as hw2.0) before doing anything else as ath10k crashes horribly | |
944 | * due to missing hw1.0 workarounds. */ | |
945 | switch (hw_revision) { | |
946 | case QCA988X_HW_1_0_CHIP_ID_REV: | |
7aa7a72a | 947 | ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n"); |
e01ae68c KV |
948 | return -EOPNOTSUPP; |
949 | ||
950 | case QCA988X_HW_2_0_CHIP_ID_REV: | |
951 | /* known hardware revision, continue normally */ | |
952 | return 0; | |
953 | ||
954 | default: | |
7aa7a72a | 955 | ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n", |
e01ae68c KV |
956 | ar->chip_id); |
957 | return 0; | |
958 | } | |
959 | ||
960 | return 0; | |
961 | } | |
962 | ||
6782cb69 | 963 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 964 | { |
6782cb69 | 965 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
966 | int status; |
967 | ||
818bdd16 MK |
968 | status = ath10k_core_probe_fw(ar); |
969 | if (status) { | |
7aa7a72a | 970 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 971 | goto err; |
818bdd16 | 972 | } |
dd30a36e | 973 | |
5e3dd157 | 974 | status = ath10k_mac_register(ar); |
818bdd16 | 975 | if (status) { |
7aa7a72a | 976 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 977 | goto err_release_fw; |
818bdd16 | 978 | } |
5e3dd157 KV |
979 | |
980 | status = ath10k_debug_create(ar); | |
981 | if (status) { | |
7aa7a72a | 982 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
983 | goto err_unregister_mac; |
984 | } | |
985 | ||
855aed12 SW |
986 | status = ath10k_spectral_create(ar); |
987 | if (status) { | |
7aa7a72a | 988 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
989 | goto err_debug_destroy; |
990 | } | |
991 | ||
6782cb69 MK |
992 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
993 | return; | |
5e3dd157 | 994 | |
855aed12 SW |
995 | err_debug_destroy: |
996 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
997 | err_unregister_mac: |
998 | ath10k_mac_unregister(ar); | |
29385057 MK |
999 | err_release_fw: |
1000 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1001 | err: |
a491a920 MK |
1002 | /* TODO: It's probably a good idea to release device from the driver |
1003 | * but calling device_release_driver() here will cause a deadlock. | |
1004 | */ | |
6782cb69 MK |
1005 | return; |
1006 | } | |
1007 | ||
1008 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1009 | { | |
1010 | int status; | |
1011 | ||
1012 | ar->chip_id = chip_id; | |
1013 | ||
1014 | status = ath10k_core_check_chip_id(ar); | |
1015 | if (status) { | |
7aa7a72a | 1016 | ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id); |
6782cb69 MK |
1017 | return status; |
1018 | } | |
1019 | ||
1020 | queue_work(ar->workqueue, &ar->register_work); | |
1021 | ||
1022 | return 0; | |
5e3dd157 KV |
1023 | } |
1024 | EXPORT_SYMBOL(ath10k_core_register); | |
1025 | ||
1026 | void ath10k_core_unregister(struct ath10k *ar) | |
1027 | { | |
6782cb69 MK |
1028 | cancel_work_sync(&ar->register_work); |
1029 | ||
1030 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1031 | return; | |
1032 | ||
804eef14 SW |
1033 | /* Stop spectral before unregistering from mac80211 to remove the |
1034 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1035 | * would be already be free'd recursively, leading to a double free. | |
1036 | */ | |
1037 | ath10k_spectral_destroy(ar); | |
1038 | ||
5e3dd157 KV |
1039 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1040 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1041 | * unhappy about callback failures. */ | |
1042 | ath10k_mac_unregister(ar); | |
db66ea04 | 1043 | |
29385057 | 1044 | ath10k_core_free_firmware_files(ar); |
6f1f56ea BG |
1045 | |
1046 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1047 | } |
1048 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1049 | ||
e7b54194 | 1050 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
0d0a6939 MK |
1051 | const struct ath10k_hif_ops *hif_ops) |
1052 | { | |
1053 | struct ath10k *ar; | |
1054 | ||
e7b54194 | 1055 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1056 | if (!ar) |
1057 | return NULL; | |
1058 | ||
1059 | ar->ath_common.priv = ar; | |
1060 | ar->ath_common.hw = ar->hw; | |
1061 | ||
1062 | ar->p2p = !!ath10k_p2p; | |
1063 | ar->dev = dev; | |
1064 | ||
0d0a6939 MK |
1065 | ar->hif.ops = hif_ops; |
1066 | ||
1067 | init_completion(&ar->scan.started); | |
1068 | init_completion(&ar->scan.completed); | |
1069 | init_completion(&ar->scan.on_channel); | |
1070 | init_completion(&ar->target_suspend); | |
1071 | ||
1072 | init_completion(&ar->install_key_done); | |
1073 | init_completion(&ar->vdev_setup_done); | |
1074 | ||
5c81c7fd | 1075 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1076 | |
1077 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1078 | if (!ar->workqueue) | |
1079 | goto err_wq; | |
1080 | ||
1081 | mutex_init(&ar->conf_mutex); | |
1082 | spin_lock_init(&ar->data_lock); | |
1083 | ||
1084 | INIT_LIST_HEAD(&ar->peers); | |
1085 | init_waitqueue_head(&ar->peer_mapping_wq); | |
1086 | ||
1087 | init_completion(&ar->offchan_tx_completed); | |
1088 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1089 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1090 | ||
1091 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1092 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1093 | ||
6782cb69 | 1094 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1095 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1096 | ||
1097 | return ar; | |
1098 | ||
1099 | err_wq: | |
1100 | ath10k_mac_destroy(ar); | |
1101 | return NULL; | |
1102 | } | |
1103 | EXPORT_SYMBOL(ath10k_core_create); | |
1104 | ||
1105 | void ath10k_core_destroy(struct ath10k *ar) | |
1106 | { | |
1107 | flush_workqueue(ar->workqueue); | |
1108 | destroy_workqueue(ar->workqueue); | |
1109 | ||
1110 | ath10k_mac_destroy(ar); | |
1111 | } | |
1112 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1113 | ||
5e3dd157 KV |
1114 | MODULE_AUTHOR("Qualcomm Atheros"); |
1115 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1116 | MODULE_LICENSE("Dual BSD/GPL"); |