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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
20 | ||
21 | #include "core.h" | |
22 | #include "mac.h" | |
23 | #include "htc.h" | |
24 | #include "hif.h" | |
25 | #include "wmi.h" | |
26 | #include "bmi.h" | |
27 | #include "debug.h" | |
28 | #include "htt.h" | |
29 | ||
30 | unsigned int ath10k_debug_mask; | |
31 | static bool uart_print; | |
32 | static unsigned int ath10k_p2p; | |
33 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); | |
34 | module_param(uart_print, bool, 0644); | |
35 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
36 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); | |
37 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
38 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
39 | ||
40 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
41 | { |
42 | .id = QCA988X_HW_2_0_VERSION, | |
43 | .name = "qca988x hw2.0", | |
44 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
45 | .fw = { | |
46 | .dir = QCA988X_HW_2_0_FW_DIR, | |
47 | .fw = QCA988X_HW_2_0_FW_FILE, | |
48 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
49 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
50 | }, | |
51 | }, | |
52 | }; | |
53 | ||
54 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
55 | { | |
effea968 | 56 | ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 57 | |
9042e17d | 58 | complete(&ar->target_suspend); |
5e3dd157 KV |
59 | } |
60 | ||
5e3dd157 KV |
61 | static int ath10k_init_configure_target(struct ath10k *ar) |
62 | { | |
63 | u32 param_host; | |
64 | int ret; | |
65 | ||
66 | /* tell target which HTC version it is used*/ | |
67 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
68 | HTC_PROTOCOL_VERSION); | |
69 | if (ret) { | |
70 | ath10k_err("settings HTC version failed\n"); | |
71 | return ret; | |
72 | } | |
73 | ||
74 | /* set the firmware mode to STA/IBSS/AP */ | |
75 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
76 | if (ret) { | |
77 | ath10k_err("setting firmware mode (1/2) failed\n"); | |
78 | return ret; | |
79 | } | |
80 | ||
81 | /* TODO following parameters need to be re-visited. */ | |
82 | /* num_device */ | |
83 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
84 | /* Firmware mode */ | |
85 | /* FIXME: Why FW_MODE_AP ??.*/ | |
86 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
87 | /* mac_addr_method */ | |
88 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
89 | /* firmware_bridge */ | |
90 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
91 | /* fwsubmode */ | |
92 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
93 | ||
94 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
95 | if (ret) { | |
96 | ath10k_err("setting firmware mode (2/2) failed\n"); | |
97 | return ret; | |
98 | } | |
99 | ||
100 | /* We do all byte-swapping on the host */ | |
101 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
102 | if (ret) { | |
103 | ath10k_err("setting host CPU BE mode failed\n"); | |
104 | return ret; | |
105 | } | |
106 | ||
107 | /* FW descriptor/Data swap flags */ | |
108 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
109 | ||
110 | if (ret) { | |
111 | ath10k_err("setting FW data/desc swap flags failed\n"); | |
112 | return ret; | |
113 | } | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
118 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
119 | const char *dir, | |
120 | const char *file) | |
121 | { | |
122 | char filename[100]; | |
123 | const struct firmware *fw; | |
124 | int ret; | |
125 | ||
126 | if (file == NULL) | |
127 | return ERR_PTR(-ENOENT); | |
128 | ||
129 | if (dir == NULL) | |
130 | dir = "."; | |
131 | ||
132 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
133 | ret = request_firmware(&fw, filename, ar->dev); | |
134 | if (ret) | |
135 | return ERR_PTR(ret); | |
136 | ||
137 | return fw; | |
138 | } | |
139 | ||
958df3a0 | 140 | static int ath10k_push_board_ext_data(struct ath10k *ar) |
5e3dd157 KV |
141 | { |
142 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
143 | u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ; | |
144 | u32 board_ext_data_addr; | |
145 | int ret; | |
146 | ||
147 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
148 | if (ret) { | |
149 | ath10k_err("could not read board ext data addr (%d)\n", ret); | |
150 | return ret; | |
151 | } | |
152 | ||
b52b7688 | 153 | ath10k_dbg(ATH10K_DBG_BOOT, |
effea968 | 154 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
155 | board_ext_data_addr); |
156 | ||
157 | if (board_ext_data_addr == 0) | |
158 | return 0; | |
159 | ||
958df3a0 | 160 | if (ar->board_len != (board_data_size + board_ext_data_size)) { |
5e3dd157 | 161 | ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n", |
958df3a0 | 162 | ar->board_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
163 | return -EINVAL; |
164 | } | |
165 | ||
166 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
958df3a0 | 167 | ar->board_data + board_data_size, |
5e3dd157 KV |
168 | board_ext_data_size); |
169 | if (ret) { | |
170 | ath10k_err("could not write board ext data (%d)\n", ret); | |
171 | return ret; | |
172 | } | |
173 | ||
174 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
175 | (board_ext_data_size << 16) | 1); | |
176 | if (ret) { | |
177 | ath10k_err("could not write board ext data bit (%d)\n", ret); | |
178 | return ret; | |
179 | } | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
184 | static int ath10k_download_board_data(struct ath10k *ar) | |
185 | { | |
186 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
187 | u32 address; | |
5e3dd157 KV |
188 | int ret; |
189 | ||
958df3a0 | 190 | ret = ath10k_push_board_ext_data(ar); |
5e3dd157 KV |
191 | if (ret) { |
192 | ath10k_err("could not push board ext data (%d)\n", ret); | |
193 | goto exit; | |
194 | } | |
195 | ||
196 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
197 | if (ret) { | |
198 | ath10k_err("could not read board data addr (%d)\n", ret); | |
199 | goto exit; | |
200 | } | |
201 | ||
958df3a0 KV |
202 | ret = ath10k_bmi_write_memory(ar, address, ar->board_data, |
203 | min_t(u32, board_data_size, | |
204 | ar->board_len)); | |
5e3dd157 KV |
205 | if (ret) { |
206 | ath10k_err("could not write board data (%d)\n", ret); | |
207 | goto exit; | |
208 | } | |
209 | ||
210 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
211 | if (ret) { | |
212 | ath10k_err("could not write board data bit (%d)\n", ret); | |
213 | goto exit; | |
214 | } | |
215 | ||
216 | exit: | |
5e3dd157 KV |
217 | return ret; |
218 | } | |
219 | ||
220 | static int ath10k_download_and_run_otp(struct ath10k *ar) | |
221 | { | |
d6d4a58d | 222 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
223 | int ret; |
224 | ||
225 | /* OTP is optional */ | |
226 | ||
7f06ea1e | 227 | if (!ar->otp_data || !ar->otp_len) { |
36a8f413 BG |
228 | ath10k_warn("Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
229 | ar->otp_data, ar->otp_len); | |
5e3dd157 | 230 | return 0; |
7f06ea1e KV |
231 | } |
232 | ||
233 | ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", | |
234 | address, ar->otp_len); | |
5e3dd157 | 235 | |
958df3a0 | 236 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 KV |
237 | if (ret) { |
238 | ath10k_err("could not write otp (%d)\n", ret); | |
7f06ea1e | 239 | return ret; |
5e3dd157 KV |
240 | } |
241 | ||
d6d4a58d | 242 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 KV |
243 | if (ret) { |
244 | ath10k_err("could not execute otp (%d)\n", ret); | |
7f06ea1e | 245 | return ret; |
5e3dd157 KV |
246 | } |
247 | ||
7f06ea1e KV |
248 | ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
249 | ||
250 | if (result != 0) { | |
251 | ath10k_err("otp calibration failed: %d", result); | |
252 | return -EINVAL; | |
253 | } | |
254 | ||
255 | return 0; | |
5e3dd157 KV |
256 | } |
257 | ||
258 | static int ath10k_download_fw(struct ath10k *ar) | |
259 | { | |
5e3dd157 KV |
260 | u32 address; |
261 | int ret; | |
262 | ||
5e3dd157 KV |
263 | address = ar->hw_params.patch_load_addr; |
264 | ||
958df3a0 KV |
265 | ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data, |
266 | ar->firmware_len); | |
5e3dd157 KV |
267 | if (ret) { |
268 | ath10k_err("could not write fw (%d)\n", ret); | |
269 | goto exit; | |
270 | } | |
271 | ||
272 | exit: | |
29385057 MK |
273 | return ret; |
274 | } | |
275 | ||
276 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
277 | { | |
36527916 KV |
278 | if (ar->board && !IS_ERR(ar->board)) |
279 | release_firmware(ar->board); | |
29385057 MK |
280 | |
281 | if (ar->otp && !IS_ERR(ar->otp)) | |
282 | release_firmware(ar->otp); | |
283 | ||
284 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
285 | release_firmware(ar->firmware); | |
286 | ||
36527916 | 287 | ar->board = NULL; |
958df3a0 KV |
288 | ar->board_data = NULL; |
289 | ar->board_len = 0; | |
290 | ||
29385057 | 291 | ar->otp = NULL; |
958df3a0 KV |
292 | ar->otp_data = NULL; |
293 | ar->otp_len = 0; | |
294 | ||
29385057 | 295 | ar->firmware = NULL; |
958df3a0 KV |
296 | ar->firmware_data = NULL; |
297 | ar->firmware_len = 0; | |
29385057 MK |
298 | } |
299 | ||
1a222435 | 300 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
301 | { |
302 | int ret = 0; | |
303 | ||
304 | if (ar->hw_params.fw.fw == NULL) { | |
305 | ath10k_err("firmware file not defined\n"); | |
306 | return -EINVAL; | |
307 | } | |
308 | ||
309 | if (ar->hw_params.fw.board == NULL) { | |
310 | ath10k_err("board data file not defined"); | |
311 | return -EINVAL; | |
312 | } | |
313 | ||
36527916 KV |
314 | ar->board = ath10k_fetch_fw_file(ar, |
315 | ar->hw_params.fw.dir, | |
316 | ar->hw_params.fw.board); | |
317 | if (IS_ERR(ar->board)) { | |
318 | ret = PTR_ERR(ar->board); | |
29385057 MK |
319 | ath10k_err("could not fetch board data (%d)\n", ret); |
320 | goto err; | |
321 | } | |
322 | ||
958df3a0 KV |
323 | ar->board_data = ar->board->data; |
324 | ar->board_len = ar->board->size; | |
325 | ||
29385057 MK |
326 | ar->firmware = ath10k_fetch_fw_file(ar, |
327 | ar->hw_params.fw.dir, | |
328 | ar->hw_params.fw.fw); | |
329 | if (IS_ERR(ar->firmware)) { | |
330 | ret = PTR_ERR(ar->firmware); | |
331 | ath10k_err("could not fetch firmware (%d)\n", ret); | |
332 | goto err; | |
333 | } | |
334 | ||
958df3a0 KV |
335 | ar->firmware_data = ar->firmware->data; |
336 | ar->firmware_len = ar->firmware->size; | |
337 | ||
29385057 MK |
338 | /* OTP may be undefined. If so, don't fetch it at all */ |
339 | if (ar->hw_params.fw.otp == NULL) | |
340 | return 0; | |
341 | ||
342 | ar->otp = ath10k_fetch_fw_file(ar, | |
343 | ar->hw_params.fw.dir, | |
344 | ar->hw_params.fw.otp); | |
345 | if (IS_ERR(ar->otp)) { | |
346 | ret = PTR_ERR(ar->otp); | |
347 | ath10k_err("could not fetch otp (%d)\n", ret); | |
348 | goto err; | |
349 | } | |
350 | ||
958df3a0 KV |
351 | ar->otp_data = ar->otp->data; |
352 | ar->otp_len = ar->otp->size; | |
353 | ||
29385057 MK |
354 | return 0; |
355 | ||
356 | err: | |
357 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
358 | return ret; |
359 | } | |
360 | ||
1a222435 KV |
361 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
362 | { | |
363 | size_t magic_len, len, ie_len; | |
364 | int ie_id, i, index, bit, ret; | |
365 | struct ath10k_fw_ie *hdr; | |
366 | const u8 *data; | |
367 | __le32 *timestamp; | |
368 | ||
369 | /* first fetch the firmware file (firmware-*.bin) */ | |
370 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
371 | if (IS_ERR(ar->firmware)) { | |
53c02284 BG |
372 | ath10k_err("could not fetch firmware file '%s/%s': %ld\n", |
373 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); | |
1a222435 KV |
374 | return PTR_ERR(ar->firmware); |
375 | } | |
376 | ||
377 | data = ar->firmware->data; | |
378 | len = ar->firmware->size; | |
379 | ||
380 | /* magic also includes the null byte, check that as well */ | |
381 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
382 | ||
383 | if (len < magic_len) { | |
53c02284 BG |
384 | ath10k_err("firmware file '%s/%s' too small to contain magic: %zu\n", |
385 | ar->hw_params.fw.dir, name, len); | |
9bab1cc0 MK |
386 | ret = -EINVAL; |
387 | goto err; | |
1a222435 KV |
388 | } |
389 | ||
390 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
53c02284 | 391 | ath10k_err("invalid firmware magic\n"); |
9bab1cc0 MK |
392 | ret = -EINVAL; |
393 | goto err; | |
1a222435 KV |
394 | } |
395 | ||
396 | /* jump over the padding */ | |
397 | magic_len = ALIGN(magic_len, 4); | |
398 | ||
399 | len -= magic_len; | |
400 | data += magic_len; | |
401 | ||
402 | /* loop elements */ | |
403 | while (len > sizeof(struct ath10k_fw_ie)) { | |
404 | hdr = (struct ath10k_fw_ie *)data; | |
405 | ||
406 | ie_id = le32_to_cpu(hdr->id); | |
407 | ie_len = le32_to_cpu(hdr->len); | |
408 | ||
409 | len -= sizeof(*hdr); | |
410 | data += sizeof(*hdr); | |
411 | ||
412 | if (len < ie_len) { | |
53c02284 | 413 | ath10k_err("invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 414 | ie_id, len, ie_len); |
9bab1cc0 MK |
415 | ret = -EINVAL; |
416 | goto err; | |
1a222435 KV |
417 | } |
418 | ||
419 | switch (ie_id) { | |
420 | case ATH10K_FW_IE_FW_VERSION: | |
421 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
422 | break; | |
423 | ||
424 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
425 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
426 | ||
427 | ath10k_dbg(ATH10K_DBG_BOOT, | |
428 | "found fw version %s\n", | |
429 | ar->hw->wiphy->fw_version); | |
430 | break; | |
431 | case ATH10K_FW_IE_TIMESTAMP: | |
432 | if (ie_len != sizeof(u32)) | |
433 | break; | |
434 | ||
435 | timestamp = (__le32 *)data; | |
436 | ||
437 | ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n", | |
438 | le32_to_cpup(timestamp)); | |
439 | break; | |
440 | case ATH10K_FW_IE_FEATURES: | |
441 | ath10k_dbg(ATH10K_DBG_BOOT, | |
442 | "found firmware features ie (%zd B)\n", | |
443 | ie_len); | |
444 | ||
445 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
446 | index = i / 8; | |
447 | bit = i % 8; | |
448 | ||
449 | if (index == ie_len) | |
450 | break; | |
451 | ||
f591a1a5 BG |
452 | if (data[index] & (1 << bit)) { |
453 | ath10k_dbg(ATH10K_DBG_BOOT, | |
454 | "Enabling feature bit: %i\n", | |
455 | i); | |
1a222435 | 456 | __set_bit(i, ar->fw_features); |
f591a1a5 | 457 | } |
1a222435 KV |
458 | } |
459 | ||
460 | ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "", | |
461 | ar->fw_features, | |
462 | sizeof(ar->fw_features)); | |
463 | break; | |
464 | case ATH10K_FW_IE_FW_IMAGE: | |
465 | ath10k_dbg(ATH10K_DBG_BOOT, | |
466 | "found fw image ie (%zd B)\n", | |
467 | ie_len); | |
468 | ||
469 | ar->firmware_data = data; | |
470 | ar->firmware_len = ie_len; | |
471 | ||
472 | break; | |
473 | case ATH10K_FW_IE_OTP_IMAGE: | |
474 | ath10k_dbg(ATH10K_DBG_BOOT, | |
475 | "found otp image ie (%zd B)\n", | |
476 | ie_len); | |
477 | ||
478 | ar->otp_data = data; | |
479 | ar->otp_len = ie_len; | |
480 | ||
481 | break; | |
482 | default: | |
483 | ath10k_warn("Unknown FW IE: %u\n", | |
484 | le32_to_cpu(hdr->id)); | |
485 | break; | |
486 | } | |
487 | ||
488 | /* jump over the padding */ | |
489 | ie_len = ALIGN(ie_len, 4); | |
490 | ||
491 | len -= ie_len; | |
492 | data += ie_len; | |
e05634ee | 493 | } |
1a222435 KV |
494 | |
495 | if (!ar->firmware_data || !ar->firmware_len) { | |
53c02284 BG |
496 | ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
497 | ar->hw_params.fw.dir, name); | |
1a222435 KV |
498 | ret = -ENOMEDIUM; |
499 | goto err; | |
500 | } | |
501 | ||
502 | /* now fetch the board file */ | |
503 | if (ar->hw_params.fw.board == NULL) { | |
504 | ath10k_err("board data file not defined"); | |
505 | ret = -EINVAL; | |
506 | goto err; | |
507 | } | |
508 | ||
509 | ar->board = ath10k_fetch_fw_file(ar, | |
510 | ar->hw_params.fw.dir, | |
511 | ar->hw_params.fw.board); | |
512 | if (IS_ERR(ar->board)) { | |
513 | ret = PTR_ERR(ar->board); | |
53c02284 BG |
514 | ath10k_err("could not fetch board data '%s/%s' (%d)\n", |
515 | ar->hw_params.fw.dir, ar->hw_params.fw.board, | |
516 | ret); | |
1a222435 KV |
517 | goto err; |
518 | } | |
519 | ||
520 | ar->board_data = ar->board->data; | |
521 | ar->board_len = ar->board->size; | |
522 | ||
523 | return 0; | |
524 | ||
525 | err: | |
526 | ath10k_core_free_firmware_files(ar); | |
527 | return ret; | |
528 | } | |
529 | ||
530 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
531 | { | |
532 | int ret; | |
533 | ||
53c02284 BG |
534 | ar->fw_api = 2; |
535 | ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
536 | ||
1a222435 | 537 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
538 | if (ret == 0) |
539 | goto success; | |
540 | ||
541 | ar->fw_api = 1; | |
542 | ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
1a222435 KV |
543 | |
544 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
545 | if (ret) | |
546 | return ret; | |
547 | ||
53c02284 | 548 | success: |
1a222435 KV |
549 | ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
5e3dd157 KV |
554 | static int ath10k_init_download_firmware(struct ath10k *ar) |
555 | { | |
556 | int ret; | |
557 | ||
558 | ret = ath10k_download_board_data(ar); | |
36a8f413 BG |
559 | if (ret) { |
560 | ath10k_err("failed to download board data: %d\n", ret); | |
5e3dd157 | 561 | return ret; |
36a8f413 | 562 | } |
5e3dd157 KV |
563 | |
564 | ret = ath10k_download_and_run_otp(ar); | |
36a8f413 BG |
565 | if (ret) { |
566 | ath10k_err("failed to run otp: %d\n", ret); | |
5e3dd157 | 567 | return ret; |
36a8f413 | 568 | } |
5e3dd157 KV |
569 | |
570 | ret = ath10k_download_fw(ar); | |
36a8f413 BG |
571 | if (ret) { |
572 | ath10k_err("failed to download firmware: %d\n", ret); | |
5e3dd157 | 573 | return ret; |
36a8f413 | 574 | } |
5e3dd157 KV |
575 | |
576 | return ret; | |
577 | } | |
578 | ||
579 | static int ath10k_init_uart(struct ath10k *ar) | |
580 | { | |
581 | int ret; | |
582 | ||
583 | /* | |
584 | * Explicitly setting UART prints to zero as target turns it on | |
585 | * based on scratch registers. | |
586 | */ | |
587 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
588 | if (ret) { | |
589 | ath10k_warn("could not disable UART prints (%d)\n", ret); | |
590 | return ret; | |
591 | } | |
592 | ||
c8c39afe | 593 | if (!uart_print) |
5e3dd157 | 594 | return 0; |
5e3dd157 KV |
595 | |
596 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); | |
597 | if (ret) { | |
598 | ath10k_warn("could not enable UART prints (%d)\n", ret); | |
599 | return ret; | |
600 | } | |
601 | ||
602 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
603 | if (ret) { | |
604 | ath10k_warn("could not enable UART prints (%d)\n", ret); | |
605 | return ret; | |
606 | } | |
607 | ||
03fc137b BM |
608 | /* Set the UART baud rate to 19200. */ |
609 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
610 | if (ret) { | |
611 | ath10k_warn("could not set the baud rate (%d)\n", ret); | |
612 | return ret; | |
613 | } | |
614 | ||
5e3dd157 KV |
615 | ath10k_info("UART prints enabled\n"); |
616 | return 0; | |
617 | } | |
618 | ||
619 | static int ath10k_init_hw_params(struct ath10k *ar) | |
620 | { | |
621 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
622 | int i; | |
623 | ||
624 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
625 | hw_params = &ath10k_hw_params_list[i]; | |
626 | ||
627 | if (hw_params->id == ar->target_version) | |
628 | break; | |
629 | } | |
630 | ||
631 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
632 | ath10k_err("Unsupported hardware version: 0x%x\n", | |
633 | ar->target_version); | |
634 | return -EINVAL; | |
635 | } | |
636 | ||
637 | ar->hw_params = *hw_params; | |
638 | ||
c8c39afe KV |
639 | ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
640 | ar->hw_params.name, ar->target_version); | |
5e3dd157 KV |
641 | |
642 | return 0; | |
643 | } | |
644 | ||
affd3217 MK |
645 | static void ath10k_core_restart(struct work_struct *work) |
646 | { | |
647 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
648 | ||
649 | mutex_lock(&ar->conf_mutex); | |
650 | ||
651 | switch (ar->state) { | |
652 | case ATH10K_STATE_ON: | |
affd3217 | 653 | ar->state = ATH10K_STATE_RESTARTING; |
c5058f5b MK |
654 | del_timer_sync(&ar->scan.timeout); |
655 | ath10k_reset_scan((unsigned long)ar); | |
affd3217 MK |
656 | ieee80211_restart_hw(ar->hw); |
657 | break; | |
658 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
659 | /* this can happen if driver is being unloaded |
660 | * or if the crash happens during FW probing */ | |
affd3217 MK |
661 | ath10k_warn("cannot restart a device that hasn't been started\n"); |
662 | break; | |
663 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
664 | /* hw restart might be requested from multiple places */ |
665 | break; | |
affd3217 MK |
666 | case ATH10K_STATE_RESTARTED: |
667 | ar->state = ATH10K_STATE_WEDGED; | |
668 | /* fall through */ | |
669 | case ATH10K_STATE_WEDGED: | |
670 | ath10k_warn("device is wedged, will not restart\n"); | |
671 | break; | |
672 | } | |
673 | ||
674 | mutex_unlock(&ar->conf_mutex); | |
675 | } | |
676 | ||
dd30a36e | 677 | int ath10k_core_start(struct ath10k *ar) |
5e3dd157 | 678 | { |
5e3dd157 KV |
679 | int status; |
680 | ||
60631c5c KV |
681 | lockdep_assert_held(&ar->conf_mutex); |
682 | ||
64d151d4 MK |
683 | ath10k_bmi_start(ar); |
684 | ||
5e3dd157 KV |
685 | if (ath10k_init_configure_target(ar)) { |
686 | status = -EINVAL; | |
687 | goto err; | |
688 | } | |
689 | ||
690 | status = ath10k_init_download_firmware(ar); | |
691 | if (status) | |
692 | goto err; | |
693 | ||
694 | status = ath10k_init_uart(ar); | |
695 | if (status) | |
696 | goto err; | |
697 | ||
cd003fad MK |
698 | ar->htc.htc_ops.target_send_suspend_complete = |
699 | ath10k_send_suspend_complete; | |
5e3dd157 | 700 | |
cd003fad MK |
701 | status = ath10k_htc_init(ar); |
702 | if (status) { | |
703 | ath10k_err("could not init HTC (%d)\n", status); | |
5e3dd157 KV |
704 | goto err; |
705 | } | |
706 | ||
707 | status = ath10k_bmi_done(ar); | |
708 | if (status) | |
cd003fad | 709 | goto err; |
5e3dd157 KV |
710 | |
711 | status = ath10k_wmi_attach(ar); | |
712 | if (status) { | |
713 | ath10k_err("WMI attach failed: %d\n", status); | |
cd003fad | 714 | goto err; |
5e3dd157 KV |
715 | } |
716 | ||
95bf21f9 MK |
717 | status = ath10k_htt_init(ar); |
718 | if (status) { | |
719 | ath10k_err("failed to init htt: %d\n", status); | |
720 | goto err_wmi_detach; | |
721 | } | |
722 | ||
723 | status = ath10k_htt_tx_alloc(&ar->htt); | |
724 | if (status) { | |
725 | ath10k_err("failed to alloc htt tx: %d\n", status); | |
726 | goto err_wmi_detach; | |
727 | } | |
728 | ||
729 | status = ath10k_htt_rx_alloc(&ar->htt); | |
730 | if (status) { | |
731 | ath10k_err("failed to alloc htt rx: %d\n", status); | |
732 | goto err_htt_tx_detach; | |
733 | } | |
734 | ||
67e3c63f MK |
735 | status = ath10k_hif_start(ar); |
736 | if (status) { | |
737 | ath10k_err("could not start HIF: %d\n", status); | |
95bf21f9 | 738 | goto err_htt_rx_detach; |
67e3c63f MK |
739 | } |
740 | ||
741 | status = ath10k_htc_wait_target(&ar->htc); | |
742 | if (status) { | |
743 | ath10k_err("failed to connect to HTC: %d\n", status); | |
744 | goto err_hif_stop; | |
745 | } | |
5e3dd157 | 746 | |
95bf21f9 | 747 | status = ath10k_htt_connect(&ar->htt); |
edb8236d | 748 | if (status) { |
95bf21f9 | 749 | ath10k_err("failed to connect htt (%d)\n", status); |
67e3c63f | 750 | goto err_hif_stop; |
5e3dd157 KV |
751 | } |
752 | ||
95bf21f9 MK |
753 | status = ath10k_wmi_connect(ar); |
754 | if (status) { | |
755 | ath10k_err("could not connect wmi: %d\n", status); | |
756 | goto err_hif_stop; | |
757 | } | |
758 | ||
759 | status = ath10k_htc_start(&ar->htc); | |
760 | if (status) { | |
761 | ath10k_err("failed to start htc: %d\n", status); | |
762 | goto err_hif_stop; | |
763 | } | |
764 | ||
765 | status = ath10k_wmi_wait_for_service_ready(ar); | |
766 | if (status <= 0) { | |
767 | ath10k_warn("wmi service ready event not received"); | |
768 | status = -ETIMEDOUT; | |
769 | goto err_htc_stop; | |
770 | } | |
5e3dd157 | 771 | |
c8c39afe KV |
772 | ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n", |
773 | ar->hw->wiphy->fw_version); | |
5e3dd157 | 774 | |
5e3dd157 KV |
775 | status = ath10k_wmi_cmd_init(ar); |
776 | if (status) { | |
777 | ath10k_err("could not send WMI init command (%d)\n", status); | |
95bf21f9 | 778 | goto err_htc_stop; |
5e3dd157 KV |
779 | } |
780 | ||
781 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
782 | if (status <= 0) { | |
783 | ath10k_err("wmi unified ready event not received\n"); | |
784 | status = -ETIMEDOUT; | |
95bf21f9 | 785 | goto err_htc_stop; |
5e3dd157 KV |
786 | } |
787 | ||
95bf21f9 MK |
788 | status = ath10k_htt_setup(&ar->htt); |
789 | if (status) { | |
790 | ath10k_err("failed to setup htt: %d\n", status); | |
791 | goto err_htc_stop; | |
792 | } | |
5e3dd157 | 793 | |
db66ea04 KV |
794 | status = ath10k_debug_start(ar); |
795 | if (status) | |
95bf21f9 | 796 | goto err_htc_stop; |
db66ea04 | 797 | |
1a1b8a88 | 798 | ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1; |
0579119f | 799 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 800 | |
650b91fb | 801 | if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags)) |
c508671d KV |
802 | ath10k_info("%s (0x%08x, 0x%08x) fw %s api %d htt %d.%d\n", |
803 | ar->hw_params.name, | |
804 | ar->target_version, | |
805 | ar->chip_id, | |
806 | ar->hw->wiphy->fw_version, | |
807 | ar->fw_api, | |
650b91fb KV |
808 | ar->htt.target_version_major, |
809 | ar->htt.target_version_minor); | |
810 | ||
811 | __set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags); | |
c8c39afe | 812 | |
dd30a36e MK |
813 | return 0; |
814 | ||
95bf21f9 | 815 | err_htc_stop: |
dd30a36e | 816 | ath10k_htc_stop(&ar->htc); |
67e3c63f MK |
817 | err_hif_stop: |
818 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
819 | err_htt_rx_detach: |
820 | ath10k_htt_rx_free(&ar->htt); | |
821 | err_htt_tx_detach: | |
822 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
823 | err_wmi_detach: |
824 | ath10k_wmi_detach(ar); | |
825 | err: | |
826 | return status; | |
827 | } | |
818bdd16 | 828 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 829 | |
00f5482b MP |
830 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
831 | { | |
832 | int ret; | |
833 | ||
834 | reinit_completion(&ar->target_suspend); | |
835 | ||
836 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
837 | if (ret) { | |
838 | ath10k_warn("could not suspend target (%d)\n", ret); | |
839 | return ret; | |
840 | } | |
841 | ||
842 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
843 | ||
844 | if (ret == 0) { | |
845 | ath10k_warn("suspend timed out - target pause event never came\n"); | |
846 | return -ETIMEDOUT; | |
847 | } | |
848 | ||
849 | return 0; | |
850 | } | |
851 | ||
dd30a36e MK |
852 | void ath10k_core_stop(struct ath10k *ar) |
853 | { | |
60631c5c KV |
854 | lockdep_assert_held(&ar->conf_mutex); |
855 | ||
00f5482b | 856 | /* try to suspend target */ |
216a1836 MK |
857 | if (ar->state != ATH10K_STATE_RESTARTING) |
858 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); | |
859 | ||
db66ea04 | 860 | ath10k_debug_stop(ar); |
dd30a36e | 861 | ath10k_htc_stop(&ar->htc); |
95bf21f9 MK |
862 | ath10k_hif_stop(ar); |
863 | ath10k_htt_tx_free(&ar->htt); | |
864 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
865 | ath10k_wmi_detach(ar); |
866 | } | |
818bdd16 MK |
867 | EXPORT_SYMBOL(ath10k_core_stop); |
868 | ||
869 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
870 | * order to know what hw capabilities should be advertised to mac80211 it is | |
871 | * necessary to load the firmware (and tear it down immediately since start | |
872 | * hook will try to init it again) before registering */ | |
873 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
874 | { | |
29385057 MK |
875 | struct bmi_target_info target_info; |
876 | int ret = 0; | |
818bdd16 MK |
877 | |
878 | ret = ath10k_hif_power_up(ar); | |
879 | if (ret) { | |
880 | ath10k_err("could not start pci hif (%d)\n", ret); | |
881 | return ret; | |
882 | } | |
883 | ||
29385057 MK |
884 | memset(&target_info, 0, sizeof(target_info)); |
885 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
886 | if (ret) { | |
887 | ath10k_err("could not get target info (%d)\n", ret); | |
888 | ath10k_hif_power_down(ar); | |
889 | return ret; | |
890 | } | |
891 | ||
892 | ar->target_version = target_info.version; | |
893 | ar->hw->wiphy->hw_version = target_info.version; | |
894 | ||
895 | ret = ath10k_init_hw_params(ar); | |
896 | if (ret) { | |
897 | ath10k_err("could not get hw params (%d)\n", ret); | |
898 | ath10k_hif_power_down(ar); | |
899 | return ret; | |
900 | } | |
901 | ||
902 | ret = ath10k_core_fetch_firmware_files(ar); | |
903 | if (ret) { | |
904 | ath10k_err("could not fetch firmware files (%d)\n", ret); | |
905 | ath10k_hif_power_down(ar); | |
906 | return ret; | |
907 | } | |
908 | ||
60631c5c KV |
909 | mutex_lock(&ar->conf_mutex); |
910 | ||
818bdd16 MK |
911 | ret = ath10k_core_start(ar); |
912 | if (ret) { | |
913 | ath10k_err("could not init core (%d)\n", ret); | |
29385057 | 914 | ath10k_core_free_firmware_files(ar); |
818bdd16 | 915 | ath10k_hif_power_down(ar); |
60631c5c | 916 | mutex_unlock(&ar->conf_mutex); |
818bdd16 MK |
917 | return ret; |
918 | } | |
919 | ||
920 | ath10k_core_stop(ar); | |
60631c5c KV |
921 | |
922 | mutex_unlock(&ar->conf_mutex); | |
923 | ||
818bdd16 MK |
924 | ath10k_hif_power_down(ar); |
925 | return 0; | |
926 | } | |
dd30a36e | 927 | |
e01ae68c KV |
928 | static int ath10k_core_check_chip_id(struct ath10k *ar) |
929 | { | |
930 | u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV); | |
931 | ||
effea968 KV |
932 | ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n", |
933 | ar->chip_id, hw_revision); | |
934 | ||
e01ae68c KV |
935 | /* Check that we are not using hw1.0 (some of them have same pci id |
936 | * as hw2.0) before doing anything else as ath10k crashes horribly | |
937 | * due to missing hw1.0 workarounds. */ | |
938 | switch (hw_revision) { | |
939 | case QCA988X_HW_1_0_CHIP_ID_REV: | |
940 | ath10k_err("ERROR: qca988x hw1.0 is not supported\n"); | |
941 | return -EOPNOTSUPP; | |
942 | ||
943 | case QCA988X_HW_2_0_CHIP_ID_REV: | |
944 | /* known hardware revision, continue normally */ | |
945 | return 0; | |
946 | ||
947 | default: | |
948 | ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n", | |
949 | ar->chip_id); | |
950 | return 0; | |
951 | } | |
952 | ||
953 | return 0; | |
954 | } | |
955 | ||
6782cb69 | 956 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 957 | { |
6782cb69 | 958 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
959 | int status; |
960 | ||
818bdd16 MK |
961 | status = ath10k_core_probe_fw(ar); |
962 | if (status) { | |
963 | ath10k_err("could not probe fw (%d)\n", status); | |
6782cb69 | 964 | goto err; |
818bdd16 | 965 | } |
dd30a36e | 966 | |
5e3dd157 | 967 | status = ath10k_mac_register(ar); |
818bdd16 MK |
968 | if (status) { |
969 | ath10k_err("could not register to mac80211 (%d)\n", status); | |
29385057 | 970 | goto err_release_fw; |
818bdd16 | 971 | } |
5e3dd157 KV |
972 | |
973 | status = ath10k_debug_create(ar); | |
974 | if (status) { | |
975 | ath10k_err("unable to initialize debugfs\n"); | |
976 | goto err_unregister_mac; | |
977 | } | |
978 | ||
6782cb69 MK |
979 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
980 | return; | |
5e3dd157 KV |
981 | |
982 | err_unregister_mac: | |
983 | ath10k_mac_unregister(ar); | |
29385057 MK |
984 | err_release_fw: |
985 | ath10k_core_free_firmware_files(ar); | |
6782cb69 MK |
986 | err: |
987 | device_release_driver(ar->dev); | |
988 | return; | |
989 | } | |
990 | ||
991 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
992 | { | |
993 | int status; | |
994 | ||
995 | ar->chip_id = chip_id; | |
996 | ||
997 | status = ath10k_core_check_chip_id(ar); | |
998 | if (status) { | |
999 | ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id); | |
1000 | return status; | |
1001 | } | |
1002 | ||
1003 | queue_work(ar->workqueue, &ar->register_work); | |
1004 | ||
1005 | return 0; | |
5e3dd157 KV |
1006 | } |
1007 | EXPORT_SYMBOL(ath10k_core_register); | |
1008 | ||
1009 | void ath10k_core_unregister(struct ath10k *ar) | |
1010 | { | |
6782cb69 MK |
1011 | cancel_work_sync(&ar->register_work); |
1012 | ||
1013 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1014 | return; | |
1015 | ||
5e3dd157 KV |
1016 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1017 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1018 | * unhappy about callback failures. */ | |
1019 | ath10k_mac_unregister(ar); | |
db66ea04 | 1020 | |
29385057 | 1021 | ath10k_core_free_firmware_files(ar); |
6f1f56ea BG |
1022 | |
1023 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1024 | } |
1025 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1026 | ||
0d0a6939 MK |
1027 | struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, |
1028 | const struct ath10k_hif_ops *hif_ops) | |
1029 | { | |
1030 | struct ath10k *ar; | |
1031 | ||
1032 | ar = ath10k_mac_create(); | |
1033 | if (!ar) | |
1034 | return NULL; | |
1035 | ||
1036 | ar->ath_common.priv = ar; | |
1037 | ar->ath_common.hw = ar->hw; | |
1038 | ||
1039 | ar->p2p = !!ath10k_p2p; | |
1040 | ar->dev = dev; | |
1041 | ||
1042 | ar->hif.priv = hif_priv; | |
1043 | ar->hif.ops = hif_ops; | |
1044 | ||
1045 | init_completion(&ar->scan.started); | |
1046 | init_completion(&ar->scan.completed); | |
1047 | init_completion(&ar->scan.on_channel); | |
1048 | init_completion(&ar->target_suspend); | |
1049 | ||
1050 | init_completion(&ar->install_key_done); | |
1051 | init_completion(&ar->vdev_setup_done); | |
1052 | ||
1053 | setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar); | |
1054 | ||
1055 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1056 | if (!ar->workqueue) | |
1057 | goto err_wq; | |
1058 | ||
1059 | mutex_init(&ar->conf_mutex); | |
1060 | spin_lock_init(&ar->data_lock); | |
1061 | ||
1062 | INIT_LIST_HEAD(&ar->peers); | |
1063 | init_waitqueue_head(&ar->peer_mapping_wq); | |
1064 | ||
1065 | init_completion(&ar->offchan_tx_completed); | |
1066 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1067 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1068 | ||
1069 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1070 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1071 | ||
6782cb69 | 1072 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1073 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1074 | ||
1075 | return ar; | |
1076 | ||
1077 | err_wq: | |
1078 | ath10k_mac_destroy(ar); | |
1079 | return NULL; | |
1080 | } | |
1081 | EXPORT_SYMBOL(ath10k_core_create); | |
1082 | ||
1083 | void ath10k_core_destroy(struct ath10k *ar) | |
1084 | { | |
1085 | flush_workqueue(ar->workqueue); | |
1086 | destroy_workqueue(ar->workqueue); | |
1087 | ||
1088 | ath10k_mac_destroy(ar); | |
1089 | } | |
1090 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1091 | ||
5e3dd157 KV |
1092 | MODULE_AUTHOR("Qualcomm Atheros"); |
1093 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1094 | MODULE_LICENSE("Dual BSD/GPL"); |