[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / htt_tx.c

/*
 * Copyright (c) 2005-2011 Atheros Communications Inc.
 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/etherdevice.h>
#include "htt.h"
#include "mac.h"
#include "hif.h"
#include "txrx.h"
#include "debug.h"

void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
{
	htt->num_pending_tx--;
	if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
		ieee80211_wake_queues(htt->ar->hw);
}

static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
{
	spin_lock_bh(&htt->tx_lock);
	__ath10k_htt_tx_dec_pending(htt);
	spin_unlock_bh(&htt->tx_lock);
}

static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
{
	int ret = 0;

	spin_lock_bh(&htt->tx_lock);

	if (htt->num_pending_tx >= htt->max_num_pending_tx) {
		ret = -EBUSY;
		goto exit;
	}

	htt->num_pending_tx++;
	if (htt->num_pending_tx == htt->max_num_pending_tx)
		ieee80211_stop_queues(htt->ar->hw);

exit:
	spin_unlock_bh(&htt->tx_lock);
	return ret;
}

int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
{
	int msdu_id;

	lockdep_assert_held(&htt->tx_lock);

	msdu_id = find_first_zero_bit(htt->used_msdu_ids,
				      htt->max_num_pending_tx);
	if (msdu_id == htt->max_num_pending_tx)
		return -ENOBUFS;

	ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
	__set_bit(msdu_id, htt->used_msdu_ids);
	return msdu_id;
}

void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
{
	lockdep_assert_held(&htt->tx_lock);

	if (!test_bit(msdu_id, htt->used_msdu_ids))
		ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);

	ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
	__clear_bit(msdu_id, htt->used_msdu_ids);
}

int ath10k_htt_tx_attach(struct ath10k_htt *htt)
{
	u8 pipe;

	spin_lock_init(&htt->tx_lock);
	init_waitqueue_head(&htt->empty_tx_wq);

	/* At the beginning free queue number should hint us the maximum
	 * queue length */
	pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
	htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
								   pipe);

	ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
		   htt->max_num_pending_tx);

	htt->pending_tx = kzalloc(sizeof(*htt->pending_tx) *
				  htt->max_num_pending_tx, GFP_KERNEL);
	if (!htt->pending_tx)
		return -ENOMEM;

	htt->used_msdu_ids = kzalloc(sizeof(unsigned long) *
				     BITS_TO_LONGS(htt->max_num_pending_tx),
				     GFP_KERNEL);
	if (!htt->used_msdu_ids) {
		kfree(htt->pending_tx);
		return -ENOMEM;
	}

	return 0;
}

static void ath10k_htt_tx_cleanup_pending(struct ath10k_htt *htt)
{
	struct htt_tx_done tx_done = {0};
	int msdu_id;

	/* No locks needed. Called after communication with the device has
	 * been stopped. */

	for (msdu_id = 0; msdu_id < htt->max_num_pending_tx; msdu_id++) {
		if (!test_bit(msdu_id, htt->used_msdu_ids))
			continue;

		ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
			   msdu_id);

		tx_done.discard = 1;
		tx_done.msdu_id = msdu_id;

		ath10k_txrx_tx_unref(htt, &tx_done);
	}
}

void ath10k_htt_tx_detach(struct ath10k_htt *htt)
{
	ath10k_htt_tx_cleanup_pending(htt);
	kfree(htt->pending_tx);
	kfree(htt->used_msdu_ids);
	return;
}

void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
{
	dev_kfree_skb_any(skb);
}

int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
{
	struct sk_buff *skb;
	struct htt_cmd *cmd;
	int len = 0;
	int ret;

	len += sizeof(cmd->hdr);
	len += sizeof(cmd->ver_req);

	skb = ath10k_htc_alloc_skb(len);
	if (!skb)
		return -ENOMEM;

	skb_put(skb, len);
	cmd = (struct htt_cmd *)skb->data;
	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ;

	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
	if (ret) {
		dev_kfree_skb_any(skb);
		return ret;
	}

	return 0;
}

int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
{
	struct htt_stats_req *req;
	struct sk_buff *skb;
	struct htt_cmd *cmd;
	int len = 0, ret;

	len += sizeof(cmd->hdr);
	len += sizeof(cmd->stats_req);

	skb = ath10k_htc_alloc_skb(len);
	if (!skb)
		return -ENOMEM;

	skb_put(skb, len);
	cmd = (struct htt_cmd *)skb->data;
	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_STATS_REQ;

	req = &cmd->stats_req;

	memset(req, 0, sizeof(*req));

	/* currently we support only max 8 bit masks so no need to worry
	 * about endian support */
	req->upload_types[0] = mask;
	req->reset_types[0] = mask;
	req->stat_type = HTT_STATS_REQ_CFG_STAT_TYPE_INVALID;
	req->cookie_lsb = cpu_to_le32(cookie & 0xffffffff);
	req->cookie_msb = cpu_to_le32((cookie & 0xffffffff00000000ULL) >> 32);

	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
	if (ret) {
		ath10k_warn("failed to send htt type stats request: %d", ret);
		dev_kfree_skb_any(skb);
		return ret;
	}

	return 0;
}

int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
{
	struct sk_buff *skb;
	struct htt_cmd *cmd;
	struct htt_rx_ring_setup_ring *ring;
	const int num_rx_ring = 1;
	u16 flags;
	u32 fw_idx;
	int len;
	int ret;

	/*
	 * the HW expects the buffer to be an integral number of 4-byte
	 * "words"
	 */
	BUILD_BUG_ON(!IS_ALIGNED(HTT_RX_BUF_SIZE, 4));
	BUILD_BUG_ON((HTT_RX_BUF_SIZE & HTT_MAX_CACHE_LINE_SIZE_MASK) != 0);

	len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
	    + (sizeof(*ring) * num_rx_ring);
	skb = ath10k_htc_alloc_skb(len);
	if (!skb)
		return -ENOMEM;

	skb_put(skb, len);

	cmd = (struct htt_cmd *)skb->data;
	ring = &cmd->rx_setup.rings[0];

	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG;
	cmd->rx_setup.hdr.num_rings = 1;

	/* FIXME: do we need all of this? */
	flags = 0;
	flags |= HTT_RX_RING_FLAGS_MAC80211_HDR;
	flags |= HTT_RX_RING_FLAGS_MSDU_PAYLOAD;
	flags |= HTT_RX_RING_FLAGS_PPDU_START;
	flags |= HTT_RX_RING_FLAGS_PPDU_END;
	flags |= HTT_RX_RING_FLAGS_MPDU_START;
	flags |= HTT_RX_RING_FLAGS_MPDU_END;
	flags |= HTT_RX_RING_FLAGS_MSDU_START;
	flags |= HTT_RX_RING_FLAGS_MSDU_END;
	flags |= HTT_RX_RING_FLAGS_RX_ATTENTION;
	flags |= HTT_RX_RING_FLAGS_FRAG_INFO;
	flags |= HTT_RX_RING_FLAGS_UNICAST_RX;
	flags |= HTT_RX_RING_FLAGS_MULTICAST_RX;
	flags |= HTT_RX_RING_FLAGS_CTRL_RX;
	flags |= HTT_RX_RING_FLAGS_MGMT_RX;
	flags |= HTT_RX_RING_FLAGS_NULL_RX;
	flags |= HTT_RX_RING_FLAGS_PHY_DATA_RX;

	fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);

	ring->fw_idx_shadow_reg_paddr =
		__cpu_to_le32(htt->rx_ring.alloc_idx.paddr);
	ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr);
	ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size);
	ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE);
	ring->flags = __cpu_to_le16(flags);
	ring->fw_idx_init_val = __cpu_to_le16(fw_idx);

#define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4)

	ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
	ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
	ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
	ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
	ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
	ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
	ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
	ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
	ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
	ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));

#undef desc_offset

	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
	if (ret) {
		dev_kfree_skb_any(skb);
		return ret;
	}

	return 0;
}

int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
{
	struct device *dev = htt->ar->dev;
	struct sk_buff *txdesc = NULL;
	struct htt_cmd *cmd;
	u8 vdev_id = ATH10K_SKB_CB(msdu)->htt.vdev_id;
	int len = 0;
	int msdu_id = -1;
	int res;


	res = ath10k_htt_tx_inc_pending(htt);
	if (res)
		goto err;

	len += sizeof(cmd->hdr);
	len += sizeof(cmd->mgmt_tx);

	spin_lock_bh(&htt->tx_lock);
	res = ath10k_htt_tx_alloc_msdu_id(htt);
	if (res < 0) {
		spin_unlock_bh(&htt->tx_lock);
		goto err_tx_dec;
	}
	msdu_id = res;
	htt->pending_tx[msdu_id] = msdu;
	spin_unlock_bh(&htt->tx_lock);

	txdesc = ath10k_htc_alloc_skb(len);
	if (!txdesc) {
		res = -ENOMEM;
		goto err_free_msdu_id;
	}

	res = ath10k_skb_map(dev, msdu);
	if (res)
		goto err_free_txdesc;

	skb_put(txdesc, len);
	cmd = (struct htt_cmd *)txdesc->data;
	cmd->hdr.msg_type         = HTT_H2T_MSG_TYPE_MGMT_TX;
	cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
	cmd->mgmt_tx.len        = __cpu_to_le32(msdu->len);
	cmd->mgmt_tx.desc_id    = __cpu_to_le32(msdu_id);
	cmd->mgmt_tx.vdev_id    = __cpu_to_le32(vdev_id);
	memcpy(cmd->mgmt_tx.hdr, msdu->data,
	       min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN));

	res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
	if (res)
		goto err_unmap_msdu;

	return 0;

err_unmap_msdu:
	ath10k_skb_unmap(dev, msdu);
err_free_txdesc:
	dev_kfree_skb_any(txdesc);
err_free_msdu_id:
	spin_lock_bh(&htt->tx_lock);
	htt->pending_tx[msdu_id] = NULL;
	ath10k_htt_tx_free_msdu_id(htt, msdu_id);
	spin_unlock_bh(&htt->tx_lock);
err_tx_dec:
	ath10k_htt_tx_dec_pending(htt);
err:
	return res;
}

int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
{
	struct device *dev = htt->ar->dev;
	struct htt_cmd *cmd;
	struct htt_data_tx_desc_frag *tx_frags;
	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
	struct sk_buff *txdesc = NULL;
	struct sk_buff *txfrag = NULL;
	bool use_frags;
	u8 vdev_id = ATH10K_SKB_CB(msdu)->htt.vdev_id;
	u8 tid;
	int prefetch_len, desc_len, frag_len;
	dma_addr_t frags_paddr;
	int msdu_id = -1;
	int res;
	u8 flags0;
	u16 flags1;

	res = ath10k_htt_tx_inc_pending(htt);
	if (res)
		goto err;

	spin_lock_bh(&htt->tx_lock);
	res = ath10k_htt_tx_alloc_msdu_id(htt);
	if (res < 0) {
		spin_unlock_bh(&htt->tx_lock);
		goto err_tx_dec;
	}
	msdu_id = res;
	htt->pending_tx[msdu_id] = msdu;
	spin_unlock_bh(&htt->tx_lock);

	prefetch_len = min(htt->prefetch_len, msdu->len);
	prefetch_len = roundup(prefetch_len, 4);

	desc_len = sizeof(cmd->hdr) + sizeof(cmd->data_tx) + prefetch_len;
	frag_len = sizeof(*tx_frags) * 2;

	txdesc = ath10k_htc_alloc_skb(desc_len);
	if (!txdesc) {
		res = -ENOMEM;
		goto err_free_msdu_id;
	}

	/* Since HTT 3.0 there is no separate mgmt tx command. However in case
	 * of mgmt tx using TX_FRM there is not tx fragment list. Instead of tx
	 * fragment list host driver specifies directly frame pointer. */
	use_frags = htt->target_version_major < 3 ||
		    !ieee80211_is_mgmt(hdr->frame_control);

	if (use_frags) {
		txfrag = dev_alloc_skb(frag_len);
		if (!txfrag) {
			res = -ENOMEM;
			goto err_free_txdesc;
		}
	}

	if (!IS_ALIGNED((unsigned long)txdesc->data, 4)) {
		ath10k_warn("htt alignment check failed. dropping packet.\n");
		res = -EIO;
		goto err_free_txfrag;
	}

	res = ath10k_skb_map(dev, msdu);
	if (res)
		goto err_free_txfrag;

	if (use_frags) {
		/* tx fragment list must be terminated with zero-entry */
		skb_put(txfrag, frag_len);
		tx_frags = (struct htt_data_tx_desc_frag *)txfrag->data;
		tx_frags[0].paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
		tx_frags[0].len   = __cpu_to_le32(msdu->len);
		tx_frags[1].paddr = __cpu_to_le32(0);
		tx_frags[1].len   = __cpu_to_le32(0);

		res = ath10k_skb_map(dev, txfrag);
		if (res)
			goto err_unmap_msdu;

		ath10k_dbg(ATH10K_DBG_HTT, "txfrag 0x%llx\n",
			   (unsigned long long) ATH10K_SKB_CB(txfrag)->paddr);
		ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "txfrag: ",
				txfrag->data, frag_len);
	}

	ath10k_dbg(ATH10K_DBG_HTT, "msdu 0x%llx\n",
		   (unsigned long long) ATH10K_SKB_CB(msdu)->paddr);
	ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "msdu: ",
			msdu->data, msdu->len);

	skb_put(txdesc, desc_len);
	cmd = (struct htt_cmd *)txdesc->data;

	tid = ATH10K_SKB_CB(msdu)->htt.tid;

	ath10k_dbg(ATH10K_DBG_HTT, "htt data tx using tid %hhu\n", tid);

	flags0  = 0;
	if (!ieee80211_has_protected(hdr->frame_control))
		flags0 |= HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT;
	flags0 |= HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT;

	if (use_frags)
		flags0 |= SM(ATH10K_HW_TXRX_NATIVE_WIFI,
			     HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
	else
		flags0 |= SM(ATH10K_HW_TXRX_MGMT,
			     HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);

	flags1  = 0;
	flags1 |= SM((u16)vdev_id, HTT_DATA_TX_DESC_FLAGS1_VDEV_ID);
	flags1 |= SM((u16)tid, HTT_DATA_TX_DESC_FLAGS1_EXT_TID);
	flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD;
	flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD;

	if (use_frags)
		frags_paddr = ATH10K_SKB_CB(txfrag)->paddr;
	else
		frags_paddr = ATH10K_SKB_CB(msdu)->paddr;

	cmd->hdr.msg_type        = HTT_H2T_MSG_TYPE_TX_FRM;
	cmd->data_tx.flags0      = flags0;
	cmd->data_tx.flags1      = __cpu_to_le16(flags1);
	cmd->data_tx.len         = __cpu_to_le16(msdu->len);
	cmd->data_tx.id          = __cpu_to_le16(msdu_id);
	cmd->data_tx.frags_paddr = __cpu_to_le32(frags_paddr);
	cmd->data_tx.peerid      = __cpu_to_le32(HTT_INVALID_PEERID);

	memcpy(cmd->data_tx.prefetch, msdu->data, prefetch_len);

	res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
	if (res)
		goto err_restore;

	return 0;

err_restore:
	if (use_frags)
		ath10k_skb_unmap(dev, txfrag);
err_unmap_msdu:
	ath10k_skb_unmap(dev, msdu);
err_free_txfrag:
	if (use_frags)
		dev_kfree_skb_any(txfrag);
err_free_txdesc:
	dev_kfree_skb_any(txdesc);
err_free_msdu_id:
	spin_lock_bh(&htt->tx_lock);
	htt->pending_tx[msdu_id] = NULL;
	ath10k_htt_tx_free_msdu_id(htt, msdu_id);
	spin_unlock_bh(&htt->tx_lock);
err_tx_dec:
	ath10k_htt_tx_dec_pending(htt);
err:
	return res;
}
Commit	Line	Data
5e3dd157 KV	1	/*
	2	* Copyright (c) 2005-2011 Atheros Communications Inc.
	3	* Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
	4	*
	5	* Permission to use, copy, modify, and/or distribute this software for any
	6	* purpose with or without fee is hereby granted, provided that the above
	7	* copyright notice and this permission notice appear in all copies.
	8	*
	9	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	10	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	11	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	12	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	13	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	14	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	15	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	16	*/
	17
	18	#include <linux/etherdevice.h>
	19	#include "htt.h"
	20	#include "mac.h"
	21	#include "hif.h"
	22	#include "txrx.h"
	23	#include "debug.h"
	24
	25	void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
	26	{
	27	htt->num_pending_tx--;
	28	if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
	29	ieee80211_wake_queues(htt->ar->hw);
	30	}
	31
	32	static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
	33	{
	34	spin_lock_bh(&htt->tx_lock);
	35	__ath10k_htt_tx_dec_pending(htt);
	36	spin_unlock_bh(&htt->tx_lock);
	37	}
	38
	39	static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
	40	{
	41	int ret = 0;
	42
	43	spin_lock_bh(&htt->tx_lock);
	44
	45	if (htt->num_pending_tx >= htt->max_num_pending_tx) {
	46	ret = -EBUSY;
	47	goto exit;
	48	}
	49
	50	htt->num_pending_tx++;
	51	if (htt->num_pending_tx == htt->max_num_pending_tx)
	52	ieee80211_stop_queues(htt->ar->hw);
	53
	54	exit:
	55	spin_unlock_bh(&htt->tx_lock);
	56	return ret;
	57	}
	58
	59	int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
	60	{
	61	int msdu_id;
	62
	63	lockdep_assert_held(&htt->tx_lock);
	64
65	msdu_id = find_first_zero_bit(htt->used_msdu_ids,
66	htt->max_num_pending_tx);
67	if (msdu_id == htt->max_num_pending_tx)
68	return -ENOBUFS;
69
70	ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
71	__set_bit(msdu_id, htt->used_msdu_ids);
72	return msdu_id;
73	}
74
75	void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
76	{
77	lockdep_assert_held(&htt->tx_lock);
78
79	if (!test_bit(msdu_id, htt->used_msdu_ids))
80	ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);
81
82	ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
83	__clear_bit(msdu_id, htt->used_msdu_ids);
84	}
85
86	int ath10k_htt_tx_attach(struct ath10k_htt *htt)
87	{
88	u8 pipe;
89
90	spin_lock_init(&htt->tx_lock);
91	init_waitqueue_head(&htt->empty_tx_wq);
92
93	/* At the beginning free queue number should hint us the maximum
94	* queue length */
cd003fad	95	pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
5e3dd157 KV	96	htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
	97	pipe);
	98
aad0b65f	99	ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
5e3dd157 KV	100	htt->max_num_pending_tx);
	101
	102	htt->pending_tx = kzalloc(sizeof(htt->pending_tx)
	103	htt->max_num_pending_tx, GFP_KERNEL);
	104	if (!htt->pending_tx)
	105	return -ENOMEM;
	106
	107	htt->used_msdu_ids = kzalloc(sizeof(unsigned long) *
	108	BITS_TO_LONGS(htt->max_num_pending_tx),
	109	GFP_KERNEL);
	110	if (!htt->used_msdu_ids) {
	111	kfree(htt->pending_tx);
	112	return -ENOMEM;
	113	}
	114
	115	return 0;
	116	}
	117
	118	static void ath10k_htt_tx_cleanup_pending(struct ath10k_htt *htt)
	119	{
0a89f8a0	120	struct htt_tx_done tx_done = {0};
5e3dd157 KV	121	int msdu_id;
	122
	123	/* No locks needed. Called after communication with the device has
	124	* been stopped. */
	125
	126	for (msdu_id = 0; msdu_id < htt->max_num_pending_tx; msdu_id++) {
	127	if (!test_bit(msdu_id, htt->used_msdu_ids))
	128	continue;
	129
5e3dd157 KV	130	ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
	131	msdu_id);
	132
0a89f8a0 MK	133	tx_done.discard = 1;
0a89f8a0 MK	134	tx_done.msdu_id = msdu_id;
5e3dd157	135
0a89f8a0	136	ath10k_txrx_tx_unref(htt, &tx_done);
5e3dd157 KV	137	}
	138	}
	139
	140	void ath10k_htt_tx_detach(struct ath10k_htt *htt)
	141	{
	142	ath10k_htt_tx_cleanup_pending(htt);
	143	kfree(htt->pending_tx);
	144	kfree(htt->used_msdu_ids);
	145	return;
	146	}
	147
	148	void ath10k_htt_htc_tx_complete(struct ath10k ar, struct sk_buff skb)
	149	{
0a89f8a0	150	dev_kfree_skb_any(skb);
5e3dd157 KV	151	}
	152
	153	int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
	154	{
	155	struct sk_buff *skb;
	156	struct htt_cmd *cmd;
	157	int len = 0;
	158	int ret;
	159
	160	len += sizeof(cmd->hdr);
	161	len += sizeof(cmd->ver_req);
	162
	163	skb = ath10k_htc_alloc_skb(len);
	164	if (!skb)
	165	return -ENOMEM;
	166
	167	skb_put(skb, len);
	168	cmd = (struct htt_cmd *)skb->data;
	169	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ;
	170
cd003fad	171	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
5e3dd157 KV	172	if (ret) {
	173	dev_kfree_skb_any(skb);
	174	return ret;
	175	}
	176
	177	return 0;
	178	}
	179
a3d135e5 KV	180	int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
	181	{
	182	struct htt_stats_req *req;
	183	struct sk_buff *skb;
	184	struct htt_cmd *cmd;
	185	int len = 0, ret;
	186
	187	len += sizeof(cmd->hdr);
	188	len += sizeof(cmd->stats_req);
	189
	190	skb = ath10k_htc_alloc_skb(len);
	191	if (!skb)
	192	return -ENOMEM;
	193
	194	skb_put(skb, len);
	195	cmd = (struct htt_cmd *)skb->data;
	196	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_STATS_REQ;
	197
	198	req = &cmd->stats_req;
	199
	200	memset(req, 0, sizeof(*req));
	201
	202	/* currently we support only max 8 bit masks so no need to worry
	203	* about endian support */
	204	req->upload_types[0] = mask;
	205	req->reset_types[0] = mask;
	206	req->stat_type = HTT_STATS_REQ_CFG_STAT_TYPE_INVALID;
	207	req->cookie_lsb = cpu_to_le32(cookie & 0xffffffff);
	208	req->cookie_msb = cpu_to_le32((cookie & 0xffffffff00000000ULL) >> 32);
	209
a3d135e5 KV	210	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
	211	if (ret) {
	212	ath10k_warn("failed to send htt type stats request: %d", ret);
	213	dev_kfree_skb_any(skb);
	214	return ret;
	215	}
	216
	217	return 0;
	218	}
	219
5e3dd157 KV	220	int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
	221	{
	222	struct sk_buff *skb;
	223	struct htt_cmd *cmd;
	224	struct htt_rx_ring_setup_ring *ring;
	225	const int num_rx_ring = 1;
	226	u16 flags;
	227	u32 fw_idx;
	228	int len;
	229	int ret;
	230
	231	/*
	232	* the HW expects the buffer to be an integral number of 4-byte
	233	* "words"
	234	*/
	235	BUILD_BUG_ON(!IS_ALIGNED(HTT_RX_BUF_SIZE, 4));
	236	BUILD_BUG_ON((HTT_RX_BUF_SIZE & HTT_MAX_CACHE_LINE_SIZE_MASK) != 0);
	237
	238	len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
	239	+ (sizeof(ring) num_rx_ring);
	240	skb = ath10k_htc_alloc_skb(len);
	241	if (!skb)
	242	return -ENOMEM;
	243
	244	skb_put(skb, len);
	245
	246	cmd = (struct htt_cmd *)skb->data;
	247	ring = &cmd->rx_setup.rings[0];
	248
	249	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG;
	250	cmd->rx_setup.hdr.num_rings = 1;
	251
	252	/* FIXME: do we need all of this? */
	253	flags = 0;
	254	flags \|= HTT_RX_RING_FLAGS_MAC80211_HDR;
	255	flags \|= HTT_RX_RING_FLAGS_MSDU_PAYLOAD;
	256	flags \|= HTT_RX_RING_FLAGS_PPDU_START;
	257	flags \|= HTT_RX_RING_FLAGS_PPDU_END;
	258	flags \|= HTT_RX_RING_FLAGS_MPDU_START;
	259	flags \|= HTT_RX_RING_FLAGS_MPDU_END;
	260	flags \|= HTT_RX_RING_FLAGS_MSDU_START;
	261	flags \|= HTT_RX_RING_FLAGS_MSDU_END;
	262	flags \|= HTT_RX_RING_FLAGS_RX_ATTENTION;
	263	flags \|= HTT_RX_RING_FLAGS_FRAG_INFO;
	264	flags \|= HTT_RX_RING_FLAGS_UNICAST_RX;
	265	flags \|= HTT_RX_RING_FLAGS_MULTICAST_RX;
	266	flags \|= HTT_RX_RING_FLAGS_CTRL_RX;
	267	flags \|= HTT_RX_RING_FLAGS_MGMT_RX;
	268	flags \|= HTT_RX_RING_FLAGS_NULL_RX;
	269	flags \|= HTT_RX_RING_FLAGS_PHY_DATA_RX;
	270
	271	fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
	272
	273	ring->fw_idx_shadow_reg_paddr =
	274	__cpu_to_le32(htt->rx_ring.alloc_idx.paddr);
	275	ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr);
	276	ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size);
	277	ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE);
	278	ring->flags = __cpu_to_le16(flags);
	279	ring->fw_idx_init_val = __cpu_to_le16(fw_idx);
	280
	281	#define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4)
	282
	283	ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
284	ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
285	ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
286	ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
287	ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
288	ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
289	ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
290	ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
291	ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
292	ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));
293
294	#undef desc_offset
295
cd003fad	296	ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
5e3dd157 KV	297	if (ret) {
	298	dev_kfree_skb_any(skb);
	299	return ret;
	300	}
	301
	302	return 0;
	303	}
	304
	305	int ath10k_htt_mgmt_tx(struct ath10k_htt htt, struct sk_buff msdu)
	306	{
	307	struct device *dev = htt->ar->dev;
5e3dd157 KV	308	struct sk_buff *txdesc = NULL;
	309	struct htt_cmd *cmd;
	310	u8 vdev_id = ATH10K_SKB_CB(msdu)->htt.vdev_id;
	311	int len = 0;
	312	int msdu_id = -1;
	313	int res;
	314
	315
	316	res = ath10k_htt_tx_inc_pending(htt);
	317	if (res)
2f3773bc	318	goto err;
5e3dd157 KV	319
	320	len += sizeof(cmd->hdr);
	321	len += sizeof(cmd->mgmt_tx);
	322
5e3dd157	323	spin_lock_bh(&htt->tx_lock);
2f3773bc MK	324	res = ath10k_htt_tx_alloc_msdu_id(htt);
2f3773bc MK	325	if (res < 0) {
5e3dd157	326	spin_unlock_bh(&htt->tx_lock);
2f3773bc	327	goto err_tx_dec;
5e3dd157	328	}
2f3773bc	329	msdu_id = res;
0a89f8a0	330	htt->pending_tx[msdu_id] = msdu;
5e3dd157 KV	331	spin_unlock_bh(&htt->tx_lock);
5e3dd157 KV	332
2f3773bc MK	333	txdesc = ath10k_htc_alloc_skb(len);
	334	if (!txdesc) {
	335	res = -ENOMEM;
	336	goto err_free_msdu_id;
	337	}
	338
5e3dd157 KV	339	res = ath10k_skb_map(dev, msdu);
5e3dd157 KV	340	if (res)
2f3773bc	341	goto err_free_txdesc;
5e3dd157 KV	342
	343	skb_put(txdesc, len);
	344	cmd = (struct htt_cmd *)txdesc->data;
	345	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_MGMT_TX;
	346	cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
	347	cmd->mgmt_tx.len = __cpu_to_le32(msdu->len);
	348	cmd->mgmt_tx.desc_id = __cpu_to_le32(msdu_id);
	349	cmd->mgmt_tx.vdev_id = __cpu_to_le32(vdev_id);
	350	memcpy(cmd->mgmt_tx.hdr, msdu->data,
	351	min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN));
	352
cd003fad	353	res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
5e3dd157	354	if (res)
2f3773bc	355	goto err_unmap_msdu;
5e3dd157 KV	356
	357	return 0;
	358
2f3773bc	359	err_unmap_msdu:
5e3dd157	360	ath10k_skb_unmap(dev, msdu);
2f3773bc MK	361	err_free_txdesc:
	362	dev_kfree_skb_any(txdesc);
	363	err_free_msdu_id:
	364	spin_lock_bh(&htt->tx_lock);
	365	htt->pending_tx[msdu_id] = NULL;
	366	ath10k_htt_tx_free_msdu_id(htt, msdu_id);
	367	spin_unlock_bh(&htt->tx_lock);
	368	err_tx_dec:
5e3dd157	369	ath10k_htt_tx_dec_pending(htt);
2f3773bc	370	err:
5e3dd157 KV	371	return res;
	372	}
	373
	374	int ath10k_htt_tx(struct ath10k_htt htt, struct sk_buff msdu)
	375	{
	376	struct device *dev = htt->ar->dev;
	377	struct htt_cmd *cmd;
	378	struct htt_data_tx_desc_frag *tx_frags;
	379	struct ieee80211_hdr hdr = (struct ieee80211_hdr )msdu->data;
5e3dd157 KV	380	struct sk_buff *txdesc = NULL;
5e3dd157 KV	381	struct sk_buff *txfrag = NULL;
2f3773bc	382	bool use_frags;
5e3dd157 KV	383	u8 vdev_id = ATH10K_SKB_CB(msdu)->htt.vdev_id;
	384	u8 tid;
	385	int prefetch_len, desc_len, frag_len;
	386	dma_addr_t frags_paddr;
	387	int msdu_id = -1;
	388	int res;
	389	u8 flags0;
	390	u16 flags1;
	391
	392	res = ath10k_htt_tx_inc_pending(htt);
	393	if (res)
2f3773bc MK	394	goto err;
	395
	396	spin_lock_bh(&htt->tx_lock);
	397	res = ath10k_htt_tx_alloc_msdu_id(htt);
	398	if (res < 0) {
	399	spin_unlock_bh(&htt->tx_lock);
	400	goto err_tx_dec;
	401	}
	402	msdu_id = res;
	403	htt->pending_tx[msdu_id] = msdu;
	404	spin_unlock_bh(&htt->tx_lock);
5e3dd157 KV	405
	406	prefetch_len = min(htt->prefetch_len, msdu->len);
	407	prefetch_len = roundup(prefetch_len, 4);
	408
	409	desc_len = sizeof(cmd->hdr) + sizeof(cmd->data_tx) + prefetch_len;
	410	frag_len = sizeof(tx_frags) 2;
	411
	412	txdesc = ath10k_htc_alloc_skb(desc_len);
	413	if (!txdesc) {
	414	res = -ENOMEM;
2f3773bc	415	goto err_free_msdu_id;
5e3dd157 KV	416	}
5e3dd157 KV	417
961d4c38 MK	418	/* Since HTT 3.0 there is no separate mgmt tx command. However in case
	419	* of mgmt tx using TX_FRM there is not tx fragment list. Instead of tx
	420	* fragment list host driver specifies directly frame pointer. */
2f3773bc MK	421	use_frags = htt->target_version_major < 3 \|\|
	422	!ieee80211_is_mgmt(hdr->frame_control);
	423
	424	if (use_frags) {
961d4c38 MK	425	txfrag = dev_alloc_skb(frag_len);
	426	if (!txfrag) {
	427	res = -ENOMEM;
2f3773bc	428	goto err_free_txdesc;
961d4c38	429	}
5e3dd157 KV	430	}
	431
	432	if (!IS_ALIGNED((unsigned long)txdesc->data, 4)) {
	433	ath10k_warn("htt alignment check failed. dropping packet.\n");
	434	res = -EIO;
2f3773bc	435	goto err_free_txfrag;
5e3dd157 KV	436	}
5e3dd157 KV	437
5e3dd157 KV	438	res = ath10k_skb_map(dev, msdu);
5e3dd157 KV	439	if (res)
2f3773bc	440	goto err_free_txfrag;
5e3dd157	441
2f3773bc	442	if (use_frags) {
961d4c38 MK	443	/* tx fragment list must be terminated with zero-entry */
	444	skb_put(txfrag, frag_len);
	445	tx_frags = (struct htt_data_tx_desc_frag *)txfrag->data;
	446	tx_frags[0].paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
	447	tx_frags[0].len = __cpu_to_le32(msdu->len);
	448	tx_frags[1].paddr = __cpu_to_le32(0);
	449	tx_frags[1].len = __cpu_to_le32(0);
	450
	451	res = ath10k_skb_map(dev, txfrag);
	452	if (res)
2f3773bc	453	goto err_unmap_msdu;
961d4c38 MK	454
	455	ath10k_dbg(ATH10K_DBG_HTT, "txfrag 0x%llx\n",
	456	(unsigned long long) ATH10K_SKB_CB(txfrag)->paddr);
	457	ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "txfrag: ",
	458	txfrag->data, frag_len);
	459	}
5e3dd157	460
961d4c38	461	ath10k_dbg(ATH10K_DBG_HTT, "msdu 0x%llx\n",
5e3dd157	462	(unsigned long long) ATH10K_SKB_CB(msdu)->paddr);
5e3dd157 KV	463	ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "msdu: ",
	464	msdu->data, msdu->len);
	465
	466	skb_put(txdesc, desc_len);
	467	cmd = (struct htt_cmd *)txdesc->data;
5e3dd157 KV	468
	469	tid = ATH10K_SKB_CB(msdu)->htt.tid;
	470
	471	ath10k_dbg(ATH10K_DBG_HTT, "htt data tx using tid %hhu\n", tid);
	472
	473	flags0 = 0;
	474	if (!ieee80211_has_protected(hdr->frame_control))
	475	flags0 \|= HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT;
	476	flags0 \|= HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT;
961d4c38	477
2f3773bc MK	478	if (use_frags)
2f3773bc MK	479	flags0 \|= SM(ATH10K_HW_TXRX_NATIVE_WIFI,
961d4c38 MK	480	HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
961d4c38 MK	481	else
2f3773bc	482	flags0 \|= SM(ATH10K_HW_TXRX_MGMT,
961d4c38	483	HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
5e3dd157 KV	484
	485	flags1 = 0;
	486	flags1 \|= SM((u16)vdev_id, HTT_DATA_TX_DESC_FLAGS1_VDEV_ID);
	487	flags1 \|= SM((u16)tid, HTT_DATA_TX_DESC_FLAGS1_EXT_TID);
7c199997 MK	488	flags1 \|= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD;
7c199997 MK	489	flags1 \|= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD;
5e3dd157	490
2f3773bc	491	if (use_frags)
961d4c38	492	frags_paddr = ATH10K_SKB_CB(txfrag)->paddr;
2f3773bc MK	493	else
2f3773bc MK	494	frags_paddr = ATH10K_SKB_CB(msdu)->paddr;
5e3dd157 KV	495
	496	cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FRM;
	497	cmd->data_tx.flags0 = flags0;
	498	cmd->data_tx.flags1 = __cpu_to_le16(flags1);
	499	cmd->data_tx.len = __cpu_to_le16(msdu->len);
	500	cmd->data_tx.id = __cpu_to_le16(msdu_id);
	501	cmd->data_tx.frags_paddr = __cpu_to_le32(frags_paddr);
	502	cmd->data_tx.peerid = __cpu_to_le32(HTT_INVALID_PEERID);
	503
	504	memcpy(cmd->data_tx.prefetch, msdu->data, prefetch_len);
	505
cd003fad	506	res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
5e3dd157	507	if (res)
2f3773bc	508	goto err_restore;
5e3dd157 KV	509
5e3dd157 KV	510	return 0;
2f3773bc MK	511
	512	err_restore:
	513	if (use_frags)
5e3dd157	514	ath10k_skb_unmap(dev, txfrag);
2f3773bc MK	515	err_unmap_msdu:
	516	ath10k_skb_unmap(dev, msdu);
	517	err_free_txfrag:
	518	if (use_frags)
5e3dd157	519	dev_kfree_skb_any(txfrag);
2f3773bc MK	520	err_free_txdesc:
	521	dev_kfree_skb_any(txdesc);
	522	err_free_msdu_id:
	523	spin_lock_bh(&htt->tx_lock);
	524	htt->pending_tx[msdu_id] = NULL;
	525	ath10k_htt_tx_free_msdu_id(htt, msdu_id);
	526	spin_unlock_bh(&htt->tx_lock);
	527	err_tx_dec:
5e3dd157	528	ath10k_htt_tx_dec_pending(htt);
2f3773bc	529	err:
5e3dd157 KV	530	return res;
5e3dd157 KV	531	}