Commit | Line | Data |
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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/skbuff.h> | |
19 | ||
20 | #include "core.h" | |
21 | #include "htc.h" | |
22 | #include "debug.h" | |
23 | #include "wmi.h" | |
24 | #include "mac.h" | |
25 | ||
26 | void ath10k_wmi_flush_tx(struct ath10k *ar) | |
27 | { | |
28 | int ret; | |
29 | ||
affd3217 MK |
30 | lockdep_assert_held(&ar->conf_mutex); |
31 | ||
32 | if (ar->state == ATH10K_STATE_WEDGED) { | |
33 | ath10k_warn("wmi flush skipped - device is wedged anyway\n"); | |
34 | return; | |
35 | } | |
36 | ||
5e3dd157 KV |
37 | ret = wait_event_timeout(ar->wmi.wq, |
38 | atomic_read(&ar->wmi.pending_tx_count) == 0, | |
39 | 5*HZ); | |
40 | if (atomic_read(&ar->wmi.pending_tx_count) == 0) | |
41 | return; | |
42 | ||
43 | if (ret == 0) | |
44 | ret = -ETIMEDOUT; | |
45 | ||
46 | if (ret < 0) | |
47 | ath10k_warn("wmi flush failed (%d)\n", ret); | |
48 | } | |
49 | ||
50 | int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) | |
51 | { | |
52 | int ret; | |
53 | ret = wait_for_completion_timeout(&ar->wmi.service_ready, | |
54 | WMI_SERVICE_READY_TIMEOUT_HZ); | |
55 | return ret; | |
56 | } | |
57 | ||
58 | int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) | |
59 | { | |
60 | int ret; | |
61 | ret = wait_for_completion_timeout(&ar->wmi.unified_ready, | |
62 | WMI_UNIFIED_READY_TIMEOUT_HZ); | |
63 | return ret; | |
64 | } | |
65 | ||
66 | static struct sk_buff *ath10k_wmi_alloc_skb(u32 len) | |
67 | { | |
68 | struct sk_buff *skb; | |
69 | u32 round_len = roundup(len, 4); | |
70 | ||
71 | skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len); | |
72 | if (!skb) | |
73 | return NULL; | |
74 | ||
75 | skb_reserve(skb, WMI_SKB_HEADROOM); | |
76 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) | |
77 | ath10k_warn("Unaligned WMI skb\n"); | |
78 | ||
79 | skb_put(skb, round_len); | |
80 | memset(skb->data, 0, round_len); | |
81 | ||
82 | return skb; | |
83 | } | |
84 | ||
85 | static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) | |
86 | { | |
87 | dev_kfree_skb(skb); | |
88 | ||
89 | if (atomic_sub_return(1, &ar->wmi.pending_tx_count) == 0) | |
90 | wake_up(&ar->wmi.wq); | |
91 | } | |
92 | ||
be8b3943 MK |
93 | static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, |
94 | enum wmi_cmd_id cmd_id) | |
5e3dd157 KV |
95 | { |
96 | struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); | |
97 | struct wmi_cmd_hdr *cmd_hdr; | |
be8b3943 | 98 | int ret; |
5e3dd157 KV |
99 | u32 cmd = 0; |
100 | ||
101 | if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
102 | return -ENOMEM; | |
103 | ||
104 | cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); | |
105 | ||
106 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
107 | cmd_hdr->cmd_id = __cpu_to_le32(cmd); | |
108 | ||
5e3dd157 | 109 | memset(skb_cb, 0, sizeof(*skb_cb)); |
be8b3943 MK |
110 | ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); |
111 | trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret); | |
5e3dd157 | 112 | |
be8b3943 MK |
113 | if (ret) |
114 | goto err_pull; | |
5e3dd157 | 115 | |
be8b3943 MK |
116 | return 0; |
117 | ||
118 | err_pull: | |
119 | skb_pull(skb, sizeof(struct wmi_cmd_hdr)); | |
120 | return ret; | |
121 | } | |
122 | ||
12acbc43 | 123 | static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) |
be8b3943 MK |
124 | { |
125 | wake_up(&ar->wmi.tx_credits_wq); | |
126 | } | |
127 | ||
128 | static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, | |
129 | enum wmi_cmd_id cmd_id) | |
130 | { | |
131 | int ret = -EINVAL; | |
132 | ||
133 | wait_event_timeout(ar->wmi.tx_credits_wq, ({ | |
134 | ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); | |
135 | (ret != -EAGAIN); | |
136 | }), 3*HZ); | |
137 | ||
138 | if (ret) | |
5e3dd157 | 139 | dev_kfree_skb_any(skb); |
5e3dd157 | 140 | |
be8b3943 | 141 | return ret; |
5e3dd157 KV |
142 | } |
143 | ||
144 | static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) | |
145 | { | |
146 | struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data; | |
147 | enum wmi_scan_event_type event_type; | |
148 | enum wmi_scan_completion_reason reason; | |
149 | u32 freq; | |
150 | u32 req_id; | |
151 | u32 scan_id; | |
152 | u32 vdev_id; | |
153 | ||
154 | event_type = __le32_to_cpu(event->event_type); | |
155 | reason = __le32_to_cpu(event->reason); | |
156 | freq = __le32_to_cpu(event->channel_freq); | |
157 | req_id = __le32_to_cpu(event->scan_req_id); | |
158 | scan_id = __le32_to_cpu(event->scan_id); | |
159 | vdev_id = __le32_to_cpu(event->vdev_id); | |
160 | ||
161 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n"); | |
162 | ath10k_dbg(ATH10K_DBG_WMI, | |
163 | "scan event type %d reason %d freq %d req_id %d " | |
164 | "scan_id %d vdev_id %d\n", | |
165 | event_type, reason, freq, req_id, scan_id, vdev_id); | |
166 | ||
167 | spin_lock_bh(&ar->data_lock); | |
168 | ||
169 | switch (event_type) { | |
170 | case WMI_SCAN_EVENT_STARTED: | |
171 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n"); | |
172 | if (ar->scan.in_progress && ar->scan.is_roc) | |
173 | ieee80211_ready_on_channel(ar->hw); | |
174 | ||
175 | complete(&ar->scan.started); | |
176 | break; | |
177 | case WMI_SCAN_EVENT_COMPLETED: | |
178 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n"); | |
179 | switch (reason) { | |
180 | case WMI_SCAN_REASON_COMPLETED: | |
181 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n"); | |
182 | break; | |
183 | case WMI_SCAN_REASON_CANCELLED: | |
184 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n"); | |
185 | break; | |
186 | case WMI_SCAN_REASON_PREEMPTED: | |
187 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n"); | |
188 | break; | |
189 | case WMI_SCAN_REASON_TIMEDOUT: | |
190 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n"); | |
191 | break; | |
192 | default: | |
193 | break; | |
194 | } | |
195 | ||
196 | ar->scan_channel = NULL; | |
197 | if (!ar->scan.in_progress) { | |
198 | ath10k_warn("no scan requested, ignoring\n"); | |
199 | break; | |
200 | } | |
201 | ||
202 | if (ar->scan.is_roc) { | |
203 | ath10k_offchan_tx_purge(ar); | |
204 | ||
205 | if (!ar->scan.aborting) | |
206 | ieee80211_remain_on_channel_expired(ar->hw); | |
207 | } else { | |
208 | ieee80211_scan_completed(ar->hw, ar->scan.aborting); | |
209 | } | |
210 | ||
211 | del_timer(&ar->scan.timeout); | |
212 | complete_all(&ar->scan.completed); | |
213 | ar->scan.in_progress = false; | |
214 | break; | |
215 | case WMI_SCAN_EVENT_BSS_CHANNEL: | |
216 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n"); | |
217 | ar->scan_channel = NULL; | |
218 | break; | |
219 | case WMI_SCAN_EVENT_FOREIGN_CHANNEL: | |
220 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n"); | |
221 | ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); | |
222 | if (ar->scan.in_progress && ar->scan.is_roc && | |
223 | ar->scan.roc_freq == freq) { | |
224 | complete(&ar->scan.on_channel); | |
225 | } | |
226 | break; | |
227 | case WMI_SCAN_EVENT_DEQUEUED: | |
228 | ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n"); | |
229 | break; | |
230 | case WMI_SCAN_EVENT_PREEMPTED: | |
231 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n"); | |
232 | break; | |
233 | case WMI_SCAN_EVENT_START_FAILED: | |
234 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n"); | |
235 | break; | |
236 | default: | |
237 | break; | |
238 | } | |
239 | ||
240 | spin_unlock_bh(&ar->data_lock); | |
241 | return 0; | |
242 | } | |
243 | ||
244 | static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode) | |
245 | { | |
246 | enum ieee80211_band band; | |
247 | ||
248 | switch (phy_mode) { | |
249 | case MODE_11A: | |
250 | case MODE_11NA_HT20: | |
251 | case MODE_11NA_HT40: | |
252 | case MODE_11AC_VHT20: | |
253 | case MODE_11AC_VHT40: | |
254 | case MODE_11AC_VHT80: | |
255 | band = IEEE80211_BAND_5GHZ; | |
256 | break; | |
257 | case MODE_11G: | |
258 | case MODE_11B: | |
259 | case MODE_11GONLY: | |
260 | case MODE_11NG_HT20: | |
261 | case MODE_11NG_HT40: | |
262 | case MODE_11AC_VHT20_2G: | |
263 | case MODE_11AC_VHT40_2G: | |
264 | case MODE_11AC_VHT80_2G: | |
265 | default: | |
266 | band = IEEE80211_BAND_2GHZ; | |
267 | } | |
268 | ||
269 | return band; | |
270 | } | |
271 | ||
272 | static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band) | |
273 | { | |
274 | u8 rate_idx = 0; | |
275 | ||
276 | /* rate in Kbps */ | |
277 | switch (rate) { | |
278 | case 1000: | |
279 | rate_idx = 0; | |
280 | break; | |
281 | case 2000: | |
282 | rate_idx = 1; | |
283 | break; | |
284 | case 5500: | |
285 | rate_idx = 2; | |
286 | break; | |
287 | case 11000: | |
288 | rate_idx = 3; | |
289 | break; | |
290 | case 6000: | |
291 | rate_idx = 4; | |
292 | break; | |
293 | case 9000: | |
294 | rate_idx = 5; | |
295 | break; | |
296 | case 12000: | |
297 | rate_idx = 6; | |
298 | break; | |
299 | case 18000: | |
300 | rate_idx = 7; | |
301 | break; | |
302 | case 24000: | |
303 | rate_idx = 8; | |
304 | break; | |
305 | case 36000: | |
306 | rate_idx = 9; | |
307 | break; | |
308 | case 48000: | |
309 | rate_idx = 10; | |
310 | break; | |
311 | case 54000: | |
312 | rate_idx = 11; | |
313 | break; | |
314 | default: | |
315 | break; | |
316 | } | |
317 | ||
318 | if (band == IEEE80211_BAND_5GHZ) { | |
319 | if (rate_idx > 3) | |
320 | /* Omit CCK rates */ | |
321 | rate_idx -= 4; | |
322 | else | |
323 | rate_idx = 0; | |
324 | } | |
325 | ||
326 | return rate_idx; | |
327 | } | |
328 | ||
329 | static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) | |
330 | { | |
0d9b0438 MK |
331 | struct wmi_mgmt_rx_event_v1 *ev_v1; |
332 | struct wmi_mgmt_rx_event_v2 *ev_v2; | |
333 | struct wmi_mgmt_rx_hdr_v1 *ev_hdr; | |
5e3dd157 KV |
334 | struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); |
335 | struct ieee80211_hdr *hdr; | |
336 | u32 rx_status; | |
337 | u32 channel; | |
338 | u32 phy_mode; | |
339 | u32 snr; | |
340 | u32 rate; | |
341 | u32 buf_len; | |
342 | u16 fc; | |
0d9b0438 MK |
343 | int pull_len; |
344 | ||
345 | if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { | |
346 | ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; | |
347 | ev_hdr = &ev_v2->hdr.v1; | |
348 | pull_len = sizeof(*ev_v2); | |
349 | } else { | |
350 | ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; | |
351 | ev_hdr = &ev_v1->hdr; | |
352 | pull_len = sizeof(*ev_v1); | |
353 | } | |
5e3dd157 | 354 | |
0d9b0438 MK |
355 | channel = __le32_to_cpu(ev_hdr->channel); |
356 | buf_len = __le32_to_cpu(ev_hdr->buf_len); | |
357 | rx_status = __le32_to_cpu(ev_hdr->status); | |
358 | snr = __le32_to_cpu(ev_hdr->snr); | |
359 | phy_mode = __le32_to_cpu(ev_hdr->phy_mode); | |
360 | rate = __le32_to_cpu(ev_hdr->rate); | |
5e3dd157 KV |
361 | |
362 | memset(status, 0, sizeof(*status)); | |
363 | ||
364 | ath10k_dbg(ATH10K_DBG_MGMT, | |
365 | "event mgmt rx status %08x\n", rx_status); | |
366 | ||
367 | if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) { | |
368 | dev_kfree_skb(skb); | |
369 | return 0; | |
370 | } | |
371 | ||
372 | if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) { | |
373 | dev_kfree_skb(skb); | |
374 | return 0; | |
375 | } | |
376 | ||
377 | if (rx_status & WMI_RX_STATUS_ERR_CRC) | |
378 | status->flag |= RX_FLAG_FAILED_FCS_CRC; | |
379 | if (rx_status & WMI_RX_STATUS_ERR_MIC) | |
380 | status->flag |= RX_FLAG_MMIC_ERROR; | |
381 | ||
382 | status->band = phy_mode_to_band(phy_mode); | |
383 | status->freq = ieee80211_channel_to_frequency(channel, status->band); | |
384 | status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; | |
385 | status->rate_idx = get_rate_idx(rate, status->band); | |
386 | ||
0d9b0438 | 387 | skb_pull(skb, pull_len); |
5e3dd157 KV |
388 | |
389 | hdr = (struct ieee80211_hdr *)skb->data; | |
390 | fc = le16_to_cpu(hdr->frame_control); | |
391 | ||
392 | if (fc & IEEE80211_FCTL_PROTECTED) { | |
393 | status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED | | |
394 | RX_FLAG_MMIC_STRIPPED; | |
395 | hdr->frame_control = __cpu_to_le16(fc & | |
396 | ~IEEE80211_FCTL_PROTECTED); | |
397 | } | |
398 | ||
399 | ath10k_dbg(ATH10K_DBG_MGMT, | |
400 | "event mgmt rx skb %p len %d ftype %02x stype %02x\n", | |
401 | skb, skb->len, | |
402 | fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); | |
403 | ||
404 | ath10k_dbg(ATH10K_DBG_MGMT, | |
405 | "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", | |
406 | status->freq, status->band, status->signal, | |
407 | status->rate_idx); | |
408 | ||
409 | /* | |
410 | * packets from HTC come aligned to 4byte boundaries | |
411 | * because they can originally come in along with a trailer | |
412 | */ | |
413 | skb_trim(skb, buf_len); | |
414 | ||
415 | ieee80211_rx(ar->hw, skb); | |
416 | return 0; | |
417 | } | |
418 | ||
2e1dea40 MK |
419 | static int freq_to_idx(struct ath10k *ar, int freq) |
420 | { | |
421 | struct ieee80211_supported_band *sband; | |
422 | int band, ch, idx = 0; | |
423 | ||
424 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { | |
425 | sband = ar->hw->wiphy->bands[band]; | |
426 | if (!sband) | |
427 | continue; | |
428 | ||
429 | for (ch = 0; ch < sband->n_channels; ch++, idx++) | |
430 | if (sband->channels[ch].center_freq == freq) | |
431 | goto exit; | |
432 | } | |
433 | ||
434 | exit: | |
435 | return idx; | |
436 | } | |
437 | ||
5e3dd157 KV |
438 | static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) |
439 | { | |
2e1dea40 MK |
440 | struct wmi_chan_info_event *ev; |
441 | struct survey_info *survey; | |
442 | u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; | |
443 | int idx; | |
444 | ||
445 | ev = (struct wmi_chan_info_event *)skb->data; | |
446 | ||
447 | err_code = __le32_to_cpu(ev->err_code); | |
448 | freq = __le32_to_cpu(ev->freq); | |
449 | cmd_flags = __le32_to_cpu(ev->cmd_flags); | |
450 | noise_floor = __le32_to_cpu(ev->noise_floor); | |
451 | rx_clear_count = __le32_to_cpu(ev->rx_clear_count); | |
452 | cycle_count = __le32_to_cpu(ev->cycle_count); | |
453 | ||
454 | ath10k_dbg(ATH10K_DBG_WMI, | |
455 | "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", | |
456 | err_code, freq, cmd_flags, noise_floor, rx_clear_count, | |
457 | cycle_count); | |
458 | ||
459 | spin_lock_bh(&ar->data_lock); | |
460 | ||
461 | if (!ar->scan.in_progress) { | |
462 | ath10k_warn("chan info event without a scan request?\n"); | |
463 | goto exit; | |
464 | } | |
465 | ||
466 | idx = freq_to_idx(ar, freq); | |
467 | if (idx >= ARRAY_SIZE(ar->survey)) { | |
468 | ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n", | |
469 | freq, idx); | |
470 | goto exit; | |
471 | } | |
472 | ||
473 | if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { | |
474 | /* During scanning chan info is reported twice for each | |
475 | * visited channel. The reported cycle count is global | |
476 | * and per-channel cycle count must be calculated */ | |
477 | ||
478 | cycle_count -= ar->survey_last_cycle_count; | |
479 | rx_clear_count -= ar->survey_last_rx_clear_count; | |
480 | ||
481 | survey = &ar->survey[idx]; | |
482 | survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count); | |
483 | survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count); | |
484 | survey->noise = noise_floor; | |
485 | survey->filled = SURVEY_INFO_CHANNEL_TIME | | |
486 | SURVEY_INFO_CHANNEL_TIME_RX | | |
487 | SURVEY_INFO_NOISE_DBM; | |
488 | } | |
489 | ||
490 | ar->survey_last_rx_clear_count = rx_clear_count; | |
491 | ar->survey_last_cycle_count = cycle_count; | |
492 | ||
493 | exit: | |
494 | spin_unlock_bh(&ar->data_lock); | |
5e3dd157 KV |
495 | } |
496 | ||
497 | static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) | |
498 | { | |
499 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); | |
500 | } | |
501 | ||
502 | static void ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) | |
503 | { | |
504 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_DEBUG_MESG_EVENTID\n"); | |
505 | } | |
506 | ||
507 | static void ath10k_wmi_event_update_stats(struct ath10k *ar, | |
508 | struct sk_buff *skb) | |
509 | { | |
510 | struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data; | |
511 | ||
512 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); | |
513 | ||
514 | ath10k_debug_read_target_stats(ar, ev); | |
515 | } | |
516 | ||
517 | static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, | |
518 | struct sk_buff *skb) | |
519 | { | |
520 | struct wmi_vdev_start_response_event *ev; | |
521 | ||
522 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); | |
523 | ||
524 | ev = (struct wmi_vdev_start_response_event *)skb->data; | |
525 | ||
526 | if (WARN_ON(__le32_to_cpu(ev->status))) | |
527 | return; | |
528 | ||
529 | complete(&ar->vdev_setup_done); | |
530 | } | |
531 | ||
532 | static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, | |
533 | struct sk_buff *skb) | |
534 | { | |
535 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); | |
536 | complete(&ar->vdev_setup_done); | |
537 | } | |
538 | ||
539 | static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, | |
540 | struct sk_buff *skb) | |
541 | { | |
542 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_PEER_STA_KICKOUT_EVENTID\n"); | |
543 | } | |
544 | ||
545 | /* | |
546 | * FIXME | |
547 | * | |
548 | * We don't report to mac80211 sleep state of connected | |
549 | * stations. Due to this mac80211 can't fill in TIM IE | |
550 | * correctly. | |
551 | * | |
552 | * I know of no way of getting nullfunc frames that contain | |
553 | * sleep transition from connected stations - these do not | |
554 | * seem to be sent from the target to the host. There also | |
555 | * doesn't seem to be a dedicated event for that. So the | |
556 | * only way left to do this would be to read tim_bitmap | |
557 | * during SWBA. | |
558 | * | |
559 | * We could probably try using tim_bitmap from SWBA to tell | |
560 | * mac80211 which stations are asleep and which are not. The | |
561 | * problem here is calling mac80211 functions so many times | |
562 | * could take too long and make us miss the time to submit | |
563 | * the beacon to the target. | |
564 | * | |
565 | * So as a workaround we try to extend the TIM IE if there | |
566 | * is unicast buffered for stations with aid > 7 and fill it | |
567 | * in ourselves. | |
568 | */ | |
569 | static void ath10k_wmi_update_tim(struct ath10k *ar, | |
570 | struct ath10k_vif *arvif, | |
571 | struct sk_buff *bcn, | |
572 | struct wmi_bcn_info *bcn_info) | |
573 | { | |
574 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; | |
575 | struct ieee80211_tim_ie *tim; | |
576 | u8 *ies, *ie; | |
577 | u8 ie_len, pvm_len; | |
578 | ||
579 | /* if next SWBA has no tim_changed the tim_bitmap is garbage. | |
580 | * we must copy the bitmap upon change and reuse it later */ | |
581 | if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) { | |
582 | int i; | |
583 | ||
584 | BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) != | |
585 | sizeof(bcn_info->tim_info.tim_bitmap)); | |
586 | ||
587 | for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) { | |
588 | __le32 t = bcn_info->tim_info.tim_bitmap[i / 4]; | |
589 | u32 v = __le32_to_cpu(t); | |
590 | arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; | |
591 | } | |
592 | ||
593 | /* FW reports either length 0 or 16 | |
594 | * so we calculate this on our own */ | |
595 | arvif->u.ap.tim_len = 0; | |
596 | for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) | |
597 | if (arvif->u.ap.tim_bitmap[i]) | |
598 | arvif->u.ap.tim_len = i; | |
599 | ||
600 | arvif->u.ap.tim_len++; | |
601 | } | |
602 | ||
603 | ies = bcn->data; | |
604 | ies += ieee80211_hdrlen(hdr->frame_control); | |
605 | ies += 12; /* fixed parameters */ | |
606 | ||
607 | ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, | |
608 | (u8 *)skb_tail_pointer(bcn) - ies); | |
609 | if (!ie) { | |
09af8f85 MK |
610 | if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) |
611 | ath10k_warn("no tim ie found;\n"); | |
5e3dd157 KV |
612 | return; |
613 | } | |
614 | ||
615 | tim = (void *)ie + 2; | |
616 | ie_len = ie[1]; | |
617 | pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ | |
618 | ||
619 | if (pvm_len < arvif->u.ap.tim_len) { | |
620 | int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len; | |
621 | int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); | |
622 | void *next_ie = ie + 2 + ie_len; | |
623 | ||
624 | if (skb_put(bcn, expand_size)) { | |
625 | memmove(next_ie + expand_size, next_ie, move_size); | |
626 | ||
627 | ie[1] += expand_size; | |
628 | ie_len += expand_size; | |
629 | pvm_len += expand_size; | |
630 | } else { | |
631 | ath10k_warn("tim expansion failed\n"); | |
632 | } | |
633 | } | |
634 | ||
635 | if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) { | |
636 | ath10k_warn("tim pvm length is too great (%d)\n", pvm_len); | |
637 | return; | |
638 | } | |
639 | ||
640 | tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast); | |
641 | memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); | |
642 | ||
643 | ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", | |
644 | tim->dtim_count, tim->dtim_period, | |
645 | tim->bitmap_ctrl, pvm_len); | |
646 | } | |
647 | ||
648 | static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len, | |
649 | struct wmi_p2p_noa_info *noa) | |
650 | { | |
651 | struct ieee80211_p2p_noa_attr *noa_attr; | |
652 | u8 ctwindow_oppps = noa->ctwindow_oppps; | |
653 | u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET; | |
654 | bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT); | |
655 | __le16 *noa_attr_len; | |
656 | u16 attr_len; | |
657 | u8 noa_descriptors = noa->num_descriptors; | |
658 | int i; | |
659 | ||
660 | /* P2P IE */ | |
661 | data[0] = WLAN_EID_VENDOR_SPECIFIC; | |
662 | data[1] = len - 2; | |
663 | data[2] = (WLAN_OUI_WFA >> 16) & 0xff; | |
664 | data[3] = (WLAN_OUI_WFA >> 8) & 0xff; | |
665 | data[4] = (WLAN_OUI_WFA >> 0) & 0xff; | |
666 | data[5] = WLAN_OUI_TYPE_WFA_P2P; | |
667 | ||
668 | /* NOA ATTR */ | |
669 | data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE; | |
670 | noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */ | |
671 | noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9]; | |
672 | ||
673 | noa_attr->index = noa->index; | |
674 | noa_attr->oppps_ctwindow = ctwindow; | |
675 | if (oppps) | |
676 | noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT; | |
677 | ||
678 | for (i = 0; i < noa_descriptors; i++) { | |
679 | noa_attr->desc[i].count = | |
680 | __le32_to_cpu(noa->descriptors[i].type_count); | |
681 | noa_attr->desc[i].duration = noa->descriptors[i].duration; | |
682 | noa_attr->desc[i].interval = noa->descriptors[i].interval; | |
683 | noa_attr->desc[i].start_time = noa->descriptors[i].start_time; | |
684 | } | |
685 | ||
686 | attr_len = 2; /* index + oppps_ctwindow */ | |
687 | attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc); | |
688 | *noa_attr_len = __cpu_to_le16(attr_len); | |
689 | } | |
690 | ||
691 | static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa) | |
692 | { | |
693 | u32 len = 0; | |
694 | u8 noa_descriptors = noa->num_descriptors; | |
695 | u8 opp_ps_info = noa->ctwindow_oppps; | |
696 | bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT); | |
697 | ||
698 | ||
699 | if (!noa_descriptors && !opps_enabled) | |
700 | return len; | |
701 | ||
702 | len += 1 + 1 + 4; /* EID + len + OUI */ | |
703 | len += 1 + 2; /* noa attr + attr len */ | |
704 | len += 1 + 1; /* index + oppps_ctwindow */ | |
705 | len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc); | |
706 | ||
707 | return len; | |
708 | } | |
709 | ||
710 | static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, | |
711 | struct sk_buff *bcn, | |
712 | struct wmi_bcn_info *bcn_info) | |
713 | { | |
714 | struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info; | |
715 | u8 *new_data, *old_data = arvif->u.ap.noa_data; | |
716 | u32 new_len; | |
717 | ||
718 | if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO) | |
719 | return; | |
720 | ||
721 | ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); | |
722 | if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) { | |
723 | new_len = ath10k_p2p_calc_noa_ie_len(noa); | |
724 | if (!new_len) | |
725 | goto cleanup; | |
726 | ||
727 | new_data = kmalloc(new_len, GFP_ATOMIC); | |
728 | if (!new_data) | |
729 | goto cleanup; | |
730 | ||
731 | ath10k_p2p_fill_noa_ie(new_data, new_len, noa); | |
732 | ||
733 | spin_lock_bh(&ar->data_lock); | |
734 | arvif->u.ap.noa_data = new_data; | |
735 | arvif->u.ap.noa_len = new_len; | |
736 | spin_unlock_bh(&ar->data_lock); | |
737 | kfree(old_data); | |
738 | } | |
739 | ||
740 | if (arvif->u.ap.noa_data) | |
741 | if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) | |
742 | memcpy(skb_put(bcn, arvif->u.ap.noa_len), | |
743 | arvif->u.ap.noa_data, | |
744 | arvif->u.ap.noa_len); | |
745 | return; | |
746 | ||
747 | cleanup: | |
748 | spin_lock_bh(&ar->data_lock); | |
749 | arvif->u.ap.noa_data = NULL; | |
750 | arvif->u.ap.noa_len = 0; | |
751 | spin_unlock_bh(&ar->data_lock); | |
752 | kfree(old_data); | |
753 | } | |
754 | ||
755 | ||
756 | static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) | |
757 | { | |
758 | struct wmi_host_swba_event *ev; | |
759 | u32 map; | |
760 | int i = -1; | |
761 | struct wmi_bcn_info *bcn_info; | |
762 | struct ath10k_vif *arvif; | |
763 | struct wmi_bcn_tx_arg arg; | |
764 | struct sk_buff *bcn; | |
765 | int vdev_id = 0; | |
766 | int ret; | |
767 | ||
768 | ath10k_dbg(ATH10K_DBG_MGMT, "WMI_HOST_SWBA_EVENTID\n"); | |
769 | ||
770 | ev = (struct wmi_host_swba_event *)skb->data; | |
771 | map = __le32_to_cpu(ev->vdev_map); | |
772 | ||
773 | ath10k_dbg(ATH10K_DBG_MGMT, "host swba:\n" | |
774 | "-vdev map 0x%x\n", | |
775 | ev->vdev_map); | |
776 | ||
777 | for (; map; map >>= 1, vdev_id++) { | |
778 | if (!(map & 0x1)) | |
779 | continue; | |
780 | ||
781 | i++; | |
782 | ||
783 | if (i >= WMI_MAX_AP_VDEV) { | |
784 | ath10k_warn("swba has corrupted vdev map\n"); | |
785 | break; | |
786 | } | |
787 | ||
788 | bcn_info = &ev->bcn_info[i]; | |
789 | ||
790 | ath10k_dbg(ATH10K_DBG_MGMT, | |
791 | "-bcn_info[%d]:\n" | |
792 | "--tim_len %d\n" | |
793 | "--tim_mcast %d\n" | |
794 | "--tim_changed %d\n" | |
795 | "--tim_num_ps_pending %d\n" | |
796 | "--tim_bitmap 0x%08x%08x%08x%08x\n", | |
797 | i, | |
798 | __le32_to_cpu(bcn_info->tim_info.tim_len), | |
799 | __le32_to_cpu(bcn_info->tim_info.tim_mcast), | |
800 | __le32_to_cpu(bcn_info->tim_info.tim_changed), | |
801 | __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending), | |
802 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]), | |
803 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]), | |
804 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]), | |
805 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0])); | |
806 | ||
807 | arvif = ath10k_get_arvif(ar, vdev_id); | |
808 | if (arvif == NULL) { | |
809 | ath10k_warn("no vif for vdev_id %d found\n", vdev_id); | |
810 | continue; | |
811 | } | |
812 | ||
813 | bcn = ieee80211_beacon_get(ar->hw, arvif->vif); | |
814 | if (!bcn) { | |
815 | ath10k_warn("could not get mac80211 beacon\n"); | |
816 | continue; | |
817 | } | |
818 | ||
819 | ath10k_tx_h_seq_no(bcn); | |
820 | ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info); | |
821 | ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info); | |
822 | ||
823 | arg.vdev_id = arvif->vdev_id; | |
824 | arg.tx_rate = 0; | |
825 | arg.tx_power = 0; | |
826 | arg.bcn = bcn->data; | |
827 | arg.bcn_len = bcn->len; | |
828 | ||
829 | ret = ath10k_wmi_beacon_send(ar, &arg); | |
830 | if (ret) | |
831 | ath10k_warn("could not send beacon (%d)\n", ret); | |
832 | ||
833 | dev_kfree_skb_any(bcn); | |
834 | } | |
835 | } | |
836 | ||
837 | static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, | |
838 | struct sk_buff *skb) | |
839 | { | |
840 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); | |
841 | } | |
842 | ||
843 | static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) | |
844 | { | |
845 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_PHYERR_EVENTID\n"); | |
846 | } | |
847 | ||
848 | static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) | |
849 | { | |
850 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n"); | |
851 | } | |
852 | ||
853 | static void ath10k_wmi_event_profile_match(struct ath10k *ar, | |
854 | struct sk_buff *skb) | |
855 | { | |
856 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); | |
857 | } | |
858 | ||
859 | static void ath10k_wmi_event_debug_print(struct ath10k *ar, | |
860 | struct sk_buff *skb) | |
861 | { | |
862 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_DEBUG_PRINT_EVENTID\n"); | |
863 | } | |
864 | ||
865 | static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) | |
866 | { | |
867 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); | |
868 | } | |
869 | ||
870 | static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, | |
871 | struct sk_buff *skb) | |
872 | { | |
873 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); | |
874 | } | |
875 | ||
876 | static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, | |
877 | struct sk_buff *skb) | |
878 | { | |
879 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); | |
880 | } | |
881 | ||
882 | static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, | |
883 | struct sk_buff *skb) | |
884 | { | |
885 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); | |
886 | } | |
887 | ||
888 | static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, | |
889 | struct sk_buff *skb) | |
890 | { | |
891 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); | |
892 | } | |
893 | ||
894 | static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, | |
895 | struct sk_buff *skb) | |
896 | { | |
897 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n"); | |
898 | } | |
899 | ||
900 | static void ath10k_wmi_event_dcs_interference(struct ath10k *ar, | |
901 | struct sk_buff *skb) | |
902 | { | |
903 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); | |
904 | } | |
905 | ||
906 | static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, | |
907 | struct sk_buff *skb) | |
908 | { | |
909 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n"); | |
910 | } | |
911 | ||
912 | static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, | |
913 | struct sk_buff *skb) | |
914 | { | |
915 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); | |
916 | } | |
917 | ||
918 | static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, | |
919 | struct sk_buff *skb) | |
920 | { | |
921 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); | |
922 | } | |
923 | ||
924 | static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, | |
925 | struct sk_buff *skb) | |
926 | { | |
927 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); | |
928 | } | |
929 | ||
930 | static void ath10k_wmi_event_delba_complete(struct ath10k *ar, | |
931 | struct sk_buff *skb) | |
932 | { | |
933 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); | |
934 | } | |
935 | ||
936 | static void ath10k_wmi_event_addba_complete(struct ath10k *ar, | |
937 | struct sk_buff *skb) | |
938 | { | |
939 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); | |
940 | } | |
941 | ||
942 | static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, | |
943 | struct sk_buff *skb) | |
944 | { | |
945 | ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); | |
946 | } | |
947 | ||
948 | static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar, | |
949 | struct sk_buff *skb) | |
950 | { | |
951 | struct wmi_service_ready_event *ev = (void *)skb->data; | |
952 | ||
953 | if (skb->len < sizeof(*ev)) { | |
954 | ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n", | |
955 | skb->len, sizeof(*ev)); | |
956 | return; | |
957 | } | |
958 | ||
959 | ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power); | |
960 | ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power); | |
961 | ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info); | |
962 | ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info); | |
963 | ar->fw_version_major = | |
964 | (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24; | |
965 | ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff); | |
966 | ar->fw_version_release = | |
967 | (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16; | |
968 | ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff); | |
969 | ar->phy_capability = __le32_to_cpu(ev->phy_capability); | |
8865bee4 MK |
970 | ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains); |
971 | ||
0d9b0438 MK |
972 | if (ar->fw_version_build > 636) |
973 | set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features); | |
974 | ||
8865bee4 MK |
975 | if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) { |
976 | ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n", | |
977 | ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM); | |
978 | ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM; | |
979 | } | |
5e3dd157 KV |
980 | |
981 | ar->ath_common.regulatory.current_rd = | |
982 | __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd); | |
983 | ||
984 | ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap, | |
985 | sizeof(ev->wmi_service_bitmap)); | |
986 | ||
987 | if (strlen(ar->hw->wiphy->fw_version) == 0) { | |
988 | snprintf(ar->hw->wiphy->fw_version, | |
989 | sizeof(ar->hw->wiphy->fw_version), | |
990 | "%u.%u.%u.%u", | |
991 | ar->fw_version_major, | |
992 | ar->fw_version_minor, | |
993 | ar->fw_version_release, | |
994 | ar->fw_version_build); | |
995 | } | |
996 | ||
997 | /* FIXME: it probably should be better to support this */ | |
998 | if (__le32_to_cpu(ev->num_mem_reqs) > 0) { | |
999 | ath10k_warn("target requested %d memory chunks; ignoring\n", | |
1000 | __le32_to_cpu(ev->num_mem_reqs)); | |
1001 | } | |
1002 | ||
1003 | ath10k_dbg(ATH10K_DBG_WMI, | |
8865bee4 | 1004 | "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n", |
5e3dd157 KV |
1005 | __le32_to_cpu(ev->sw_version), |
1006 | __le32_to_cpu(ev->sw_version_1), | |
1007 | __le32_to_cpu(ev->abi_version), | |
1008 | __le32_to_cpu(ev->phy_capability), | |
1009 | __le32_to_cpu(ev->ht_cap_info), | |
1010 | __le32_to_cpu(ev->vht_cap_info), | |
1011 | __le32_to_cpu(ev->vht_supp_mcs), | |
1012 | __le32_to_cpu(ev->sys_cap_info), | |
8865bee4 MK |
1013 | __le32_to_cpu(ev->num_mem_reqs), |
1014 | __le32_to_cpu(ev->num_rf_chains)); | |
5e3dd157 KV |
1015 | |
1016 | complete(&ar->wmi.service_ready); | |
1017 | } | |
1018 | ||
1019 | static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb) | |
1020 | { | |
1021 | struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data; | |
1022 | ||
1023 | if (WARN_ON(skb->len < sizeof(*ev))) | |
1024 | return -EINVAL; | |
1025 | ||
1026 | memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN); | |
1027 | ||
1028 | ath10k_dbg(ATH10K_DBG_WMI, | |
1029 | "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", | |
1030 | __le32_to_cpu(ev->sw_version), | |
1031 | __le32_to_cpu(ev->abi_version), | |
1032 | ev->mac_addr.addr, | |
1033 | __le32_to_cpu(ev->status)); | |
1034 | ||
1035 | complete(&ar->wmi.unified_ready); | |
1036 | return 0; | |
1037 | } | |
1038 | ||
1039 | static void ath10k_wmi_event_process(struct ath10k *ar, struct sk_buff *skb) | |
1040 | { | |
1041 | struct wmi_cmd_hdr *cmd_hdr; | |
1042 | enum wmi_event_id id; | |
1043 | u16 len; | |
1044 | ||
1045 | cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
1046 | id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
1047 | ||
1048 | if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) | |
1049 | return; | |
1050 | ||
1051 | len = skb->len; | |
1052 | ||
1053 | trace_ath10k_wmi_event(id, skb->data, skb->len); | |
1054 | ||
1055 | switch (id) { | |
1056 | case WMI_MGMT_RX_EVENTID: | |
1057 | ath10k_wmi_event_mgmt_rx(ar, skb); | |
1058 | /* mgmt_rx() owns the skb now! */ | |
1059 | return; | |
1060 | case WMI_SCAN_EVENTID: | |
1061 | ath10k_wmi_event_scan(ar, skb); | |
1062 | break; | |
1063 | case WMI_CHAN_INFO_EVENTID: | |
1064 | ath10k_wmi_event_chan_info(ar, skb); | |
1065 | break; | |
1066 | case WMI_ECHO_EVENTID: | |
1067 | ath10k_wmi_event_echo(ar, skb); | |
1068 | break; | |
1069 | case WMI_DEBUG_MESG_EVENTID: | |
1070 | ath10k_wmi_event_debug_mesg(ar, skb); | |
1071 | break; | |
1072 | case WMI_UPDATE_STATS_EVENTID: | |
1073 | ath10k_wmi_event_update_stats(ar, skb); | |
1074 | break; | |
1075 | case WMI_VDEV_START_RESP_EVENTID: | |
1076 | ath10k_wmi_event_vdev_start_resp(ar, skb); | |
1077 | break; | |
1078 | case WMI_VDEV_STOPPED_EVENTID: | |
1079 | ath10k_wmi_event_vdev_stopped(ar, skb); | |
1080 | break; | |
1081 | case WMI_PEER_STA_KICKOUT_EVENTID: | |
1082 | ath10k_wmi_event_peer_sta_kickout(ar, skb); | |
1083 | break; | |
1084 | case WMI_HOST_SWBA_EVENTID: | |
1085 | ath10k_wmi_event_host_swba(ar, skb); | |
1086 | break; | |
1087 | case WMI_TBTTOFFSET_UPDATE_EVENTID: | |
1088 | ath10k_wmi_event_tbttoffset_update(ar, skb); | |
1089 | break; | |
1090 | case WMI_PHYERR_EVENTID: | |
1091 | ath10k_wmi_event_phyerr(ar, skb); | |
1092 | break; | |
1093 | case WMI_ROAM_EVENTID: | |
1094 | ath10k_wmi_event_roam(ar, skb); | |
1095 | break; | |
1096 | case WMI_PROFILE_MATCH: | |
1097 | ath10k_wmi_event_profile_match(ar, skb); | |
1098 | break; | |
1099 | case WMI_DEBUG_PRINT_EVENTID: | |
1100 | ath10k_wmi_event_debug_print(ar, skb); | |
1101 | break; | |
1102 | case WMI_PDEV_QVIT_EVENTID: | |
1103 | ath10k_wmi_event_pdev_qvit(ar, skb); | |
1104 | break; | |
1105 | case WMI_WLAN_PROFILE_DATA_EVENTID: | |
1106 | ath10k_wmi_event_wlan_profile_data(ar, skb); | |
1107 | break; | |
1108 | case WMI_RTT_MEASUREMENT_REPORT_EVENTID: | |
1109 | ath10k_wmi_event_rtt_measurement_report(ar, skb); | |
1110 | break; | |
1111 | case WMI_TSF_MEASUREMENT_REPORT_EVENTID: | |
1112 | ath10k_wmi_event_tsf_measurement_report(ar, skb); | |
1113 | break; | |
1114 | case WMI_RTT_ERROR_REPORT_EVENTID: | |
1115 | ath10k_wmi_event_rtt_error_report(ar, skb); | |
1116 | break; | |
1117 | case WMI_WOW_WAKEUP_HOST_EVENTID: | |
1118 | ath10k_wmi_event_wow_wakeup_host(ar, skb); | |
1119 | break; | |
1120 | case WMI_DCS_INTERFERENCE_EVENTID: | |
1121 | ath10k_wmi_event_dcs_interference(ar, skb); | |
1122 | break; | |
1123 | case WMI_PDEV_TPC_CONFIG_EVENTID: | |
1124 | ath10k_wmi_event_pdev_tpc_config(ar, skb); | |
1125 | break; | |
1126 | case WMI_PDEV_FTM_INTG_EVENTID: | |
1127 | ath10k_wmi_event_pdev_ftm_intg(ar, skb); | |
1128 | break; | |
1129 | case WMI_GTK_OFFLOAD_STATUS_EVENTID: | |
1130 | ath10k_wmi_event_gtk_offload_status(ar, skb); | |
1131 | break; | |
1132 | case WMI_GTK_REKEY_FAIL_EVENTID: | |
1133 | ath10k_wmi_event_gtk_rekey_fail(ar, skb); | |
1134 | break; | |
1135 | case WMI_TX_DELBA_COMPLETE_EVENTID: | |
1136 | ath10k_wmi_event_delba_complete(ar, skb); | |
1137 | break; | |
1138 | case WMI_TX_ADDBA_COMPLETE_EVENTID: | |
1139 | ath10k_wmi_event_addba_complete(ar, skb); | |
1140 | break; | |
1141 | case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: | |
1142 | ath10k_wmi_event_vdev_install_key_complete(ar, skb); | |
1143 | break; | |
1144 | case WMI_SERVICE_READY_EVENTID: | |
1145 | ath10k_wmi_service_ready_event_rx(ar, skb); | |
1146 | break; | |
1147 | case WMI_READY_EVENTID: | |
1148 | ath10k_wmi_ready_event_rx(ar, skb); | |
1149 | break; | |
1150 | default: | |
1151 | ath10k_warn("Unknown eventid: %d\n", id); | |
1152 | break; | |
1153 | } | |
1154 | ||
1155 | dev_kfree_skb(skb); | |
1156 | } | |
1157 | ||
1158 | static void ath10k_wmi_event_work(struct work_struct *work) | |
1159 | { | |
1160 | struct ath10k *ar = container_of(work, struct ath10k, | |
1161 | wmi.wmi_event_work); | |
1162 | struct sk_buff *skb; | |
1163 | ||
1164 | for (;;) { | |
1165 | skb = skb_dequeue(&ar->wmi.wmi_event_list); | |
1166 | if (!skb) | |
1167 | break; | |
1168 | ||
1169 | ath10k_wmi_event_process(ar, skb); | |
1170 | } | |
1171 | } | |
1172 | ||
1173 | static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) | |
1174 | { | |
1175 | struct wmi_cmd_hdr *cmd_hdr = (struct wmi_cmd_hdr *)skb->data; | |
1176 | enum wmi_event_id event_id; | |
1177 | ||
1178 | event_id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); | |
1179 | ||
1180 | /* some events require to be handled ASAP | |
1181 | * thus can't be defered to a worker thread */ | |
1182 | switch (event_id) { | |
5e3dd157 KV |
1183 | case WMI_MGMT_RX_EVENTID: |
1184 | ath10k_wmi_event_process(ar, skb); | |
1185 | return; | |
1186 | default: | |
1187 | break; | |
1188 | } | |
1189 | ||
1190 | skb_queue_tail(&ar->wmi.wmi_event_list, skb); | |
1191 | queue_work(ar->workqueue, &ar->wmi.wmi_event_work); | |
1192 | } | |
1193 | ||
1194 | /* WMI Initialization functions */ | |
1195 | int ath10k_wmi_attach(struct ath10k *ar) | |
1196 | { | |
1197 | init_completion(&ar->wmi.service_ready); | |
1198 | init_completion(&ar->wmi.unified_ready); | |
1199 | init_waitqueue_head(&ar->wmi.wq); | |
be8b3943 | 1200 | init_waitqueue_head(&ar->wmi.tx_credits_wq); |
5e3dd157 KV |
1201 | |
1202 | skb_queue_head_init(&ar->wmi.wmi_event_list); | |
1203 | INIT_WORK(&ar->wmi.wmi_event_work, ath10k_wmi_event_work); | |
1204 | ||
1205 | return 0; | |
1206 | } | |
1207 | ||
1208 | void ath10k_wmi_detach(struct ath10k *ar) | |
1209 | { | |
1210 | /* HTC should've drained the packets already */ | |
1211 | if (WARN_ON(atomic_read(&ar->wmi.pending_tx_count) > 0)) | |
1212 | ath10k_warn("there are still pending packets\n"); | |
1213 | ||
1214 | cancel_work_sync(&ar->wmi.wmi_event_work); | |
1215 | skb_queue_purge(&ar->wmi.wmi_event_list); | |
1216 | } | |
1217 | ||
1218 | int ath10k_wmi_connect_htc_service(struct ath10k *ar) | |
1219 | { | |
1220 | int status; | |
1221 | struct ath10k_htc_svc_conn_req conn_req; | |
1222 | struct ath10k_htc_svc_conn_resp conn_resp; | |
1223 | ||
1224 | memset(&conn_req, 0, sizeof(conn_req)); | |
1225 | memset(&conn_resp, 0, sizeof(conn_resp)); | |
1226 | ||
1227 | /* these fields are the same for all service endpoints */ | |
1228 | conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; | |
1229 | conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; | |
be8b3943 | 1230 | conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; |
5e3dd157 KV |
1231 | |
1232 | /* connect to control service */ | |
1233 | conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; | |
1234 | ||
cd003fad | 1235 | status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); |
5e3dd157 KV |
1236 | if (status) { |
1237 | ath10k_warn("failed to connect to WMI CONTROL service status: %d\n", | |
1238 | status); | |
1239 | return status; | |
1240 | } | |
1241 | ||
1242 | ar->wmi.eid = conn_resp.eid; | |
1243 | return 0; | |
1244 | } | |
1245 | ||
1246 | int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g, | |
1247 | u16 rd5g, u16 ctl2g, u16 ctl5g) | |
1248 | { | |
1249 | struct wmi_pdev_set_regdomain_cmd *cmd; | |
1250 | struct sk_buff *skb; | |
1251 | ||
1252 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1253 | if (!skb) | |
1254 | return -ENOMEM; | |
1255 | ||
1256 | cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; | |
1257 | cmd->reg_domain = __cpu_to_le32(rd); | |
1258 | cmd->reg_domain_2G = __cpu_to_le32(rd2g); | |
1259 | cmd->reg_domain_5G = __cpu_to_le32(rd5g); | |
1260 | cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); | |
1261 | cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); | |
1262 | ||
1263 | ath10k_dbg(ATH10K_DBG_WMI, | |
1264 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", | |
1265 | rd, rd2g, rd5g, ctl2g, ctl5g); | |
1266 | ||
1267 | return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); | |
1268 | } | |
1269 | ||
1270 | int ath10k_wmi_pdev_set_channel(struct ath10k *ar, | |
1271 | const struct wmi_channel_arg *arg) | |
1272 | { | |
1273 | struct wmi_set_channel_cmd *cmd; | |
1274 | struct sk_buff *skb; | |
1275 | ||
1276 | if (arg->passive) | |
1277 | return -EINVAL; | |
1278 | ||
1279 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1280 | if (!skb) | |
1281 | return -ENOMEM; | |
1282 | ||
1283 | cmd = (struct wmi_set_channel_cmd *)skb->data; | |
1284 | cmd->chan.mhz = __cpu_to_le32(arg->freq); | |
1285 | cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq); | |
1286 | cmd->chan.mode = arg->mode; | |
1287 | cmd->chan.min_power = arg->min_power; | |
1288 | cmd->chan.max_power = arg->max_power; | |
1289 | cmd->chan.reg_power = arg->max_reg_power; | |
1290 | cmd->chan.reg_classid = arg->reg_class_id; | |
1291 | cmd->chan.antenna_max = arg->max_antenna_gain; | |
1292 | ||
1293 | ath10k_dbg(ATH10K_DBG_WMI, | |
1294 | "wmi set channel mode %d freq %d\n", | |
1295 | arg->mode, arg->freq); | |
1296 | ||
1297 | return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_CHANNEL_CMDID); | |
1298 | } | |
1299 | ||
1300 | int ath10k_wmi_pdev_suspend_target(struct ath10k *ar) | |
1301 | { | |
1302 | struct wmi_pdev_suspend_cmd *cmd; | |
1303 | struct sk_buff *skb; | |
1304 | ||
1305 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1306 | if (!skb) | |
1307 | return -ENOMEM; | |
1308 | ||
1309 | cmd = (struct wmi_pdev_suspend_cmd *)skb->data; | |
1310 | cmd->suspend_opt = WMI_PDEV_SUSPEND; | |
1311 | ||
1312 | return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SUSPEND_CMDID); | |
1313 | } | |
1314 | ||
1315 | int ath10k_wmi_pdev_resume_target(struct ath10k *ar) | |
1316 | { | |
1317 | struct sk_buff *skb; | |
1318 | ||
1319 | skb = ath10k_wmi_alloc_skb(0); | |
1320 | if (skb == NULL) | |
1321 | return -ENOMEM; | |
1322 | ||
1323 | return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_RESUME_CMDID); | |
1324 | } | |
1325 | ||
1326 | int ath10k_wmi_pdev_set_param(struct ath10k *ar, enum wmi_pdev_param id, | |
1327 | u32 value) | |
1328 | { | |
1329 | struct wmi_pdev_set_param_cmd *cmd; | |
1330 | struct sk_buff *skb; | |
1331 | ||
1332 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1333 | if (!skb) | |
1334 | return -ENOMEM; | |
1335 | ||
1336 | cmd = (struct wmi_pdev_set_param_cmd *)skb->data; | |
1337 | cmd->param_id = __cpu_to_le32(id); | |
1338 | cmd->param_value = __cpu_to_le32(value); | |
1339 | ||
1340 | ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", | |
1341 | id, value); | |
1342 | return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_PARAM_CMDID); | |
1343 | } | |
1344 | ||
1345 | int ath10k_wmi_cmd_init(struct ath10k *ar) | |
1346 | { | |
1347 | struct wmi_init_cmd *cmd; | |
1348 | struct sk_buff *buf; | |
1349 | struct wmi_resource_config config = {}; | |
1350 | u32 val; | |
1351 | ||
1352 | config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); | |
1353 | config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS); | |
1354 | config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); | |
1355 | ||
1356 | config.num_offload_reorder_bufs = | |
1357 | __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); | |
1358 | ||
1359 | config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); | |
1360 | config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); | |
1361 | config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); | |
1362 | config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); | |
1363 | config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); | |
1364 | config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
1365 | config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
1366 | config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); | |
1367 | config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); | |
1368 | config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE); | |
1369 | ||
1370 | config.scan_max_pending_reqs = | |
1371 | __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); | |
1372 | ||
1373 | config.bmiss_offload_max_vdev = | |
1374 | __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); | |
1375 | ||
1376 | config.roam_offload_max_vdev = | |
1377 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); | |
1378 | ||
1379 | config.roam_offload_max_ap_profiles = | |
1380 | __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); | |
1381 | ||
1382 | config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); | |
1383 | config.num_mcast_table_elems = | |
1384 | __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); | |
1385 | ||
1386 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); | |
1387 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); | |
1388 | config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); | |
1389 | config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); | |
1390 | config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); | |
1391 | ||
1392 | val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | |
1393 | config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); | |
1394 | ||
1395 | config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); | |
1396 | ||
1397 | config.gtk_offload_max_vdev = | |
1398 | __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); | |
1399 | ||
1400 | config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); | |
1401 | config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); | |
1402 | ||
1403 | buf = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1404 | if (!buf) | |
1405 | return -ENOMEM; | |
1406 | ||
1407 | cmd = (struct wmi_init_cmd *)buf->data; | |
1408 | cmd->num_host_mem_chunks = 0; | |
1409 | memcpy(&cmd->resource_config, &config, sizeof(config)); | |
1410 | ||
1411 | ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n"); | |
1412 | return ath10k_wmi_cmd_send(ar, buf, WMI_INIT_CMDID); | |
1413 | } | |
1414 | ||
1415 | static int ath10k_wmi_start_scan_calc_len(const struct wmi_start_scan_arg *arg) | |
1416 | { | |
1417 | int len; | |
1418 | ||
1419 | len = sizeof(struct wmi_start_scan_cmd); | |
1420 | ||
1421 | if (arg->ie_len) { | |
1422 | if (!arg->ie) | |
1423 | return -EINVAL; | |
1424 | if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) | |
1425 | return -EINVAL; | |
1426 | ||
1427 | len += sizeof(struct wmi_ie_data); | |
1428 | len += roundup(arg->ie_len, 4); | |
1429 | } | |
1430 | ||
1431 | if (arg->n_channels) { | |
1432 | if (!arg->channels) | |
1433 | return -EINVAL; | |
1434 | if (arg->n_channels > ARRAY_SIZE(arg->channels)) | |
1435 | return -EINVAL; | |
1436 | ||
1437 | len += sizeof(struct wmi_chan_list); | |
1438 | len += sizeof(__le32) * arg->n_channels; | |
1439 | } | |
1440 | ||
1441 | if (arg->n_ssids) { | |
1442 | if (!arg->ssids) | |
1443 | return -EINVAL; | |
1444 | if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) | |
1445 | return -EINVAL; | |
1446 | ||
1447 | len += sizeof(struct wmi_ssid_list); | |
1448 | len += sizeof(struct wmi_ssid) * arg->n_ssids; | |
1449 | } | |
1450 | ||
1451 | if (arg->n_bssids) { | |
1452 | if (!arg->bssids) | |
1453 | return -EINVAL; | |
1454 | if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) | |
1455 | return -EINVAL; | |
1456 | ||
1457 | len += sizeof(struct wmi_bssid_list); | |
1458 | len += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
1459 | } | |
1460 | ||
1461 | return len; | |
1462 | } | |
1463 | ||
1464 | int ath10k_wmi_start_scan(struct ath10k *ar, | |
1465 | const struct wmi_start_scan_arg *arg) | |
1466 | { | |
1467 | struct wmi_start_scan_cmd *cmd; | |
1468 | struct sk_buff *skb; | |
1469 | struct wmi_ie_data *ie; | |
1470 | struct wmi_chan_list *channels; | |
1471 | struct wmi_ssid_list *ssids; | |
1472 | struct wmi_bssid_list *bssids; | |
1473 | u32 scan_id; | |
1474 | u32 scan_req_id; | |
1475 | int off; | |
1476 | int len = 0; | |
1477 | int i; | |
1478 | ||
1479 | len = ath10k_wmi_start_scan_calc_len(arg); | |
1480 | if (len < 0) | |
1481 | return len; /* len contains error code here */ | |
1482 | ||
1483 | skb = ath10k_wmi_alloc_skb(len); | |
1484 | if (!skb) | |
1485 | return -ENOMEM; | |
1486 | ||
1487 | scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; | |
1488 | scan_id |= arg->scan_id; | |
1489 | ||
1490 | scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
1491 | scan_req_id |= arg->scan_req_id; | |
1492 | ||
1493 | cmd = (struct wmi_start_scan_cmd *)skb->data; | |
1494 | cmd->scan_id = __cpu_to_le32(scan_id); | |
1495 | cmd->scan_req_id = __cpu_to_le32(scan_req_id); | |
1496 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
1497 | cmd->scan_priority = __cpu_to_le32(arg->scan_priority); | |
1498 | cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); | |
1499 | cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); | |
1500 | cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); | |
1501 | cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time); | |
1502 | cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time); | |
1503 | cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); | |
1504 | cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); | |
1505 | cmd->idle_time = __cpu_to_le32(arg->idle_time); | |
1506 | cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time); | |
1507 | cmd->probe_delay = __cpu_to_le32(arg->probe_delay); | |
1508 | cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); | |
1509 | ||
1510 | /* TLV list starts after fields included in the struct */ | |
1511 | off = sizeof(*cmd); | |
1512 | ||
1513 | if (arg->n_channels) { | |
1514 | channels = (void *)skb->data + off; | |
1515 | channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); | |
1516 | channels->num_chan = __cpu_to_le32(arg->n_channels); | |
1517 | ||
1518 | for (i = 0; i < arg->n_channels; i++) | |
1519 | channels->channel_list[i] = | |
1520 | __cpu_to_le32(arg->channels[i]); | |
1521 | ||
1522 | off += sizeof(*channels); | |
1523 | off += sizeof(__le32) * arg->n_channels; | |
1524 | } | |
1525 | ||
1526 | if (arg->n_ssids) { | |
1527 | ssids = (void *)skb->data + off; | |
1528 | ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); | |
1529 | ssids->num_ssids = __cpu_to_le32(arg->n_ssids); | |
1530 | ||
1531 | for (i = 0; i < arg->n_ssids; i++) { | |
1532 | ssids->ssids[i].ssid_len = | |
1533 | __cpu_to_le32(arg->ssids[i].len); | |
1534 | memcpy(&ssids->ssids[i].ssid, | |
1535 | arg->ssids[i].ssid, | |
1536 | arg->ssids[i].len); | |
1537 | } | |
1538 | ||
1539 | off += sizeof(*ssids); | |
1540 | off += sizeof(struct wmi_ssid) * arg->n_ssids; | |
1541 | } | |
1542 | ||
1543 | if (arg->n_bssids) { | |
1544 | bssids = (void *)skb->data + off; | |
1545 | bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); | |
1546 | bssids->num_bssid = __cpu_to_le32(arg->n_bssids); | |
1547 | ||
1548 | for (i = 0; i < arg->n_bssids; i++) | |
1549 | memcpy(&bssids->bssid_list[i], | |
1550 | arg->bssids[i].bssid, | |
1551 | ETH_ALEN); | |
1552 | ||
1553 | off += sizeof(*bssids); | |
1554 | off += sizeof(struct wmi_mac_addr) * arg->n_bssids; | |
1555 | } | |
1556 | ||
1557 | if (arg->ie_len) { | |
1558 | ie = (void *)skb->data + off; | |
1559 | ie->tag = __cpu_to_le32(WMI_IE_TAG); | |
1560 | ie->ie_len = __cpu_to_le32(arg->ie_len); | |
1561 | memcpy(ie->ie_data, arg->ie, arg->ie_len); | |
1562 | ||
1563 | off += sizeof(*ie); | |
1564 | off += roundup(arg->ie_len, 4); | |
1565 | } | |
1566 | ||
1567 | if (off != skb->len) { | |
1568 | dev_kfree_skb(skb); | |
1569 | return -EINVAL; | |
1570 | } | |
1571 | ||
1572 | ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n"); | |
1573 | return ath10k_wmi_cmd_send(ar, skb, WMI_START_SCAN_CMDID); | |
1574 | } | |
1575 | ||
1576 | void ath10k_wmi_start_scan_init(struct ath10k *ar, | |
1577 | struct wmi_start_scan_arg *arg) | |
1578 | { | |
1579 | /* setup commonly used values */ | |
1580 | arg->scan_req_id = 1; | |
1581 | arg->scan_priority = WMI_SCAN_PRIORITY_LOW; | |
1582 | arg->dwell_time_active = 50; | |
1583 | arg->dwell_time_passive = 150; | |
1584 | arg->min_rest_time = 50; | |
1585 | arg->max_rest_time = 500; | |
1586 | arg->repeat_probe_time = 0; | |
1587 | arg->probe_spacing_time = 0; | |
1588 | arg->idle_time = 0; | |
1589 | arg->max_scan_time = 5000; | |
1590 | arg->probe_delay = 5; | |
1591 | arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | |
1592 | | WMI_SCAN_EVENT_COMPLETED | |
1593 | | WMI_SCAN_EVENT_BSS_CHANNEL | |
1594 | | WMI_SCAN_EVENT_FOREIGN_CHANNEL | |
1595 | | WMI_SCAN_EVENT_DEQUEUED; | |
1596 | arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES; | |
1597 | arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; | |
1598 | arg->n_bssids = 1; | |
1599 | arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; | |
1600 | } | |
1601 | ||
1602 | int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg) | |
1603 | { | |
1604 | struct wmi_stop_scan_cmd *cmd; | |
1605 | struct sk_buff *skb; | |
1606 | u32 scan_id; | |
1607 | u32 req_id; | |
1608 | ||
1609 | if (arg->req_id > 0xFFF) | |
1610 | return -EINVAL; | |
1611 | if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) | |
1612 | return -EINVAL; | |
1613 | ||
1614 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1615 | if (!skb) | |
1616 | return -ENOMEM; | |
1617 | ||
1618 | scan_id = arg->u.scan_id; | |
1619 | scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; | |
1620 | ||
1621 | req_id = arg->req_id; | |
1622 | req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; | |
1623 | ||
1624 | cmd = (struct wmi_stop_scan_cmd *)skb->data; | |
1625 | cmd->req_type = __cpu_to_le32(arg->req_type); | |
1626 | cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); | |
1627 | cmd->scan_id = __cpu_to_le32(scan_id); | |
1628 | cmd->scan_req_id = __cpu_to_le32(req_id); | |
1629 | ||
1630 | ath10k_dbg(ATH10K_DBG_WMI, | |
1631 | "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", | |
1632 | arg->req_id, arg->req_type, arg->u.scan_id); | |
1633 | return ath10k_wmi_cmd_send(ar, skb, WMI_STOP_SCAN_CMDID); | |
1634 | } | |
1635 | ||
1636 | int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id, | |
1637 | enum wmi_vdev_type type, | |
1638 | enum wmi_vdev_subtype subtype, | |
1639 | const u8 macaddr[ETH_ALEN]) | |
1640 | { | |
1641 | struct wmi_vdev_create_cmd *cmd; | |
1642 | struct sk_buff *skb; | |
1643 | ||
1644 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1645 | if (!skb) | |
1646 | return -ENOMEM; | |
1647 | ||
1648 | cmd = (struct wmi_vdev_create_cmd *)skb->data; | |
1649 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1650 | cmd->vdev_type = __cpu_to_le32(type); | |
1651 | cmd->vdev_subtype = __cpu_to_le32(subtype); | |
1652 | memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN); | |
1653 | ||
1654 | ath10k_dbg(ATH10K_DBG_WMI, | |
1655 | "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", | |
1656 | vdev_id, type, subtype, macaddr); | |
1657 | ||
1658 | return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_CREATE_CMDID); | |
1659 | } | |
1660 | ||
1661 | int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id) | |
1662 | { | |
1663 | struct wmi_vdev_delete_cmd *cmd; | |
1664 | struct sk_buff *skb; | |
1665 | ||
1666 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1667 | if (!skb) | |
1668 | return -ENOMEM; | |
1669 | ||
1670 | cmd = (struct wmi_vdev_delete_cmd *)skb->data; | |
1671 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1672 | ||
1673 | ath10k_dbg(ATH10K_DBG_WMI, | |
1674 | "WMI vdev delete id %d\n", vdev_id); | |
1675 | ||
1676 | return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_DELETE_CMDID); | |
1677 | } | |
1678 | ||
1679 | static int ath10k_wmi_vdev_start_restart(struct ath10k *ar, | |
1680 | const struct wmi_vdev_start_request_arg *arg, | |
1681 | enum wmi_cmd_id cmd_id) | |
1682 | { | |
1683 | struct wmi_vdev_start_request_cmd *cmd; | |
1684 | struct sk_buff *skb; | |
1685 | const char *cmdname; | |
1686 | u32 flags = 0; | |
1687 | ||
1688 | if (cmd_id != WMI_VDEV_START_REQUEST_CMDID && | |
1689 | cmd_id != WMI_VDEV_RESTART_REQUEST_CMDID) | |
1690 | return -EINVAL; | |
1691 | if (WARN_ON(arg->ssid && arg->ssid_len == 0)) | |
1692 | return -EINVAL; | |
1693 | if (WARN_ON(arg->hidden_ssid && !arg->ssid)) | |
1694 | return -EINVAL; | |
1695 | if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) | |
1696 | return -EINVAL; | |
1697 | ||
1698 | if (cmd_id == WMI_VDEV_START_REQUEST_CMDID) | |
1699 | cmdname = "start"; | |
1700 | else if (cmd_id == WMI_VDEV_RESTART_REQUEST_CMDID) | |
1701 | cmdname = "restart"; | |
1702 | else | |
1703 | return -EINVAL; /* should not happen, we already check cmd_id */ | |
1704 | ||
1705 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1706 | if (!skb) | |
1707 | return -ENOMEM; | |
1708 | ||
1709 | if (arg->hidden_ssid) | |
1710 | flags |= WMI_VDEV_START_HIDDEN_SSID; | |
1711 | if (arg->pmf_enabled) | |
1712 | flags |= WMI_VDEV_START_PMF_ENABLED; | |
1713 | ||
1714 | cmd = (struct wmi_vdev_start_request_cmd *)skb->data; | |
1715 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
1716 | cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); | |
1717 | cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); | |
1718 | cmd->dtim_period = __cpu_to_le32(arg->dtim_period); | |
1719 | cmd->flags = __cpu_to_le32(flags); | |
1720 | cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); | |
1721 | cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); | |
1722 | ||
1723 | if (arg->ssid) { | |
1724 | cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); | |
1725 | memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); | |
1726 | } | |
1727 | ||
1728 | cmd->chan.mhz = __cpu_to_le32(arg->channel.freq); | |
1729 | ||
1730 | cmd->chan.band_center_freq1 = | |
1731 | __cpu_to_le32(arg->channel.band_center_freq1); | |
1732 | ||
1733 | cmd->chan.mode = arg->channel.mode; | |
1734 | cmd->chan.min_power = arg->channel.min_power; | |
1735 | cmd->chan.max_power = arg->channel.max_power; | |
1736 | cmd->chan.reg_power = arg->channel.max_reg_power; | |
1737 | cmd->chan.reg_classid = arg->channel.reg_class_id; | |
1738 | cmd->chan.antenna_max = arg->channel.max_antenna_gain; | |
1739 | ||
1740 | ath10k_dbg(ATH10K_DBG_WMI, | |
1741 | "wmi vdev %s id 0x%x freq %d, mode %d, ch_flags: 0x%0X," | |
1742 | "max_power: %d\n", cmdname, arg->vdev_id, arg->channel.freq, | |
1743 | arg->channel.mode, flags, arg->channel.max_power); | |
1744 | ||
1745 | return ath10k_wmi_cmd_send(ar, skb, cmd_id); | |
1746 | } | |
1747 | ||
1748 | int ath10k_wmi_vdev_start(struct ath10k *ar, | |
1749 | const struct wmi_vdev_start_request_arg *arg) | |
1750 | { | |
1751 | return ath10k_wmi_vdev_start_restart(ar, arg, | |
1752 | WMI_VDEV_START_REQUEST_CMDID); | |
1753 | } | |
1754 | ||
1755 | int ath10k_wmi_vdev_restart(struct ath10k *ar, | |
1756 | const struct wmi_vdev_start_request_arg *arg) | |
1757 | { | |
1758 | return ath10k_wmi_vdev_start_restart(ar, arg, | |
1759 | WMI_VDEV_RESTART_REQUEST_CMDID); | |
1760 | } | |
1761 | ||
1762 | int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id) | |
1763 | { | |
1764 | struct wmi_vdev_stop_cmd *cmd; | |
1765 | struct sk_buff *skb; | |
1766 | ||
1767 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1768 | if (!skb) | |
1769 | return -ENOMEM; | |
1770 | ||
1771 | cmd = (struct wmi_vdev_stop_cmd *)skb->data; | |
1772 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1773 | ||
1774 | ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); | |
1775 | ||
1776 | return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_STOP_CMDID); | |
1777 | } | |
1778 | ||
1779 | int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid) | |
1780 | { | |
1781 | struct wmi_vdev_up_cmd *cmd; | |
1782 | struct sk_buff *skb; | |
1783 | ||
1784 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1785 | if (!skb) | |
1786 | return -ENOMEM; | |
1787 | ||
1788 | cmd = (struct wmi_vdev_up_cmd *)skb->data; | |
1789 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1790 | cmd->vdev_assoc_id = __cpu_to_le32(aid); | |
1791 | memcpy(&cmd->vdev_bssid.addr, bssid, 6); | |
1792 | ||
1793 | ath10k_dbg(ATH10K_DBG_WMI, | |
1794 | "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", | |
1795 | vdev_id, aid, bssid); | |
1796 | ||
1797 | return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_UP_CMDID); | |
1798 | } | |
1799 | ||
1800 | int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id) | |
1801 | { | |
1802 | struct wmi_vdev_down_cmd *cmd; | |
1803 | struct sk_buff *skb; | |
1804 | ||
1805 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1806 | if (!skb) | |
1807 | return -ENOMEM; | |
1808 | ||
1809 | cmd = (struct wmi_vdev_down_cmd *)skb->data; | |
1810 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1811 | ||
1812 | ath10k_dbg(ATH10K_DBG_WMI, | |
1813 | "wmi mgmt vdev down id 0x%x\n", vdev_id); | |
1814 | ||
1815 | return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_DOWN_CMDID); | |
1816 | } | |
1817 | ||
1818 | int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id, | |
1819 | enum wmi_vdev_param param_id, u32 param_value) | |
1820 | { | |
1821 | struct wmi_vdev_set_param_cmd *cmd; | |
1822 | struct sk_buff *skb; | |
1823 | ||
1824 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1825 | if (!skb) | |
1826 | return -ENOMEM; | |
1827 | ||
1828 | cmd = (struct wmi_vdev_set_param_cmd *)skb->data; | |
1829 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1830 | cmd->param_id = __cpu_to_le32(param_id); | |
1831 | cmd->param_value = __cpu_to_le32(param_value); | |
1832 | ||
1833 | ath10k_dbg(ATH10K_DBG_WMI, | |
1834 | "wmi vdev id 0x%x set param %d value %d\n", | |
1835 | vdev_id, param_id, param_value); | |
1836 | ||
1837 | return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_SET_PARAM_CMDID); | |
1838 | } | |
1839 | ||
1840 | int ath10k_wmi_vdev_install_key(struct ath10k *ar, | |
1841 | const struct wmi_vdev_install_key_arg *arg) | |
1842 | { | |
1843 | struct wmi_vdev_install_key_cmd *cmd; | |
1844 | struct sk_buff *skb; | |
1845 | ||
1846 | if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) | |
1847 | return -EINVAL; | |
1848 | if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) | |
1849 | return -EINVAL; | |
1850 | ||
1851 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len); | |
1852 | if (!skb) | |
1853 | return -ENOMEM; | |
1854 | ||
1855 | cmd = (struct wmi_vdev_install_key_cmd *)skb->data; | |
1856 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
1857 | cmd->key_idx = __cpu_to_le32(arg->key_idx); | |
1858 | cmd->key_flags = __cpu_to_le32(arg->key_flags); | |
1859 | cmd->key_cipher = __cpu_to_le32(arg->key_cipher); | |
1860 | cmd->key_len = __cpu_to_le32(arg->key_len); | |
1861 | cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); | |
1862 | cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); | |
1863 | ||
1864 | if (arg->macaddr) | |
1865 | memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN); | |
1866 | if (arg->key_data) | |
1867 | memcpy(cmd->key_data, arg->key_data, arg->key_len); | |
1868 | ||
e0c508ab MK |
1869 | ath10k_dbg(ATH10K_DBG_WMI, |
1870 | "wmi vdev install key idx %d cipher %d len %d\n", | |
1871 | arg->key_idx, arg->key_cipher, arg->key_len); | |
5e3dd157 KV |
1872 | return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_INSTALL_KEY_CMDID); |
1873 | } | |
1874 | ||
1875 | int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id, | |
1876 | const u8 peer_addr[ETH_ALEN]) | |
1877 | { | |
1878 | struct wmi_peer_create_cmd *cmd; | |
1879 | struct sk_buff *skb; | |
1880 | ||
1881 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1882 | if (!skb) | |
1883 | return -ENOMEM; | |
1884 | ||
1885 | cmd = (struct wmi_peer_create_cmd *)skb->data; | |
1886 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1887 | memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN); | |
1888 | ||
1889 | ath10k_dbg(ATH10K_DBG_WMI, | |
1890 | "wmi peer create vdev_id %d peer_addr %pM\n", | |
1891 | vdev_id, peer_addr); | |
1892 | return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_CREATE_CMDID); | |
1893 | } | |
1894 | ||
1895 | int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id, | |
1896 | const u8 peer_addr[ETH_ALEN]) | |
1897 | { | |
1898 | struct wmi_peer_delete_cmd *cmd; | |
1899 | struct sk_buff *skb; | |
1900 | ||
1901 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1902 | if (!skb) | |
1903 | return -ENOMEM; | |
1904 | ||
1905 | cmd = (struct wmi_peer_delete_cmd *)skb->data; | |
1906 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1907 | memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN); | |
1908 | ||
1909 | ath10k_dbg(ATH10K_DBG_WMI, | |
1910 | "wmi peer delete vdev_id %d peer_addr %pM\n", | |
1911 | vdev_id, peer_addr); | |
1912 | return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_DELETE_CMDID); | |
1913 | } | |
1914 | ||
1915 | int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id, | |
1916 | const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) | |
1917 | { | |
1918 | struct wmi_peer_flush_tids_cmd *cmd; | |
1919 | struct sk_buff *skb; | |
1920 | ||
1921 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1922 | if (!skb) | |
1923 | return -ENOMEM; | |
1924 | ||
1925 | cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; | |
1926 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1927 | cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); | |
1928 | memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN); | |
1929 | ||
1930 | ath10k_dbg(ATH10K_DBG_WMI, | |
1931 | "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", | |
1932 | vdev_id, peer_addr, tid_bitmap); | |
1933 | return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_FLUSH_TIDS_CMDID); | |
1934 | } | |
1935 | ||
1936 | int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id, | |
1937 | const u8 *peer_addr, enum wmi_peer_param param_id, | |
1938 | u32 param_value) | |
1939 | { | |
1940 | struct wmi_peer_set_param_cmd *cmd; | |
1941 | struct sk_buff *skb; | |
1942 | ||
1943 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1944 | if (!skb) | |
1945 | return -ENOMEM; | |
1946 | ||
1947 | cmd = (struct wmi_peer_set_param_cmd *)skb->data; | |
1948 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1949 | cmd->param_id = __cpu_to_le32(param_id); | |
1950 | cmd->param_value = __cpu_to_le32(param_value); | |
1951 | memcpy(&cmd->peer_macaddr.addr, peer_addr, 6); | |
1952 | ||
1953 | ath10k_dbg(ATH10K_DBG_WMI, | |
1954 | "wmi vdev %d peer 0x%pM set param %d value %d\n", | |
1955 | vdev_id, peer_addr, param_id, param_value); | |
1956 | ||
1957 | return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_SET_PARAM_CMDID); | |
1958 | } | |
1959 | ||
1960 | int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id, | |
1961 | enum wmi_sta_ps_mode psmode) | |
1962 | { | |
1963 | struct wmi_sta_powersave_mode_cmd *cmd; | |
1964 | struct sk_buff *skb; | |
1965 | ||
1966 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1967 | if (!skb) | |
1968 | return -ENOMEM; | |
1969 | ||
1970 | cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; | |
1971 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1972 | cmd->sta_ps_mode = __cpu_to_le32(psmode); | |
1973 | ||
1974 | ath10k_dbg(ATH10K_DBG_WMI, | |
1975 | "wmi set powersave id 0x%x mode %d\n", | |
1976 | vdev_id, psmode); | |
1977 | ||
1978 | return ath10k_wmi_cmd_send(ar, skb, WMI_STA_POWERSAVE_MODE_CMDID); | |
1979 | } | |
1980 | ||
1981 | int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id, | |
1982 | enum wmi_sta_powersave_param param_id, | |
1983 | u32 value) | |
1984 | { | |
1985 | struct wmi_sta_powersave_param_cmd *cmd; | |
1986 | struct sk_buff *skb; | |
1987 | ||
1988 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
1989 | if (!skb) | |
1990 | return -ENOMEM; | |
1991 | ||
1992 | cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; | |
1993 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
1994 | cmd->param_id = __cpu_to_le32(param_id); | |
1995 | cmd->param_value = __cpu_to_le32(value); | |
1996 | ||
1997 | ath10k_dbg(ATH10K_DBG_WMI, | |
1998 | "wmi sta ps param vdev_id 0x%x param %d value %d\n", | |
1999 | vdev_id, param_id, value); | |
2000 | return ath10k_wmi_cmd_send(ar, skb, WMI_STA_POWERSAVE_PARAM_CMDID); | |
2001 | } | |
2002 | ||
2003 | int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |
2004 | enum wmi_ap_ps_peer_param param_id, u32 value) | |
2005 | { | |
2006 | struct wmi_ap_ps_peer_cmd *cmd; | |
2007 | struct sk_buff *skb; | |
2008 | ||
2009 | if (!mac) | |
2010 | return -EINVAL; | |
2011 | ||
2012 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
2013 | if (!skb) | |
2014 | return -ENOMEM; | |
2015 | ||
2016 | cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; | |
2017 | cmd->vdev_id = __cpu_to_le32(vdev_id); | |
2018 | cmd->param_id = __cpu_to_le32(param_id); | |
2019 | cmd->param_value = __cpu_to_le32(value); | |
2020 | memcpy(&cmd->peer_macaddr, mac, ETH_ALEN); | |
2021 | ||
2022 | ath10k_dbg(ATH10K_DBG_WMI, | |
2023 | "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", | |
2024 | vdev_id, param_id, value, mac); | |
2025 | ||
2026 | return ath10k_wmi_cmd_send(ar, skb, WMI_AP_PS_PEER_PARAM_CMDID); | |
2027 | } | |
2028 | ||
2029 | int ath10k_wmi_scan_chan_list(struct ath10k *ar, | |
2030 | const struct wmi_scan_chan_list_arg *arg) | |
2031 | { | |
2032 | struct wmi_scan_chan_list_cmd *cmd; | |
2033 | struct sk_buff *skb; | |
2034 | struct wmi_channel_arg *ch; | |
2035 | struct wmi_channel *ci; | |
2036 | int len; | |
2037 | int i; | |
2038 | ||
2039 | len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); | |
2040 | ||
2041 | skb = ath10k_wmi_alloc_skb(len); | |
2042 | if (!skb) | |
2043 | return -EINVAL; | |
2044 | ||
2045 | cmd = (struct wmi_scan_chan_list_cmd *)skb->data; | |
2046 | cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); | |
2047 | ||
2048 | for (i = 0; i < arg->n_channels; i++) { | |
2049 | u32 flags = 0; | |
2050 | ||
2051 | ch = &arg->channels[i]; | |
2052 | ci = &cmd->chan_info[i]; | |
2053 | ||
2054 | if (ch->passive) | |
2055 | flags |= WMI_CHAN_FLAG_PASSIVE; | |
2056 | if (ch->allow_ibss) | |
2057 | flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; | |
2058 | if (ch->allow_ht) | |
2059 | flags |= WMI_CHAN_FLAG_ALLOW_HT; | |
2060 | if (ch->allow_vht) | |
2061 | flags |= WMI_CHAN_FLAG_ALLOW_VHT; | |
2062 | if (ch->ht40plus) | |
2063 | flags |= WMI_CHAN_FLAG_HT40_PLUS; | |
2064 | ||
2065 | ci->mhz = __cpu_to_le32(ch->freq); | |
2066 | ci->band_center_freq1 = __cpu_to_le32(ch->freq); | |
2067 | ci->band_center_freq2 = 0; | |
2068 | ci->min_power = ch->min_power; | |
2069 | ci->max_power = ch->max_power; | |
2070 | ci->reg_power = ch->max_reg_power; | |
2071 | ci->antenna_max = ch->max_antenna_gain; | |
2072 | ci->antenna_max = 0; | |
2073 | ||
2074 | /* mode & flags share storage */ | |
2075 | ci->mode = ch->mode; | |
2076 | ci->flags |= __cpu_to_le32(flags); | |
2077 | } | |
2078 | ||
2079 | return ath10k_wmi_cmd_send(ar, skb, WMI_SCAN_CHAN_LIST_CMDID); | |
2080 | } | |
2081 | ||
2082 | int ath10k_wmi_peer_assoc(struct ath10k *ar, | |
2083 | const struct wmi_peer_assoc_complete_arg *arg) | |
2084 | { | |
2085 | struct wmi_peer_assoc_complete_cmd *cmd; | |
2086 | struct sk_buff *skb; | |
2087 | ||
2088 | if (arg->peer_mpdu_density > 16) | |
2089 | return -EINVAL; | |
2090 | if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) | |
2091 | return -EINVAL; | |
2092 | if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) | |
2093 | return -EINVAL; | |
2094 | ||
2095 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
2096 | if (!skb) | |
2097 | return -ENOMEM; | |
2098 | ||
2099 | cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data; | |
2100 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | |
2101 | cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); | |
2102 | cmd->peer_associd = __cpu_to_le32(arg->peer_aid); | |
2103 | cmd->peer_flags = __cpu_to_le32(arg->peer_flags); | |
2104 | cmd->peer_caps = __cpu_to_le32(arg->peer_caps); | |
2105 | cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); | |
2106 | cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); | |
2107 | cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); | |
2108 | cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); | |
2109 | cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); | |
2110 | cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); | |
2111 | cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); | |
2112 | cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); | |
2113 | ||
2114 | memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN); | |
2115 | ||
2116 | cmd->peer_legacy_rates.num_rates = | |
2117 | __cpu_to_le32(arg->peer_legacy_rates.num_rates); | |
2118 | memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, | |
2119 | arg->peer_legacy_rates.num_rates); | |
2120 | ||
2121 | cmd->peer_ht_rates.num_rates = | |
2122 | __cpu_to_le32(arg->peer_ht_rates.num_rates); | |
2123 | memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, | |
2124 | arg->peer_ht_rates.num_rates); | |
2125 | ||
2126 | cmd->peer_vht_rates.rx_max_rate = | |
2127 | __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); | |
2128 | cmd->peer_vht_rates.rx_mcs_set = | |
2129 | __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); | |
2130 | cmd->peer_vht_rates.tx_max_rate = | |
2131 | __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); | |
2132 | cmd->peer_vht_rates.tx_mcs_set = | |
2133 | __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); | |
2134 | ||
e0c508ab MK |
2135 | ath10k_dbg(ATH10K_DBG_WMI, |
2136 | "wmi peer assoc vdev %d addr %pM\n", | |
2137 | arg->vdev_id, arg->addr); | |
5e3dd157 KV |
2138 | return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_ASSOC_CMDID); |
2139 | } | |
2140 | ||
2141 | int ath10k_wmi_beacon_send(struct ath10k *ar, const struct wmi_bcn_tx_arg *arg) | |
2142 | { | |
2143 | struct wmi_bcn_tx_cmd *cmd; | |
2144 | struct sk_buff *skb; | |
2145 | ||
2146 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->bcn_len); | |
2147 | if (!skb) | |
2148 | return -ENOMEM; | |
2149 | ||
2150 | cmd = (struct wmi_bcn_tx_cmd *)skb->data; | |
2151 | cmd->hdr.vdev_id = __cpu_to_le32(arg->vdev_id); | |
2152 | cmd->hdr.tx_rate = __cpu_to_le32(arg->tx_rate); | |
2153 | cmd->hdr.tx_power = __cpu_to_le32(arg->tx_power); | |
2154 | cmd->hdr.bcn_len = __cpu_to_le32(arg->bcn_len); | |
2155 | memcpy(cmd->bcn, arg->bcn, arg->bcn_len); | |
2156 | ||
2157 | return ath10k_wmi_cmd_send(ar, skb, WMI_BCN_TX_CMDID); | |
2158 | } | |
2159 | ||
2160 | static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params, | |
2161 | const struct wmi_wmm_params_arg *arg) | |
2162 | { | |
2163 | params->cwmin = __cpu_to_le32(arg->cwmin); | |
2164 | params->cwmax = __cpu_to_le32(arg->cwmax); | |
2165 | params->aifs = __cpu_to_le32(arg->aifs); | |
2166 | params->txop = __cpu_to_le32(arg->txop); | |
2167 | params->acm = __cpu_to_le32(arg->acm); | |
2168 | params->no_ack = __cpu_to_le32(arg->no_ack); | |
2169 | } | |
2170 | ||
2171 | int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar, | |
2172 | const struct wmi_pdev_set_wmm_params_arg *arg) | |
2173 | { | |
2174 | struct wmi_pdev_set_wmm_params *cmd; | |
2175 | struct sk_buff *skb; | |
2176 | ||
2177 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
2178 | if (!skb) | |
2179 | return -ENOMEM; | |
2180 | ||
2181 | cmd = (struct wmi_pdev_set_wmm_params *)skb->data; | |
2182 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be); | |
2183 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); | |
2184 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); | |
2185 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); | |
2186 | ||
2187 | ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); | |
2188 | return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_WMM_PARAMS_CMDID); | |
2189 | } | |
2190 | ||
2191 | int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id) | |
2192 | { | |
2193 | struct wmi_request_stats_cmd *cmd; | |
2194 | struct sk_buff *skb; | |
2195 | ||
2196 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
2197 | if (!skb) | |
2198 | return -ENOMEM; | |
2199 | ||
2200 | cmd = (struct wmi_request_stats_cmd *)skb->data; | |
2201 | cmd->stats_id = __cpu_to_le32(stats_id); | |
2202 | ||
2203 | ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id); | |
2204 | return ath10k_wmi_cmd_send(ar, skb, WMI_REQUEST_STATS_CMDID); | |
2205 | } | |
9cfbce75 MK |
2206 | |
2207 | int ath10k_wmi_force_fw_hang(struct ath10k *ar, | |
2208 | enum wmi_force_fw_hang_type type, u32 delay_ms) | |
2209 | { | |
2210 | struct wmi_force_fw_hang_cmd *cmd; | |
2211 | struct sk_buff *skb; | |
2212 | ||
2213 | skb = ath10k_wmi_alloc_skb(sizeof(*cmd)); | |
2214 | if (!skb) | |
2215 | return -ENOMEM; | |
2216 | ||
2217 | cmd = (struct wmi_force_fw_hang_cmd *)skb->data; | |
2218 | cmd->type = __cpu_to_le32(type); | |
2219 | cmd->delay_ms = __cpu_to_le32(delay_ms); | |
2220 | ||
2221 | ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", | |
2222 | type, delay_ms); | |
2223 | return ath10k_wmi_cmd_send(ar, skb, WMI_FORCE_FW_HANG_CMDID); | |
2224 | } |