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ath10k: don't rebuild all the time
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
25#include "mac.h"
43d2a30f 26#include "testmode.h"
5e3dd157 27
ce42870e
BM		 28/* MAIN WMI cmd track */
29static struct wmi_cmd_map wmi_cmd_map = {
30 .init_cmdid = WMI_INIT_CMDID,
31 .start_scan_cmdid = WMI_START_SCAN_CMDID,
32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
35 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
36 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
37 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
38 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
39 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
40 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
41 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
42 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
43 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
44 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
45 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
46 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
47 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
48 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
49 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
50 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
51 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
52 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
53 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
54 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
55 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
56 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
57 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
58 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
59 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
60 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
61 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
62 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
63 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
64 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
65 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
66 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
67 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
68 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
69 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
70 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
71 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
72 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
73 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
74 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
75 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
76 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
77 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
78 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
79 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
80 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
81 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
82 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
83 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
84 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
85 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
86 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
87 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
89 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
90 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
91 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
92 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
93 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
94 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
95 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
96 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
97 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
98 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
99 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
100 .wlan_profile_set_hist_intvl_cmdid =
101 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
102 .wlan_profile_get_profile_data_cmdid =
103 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
104 .wlan_profile_enable_profile_id_cmdid =
105 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
106 .wlan_profile_list_profile_id_cmdid =
107 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
108 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
109 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
110 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
111 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
112 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
113 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
114 .wow_enable_disable_wake_event_cmdid =
115 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
116 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
117 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
118 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
119 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
120 .vdev_spectral_scan_configure_cmdid =
121 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
122 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
123 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
124 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
125 .network_list_offload_config_cmdid =
126 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
127 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
128 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
129 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
130 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
131 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
132 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
133 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
134 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
135 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
136 .echo_cmdid = WMI_ECHO_CMDID,
137 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
138 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
139 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
140 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
141 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
142 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
143 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
144 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
145 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
146};
147
b7e3adf9
BM		 148/* 10.X WMI cmd track */
149static struct wmi_cmd_map wmi_10x_cmd_map = {
150 .init_cmdid = WMI_10X_INIT_CMDID,
151 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
152 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
153 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 154 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 155 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
156 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
157 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
158 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
159 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
160 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
161 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
162 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
163 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
164 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
165 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
166 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
167 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
168 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
169 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
170 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
171 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
172 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
173 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
174 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
175 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
176 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
177 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
178 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
179 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
180 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
181 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
182 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
183 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
184 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
185 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
186 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 187 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 188 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
189 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
190 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 191 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 192 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
193 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
194 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
195 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
196 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
197 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
198 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
199 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
200 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
201 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
202 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
203 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
204 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
205 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
206 .roam_scan_rssi_change_threshold =
207 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
208 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
209 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
210 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
211 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
212 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
213 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
214 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
215 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 216 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 217 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 218 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 219 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
220 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
221 .wlan_profile_set_hist_intvl_cmdid =
222 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
223 .wlan_profile_get_profile_data_cmdid =
224 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
225 .wlan_profile_enable_profile_id_cmdid =
226 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
227 .wlan_profile_list_profile_id_cmdid =
228 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
229 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
230 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
231 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
232 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
233 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
234 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
235 .wow_enable_disable_wake_event_cmdid =
236 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
237 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
238 .wow_hostwakeup_from_sleep_cmdid =
239 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
240 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
241 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
242 .vdev_spectral_scan_configure_cmdid =
243 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
244 .vdev_spectral_scan_enable_cmdid =
245 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
246 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 247 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
248 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
249 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
251 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
252 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
254 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
257 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 258 .echo_cmdid = WMI_10X_ECHO_CMDID,
259 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
260 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
261 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 262 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
265 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 266 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
267 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
268};
ce42870e 269
6d1506e7
BM		 270/* MAIN WMI VDEV param map */
271static struct wmi_vdev_param_map wmi_vdev_param_map = {
272 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
273 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
274 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
275 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
276 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
277 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
278 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
279 .preamble = WMI_VDEV_PARAM_PREAMBLE,
280 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
281 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
282 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
283 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
284 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
285 .wmi_vdev_oc_scheduler_air_time_limit =
286 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
287 .wds = WMI_VDEV_PARAM_WDS,
288 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
289 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
290 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
291 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
292 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
293 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
294 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
295 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
296 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
297 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
298 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
299 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
300 .sgi = WMI_VDEV_PARAM_SGI,
301 .ldpc = WMI_VDEV_PARAM_LDPC,
302 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
303 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
304 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
305 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
306 .nss = WMI_VDEV_PARAM_NSS,
307 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
308 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
309 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
310 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
311 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
312 .ap_keepalive_min_idle_inactive_time_secs =
313 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
314 .ap_keepalive_max_idle_inactive_time_secs =
315 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
316 .ap_keepalive_max_unresponsive_time_secs =
317 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
318 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
319 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
320 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
321 .txbf = WMI_VDEV_PARAM_TXBF,
322 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
323 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
324 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
325 .ap_detect_out_of_sync_sleeping_sta_time_secs =
326 WMI_VDEV_PARAM_UNSUPPORTED,
327};
328
329/* 10.X WMI VDEV param map */
330static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
331 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
332 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
333 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
334 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
335 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
336 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
337 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
338 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
339 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
340 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
341 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
342 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
343 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
344 .wmi_vdev_oc_scheduler_air_time_limit =
345 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
346 .wds = WMI_10X_VDEV_PARAM_WDS,
347 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
348 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
349 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
351 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
352 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
353 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
354 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
355 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
356 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
357 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
358 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
359 .sgi = WMI_10X_VDEV_PARAM_SGI,
360 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
361 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
362 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
363 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
364 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
365 .nss = WMI_10X_VDEV_PARAM_NSS,
366 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
367 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
368 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
369 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
370 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
371 .ap_keepalive_min_idle_inactive_time_secs =
372 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
373 .ap_keepalive_max_idle_inactive_time_secs =
374 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
375 .ap_keepalive_max_unresponsive_time_secs =
376 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
377 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
378 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
379 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
380 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
381 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
382 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
383 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
384 .ap_detect_out_of_sync_sleeping_sta_time_secs =
385 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
386};
387
226a339b
BM		 388static struct wmi_pdev_param_map wmi_pdev_param_map = {
389 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
390 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
391 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
392 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
393 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
394 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
395 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
396 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
397 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
398 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
399 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
400 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
401 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
402 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
403 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
404 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
405 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
406 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
407 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
408 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
409 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
410 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
411 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
412 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
413 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
414 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
415 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
417 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
418 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
419 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
420 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
421 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
422 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
423 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
226a339b
BM		 424 .dcs = WMI_PDEV_PARAM_DCS,
425 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
426 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
427 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
428 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
429 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
430 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
431 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
432 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
433 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
434 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
436 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
437};
438
439static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
440 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
441 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
442 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
443 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
444 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
445 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
446 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
447 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
448 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
449 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
450 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
451 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
452 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
453 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
454 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
455 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
456 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
457 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
458 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
459 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
460 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
461 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
462 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
463 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
464 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
465 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
469 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
470 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
471 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
472 .bcnflt_stats_update_period =
473 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
474 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 475 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 476 .dcs = WMI_10X_PDEV_PARAM_DCS,
477 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
478 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
479 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
480 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
481 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
482 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
483 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
484 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
485 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
486 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
487 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
488 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
489};
490
24c88f78
MK		 491/* firmware 10.2 specific mappings */
492static struct wmi_cmd_map wmi_10_2_cmd_map = {
493 .init_cmdid = WMI_10_2_INIT_CMDID,
494 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
495 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
496 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
497 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
499 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
500 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
501 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
502 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
503 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
504 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
505 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
506 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
507 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
508 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
509 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
510 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
511 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
512 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
513 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
514 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
515 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
516 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
517 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
518 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
519 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
520 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
521 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
522 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
523 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
524 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
525 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
526 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
527 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
528 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
529 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
530 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
531 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
532 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
533 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
534 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
535 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
536 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
537 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
538 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
539 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
540 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
541 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
542 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
543 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
544 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
545 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
546 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
547 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
548 .roam_scan_rssi_change_threshold =
549 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
550 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
551 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
552 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
553 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
554 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
555 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
556 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
557 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
558 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
559 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
560 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
561 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
562 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
563 .wlan_profile_set_hist_intvl_cmdid =
564 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
565 .wlan_profile_get_profile_data_cmdid =
566 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
567 .wlan_profile_enable_profile_id_cmdid =
568 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
569 .wlan_profile_list_profile_id_cmdid =
570 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
571 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
572 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
573 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
574 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
575 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
576 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
577 .wow_enable_disable_wake_event_cmdid =
578 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
579 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
580 .wow_hostwakeup_from_sleep_cmdid =
581 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
582 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
583 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
584 .vdev_spectral_scan_configure_cmdid =
585 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
586 .vdev_spectral_scan_enable_cmdid =
587 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
588 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
589 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
590 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
591 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
592 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
593 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
594 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
595 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
596 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
597 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
598 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
599 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
600 .echo_cmdid = WMI_10_2_ECHO_CMDID,
601 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
602 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
603 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
604 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
605 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
606 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
607 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
608 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
609 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
610};
611
2d66721c
MK		 612static void
613ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
614 const struct wmi_channel_arg *arg)
615{
616 u32 flags = 0;
617
618 memset(ch, 0, sizeof(*ch));
619
620 if (arg->passive)
621 flags |= WMI_CHAN_FLAG_PASSIVE;
622 if (arg->allow_ibss)
623 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
624 if (arg->allow_ht)
625 flags |= WMI_CHAN_FLAG_ALLOW_HT;
626 if (arg->allow_vht)
627 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
628 if (arg->ht40plus)
629 flags |= WMI_CHAN_FLAG_HT40_PLUS;
630 if (arg->chan_radar)
631 flags |= WMI_CHAN_FLAG_DFS;
632
633 ch->mhz = __cpu_to_le32(arg->freq);
634 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
635 ch->band_center_freq2 = 0;
636 ch->min_power = arg->min_power;
637 ch->max_power = arg->max_power;
638 ch->reg_power = arg->max_reg_power;
639 ch->antenna_max = arg->max_antenna_gain;
640
641 /* mode & flags share storage */
642 ch->mode = arg->mode;
643 ch->flags |= __cpu_to_le32(flags);
644}
645
5e3dd157
KV		 646int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
647{
648 int ret;
af762c0b 649
5e3dd157
KV		 650 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
651 WMI_SERVICE_READY_TIMEOUT_HZ);
652 return ret;
653}
654
655int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
656{
657 int ret;
af762c0b 658
5e3dd157
KV		 659 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
660 WMI_UNIFIED_READY_TIMEOUT_HZ);
661 return ret;
662}
663
666a73f3 664struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV		 665{
666 struct sk_buff *skb;
667 u32 round_len = roundup(len, 4);
668
7aa7a72a 669 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV		 670 if (!skb)
671 return NULL;
672
673 skb_reserve(skb, WMI_SKB_HEADROOM);
674 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 675 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV		 676
677 skb_put(skb, round_len);
678 memset(skb->data, 0, round_len);
679
680 return skb;
681}
682
683static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
684{
685 dev_kfree_skb(skb);
5e3dd157
KV		 686}
687
be8b3943 688static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
ce42870e 689 u32 cmd_id)
5e3dd157
KV		 690{
691 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
692 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 693 int ret;
5e3dd157
KV		 694 u32 cmd = 0;
695
696 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
697 return -ENOMEM;
698
699 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
700
701 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
702 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
703
5e3dd157 704 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 705 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 706 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 707
be8b3943
MK		 708 if (ret)
709 goto err_pull;
5e3dd157 710
be8b3943
MK		 711 return 0;
712
713err_pull:
714 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
715 return ret;
716}
717
ed54388a
MK		 718static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
719{
ed54388a
MK		 720 int ret;
721
722 lockdep_assert_held(&arvif->ar->data_lock);
723
724 if (arvif->beacon == NULL)
725 return;
726
748afc47
MK		 727 if (arvif->beacon_sent)
728 return;
ed54388a 729
748afc47 730 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
ed54388a
MK		 731 if (ret)
732 return;
733
748afc47
MK		 734 /* We need to retain the arvif->beacon reference for DMA unmapping and
735 * freeing the skbuff later. */
736 arvif->beacon_sent = true;
ed54388a
MK		 737}
738
739static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
740 struct ieee80211_vif *vif)
741{
742 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
743
744 ath10k_wmi_tx_beacon_nowait(arvif);
745}
746
747static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
748{
749 spin_lock_bh(&ar->data_lock);
750 ieee80211_iterate_active_interfaces_atomic(ar->hw,
751 IEEE80211_IFACE_ITER_NORMAL,
752 ath10k_wmi_tx_beacons_iter,
753 NULL);
754 spin_unlock_bh(&ar->data_lock);
755}
756
12acbc43 757static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 758{
ed54388a
MK		 759 /* try to send pending beacons first. they take priority */
760 ath10k_wmi_tx_beacons_nowait(ar);
761
be8b3943
MK		 762 wake_up(&ar->wmi.tx_credits_wq);
763}
764
666a73f3 765int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 766{
34957b25 767 int ret = -EOPNOTSUPP;
be8b3943 768
56b84287
KV		 769 might_sleep();
770
34957b25 771 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 772 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM		 773 cmd_id);
774 return ret;
775 }
be8b3943
MK		 776
777 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 778 /* try to send pending beacons first. they take priority */
779 ath10k_wmi_tx_beacons_nowait(ar);
780
be8b3943 781 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
7962b0d8
MK		 782
783 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
784 ret = -ESHUTDOWN;
785
be8b3943
MK		 786 (ret != -EAGAIN);
787 }), 3*HZ);
788
789 if (ret)
5e3dd157 790 dev_kfree_skb_any(skb);
5e3dd157 791
be8b3943 792 return ret;
5e3dd157
KV		 793}
794
5e00d31a
BM		 795int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
796{
797 int ret = 0;
798 struct wmi_mgmt_tx_cmd *cmd;
799 struct ieee80211_hdr *hdr;
800 struct sk_buff *wmi_skb;
801 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
802 int len;
eeab266c 803 u32 buf_len = skb->len;
5e00d31a
BM		 804 u16 fc;
805
806 hdr = (struct ieee80211_hdr *)skb->data;
807 fc = le16_to_cpu(hdr->frame_control);
808
809 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
810 return -EINVAL;
811
812 len = sizeof(cmd->hdr) + skb->len;
eeab266c
MK		 813
814 if ((ieee80211_is_action(hdr->frame_control) ||
815 ieee80211_is_deauth(hdr->frame_control) ||
816 ieee80211_is_disassoc(hdr->frame_control)) &&
817 ieee80211_has_protected(hdr->frame_control)) {
818 len += IEEE80211_CCMP_MIC_LEN;
819 buf_len += IEEE80211_CCMP_MIC_LEN;
820 }
821
5e00d31a
BM		 822 len = round_up(len, 4);
823
7aa7a72a 824 wmi_skb = ath10k_wmi_alloc_skb(ar, len);
5e00d31a
BM		 825 if (!wmi_skb)
826 return -ENOMEM;
827
828 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
829
830 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
831 cmd->hdr.tx_rate = 0;
832 cmd->hdr.tx_power = 0;
eeab266c 833 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 834
b25f32cb 835 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
5e00d31a
BM		 836 memcpy(cmd->buf, skb->data, skb->len);
837
7aa7a72a 838 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
5e00d31a
BM		 839 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
840 fc & IEEE80211_FCTL_STYPE);
5ce8e7fd
RM		 841 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
842 trace_ath10k_tx_payload(ar, skb->data, skb->len);
5e00d31a
BM		 843
844 /* Send the management frame buffer to the target */
845 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
5fb5e41f 846 if (ret)
5e00d31a 847 return ret;
5e00d31a
BM		 848
849 /* TODO: report tx status to mac80211 - temporary just ACK */
850 info->flags |= IEEE80211_TX_STAT_ACK;
851 ieee80211_tx_status_irqsafe(ar->hw, skb);
852
853 return ret;
854}
855
5c81c7fd
MK		 856static void ath10k_wmi_event_scan_started(struct ath10k *ar)
857{
858 lockdep_assert_held(&ar->data_lock);
859
860 switch (ar->scan.state) {
861 case ATH10K_SCAN_IDLE:
862 case ATH10K_SCAN_RUNNING:
863 case ATH10K_SCAN_ABORTING:
7aa7a72a 864 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 865 ath10k_scan_state_str(ar->scan.state),
866 ar->scan.state);
867 break;
868 case ATH10K_SCAN_STARTING:
869 ar->scan.state = ATH10K_SCAN_RUNNING;
870
871 if (ar->scan.is_roc)
872 ieee80211_ready_on_channel(ar->hw);
873
874 complete(&ar->scan.started);
875 break;
876 }
877}
878
879static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
880{
881 lockdep_assert_held(&ar->data_lock);
882
883 switch (ar->scan.state) {
884 case ATH10K_SCAN_IDLE:
885 case ATH10K_SCAN_STARTING:
886 /* One suspected reason scan can be completed while starting is
887 * if firmware fails to deliver all scan events to the host,
888 * e.g. when transport pipe is full. This has been observed
889 * with spectral scan phyerr events starving wmi transport
890 * pipe. In such case the "scan completed" event should be (and
891 * is) ignored by the host as it may be just firmware's scan
892 * state machine recovering.
893 */
7aa7a72a 894 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 895 ath10k_scan_state_str(ar->scan.state),
896 ar->scan.state);
897 break;
898 case ATH10K_SCAN_RUNNING:
899 case ATH10K_SCAN_ABORTING:
900 __ath10k_scan_finish(ar);
901 break;
902 }
903}
904
905static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
906{
907 lockdep_assert_held(&ar->data_lock);
908
909 switch (ar->scan.state) {
910 case ATH10K_SCAN_IDLE:
911 case ATH10K_SCAN_STARTING:
7aa7a72a 912 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 913 ath10k_scan_state_str(ar->scan.state),
914 ar->scan.state);
915 break;
916 case ATH10K_SCAN_RUNNING:
917 case ATH10K_SCAN_ABORTING:
918 ar->scan_channel = NULL;
919 break;
920 }
921}
922
923static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
924{
925 lockdep_assert_held(&ar->data_lock);
926
927 switch (ar->scan.state) {
928 case ATH10K_SCAN_IDLE:
929 case ATH10K_SCAN_STARTING:
7aa7a72a 930 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 931 ath10k_scan_state_str(ar->scan.state),
932 ar->scan.state);
933 break;
934 case ATH10K_SCAN_RUNNING:
935 case ATH10K_SCAN_ABORTING:
936 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
937
938 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
939 complete(&ar->scan.on_channel);
940 break;
941 }
942}
943
9ff8b724
MK		 944static const char *
945ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
946 enum wmi_scan_completion_reason reason)
947{
948 switch (type) {
949 case WMI_SCAN_EVENT_STARTED:
950 return "started";
951 case WMI_SCAN_EVENT_COMPLETED:
952 switch (reason) {
953 case WMI_SCAN_REASON_COMPLETED:
954 return "completed";
955 case WMI_SCAN_REASON_CANCELLED:
956 return "completed [cancelled]";
957 case WMI_SCAN_REASON_PREEMPTED:
958 return "completed [preempted]";
959 case WMI_SCAN_REASON_TIMEDOUT:
960 return "completed [timedout]";
961 case WMI_SCAN_REASON_MAX:
962 break;
963 }
964 return "completed [unknown]";
965 case WMI_SCAN_EVENT_BSS_CHANNEL:
966 return "bss channel";
967 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
968 return "foreign channel";
969 case WMI_SCAN_EVENT_DEQUEUED:
970 return "dequeued";
971 case WMI_SCAN_EVENT_PREEMPTED:
972 return "preempted";
973 case WMI_SCAN_EVENT_START_FAILED:
974 return "start failed";
975 default:
976 return "unknown";
977 }
978}
979
5e3dd157
KV		 980static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
981{
982 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
983 enum wmi_scan_event_type event_type;
984 enum wmi_scan_completion_reason reason;
985 u32 freq;
986 u32 req_id;
987 u32 scan_id;
988 u32 vdev_id;
989
990 event_type = __le32_to_cpu(event->event_type);
991 reason = __le32_to_cpu(event->reason);
992 freq = __le32_to_cpu(event->channel_freq);
993 req_id = __le32_to_cpu(event->scan_req_id);
994 scan_id = __le32_to_cpu(event->scan_id);
995 vdev_id = __le32_to_cpu(event->vdev_id);
996
5c81c7fd
MK		 997 spin_lock_bh(&ar->data_lock);
998
7aa7a72a 999 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 1000 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 1001 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK		 1002 event_type, reason, freq, req_id, scan_id, vdev_id,
1003 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV		 1004
1005 switch (event_type) {
1006 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 1007 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV		 1008 break;
1009 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 1010 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV		 1011 break;
1012 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 1013 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV		 1014 break;
1015 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK		 1016 ath10k_wmi_event_scan_foreign_chan(ar, freq);
1017 break;
1018 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 1019 ath10k_warn(ar, "received scan start failure event\n");
5e3dd157
KV		 1020 break;
1021 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 1022 case WMI_SCAN_EVENT_PREEMPTED:
5e3dd157
KV		 1023 default:
1024 break;
1025 }
1026
1027 spin_unlock_bh(&ar->data_lock);
1028 return 0;
1029}
1030
1031static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
1032{
1033 enum ieee80211_band band;
1034
1035 switch (phy_mode) {
1036 case MODE_11A:
1037 case MODE_11NA_HT20:
1038 case MODE_11NA_HT40:
1039 case MODE_11AC_VHT20:
1040 case MODE_11AC_VHT40:
1041 case MODE_11AC_VHT80:
1042 band = IEEE80211_BAND_5GHZ;
1043 break;
1044 case MODE_11G:
1045 case MODE_11B:
1046 case MODE_11GONLY:
1047 case MODE_11NG_HT20:
1048 case MODE_11NG_HT40:
1049 case MODE_11AC_VHT20_2G:
1050 case MODE_11AC_VHT40_2G:
1051 case MODE_11AC_VHT80_2G:
1052 default:
1053 band = IEEE80211_BAND_2GHZ;
1054 }
1055
1056 return band;
1057}
1058
1059static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
1060{
1061 u8 rate_idx = 0;
1062
1063 /* rate in Kbps */
1064 switch (rate) {
1065 case 1000:
1066 rate_idx = 0;
1067 break;
1068 case 2000:
1069 rate_idx = 1;
1070 break;
1071 case 5500:
1072 rate_idx = 2;
1073 break;
1074 case 11000:
1075 rate_idx = 3;
1076 break;
1077 case 6000:
1078 rate_idx = 4;
1079 break;
1080 case 9000:
1081 rate_idx = 5;
1082 break;
1083 case 12000:
1084 rate_idx = 6;
1085 break;
1086 case 18000:
1087 rate_idx = 7;
1088 break;
1089 case 24000:
1090 rate_idx = 8;
1091 break;
1092 case 36000:
1093 rate_idx = 9;
1094 break;
1095 case 48000:
1096 rate_idx = 10;
1097 break;
1098 case 54000:
1099 rate_idx = 11;
1100 break;
1101 default:
1102 break;
1103 }
1104
1105 if (band == IEEE80211_BAND_5GHZ) {
1106 if (rate_idx > 3)
1107 /* Omit CCK rates */
1108 rate_idx -= 4;
1109 else
1110 rate_idx = 0;
1111 }
1112
1113 return rate_idx;
1114}
1115
1116static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
1117{
0d9b0438
MK		 1118 struct wmi_mgmt_rx_event_v1 *ev_v1;
1119 struct wmi_mgmt_rx_event_v2 *ev_v2;
1120 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
5e3dd157
KV		 1121 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
1122 struct ieee80211_hdr *hdr;
1123 u32 rx_status;
1124 u32 channel;
1125 u32 phy_mode;
1126 u32 snr;
1127 u32 rate;
1128 u32 buf_len;
1129 u16 fc;
0d9b0438
MK		 1130 int pull_len;
1131
1132 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
1133 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
1134 ev_hdr = &ev_v2->hdr.v1;
1135 pull_len = sizeof(*ev_v2);
1136 } else {
1137 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
1138 ev_hdr = &ev_v1->hdr;
1139 pull_len = sizeof(*ev_v1);
1140 }
5e3dd157 1141
0d9b0438
MK		 1142 channel = __le32_to_cpu(ev_hdr->channel);
1143 buf_len = __le32_to_cpu(ev_hdr->buf_len);
1144 rx_status = __le32_to_cpu(ev_hdr->status);
1145 snr = __le32_to_cpu(ev_hdr->snr);
1146 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
1147 rate = __le32_to_cpu(ev_hdr->rate);
5e3dd157
KV		 1148
1149 memset(status, 0, sizeof(*status));
1150
7aa7a72a 1151 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1152 "event mgmt rx status %08x\n", rx_status);
1153
e8a50f8b
MP		 1154 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1155 dev_kfree_skb(skb);
1156 return 0;
1157 }
1158
5e3dd157
KV		 1159 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
1160 dev_kfree_skb(skb);
1161 return 0;
1162 }
1163
1164 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
1165 dev_kfree_skb(skb);
1166 return 0;
1167 }
1168
1169 if (rx_status & WMI_RX_STATUS_ERR_CRC)
1170 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1171 if (rx_status & WMI_RX_STATUS_ERR_MIC)
1172 status->flag |= RX_FLAG_MMIC_ERROR;
1173
21040bf9 1174 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
453cdb61 1175 * MODE_11B. This means phy_mode is not a reliable source for the band
21040bf9
MK		 1176 * of mgmt rx.
1177 */
1178 if (channel >= 1 && channel <= 14) {
1179 status->band = IEEE80211_BAND_2GHZ;
1180 } else if (channel >= 36 && channel <= 165) {
1181 status->band = IEEE80211_BAND_5GHZ;
453cdb61 1182 } else {
21040bf9
MK		 1183 /* Shouldn't happen unless list of advertised channels to
1184 * mac80211 has been changed.
1185 */
1186 WARN_ON_ONCE(1);
1187 dev_kfree_skb(skb);
1188 return 0;
453cdb61
MK		 1189 }
1190
21040bf9
MK		 1191 if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ)
1192 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
1193
5e3dd157
KV		 1194 status->freq = ieee80211_channel_to_frequency(channel, status->band);
1195 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
1196 status->rate_idx = get_rate_idx(rate, status->band);
1197
0d9b0438 1198 skb_pull(skb, pull_len);
5e3dd157
KV		 1199
1200 hdr = (struct ieee80211_hdr *)skb->data;
1201 fc = le16_to_cpu(hdr->frame_control);
1202
2b6a6a90
MK		 1203 /* FW delivers WEP Shared Auth frame with Protected Bit set and
1204 * encrypted payload. However in case of PMF it delivers decrypted
1205 * frames with Protected Bit set. */
1206 if (ieee80211_has_protected(hdr->frame_control) &&
1207 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 1208 status->flag |= RX_FLAG_DECRYPTED;
1209
1210 if (!ieee80211_is_action(hdr->frame_control) &&
1211 !ieee80211_is_deauth(hdr->frame_control) &&
1212 !ieee80211_is_disassoc(hdr->frame_control)) {
1213 status->flag |= RX_FLAG_IV_STRIPPED |
1214 RX_FLAG_MMIC_STRIPPED;
1215 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 1216 ~IEEE80211_FCTL_PROTECTED);
eeab266c 1217 }
5e3dd157
KV		 1218 }
1219
7aa7a72a 1220 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1221 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
1222 skb, skb->len,
1223 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
1224
7aa7a72a 1225 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1226 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
1227 status->freq, status->band, status->signal,
1228 status->rate_idx);
1229
1230 /*
1231 * packets from HTC come aligned to 4byte boundaries
1232 * because they can originally come in along with a trailer
1233 */
1234 skb_trim(skb, buf_len);
1235
1236 ieee80211_rx(ar->hw, skb);
1237 return 0;
1238}
1239
2e1dea40
MK		 1240static int freq_to_idx(struct ath10k *ar, int freq)
1241{
1242 struct ieee80211_supported_band *sband;
1243 int band, ch, idx = 0;
1244
1245 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1246 sband = ar->hw->wiphy->bands[band];
1247 if (!sband)
1248 continue;
1249
1250 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1251 if (sband->channels[ch].center_freq == freq)
1252 goto exit;
1253 }
1254
1255exit:
1256 return idx;
1257}
1258
5e3dd157
KV		 1259static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1260{
2e1dea40
MK		 1261 struct wmi_chan_info_event *ev;
1262 struct survey_info *survey;
1263 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1264 int idx;
1265
1266 ev = (struct wmi_chan_info_event *)skb->data;
1267
1268 err_code = __le32_to_cpu(ev->err_code);
1269 freq = __le32_to_cpu(ev->freq);
1270 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1271 noise_floor = __le32_to_cpu(ev->noise_floor);
1272 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1273 cycle_count = __le32_to_cpu(ev->cycle_count);
1274
7aa7a72a 1275 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK		 1276 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1277 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1278 cycle_count);
1279
1280 spin_lock_bh(&ar->data_lock);
1281
5c81c7fd
MK		 1282 switch (ar->scan.state) {
1283 case ATH10K_SCAN_IDLE:
1284 case ATH10K_SCAN_STARTING:
7aa7a72a 1285 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 1286 goto exit;
5c81c7fd
MK		 1287 case ATH10K_SCAN_RUNNING:
1288 case ATH10K_SCAN_ABORTING:
1289 break;
2e1dea40
MK		 1290 }
1291
1292 idx = freq_to_idx(ar, freq);
1293 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 1294 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK		 1295 freq, idx);
1296 goto exit;
1297 }
1298
1299 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1300 /* During scanning chan info is reported twice for each
1301 * visited channel. The reported cycle count is global
1302 * and per-channel cycle count must be calculated */
1303
1304 cycle_count -= ar->survey_last_cycle_count;
1305 rx_clear_count -= ar->survey_last_rx_clear_count;
1306
1307 survey = &ar->survey[idx];
1308 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1309 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1310 survey->noise = noise_floor;
1311 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1312 SURVEY_INFO_CHANNEL_TIME_RX |
1313 SURVEY_INFO_NOISE_DBM;
1314 }
1315
1316 ar->survey_last_rx_clear_count = rx_clear_count;
1317 ar->survey_last_cycle_count = cycle_count;
1318
1319exit:
1320 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1321}
1322
1323static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1324{
7aa7a72a 1325 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV		 1326}
1327
869526b9 1328static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1329{
7aa7a72a 1330 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV		 1331 skb->len);
1332
d35a6c18 1333 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV		 1334
1335 return 0;
5e3dd157
KV		 1336}
1337
d15fb520 1338static void ath10k_wmi_pull_pdev_stats(const struct wmi_pdev_stats *src,
5326849a 1339 struct ath10k_fw_stats_pdev *dst)
d15fb520
MK		 1340{
1341 const struct wal_dbg_tx_stats *tx = &src->wal.tx;
1342 const struct wal_dbg_rx_stats *rx = &src->wal.rx;
1343
1344 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
1345 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
1346 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
1347 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
1348 dst->cycle_count = __le32_to_cpu(src->cycle_count);
1349 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
1350 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
1351
1352 dst->comp_queued = __le32_to_cpu(tx->comp_queued);
1353 dst->comp_delivered = __le32_to_cpu(tx->comp_delivered);
1354 dst->msdu_enqued = __le32_to_cpu(tx->msdu_enqued);
1355 dst->mpdu_enqued = __le32_to_cpu(tx->mpdu_enqued);
1356 dst->wmm_drop = __le32_to_cpu(tx->wmm_drop);
1357 dst->local_enqued = __le32_to_cpu(tx->local_enqued);
1358 dst->local_freed = __le32_to_cpu(tx->local_freed);
1359 dst->hw_queued = __le32_to_cpu(tx->hw_queued);
1360 dst->hw_reaped = __le32_to_cpu(tx->hw_reaped);
1361 dst->underrun = __le32_to_cpu(tx->underrun);
1362 dst->tx_abort = __le32_to_cpu(tx->tx_abort);
1363 dst->mpdus_requed = __le32_to_cpu(tx->mpdus_requed);
1364 dst->tx_ko = __le32_to_cpu(tx->tx_ko);
1365 dst->data_rc = __le32_to_cpu(tx->data_rc);
1366 dst->self_triggers = __le32_to_cpu(tx->self_triggers);
1367 dst->sw_retry_failure = __le32_to_cpu(tx->sw_retry_failure);
1368 dst->illgl_rate_phy_err = __le32_to_cpu(tx->illgl_rate_phy_err);
1369 dst->pdev_cont_xretry = __le32_to_cpu(tx->pdev_cont_xretry);
1370 dst->pdev_tx_timeout = __le32_to_cpu(tx->pdev_tx_timeout);
1371 dst->pdev_resets = __le32_to_cpu(tx->pdev_resets);
1372 dst->phy_underrun = __le32_to_cpu(tx->phy_underrun);
1373 dst->txop_ovf = __le32_to_cpu(tx->txop_ovf);
1374
1375 dst->mid_ppdu_route_change = __le32_to_cpu(rx->mid_ppdu_route_change);
1376 dst->status_rcvd = __le32_to_cpu(rx->status_rcvd);
1377 dst->r0_frags = __le32_to_cpu(rx->r0_frags);
1378 dst->r1_frags = __le32_to_cpu(rx->r1_frags);
1379 dst->r2_frags = __le32_to_cpu(rx->r2_frags);
1380 dst->r3_frags = __le32_to_cpu(rx->r3_frags);
1381 dst->htt_msdus = __le32_to_cpu(rx->htt_msdus);
1382 dst->htt_mpdus = __le32_to_cpu(rx->htt_mpdus);
1383 dst->loc_msdus = __le32_to_cpu(rx->loc_msdus);
1384 dst->loc_mpdus = __le32_to_cpu(rx->loc_mpdus);
1385 dst->oversize_amsdu = __le32_to_cpu(rx->oversize_amsdu);
1386 dst->phy_errs = __le32_to_cpu(rx->phy_errs);
1387 dst->phy_err_drop = __le32_to_cpu(rx->phy_err_drop);
1388 dst->mpdu_errs = __le32_to_cpu(rx->mpdu_errs);
1389}
1390
1391static void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
60ef401a 1392 struct ath10k_fw_stats_peer *dst)
d15fb520
MK		 1393{
1394 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
1395 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
1396 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
1397}
1398
1399static int ath10k_wmi_main_pull_fw_stats(struct ath10k *ar,
1400 struct sk_buff *skb,
60ef401a 1401 struct ath10k_fw_stats *stats)
d15fb520
MK		 1402{
1403 const struct wmi_stats_event *ev = (void *)skb->data;
1404 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1405 int i;
1406
1407 if (!skb_pull(skb, sizeof(*ev)))
1408 return -EPROTO;
1409
1410 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1411 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1412 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1413
5326849a 1414 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 1415 const struct wmi_pdev_stats *src;
5326849a 1416 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 1417
1418 src = (void *)skb->data;
1419 if (!skb_pull(skb, sizeof(*src)))
1420 return -EPROTO;
1421
5326849a
MK		 1422 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1423 if (!dst)
1424 continue;
1425
1426 ath10k_wmi_pull_pdev_stats(src, dst);
1427 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 1428 }
1429
1430 /* fw doesn't implement vdev stats */
1431
1432 for (i = 0; i < num_peer_stats; i++) {
1433 const struct wmi_peer_stats *src;
5326849a 1434 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 1435
1436 src = (void *)skb->data;
1437 if (!skb_pull(skb, sizeof(*src)))
1438 return -EPROTO;
1439
5326849a
MK		 1440 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1441 if (!dst)
1442 continue;
1443
1444 ath10k_wmi_pull_peer_stats(src, dst);
1445 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 1446 }
1447
1448 return 0;
1449}
1450
1451static int ath10k_wmi_10x_pull_fw_stats(struct ath10k *ar,
1452 struct sk_buff *skb,
60ef401a 1453 struct ath10k_fw_stats *stats)
d15fb520
MK		 1454{
1455 const struct wmi_stats_event *ev = (void *)skb->data;
1456 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1457 int i;
1458
1459 if (!skb_pull(skb, sizeof(*ev)))
1460 return -EPROTO;
1461
1462 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1463 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1464 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1465
5326849a 1466 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 1467 const struct wmi_10x_pdev_stats *src;
5326849a 1468 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 1469
1470 src = (void *)skb->data;
1471 if (!skb_pull(skb, sizeof(*src)))
1472 return -EPROTO;
1473
5326849a
MK		 1474 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1475 if (!dst)
1476 continue;
1477
1478 ath10k_wmi_pull_pdev_stats(&src->old, dst);
1479
1480 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
1481 dst->rts_bad = __le32_to_cpu(src->rts_bad);
1482 dst->rts_good = __le32_to_cpu(src->rts_good);
1483 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
1484 dst->no_beacons = __le32_to_cpu(src->no_beacons);
1485 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
d15fb520 1486
5326849a 1487 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 1488 }
1489
1490 /* fw doesn't implement vdev stats */
1491
1492 for (i = 0; i < num_peer_stats; i++) {
1493 const struct wmi_10x_peer_stats *src;
5326849a 1494 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 1495
1496 src = (void *)skb->data;
1497 if (!skb_pull(skb, sizeof(*src)))
1498 return -EPROTO;
1499
5326849a
MK		 1500 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1501 if (!dst)
1502 continue;
1503
1504 ath10k_wmi_pull_peer_stats(&src->old, dst);
1505
1506 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
d15fb520 1507
5326849a 1508 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 1509 }
1510
1511 return 0;
1512}
1513
1514int ath10k_wmi_pull_fw_stats(struct ath10k *ar, struct sk_buff *skb,
60ef401a 1515 struct ath10k_fw_stats *stats)
d15fb520
MK		 1516{
1517 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
1518 return ath10k_wmi_10x_pull_fw_stats(ar, skb, stats);
1519 else
1520 return ath10k_wmi_main_pull_fw_stats(ar, skb, stats);
1521}
1522
5e3dd157
KV		 1523static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1524 struct sk_buff *skb)
1525{
7aa7a72a 1526 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
60ef401a 1527 ath10k_debug_fw_stats_process(ar, skb);
5e3dd157
KV		 1528}
1529
1530static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1531 struct sk_buff *skb)
1532{
1533 struct wmi_vdev_start_response_event *ev;
1534
7aa7a72a 1535 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157
KV		 1536
1537 ev = (struct wmi_vdev_start_response_event *)skb->data;
1538
1539 if (WARN_ON(__le32_to_cpu(ev->status)))
1540 return;
1541
1542 complete(&ar->vdev_setup_done);
1543}
1544
1545static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1546 struct sk_buff *skb)
1547{
7aa7a72a 1548 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV		 1549 complete(&ar->vdev_setup_done);
1550}
1551
1552static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1553 struct sk_buff *skb)
1554{
5a13e76e
KV		 1555 struct wmi_peer_sta_kickout_event *ev;
1556 struct ieee80211_sta *sta;
1557
1558 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1559
7aa7a72a 1560 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
5a13e76e
KV		 1561 ev->peer_macaddr.addr);
1562
1563 rcu_read_lock();
1564
1565 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1566 if (!sta) {
7aa7a72a 1567 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
5a13e76e
KV		 1568 ev->peer_macaddr.addr);
1569 goto exit;
1570 }
1571
1572 ieee80211_report_low_ack(sta, 10);
1573
1574exit:
1575 rcu_read_unlock();
5e3dd157
KV		 1576}
1577
1578/*
1579 * FIXME
1580 *
1581 * We don't report to mac80211 sleep state of connected
1582 * stations. Due to this mac80211 can't fill in TIM IE
1583 * correctly.
1584 *
1585 * I know of no way of getting nullfunc frames that contain
1586 * sleep transition from connected stations - these do not
1587 * seem to be sent from the target to the host. There also
1588 * doesn't seem to be a dedicated event for that. So the
1589 * only way left to do this would be to read tim_bitmap
1590 * during SWBA.
1591 *
1592 * We could probably try using tim_bitmap from SWBA to tell
1593 * mac80211 which stations are asleep and which are not. The
1594 * problem here is calling mac80211 functions so many times
1595 * could take too long and make us miss the time to submit
1596 * the beacon to the target.
1597 *
1598 * So as a workaround we try to extend the TIM IE if there
1599 * is unicast buffered for stations with aid > 7 and fill it
1600 * in ourselves.
1601 */
1602static void ath10k_wmi_update_tim(struct ath10k *ar,
1603 struct ath10k_vif *arvif,
1604 struct sk_buff *bcn,
1605 struct wmi_bcn_info *bcn_info)
1606{
1607 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1608 struct ieee80211_tim_ie *tim;
1609 u8 *ies, *ie;
1610 u8 ie_len, pvm_len;
af762c0b
KV		 1611 __le32 t;
1612 u32 v;
5e3dd157
KV		 1613
1614 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1615 * we must copy the bitmap upon change and reuse it later */
1616 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1617 int i;
1618
1619 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1620 sizeof(bcn_info->tim_info.tim_bitmap));
1621
1622 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
af762c0b
KV		 1623 t = bcn_info->tim_info.tim_bitmap[i / 4];
1624 v = __le32_to_cpu(t);
5e3dd157
KV		 1625 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1626 }
1627
1628 /* FW reports either length 0 or 16
1629 * so we calculate this on our own */
1630 arvif->u.ap.tim_len = 0;
1631 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1632 if (arvif->u.ap.tim_bitmap[i])
1633 arvif->u.ap.tim_len = i;
1634
1635 arvif->u.ap.tim_len++;
1636 }
1637
1638 ies = bcn->data;
1639 ies += ieee80211_hdrlen(hdr->frame_control);
1640 ies += 12; /* fixed parameters */
1641
1642 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1643 (u8 *)skb_tail_pointer(bcn) - ies);
1644 if (!ie) {
09af8f85 1645 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 1646 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV		 1647 return;
1648 }
1649
1650 tim = (void *)ie + 2;
1651 ie_len = ie[1];
1652 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1653
1654 if (pvm_len < arvif->u.ap.tim_len) {
1655 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1656 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1657 void *next_ie = ie + 2 + ie_len;
1658
1659 if (skb_put(bcn, expand_size)) {
1660 memmove(next_ie + expand_size, next_ie, move_size);
1661
1662 ie[1] += expand_size;
1663 ie_len += expand_size;
1664 pvm_len += expand_size;
1665 } else {
7aa7a72a 1666 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV		 1667 }
1668 }
1669
1670 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
7aa7a72a 1671 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV		 1672 return;
1673 }
1674
1675 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1676 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1677
748afc47
MK		 1678 if (tim->dtim_count == 0) {
1679 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
1680
1681 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
1682 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
1683 }
1684
7aa7a72a 1685 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV		 1686 tim->dtim_count, tim->dtim_period,
1687 tim->bitmap_ctrl, pvm_len);
1688}
1689
1690static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1691 struct wmi_p2p_noa_info *noa)
1692{
1693 struct ieee80211_p2p_noa_attr *noa_attr;
1694 u8 ctwindow_oppps = noa->ctwindow_oppps;
1695 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1696 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1697 __le16 *noa_attr_len;
1698 u16 attr_len;
1699 u8 noa_descriptors = noa->num_descriptors;
1700 int i;
1701
1702 /* P2P IE */
1703 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1704 data[1] = len - 2;
1705 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1706 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1707 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1708 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1709
1710 /* NOA ATTR */
1711 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1712 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1713 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1714
1715 noa_attr->index = noa->index;
1716 noa_attr->oppps_ctwindow = ctwindow;
1717 if (oppps)
1718 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1719
1720 for (i = 0; i < noa_descriptors; i++) {
1721 noa_attr->desc[i].count =
1722 __le32_to_cpu(noa->descriptors[i].type_count);
1723 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1724 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1725 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1726 }
1727
1728 attr_len = 2; /* index + oppps_ctwindow */
1729 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1730 *noa_attr_len = __cpu_to_le16(attr_len);
1731}
1732
1733static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1734{
1735 u32 len = 0;
1736 u8 noa_descriptors = noa->num_descriptors;
1737 u8 opp_ps_info = noa->ctwindow_oppps;
1738 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1739
5e3dd157
KV		 1740 if (!noa_descriptors && !opps_enabled)
1741 return len;
1742
1743 len += 1 + 1 + 4; /* EID + len + OUI */
1744 len += 1 + 2; /* noa attr + attr len */
1745 len += 1 + 1; /* index + oppps_ctwindow */
1746 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1747
1748 return len;
1749}
1750
1751static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1752 struct sk_buff *bcn,
1753 struct wmi_bcn_info *bcn_info)
1754{
1755 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1756 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1757 u32 new_len;
1758
1759 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1760 return;
1761
7aa7a72a 1762 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157
KV		 1763 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1764 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1765 if (!new_len)
1766 goto cleanup;
1767
1768 new_data = kmalloc(new_len, GFP_ATOMIC);
1769 if (!new_data)
1770 goto cleanup;
1771
1772 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1773
1774 spin_lock_bh(&ar->data_lock);
1775 arvif->u.ap.noa_data = new_data;
1776 arvif->u.ap.noa_len = new_len;
1777 spin_unlock_bh(&ar->data_lock);
1778 kfree(old_data);
1779 }
1780
1781 if (arvif->u.ap.noa_data)
1782 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1783 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1784 arvif->u.ap.noa_data,
1785 arvif->u.ap.noa_len);
1786 return;
1787
1788cleanup:
1789 spin_lock_bh(&ar->data_lock);
1790 arvif->u.ap.noa_data = NULL;
1791 arvif->u.ap.noa_len = 0;
1792 spin_unlock_bh(&ar->data_lock);
1793 kfree(old_data);
1794}
1795
5e3dd157
KV		 1796static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1797{
1798 struct wmi_host_swba_event *ev;
1799 u32 map;
1800 int i = -1;
1801 struct wmi_bcn_info *bcn_info;
1802 struct ath10k_vif *arvif;
5e3dd157 1803 struct sk_buff *bcn;
64badcb6 1804 dma_addr_t paddr;
767d34fc 1805 int ret, vdev_id = 0;
5e3dd157 1806
5e3dd157
KV		 1807 ev = (struct wmi_host_swba_event *)skb->data;
1808 map = __le32_to_cpu(ev->vdev_map);
1809
7aa7a72a 1810 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
5e3dd157
KV		 1811 ev->vdev_map);
1812
1813 for (; map; map >>= 1, vdev_id++) {
1814 if (!(map & 0x1))
1815 continue;
1816
1817 i++;
1818
1819 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 1820 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV		 1821 break;
1822 }
1823
1824 bcn_info = &ev->bcn_info[i];
1825
7aa7a72a 1826 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 1827 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157
KV		 1828 i,
1829 __le32_to_cpu(bcn_info->tim_info.tim_len),
1830 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1831 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1832 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1833 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1834 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1835 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1836 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1837
1838 arvif = ath10k_get_arvif(ar, vdev_id);
1839 if (arvif == NULL) {
7aa7a72a
MK		 1840 ath10k_warn(ar, "no vif for vdev_id %d found\n",
1841 vdev_id);
5e3dd157
KV		 1842 continue;
1843 }
1844
c2df44b3
MK		 1845 /* There are no completions for beacons so wait for next SWBA
1846 * before telling mac80211 to decrement CSA counter
1847 *
1848 * Once CSA counter is completed stop sending beacons until
1849 * actual channel switch is done */
1850 if (arvif->vif->csa_active &&
1851 ieee80211_csa_is_complete(arvif->vif)) {
1852 ieee80211_csa_finish(arvif->vif);
1853 continue;
1854 }
1855
5e3dd157
KV		 1856 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1857 if (!bcn) {
7aa7a72a 1858 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV		 1859 continue;
1860 }
1861
4b604558 1862 ath10k_tx_h_seq_no(arvif->vif, bcn);
5e3dd157
KV		 1863 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1864 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1865
ed54388a 1866 spin_lock_bh(&ar->data_lock);
748afc47 1867
ed54388a 1868 if (arvif->beacon) {
748afc47 1869 if (!arvif->beacon_sent)
7aa7a72a 1870 ath10k_warn(ar, "SWBA overrun on vdev %d\n",
748afc47
MK		 1871 arvif->vdev_id);
1872
64badcb6 1873 ath10k_mac_vif_beacon_free(arvif);
ed54388a 1874 }
5e3dd157 1875
64badcb6
MK		 1876 if (!arvif->beacon_buf) {
1877 paddr = dma_map_single(arvif->ar->dev, bcn->data,
1878 bcn->len, DMA_TO_DEVICE);
1879 ret = dma_mapping_error(arvif->ar->dev, paddr);
1880 if (ret) {
1881 ath10k_warn(ar, "failed to map beacon: %d\n",
1882 ret);
1883 dev_kfree_skb_any(bcn);
1884 goto skip;
1885 }
1886
1887 ATH10K_SKB_CB(bcn)->paddr = paddr;
1888 } else {
1889 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
1890 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
1891 bcn->len, IEEE80211_MAX_FRAME_LEN);
1892 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
1893 }
1894 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
1895 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 1896 }
748afc47 1897
ed54388a 1898 arvif->beacon = bcn;
748afc47 1899 arvif->beacon_sent = false;
5e3dd157 1900
5ce8e7fd
RM		 1901 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
1902 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
1903
ed54388a 1904 ath10k_wmi_tx_beacon_nowait(arvif);
767d34fc 1905skip:
ed54388a 1906 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1907 }
1908}
1909
1910static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1911 struct sk_buff *skb)
1912{
7aa7a72a 1913 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV		 1914}
1915
9702c686 1916static void ath10k_dfs_radar_report(struct ath10k *ar,
2332d0ae
MK		 1917 const struct wmi_phyerr *phyerr,
1918 const struct phyerr_radar_report *rr,
9702c686
JD		 1919 u64 tsf)
1920{
1921 u32 reg0, reg1, tsf32l;
1922 struct pulse_event pe;
1923 u64 tsf64;
1924 u8 rssi, width;
1925
1926 reg0 = __le32_to_cpu(rr->reg0);
1927 reg1 = __le32_to_cpu(rr->reg1);
1928
7aa7a72a 1929 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1930 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1931 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1932 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1933 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1934 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 1935 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1936 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1937 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1938 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1939 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1940 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1941 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 1942 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1943 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1944 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1945 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1946
1947 if (!ar->dfs_detector)
1948 return;
1949
1950 /* report event to DFS pattern detector */
2332d0ae 1951 tsf32l = __le32_to_cpu(phyerr->tsf_timestamp);
9702c686
JD		 1952 tsf64 = tsf & (~0xFFFFFFFFULL);
1953 tsf64 |= tsf32l;
1954
1955 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2332d0ae 1956 rssi = phyerr->rssi_combined;
9702c686
JD		 1957
1958 /* hardware store this as 8 bit signed value,
1959 * set to zero if negative number
1960 */
1961 if (rssi & 0x80)
1962 rssi = 0;
1963
1964 pe.ts = tsf64;
1965 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1966 pe.width = width;
1967 pe.rssi = rssi;
1968
7aa7a72a 1969 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1970 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1971 pe.freq, pe.width, pe.rssi, pe.ts);
1972
1973 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1974
1975 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 1976 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 1977 "dfs no pulse pattern detected, yet\n");
1978 return;
1979 }
1980
7aa7a72a 1981 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 1982 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 1983
1984 /* Control radar events reporting in debugfs file
1985 dfs_block_radar_events */
1986 if (ar->dfs_block_radar_events) {
7aa7a72a 1987 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP		 1988 return;
1989 }
1990
9702c686
JD		 1991 ieee80211_radar_detected(ar->hw);
1992}
1993
1994static int ath10k_dfs_fft_report(struct ath10k *ar,
2332d0ae
MK		 1995 const struct wmi_phyerr *phyerr,
1996 const struct phyerr_fft_report *fftr,
9702c686
JD		 1997 u64 tsf)
1998{
1999 u32 reg0, reg1;
2000 u8 rssi, peak_mag;
2001
2002 reg0 = __le32_to_cpu(fftr->reg0);
2003 reg1 = __le32_to_cpu(fftr->reg1);
2332d0ae 2004 rssi = phyerr->rssi_combined;
9702c686 2005
7aa7a72a 2006 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2007 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
2008 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
2009 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
2010 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
2011 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 2012 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2013 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
2014 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
2015 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
2016 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
2017 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
2018
2019 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
2020
2021 /* false event detection */
2022 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
2023 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 2024 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD		 2025 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
2026 return -EINVAL;
2027 }
2028
2029 return 0;
2030}
2031
2032static void ath10k_wmi_event_dfs(struct ath10k *ar,
2332d0ae 2033 const struct wmi_phyerr *phyerr,
9702c686
JD		 2034 u64 tsf)
2035{
2036 int buf_len, tlv_len, res, i = 0;
2332d0ae
MK		 2037 const struct phyerr_tlv *tlv;
2038 const struct phyerr_radar_report *rr;
2039 const struct phyerr_fft_report *fftr;
2040 const u8 *tlv_buf;
9702c686 2041
2332d0ae 2042 buf_len = __le32_to_cpu(phyerr->buf_len);
7aa7a72a 2043 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686 2044 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2332d0ae
MK		 2045 phyerr->phy_err_code, phyerr->rssi_combined,
2046 __le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len);
9702c686
JD		 2047
2048 /* Skip event if DFS disabled */
2049 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
2050 return;
2051
2052 ATH10K_DFS_STAT_INC(ar, pulses_total);
2053
2054 while (i < buf_len) {
2055 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK		 2056 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
2057 i);
9702c686
JD		 2058 return;
2059 }
2060
2332d0ae 2061 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
9702c686 2062 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 2063 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
7aa7a72a 2064 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2065 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
2066 tlv_len, tlv->tag, tlv->sig);
2067
2068 switch (tlv->tag) {
2069 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
2070 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 2071 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD		 2072 i);
2073 return;
2074 }
2075
2076 rr = (struct phyerr_radar_report *)tlv_buf;
2332d0ae 2077 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
9702c686
JD		 2078 break;
2079 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2080 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK		 2081 ath10k_warn(ar, "too short fft report (%d)\n",
2082 i);
9702c686
JD		 2083 return;
2084 }
2085
2086 fftr = (struct phyerr_fft_report *)tlv_buf;
2332d0ae 2087 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
9702c686
JD		 2088 if (res)
2089 return;
2090 break;
2091 }
2092
2093 i += sizeof(*tlv) + tlv_len;
2094 }
2095}
2096
5b07e07f
KV		 2097static void
2098ath10k_wmi_event_spectral_scan(struct ath10k *ar,
2332d0ae 2099 const struct wmi_phyerr *phyerr,
5b07e07f 2100 u64 tsf)
9702c686 2101{
855aed12
SW		 2102 int buf_len, tlv_len, res, i = 0;
2103 struct phyerr_tlv *tlv;
2332d0ae
MK		 2104 const void *tlv_buf;
2105 const struct phyerr_fft_report *fftr;
855aed12
SW		 2106 size_t fftr_len;
2107
2332d0ae 2108 buf_len = __le32_to_cpu(phyerr->buf_len);
855aed12
SW		 2109
2110 while (i < buf_len) {
2111 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 2112 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW		 2113 i);
2114 return;
2115 }
2116
2332d0ae 2117 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
855aed12 2118 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 2119 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
855aed12
SW		 2120
2121 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 2122 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW		 2123 i);
2124 return;
2125 }
2126
2127 switch (tlv->tag) {
2128 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2129 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 2130 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW		 2131 i);
2132 return;
2133 }
2134
2135 fftr_len = tlv_len - sizeof(*fftr);
2332d0ae
MK		 2136 fftr = tlv_buf;
2137 res = ath10k_spectral_process_fft(ar, phyerr,
855aed12
SW		 2138 fftr, fftr_len,
2139 tsf);
2140 if (res < 0) {
7aa7a72a 2141 ath10k_warn(ar, "failed to process fft report: %d\n",
855aed12
SW		 2142 res);
2143 return;
2144 }
2145 break;
2146 }
2147
2148 i += sizeof(*tlv) + tlv_len;
2149 }
9702c686
JD		 2150}
2151
5e3dd157
KV		 2152static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
2153{
2332d0ae
MK		 2154 const struct wmi_phyerr_event *ev;
2155 const struct wmi_phyerr *phyerr;
9702c686
JD		 2156 u32 count, i, buf_len, phy_err_code;
2157 u64 tsf;
2158 int left_len = skb->len;
2159
2160 ATH10K_DFS_STAT_INC(ar, phy_errors);
2161
2162 /* Check if combined event available */
2332d0ae 2163 if (left_len < sizeof(*ev)) {
7aa7a72a 2164 ath10k_warn(ar, "wmi phyerr combined event wrong len\n");
9702c686
JD		 2165 return;
2166 }
2167
2332d0ae 2168 left_len -= sizeof(*ev);
9702c686
JD		 2169
2170 /* Check number of included events */
2332d0ae
MK		 2171 ev = (const struct wmi_phyerr_event *)skb->data;
2172 count = __le32_to_cpu(ev->num_phyerrs);
9702c686 2173
2332d0ae 2174 tsf = __le32_to_cpu(ev->tsf_u32);
9702c686 2175 tsf <<= 32;
2332d0ae 2176 tsf |= __le32_to_cpu(ev->tsf_l32);
9702c686 2177
7aa7a72a 2178 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD		 2179 "wmi event phyerr count %d tsf64 0x%llX\n",
2180 count, tsf);
2181
2332d0ae 2182 phyerr = ev->phyerrs;
9702c686
JD		 2183 for (i = 0; i < count; i++) {
2184 /* Check if we can read event header */
2332d0ae 2185 if (left_len < sizeof(*phyerr)) {
7aa7a72a
MK		 2186 ath10k_warn(ar, "single event (%d) wrong head len\n",
2187 i);
9702c686
JD		 2188 return;
2189 }
2190
2332d0ae 2191 left_len -= sizeof(*phyerr);
9702c686 2192
2332d0ae
MK		 2193 buf_len = __le32_to_cpu(phyerr->buf_len);
2194 phy_err_code = phyerr->phy_err_code;
9702c686
JD		 2195
2196 if (left_len < buf_len) {
7aa7a72a 2197 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD		 2198 return;
2199 }
2200
2201 left_len -= buf_len;
2202
2203 switch (phy_err_code) {
2204 case PHY_ERROR_RADAR:
2332d0ae 2205 ath10k_wmi_event_dfs(ar, phyerr, tsf);
9702c686
JD		 2206 break;
2207 case PHY_ERROR_SPECTRAL_SCAN:
2332d0ae 2208 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
9702c686
JD		 2209 break;
2210 case PHY_ERROR_FALSE_RADAR_EXT:
2332d0ae
MK		 2211 ath10k_wmi_event_dfs(ar, phyerr, tsf);
2212 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
9702c686
JD		 2213 break;
2214 default:
2215 break;
2216 }
2217
2332d0ae 2218 phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len;
9702c686 2219 }
5e3dd157
KV		 2220}
2221
2222static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
2223{
7aa7a72a 2224 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
5e3dd157
KV		 2225}
2226
2227static void ath10k_wmi_event_profile_match(struct ath10k *ar,
5b07e07f 2228 struct sk_buff *skb)
5e3dd157 2229{
7aa7a72a 2230 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV		 2231}
2232
2233static void ath10k_wmi_event_debug_print(struct ath10k *ar,
2fe5288c 2234 struct sk_buff *skb)
5e3dd157 2235{
2fe5288c
KV		 2236 char buf[101], c;
2237 int i;
2238
2239 for (i = 0; i < sizeof(buf) - 1; i++) {
2240 if (i >= skb->len)
2241 break;
2242
2243 c = skb->data[i];
2244
2245 if (c == '\0')
2246 break;
2247
2248 if (isascii(c) && isprint(c))
2249 buf[i] = c;
2250 else
2251 buf[i] = '.';
2252 }
2253
2254 if (i == sizeof(buf) - 1)
7aa7a72a 2255 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV		 2256
2257 /* for some reason the debug prints end with \n, remove that */
2258 if (skb->data[i - 1] == '\n')
2259 i--;
2260
2261 /* the last byte is always reserved for the null character */
2262 buf[i] = '\0';
2263
7aa7a72a 2264 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
5e3dd157
KV		 2265}
2266
2267static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
2268{
7aa7a72a 2269 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV		 2270}
2271
2272static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
2273 struct sk_buff *skb)
2274{
7aa7a72a 2275 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV		 2276}
2277
2278static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
5b07e07f 2279 struct sk_buff *skb)
5e3dd157 2280{
7aa7a72a 2281 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2282}
2283
2284static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
5b07e07f 2285 struct sk_buff *skb)
5e3dd157 2286{
7aa7a72a 2287 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2288}
2289
2290static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
2291 struct sk_buff *skb)
2292{
7aa7a72a 2293 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV		 2294}
2295
2296static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
2297 struct sk_buff *skb)
2298{
7aa7a72a 2299 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
5e3dd157
KV		 2300}
2301
2302static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
2303 struct sk_buff *skb)
2304{
7aa7a72a 2305 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV		 2306}
2307
2308static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
2309 struct sk_buff *skb)
2310{
7aa7a72a 2311 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
5e3dd157
KV		 2312}
2313
2314static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
2315 struct sk_buff *skb)
2316{
7aa7a72a 2317 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV		 2318}
2319
2320static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
5b07e07f 2321 struct sk_buff *skb)
5e3dd157 2322{
7aa7a72a 2323 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV		 2324}
2325
2326static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
2327 struct sk_buff *skb)
2328{
7aa7a72a 2329 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV		 2330}
2331
2332static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
2333 struct sk_buff *skb)
2334{
7aa7a72a 2335 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2336}
2337
2338static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
2339 struct sk_buff *skb)
2340{
7aa7a72a 2341 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2342}
2343
2344static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5b07e07f 2345 struct sk_buff *skb)
5e3dd157 2346{
7aa7a72a 2347 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV		 2348}
2349
8a6618b0
BM		 2350static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
2351 struct sk_buff *skb)
2352{
7aa7a72a 2353 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM		 2354}
2355
2356static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
2357 struct sk_buff *skb)
2358{
7aa7a72a 2359 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM		 2360}
2361
2362static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
2363 struct sk_buff *skb)
2364{
7aa7a72a 2365 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM		 2366}
2367
b3effe61 2368static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5b07e07f 2369 u32 num_units, u32 unit_len)
b3effe61
BM		 2370{
2371 dma_addr_t paddr;
2372 u32 pool_size;
2373 int idx = ar->wmi.num_mem_chunks;
2374
2375 pool_size = num_units * round_up(unit_len, 4);
2376
2377 if (!pool_size)
2378 return -EINVAL;
2379
2380 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
2381 pool_size,
2382 &paddr,
2383 GFP_ATOMIC);
2384 if (!ar->wmi.mem_chunks[idx].vaddr) {
7aa7a72a 2385 ath10k_warn(ar, "failed to allocate memory chunk\n");
b3effe61
BM		 2386 return -ENOMEM;
2387 }
2388
2389 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
2390
2391 ar->wmi.mem_chunks[idx].paddr = paddr;
2392 ar->wmi.mem_chunks[idx].len = pool_size;
2393 ar->wmi.mem_chunks[idx].req_id = req_id;
2394 ar->wmi.num_mem_chunks++;
2395
2396 return 0;
2397}
2398
5c01aa3d
MK		 2399static int ath10k_wmi_main_pull_svc_rdy_ev(struct sk_buff *skb,
2400 struct wmi_svc_rdy_ev_arg *arg)
2401{
2402 struct wmi_service_ready_event *ev;
2403 size_t i, n;
2404
2405 if (skb->len < sizeof(*ev))
2406 return -EPROTO;
2407
2408 ev = (void *)skb->data;
2409 skb_pull(skb, sizeof(*ev));
2410 arg->min_tx_power = ev->hw_min_tx_power;
2411 arg->max_tx_power = ev->hw_max_tx_power;
2412 arg->ht_cap = ev->ht_cap_info;
2413 arg->vht_cap = ev->vht_cap_info;
2414 arg->sw_ver0 = ev->sw_version;
2415 arg->sw_ver1 = ev->sw_version_1;
2416 arg->phy_capab = ev->phy_capability;
2417 arg->num_rf_chains = ev->num_rf_chains;
2418 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
2419 arg->num_mem_reqs = ev->num_mem_reqs;
2420 arg->service_map = ev->wmi_service_bitmap;
2421
2422 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
2423 ARRAY_SIZE(arg->mem_reqs));
2424 for (i = 0; i < n; i++)
2425 arg->mem_reqs[i] = &ev->mem_reqs[i];
2426
2427 if (skb->len <
2428 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
2429 return -EPROTO;
2430
2431 return 0;
2432}
2433
2434static int ath10k_wmi_10x_pull_svc_rdy_ev(struct sk_buff *skb,
2435 struct wmi_svc_rdy_ev_arg *arg)
2436{
2437 struct wmi_10x_service_ready_event *ev;
2438 int i, n;
2439
2440 if (skb->len < sizeof(*ev))
2441 return -EPROTO;
2442
2443 ev = (void *)skb->data;
2444 skb_pull(skb, sizeof(*ev));
2445 arg->min_tx_power = ev->hw_min_tx_power;
2446 arg->max_tx_power = ev->hw_max_tx_power;
2447 arg->ht_cap = ev->ht_cap_info;
2448 arg->vht_cap = ev->vht_cap_info;
2449 arg->sw_ver0 = ev->sw_version;
2450 arg->phy_capab = ev->phy_capability;
2451 arg->num_rf_chains = ev->num_rf_chains;
2452 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
2453 arg->num_mem_reqs = ev->num_mem_reqs;
2454 arg->service_map = ev->wmi_service_bitmap;
2455
2456 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
2457 ARRAY_SIZE(arg->mem_reqs));
2458 for (i = 0; i < n; i++)
2459 arg->mem_reqs[i] = &ev->mem_reqs[i];
2460
2461 if (skb->len <
2462 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
2463 return -EPROTO;
2464
2465 return 0;
2466}
2467
b34d2b3d
MK		 2468static void ath10k_wmi_event_service_ready(struct ath10k *ar,
2469 struct sk_buff *skb)
5e3dd157 2470{
5c01aa3d
MK		 2471 struct wmi_svc_rdy_ev_arg arg = {};
2472 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
c4f8c836 2473 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {};
5c01aa3d
MK		 2474 int ret;
2475
2476 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2477 ret = ath10k_wmi_10x_pull_svc_rdy_ev(skb, &arg);
2478 wmi_10x_svc_map(arg.service_map, svc_bmap);
2479 } else {
2480 ret = ath10k_wmi_main_pull_svc_rdy_ev(skb, &arg);
2481 wmi_main_svc_map(arg.service_map, svc_bmap);
2482 }
5e3dd157 2483
5c01aa3d
MK		 2484 if (ret) {
2485 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5e3dd157
KV		 2486 return;
2487 }
2488
5c01aa3d
MK		 2489 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
2490 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
2491 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
2492 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5e3dd157 2493 ar->fw_version_major =
5c01aa3d
MK		 2494 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
2495 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5e3dd157 2496 ar->fw_version_release =
5c01aa3d
MK		 2497 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
2498 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
2499 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
2500 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
2501 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
2502
2503 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap));
2504 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2505 arg.service_map, sizeof(arg.service_map));
8865bee4 2506
1a222435
KV		 2507 /* only manually set fw features when not using FW IE format */
2508 if (ar->fw_api == 1 && ar->fw_version_build > 636)
0d9b0438
MK		 2509 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
2510
8865bee4 2511 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
7aa7a72a 2512 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
8865bee4
MK		 2513 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2514 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2515 }
5e3dd157 2516
fdb959c7
MK		 2517 ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1;
2518 ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1;
2519
5e3dd157
KV		 2520 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2521 snprintf(ar->hw->wiphy->fw_version,
2522 sizeof(ar->hw->wiphy->fw_version),
2523 "%u.%u.%u.%u",
2524 ar->fw_version_major,
2525 ar->fw_version_minor,
2526 ar->fw_version_release,
2527 ar->fw_version_build);
2528 }
2529
5c01aa3d
MK		 2530 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
2531 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
7aa7a72a 2532 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM		 2533 num_mem_reqs);
2534 return;
6f97d256
BM		 2535 }
2536
b3effe61 2537 for (i = 0; i < num_mem_reqs; ++i) {
5c01aa3d
MK		 2538 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
2539 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
2540 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
2541 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
b3effe61
BM		 2542
2543 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2544 /* number of units to allocate is number of
2545 * peers, 1 extra for self peer on target */
2546 /* this needs to be tied, host and target
2547 * can get out of sync */
ec6a73f0 2548 num_units = TARGET_10X_NUM_PEERS + 1;
b3effe61 2549 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
ec6a73f0 2550 num_units = TARGET_10X_NUM_VDEVS + 1;
b3effe61 2551
7aa7a72a 2552 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM		 2553 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2554 req_id,
5c01aa3d 2555 __le32_to_cpu(arg.mem_reqs[i]->num_units),
b3effe61
BM		 2556 num_unit_info,
2557 unit_size,
2558 num_units);
2559
2560 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2561 unit_size);
2562 if (ret)
2563 return;
2564 }
2565
7aa7a72a 2566 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c01aa3d
MK		 2567 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
2568 __le32_to_cpu(arg.min_tx_power),
2569 __le32_to_cpu(arg.max_tx_power),
2570 __le32_to_cpu(arg.ht_cap),
2571 __le32_to_cpu(arg.vht_cap),
2572 __le32_to_cpu(arg.sw_ver0),
2573 __le32_to_cpu(arg.sw_ver1),
2574 __le32_to_cpu(arg.phy_capab),
2575 __le32_to_cpu(arg.num_rf_chains),
2576 __le32_to_cpu(arg.eeprom_rd),
2577 __le32_to_cpu(arg.num_mem_reqs));
6f97d256
BM		 2578
2579 complete(&ar->wmi.service_ready);
2580}
2581
b34d2b3d 2582static int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 2583{
2584 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2585
2586 if (WARN_ON(skb->len < sizeof(*ev)))
2587 return -EINVAL;
2588
b25f32cb 2589 ether_addr_copy(ar->mac_addr, ev->mac_addr.addr);
5e3dd157 2590
7aa7a72a 2591 ath10k_dbg(ar, ATH10K_DBG_WMI,
2c34752a 2592 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
5e3dd157
KV		 2593 __le32_to_cpu(ev->sw_version),
2594 __le32_to_cpu(ev->abi_version),
2595 ev->mac_addr.addr,
2c34752a 2596 __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
5e3dd157
KV		 2597
2598 complete(&ar->wmi.unified_ready);
2599 return 0;
2600}
2601
ce42870e 2602static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 2603{
2604 struct wmi_cmd_hdr *cmd_hdr;
2605 enum wmi_event_id id;
5e3dd157
KV		 2606
2607 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2608 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2609
2610 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2611 return;
2612
d35a6c18 2613 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV		 2614
2615 switch (id) {
2616 case WMI_MGMT_RX_EVENTID:
2617 ath10k_wmi_event_mgmt_rx(ar, skb);
2618 /* mgmt_rx() owns the skb now! */
2619 return;
2620 case WMI_SCAN_EVENTID:
2621 ath10k_wmi_event_scan(ar, skb);
2622 break;
2623 case WMI_CHAN_INFO_EVENTID:
2624 ath10k_wmi_event_chan_info(ar, skb);
2625 break;
2626 case WMI_ECHO_EVENTID:
2627 ath10k_wmi_event_echo(ar, skb);
2628 break;
2629 case WMI_DEBUG_MESG_EVENTID:
2630 ath10k_wmi_event_debug_mesg(ar, skb);
2631 break;
2632 case WMI_UPDATE_STATS_EVENTID:
2633 ath10k_wmi_event_update_stats(ar, skb);
2634 break;
2635 case WMI_VDEV_START_RESP_EVENTID:
2636 ath10k_wmi_event_vdev_start_resp(ar, skb);
2637 break;
2638 case WMI_VDEV_STOPPED_EVENTID:
2639 ath10k_wmi_event_vdev_stopped(ar, skb);
2640 break;
2641 case WMI_PEER_STA_KICKOUT_EVENTID:
2642 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2643 break;
2644 case WMI_HOST_SWBA_EVENTID:
2645 ath10k_wmi_event_host_swba(ar, skb);
2646 break;
2647 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2648 ath10k_wmi_event_tbttoffset_update(ar, skb);
2649 break;
2650 case WMI_PHYERR_EVENTID:
2651 ath10k_wmi_event_phyerr(ar, skb);
2652 break;
2653 case WMI_ROAM_EVENTID:
2654 ath10k_wmi_event_roam(ar, skb);
2655 break;
2656 case WMI_PROFILE_MATCH:
2657 ath10k_wmi_event_profile_match(ar, skb);
2658 break;
2659 case WMI_DEBUG_PRINT_EVENTID:
2660 ath10k_wmi_event_debug_print(ar, skb);
2661 break;
2662 case WMI_PDEV_QVIT_EVENTID:
2663 ath10k_wmi_event_pdev_qvit(ar, skb);
2664 break;
2665 case WMI_WLAN_PROFILE_DATA_EVENTID:
2666 ath10k_wmi_event_wlan_profile_data(ar, skb);
2667 break;
2668 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2669 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2670 break;
2671 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2672 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2673 break;
2674 case WMI_RTT_ERROR_REPORT_EVENTID:
2675 ath10k_wmi_event_rtt_error_report(ar, skb);
2676 break;
2677 case WMI_WOW_WAKEUP_HOST_EVENTID:
2678 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2679 break;
2680 case WMI_DCS_INTERFERENCE_EVENTID:
2681 ath10k_wmi_event_dcs_interference(ar, skb);
2682 break;
2683 case WMI_PDEV_TPC_CONFIG_EVENTID:
2684 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2685 break;
2686 case WMI_PDEV_FTM_INTG_EVENTID:
2687 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2688 break;
2689 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2690 ath10k_wmi_event_gtk_offload_status(ar, skb);
2691 break;
2692 case WMI_GTK_REKEY_FAIL_EVENTID:
2693 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2694 break;
2695 case WMI_TX_DELBA_COMPLETE_EVENTID:
2696 ath10k_wmi_event_delba_complete(ar, skb);
2697 break;
2698 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2699 ath10k_wmi_event_addba_complete(ar, skb);
2700 break;
2701 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2702 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2703 break;
2704 case WMI_SERVICE_READY_EVENTID:
b34d2b3d 2705 ath10k_wmi_event_service_ready(ar, skb);
5e3dd157
KV		 2706 break;
2707 case WMI_READY_EVENTID:
b34d2b3d 2708 ath10k_wmi_event_ready(ar, skb);
5e3dd157
KV		 2709 break;
2710 default:
7aa7a72a 2711 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV		 2712 break;
2713 }
2714
2715 dev_kfree_skb(skb);
2716}
2717
8a6618b0
BM		 2718static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2719{
2720 struct wmi_cmd_hdr *cmd_hdr;
2721 enum wmi_10x_event_id id;
43d2a30f 2722 bool consumed;
8a6618b0
BM		 2723
2724 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2725 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2726
2727 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2728 return;
2729
d35a6c18 2730 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 2731
43d2a30f
KV		 2732 consumed = ath10k_tm_event_wmi(ar, id, skb);
2733
2734 /* Ready event must be handled normally also in UTF mode so that we
2735 * know the UTF firmware has booted, others we are just bypass WMI
2736 * events to testmode.
2737 */
2738 if (consumed && id != WMI_10X_READY_EVENTID) {
2739 ath10k_dbg(ar, ATH10K_DBG_WMI,
2740 "wmi testmode consumed 0x%x\n", id);
2741 goto out;
2742 }
2743
8a6618b0
BM		 2744 switch (id) {
2745 case WMI_10X_MGMT_RX_EVENTID:
2746 ath10k_wmi_event_mgmt_rx(ar, skb);
2747 /* mgmt_rx() owns the skb now! */
2748 return;
2749 case WMI_10X_SCAN_EVENTID:
2750 ath10k_wmi_event_scan(ar, skb);
2751 break;
2752 case WMI_10X_CHAN_INFO_EVENTID:
2753 ath10k_wmi_event_chan_info(ar, skb);
2754 break;
2755 case WMI_10X_ECHO_EVENTID:
2756 ath10k_wmi_event_echo(ar, skb);
2757 break;
2758 case WMI_10X_DEBUG_MESG_EVENTID:
2759 ath10k_wmi_event_debug_mesg(ar, skb);
2760 break;
2761 case WMI_10X_UPDATE_STATS_EVENTID:
2762 ath10k_wmi_event_update_stats(ar, skb);
2763 break;
2764 case WMI_10X_VDEV_START_RESP_EVENTID:
2765 ath10k_wmi_event_vdev_start_resp(ar, skb);
2766 break;
2767 case WMI_10X_VDEV_STOPPED_EVENTID:
2768 ath10k_wmi_event_vdev_stopped(ar, skb);
2769 break;
2770 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2771 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2772 break;
2773 case WMI_10X_HOST_SWBA_EVENTID:
2774 ath10k_wmi_event_host_swba(ar, skb);
2775 break;
2776 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2777 ath10k_wmi_event_tbttoffset_update(ar, skb);
2778 break;
2779 case WMI_10X_PHYERR_EVENTID:
2780 ath10k_wmi_event_phyerr(ar, skb);
2781 break;
2782 case WMI_10X_ROAM_EVENTID:
2783 ath10k_wmi_event_roam(ar, skb);
2784 break;
2785 case WMI_10X_PROFILE_MATCH:
2786 ath10k_wmi_event_profile_match(ar, skb);
2787 break;
2788 case WMI_10X_DEBUG_PRINT_EVENTID:
2789 ath10k_wmi_event_debug_print(ar, skb);
2790 break;
2791 case WMI_10X_PDEV_QVIT_EVENTID:
2792 ath10k_wmi_event_pdev_qvit(ar, skb);
2793 break;
2794 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2795 ath10k_wmi_event_wlan_profile_data(ar, skb);
2796 break;
2797 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2798 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2799 break;
2800 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2801 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2802 break;
2803 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2804 ath10k_wmi_event_rtt_error_report(ar, skb);
2805 break;
2806 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2807 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2808 break;
2809 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2810 ath10k_wmi_event_dcs_interference(ar, skb);
2811 break;
2812 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2813 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2814 break;
2815 case WMI_10X_INST_RSSI_STATS_EVENTID:
2816 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2817 break;
2818 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2819 ath10k_wmi_event_vdev_standby_req(ar, skb);
2820 break;
2821 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2822 ath10k_wmi_event_vdev_resume_req(ar, skb);
2823 break;
2824 case WMI_10X_SERVICE_READY_EVENTID:
b34d2b3d 2825 ath10k_wmi_event_service_ready(ar, skb);
8a6618b0
BM		 2826 break;
2827 case WMI_10X_READY_EVENTID:
b34d2b3d 2828 ath10k_wmi_event_ready(ar, skb);
8a6618b0 2829 break;
43d2a30f
KV		 2830 case WMI_10X_PDEV_UTF_EVENTID:
2831 /* ignore utf events */
2832 break;
8a6618b0 2833 default:
7aa7a72a 2834 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM		 2835 break;
2836 }
2837
43d2a30f 2838out:
8a6618b0
BM		 2839 dev_kfree_skb(skb);
2840}
2841
24c88f78
MK		 2842static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb)
2843{
2844 struct wmi_cmd_hdr *cmd_hdr;
2845 enum wmi_10_2_event_id id;
2846
2847 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2848 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2849
2850 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2851 return;
2852
d35a6c18 2853 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK		 2854
2855 switch (id) {
2856 case WMI_10_2_MGMT_RX_EVENTID:
2857 ath10k_wmi_event_mgmt_rx(ar, skb);
2858 /* mgmt_rx() owns the skb now! */
2859 return;
2860 case WMI_10_2_SCAN_EVENTID:
2861 ath10k_wmi_event_scan(ar, skb);
2862 break;
2863 case WMI_10_2_CHAN_INFO_EVENTID:
2864 ath10k_wmi_event_chan_info(ar, skb);
2865 break;
2866 case WMI_10_2_ECHO_EVENTID:
2867 ath10k_wmi_event_echo(ar, skb);
2868 break;
2869 case WMI_10_2_DEBUG_MESG_EVENTID:
2870 ath10k_wmi_event_debug_mesg(ar, skb);
2871 break;
2872 case WMI_10_2_UPDATE_STATS_EVENTID:
2873 ath10k_wmi_event_update_stats(ar, skb);
2874 break;
2875 case WMI_10_2_VDEV_START_RESP_EVENTID:
2876 ath10k_wmi_event_vdev_start_resp(ar, skb);
2877 break;
2878 case WMI_10_2_VDEV_STOPPED_EVENTID:
2879 ath10k_wmi_event_vdev_stopped(ar, skb);
2880 break;
2881 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
2882 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2883 break;
2884 case WMI_10_2_HOST_SWBA_EVENTID:
2885 ath10k_wmi_event_host_swba(ar, skb);
2886 break;
2887 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
2888 ath10k_wmi_event_tbttoffset_update(ar, skb);
2889 break;
2890 case WMI_10_2_PHYERR_EVENTID:
2891 ath10k_wmi_event_phyerr(ar, skb);
2892 break;
2893 case WMI_10_2_ROAM_EVENTID:
2894 ath10k_wmi_event_roam(ar, skb);
2895 break;
2896 case WMI_10_2_PROFILE_MATCH:
2897 ath10k_wmi_event_profile_match(ar, skb);
2898 break;
2899 case WMI_10_2_DEBUG_PRINT_EVENTID:
2900 ath10k_wmi_event_debug_print(ar, skb);
2901 break;
2902 case WMI_10_2_PDEV_QVIT_EVENTID:
2903 ath10k_wmi_event_pdev_qvit(ar, skb);
2904 break;
2905 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
2906 ath10k_wmi_event_wlan_profile_data(ar, skb);
2907 break;
2908 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
2909 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2910 break;
2911 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
2912 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2913 break;
2914 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
2915 ath10k_wmi_event_rtt_error_report(ar, skb);
2916 break;
2917 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
2918 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2919 break;
2920 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
2921 ath10k_wmi_event_dcs_interference(ar, skb);
2922 break;
2923 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
2924 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2925 break;
2926 case WMI_10_2_INST_RSSI_STATS_EVENTID:
2927 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2928 break;
2929 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
2930 ath10k_wmi_event_vdev_standby_req(ar, skb);
2931 break;
2932 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
2933 ath10k_wmi_event_vdev_resume_req(ar, skb);
2934 break;
2935 case WMI_10_2_SERVICE_READY_EVENTID:
b34d2b3d 2936 ath10k_wmi_event_service_ready(ar, skb);
24c88f78
MK		 2937 break;
2938 case WMI_10_2_READY_EVENTID:
b34d2b3d 2939 ath10k_wmi_event_ready(ar, skb);
24c88f78
MK		 2940 break;
2941 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
2942 case WMI_10_2_GPIO_INPUT_EVENTID:
2943 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
2944 case WMI_10_2_GENERIC_BUFFER_EVENTID:
2945 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
2946 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
2947 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 2948 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 2949 "received event id %d not implemented\n", id);
2950 break;
2951 default:
7aa7a72a 2952 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK		 2953 break;
2954 }
2955
2956 dev_kfree_skb(skb);
2957}
8a6618b0 2958
ce42870e
BM		 2959static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2960{
24c88f78
MK		 2961 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2962 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
2963 ath10k_wmi_10_2_process_rx(ar, skb);
2964 else
2965 ath10k_wmi_10x_process_rx(ar, skb);
2966 } else {
ce42870e 2967 ath10k_wmi_main_process_rx(ar, skb);
24c88f78 2968 }
ce42870e
BM		 2969}
2970
95bf21f9 2971int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV		 2972{
2973 int status;
2974 struct ath10k_htc_svc_conn_req conn_req;
2975 struct ath10k_htc_svc_conn_resp conn_resp;
2976
2977 memset(&conn_req, 0, sizeof(conn_req));
2978 memset(&conn_resp, 0, sizeof(conn_resp));
2979
2980 /* these fields are the same for all service endpoints */
2981 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2982 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 2983 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 2984
2985 /* connect to control service */
2986 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2987
cd003fad 2988 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 2989 if (status) {
7aa7a72a 2990 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV		 2991 status);
2992 return status;
2993 }
2994
2995 ar->wmi.eid = conn_resp.eid;
2996 return 0;
2997}
2998
821af6ae
MP		 2999static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
3000 u16 rd2g, u16 rd5g, u16 ctl2g,
3001 u16 ctl5g)
5e3dd157
KV		 3002{
3003 struct wmi_pdev_set_regdomain_cmd *cmd;
3004 struct sk_buff *skb;
3005
7aa7a72a 3006 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3007 if (!skb)
3008 return -ENOMEM;
3009
3010 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
3011 cmd->reg_domain = __cpu_to_le32(rd);
3012 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3013 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3014 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3015 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3016
7aa7a72a 3017 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3018 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
3019 rd, rd2g, rd5g, ctl2g, ctl5g);
3020
ce42870e
BM		 3021 return ath10k_wmi_cmd_send(ar, skb,
3022 ar->wmi.cmd->pdev_set_regdomain_cmdid);
5e3dd157
KV		 3023}
3024
821af6ae
MP		 3025static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
3026 u16 rd2g, u16 rd5g,
3027 u16 ctl2g, u16 ctl5g,
3028 enum wmi_dfs_region dfs_reg)
3029{
3030 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
3031 struct sk_buff *skb;
3032
7aa7a72a 3033 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae
MP		 3034 if (!skb)
3035 return -ENOMEM;
3036
3037 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
3038 cmd->reg_domain = __cpu_to_le32(rd);
3039 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3040 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3041 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3042 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3043 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
3044
7aa7a72a 3045 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP		 3046 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
3047 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
3048
3049 return ath10k_wmi_cmd_send(ar, skb,
3050 ar->wmi.cmd->pdev_set_regdomain_cmdid);
3051}
3052
3053int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
3054 u16 rd5g, u16 ctl2g, u16 ctl5g,
3055 enum wmi_dfs_region dfs_reg)
3056{
3057 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
3058 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
3059 ctl2g, ctl5g, dfs_reg);
3060 else
3061 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
3062 ctl2g, ctl5g);
3063}
3064
00f5482b 3065int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 3066{
3067 struct wmi_pdev_suspend_cmd *cmd;
3068 struct sk_buff *skb;
3069
7aa7a72a 3070 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3071 if (!skb)
3072 return -ENOMEM;
3073
3074 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 3075 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 3076
ce42870e 3077 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
5e3dd157
KV		 3078}
3079
3080int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
3081{
3082 struct sk_buff *skb;
3083
7aa7a72a 3084 skb = ath10k_wmi_alloc_skb(ar, 0);
5e3dd157
KV		 3085 if (skb == NULL)
3086 return -ENOMEM;
3087
ce42870e 3088 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
5e3dd157
KV		 3089}
3090
226a339b 3091int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 3092{
3093 struct wmi_pdev_set_param_cmd *cmd;
3094 struct sk_buff *skb;
3095
226a339b 3096 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK		 3097 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
3098 id);
d544943a 3099 return -EOPNOTSUPP;
226a339b
BM		 3100 }
3101
7aa7a72a 3102 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3103 if (!skb)
3104 return -ENOMEM;
3105
3106 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
3107 cmd->param_id = __cpu_to_le32(id);
3108 cmd->param_value = __cpu_to_le32(value);
3109
7aa7a72a 3110 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 3111 id, value);
ce42870e 3112 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
5e3dd157
KV		 3113}
3114
cf9fca8f
MK		 3115static void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
3116 struct wmi_host_mem_chunks *chunks)
3117{
3118 struct host_memory_chunk *chunk;
3119 int i;
3120
3121 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
3122
3123 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3124 chunk = &chunks->items[i];
3125 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3126 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3127 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3128
3129 ath10k_dbg(ar, ATH10K_DBG_WMI,
3130 "wmi chunk %d len %d requested, addr 0x%llx\n",
3131 i,
3132 ar->wmi.mem_chunks[i].len,
3133 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3134 }
3135}
3136
12b2b9e3 3137static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
5e3dd157
KV		 3138{
3139 struct wmi_init_cmd *cmd;
3140 struct sk_buff *buf;
3141 struct wmi_resource_config config = {};
b3effe61 3142 u32 len, val;
5e3dd157
KV		 3143
3144 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
3145 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
3146 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
3147
3148 config.num_offload_reorder_bufs =
3149 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
3150
3151 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
3152 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
3153 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
3154 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
3155 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
3156 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3157 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3158 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3159 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
3160 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
3161
3162 config.scan_max_pending_reqs =
3163 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
3164
3165 config.bmiss_offload_max_vdev =
3166 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
3167
3168 config.roam_offload_max_vdev =
3169 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
3170
3171 config.roam_offload_max_ap_profiles =
3172 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
3173
3174 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
3175 config.num_mcast_table_elems =
3176 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
3177
3178 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
3179 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
3180 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
3181 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
3182 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
3183
3184 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3185 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3186
3187 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
3188
3189 config.gtk_offload_max_vdev =
3190 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
3191
3192 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
3193 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
3194
b3effe61
BM		 3195 len = sizeof(*cmd) +
3196 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3197
7aa7a72a 3198 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 3199 if (!buf)
3200 return -ENOMEM;
3201
3202 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61 3203
5e3dd157 3204 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 3205 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5e3dd157 3206
7aa7a72a 3207 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
ce42870e 3208 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
5e3dd157
KV		 3209}
3210
12b2b9e3
BM		 3211static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
3212{
3213 struct wmi_init_cmd_10x *cmd;
3214 struct sk_buff *buf;
3215 struct wmi_resource_config_10x config = {};
3216 u32 len, val;
12b2b9e3 3217
ec6a73f0
BM		 3218 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3219 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3220 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3221 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3222 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3223 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3224 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3225 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3226 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3227 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3228 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3229 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
12b2b9e3
BM		 3230
3231 config.scan_max_pending_reqs =
ec6a73f0 3232 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 3233
3234 config.bmiss_offload_max_vdev =
ec6a73f0 3235 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3236
3237 config.roam_offload_max_vdev =
ec6a73f0 3238 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3239
3240 config.roam_offload_max_ap_profiles =
ec6a73f0 3241 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 3242
ec6a73f0 3243 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 3244 config.num_mcast_table_elems =
ec6a73f0 3245 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 3246
ec6a73f0
BM		 3247 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3248 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3249 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3250 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3251 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 3252
ec6a73f0 3253 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 3254 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3255
ec6a73f0 3256 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 3257
ec6a73f0
BM		 3258 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3259 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 3260
3261 len = sizeof(*cmd) +
3262 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3263
7aa7a72a 3264 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3
BM		 3265 if (!buf)
3266 return -ENOMEM;
3267
3268 cmd = (struct wmi_init_cmd_10x *)buf->data;
3269
12b2b9e3 3270 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 3271 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
12b2b9e3 3272
7aa7a72a 3273 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
12b2b9e3
BM		 3274 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3275}
3276
24c88f78
MK		 3277static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar)
3278{
3279 struct wmi_init_cmd_10_2 *cmd;
3280 struct sk_buff *buf;
3281 struct wmi_resource_config_10x config = {};
3282 u32 len, val;
24c88f78
MK		 3283
3284 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3285 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3286 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3287 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3288 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3289 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3290 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3291 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3292 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3293 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3294 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3295 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3296
3297 config.scan_max_pending_reqs =
3298 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3299
3300 config.bmiss_offload_max_vdev =
3301 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3302
3303 config.roam_offload_max_vdev =
3304 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3305
3306 config.roam_offload_max_ap_profiles =
3307 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3308
3309 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3310 config.num_mcast_table_elems =
3311 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3312
3313 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3314 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3315 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3316 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3317 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3318
3319 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3320 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3321
3322 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3323
3324 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3325 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3326
3327 len = sizeof(*cmd) +
3328 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3329
7aa7a72a 3330 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78
MK		 3331 if (!buf)
3332 return -ENOMEM;
3333
3334 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
3335
24c88f78 3336 memcpy(&cmd->resource_config.common, &config, sizeof(config));
cf9fca8f 3337 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
24c88f78 3338
7aa7a72a 3339 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
24c88f78
MK		 3340 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3341}
3342
12b2b9e3
BM		 3343int ath10k_wmi_cmd_init(struct ath10k *ar)
3344{
3345 int ret;
3346
24c88f78
MK		 3347 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
3348 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
3349 ret = ath10k_wmi_10_2_cmd_init(ar);
3350 else
3351 ret = ath10k_wmi_10x_cmd_init(ar);
3352 } else {
12b2b9e3 3353 ret = ath10k_wmi_main_cmd_init(ar);
24c88f78 3354 }
12b2b9e3
BM		 3355
3356 return ret;
5e3dd157
KV		 3357}
3358
a6aa5da3 3359static int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
5e3dd157 3360{
a6aa5da3
MK		 3361 if (arg->ie_len && !arg->ie)
3362 return -EINVAL;
3363 if (arg->n_channels && !arg->channels)
3364 return -EINVAL;
3365 if (arg->n_ssids && !arg->ssids)
3366 return -EINVAL;
3367 if (arg->n_bssids && !arg->bssids)
3368 return -EINVAL;
5e3dd157 3369
a6aa5da3
MK		 3370 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
3371 return -EINVAL;
3372 if (arg->n_channels > ARRAY_SIZE(arg->channels))
3373 return -EINVAL;
3374 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
3375 return -EINVAL;
3376 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
3377 return -EINVAL;
5e3dd157 3378
a6aa5da3
MK		 3379 return 0;
3380}
5e3dd157 3381
a6aa5da3
MK		 3382static size_t
3383ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
3384{
3385 int len = 0;
3386
3387 if (arg->ie_len) {
5e3dd157
KV		 3388 len += sizeof(struct wmi_ie_data);
3389 len += roundup(arg->ie_len, 4);
3390 }
3391
3392 if (arg->n_channels) {
5e3dd157
KV		 3393 len += sizeof(struct wmi_chan_list);
3394 len += sizeof(__le32) * arg->n_channels;
3395 }
3396
3397 if (arg->n_ssids) {
5e3dd157
KV		 3398 len += sizeof(struct wmi_ssid_list);
3399 len += sizeof(struct wmi_ssid) * arg->n_ssids;
3400 }
3401
3402 if (arg->n_bssids) {
5e3dd157
KV		 3403 len += sizeof(struct wmi_bssid_list);
3404 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3405 }
3406
3407 return len;
3408}
3409
a6aa5da3
MK		 3410static void
3411ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
3412 const struct wmi_start_scan_arg *arg)
5e3dd157 3413{
5e3dd157
KV		 3414 u32 scan_id;
3415 u32 scan_req_id;
5e3dd157
KV		 3416
3417 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
3418 scan_id |= arg->scan_id;
3419
3420 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3421 scan_req_id |= arg->scan_req_id;
3422
a6aa5da3
MK		 3423 cmn->scan_id = __cpu_to_le32(scan_id);
3424 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
3425 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
3426 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
3427 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
3428 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
3429 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
3430 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
3431 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
3432 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
3433 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
3434 cmn->idle_time = __cpu_to_le32(arg->idle_time);
3435 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
3436 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
3437 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
3438}
3439
3440static void
3441ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
3442 const struct wmi_start_scan_arg *arg)
3443{
3444 struct wmi_ie_data *ie;
3445 struct wmi_chan_list *channels;
3446 struct wmi_ssid_list *ssids;
3447 struct wmi_bssid_list *bssids;
3448 void *ptr = tlvs->tlvs;
3449 int i;
5e3dd157
KV		 3450
3451 if (arg->n_channels) {
a6aa5da3 3452 channels = ptr;
5e3dd157
KV		 3453 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
3454 channels->num_chan = __cpu_to_le32(arg->n_channels);
3455
3456 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK		 3457 channels->channel_list[i].freq =
3458 __cpu_to_le16(arg->channels[i]);
5e3dd157 3459
a6aa5da3
MK		 3460 ptr += sizeof(*channels);
3461 ptr += sizeof(__le32) * arg->n_channels;
5e3dd157
KV		 3462 }
3463
3464 if (arg->n_ssids) {
a6aa5da3 3465 ssids = ptr;
5e3dd157
KV		 3466 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
3467 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
3468
3469 for (i = 0; i < arg->n_ssids; i++) {
3470 ssids->ssids[i].ssid_len =
3471 __cpu_to_le32(arg->ssids[i].len);
3472 memcpy(&ssids->ssids[i].ssid,
3473 arg->ssids[i].ssid,
3474 arg->ssids[i].len);
3475 }
3476
a6aa5da3
MK		 3477 ptr += sizeof(*ssids);
3478 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
5e3dd157
KV		 3479 }
3480
3481 if (arg->n_bssids) {
a6aa5da3 3482 bssids = ptr;
5e3dd157
KV		 3483 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
3484 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
3485
3486 for (i = 0; i < arg->n_bssids; i++)
3487 memcpy(&bssids->bssid_list[i],
3488 arg->bssids[i].bssid,
3489 ETH_ALEN);
3490
a6aa5da3
MK		 3491 ptr += sizeof(*bssids);
3492 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5e3dd157
KV		 3493 }
3494
3495 if (arg->ie_len) {
a6aa5da3 3496 ie = ptr;
5e3dd157
KV		 3497 ie->tag = __cpu_to_le32(WMI_IE_TAG);
3498 ie->ie_len = __cpu_to_le32(arg->ie_len);
3499 memcpy(ie->ie_data, arg->ie, arg->ie_len);
3500
a6aa5da3
MK		 3501 ptr += sizeof(*ie);
3502 ptr += roundup(arg->ie_len, 4);
5e3dd157 3503 }
a6aa5da3 3504}
5e3dd157 3505
a6aa5da3
MK		 3506int ath10k_wmi_start_scan(struct ath10k *ar,
3507 const struct wmi_start_scan_arg *arg)
3508{
3509 struct sk_buff *skb;
3510 size_t len;
3511 int ret;
3512
3513 ret = ath10k_wmi_start_scan_verify(arg);
3514 if (ret)
3515 return ret;
3516
3517 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
6db0885a 3518 len = sizeof(struct wmi_10x_start_scan_cmd) +
a6aa5da3
MK		 3519 ath10k_wmi_start_scan_tlvs_len(arg);
3520 else
6db0885a 3521 len = sizeof(struct wmi_start_scan_cmd) +
a6aa5da3
MK		 3522 ath10k_wmi_start_scan_tlvs_len(arg);
3523
3524 skb = ath10k_wmi_alloc_skb(ar, len);
3525 if (!skb)
3526 return -ENOMEM;
3527
3528 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
3529 struct wmi_10x_start_scan_cmd *cmd;
3530
3531 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
3532 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
3533 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
3534 } else {
3535 struct wmi_start_scan_cmd *cmd;
3536
3537 cmd = (struct wmi_start_scan_cmd *)skb->data;
3538 cmd->burst_duration_ms = __cpu_to_le32(0);
3539
3540 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
3541 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
5e3dd157
KV		 3542 }
3543
7aa7a72a 3544 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
ce42870e 3545 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
5e3dd157
KV		 3546}
3547
3548void ath10k_wmi_start_scan_init(struct ath10k *ar,
3549 struct wmi_start_scan_arg *arg)
3550{
3551 /* setup commonly used values */
3552 arg->scan_req_id = 1;
3553 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
3554 arg->dwell_time_active = 50;
3555 arg->dwell_time_passive = 150;
3556 arg->min_rest_time = 50;
3557 arg->max_rest_time = 500;
3558 arg->repeat_probe_time = 0;
3559 arg->probe_spacing_time = 0;
3560 arg->idle_time = 0;
c322892f 3561 arg->max_scan_time = 20000;
5e3dd157
KV		 3562 arg->probe_delay = 5;
3563 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
3564 | WMI_SCAN_EVENT_COMPLETED
3565 | WMI_SCAN_EVENT_BSS_CHANNEL
3566 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
3567 | WMI_SCAN_EVENT_DEQUEUED;
3568 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
3569 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
3570 arg->n_bssids = 1;
3571 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
3572}
3573
3574int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
3575{
3576 struct wmi_stop_scan_cmd *cmd;
3577 struct sk_buff *skb;
3578 u32 scan_id;
3579 u32 req_id;
3580
3581 if (arg->req_id > 0xFFF)
3582 return -EINVAL;
3583 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
3584 return -EINVAL;
3585
7aa7a72a 3586 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3587 if (!skb)
3588 return -ENOMEM;
3589
3590 scan_id = arg->u.scan_id;
3591 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
3592
3593 req_id = arg->req_id;
3594 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3595
3596 cmd = (struct wmi_stop_scan_cmd *)skb->data;
3597 cmd->req_type = __cpu_to_le32(arg->req_type);
3598 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
3599 cmd->scan_id = __cpu_to_le32(scan_id);
3600 cmd->scan_req_id = __cpu_to_le32(req_id);
3601
7aa7a72a 3602 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3603 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
3604 arg->req_id, arg->req_type, arg->u.scan_id);
ce42870e 3605 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
5e3dd157
KV		 3606}
3607
3608int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
3609 enum wmi_vdev_type type,
3610 enum wmi_vdev_subtype subtype,
3611 const u8 macaddr[ETH_ALEN])
3612{
3613 struct wmi_vdev_create_cmd *cmd;
3614 struct sk_buff *skb;
3615
7aa7a72a 3616 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3617 if (!skb)
3618 return -ENOMEM;
3619
3620 cmd = (struct wmi_vdev_create_cmd *)skb->data;
3621 cmd->vdev_id = __cpu_to_le32(vdev_id);
3622 cmd->vdev_type = __cpu_to_le32(type);
3623 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 3624 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 3625
7aa7a72a 3626 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3627 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
3628 vdev_id, type, subtype, macaddr);
3629
ce42870e 3630 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
5e3dd157
KV		 3631}
3632
3633int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
3634{
3635 struct wmi_vdev_delete_cmd *cmd;
3636 struct sk_buff *skb;
3637
7aa7a72a 3638 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3639 if (!skb)
3640 return -ENOMEM;
3641
3642 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
3643 cmd->vdev_id = __cpu_to_le32(vdev_id);
3644
7aa7a72a 3645 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3646 "WMI vdev delete id %d\n", vdev_id);
3647
ce42870e 3648 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
5e3dd157
KV		 3649}
3650
5b07e07f
KV		 3651static int
3652ath10k_wmi_vdev_start_restart(struct ath10k *ar,
3653 const struct wmi_vdev_start_request_arg *arg,
3654 u32 cmd_id)
5e3dd157
KV		 3655{
3656 struct wmi_vdev_start_request_cmd *cmd;
3657 struct sk_buff *skb;
3658 const char *cmdname;
3659 u32 flags = 0;
3660
ce42870e
BM		 3661 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
3662 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3663 return -EINVAL;
3664 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
3665 return -EINVAL;
3666 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
3667 return -EINVAL;
3668 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
3669 return -EINVAL;
3670
ce42870e 3671 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
5e3dd157 3672 cmdname = "start";
ce42870e 3673 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
5e3dd157
KV		 3674 cmdname = "restart";
3675 else
3676 return -EINVAL; /* should not happen, we already check cmd_id */
3677
7aa7a72a 3678 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3679 if (!skb)
3680 return -ENOMEM;
3681
3682 if (arg->hidden_ssid)
3683 flags |= WMI_VDEV_START_HIDDEN_SSID;
3684 if (arg->pmf_enabled)
3685 flags |= WMI_VDEV_START_PMF_ENABLED;
3686
3687 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
3688 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3689 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
3690 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
3691 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
3692 cmd->flags = __cpu_to_le32(flags);
3693 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
3694 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
3695
3696 if (arg->ssid) {
3697 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3698 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3699 }
3700
2d66721c 3701 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
5e3dd157 3702
7aa7a72a 3703 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV		 3704 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
3705 cmdname, arg->vdev_id,
e8a50f8b
MP		 3706 flags, arg->channel.freq, arg->channel.mode,
3707 cmd->chan.flags, arg->channel.max_power);
5e3dd157
KV		 3708
3709 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3710}
3711
3712int ath10k_wmi_vdev_start(struct ath10k *ar,
3713 const struct wmi_vdev_start_request_arg *arg)
3714{
ce42870e
BM		 3715 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3716
3717 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3718}
3719
3720int ath10k_wmi_vdev_restart(struct ath10k *ar,
5b07e07f 3721 const struct wmi_vdev_start_request_arg *arg)
5e3dd157 3722{
ce42870e
BM		 3723 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3724
3725 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
5e3dd157
KV		 3726}
3727
3728int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3729{
3730 struct wmi_vdev_stop_cmd *cmd;
3731 struct sk_buff *skb;
3732
7aa7a72a 3733 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3734 if (!skb)
3735 return -ENOMEM;
3736
3737 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3738 cmd->vdev_id = __cpu_to_le32(vdev_id);
3739
7aa7a72a 3740 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
5e3dd157 3741
ce42870e 3742 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
5e3dd157
KV		 3743}
3744
3745int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3746{
3747 struct wmi_vdev_up_cmd *cmd;
3748 struct sk_buff *skb;
3749
7aa7a72a 3750 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3751 if (!skb)
3752 return -ENOMEM;
3753
3754 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3755 cmd->vdev_id = __cpu_to_le32(vdev_id);
3756 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 3757 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 3758
7aa7a72a 3759 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3760 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3761 vdev_id, aid, bssid);
3762
ce42870e 3763 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
5e3dd157
KV		 3764}
3765
3766int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3767{
3768 struct wmi_vdev_down_cmd *cmd;
3769 struct sk_buff *skb;
3770
7aa7a72a 3771 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3772 if (!skb)
3773 return -ENOMEM;
3774
3775 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3776 cmd->vdev_id = __cpu_to_le32(vdev_id);
3777
7aa7a72a 3778 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3779 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3780
ce42870e 3781 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
5e3dd157
KV		 3782}
3783
3784int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6d1506e7 3785 u32 param_id, u32 param_value)
5e3dd157
KV		 3786{
3787 struct wmi_vdev_set_param_cmd *cmd;
3788 struct sk_buff *skb;
3789
6d1506e7 3790 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 3791 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM		 3792 "vdev param %d not supported by firmware\n",
3793 param_id);
ebc9abdd 3794 return -EOPNOTSUPP;
6d1506e7
BM		 3795 }
3796
7aa7a72a 3797 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3798 if (!skb)
3799 return -ENOMEM;
3800
3801 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3802 cmd->vdev_id = __cpu_to_le32(vdev_id);
3803 cmd->param_id = __cpu_to_le32(param_id);
3804 cmd->param_value = __cpu_to_le32(param_value);
3805
7aa7a72a 3806 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3807 "wmi vdev id 0x%x set param %d value %d\n",
3808 vdev_id, param_id, param_value);
3809
ce42870e 3810 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
5e3dd157
KV		 3811}
3812
3813int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3814 const struct wmi_vdev_install_key_arg *arg)
3815{
3816 struct wmi_vdev_install_key_cmd *cmd;
3817 struct sk_buff *skb;
3818
3819 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3820 return -EINVAL;
3821 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3822 return -EINVAL;
3823
7aa7a72a 3824 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157
KV		 3825 if (!skb)
3826 return -ENOMEM;
3827
3828 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3829 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3830 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3831 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3832 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3833 cmd->key_len = __cpu_to_le32(arg->key_len);
3834 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3835 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3836
3837 if (arg->macaddr)
b25f32cb 3838 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV		 3839 if (arg->key_data)
3840 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3841
7aa7a72a 3842 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK		 3843 "wmi vdev install key idx %d cipher %d len %d\n",
3844 arg->key_idx, arg->key_cipher, arg->key_len);
ce42870e
BM		 3845 return ath10k_wmi_cmd_send(ar, skb,
3846 ar->wmi.cmd->vdev_install_key_cmdid);
5e3dd157
KV		 3847}
3848
855aed12
SW		 3849int ath10k_wmi_vdev_spectral_conf(struct ath10k *ar,
3850 const struct wmi_vdev_spectral_conf_arg *arg)
3851{
3852 struct wmi_vdev_spectral_conf_cmd *cmd;
3853 struct sk_buff *skb;
3854 u32 cmdid;
3855
7aa7a72a 3856 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12
SW		 3857 if (!skb)
3858 return -ENOMEM;
3859
3860 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
3861 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3862 cmd->scan_count = __cpu_to_le32(arg->scan_count);
3863 cmd->scan_period = __cpu_to_le32(arg->scan_period);
3864 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
3865 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
3866 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
3867 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
3868 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
3869 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
3870 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
3871 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
3872 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
3873 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
3874 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
3875 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
3876 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
3877 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
3878 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
3879 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
3880
3881 cmdid = ar->wmi.cmd->vdev_spectral_scan_configure_cmdid;
3882 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3883}
3884
3885int ath10k_wmi_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, u32 trigger,
3886 u32 enable)
3887{
3888 struct wmi_vdev_spectral_enable_cmd *cmd;
3889 struct sk_buff *skb;
3890 u32 cmdid;
3891
7aa7a72a 3892 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12
SW		 3893 if (!skb)
3894 return -ENOMEM;
3895
3896 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
3897 cmd->vdev_id = __cpu_to_le32(vdev_id);
3898 cmd->trigger_cmd = __cpu_to_le32(trigger);
3899 cmd->enable_cmd = __cpu_to_le32(enable);
3900
3901 cmdid = ar->wmi.cmd->vdev_spectral_scan_enable_cmdid;
3902 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3903}
3904
5e3dd157
KV		 3905int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3906 const u8 peer_addr[ETH_ALEN])
3907{
3908 struct wmi_peer_create_cmd *cmd;
3909 struct sk_buff *skb;
3910
7aa7a72a 3911 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3912 if (!skb)
3913 return -ENOMEM;
3914
3915 cmd = (struct wmi_peer_create_cmd *)skb->data;
3916 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 3917 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3918
7aa7a72a 3919 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3920 "wmi peer create vdev_id %d peer_addr %pM\n",
3921 vdev_id, peer_addr);
ce42870e 3922 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
5e3dd157
KV		 3923}
3924
3925int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3926 const u8 peer_addr[ETH_ALEN])
3927{
3928 struct wmi_peer_delete_cmd *cmd;
3929 struct sk_buff *skb;
3930
7aa7a72a 3931 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3932 if (!skb)
3933 return -ENOMEM;
3934
3935 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3936 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 3937 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3938
7aa7a72a 3939 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3940 "wmi peer delete vdev_id %d peer_addr %pM\n",
3941 vdev_id, peer_addr);
ce42870e 3942 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
5e3dd157
KV		 3943}
3944
3945int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3946 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3947{
3948 struct wmi_peer_flush_tids_cmd *cmd;
3949 struct sk_buff *skb;
3950
7aa7a72a 3951 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3952 if (!skb)
3953 return -ENOMEM;
3954
3955 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3956 cmd->vdev_id = __cpu_to_le32(vdev_id);
3957 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 3958 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3959
7aa7a72a 3960 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3961 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3962 vdev_id, peer_addr, tid_bitmap);
ce42870e 3963 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
5e3dd157
KV		 3964}
3965
3966int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3967 const u8 *peer_addr, enum wmi_peer_param param_id,
3968 u32 param_value)
3969{
3970 struct wmi_peer_set_param_cmd *cmd;
3971 struct sk_buff *skb;
3972
7aa7a72a 3973 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3974 if (!skb)
3975 return -ENOMEM;
3976
3977 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3978 cmd->vdev_id = __cpu_to_le32(vdev_id);
3979 cmd->param_id = __cpu_to_le32(param_id);
3980 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 3981 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 3982
7aa7a72a 3983 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3984 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3985 vdev_id, peer_addr, param_id, param_value);
3986
ce42870e 3987 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
5e3dd157
KV		 3988}
3989
3990int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3991 enum wmi_sta_ps_mode psmode)
3992{
3993 struct wmi_sta_powersave_mode_cmd *cmd;
3994 struct sk_buff *skb;
3995
7aa7a72a 3996 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 3997 if (!skb)
3998 return -ENOMEM;
3999
4000 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
4001 cmd->vdev_id = __cpu_to_le32(vdev_id);
4002 cmd->sta_ps_mode = __cpu_to_le32(psmode);
4003
7aa7a72a 4004 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4005 "wmi set powersave id 0x%x mode %d\n",
4006 vdev_id, psmode);
4007
ce42870e
BM		 4008 return ath10k_wmi_cmd_send(ar, skb,
4009 ar->wmi.cmd->sta_powersave_mode_cmdid);
5e3dd157
KV		 4010}
4011
4012int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
4013 enum wmi_sta_powersave_param param_id,
4014 u32 value)
4015{
4016 struct wmi_sta_powersave_param_cmd *cmd;
4017 struct sk_buff *skb;
4018
7aa7a72a 4019 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4020 if (!skb)
4021 return -ENOMEM;
4022
4023 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
4024 cmd->vdev_id = __cpu_to_le32(vdev_id);
4025 cmd->param_id = __cpu_to_le32(param_id);
4026 cmd->param_value = __cpu_to_le32(value);
4027
7aa7a72a 4028 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4029 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
4030 vdev_id, param_id, value);
ce42870e
BM		 4031 return ath10k_wmi_cmd_send(ar, skb,
4032 ar->wmi.cmd->sta_powersave_param_cmdid);
5e3dd157
KV		 4033}
4034
4035int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
4036 enum wmi_ap_ps_peer_param param_id, u32 value)
4037{
4038 struct wmi_ap_ps_peer_cmd *cmd;
4039 struct sk_buff *skb;
4040
4041 if (!mac)
4042 return -EINVAL;
4043
7aa7a72a 4044 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4045 if (!skb)
4046 return -ENOMEM;
4047
4048 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
4049 cmd->vdev_id = __cpu_to_le32(vdev_id);
4050 cmd->param_id = __cpu_to_le32(param_id);
4051 cmd->param_value = __cpu_to_le32(value);
b25f32cb 4052 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 4053
7aa7a72a 4054 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4055 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
4056 vdev_id, param_id, value, mac);
4057
ce42870e
BM		 4058 return ath10k_wmi_cmd_send(ar, skb,
4059 ar->wmi.cmd->ap_ps_peer_param_cmdid);
5e3dd157
KV		 4060}
4061
4062int ath10k_wmi_scan_chan_list(struct ath10k *ar,
4063 const struct wmi_scan_chan_list_arg *arg)
4064{
4065 struct wmi_scan_chan_list_cmd *cmd;
4066 struct sk_buff *skb;
4067 struct wmi_channel_arg *ch;
4068 struct wmi_channel *ci;
4069 int len;
4070 int i;
4071
4072 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
4073
7aa7a72a 4074 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157
KV		 4075 if (!skb)
4076 return -EINVAL;
4077
4078 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
4079 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
4080
4081 for (i = 0; i < arg->n_channels; i++) {
5e3dd157
KV		 4082 ch = &arg->channels[i];
4083 ci = &cmd->chan_info[i];
4084
2d66721c 4085 ath10k_wmi_put_wmi_channel(ci, ch);
5e3dd157
KV		 4086 }
4087
ce42870e 4088 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
5e3dd157
KV		 4089}
4090
24c88f78
MK		 4091static void
4092ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
4093 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 4094{
24c88f78 4095 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 4096
5e3dd157
KV		 4097 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4098 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
4099 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
4100 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
4101 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
4102 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
4103 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
4104 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
4105 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
4106 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
4107 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
4108 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
4109 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
4110
b25f32cb 4111 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV		 4112
4113 cmd->peer_legacy_rates.num_rates =
4114 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
4115 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
4116 arg->peer_legacy_rates.num_rates);
4117
4118 cmd->peer_ht_rates.num_rates =
4119 __cpu_to_le32(arg->peer_ht_rates.num_rates);
4120 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
4121 arg->peer_ht_rates.num_rates);
4122
4123 cmd->peer_vht_rates.rx_max_rate =
4124 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
4125 cmd->peer_vht_rates.rx_mcs_set =
4126 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
4127 cmd->peer_vht_rates.tx_max_rate =
4128 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
4129 cmd->peer_vht_rates.tx_mcs_set =
4130 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK		 4131}
4132
4133static void
4134ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
4135 const struct wmi_peer_assoc_complete_arg *arg)
4136{
4137 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
4138
4139 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4140 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
4141}
4142
4143static void
4144ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
4145 const struct wmi_peer_assoc_complete_arg *arg)
4146{
4147 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4148}
4149
4150static void
4151ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
4152 const struct wmi_peer_assoc_complete_arg *arg)
4153{
4154 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
4155 int max_mcs, max_nss;
4156 u32 info0;
4157
4158 /* TODO: Is using max values okay with firmware? */
4159 max_mcs = 0xf;
4160 max_nss = 0xf;
4161
4162 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
4163 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
4164
4165 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4166 cmd->info0 = __cpu_to_le32(info0);
4167}
4168
4169int ath10k_wmi_peer_assoc(struct ath10k *ar,
4170 const struct wmi_peer_assoc_complete_arg *arg)
4171{
4172 struct sk_buff *skb;
4173 int len;
4174
4175 if (arg->peer_mpdu_density > 16)
4176 return -EINVAL;
4177 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
4178 return -EINVAL;
4179 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
4180 return -EINVAL;
4181
4182 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4183 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4184 len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
4185 else
4186 len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
4187 } else {
4188 len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
4189 }
4190
7aa7a72a 4191 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78
MK		 4192 if (!skb)
4193 return -ENOMEM;
4194
4195 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4196 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
24c88f78 4197 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
9de8f26f
PO		 4198 else
4199 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
24c88f78
MK		 4200 } else {
4201 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
4202 }
5e3dd157 4203
7aa7a72a 4204 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY		 4205 "wmi peer assoc vdev %d addr %pM (%s)\n",
4206 arg->vdev_id, arg->addr,
4207 arg->peer_reassoc ? "reassociate" : "new");
ce42870e 4208 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
5e3dd157
KV		 4209}
4210
748afc47
MK		 4211/* This function assumes the beacon is already DMA mapped */
4212int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
5e3dd157 4213{
748afc47 4214 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 4215 struct sk_buff *skb;
748afc47
MK		 4216 struct sk_buff *beacon = arvif->beacon;
4217 struct ath10k *ar = arvif->ar;
4218 struct ieee80211_hdr *hdr;
e2045481 4219 int ret;
748afc47 4220 u16 fc;
5e3dd157 4221
7aa7a72a 4222 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4223 if (!skb)
4224 return -ENOMEM;
4225
748afc47
MK		 4226 hdr = (struct ieee80211_hdr *)beacon->data;
4227 fc = le16_to_cpu(hdr->frame_control);
4228
4229 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
4230 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
4231 cmd->data_len = __cpu_to_le32(beacon->len);
4232 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
4233 cmd->msdu_id = 0;
4234 cmd->frame_control = __cpu_to_le32(fc);
4235 cmd->flags = 0;
24c88f78 4236 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47
MK		 4237
4238 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
4239 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
4240
4241 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
4242 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
4243
4244 ret = ath10k_wmi_cmd_send_nowait(ar, skb,
4245 ar->wmi.cmd->pdev_send_bcn_cmdid);
5e3dd157 4246
e2045481
MK		 4247 if (ret)
4248 dev_kfree_skb(skb);
4249
4250 return ret;
5e3dd157
KV		 4251}
4252
4253static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
4254 const struct wmi_wmm_params_arg *arg)
4255{
4256 params->cwmin = __cpu_to_le32(arg->cwmin);
4257 params->cwmax = __cpu_to_le32(arg->cwmax);
4258 params->aifs = __cpu_to_le32(arg->aifs);
4259 params->txop = __cpu_to_le32(arg->txop);
4260 params->acm = __cpu_to_le32(arg->acm);
4261 params->no_ack = __cpu_to_le32(arg->no_ack);
4262}
4263
4264int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
5b07e07f 4265 const struct wmi_pdev_set_wmm_params_arg *arg)
5e3dd157
KV		 4266{
4267 struct wmi_pdev_set_wmm_params *cmd;
4268 struct sk_buff *skb;
4269
7aa7a72a 4270 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4271 if (!skb)
4272 return -ENOMEM;
4273
4274 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
4275 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
4276 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
4277 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
4278 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
4279
7aa7a72a 4280 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
ce42870e
BM		 4281 return ath10k_wmi_cmd_send(ar, skb,
4282 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
5e3dd157
KV		 4283}
4284
4285int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
4286{
4287 struct wmi_request_stats_cmd *cmd;
4288 struct sk_buff *skb;
4289
7aa7a72a 4290 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157
KV		 4291 if (!skb)
4292 return -ENOMEM;
4293
4294 cmd = (struct wmi_request_stats_cmd *)skb->data;
4295 cmd->stats_id = __cpu_to_le32(stats_id);
4296
7aa7a72a 4297 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
ce42870e 4298 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
5e3dd157 4299}
9cfbce75
MK		 4300
4301int ath10k_wmi_force_fw_hang(struct ath10k *ar,
4302 enum wmi_force_fw_hang_type type, u32 delay_ms)
4303{
4304 struct wmi_force_fw_hang_cmd *cmd;
4305 struct sk_buff *skb;
4306
7aa7a72a 4307 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75
MK		 4308 if (!skb)
4309 return -ENOMEM;
4310
4311 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
4312 cmd->type = __cpu_to_le32(type);
4313 cmd->delay_ms = __cpu_to_le32(delay_ms);
4314
7aa7a72a 4315 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 4316 type, delay_ms);
ce42870e 4317 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
9cfbce75 4318}
f118a3e5
KV		 4319
4320int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
4321{
4322 struct wmi_dbglog_cfg_cmd *cmd;
4323 struct sk_buff *skb;
4324 u32 cfg;
4325
7aa7a72a 4326 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5
KV		 4327 if (!skb)
4328 return -ENOMEM;
4329
4330 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
4331
4332 if (module_enable) {
4333 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
4334 ATH10K_DBGLOG_CFG_LOG_LVL);
4335 } else {
4336 /* set back defaults, all modules with WARN level */
4337 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
4338 ATH10K_DBGLOG_CFG_LOG_LVL);
4339 module_enable = ~0;
4340 }
4341
4342 cmd->module_enable = __cpu_to_le32(module_enable);
4343 cmd->module_valid = __cpu_to_le32(~0);
4344 cmd->config_enable = __cpu_to_le32(cfg);
4345 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
4346
7aa7a72a 4347 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV		 4348 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
4349 __le32_to_cpu(cmd->module_enable),
4350 __le32_to_cpu(cmd->module_valid),
4351 __le32_to_cpu(cmd->config_enable),
4352 __le32_to_cpu(cmd->config_valid));
4353
4354 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
4355}
b79b9baa 4356
90174455
RM		 4357int ath10k_wmi_pdev_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
4358{
4359 struct wmi_pdev_pktlog_enable_cmd *cmd;
4360 struct sk_buff *skb;
4361
4362 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4363 if (!skb)
4364 return -ENOMEM;
4365
4366 ev_bitmap &= ATH10K_PKTLOG_ANY;
4367 ath10k_dbg(ar, ATH10K_DBG_WMI,
4368 "wmi enable pktlog filter:%x\n", ev_bitmap);
4369
4370 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
4371 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
4372 return ath10k_wmi_cmd_send(ar, skb,
4373 ar->wmi.cmd->pdev_pktlog_enable_cmdid);
4374}
4375
4376int ath10k_wmi_pdev_pktlog_disable(struct ath10k *ar)
4377{
4378 struct sk_buff *skb;
4379
4380 skb = ath10k_wmi_alloc_skb(ar, 0);
4381 if (!skb)
4382 return -ENOMEM;
4383
4384 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
4385
4386 return ath10k_wmi_cmd_send(ar, skb,
4387 ar->wmi.cmd->pdev_pktlog_disable_cmdid);
4388}
4389
b79b9baa
MK		 4390int ath10k_wmi_attach(struct ath10k *ar)
4391{
4392 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4393 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4394 ar->wmi.cmd = &wmi_10_2_cmd_map;
4395 else
4396 ar->wmi.cmd = &wmi_10x_cmd_map;
4397
4398 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
4399 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
4400 } else {
4401 ar->wmi.cmd = &wmi_cmd_map;
4402 ar->wmi.vdev_param = &wmi_vdev_param_map;
4403 ar->wmi.pdev_param = &wmi_pdev_param_map;
4404 }
4405
4406 init_completion(&ar->wmi.service_ready);
4407 init_completion(&ar->wmi.unified_ready);
b79b9baa
MK		 4408
4409 return 0;
4410}
4411
4412void ath10k_wmi_detach(struct ath10k *ar)
4413{
4414 int i;
4415
4416 /* free the host memory chunks requested by firmware */
4417 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
4418 dma_free_coherent(ar->dev,
4419 ar->wmi.mem_chunks[i].len,
4420 ar->wmi.mem_chunks[i].vaddr,
4421 ar->wmi.mem_chunks[i].paddr);
4422 }
4423
4424 ar->wmi.num_mem_chunks = 0;
4425}
Linux kernel - Deliverables
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